A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

PubMed

Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

2017-02-14

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

PubMed Central

Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

2017-01-01

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Product assurance technology for custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Blaes, B. R.; Jennings, G. A.; Moore, B. T.; Nixon, R. H.; Pina, C. A.; Sayah, H. R.; Sievers, M. W.; Stahlberg, N. F.

1985-01-01

The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification.

Technical Reliability Studies. EOS/ESD Technology Abstracts

DTIC Science & Technology

1982-01-01

RESISTANT BIPOLAR TRANSISTOR DESIGN AND ITS APPLICATIONS TO LINEAR INTEGRATED CIRCUITS 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR 15786 SOME...T.M. 16476 STATIC DISCHARGE MODELING TECHNIQUES FOR EVALUATION OF INTEGRATED (FET) CIRCUIT DESTRUCTION 16145 MODULE ELECTAOSTATIC DISCHARGE SIMULATOR...PLASTIC LSI CIRCUITS PRklE, L.A., II 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR PRICE, R.D. 13455 EVALUATION OF PLASTIC LSI CIRCUITS PSHAENICH, A

Technological Literacy Learning with Cumulative and Stepwise Integration of Equations into Electrical Circuit Diagrams

ERIC Educational Resources Information Center

Ozogul, G.; Johnson, A. M.; Moreno, R.; Reisslein, M.

2012-01-01

Technological literacy education involves the teaching of basic engineering principles and problem solving, including elementary electrical circuit analysis, to non-engineering students. Learning materials on circuit analysis typically rely on equations and schematic diagrams, which are often unfamiliar to non-engineering students. The goal of…

Heterojunction bipolar transistor technology for data acquisition and communication

NASA Technical Reports Server (NTRS)

Wang, C.; Chang, M.; Beccue, S.; Nubling, R.; Zampardi, P.; Sheng, N.; Pierson, R.

1992-01-01

Heterojunction Bipolar Transistor (HBT) technology has emerged as one of the most promising technologies for ultrahigh-speed integrated circuits. HBT circuits for digital and analog applications, data conversion, and power amplification have been realized, with speed performance well above 20 GHz. At Rockwell, a baseline AlGaAs/GaAs HBT technology has been established in a manufacturing facility. This paper describes the HBT technology, transistor characteristics, and HBT circuits for data acquisition and communication.

Photonic technology revolution influence on the defence area

NASA Astrophysics Data System (ADS)

Galas, Jacek; Litwin, Dariusz; Błocki, Narcyz; Daszkiewicz, Marek

2017-10-01

Revolutionary progress in the photonic technology provides the ability to develop military systems of new properties not possible to obtain with the use of classical technologies. In recent years, this progress has resulted in developing advanced, complex, multifunctional and relatively cheap Photonic Integrated Circuits (PIC) or Hybrid Photonics Circuits (HPC) built of a collection of standardized optical, optoelectronic and photonic components. This idea is similar to the technology of Electronic Integrated Circuits, which has revolutionized the microelectronic market. The novel approach to photonic technology is now revolutionizing the photonics' market. It simplifies the photonics technology and enables creation of technological centers for designing, development and production of advanced optical and photonic systems in the EU and other countries. This paper presents some selected photonic technologies and their impact on such defense systems like radars, radiolocation, telecommunication, and radio-communication systems.

Photonic integrated circuits based on silica and polymer PLC

NASA Astrophysics Data System (ADS)

Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

2013-03-01

Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

A silicon technology for millimeter-wave monolithic circuits

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-12-01

A silicon millimeter-wave integrated-circuit (SIMMWIC) technology that includes high-energy ion implantation and pulsed-laser annealing, secondary ion mass spectrometry (SIMS) profile diagnostics, and novel wafer thinning has been developed. This technology has been applied to a SIMMWIC single-pole single-throw (SPST) switch and to IMPATT and p-i-n diode fabrication schemes. Thus, the SIMMWIC technology is a proven base for monolithic millimeter-wave sources and control circuit applications.

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

NASA Astrophysics Data System (ADS)

Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

2011-12-01

A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

Novel Vertical Interconnects With 180 Degree Phase Shift for Amplifiers, Filters, and Integrated Antennas

NASA Technical Reports Server (NTRS)

Goverdhanam, Kavita; Simons, Rainee N.; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

2001-01-01

In this paper, novel low loss, wide-band coplanar stripline technology for RF/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semiconductor devices and microelectromechanical systems (MEMS).

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1980-01-01

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.

Survey of key technologies on millimeter-wave CMOS integrated circuits

NASA Astrophysics Data System (ADS)

Yu, Fei; Gao, Lei; Li, Lixiang; Cai, Shuo; Wang, Wei; Wang, Chunhua

2018-05-01

In order to provide guidance for the development of high performance millimeter-wave complementary metal oxide semiconductor (MMW-CMOS) integrated circuits (IC), this paper provides a survey of key technologies on MMW-CMOS IC. Technical background of MMW wireless communications is described. Then the recent development of the critical technologies of the MMW-CMOS IC are introduced in detail and compared. A summarization is given, and the development prospects on MMW-CMOS IC are also discussed.

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

A general design strategy for block copolymer directed self-assembly patterning of integrated circuits contact holes using an alphabet approach.

PubMed

Yi, He; Bao, Xin-Yu; Tiberio, Richard; Wong, H-S Philip

2015-02-11

Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

Optoelectronic Infrastructure for Radio Frequency and Optical Phased Arrays

NASA Technical Reports Server (NTRS)

Cai, Jianhong

2015-01-01

Optoelectronic integrated circuits offer radiation-hardened solutions for satellite systems in addition to improved size, weight, power, and bandwidth characteristics. ODIS, Inc., has developed optoelectronic integrated circuit technology for sensing and data transfer in phased arrays. The technology applies integrated components (lasers, amplifiers, modulators, detectors, and optical waveguide switches) to a radio frequency (RF) array with true time delay for beamsteering. Optical beamsteering is achieved by controlling the current in a two-dimensional (2D) array. In this project, ODIS integrated key components to produce common RF-optical aperture operation.

Additive manufacturing of hybrid circuits

DOE PAGES

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; ...

2016-03-26

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Reproducible Operating Margins on a 72800-Device Digital Superconducting Chip (Open Access)

DTIC Science & Technology

2015-10-28

superconductor digital logic. Keywords: flux trapping, yield, digital Superconductor digital technology offers fundamental advantages over conventional...trapping in the superconductor films can degrade or preclude correct circuit operation. Scaling superconductor technology is now possible due to recent...advances in circuit design embodied in reciprocal quantum logic (RQL) [2, 3] and recent advances in superconductor integrated circuit fabrication, which

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Microwave monolithic integrated circuit-related metrology at the National Institute of Standards and Technology

NASA Astrophysics Data System (ADS)

Reeve, Gerome; Marks, Roger; Blackburn, David

1990-12-01

How the National Institute of Standards and Technology (NIST) interacts with the GaAs community and the Defense Advanced Research Projects Agency microwave monolithic integrated circuit (MMIC) initiative is described. The organization of a joint industry and government laboratory consortium for MMIC-related metrology research is described along with some of the initial technical developments at NIST done in support of the consortium.

Integrated optical circuit engineering V; Proceedings of the Meeting, San Diego, CA, Aug. 17-20, 1987

NASA Astrophysics Data System (ADS)

Mentzer, Mark A.

Recent advances in the theoretical and practical design and applications of optoelectronic devices and optical circuits are examined in reviews and reports. Topics discussed include system and market considerations, guided-wave phenomena, waveguide devices, processing technology, lithium niobate devices, and coupling problems. Consideration is given to testing and measurement, integrated optics for fiber-optic systems, optical interconnect technology, and optical computing.

Intelligent structures technology

NASA Astrophysics Data System (ADS)

Crawley, Edward F.

1991-07-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Intelligent structures technology

NASA Technical Reports Server (NTRS)

Crawley, Edward F.

1991-01-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

Assessment of Durable SiC JFET Technology for +600 C to -125 C Integrated Circuit Operation

NASA Technical Reports Server (NTRS)

Neudeck, P. G.; Krasowski, M. J.; Prokop, N. F.

2011-01-01

Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 C to +600 C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 C ICs for combustion engine sensing and control, deep-well drilling, and other harsh-environment applications.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, David R.

1989-01-01

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1989-09-12

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

An assessment of the impact of the Department of Defense very high speed integrated circuit program

NASA Astrophysics Data System (ADS)

1982-01-01

The technical and economic effects of the Department of Defense's (DoD) development program for very-high-speed integrated circuits (VHSIC) are examined. The probable effects of this program on the domestic aspects and international position of the integrated-circuit (IC) industry as they relate to the interests of the general public and the DoD are considered. The report presents a review of the unique DoD needs that motivate VHSIC research and development; an estimate of the degree of which these needs are likely to be met by the VHSIC program; a discussion of the effects of the program's demands for manpower, materials, and design and processing technologies; the problems connected with the program's technology export controls; and an assessment of the impact of the program on the structure of the U.S. integrated-circuit industry, its continued development and production of civilian consumer products, and its international competitive position.

Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

PubMed

Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

Monolithic microwave integrated circuit technology for advanced space communication

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Romanofsky, Robert R.

1988-01-01

Future Space Communications subsystems will utilize GaAs Monolithic Microwave Integrated Circuits (MMIC's) to reduce volume, weight, and cost and to enhance system reliability. Recent advances in GaAs MMIC technology have led to high-performance devices which show promise for insertion into these next generation systems. The status and development of a number of these devices operating from Ku through Ka band will be discussed along with anticipated potential applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Advanced 3-V semiconductor technology assessment

NASA Technical Reports Server (NTRS)

Nowogrodzki, M.

1983-01-01

Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.

Microwave integrated circuits for space applications

NASA Technical Reports Server (NTRS)

Leonard, Regis F.; Romanofsky, Robert R.

1991-01-01

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

Semiconductor Cubing

NASA Technical Reports Server (NTRS)

1996-01-01

Through Goddard Space Flight Center and Jet Propulsion Laboratory Small Business Innovation Research contracts, Irvine Sensors developed a three-dimensional memory system for a spaceborne data recorder and other applications for NASA. From these contracts, the company created the Memory Short Stack product, a patented technology for stacking integrated circuits that offers higher processing speeds and levels of integration, and lower power requirements. The product is a three-dimensional semiconductor package in which dozens of integrated circuits are stacked upon each other to form a cube. The technology is being used in various computer and telecommunications applications.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

A Flipped First-Year Digital Circuits Course for Engineering and Technology Students

ERIC Educational Resources Information Center

Yelamarthi, Kumar; Drake, Eron

2015-01-01

This paper describes a flipped and improved first-year digital circuits (DC) course that incorporates several active learning strategies. With the primary objective of increasing student interest and learning, an integrated instructional design framework is proposed to provide first-year engineering and technology students with practical knowledge…

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

MEMS Technology for Space Applications

NASA Technical Reports Server (NTRS)

vandenBerg, A.; Spiering, V. L.; Lammerink, T. S. J.; Elwenspoek, M.; Bergveld, P.

1995-01-01

Micro-technology enables the manufacturing of all kinds of components for miniature systems or micro-systems, such as sensors, pumps, valves, and channels. The integration of these components into a micro-electro-mechanical system (MEMS) drastically decreases the total system volume and mass. These properties, combined with the increasing need for monitoring and control of small flows in (bio)chemical experiments, makes MEMS attractive for space applications. The level of integration and applied technology depends on the product demands and the market. The ultimate integration is process integration, which results in a one-chip system. An example of process integration is a dosing system of pump, flow sensor, micromixer, and hybrid feedback electronics to regulate the flow. However, for many applications, a hybrid integration of components is sufficient and offers the advantages of design flexibility and even the exchange of components in the case of a modular set up. Currently, we are working on hybrid integration of all kinds of sensors (physical and chemical) and flow system modules towards a modular system; the micro total analysis system (micro TAS). The substrate contains electrical connections as in a printed circuit board (PCB) as well as fluid channels for a circuit channel board (CCB) which, when integrated, form a mixed circuit board (MCB).

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liang-Yu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Technology CAD for integrated circuit fabrication technology development and technology transfer

NASA Astrophysics Data System (ADS)

Saha, Samar

2003-07-01

In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are used to optimize the device and process parameters to develop a new generation of IC manufacturing technology by reverse engineering from the target product specifications. While in technology transfer to manufacturing co-location, TCAD is used for process centering with respect to high-volume manufacturing equipment of the target manufacturing equipment of the target manufacturing facility. A quantitative model is developed to demonstrate the potential benefits of the simulation-based methodology in reducing the cycle time and cost of typical technology development and technology transfer projects over the traditional practices. The strategy for predictive simulation to improve the effectiveness of a TCAD-based project, is also discussed.

Compact Circuit Preprocesses Accelerometer Output

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1993-01-01

Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

PubMed

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

System-Level Integrated Circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

System-level integrated circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

Walk-through survey report: Control technology for integrated circuit fabrication, Xerox Corporation, El Segundo, California

NASA Astrophysics Data System (ADS)

Mihlan, G. J.; Ungers, L. J.; Smith, R. K.; Mitchell, R. I.; Jones, J. H.

1983-05-01

A preliminary control technology assessment survey was conducted at the facility which manufactures N-channel metal oxide semiconductor (NMOS) integrated circuits. The facility has industrial hygiene review procedures for evaluating all new and existing process equipment. Employees are trained in safety, use of personal protective equipment, and emergency response. Workers potentially exposed to arsenic are monitored for urinary arsenic levels. The facility should be considered a candidate for detailed study based on the diversity of process operations encountered and the use of state-of-the-art technology and process equipment.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

Application of a high-energy-density permanent magnet material in underwater systems

NASA Astrophysics Data System (ADS)

Cho, C. P.; Egan, C.; Krol, W. P.

1996-06-01

This paper addresses the application of high-energy-density permanent magnet (PM) technology to (1) the brushless, axial-field PM motor and (2) the integrated electric motor/pump system for under-water applications. Finite-element analysis and lumped parameter magnetic circuit analysis were used to calculate motor parameters and performance characteristics and to conduct tradeoff studies. Compact, efficient, reliable, and quiet underwater systems are attainable with the development of high-energy-density PM material, power electronic devices, and power integrated-circuit technology.

Note: Fully integrated active quenching circuit achieving 100 MHz count rate with custom technology single photon avalanche diodes.

PubMed

Acconcia, G; Labanca, I; Rech, I; Gulinatti, A; Ghioni, M

2017-02-01

The minimization of Single Photon Avalanche Diodes (SPADs) dead time is a key factor to speed up photon counting and timing measurements. We present a fully integrated Active Quenching Circuit (AQC) able to provide a count rate as high as 100 MHz with custom technology SPAD detectors. The AQC can also operate the new red enhanced SPAD and provide the timing information with a timing jitter Full Width at Half Maximum (FWHM) as low as 160 ps.

Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors

PubMed Central

Graham, Anthony H. D.; Robbins, Jon; Bowen, Chris R.; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented. PMID:22163884

Digital MOS integrated circuits

NASA Astrophysics Data System (ADS)

Elmasry, M. I.

MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.

On-chip continuous-variable quantum entanglement

NASA Astrophysics Data System (ADS)

Masada, Genta; Furusawa, Akira

2016-09-01

Entanglement is an essential feature of quantum theory and the core of the majority of quantum information science and technologies. Quantum computing is one of the most important fruits of quantum entanglement and requires not only a bipartite entangled state but also more complicated multipartite entanglement. In previous experimental works to demonstrate various entanglement-based quantum information processing, light has been extensively used. Experiments utilizing such a complicated state need highly complex optical circuits to propagate optical beams and a high level of spatial interference between different light beams to generate quantum entanglement or to efficiently perform balanced homodyne measurement. Current experiments have been performed in conventional free-space optics with large numbers of optical components and a relatively large-sized optical setup. Therefore, they are limited in stability and scalability. Integrated photonics offer new tools and additional capabilities for manipulating light in quantum information technology. Owing to integrated waveguide circuits, it is possible to stabilize and miniaturize complex optical circuits and achieve high interference of light beams. The integrated circuits have been firstly developed for discrete-variable systems and then applied to continuous-variable systems. In this article, we review the currently developed scheme for generation and verification of continuous-variable quantum entanglement such as Einstein-Podolsky-Rosen beams using a photonic chip where waveguide circuits are integrated. This includes balanced homodyne measurement of a squeezed state of light. As a simple example, we also review an experiment for generating discrete-variable quantum entanglement using integrated waveguide circuits.

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

NASA Technical Reports Server (NTRS)

Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

2015-01-01

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

Silica-on-silicon waveguide quantum circuits.

PubMed

Politi, Alberto; Cryan, Martin J; Rarity, John G; Yu, Siyuan; O'Brien, Jeremy L

2008-05-02

Quantum technologies based on photons will likely require an integrated optics architecture for improved performance, miniaturization, and scalability. We demonstrate high-fidelity silica-on-silicon integrated optical realizations of key quantum photonic circuits, including two-photon quantum interference with a visibility of 94.8 +/- 0.5%; a controlled-NOT gate with an average logical basis fidelity of 94.3 +/- 0.2%; and a path-entangled state of two photons with fidelity of >92%. These results show that it is possible to directly "write" sophisticated photonic quantum circuits onto a silicon chip, which will be of benefit to future quantum technologies based on photons, including information processing, communication, metrology, and lithography, as well as the fundamental science of quantum optics.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Advances in integrated photonic circuits for packet-switched interconnection

NASA Astrophysics Data System (ADS)

Williams, Kevin A.; Stabile, Ripalta

2014-03-01

Sustained increases in capacity and connectivity are needed to overcome congestion in a range of broadband communication network nodes. Packet routing and switching in the electronic domain are leading to unsustainable energy- and bandwidth-densities, motivating research into hybrid solutions: optical switching engines are introduced for massive-bandwidth data transport while the electronic domain is clocked at more modest GHz rates to manage routing. Commercially-deployed optical switching engines using MEMS technologies are unwieldy and too slow to reconfigure for future packet-based networking. Optoelectronic packet-compliant switch technologies have been demonstrated as laboratory prototypes, but they have so far mostly used discretely pigtailed components, which are impractical for control plane development and product assembly. Integrated photonics has long held the promise of reduced hardware complexity and may be the critical step towards packet-compliant optical switching engines. Recently a number of laboratories world-wide have prototyped optical switching circuits using monolithic integration technology with up to several hundreds of integrated optical components per chip. Our own work has focused on multi-input to multi-output switching matrices. Recently we have demonstrated 8×8×8λ space and wavelength selective switches using gated cyclic routers and 16×16 broadband switching chips using monolithic multi-stage networks. We now operate these advanced circuits with custom control planes implemented with FPGAs to explore real time packet routing in multi-wavelength, multi-port test-beds. We review our contributions in the context of state of the art photonic integrated circuit technology and packet optical switching hardware demonstrations.

A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS

NASA Astrophysics Data System (ADS)

Kawamoto, Kazunori; Mizuno, Shoji; Abe, Hirofumi; Higuchi, Yasushi; Ishihara, Hideaki; Fukumoto, Harutsugu; Watanabe, Takamoto; Fujino, Seiji; Shirakawa, Isao

2001-04-01

Using the example of an air bag controller, a single chip solution for automotive sub-control systems is investigated, by using a technological combination of improved circuits, bipolar complimentary metal oxide silicon double-diffused metal oxide silicon (BiCDMOS) and thick silicon on insulator (SOI). For circuits, an automotive specific reduced instruction set computer (RISC) center processing unit (CPU), and a novel, all integrated system clock generator, dividing digital phase-locked loop (DDPLL) are proposed. For the device technologies, the authors use SOI-BiCDMOS with trench dielectric-isolation (TD) which enables integration of various devices in an integrated circuit (IC) while avoiding parasitic miss operations by ideal isolation. The structures of the SOI layer and TD, are optimized for obtaining desired device characteristics and high electromagnetic interference (EMI) immunity. While performing all the air bag system functions over a wide range of supply voltage, and ambient temperature, the resulting single chip reduces the electronic parts to about a half of those in the conventional air bags. The combination of single chip oriented circuits and thick SOI-BiCDMOS technologies offered in this work is valuable for size reduction and improved reliability of automotive electronic control units (ECUs).

Electronic control circuits: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

NASA Astrophysics Data System (ADS)

Shulaker, Max M.; Hills, Gage; Park, Rebecca S.; Howe, Roger T.; Saraswat, Krishna; Wong, H.-S. Philip; Mitra, Subhasish

2017-07-01

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors—promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage—fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip.

PubMed

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish

2017-07-05

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage-fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce 'highly processed' information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Silica Integrated Optical Circuits Based on Glass Photosensitivity

NASA Technical Reports Server (NTRS)

Abushagur, Mustafa A. G.

1999-01-01

Integrated optical circuits play a major rule in the new photonics technology both in communication and sensing due to their small size and compatibility with integrated circuits. Currently integrated optical circuits (IOCs) are fabricated using similar manufacturing to those used in the semiconductor industry. In this study we are considering a new technique to fabricate IOCs which does not require layers of photolithography, depositing and etching. This method is based on the photosensitivity of germanosilicate glasses. Waveguides and other IOC devises can be patterned in these glasses by exposing them using UV lasers. This exposure by UV light changes the index of refraction of the germanosilicate glass. This technique enjoys both the simplicity and flexibility of design and fabrication with also the potential of being fast and low cost.

Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

NASA Astrophysics Data System (ADS)

Heck, Martijn J. R.

2017-01-01

Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

Building the vision, a series of AZTech ITS model deployment success stories for the Phoenix metropolitan area : number seven : spectacular views sharing closed circuit TV between operations centers

DOT National Transportation Integrated Search

1998-01-01

Advanced communications technology is the engine that continually moves AZTech closer to its goal of integrating transportation systems throughout the region. At the heart of this technology is a state-of-the-art Closed Circuit Television (CCTV) syst...

Radiation damage in MOS integrated circuits, Part 1

NASA Technical Reports Server (NTRS)

Danchenko, V.

1971-01-01

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

PubMed

Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

2016-06-01

The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. © The Author(s) 2016.

Modular integration of electronics and microfluidic systems using flexible printed circuit boards.

PubMed

Wu, Amy; Wang, Lisen; Jensen, Erik; Mathies, Richard; Boser, Bernhard

2010-02-21

Microfluidic systems offer an attractive alternative to conventional wet chemical methods with benefits including reduced sample and reagent volumes, shorter reaction times, high-throughput, automation, and low cost. However, most present microfluidic systems rely on external means to analyze reaction products. This substantially adds to the size, complexity, and cost of the overall system. Electronic detection based on sub-millimetre size integrated circuits (ICs) has been demonstrated for a wide range of targets including nucleic and amino acids, but deployment of this technology to date has been limited due to the lack of a flexible process to integrate these chips within microfluidic devices. This paper presents a modular and inexpensive process to integrate ICs with microfluidic systems based on standard printed circuit board (PCB) technology to assemble the independently designed microfluidic and electronic components. The integrated system can accommodate multiple chips of different sizes bonded to glass or PDMS microfluidic systems. Since IC chips and flex PCB manufacturing and assembly are industry standards with low cost, the integrated system is economical for both laboratory and point-of-care settings.

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

PubMed Central

Kazior, Thomas E.

2014-01-01

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications. PMID:24567473

Beyond CMOS: heterogeneous integration of III-V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems.

PubMed

Kazior, Thomas E

2014-03-28

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

SiGe Integrated Circuit Developments for SQUID/TES Readout

NASA Astrophysics Data System (ADS)

Prêle, D.; Voisin, F.; Beillimaz, C.; Chen, S.; Piat, M.; Goldwurm, A.; Laurent, P.

2018-03-01

SiGe integrated circuits dedicated to the readout of superconducting bolometer arrays for astrophysics have been developed since more than 10 years at APC. Whether for Cosmic Microwave Background (CMB) observations with the QUBIC ground-based experiment (Aumont et al. in astro-ph.IM, 2016. arXiv:1609.04372) or for the Hot and Energetic Universe science theme with the X-IFU instrument on-board of the ATHENA space mission (Barret et al. in SPIE 9905, space telescopes & instrumentation 2016: UV to γ Ray, 2016. https://doi.org/10.1117/12.2232432), several kinds of Transition Edge Sensor (TES) (Irwin and Hilton, in ENSS (ed) Cryogenic particle detection, Springer, Berlin, 2005) arrays have been investigated. To readout such superconducting detector arrays, we use time or frequency domain multiplexers (TDM, FDM) (Prêle in JINST 10:C08015, 2016. https://doi.org/10.1088/1748-0221/10/08/C08015) with Superconducting QUantum Interference Devices (SQUID). In addition to the SQUID devices, low-noise biasing and amplification are needed. These last functions can be obtained by using BiCMOS SiGe technology in an Application Specific Integrated Circuit (ASIC). ASIC technology allows integration of highly optimised circuits specifically designed for a unique application. Moreover, we could reach very low-noise and wide band amplification using SiGe bipolar transistor either at room or cryogenic temperatures (Cressler in J Phys IV 04(C6):C6-101, 1994. https://doi.org/10.1051/jp4:1994616). This paper discusses the use of SiGe integrated circuits for SQUID/TES readout and gives an update of the last developments dedicated to the QUBIC telescope and to the X-IFU instrument. Both ASIC called SQmux128 and AwaXe are described showing the interest of such SiGe technology for SQUID multiplexer controls.

Integrated optical circuit engineering IV; Proceedings of the Meeting, Cambridge, MA, Sept. 16, 17, 1986

NASA Astrophysics Data System (ADS)

Mentzer, Mark A.; Sriram, S.

The design and implementation of integrated optical circuits are discussed in reviews and reports. Topics addressed include lithium niobate devices, silicon integrated optics, waveguide phenomena, coupling considerations, processing technology, nonlinear guided-wave optics, integrated optics for fiber systems, and systems considerations and applications. Also included are eight papers and a panel discussion from an SPIE conference on the processing of guided-wave optoelectronic materials (held in Los Angeles, CA, on January 21-22, 1986).

Sandia National Laboratories: Physical, Chemical, and Nano Sciences

Science.gov Websites

Robotics R&D 100 Awards Laboratory Directed Research & Development Technology Deployment Centers Honey I shrunk the circuit CINT Virtual Tour Center for Integrated Nanotechnologies Honey I shrunk the circuit Ion Beam Lab Virtual Tour: Coming Soon! Honey I shrunk the circuit CINT 10 Year Anniversary Video

Control technology for integrated circuit fabrication at Micro-Circuit Engineering, Incorporated, West Palm Beach, Florida

NASA Astrophysics Data System (ADS)

Mihlan, G. I.; Mitchell, R. I.; Smith, R. K.

1984-07-01

A survey to assess control technology for integrated circuit fabrication was conducted. Engineering controls included local and general exhaust ventilation, shielding, and personal protective equipment. Devices or work stations that contained toxic materials that were potentially dangerous were controlled by local exhaust ventilation. Less hazardous areas were controlled by general exhaust ventilation. Process isolation was used in the plasma etching, low pressure chemical vapor deposition, and metallization operations. Shielding was used in ion implantation units to control X-ray emissions, in contact mask alignes to limit ultraviolet (UV) emissions, and in plasma etching units to control radiofrequency and UV emissions. Most operations were automated. Use of personal protective equipment varied by job function.

Disposable photonic integrated circuits for evanescent wave sensors by ultra-high volume roll-to-roll method.

PubMed

Aikio, Sanna; Hiltunen, Jussi; Hiitola-Keinänen, Johanna; Hiltunen, Marianne; Kontturi, Ville; Siitonen, Samuli; Puustinen, Jarkko; Karioja, Pentti

2016-02-08

Flexible photonic integrated circuit technology is an emerging field expanding the usage possibilities of photonics, particularly in sensor applications, by enabling the realization of conformable devices and introduction of new alternative production methods. Here, we demonstrate that disposable polymeric photonic integrated circuit devices can be produced in lengths of hundreds of meters by ultra-high volume roll-to-roll methods on a flexible carrier. Attenuation properties of hundreds of individual devices were measured confirming that waveguides with good and repeatable performance were fabricated. We also demonstrate the applicability of the devices for the evanescent wave sensing of ambient refractive index. The production of integrated photonic devices using ultra-high volume fabrication, in a similar manner as paper is produced, may inherently expand methods of manufacturing low-cost disposable photonic integrated circuits for a wide range of sensor applications.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

InP-based three-dimensional photonic integrated circuits

NASA Astrophysics Data System (ADS)

Tsou, Diana; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volumes require high data communication bandwidth over longer distances than short wavelength (850 nm) multi-mode fiber systems can provide. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low cost, high-speed laser modules at 1310 and 1550 nm wavelengths are required. The great success of GaAs 850 nm VCSELs for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with available intrinsic materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits, which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits (PICs) have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform for fabricating InP-based photonic integrated circuits compatible with surface-emitting laser technology. Employing InP transparency at 1310 and 1550 nm wavelengths, we have created 3-D photonic integrated circuits (PICs) by utilizing light beams in both surface normal and in-plane directions within the InP-based structure. This additional beam routing flexibility allows significant size reduction and process simplification without sacrificing device performance. This innovative 3-D PIC technology platform can be easily extended to create surface-emitting lasers integrated with power monitoring detectors, micro-lenses, external modulators, amplifiers, and other passive and active components. Such added functionality can produce cost--effective solutions for the highest-end laser transmitters required for datacom and short range telecom networks, as well as fiber channels and other cost and performance sensitive applications. We present results for 1310 nm photonic IC surface-emitting laser transmitters operating at 2.5 Gbps without active thermal electric cooling.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

PubMed

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator.

PubMed

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-07-04

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing.

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator

PubMed Central

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-01-01

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing. PMID:24993440

Concepts for on-board satellite image registration. Volume 3: Impact of VLSI/VHSIC on satellite on-board signal processing

NASA Technical Reports Server (NTRS)

Aanstoos, J. V.; Snyder, W. E.

1981-01-01

Anticipated major advances in integrated circuit technology in the near future are described as well as their impact on satellite onboard signal processing systems. Dramatic improvements in chip density, speed, power consumption, and system reliability are expected from very large scale integration. Improvements are expected from very large scale integration enable more intelligence to be placed on remote sensing platforms in space, meeting the goals of NASA's information adaptive system concept, a major component of the NASA End-to-End Data System program. A forecast of VLSI technological advances is presented, including a description of the Defense Department's very high speed integrated circuit program, a seven-year research and development effort.

Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

2016-11-01

Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

Cross-guide Moreno directional coupler in empty substrate integrated waveguide

NASA Astrophysics Data System (ADS)

Miralles, E.; Belenguer, A.; Esteban, H.; Boria, V.

2017-05-01

Substrate integrated waveguides (SIWs) combine the advantages of rectangular waveguides (low losses) and planar circuits (low cost and low profile). Empty substrate integrated waveguide (ESIW) has been proposed as a novel configuration in SIWs recently. This technology significantly reduces the losses of conventional SIW by removing its inner dielectric. The cross-guide directional coupler is a well-known low-profile design for having a broadband waveguide coupler. In this paper a cross-guide coupler with ESIW technique is proposed. In such a manner, the device can be integrated with microwave circuits and other printed circuit board components. It is the first time that a cross-guide coupler is implemented in ESIW technology. The designed, fabricated, and measured device presents good results as a matter of insertion loss of 1 dB (including transitions), reflection under 20 dB, coupling between 19.5 and 21.5 dB, and directivity higher than 15 dB over targeted frequency range from 12.4 GHz to 18 GHz. The coupler implemented in ESIW improves the directivity when compared to similar solutions in other empty substrate integrated waveguide solutions.

A 40 GHz fully integrated circuit with a vector network analyzer and a coplanar-line-based detection area for circulating tumor cell analysis using 65 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nakanishi, Taiki; Matsunaga, Maya; Kobayashi, Atsuki; Nakazato, Kazuo; Niitsu, Kiichi

2018-03-01

A 40-GHz fully integrated CMOS-based circuit for circulating tumor cells (CTC) analysis, consisting of an on-chip vector network analyzer (VNA) and a highly sensitive coplanar-line-based detection area is presented in this paper. In this work, we introduce a fully integrated architecture that eliminates unwanted parasitic effects. The proposed analyzer was designed using 65 nm CMOS technology, and SPICE and MWS simulations were used to validate its operation. The simulation confirmed that the proposed circuit can measure S-parameter shifts resulting from the addition of various types of tumor cells to the detection area, the data of which are provided in a previous study: the |S 21| values for HepG2, A549, and HEC-1-A cells are -0.683, -0.580, and -0.623 dB, respectively. Additionally, the measurement demonstrated an S-parameters reduction of -25.7% when a silicone resin was put on the circuit. Hence, the proposed system is expected to contribute to cancer diagnosis.

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith, Roger; Ferrier, Terry; Krasowski, Michael J.;

Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

Very high speed integrated circuits - Into the second generation. V - The issues of standardization and technology insertion

NASA Astrophysics Data System (ADS)

Martin, J.

1982-04-01

It is shown that the fulfillment of very high speed integrated circuit (VHSIC) device development goals entails the restructuring of military electronics acquisition policy, standardization which produces the maximum number of systems and subsystems by means of the minimum number of flexible, broad-purpose, high-power semiconductors, and especially the standardization of bus structures incorporating a priorization system. It is expected that the Design Specification Handbook currently under preparation by the VHSIC program office of the DOD will make the design of such systems a task whose complexity is comparable to that of present integrated circuit electronics.

An X-Band SOS Resistive Gate-Insulator-Semiconductor /RIS/ switch

NASA Astrophysics Data System (ADS)

Kwok, S. P.

1980-02-01

The new X-Band Resistive Gate-Insulator-Semiconductor (RIS) switch has been fabricated on silicon-on-sapphire, and its equivalent circuit model characterized. An RIS SPST switch with 20-dB on/off isolation, 1.2-dB insertion loss, and power handling capacity in excess of 20-W peak has been achieved at X band. The device switching time is on the order of 600 ns, and it requires negligible control holding current in both on and off states. The device is compatible with monolithic integrated-circuit technology and thus is suitable for integration into low-cost monolithic phase shifters or other microwave integrated circuits.

Laboratory experiments in integrated circuit fabrication

NASA Technical Reports Server (NTRS)

Jenkins, Thomas J.; Kolesar, Edward S.

1993-01-01

The objectives of the experiment are fourfold: to provide practical experience implementing the fundamental processes and technology associated with the science and art of integrated circuit (IC) fabrication; to afford the opportunity for the student to apply the theory associated with IC fabrication and semiconductor device operation; to motivate the student to exercise engineering decisions associated with fabricating integrated circuits; and to complement the theory of n-channel MOS and diffused devices that are presented in the classroom by actually fabricating and testing them. Therefore, a balance between theory and practice can be realized in the education of young engineers, whose education is often criticized as lacking sufficient design and practical content.

Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

NASA Technical Reports Server (NTRS)

Alt, Shannon

2016-01-01

Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

PubMed

Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

2015-08-12

Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

Capability approval programme for Microwave Hybrid Integrated Circuits (MHICS)

NASA Astrophysics Data System (ADS)

1990-11-01

The general requirements for capability approval of a manufacturing line for Microwave Hybrid Integrated Circuits (MHICs) are defined. ESA approval mandate will be exercized upon conclusion of the evaluation phase and at the end of the program. Before the evaluation phase can commence, the manufacturer must define the capability approval domain by specifying the processes, materials and technology for which approval is sought.

JPRS Report: Science & Technology - Europe.

DTIC Science & Technology

1992-12-21

in the aero- nautical industry—through the use of hybrids, ASICs [application-specific integrated circuits ], etc. "The system will also have an... Module ], the cylinder-shaped pressurized cabin that can be firmly attached to the international space station), which is to be launched in 1999...34] [Excerpt] Two hundred scientists and $1 billion to design the chip of the future, an integrated circuit (IC) giving microcomputers power

Magnetophoretic circuits for digital control of single particles and cells

NASA Astrophysics Data System (ADS)

Lim, Byeonghwa; Reddy, Venu; Hu, Xinghao; Kim, Kunwoo; Jadhav, Mital; Abedini-Nassab, Roozbeh; Noh, Young-Woock; Lim, Yong Taik; Yellen, Benjamin B.; Kim, Cheolgi

2014-05-01

The ability to manipulate small fluid droplets, colloidal particles and single cells with the precision and parallelization of modern-day computer hardware has profound applications for biochemical detection, gene sequencing, chemical synthesis and highly parallel analysis of single cells. Drawing inspiration from general circuit theory and magnetic bubble technology, here we demonstrate a class of integrated circuits for executing sequential and parallel, timed operations on an ensemble of single particles and cells. The integrated circuits are constructed from lithographically defined, overlaid patterns of magnetic film and current lines. The magnetic patterns passively control particles similar to electrical conductors, diodes and capacitors. The current lines actively switch particles between different tracks similar to gated electrical transistors. When combined into arrays and driven by a rotating magnetic field clock, these integrated circuits have general multiplexing properties and enable the precise control of magnetizable objects.

Readout circuit with novel background suppression for long wavelength infrared focal plane arrays

NASA Astrophysics Data System (ADS)

Xie, L.; Xia, X. J.; Zhou, Y. F.; Wen, Y.; Sun, W. F.; Shi, L. X.

2011-02-01

In this article, a novel pixel readout circuit using a switched-capacitor integrator mode background suppression technique is presented for long wavelength infrared focal plane arrays. This circuit can improve dynamic range and signal-to-noise ratio by suppressing the large background current during integration. Compared with other background suppression techniques, the new background suppression technique is less sensitive to the process mismatch and has no additional shot noise. The proposed circuit is theoretically analysed and simulated while taking into account the non-ideal characteristics. The result shows that the background suppression non-uniformity is ultra-low even for a large process mismatch. The background suppression non-uniformity of the proposed circuit can also remain very small with technology scaling.

Optical printed circuit board (O-PCB) and VLSI photonic integrated circuits: visions, challenges, and progresses

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Noh, H. S.; Kim, K. H.; Song, S. H.

2006-09-01

A collective overview and review is presented on the original work conducted on the theory, design, fabrication, and in-tegration of micro/nano-scale optical wires and photonic devices for applications in a newly-conceived photonic systems called "optical printed circuit board" (O-PCBs) and "VLSI photonic integrated circuits" (VLSI-PIC). These are aimed for compact, high-speed, multi-functional, intelligent, light-weight, low-energy and environmentally friendly, low-cost, and high-volume applications to complement or surpass the capabilities of electrical PCBs (E-PCBs) and/or VLSI electronic integrated circuit (VLSI-IC) systems. These consist of 2-dimensional or 3-dimensional planar arrays of micro/nano-optical wires and circuits to perform the functions of all-optical sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards or substrates. The integrated optical devices include micro/nano-scale waveguides, lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices, made of polymer, silicon and other semiconductor materials. For VLSI photonic integration, photonic crystals and plasmonic structures have been used. Scientific and technological issues concerning the processes of miniaturization, interconnection and integration of these systems as applicable to board-to-board, chip-to-chip, and intra-chip integration, are discussed along with applications for future computers, telecommunications, and sensor-systems. Visions and challenges toward these goals are also discussed.

Biomedical Diagnostics Enabled by Integrated Organic and Printed Electronics.

PubMed

Ahmadraji, Termeh; Gonzalez-Macia, Laura; Ritvonen, Tapio; Willert, Andreas; Ylimaula, Satu; Donaghy, David; Tuurala, Saara; Suhonen, Mika; Smart, Dave; Morrin, Aoife; Efremov, Vitaly; Baumann, Reinhard R; Raja, Munira; Kemppainen, Antti; Killard, Anthony J

2017-07-18

Organic and printed electronics integration has the potential to revolutionize many technologies, including biomedical diagnostics. This work demonstrates the successful integration of multiple printed electronic functionalities into a single device capable of the measurement of hydrogen peroxide and total cholesterol. The single-use device employed printed electrochemical sensors for hydrogen peroxide electroreduction integrated with printed electrochromic display and battery. The system was driven by a conventional electronic circuit designed to illustrate the complete integration of silicon integrated circuits via pick and place or using organic electronic circuits. The device was capable of measuring 8 μL samples of both hydrogen peroxide (0-5 mM, 2.72 × 10 -6 A·mM -1 ) and total cholesterol in serum from 0 to 9 mM (1.34 × 10 -8 A·mM -1 , r 2 = 0.99, RSD < 10%, n = 3), and the result was output on a semiquantitative linear bar display. The device could operate for 10 min via a printed battery, and display the result for many hours or days. A mobile phone "app" was also capable of reading the test result and transmitting this to a remote health care provider. Such a technology could allow improved management of conditions such as hypercholesterolemia.

Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

PubMed

Hasan, Mehedi; Hall, Trevor

2015-11-01

A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

Multijunction high voltage concentrator solar cells

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C.; Chai, A.-T.

1981-01-01

The standard integrated circuit technology has been developed to design and fabricate new innovative planar multi-junction solar cell chips for concentrated sunlight applications. This 1 cm x 1 cm cell consisted of several voltage generating regions called unit cells which were internally connected in series within a single chip resulting in high open circuit voltages. Typical open-circuit voltages of 3.6 V and short-circuit currents of 90 ma were obtained at 80 AM1 suns. A dramatic increase in both short circuit current and open circuit voltage with increased light levels was observed.

Empty substrate integrated waveguide technology for E plane high-frequency and high-performance circuits

NASA Astrophysics Data System (ADS)

Belenguer, Angel; Cano, Juan Luis; Esteban, Héctor; Artal, Eduardo; Boria, Vicente E.

2017-01-01

Substrate integrated circuits (SIC) have attracted much attention in the last years because of their great potential of low cost, easy manufacturing, integration in a circuit board, and higher-quality factor than planar circuits. A first suite of SIC where the waves propagate through dielectric have been first developed, based on the well-known substrate integrated waveguide (SIW) and related technological implementations. One step further has been made with a new suite of empty substrate integrated waveguides, where the waves propagate through air, thus reducing the associated losses. This is the case of the empty substrate integrated waveguide (ESIW) or the air-filled substrate integrated waveguide (air-filled SIW). However, all these SIC are H plane structures, so classical H plane solutions in rectangular waveguides have already been mapped to most of these new SIC. In this paper a novel E plane empty substrate integrated waveguide (ESIW-E) is presented. This structure allows to easily map classical E plane solutions in rectangular waveguide to this new substrate integrated solution. It is similar to the ESIW, although more layers are needed to build the structure. A wideband transition (covering the frequency range between 33 GHz and 50 GHz) from microstrip to ESIW-E is designed and manufactured. Measurements are successfully compared with simulation, proving the validity of this new SIC. A broadband high-frequency phase shifter (for operation from 35 GHz to 47 GHz) is successfully implemented in ESIW-E, thus proving the good performance of this new SIC in a practical application.

New ultraportable display technology and applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Lewis, Nancy D.

1998-08-01

MicroDisplay devices are based on a combination of technologies rooted in the extreme integration capability of conventionally fabricated CMOS active-matrix liquid crystal display substrates. Customized diffraction grating and optical distortion correction technology for lens-system compensation allow the elimination of many lenses and systems-level components. The MicroDisplay Corporation's miniature integrated information display technology is rapidly leading to many new defense and commercial applications. There are no moving parts in MicroDisplay substrates, and the fabrication of the color generating gratings, already part of the CMOS circuit fabrication process, is effectively cost and manufacturing process-free. The entire suite of the MicroDisplay Corporation's technologies was devised to create a line of application- specific integrated circuit single-chip display systems with integrated computing, memory, and communication circuitry. Next-generation portable communication, computer, and consumer electronic devices such as truly portable monitor and TV projectors, eyeglass and head mounted displays, pagers and Personal Communication Services hand-sets, and wristwatch-mounted video phones are among the may target commercial markets for MicroDisplay technology. Defense applications range from Maintenance and Repair support, to night-vision systems, to portable projectors for mobile command and control centers.

RF to millimeter wave integration and module technologies

NASA Astrophysics Data System (ADS)

Vähä-Heikkilä, T.

2015-04-01

Radio Frequency (RF) consumer applications have boosted silicon integrated circuits (IC) and corresponding technologies. More and more functions are integrated to ICs and their performance is also increasing. However, RF front-end modules with filters and switches as well as antennas still need other way of integration. This paper focuses to RF front-end module and antenna developments as well as to the integration of millimeter wave radios. VTT Technical Research Centre of Finland has developed both Low Temperature Co-fired Ceramics (LTCC) and Integrated Passive Devices (IPD) integration platforms for RF and millimeter wave integrated modules. In addition to in-house technologies, VTT is using module and component technologies from other commercial sources.

The Quantum Leap in Special Education: New Information and Communication Technologies. Their Impact upon Educational Opportunities for Disabled People, Focussing on How Integration in the Ordinary Educational System Can Be Facilitated. Draft Document.

ERIC Educational Resources Information Center

Kristiansen, Rolf

This paper suggests means of merging educational ideas with new information and communication technologies to aid individuals with disabilities. New technologies discussed include microtechnology and integrated circuits, high speed processing and retrieval of information, and light-weight equipment, among others. New technologies can be used as…

Report on phase 1 of the Microprocessor Seminar. [and associated large scale integration

NASA Technical Reports Server (NTRS)

1977-01-01

Proceedings of a seminar on microprocessors and associated large scale integrated (LSI) circuits are presented. The potential for commonality of device requirements, candidate processes and mechanisms for qualifying candidate LSI technologies for high reliability applications, and specifications for testing and testability were among the topics discussed. Various programs and tentative plans of the participating organizations in the development of high reliability LSI circuits are given.

Microwave processed NiMg ferrite: Studies on structural and magnetic properties

NASA Astrophysics Data System (ADS)

Chandra Babu Naidu, K.; Madhuri, W.

2016-12-01

Ferrites are magnetic semiconductors realizing an important role in electrical and electronic circuits where electrical and magnetic property coupling is required. Though ferrite materials are known for a long time, there is a large scope in the improvement of their properties (vice sintering and frequency dependence of electrical and magnetic properties) with the current technological trends. Forth coming technology is aimed at miniaturization and smart gadgets, electrical components like inductors and transformers cannot be included in integrated circuits. These components are incorporated into the circuit as surface mount devices whose fabrication involves low temperature co-firing of ceramics and microwave monolithic integrated circuits technologies. These technologies demand low temperature sinter-ability of ferrites. This article presents low temperature microwave sintered Ni-Mg ferrites of general chemical formula Ni1-xMgxFe2O4 (x=0, 0.2, 0.4, 0.5, 0.6, 0.8, 1) for potential applications as transformer core materials. The series of ferrites are characterized using X-ray diffractometer, scanning electron microscopy, Fourier transform infrared and vibrating sample magnetometer for investigating structural, morphological and magnetic properties respectively. The initial permeability is studied with magnesium content, temperature and frequency in the temperature range of 308 K-873 K and 42 Hz-5 MHz.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

NASA Technical Reports Server (NTRS)

Pavlidis, Dimitris

1991-01-01

The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

NASA Astrophysics Data System (ADS)

Pavlidis, Dimitris

1991-02-01

The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

Thin glass based packaging and photonic single-mode waveguide integration by ion-exchange technology on board and module level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Lang, Günter; Schröder, Henning

2011-01-01

The proposed novel packaging approach merges micro-system packaging and glass integrated optics. It provides 3D optical single-mode intra system links to bridge the gap between novel photonic integrated circuits and the glass fibers for inter system interconnects. We introduce our hybrid 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip links. Optical mirrors and lenses provide optical mode matching for photonic IC assemblies and optical fiber interconnects. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties as reviewed in the paper. That makes it perfect for micro-system packaging. The adopted planar waveguide process based on ion-exchange technology is capable for high-volume manufacturing. This ion-exchange process and the optical propagation are described in detail for thin glass substrates. An extensive characterization of all basic circuit elements like straight and curved waveguides, couplers and crosses proves the low attenuation of the optical circuit elements.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Gravitational Influences on the Growth of Polydiacetylene Films by Ultraviolet Solution Polymerization

NASA Technical Reports Server (NTRS)

Frazier, Donald O.

2000-01-01

Technically, the field of integrated optics using organic/polymer materials as a new means of information processing, has emerged as of vital importance to optical computers, optical switching, optical communications, the defense industry, etc. The goal is to replace conventional electronic integrated circuits and wires by equivalent miniaturized optical integrated circuits and fibers, offering larger bandwidths, more compactness and reliability, immunity to electromagnetic interference and less cost. From the Code E perspective, this research area represents an opportunity to marry "front-line" education in science and technology with national scientific and technological interests while maximizing human resources utilization. This can be achieved by the development of untapped resources for scientific research - such as minorities, women, and universities traditionally uninvolved in scientific research.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip

PubMed Central

Schuck, C.; Guo, X.; Fan, L.; Ma, X.; Poot, M.; Tang, H. X.

2016-01-01

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips. PMID:26792424

Recent progress in low-temperature-process monolithic three dimension technology

NASA Astrophysics Data System (ADS)

Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Shen, Chang-Hong; Shieh, Jia-Min; Yeh, Wen-Kuan; Wu, Meng-Chyi

2018-04-01

Monolithic three-dimension (3D) integration is an ultimate alternative method of fabricating high density, high performance, and multi-functional integrated circuits. It offers the promise of being a new approach to increase system performance. How to manage the thermal impact of multi-tiered processes, such as dopant activation, source/drain silicidation, and channel formation, and to prevent the degradation of pre-existing devices/circuits become key challenges. In this paper, we provide updates on several important monolithic 3D works, particularly in sequentially stackable channels, and our recent achievements in monolithic 3D integrated circuit (3D-IC). These results indicate that the advanced 3D architecture with novel design tools enables ultrahigh-density stackable circuits to have superior performance and low power consumption for future artificial intelligence (AI) and internet of things (IoTs) application.

Fully 3D-Integrated Pixel Detectors for X-Rays

DOE PAGES

Deptuch, Grzegorz W.; Gabriella, Carini; Enquist, Paul; ...

2016-01-01

The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter through-silicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn–Pb balls placed on a 320-μm pitch,more » yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. We successful completed the 3-D integration and have reported here. Additionally, all pixels in the matrix of 64 × 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e - rms and a conversion gain of 69.5 μV/e - with 2.6 e - rms and 2.7 μV/e - rms pixel-to-pixel variations, respectively, were measured.« less

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

NASA Technical Reports Server (NTRS)

Eldin, A. G.

1991-01-01

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

An adjustable RF tuning element for microwave, millimeter wave, and submillimeter wave integrated circuits

NASA Technical Reports Server (NTRS)

Lubecke, Victor M.; Mcgrath, William R.; Rutledge, David B.

1991-01-01

Planar RF circuits are used in a wide range of applications from 1 GHz to 300 GHz, including radar, communications, commercial RF test instruments, and remote sensing radiometers. These circuits, however, provide only fixed tuning elements. This lack of adjustability puts severe demands on circuit design procedures and materials parameters. We have developed a novel tuning element which can be incorporated into the design of a planar circuit in order to allow active, post-fabrication tuning by varying the electrical length of a coplanar strip transmission line. It consists of a series of thin plates which can slide in unison along the transmission line, and the size and spacing of the plates are designed to provide a large reflection of RF power over a useful frequency bandwidth. Tests of this structure at 1 GHz to 3 Ghz showed that it produced a reflection coefficient greater than 0.90 over a 20 percent bandwidth. A 2 GHz circuit incorporating this tuning element was also tested to demonstrate practical tuning ranges. This structure can be fabricated for frequencies as high as 1000 GHz using existing micromachining techniques. Many commercial applications can benefit from this micromechanical RF tuning element, as it will aid in extending microwave integrated circuit technology into the high millimeter wave and submillimeter wave bands by easing constraints on circuit technology.

Amplifier arrays for CMB polarization

NASA Technical Reports Server (NTRS)

Gaier, Todd; Lawrence, Charles R.; Seiffert, Michael D.; Wells, Mary M.; Kangaslahti, Pekka; Dawson, Douglas

2003-01-01

Cryogenic low noise amplifier technology has been successfully used in the study of the cosmic microwave background (CMB). MMIC (Monolithic Millimeter wave Integrated Circuit) technology makes the mass production of coherent detection receivers feasible.

Transforming Ordinary Buildings into Smart Buildings via Low-Cost, Self-Powering Wireless Sensors & Sensor Networks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, Philip

The research objective of this project is to design and demonstrate a low-cost, compact, easy-to-deploy, maintenance-free sensor node technology, and a network of such sensors, which enable the monitoring of multiphysical parameters and can transform today’s ordinary buildings into smart buildings with environmental awareness. We develop the sensor node and network via engineering and integration of existing technologies, including high-efficiency mechanical energy harvesting, and ultralow-power integrated circuits (ICs) for sensing and wireless communication. Through integration and innovative power management via specifically designed low-power control circuits for wireless sensing applications, and tailoring energy-harvesting components to indoor applications, the target products willmore » have smaller volume, higher efficiency, and much lower cost (in both manufacturing and maintenance) than the baseline technology. Our development and commercialization objective is to create prototypes for our target products under the CWRU-Intwine collaboration.« less

Millimeter-wave technology advances since 1985 and future trends

NASA Astrophysics Data System (ADS)

Meinel, Holger H.

1991-05-01

The author focuses on finline or E-plane technology. Several examples, including AVES, a 61.5-GHz radar sensor for traffic data acquisition, are included. Monolithic integrated 60- and 94-GHz receiver circuits composed of a mixer and IF amplifier in compatible FET technology on GaAs are presented to show the state of the art in this area. A promising approach to the use of silicon technology for monolithic millimeter-wave integrated circuits, called SIMMWIC, is described as well. As millimeter-wave technology has matured, increased interest has been generated for very specific applications: (1) commercial automotive applications such as intelligent cruise control and enhanced vision have attracted great interest, calling for a low-cost design approach; and (2) an almost classical application of millimeter-wave techniques is the field of radar seekers, e.g., for intelligent ammunitions, calling for high performance under extreme environmental conditions. Two examples fulfilling these requirements are described.

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

PubMed

Shen, Wen-Wei; Chen, Kuan-Neng

2017-12-01

3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

System perspectives for mobile platform design in m-Health

NASA Astrophysics Data System (ADS)

Roveda, Janet M.; Fink, Wolfgang

2016-05-01

Advances in integrated circuit technologies have led to the integration of medical sensor front ends with data processing circuits, i.e., mobile platform design for wearable sensors. We discuss design methodologies for wearable sensor nodes and their applications in m-Health. From the user perspective, flexibility, comfort, appearance, fashion, ease-of-use, and visibility are key form factors. From the technology development point of view, high accuracy, low power consumption, and high signal to noise ratio are desirable features. From the embedded software design standpoint, real time data analysis algorithms, application and database interfaces are the critical components to create successful wearable sensor-based products.

Integrated Optical Circuit Engineering

NASA Astrophysics Data System (ADS)

Sriram, S.

1985-04-01

Implementation of single-mode optical fiber systems depends largely on the availability of integrated optical components for such functions as switching, multiplexing, and modulation. The technology of integrated optics is maturing very rapidly, and its growth justifies the optimism that now exists in the optical community.

SiC Integrated Circuits for Power Device Drivers Able to Operate in Harsh Environments

NASA Astrophysics Data System (ADS)

Godignon, P.; Alexandru, M.; Banu, V.; Montserrat, J.; Jorda, X.; Vellvehi, M.; Schmidt, B.; Michel, P.; Millan, J.

2014-08-01

The currently developed SiC electronic devices are more robust to high temperature operation and radiation exposure damage than correspondingly rated Si ones. In order to integrate the existent SiC high power and high temperature electronics into more complex systems, a SiC integrated circuit (IC) technology capable of operation at temperatures substantially above the conventional ones is required. Therefore, this paper is a step towards the development of ICs-control electronics that have to attend the harsh environment power applications. Concretely, we present the development of SiC MESFET-based digital circuitry, able to integrate gate driver for SiC power devices. Furthermore, a planar lateral power MESFET is developed with the aim of its co-integration on the same chip with the previously mentioned SiC digital ICs technology. And finally, experimental results on SiC Schottky-gated devices irradiated with protons and electrons are presented. This development is based on the Tungsten-Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

Potential for integrated optical circuits in advanced aircraft with fiber optic control and monitoring systems

NASA Astrophysics Data System (ADS)

Baumbick, Robert J.

1991-02-01

Fiber optic technology is expected to be used in future advanced weapons platforms as well as commercial aerospace applications. Fiber optic waveguides will be used to transmit noise free high speed data between a multitude of computers as well as audio and video information to the flight crew. Passive optical sensors connected to control computers with optical fiber interconnects will serve both control and monitoring functions. Implementation of fiber optic technology has already begun. Both the military and NASA have several programs in place. A cooperative program called FOCSI (Fiber Optic Control System Integration) between NASA Lewis and the NAVY to build environmentally test and flight demonstrate sensor systems for propul sion and flight control systems is currently underway. Integrated Optical Circuits (IOC''s) are also being given serious consideration for use in advanced aircraft sys tems. IOC''s will result in miniaturization and localization of components to gener ate detect optical signals and process them for use by the control computers. In some complex systems IOC''s may be required to perform calculations optically if the technology is ready replacing some of the electronic systems used today. IOC''s are attractive because they will result in rugged components capable of withstanding severe environments in advanced aerospace vehicles. Manufacturing technology devel oped for microelectronic integrated circuits applied to IOC''s will result in cost effective manufacturing. This paper reviews the current FOCSI program and describes the role of IOC''s in FOCSI applications.

Integration and manufacture of multifunctional planar lightwave circuits

NASA Astrophysics Data System (ADS)

Lipscomb, George F.; Ticknor, Anthony J.; Stiller, Marc A.; Chen, Wenjie; Schroeter, Paul

2001-11-01

The demands of exponentially growing Internet traffic, coupled with the advent of Dense Wavelength Division Multiplexing (DWDM) fiber optic systems to meet those demands, have triggered a revolution in the telecommunications industry. This dramatic change has been built upon, and has driven, improvements in fiber optic component technology. The next generation of systems for the all optical network will require higher performance components coupled with dramatically lower costs. One approach to achieve significantly lower costs per function is to employ Planar Lightwave Circuits (PLC) to integrate multiple optical functions in a single package. PLCs are optical circuits laid out on a silicon wafer, and are made using tools and techniques developed to extremely high levels by the semi-conductor industry. In this way multiple components can be fabricated and interconnected at once, significantly reducing both the manufacturing and the packaging/assembly costs. Currently, the predominant commercial application of PLC technology is arrayed-waveguide gratings (AWG's) for multiplexing and demultiplexing multiple wavelength channels in a DWDM system. Although this is generally perceived as a single-function device, it can be performing the function of more than 100 discrete fiber-optic components and already represents a considerable degree of integration. Furthermore, programmable functions such as variable-optical attenuators (VOAs) and switches made with compatible PLC technology are now moving into commercial production. In this paper, we present results on the integration of active and passive functions together using PLC technology, e.g. a 40 channel AWG multiplexer with 40 individually controllable VOAs.

Integrated devices for quantum information and quantum simulation with polarization encoded qubits

NASA Astrophysics Data System (ADS)

Sansoni, Linda; Sciarrino, Fabio; Mataloni, Paolo; Crespi, Andrea; Ramponi, Roberta; Osellame, Roberto

2012-06-01

The ability to manipulate quantum states of light by integrated devices may open new perspectives both for fundamental tests of quantum mechanics and for novel technological applications. The technology for handling polarization-encoded qubits, the most commonly adopted approach, was still missing in quantum optical circuits until the ultrafast laser writing (ULW) technique was adopted for the first time to realize integrated devices able to support and manipulate polarization encoded qubits.1 Thanks to this method, polarization dependent and independent devices can be realized. In particular the maintenance of polarization entanglement was demonstrated in a balanced polarization independent integrated beam splitter1 and an integrated CNOT gate for polarization qubits was realized and carachterized.2 We also exploited integrated optics for quantum simulation tasks: by adopting the ULW technique an integrated quantum walk circuit was realized3 and, for the first time, we investigate how the particle statistics, either bosonic or fermionic, influences a two-particle discrete quantum walk. Such experiment has been realized by adopting two-photon entangled states and an array of integrated symmetric directional couplers. The polarization entanglement was exploited to simulate the bunching-antibunching feature of non interacting bosons and fermions. To this scope a novel three-dimensional geometry for the waveguide circuit is introduced, which allows accurate polarization independent behaviour, maintaining a remarkable control on both phase and balancement of the directional couplers.

Progress in MMIC technology for satellite communications

NASA Technical Reports Server (NTRS)

Haugland, Edward J.; Leonard, Regis F.

1987-01-01

NASA's Lewis Research Center is actively involved in the development of monolithic microwave and millimeter-wave integrated circuits (MMICs). The approach of the program is to support basic research under grant or in-house, while MMIC development is done under contract, thereby facilitating the transfer of technology to users. Preliminary thrusts of the program have been the extension of technology to higher frequencies (60 GHz), degrees of complexity, and performance (power, efficiency, noise figure) by utilizing novel circuit designs, processes, and materials. A review of the progress made so far is presented.

Computer Instrumentation and the New Tools of Science.

ERIC Educational Resources Information Center

Snyder, H. David

1990-01-01

The impact and uses of new technologies in science teaching are discussed. Included are computers, software, sensors, integrated circuits, computer signal access, and computer interfaces. Uses and advantages of these new technologies are suggested. (CW)

Heavy-ion induced single-event upset in integrated circuits

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.

1991-01-01

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Lead sulfide - Silicon MOSFET infrared focal plane development

NASA Technical Reports Server (NTRS)

Barrett, J. R.; Jhabvala, M. D.

1983-01-01

A process for directly integrating photoconductive lead sulfide (PbS) infrared detector material with silicon MOS integrated circuits has been developed primarily for application in long (greater than 10,000 detector elements) linear arrays for pushbroom scanning applications. The processing technology is based on the conventional PMOS and CMOS technologies with a variation in the metallization. Results and measurements on a fully integrated eight-element multiplexer are shown.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes.

PubMed

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

Intermetallic compounds in 3D integrated circuits technology: a brief review

NASA Astrophysics Data System (ADS)

Annuar, Syahira; Mahmoodian, Reza; Hamdi, Mohd; Tu, King-Ning

2017-12-01

The high performance and downsizing technology of three-dimensional integrated circuits (3D-ICs) for mobile consumer electronic products have gained much attention in the microelectronics industry. This has been driven by the utilization of chip stacking by through-Si-via and solder microbumps. Pb-free solder microbumps are intended to replace conventional Pb-containing solder joints due to the rising awareness of environmental preservation. The use of low-volume solder microbumps has led to crucial constraints that cause several reliability issues, including excessive intermetallic compounds (IMCs) formation and solder microbump embrittlement due to IMCs growth. This article reviews technologies related to 3D-ICs, IMCs formation mechanisms and reliability issues concerning IMCs with Pb-free solder microbumps. Finally, future outlook on the potential growth of research in this area is discussed.

Intermetallic compounds in 3D integrated circuits technology: a brief review.

PubMed

Annuar, Syahira; Mahmoodian, Reza; Hamdi, Mohd; Tu, King-Ning

2017-01-01

The high performance and downsizing technology of three-dimensional integrated circuits (3D-ICs) for mobile consumer electronic products have gained much attention in the microelectronics industry. This has been driven by the utilization of chip stacking by through-Si-via and solder microbumps. Pb-free solder microbumps are intended to replace conventional Pb-containing solder joints due to the rising awareness of environmental preservation. The use of low-volume solder microbumps has led to crucial constraints that cause several reliability issues, including excessive intermetallic compounds (IMCs) formation and solder microbump embrittlement due to IMCs growth. This article reviews technologies related to 3D-ICs, IMCs formation mechanisms and reliability issues concerning IMCs with Pb-free solder microbumps. Finally, future outlook on the potential growth of research in this area is discussed.

The design of high dynamic range ROIC for IRFPAs

NASA Astrophysics Data System (ADS)

Jiang, Dazhao; Liang, Qinghua; Zhang, Qiwen; Chen, Honglei; Ding, Ruijun

2015-10-01

The charge packet readout integrated circuit (ROIC) technology for the IRFPAs is introduced, which can realize that every pixel achieves a very high capacity of the electrons storage, and it also improves the performance of the SNR and reduces the saturation possibility of the pixels. The ROIC for the LWIR requires ability that obtaining high capacity for storing electrons. For the conventional ROIC, the maximum charge capacity is determined by the integration capacitance and the operating voltage, it can achieve a high charge capacity through increasing the area of the integration capacitor or raising the operating voltage. And this paper would introduce a digital method of ROIC that can achieve a very high charge capacity. The circuit architecture of this approach includes the following parts, a preamplifier, a comparator, a counter, and memory arrays. And the maximum charge capacity of the pixel is determined by the counter bits. This new method can achieve a high charge capacity more than 1Ge- every pixel and output the digital signal directly, while that of conventional ROIC is less than 50Me- and output the analog signal from the pixel. In this new circuit, the comparator is a important module, as the integration voltage value need compare with threshold voltage through the comparator all the time during the integration period, and we will discuss the influence of the comparator. This work design the circuit with the CSMC 0.35um CMOS technology, and the simulation use the spectre model.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deptuch, Grzegorz W.; Gabriella, Carini; Enquist, Paul

The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter through-silicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn–Pb balls placed on a 320-μm pitch,more » yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. We successful completed the 3-D integration and have reported here. Additionally, all pixels in the matrix of 64 × 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e - rms and a conversion gain of 69.5 μV/e - with 2.6 e - rms and 2.7 μV/e - rms pixel-to-pixel variations, respectively, were measured.« less

Study of CMOS-SOI Integrated Temperature Sensing Circuits for On-Chip Temperature Monitoring.

PubMed

Malits, Maria; Brouk, Igor; Nemirovsky, Yael

2018-05-19

This paper investigates the concepts, performance and limitations of temperature sensing circuits realized in complementary metal-oxide-semiconductor (CMOS) silicon on insulator (SOI) technology. It is shown that the MOSFET threshold voltage ( V t ) can be used to accurately measure the chip local temperature by using a V t extractor circuit. Furthermore, the circuit's performance is compared to standard circuits used to generate an accurate output current or voltage proportional to the absolute temperature, i.e., proportional-to-absolute temperature (PTAT), in terms of linearity, sensitivity, power consumption, speed, accuracy and calibration needs. It is shown that the V t extractor circuit is a better solution to determine the temperature of low power, analog and mixed-signal designs due to its accuracy, low power consumption and no need for calibration. The circuit has been designed using 1 µm partially depleted (PD) CMOS-SOI technology, and demonstrates a measurement inaccuracy of ±1.5 K across 300 K⁻500 K temperature range while consuming only 30 µW during operation.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

PubMed

Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers

PubMed Central

Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V.

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification. PMID:26798055

Experimental demonstration of distributed feedback semiconductor lasers based on reconstruction-equivalent-chirp technology.

PubMed

Li, Jingsi; Wang, Huan; Chen, Xiangfei; Yin, Zuowei; Shi, Yuechun; Lu, Yanqing; Dai, Yitang; Zhu, Hongliang

2009-03-30

In this paper we report, to the best of our knowledge, the first experimental realization of distributed feedback (DFB) semiconductor lasers based on reconstruction-equivalent-chirp (REC) technology. Lasers with different lasing wavelengths are achieved simultaneously on one chip, which shows a potential for the REC technology in combination with the photonic integrated circuits (PIC) technology to be a possible method for monolithic integration, in that its fabrication is as powerful as electron beam technology and the cost and time-consuming are almost the same as standard holographic technology.

Department of Defense statement on the X-ray Lithography Program to the Research and Development Subcommittee of the House Armed Services Committee of 100th Congress, second session

NASA Astrophysics Data System (ADS)

Maynard, E. D., Jr.

1988-03-01

The Department has a broad and necessarily diverse program in semiconductor science and technology. The three principal goals of that effort are: Reduce the gap between commercial integrated circuit usage and its deployment in military systems, assure a healthy on-shore industrial base to support our defense needs, enhance the producibility of specialized military semiconductor products. The major effort to achieve the first of these objectives is the Very High Speed Integrated Circuits (VHSIC) Program which is nearing completion. The Microwave/millimeter wave Monolithic Integrated Circuit (MIMIC) program has just completed a study program to define the product mix needed to meet military system requirements for radar, electronic warfare, smart weapons and telecommunications. We are bringing together the system requirements of all DoD with the device fabrication and product delivery capabilities of industry in an Infrared Focal Plane Array (IRFPA) program. The goal of the Software Initiative is to enhance our warfighting capability through development of efficient software generation technology and products plus the creation of a technology infusion infrastructure to couple the technology and products to system applications. The X-Ray Lithography Program will begin to establish the industrial base which will be required to sustain U.S. leadership in the semiconductor industry for the late 1990s.

Design of high precision temperature control system for TO packaged LD

NASA Astrophysics Data System (ADS)

Liang, Enji; Luo, Baoke; Zhuang, Bin; He, Zhengquan

2017-10-01

Temperature is an important factor affecting the performance of TO package LD. In order to ensure the safe and stable operation of LD, a temperature control circuit for LD based on PID technology is designed. The MAX1978 and an external PID circuit are used to form a control circuit that drives the thermoelectric cooler (TEC) to achieve control of temperature and the external load can be changed. The system circuit has low power consumption, high integration and high precision,and the circuit can achieve precise control of the LD temperature. Experiment results show that the circuit can achieve effective and stable control of the laser temperature.

Assessment of SOI Devices and Circuits at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik; Hammoud, Ahmad; Patterson, Richard L.

2007-01-01

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

PubMed

Cao, Qing; Kim, Hoon-sik; Pimparkar, Ninad; Kulkarni, Jaydeep P; Wang, Congjun; Shim, Moonsub; Roy, Kaushik; Alam, Muhammad A; Rogers, John A

2008-07-24

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm(2) V(-1) s(-1), subthreshold slopes as low as 140 m V dec(-1), operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 10(5), switching speeds in the kilohertz range even for coarse (approximately 100-microm) device geometries, and good mechanical flexibility-all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

Roadmap evolution: from NTRS to ITRS, from ITRS 2.0 to IRDS

NASA Astrophysics Data System (ADS)

Gargini, Paolo A.

2017-10-01

The semiconductor industry benefitted from roadmap guidance since the mid-60s. The roadmap anticipated and outlined the main needs of the semiconductor industry for years to come and identified future challenges and possible solutions. Making transistor smaller by means of advanced lithographic technologies enabled both increased integration levels and improved IC performance. The roadmap methodology allowed the removal of multiple "red brick walls". The NTRS and the ITRS constituted primarily a "bottom up" approach as standard microprocessors and memories where introduced at a blistering pace barely allowing time for system houses to integrate them in their products. The 1998 ITRS provided the vision that triggered research, development and manufacturing communities to develop a completely new transistor structure in addition to replacing aluminum interconnects with a more advanced technology. The advent of Foundries and Fabless companies transformed the electronics industry into a "top down" driven industry in the past 15 years. The ITRS adjusted to this new ecosystem and morphed into the International Roadmap for Devices and Systems (IRDS) sponsored by IEEE. The IRDS is addressing the requirements and needs of the renewed electronics industry. Furthermore, by the middle of the next decade the ability to layout integrated circuits in a 2D geometry grid will reach fundamental physical limits and the aggressive conversion to 3D architecture for integrated circuit must be pursued across the board as an avenue to continuously increasing transistor count and improving performance. EUV technology is finally approaching the manufacturing stage but with the advent of 3D monolithically integrated heterogeneous circuits approaching in the not-toodistant future should the semiconductor industry concentrate its resources on the next lithographic technology generation in order to enhance resolution or on providing a smooth transition to the new revolutionary 3D architecture of integrated circuits? It is essential for the whole semiconductor industry to come together and make fundamental choices leading to a cooperative and synchronized allocation of adequate resources to produce viable solutions that once introduced in a timely manner into manufacturing will enable the continuation of the growth of the electronic industry at a pace comparable or exceeding historical trends.

Apparatus and methods for packaging integrated circuit chips with antenna modules providing closed electromagnetic environment for integrated antennas

NASA Technical Reports Server (NTRS)

Gaucher, Brian P. (Inventor); Grzyb, Janusz (Inventor); Liu, Duixian (Inventor); Pfeiffer, Ullrich R. (Inventor)

2008-01-01

Apparatus and methods are provided for packaging IC chips together with integrated antenna modules designed to provide a closed EM (electromagnetic) environment for antenna radiators, thereby allowing antennas to be designed independent from the packaging technology.

Communications technology

NASA Astrophysics Data System (ADS)

Sokoloski, Martin M.

1988-09-01

The objective of the Communications Technology Program is to enable data transmission to and from low Earth orbit, geostationary orbit, and solar and deep space missions. This can be achieved by maintaining an effective, balances effort in basic, applied, and demonstration prototype communications technology through work in theory, experimentation, and components. The program consists of three major research and development discipline areas which are: microwave and millimeter wave tube components; solid state monolithic integrated circuit; and free space laser communications components and devices. The research ranges from basic research in surface physics (to study the mechanisms of surface degradation from under high temperature and voltage operating conditions which impacts cathode tube reliability and lifetime) to generic research on the dynamics of electron beams and circuits (for exploitation in various micro- and millimeter wave tube devices). Work is also performed on advanced III-V semiconductor materials and devices for use in monolithic integrated analog circuits (used in adaptive, programmable phased arrays for microwave antenna feeds and receivers) - on the use of electromagnetic theory in antennas and on technology necessary for eventual employment of lasers for free space communications for future low earth, geostationary, and deep space missions requiring high data rates with corresponding directivity and reliability.

Communications technology

NASA Technical Reports Server (NTRS)

Sokoloski, Martin M.

1988-01-01

The objective of the Communications Technology Program is to enable data transmission to and from low Earth orbit, geostationary orbit, and solar and deep space missions. This can be achieved by maintaining an effective, balances effort in basic, applied, and demonstration prototype communications technology through work in theory, experimentation, and components. The program consists of three major research and development discipline areas which are: microwave and millimeter wave tube components; solid state monolithic integrated circuit; and free space laser communications components and devices. The research ranges from basic research in surface physics (to study the mechanisms of surface degradation from under high temperature and voltage operating conditions which impacts cathode tube reliability and lifetime) to generic research on the dynamics of electron beams and circuits (for exploitation in various micro- and millimeter wave tube devices). Work is also performed on advanced III-V semiconductor materials and devices for use in monolithic integrated analog circuits (used in adaptive, programmable phased arrays for microwave antenna feeds and receivers) - on the use of electromagnetic theory in antennas and on technology necessary for eventual employment of lasers for free space communications for future low earth, geostationary, and deep space missions requiring high data rates with corresponding directivity and reliability.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Air Force Research Laboratory Technology Milestones 2010

DTIC Science & Technology

2010-01-01

these self - healing , mixed-signal integrated circuits, or HEALIC, adjust to existing conditions in order to maintain the desired level of...functionality. As part of aiding the DARPA effort to realize this self - healing capability, sensors scientists managed the development of a wideband, 6-18 GHz...technology, with the subsequent demonstration activity presenting the integrated designs containing this self - healing circuitry. The newly-concept

GaAs VLSI for aerospace electronics

NASA Technical Reports Server (NTRS)

Larue, G.; Chan, P.

1990-01-01

Advanced aerospace electronics systems require high-speed, low-power, radiation-hard, digital components for signal processing, control, and communication applications. GaAs VLSI devices provide a number of advantages over silicon devices including higher carrier velocities, ability to integrate with high performance optical devices, and high-resistivity substrates that provide very short gate delays, good isolation, and tolerance to many forms of radiation. However, III-V technologies also have disadvantages, such as lower yield compared to silicon MOS technology. Achieving very large scale integration (VLSI) is particularly important for fast complex systems. At very short gate delays (less than 100 ps), chip-to-chip interconnects severely degrade circuit clock rates. Complex systems, therefore, benefit greatly when as many gates as possible are placed on a single chip. To fully exploit the advantages of GaAs circuits, attention must be focused on achieving high integration levels by reducing power dissipation, reducing the number of devices per logic function, and providing circuit designs that are more tolerant to process and environmental variations. In addition, adequate noise margin must be maintained to ensure a practical yield.

Space Gator: a giant leap for fiber optic sensing

NASA Astrophysics Data System (ADS)

Evenblij, R. S.; Leijtens, J. A. P.

2017-11-01

Fibre Optic Sensing is a rapidly growing application field for Photonics Integrated Circuits (PIC) technology. PIC technology is regarded enabling for required performances and miniaturization of next generation fibre optic sensing instrumentation. So far a number of Application Specific Photonics Integrated Circuits (ASPIC) based interrogator systems have been realized as operational system-on-chip devices. These circuits have shown that all basic building blocks are working and complete interrogator on chip solutions can be produced. Within the Saristu (FP7) project several high reliability solutions for fibre optic sensing in Aeronautics are being developed, combining the specifically required performance aspects for the different sensing applications: damage detection, impact detection, load monitoring and shape sensing (including redundancy aspects and time division features). Further developments based on devices and taking into account specific space requirements (like radiation aspects) will lead to the Space Gator, which is a radiation tolerant highly integrated Fibre Bragg Grating (FBG) interrogator on chip. Once developed and qualified the Space Gator will be a giant leap for fibre optic sensing in future space applications.

Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

NASA Astrophysics Data System (ADS)

Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

2017-05-01

A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

Multilevel photonic modules for millimeter-wave phased-array antennas

NASA Astrophysics Data System (ADS)

Paolella, Arthur C.; Bauerle, Athena; Joshi, Abhay M.; Wright, James G.; Coryell, Louis A.

2000-09-01

Millimeter wave phased array systems have antenna element sizes and spacings similar to MMIC chip dimensions by virtue of the operating wavelength. Designing modules in traditional planar packaing techniques are therefore difficult to implement. An advantageous way to maintain a small module footprint compatible with Ka-Band and high frequency systems is to take advantage of two leading edge technologies, opto- electronic integrated circuits (OEICs) and multilevel packaging technology. Under a Phase II SBIR these technologies are combined to form photonic modules for optically controlled millimeter wave phased array antennas. The proposed module, consisting of an OEIC integrated with a planar antenna array will operate on the 40GHz region. The OEIC consists of an InP based dual-depletion PIN photodetector and distributed amplifier. The multi-level module will be fabricated using an enhanced circuit processing thick film process. Since the modules are batch fabricated using an enhanced circuit processing thick film process. Since the modules are batch fabricated, using standard commercial processes, it has the potential to be low cost while maintaining high performance, impacting both military and commercial communications systems.

Historical Perspective on Technology and Music.

ERIC Educational Resources Information Center

Webster, Peter

2002-01-01

Explores the historical developments in technology that affected music education. Describes the developments in hardware, such as gears and levers, electricity, vacuum tubes, transistors, and integrated circuits. Discusses the changes in computer software from the 1950s to the present. (CMK)

Study of SEM induced current and voltage contrast modes to assess semiconductor reliability

NASA Technical Reports Server (NTRS)

Beall, J. R.

1976-01-01

The purpose of the scanning electron microscopy study was to review the failure history of existing integrated circuit technologies to identify predominant failure mechanisms, and to evaluate the feasibility of their detection using SEM application techniques. The study investigated the effects of E-beam irradiation damage and contamination deposition rates; developed the necessary methods for applying the techniques to the detection of latent defects and weaknesses in integrated circuits; and made recommendations for applying the techniques.

SiGe/Si Monolithically Integrated Amplifier Circuits

NASA Technical Reports Server (NTRS)

Katehi, Linda P. B.; Bhattacharya, Pallab

1998-01-01

With recent advance in the epitaxial growth of silicon-germanium heterojunction, Si/SiGe HBTs with high f(sub max) and f(sub T) have received great attention in MMIC applications. In the past year, technologies for mesa-type Si/SiGe HBTs and other lumped passive components with high resonant frequencies have been developed and well characterized for circuit applications. By integrating the micromachined lumped passive elements into HBT fabrication, multi-stage amplifiers operating at 20 GHz have been designed and fabricated.

High-voltage integrated active quenching circuit for single photon count rate up to 80 Mcounts/s.

PubMed

Acconcia, Giulia; Rech, Ivan; Gulinatti, Angelo; Ghioni, Massimo

2016-08-08

Single photon avalanche diodes (SPADs) have been subject to a fast improvement in recent years. In particular, custom technologies specifically developed to fabricate SPAD devices give the designer the freedom to pursue the best detector performance required by applications. A significant breakthrough in this field is represented by the recent introduction of a red enhanced SPAD (RE-SPAD) technology, capable of attaining a good photon detection efficiency in the near infrared range (e.g. 40% at a wavelength of 800 nm) while maintaining a remarkable timing resolution of about 100ps full width at half maximum. Being planar, the RE-SPAD custom technology opened the way to the development of SPAD arrays particularly suited for demanding applications in the field of life sciences. However, to achieve such excellent performance custom SPAD detectors must be operated with an external active quenching circuit (AQC) designed on purpose. Next steps toward the development of compact and practical multichannel systems will require a new generation of monolithically integrated AQC arrays. In this paper we present a new, fully integrated AQC fabricated in a high-voltage 0.18 µm CMOS technology able to provide quenching pulses up to 50 Volts with fast leading and trailing edges. Although specifically designed for optimal operation of RE-SPAD devices, the new AQC is quite versatile: it can be used with any SPAD detector, regardless its fabrication technology, reaching remarkable count rates up to 80 Mcounts/s and generating a photon detection pulse with a timing jitter as low as 119 ps full width at half maximum. The compact design of our circuit has been specifically laid out to make this IC a suitable building block for monolithically integrated AQC arrays.

Integrated logic circuits using single-atom transistors

PubMed Central

Mol, J. A.; Verduijn, J.; Levine, R. D.; Remacle, F.

2011-01-01

Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal–oxide–semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch. PMID:21808050

Highest integration in microelectronics: Development of digital ASICs for PARS3-LR

NASA Astrophysics Data System (ADS)

Scholler, Peter; Vonlutz, Rainer

Essential electronic system components by PARS3-LR, show high requirements in calculation power, power consumption and reliability, by immediately increasing integration thicknesses. These problems are solved by using integrated circuits, developed by LSI LOGIC, that uses the technical and economic advantages of this leading edge technology.

Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

PubMed Central

Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

2013-01-01

A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

NASA Astrophysics Data System (ADS)

Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

2018-03-01

This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

The integrated design and archive of space-borne signal processing and compression coding

NASA Astrophysics Data System (ADS)

He, Qiang-min; Su, Hao-hang; Wu, Wen-bo

2017-10-01

With the increasing demand of users for the extraction of remote sensing image information, it is very urgent to significantly enhance the whole system's imaging quality and imaging ability by using the integrated design to achieve its compact structure, light quality and higher attitude maneuver ability. At this present stage, the remote sensing camera's video signal processing unit and image compression and coding unit are distributed in different devices. The volume, weight and consumption of these two units is relatively large, which unable to meet the requirements of the high mobility remote sensing camera. This paper according to the high mobility remote sensing camera's technical requirements, designs a kind of space-borne integrated signal processing and compression circuit by researching a variety of technologies, such as the high speed and high density analog-digital mixed PCB design, the embedded DSP technology and the image compression technology based on the special-purpose chips. This circuit lays a solid foundation for the research of the high mobility remote sensing camera.

Intermetallic compounds in 3D integrated circuits technology: a brief review

PubMed Central

Annuar, Syahira; Mahmoodian, Reza; Hamdi, Mohd; Tu, King-Ning

2017-01-01

Abstract The high performance and downsizing technology of three-dimensional integrated circuits (3D-ICs) for mobile consumer electronic products have gained much attention in the microelectronics industry. This has been driven by the utilization of chip stacking by through-Si-via and solder microbumps. Pb-free solder microbumps are intended to replace conventional Pb-containing solder joints due to the rising awareness of environmental preservation. The use of low-volume solder microbumps has led to crucial constraints that cause several reliability issues, including excessive intermetallic compounds (IMCs) formation and solder microbump embrittlement due to IMCs growth. This article reviews technologies related to 3D-ICs, IMCs formation mechanisms and reliability issues concerning IMCs with Pb-free solder microbumps. Finally, future outlook on the potential growth of research in this area is discussed. PMID:29057024

Force-controlled inorganic crystallization lithography.

PubMed

Cheng, Chao-Min; LeDuc, Philip R

2006-09-20

Lithography plays a key role in integrated circuits, optics, information technology, biomedical applications, catalysis, and separation technologies. However, inorganic lithography techniques remain of limited utility for applications outside of the typical foci of integrated circuit manufacturing. In this communication, we have developed a novel stamping method that applies pressure on the upper surface of the stamp to regulate the dewetting process of the inorganic buffer and the evaporation rate of the solvent in this buffer between the substrate and the surface of the stamp. We focused on generating inorganic microstructures with specific locations and also on enabling the ability to pattern gradients during the crystallization of the inorganic salts. This approach utilized a combination of lithography with bottom-up growth and assembly of inorganic crystals. This work has potential applications in a variety of fields, including studying inorganic material patterning and small-scale fabrication technology.

Evaluation of advanced microelectronic fluxless solder-bump contacts for hybrid microcircuits

NASA Technical Reports Server (NTRS)

Mandal, R. P.

1976-01-01

Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.

Common source cascode amplifiers for integrating IR-FPA applications

NASA Technical Reports Server (NTRS)

Woolaway, James T.; Young, Erick T.

1989-01-01

Space based astronomical infrared measurements present stringent performance requirements on the infrared detector arrays and their associated readout circuitry. To evaluate the usefulness of commercial CMOS technology for astronomical readout applications a theoretical and experimental evaluation was performed on source follower and common-source cascode integrating amplifiers. Theoretical analysis indicates that for conditions where the input amplifier integration capacitance is limited by the detectors capacitance the input referred rms noise electrons of each amplifier should be equivalent. For conditions of input gate limited capacitance the source follower should provide lower noise. Measurements of test circuits containing both source follower and common source cascode circuits showed substantially lower input referred noise for the common-source cascode input circuits. Noise measurements yielded 4.8 input referred rms noise electrons for an 8.5 minute integration. The signal and noise gain of the common-source cascode amplifier appears to offer substantial advantages in acheiving predicted noise levels.

Bridging ultrahigh-Q devices and photonic circuits

NASA Astrophysics Data System (ADS)

Yang, Ki Youl; Oh, Dong Yoon; Lee, Seung Hoon; Yang, Qi-Fan; Yi, Xu; Shen, Boqiang; Wang, Heming; Vahala, Kerry

2018-05-01

Optical microresonators are essential to a broad range of technologies and scientific disciplines. However, many of their applications rely on discrete devices to attain challenging combinations of ultra-low-loss performance (ultrahigh Q) and resonator design requirements. This prevents access to scalable fabrication methods for photonic integration and lithographic feature control. Indeed, finding a microfabrication bridge that connects ultrahigh-Q device functions with photonic circuits is a priority of the microcavity field. Here, an integrated resonator having a record Q factor over 200 million is presented. Its ultra-low-loss and flexible cavity design brings performance to integrated systems that has been the exclusive domain of discrete silica and crystalline microcavity devices. Two distinctly different devices are demonstrated: soliton sources with electronic repetition rates and high-coherence/low-threshold Brillouin lasers. This multi-device capability and performance from a single integrated cavity platform represents a critical advance for future photonic circuits and systems.

Millimeter-wave silicon-based ultra-wideband automotive radar transceivers

NASA Astrophysics Data System (ADS)

Jain, Vipul

Since the invention of the integrated circuit, the semiconductor industry has revolutionized the world in ways no one had ever anticipated. With the advent of silicon technologies, consumer electronics became light-weight and affordable and paved the way for an Information-Communication-Entertainment age. While silicon almost completely replaced compound semiconductors from these markets, it has been unable to compete in areas with more stringent requirements due to technology limitations. One of these areas is automotive radar sensors, which will enable next-generation collision-warning systems in automobiles. A low-cost implementation is absolutely essential for widespread use of these systems, which leads us to the subject of this dissertation---silicon-based solutions for automotive radars. This dissertation presents architectures and design techniques for mm-wave automotive radar transceivers. Several fully-integrated transceivers and receivers operating at 22-29 GHz and 77-81 GHz are demonstrated in both CMOS and SiGe BiCMOS technologies. Excellent performance is achieved indicating the suitability of silicon technologies for automotive radar sensors. The first CMOS 22-29-GHz pulse-radar receiver front-end for ultra-wideband radars is presented. The chip includes a low noise amplifier, I/Q mixers, quadrature voltage-controlled oscillators, pulse formers and variable-gain amplifiers. Fabricated in 0.18-mum CMOS, the receiver achieves a conversion gain of 35-38.1 dB and a noise figure of 5.5-7.4 dB. Integration of multi-mode multi-band transceivers on a single chip will enable next-generation low-cost automotive radar sensors. Two highly-integrated silicon ICs are designed in a 0.18-mum BiCMOS technology. These designs are also the first reported demonstrations of mm-wave circuits with high-speed digital circuits on the same chip. The first mm-wave dual-band frequency synthesizer and transceiver, operating in the 24-GHz and 77-GHz bands, are demonstrated. All circuits except the oscillators are shared between the two bands. A multi-functional injection-locked circuit is used after the oscillators to reconfigure the division ratio inside the phase-locked loop. The synthesizer is suitable for integration in automotive radar transceivers and heterodyne receivers for 94-GHz imaging applications. The transceiver chip includes a dual-band low noise amplifier, a shared downconversion chain, dual-band pulse formers, power amplifiers, a dual-band frequency synthesizer and a high-speed programmable baseband pulse generator. Radar functionality is demonstrated using loopback measurements.

Quantum Theory and the Silicon Revolution. Resources in Technology.

ERIC Educational Resources Information Center

Deal, Walter F., III

1995-01-01

This learning activity describes silicon as one of the most plentiful materials on earth, demonstrating how it supplies the building blocks for electronic devices such as transistors, integrated circuits, and microprocessors. It includes a design brief on control technology. (JOW)

Silicon photonics devices for metro applications

NASA Astrophysics Data System (ADS)

Fukuda, H.; Kikuchi, K.; Jizodo, M.; Kawamura, Y.; Takeda, K.; Honda, K.

2017-01-01

Digital coherent technology is considered an attractive way of realizing both high-speed metro links and long distance transmissions. In metro areas, there is a strong demand for a smaller, faster transceiver module. This demand is mainly driven by the rapidly increasing data center interconnection traffic, where transmission capacity per faceplane is a key feature. Therefore, optical integration technology is desired. Since compensation in digital coherent technology is performed in the electrical or digital domain, users can deal with those optics performances that are not compensated for digitally. This means using a new material that cannot provide perfect characteristics but that is suitable for miniaturization and integration is possible. Silicon photonics (SiPh) is considered an attractive technology that would enable the significant miniaturization of optical circuits and be capable of optical integration with high manufacturability. While SiPh-based devices have begun to be deployed for very short or short reach links on the basis of direct detection technology, their digital coherent applications have recently been investigated in view of their integration capability. This paper describes recent progress on SiPh-based integrated optical devices for high-speed digital coherent transceivers targeting metro links. An optical modulator and receiver with related circuits have been integrated into a single SiPh chip. TEC-free operation under non-hermetic conditions and the direct attachment of optical fibers have both been realized. Very thin and small packaging with sufficient performance has been demonstrated by using the SiPh chip co-packaged with high-speed ICs.

Solid State Technology Branch of NASA Lewis Research Center

NASA Technical Reports Server (NTRS)

1991-01-01

Reprints of one year's production of research publications (June 1990 to June 1991) are presented. These are organized into three major sections: microwave circuits, both hybrid and monolithic microwave integrated circuits (MMICs); materials and device work; and superconductivity. The included papers also cover more specific topics involving waveguides, phase array antennas, dielectrics, and high temperature superconductors.

The thermal circuit of a nuclear power station's unit built around a supercritical-pressure water-cooled reactor

NASA Astrophysics Data System (ADS)

Silin, V. A.; Zorin, V. M.; Tagirov, A. M.; Tregubova, O. I.; Belov, I. V.; Povarov, P. V.

2010-12-01

Main results obtained from calculations of the steam generator and thermal circuit of the steam turbine unit for a nuclear power unit with supercritical-pressure water coolant and integral layout are presented. The obtained characteristics point to the advisability of carrying out further developments of this promising nuclear power technology.

A power-efficient analog integrated circuit for amplification and detection of neural signals.

PubMed

Borghi, T; Bonfanti, A; Gusmeroli, R; Zambra, G; Spinelli, A S

2008-01-01

We present a neural amplifier that optimizes the trade-off between power consumption and noise performance down to the best so far reported. In the perspective of realizing a fully autonomous implantable system we also address the problem of spike detection by using a new simple algorithm and we discuss the implementation with analog integrated circuits. Implemented in 0.35-microm CMOS technology and with total current consumption of about 20 microA, the whole circuit occupies an area of 0.18 mm(2). Reduced power consumption and small area make it suited to be used in chronic multichannel recording systems for neural prosthetics and neuroscience experiments.

A Wide Range Temperature Sensor Using SOI Technology

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Elbuluk, Malik E.; Hammoud, Ahmad

2009-01-01

Silicon-on-insulator (SOI) technology is becoming widely used in integrated circuit chips for its advantages over the conventional silicon counterpart. The decrease in leakage current combined with lower power consumption allows electronics to operate in a broader temperature range. This paper describes the performance of an SOIbased temperature sensor under extreme temperatures and thermal cycling. The sensor comprised of a temperature-to-frequency relaxation oscillator circuit utilizing an SOI precision timer chip. The circuit was evaluated under extreme temperature exposure and thermal cycling between -190 C and +210 C. The results indicate that the sensor performed well over the entire test temperature range and it was able to re-start at extreme temperatures.

Advanced digital SAR processing study

NASA Technical Reports Server (NTRS)

Martinson, L. W.; Gaffney, B. P.; Liu, B.; Perry, R. P.; Ruvin, A.

1982-01-01

A highly programmable, land based, real time synthetic aperture radar (SAR) processor requiring a processed pixel rate of 2.75 MHz or more in a four look system was designed. Variations in range and azimuth compression, number of looks, range swath, range migration and SR mode were specified. Alternative range and azimuth processing algorithms were examined in conjunction with projected integrated circuit, digital architecture, and software technologies. The advaced digital SAR processor (ADSP) employs an FFT convolver algorithm for both range and azimuth processing in a parallel architecture configuration. Algorithm performace comparisons, design system design, implementation tradeoffs and the results of a supporting survey of integrated circuit and digital architecture technologies are reported. Cost tradeoffs and projections with alternate implementation plans are presented.

Limits on fundamental limits to computation.

PubMed

Markov, Igor L

2014-08-14

An indispensable part of our personal and working lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the past fifty years. Such Moore scaling now requires ever-increasing efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and increase our understanding of integrated-circuit scaling, here I review fundamental limits to computation in the areas of manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, I recapitulate how some limits were circumvented, and compare loose and tight limits. Engineering difficulties encountered by emerging technologies may indicate yet unknown limits.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

NASA Astrophysics Data System (ADS)

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm.

PubMed

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

The functional significance of newly born neurons integrated into olfactory bulb circuits.

PubMed

Sakamoto, Masayuki; Kageyama, Ryoichiro; Imayoshi, Itaru

2014-01-01

The olfactory bulb (OB) is the first central processing center for olfactory information connecting with higher areas in the brain, and this neuronal circuitry mediates a variety of odor-evoked behavioral responses. In the adult mammalian brain, continuous neurogenesis occurs in two restricted regions, the subventricular zone (SVZ) of the lateral ventricle and the hippocampal dentate gyrus. New neurons born in the SVZ migrate through the rostral migratory stream and are integrated into the neuronal circuits of the OB throughout life. The significance of this continuous supply of new neurons in the OB has been implicated in plasticity and memory regulation. Two decades of huge investigation in adult neurogenesis revealed the biological importance of integration of new neurons into the olfactory circuits. In this review, we highlight the recent findings about the physiological functions of newly generated neurons in rodent OB circuits and then discuss the contribution of neurogenesis in the brain function. Finally, we introduce cutting edge technologies to monitor and manipulate the activity of new neurons.

The functional significance of newly born neurons integrated into olfactory bulb circuits

PubMed Central

Sakamoto, Masayuki; Kageyama, Ryoichiro; Imayoshi, Itaru

2014-01-01

The olfactory bulb (OB) is the first central processing center for olfactory information connecting with higher areas in the brain, and this neuronal circuitry mediates a variety of odor-evoked behavioral responses. In the adult mammalian brain, continuous neurogenesis occurs in two restricted regions, the subventricular zone (SVZ) of the lateral ventricle and the hippocampal dentate gyrus. New neurons born in the SVZ migrate through the rostral migratory stream and are integrated into the neuronal circuits of the OB throughout life. The significance of this continuous supply of new neurons in the OB has been implicated in plasticity and memory regulation. Two decades of huge investigation in adult neurogenesis revealed the biological importance of integration of new neurons into the olfactory circuits. In this review, we highlight the recent findings about the physiological functions of newly generated neurons in rodent OB circuits and then discuss the contribution of neurogenesis in the brain function. Finally, we introduce cutting edge technologies to monitor and manipulate the activity of new neurons. PMID:24904263

MMIC technology for advanced space communications systems

NASA Astrophysics Data System (ADS)

Downey, A. N.; Connolly, D. J.; Anzic, G.

The current NASA program for 20 and 30 GHz monolithic microwave integrated circuit (MMIC) technology is reviewed. The advantages of MMIC are discussed. Millimeter wavelength MMIC applications and technology for communications systems are discussed. Passive and active MMIC compatible components for millimeter wavelength applications are investigated. The cost of a millimeter wavelength MMIC's is projected.

MMIC technology for advanced space communications systems

NASA Technical Reports Server (NTRS)

Downey, A. N.; Connolly, D. J.; Anzic, G.

1984-01-01

The current NASA program for 20 and 30 GHz monolithic microwave integrated circuit (MMIC) technology is reviewed. The advantages of MMIC are discussed. Millimeter wavelength MMIC applications and technology for communications systems are discussed. Passive and active MMIC compatible components for millimeter wavelength applications are investigated. The cost of a millimeter wavelength MMIC's is projected.

Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

PubMed

Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

2014-09-01

The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

CMOS Integrated Lock-in Readout Circuit for FET Terahertz Detectors

NASA Astrophysics Data System (ADS)

Domingues, Suzana; Perenzoni, Daniele; Perenzoni, Matteo; Stoppa, David

2017-06-01

In this paper, a switched-capacitor readout circuit topology integrated with a THz antenna and field-effect transistor detector is analyzed, designed, and fabricated in a 0.13-μm standard CMOS technology. The main objective is to perform amplification and filtering of the signal, as well as subtraction of background in case of modulated source, in order to avoid the need for an external lock-in amplifier, in a compact implementation. A maximum responsivity of 139.7 kV/W, and a corresponding minimum NEP of 2.2 nW/√Hz, was obtained with a two-stage readout circuit at 1 kHz modulation frequency. The presented switched-capacitor circuit is suitable for implementation in pixel arrays due to its compact size and power consumption (0.014 mm2 and 36 μW).

Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication.

PubMed

Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

2017-02-01

In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80-100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes.

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

PubMed

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Biasing of Capacitive Micromachined Ultrasonic Transducers.

PubMed

Caliano, Giosue; Matrone, Giulia; Savoia, Alessandro Stuart

2017-02-01

Capacitive micromachined ultrasonic transducers (CMUTs) represent an effective alternative to piezoelectric transducers for medical ultrasound imaging applications. They are microelectromechanical devices fabricated using silicon micromachining techniques, developed in the last two decades in many laboratories. The interest for this novel transducer technology relies on its full compatibility with standard integrated circuit technology that makes it possible to integrate on the same chip the transducers and the electronics, thus enabling the realization of extremely low-cost and high-performance devices, including both 1-D or 2-D arrays. Being capacitive transducers, CMUTs require a high bias voltage to be properly operated in pulse-echo imaging applications. The typical bias supply residual ripple of high-quality high-voltage (HV) generators is in the millivolt range, which is comparable with the amplitude of the received echo signals, and it is particularly difficult to minimize. The aim of this paper is to analyze the classical CMUT biasing circuits, highlighting the features of each one, and to propose two novel HV generator architectures optimized for CMUT biasing applications. The first circuit proposed is an ultralow-residual ripple (<5 [Formula: see text]) HV generator that uses an extremely stable sinusoidal power oscillator topology. The second circuit employs a commercially available integrated step-up converter characterized by a particularly efficient switching topology. The circuit is used to bias the CMUT by charging a buffer capacitor synchronously with the pulsing sequence, thus reducing the impact of the switching noise on the received echo signals. The small area of the circuit (about 1.5 cm 2 ) makes it possible to generate the bias voltage inside the probe, very close to the CMUT, making the proposed solution attractive for portable applications. Measurements and experiments are shown to demonstrate the effectiveness of the new approaches presented.

First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu

2016-01-01

A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET) digital and analog Integrated Circuits (ICs) with two levels of metal interconnect have reproducibly demonstrated electrical operation at 500 C in excess of 1000 hours. While this progress expands the complexity and durability envelope of high temperature ICs, one important area for further technology maturation is the development of reasonably accurate and accessible computer-aided modeling and simulation tools for circuit design of these ICs. Towards this end, we report on development and verification of 25 C to 500 C SPICE simulation models of first order accuracy for this extreme-temperature durable 4H-SiC JFET IC technology. For maximum availability, the JFET IC modeling is implemented using the baseline-version SPICE NMOS LEVEL 1 model that is common to other variations of SPICE software and importantly includes the body-bias effect. The first-order accuracy of these device models is verified by direct comparison with measured experimental device characteristics.

A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

NASA Astrophysics Data System (ADS)

Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

2014-01-01

This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.

Optical Computers and Space Technology

NASA Technical Reports Server (NTRS)

Abdeldayem, Hossin A.; Frazier, Donald O.; Penn, Benjamin; Paley, Mark S.; Witherow, William K.; Banks, Curtis; Hicks, Rosilen; Shields, Angela

1995-01-01

The rapidly increasing demand for greater speed and efficiency on the information superhighway requires significant improvements over conventional electronic logic circuits. Optical interconnections and optical integrated circuits are strong candidates to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by the conventional electronic logic circuits. The new optical technology has increased the demand for high quality optical materials. NASA's recent involvement in processing optical materials in space has demonstrated that a new and unique class of high quality optical materials are processible in a microgravity environment. Microgravity processing can induce improved orders in these materials and could have a significant impact on the development of optical computers. We will discuss NASA's role in processing these materials and report on some of the associated nonlinear optical properties which are quite useful for optical computers technology.

Biosensor system-on-a-chip including CMOS-based signal processing circuits and 64 carbon nanotube-based sensors for the detection of a neurotransmitter.

PubMed

Lee, Byung Yang; Seo, Sung Min; Lee, Dong Joon; Lee, Minbaek; Lee, Joohyung; Cheon, Jun-Ho; Cho, Eunju; Lee, Hyunjoong; Chung, In-Young; Park, Young June; Kim, Suhwan; Hong, Seunghun

2010-04-07

We developed a carbon nanotube (CNT)-based biosensor system-on-a-chip (SoC) for the detection of a neurotransmitter. Here, 64 CNT-based sensors were integrated with silicon-based signal processing circuits in a single chip, which was made possible by combining several technological breakthroughs such as efficient signal processing, uniform CNT networks, and biocompatible functionalization of CNT-based sensors. The chip was utilized to detect glutamate, a neurotransmitter, where ammonia, a byproduct of the enzymatic reaction of glutamate and glutamate oxidase on CNT-based sensors, modulated the conductance signals to the CNT-based sensors. This is a major technological advancement in the integration of CNT-based sensors with microelectronics, and this chip can be readily integrated with larger scale lab-on-a-chip (LoC) systems for various applications such as LoC systems for neural networks.

On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

PubMed

Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

2017-08-30

Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

NASA Astrophysics Data System (ADS)

Li, Y.-Q.; Wang, H.-B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S.-T.; He, A.-L.; Guo, G.; Baeg, S. H.; Wen, S.-J.; Wong, R.; Chen, M.; Wu, Q.

2017-06-01

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.

Integrating Magnetics for On-Chip Power: A Perspective

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, CR; Harburg, DV; Qiu, JZ

Integration of efficient power converters requires technology for efficient, high-power on-chip inductors and transformers. Increases in switching frequency, facilitated by advances in circuit designs and silicon or wide-bandgap semiconductors, can enable miniaturization, but only if the magnetics technology works well at the higher frequencies. Technologies, geometries, and scaling of air-core and magnetic-core inductors and transformers are examined, and their potential for integration is discussed. Air-core inductors can use simpler fabrication, and increasing frequency can always be used to decrease their size, but magnetic cores can decrease the required thickness without requiring as high a frequency.

The Integration of Bacteriorhodopsin Proteins with Semiconductor Heterostructure Devices

NASA Astrophysics Data System (ADS)

Xu, Jian

2008-03-01

Bioelectronics has emerged as one of the most rapidly developing fields among the active frontiers of interdisciplinary research. A major thrust in this field is aimed at the coupling of the technologically-unmatched performance of biological systems, such as neural and sensing functions, with the well developed technology of microelectronics and optoelectronics. To this end we have studied the integration of a suitably engineered protein, bacteriorhodopsin (BR), with semiconductor optoelectronic devices and circuits. Successful integration will potentially lead to ultrasensitive sensors with polarization selectivity and built-in preprocessing capabilities that will be useful for high speed tracking, motion and edge detection, biological detection, and artificial vision systems. In this presentation we will summarize our progresses in this area, which include fundamental studies on the transient dynamics of photo-induced charge shift in BR and the coupling mechanism at protein-semiconductor interface for effective immobilizing and selectively integrating light sensitive proteins with microelectronic devices and circuits, and the device engineering of BR-transistor-integrated optical sensors as well as their applications in phototransceiver circuits. Work done in collaboration with Pallab Bhattacharya, Jonghyun Shin, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI; Robert R. Birge, Department of Chemistry, University of Connecticut, Storrs, CT 06269; and György V'ar'o, Institute of Biophysics, Biological Research Center of the Hungarian Academy of Science, H-6701 Szeged, Hungary.

Coplanar monolithic integrated circuits for low-noise communication and radar systems

NASA Astrophysics Data System (ADS)

Bessemoulin, Alexandre; Verweyen, Ludger; Marsetz, Waldemar; Massler, Hermann; Neumann, Markus; Hulsmann, Axel; Schlechtweg, Michael

1999-12-01

This paper presents coplanar millimeter-wave monolithic integrated circuits with high performance and small size for use in low noise communication and radar system applications. Technology and modeling issues with respect to active and passive elements are discussed first. In a second step, the potential of coplanar waveguides to realize compact ICs is illustrated through various design examples, such as low noise amplifiers, mixers and power amplifiers. The performance of multifunctional ICs is also presented by comparing simulated and measured results for a complete 77 GHz Transceive MMIC.

Picosecond imaging of signal propagation in integrated circuits

NASA Astrophysics Data System (ADS)

Frohmann, Sven; Dietz, Enrico; Dittrich, Helmar; Hübers, Heinz-Wilhelm

2017-04-01

Optical analysis of integrated circuits (IC) is a powerful tool for analyzing security functions that are implemented in an IC. We present a photon emission microscope for picosecond imaging of hot carrier luminescence in ICs in the near-infrared spectral range from 900 to 1700 nm. It allows for a semi-invasive signal tracking in fully operational ICs on the gate or transistor level with a timing precision of approximately 6 ps. The capabilities of the microscope are demonstrated by imaging the operation of two ICs made by 180 and 60 nm process technology.

Flow sensor based on monolithic integration of organic light-emitting diodes (OLEDs) and CMOS circuits

NASA Astrophysics Data System (ADS)

Reckziegel, S.; Kreye, D.; Puegner, T.; Vogel, U.; Scholles, M.; Grillberger, C.; Fehse, K.

2009-02-01

In this paper we present an optoelectronic integrated circuit (OEIC) based on monolithic integration of organic lightemitting diodes (OLEDs) and CMOS technology. By the use of integrated circuits, photodetectors and highly efficient OLEDs on the same silicon chip, novel OEICs with combined sensors and actuating elements can be realized. The OLEDs are directly deposited on the CMOS top metal. The metal layer serves as OLED bottom electrode and determines the bright area. Furthermore, the area below the OLED electrodes can be used for integrated circuits. The monolithic integration of actuators, sensors and electronics on a common silicon substrate brings significant advantages in most sensory applications. The developed OEIC combines three different types of sensors: a reflective sensor, a color sensor and a particle flow sensor and is configured with an orange (597nm) emitting p-i-n OLED. We describe the architecture of such a monolithic OEIC and demonstrate a method to determine the velocity of a fluid being conveyed pneumatically in a transparent capillary. The integrated OLEDs illuminate the capillary with the flowing fluid. The fluid has a random reflection profile. Depending on the velocity and a random contrast difference, more or less light is reflected back to the substrate. The integrated photodiodes located at different fixed points detect the reflected light and using crosscorrelation, the velocity is calculated from the time in which contrast differences move over a fixed distance.

A 90 GHz Amplifier Assembled Using a Bump-Bonded InP-Based HEMT

NASA Technical Reports Server (NTRS)

Pinsukanjana, Paul R.; Samoska, Lorene A.; Gaier, Todd C.; Smith, R. Peter; Ksendzov, Alexander; Fitzsimmons, Michael J.; Martin, Suzanne C.

1998-01-01

We report on the performance of a novel W-band amplifier fabricated utilizing very compact bump bonds. We bump-bonded a high-speed, low-noise InP high electron mobility transistor (HEMT) onto a separately fabricated passive circuit having a GaAs substrate. The compact bumps and small chip size were used for efficient coupling and maximum circuit design flexibility. This new quasi-monolithic millimeter-wave integrated circuit (Q-MMIC) amplifier exhibits a peak gain of 5.8 dB at approx. 90 GHz and a 3 dB bandwidth of greater than 25%. To our knowledge, this is the highest frequency amplifier assembled using bump-bonded technology. Our bump-bonding technique is a useful alternative to the high cost of monolithic millimeter-wave integrated circuits (MMIC's). Effects of the bumps on the circuit appear to be minimal. We used the simple matching circuit for demonstrating the technology - future circuits would have all of the elements (resistors, via holes, bias lines, etc.) included 'in conventional MMIC's. Our design in different from other investigators' efforts in that the bumps are only 8 microns thick by 15 microns wide. The bump sizes were sufficiently small that the devices, originally designed for W-band hybrid circuits, could be bonded without alteration. Figure 3 shows the measured and simulated magnitude of S-parameters from 85-120 GHz, of the InP HEMT bump-bonded to the low noise amplifier (LNA) passive. The maximum gain is 5.8 dB at approx. 90 GHz, and gain extends to 117 GHz. Measurement of a single device (without matching networks) shows approx. 1 dB of gain at 90 GHz. The measured gain of the amplifier agrees well with the design in the center of the measurement band, and the agreement falls off at the band edges. Since no accommodation for the bump-bonding parasitics was made in the design, the result implies that the parasitic elements associated with the bonding itself do not dominate the performance of the LNA circuit. It should be noted that this amplifier was designed for good noise performance, which is why the input and output return losses are poorer than one would expect for an amplifier simply matched for gain. However, noise performance has not been measured at this time. While the agreement between modeled vs. experimental data is not exact, the data prove that bump-bonded technology can be used for amplifiers at frequencies at least as high as 100 GHz. JPL is pursuing this technology as a way to economically and quickly incorporate the best available HEMTs into a circuit with all of the reliability and circuit design flexibility offered by MMIC technology. We are currently using the technology to fabricate 4-stage, wide-band, W-band LNA's. We have also performed pull and shear tests which show that the bump bonds are sufficiently robust for any anticipated application.

Performance evaluation of an architecture for the characterisation of photo-devices: design, fabrication and test on a CMOS technology

NASA Astrophysics Data System (ADS)

Castillo-Cabrera, G.; García-Lamont, J.; Reyes-Barranca, M. A.; Moreno-Cadenas, J. A.; Escobosa-Echavarría, A.

2011-03-01

In this report, the performance of a particular pixel's architecture is evaluated. It consists mainly of an optical sensor coupled to an amplifier. The circuit contains photoreceptors such as phototransistors and photodiodes. The circuit integrates two main blocks: (a) the pixel architecture, containing four p-channel transistors and a photoreceptor, and (b) a current source for biasing the signal conditioning amplifier. The generated photocurrent is integrated through the gate capacitance of the input p-channel MOS transistor, then converted to voltage and amplified. Both input transistor and current source are implemented as a voltage amplifier having variable gain (between 10dB and 32dB). Considering characterisation purposes, this last fact is relevant since it gives a degree of freedom to the measurement of different kinds of photo-devices and is not limited to either a single operating point of the circuit or one kind and size of photo-sensor. The gain of the amplifier can be adjusted with an external DC power supply that also sets the DC quiescent point of the circuit. Design of the row-select transistor's aspect ratio used in the matrix array is critical for the pixel's amplifier performance. Based on circuit design data such as capacitance magnitude, time and voltage integration, and amplifier gain, characterisation of all the architecture can be readily carried out and evaluated. For the specific technology used in this work, the spectral response of photo-sensors reveals performance differences between phototransistors and photodiodes. Good approximation between simulation and measurement was obtained.

Exploring the Use of the LT3480 (RH3480) Circuit as Low-Power, Low-Voltage Solar Array Regulator

NASA Astrophysics Data System (ADS)

Garrigos, A.; Lizan, J. L.; Blanes, J. M.; Gutierrez, R.

2014-08-01

With the advent of PoL technology, several commercial integrated switching regulators already have their space- qualified versions. Apart of PoL and secondary supply applications, other functions can be explored using those integrated circuits. In this work, the Solar Array Regulator function is analyzed using the commercial LT3480 circuit, which has the space counterpart (RH3480) commercialized by MSK and named MSK5058RH and later MSK5031 (but not rad-hard). Input voltage regulation, taper charge, protection functions and module parallelization are studied and verified experimentally in a low-voltage, low-power MPPT battery bus configuration. Potential users of this approach are micro and nano-satellites power systems.

Neural CMOS-integrated circuit and its application to data classification.

PubMed

Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

2012-05-01

Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

Three-dimensional integrated circuits for lab-on-chip dielectrophoresis of nanometer scale particles

NASA Astrophysics Data System (ADS)

Dickerson, Samuel J.; Noyola, Arnaldo J.; Levitan, Steven P.; Chiarulli, Donald M.

2007-01-01

In this paper, we present a mixed-technology micro-system for electronically manipulating and optically detecting virusscale particles in fluids that is designed using 3D integrated circuit technology. During the 3D fabrication process, the top-most chip tier is assembled upside down and the substrate material is removed. This places the polysilicon layer, which is used to create geometries with the process' minimum feature size, in close proximity to a fluid channel etched into the top of the stack. By taking advantage of these processing features inherent to "3D chip-stacking" technology, we create electrode arrays that have a gap spacing of 270 nm. Using 3D CMOS technology also provides the ability to densely integrate analog and digital control circuitry for the electrodes by using the additional levels of the chip stack. We show simulations of the system with a physical model of a Kaposi's sarcoma-associated herpes virus, which has a radius of approximately 125 nm, being dielectrophoretically arranged into striped patterns. We also discuss how these striped patterns of trapped nanometer scale particles create an effective diffraction grating which can then be sensed with macro-scale optical techniques.

A Telecommunications Primer for College Presidents. Part I. The Technologies Defined. Educational Technology Profile 25.

ERIC Educational Resources Information Center

Smith, Ralph Lee

1978-01-01

Intended for use by presidents, planners, and administrators to acquaint them with developments in electronic communications, this primer describes cable television, common carrier, videotape recorders and videodiscs, satellites, microwave, circuit integration, digital transmission, data packet switching, and fiber optics. (LBH)

Universal discrete Fourier optics RF photonic integrated circuit architecture.

PubMed

Hall, Trevor J; Hasan, Mehedi

2016-04-04

This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO_3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

System Modeling of a MEMS Vibratory Gyroscope and Integration to Circuit Simulation.

PubMed

Kwon, Hyukjin J; Seok, Seyeong; Lim, Geunbae

2017-11-18

Recently, consumer applications have dramatically created the demand for low-cost and compact gyroscopes. Therefore, on the basis of microelectromechanical systems (MEMS) technology, many gyroscopes have been developed and successfully commercialized. A MEMS gyroscope consists of a MEMS device and an electrical circuit for self-oscillation and angular-rate detection. Since the MEMS device and circuit are interactively related, the entire system should be analyzed together to design or test the gyroscope. In this study, a MEMS vibratory gyroscope is analyzed based on the system dynamic modeling; thus, it can be mathematically expressed and integrated into a circuit simulator. A behavioral simulation of the entire system was conducted to prove the self-oscillation and angular-rate detection and to determine the circuit parameters to be optimized. From the simulation, the operating characteristic according to the vacuum pressure and scale factor was obtained, which indicated similar trends compared with those of the experimental results. The simulation method presented in this paper can be generalized to a wide range of MEMS devices.

High School Teachers' Perceptions of the Integration of Instructional Technology in the Classroom

ERIC Educational Resources Information Center

Hertzler, Karen S.

2010-01-01

Many state technology standards, goals, and objectives affirm technology will improve student progress. Regardless of the claim, the statement that "teachers are good or bad, not because they are made of meat and bones or electronic circuits, but because they apply correctly or incorrectly teaching methods that are or are not relevant to the…

Photonic Integrated Circuits for Cost-Effective, High Port Density, and Higher Capacity Optical Communications Systems

NASA Astrophysics Data System (ADS)

Chiappa, Pierangelo

Bandwidth-hungry services, such as higher speed Internet, voice over IP (VoIP), and IPTV, allow people to exchange and store huge amounts of data among worldwide locations. In the age of global communications, domestic users, companies, and organizations around the world generate new contents making bandwidth needs grow exponentially, along with the need for new services. These bandwidth and connectivity demands represent a concern for operators who require innovative technologies to be ready for scaling. To respond efficiently to these demands, Alcatel-Lucent is fast moving toward photonic integration circuits technologies as the key to address best performances at the lowest "bit per second" cost. This article describes Alcatel-Lucent's contribution in strategic directions or achievements, as well as possible new developments.

Nanotubes May Break Through "Chip Wall"

NASA Technical Reports Server (NTRS)

Laufenberg, Larry

2003-01-01

In 1965, just four years after the first planar integrated circuit (IC) was discovered, Cordon Moore observed that the number of transistors per integrated circuit had grown exponentially. He predicted that this would continue, and the media soon began to call his prophesy "Moore's Law" For nearly forty years, Moore's Law has been validated by the technological progress achieved in the semiconductor industry. Now, however, industry experts are warning of a "Red Brick Wall" that may soon block the continued scaling predicted by by Moore's Law. The "red bricks" in the wall are those areas of technical challenge for which no known manufacturable solution exists. One such "brick" is the challenge of finding a new material and processing technology to replace the metals used today to interconnect transistors on a chip.

From Bell Labs to Silicon Valley: A Saga of Technology Transfer, 1954-1961

NASA Astrophysics Data System (ADS)

Riordan, Michael

2009-03-01

Although Bell Telephone Laboratories invented the transistor and developed most of the associated semiconductor technology, the integrated circuit or microchip emerged elsewhere--at Texas Instruments and Fairchild Semiconductor Company. I recount how the silicon technology required to make microchips possible was first developed at Bell Labs in the mid-1950s. Much of it reached the San Francisco Bay Area when transistor pioneer William Shockley left Bell Labs in 1955 to establish the Shockley Semiconductor Laboratory in Mountain View, hiring a team of engineers and scientists to develop and manufacture transistors and related semiconductor devices. But eight of them--including Gordon Moore and Robert Noyce, eventually the co-founders of Intel--resigned en masse in September 1957 to start Fairchild, bringing with them the scientific and technological expertise they had acquired and further developed at Shockley's firm. This event marked the birth of Silicon Valley, both technologically and culturally. By March 1961 the company was marketing its Micrologic integrated circuits, the first commercial silicon microchips, based on the planar processing technique developed at Fairchild by Jean Hoerni.

Implementation of an integrated op-amp based chaotic neuron model and observation of its chaotic dynamics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jung, Jinwoo; Lee, Jewon; Song, Hanjung

2011-03-15

This paper presents a fully integrated circuit implementation of an operational amplifier (op-amp) based chaotic neuron model with a bipolar output function, experimental measurements, and analyses of its chaotic behavior. The proposed chaotic neuron model integrated circuit consists of several op-amps, sample and hold circuits, a nonlinear function block for chaotic signal generation, a clock generator, a nonlinear output function, etc. Based on the HSPICE (circuit program) simulation results, approximated empirical equations for analyses were formulated. Then, the chaotic dynamical responses such as bifurcation diagrams, time series, and Lyapunov exponent were calculated using these empirical equations. In addition, we performedmore » simulations about two chaotic neuron systems with four synapses to confirm neural network connections and got normal behavior of the chaotic neuron such as internal state bifurcation diagram according to the synaptic weight variation. The proposed circuit was fabricated using a 0.8-{mu}m single poly complementary metal-oxide semiconductor technology. Measurements of the fabricated single chaotic neuron with {+-}2.5 V power supplies and a 10 kHz sampling clock frequency were carried out and compared with the simulated results.« less

Micromachined Integrated Quantum Circuit Containing a Superconducting Qubit

NASA Astrophysics Data System (ADS)

Brecht, T.; Chu, Y.; Axline, C.; Pfaff, W.; Blumoff, J. Z.; Chou, K.; Krayzman, L.; Frunzio, L.; Schoelkopf, R. J.

2017-04-01

We present a device demonstrating a lithographically patterned transmon integrated with a micromachined cavity resonator. Our two-cavity, one-qubit device is a multilayer microwave-integrated quantum circuit (MMIQC), comprising a basic unit capable of performing circuit-QED operations. We describe the qubit-cavity coupling mechanism of a specialized geometry using an electric-field picture and a circuit model, and obtain specific system parameters using simulations. Fabrication of the MMIQC includes lithography, etching, and metallic bonding of silicon wafers. Superconducting wafer bonding is a critical capability that is demonstrated by a micromachined storage-cavity lifetime of 34.3 μ s , corresponding to a quality factor of 2 ×106 at single-photon energies. The transmon coherence times are T1=6.4 μ s , and T2echo=11.7 μ s . We measure qubit-cavity dispersive coupling with a rate χq μ/2 π =-1.17 MHz , constituting a Jaynes-Cummings system with an interaction strength g /2 π =49 MHz . With these parameters we are able to demonstrate circuit-QED operations in the strong dispersive regime with ease. Finally, we highlight several improvements and anticipated extensions of the technology to complex MMIQCs.

Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

PubMed Central

Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

2017-01-01

In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes. PMID:28145513

Integration of micro-/nano-/quantum-scale photonic devices: scientific and technological considerations

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, Seung-Gol; O, Beom Hoan; Park, Se Geun

2004-08-01

Scientific and technological issues and considerations regarding the integration of miniaturized microphotonic devices, circuits and systems in micron, submicron, and quantum scale, are presented. First, we examine the issues regarding the miniaturization of photonic devices including the size effect, proximity effect, energy confinement effect, microcavity effect, optical and quantum interference effect, high field effect, nonlinear effect, noise effect, quantum optical effect, and chaotic effect. Secondly, we examine the issues regarding the interconnection including the optical alignment, minimizing the interconnection losses, and maintaining optical modes. Thirdly, we address the issues regarding the two-dimensional or three-dimensional integration either in a hybrid format or in a monolithic format between active devices and passive devices of varying functions. We find that the concept of optical printed circuit board (O-PCB) that we propose is highly attractive as a platform for micro/nano/quantum-scale photonic integration. We examine the technological issues to be addressed in the process of fabrication, characterization, and packaging for actual implementation of the miniaturization, interconnection and integration. Devices that we have used for our study include: mode conversion schemes, micro-ring and micro-racetrack resonator devices, multimode interference devices, lasers, vertical cavity surface emitting microlasers, and their arrays. Future prospects are also discussed.

On-chip enzymatic microbiofuel cell-powered integrated circuits.

PubMed

Mark, Andrew G; Suraniti, Emmanuel; Roche, Jérôme; Richter, Harald; Kuhn, Alexander; Mano, Nicolas; Fischer, Peer

2017-05-16

A variety of diagnostic and therapeutic medical technologies rely on long term implantation of an electronic device to monitor or regulate a patient's condition. One proposed approach to powering these devices is to use a biofuel cell to convert the chemical energy from blood nutrients into electrical current to supply the electronics. We present here an enzymatic microbiofuel cell whose electrodes are directly integrated into a digital electronic circuit. Glucose oxidizing and oxygen reducing enzymes are immobilized on microelectrodes of an application specific integrated circuit (ASIC) using redox hydrogels to produce an enzymatic biofuel cell, capable of harvesting electrical power from just a single droplet of 5 mM glucose solution. Optimisation of the fuel cell voltage and power to match the requirements of the electronics allow self-powered operation of the on-board digital circuitry. This study represents a step towards implantable self-powered electronic devices that gather their energy from physiological fluids.

Intelligent switches of integrated lightwave circuits with core telecommunication functions

NASA Astrophysics Data System (ADS)

Izhaky, Nahum; Duer, Reuven; Berns, Neil; Tal, Eran; Vinikman, Shirly; Schoenwald, Jeffrey S.; Shani, Yosi

2001-05-01

We present a brief overview of a promising switching technology based on Silica on Silicon thermo-optic integrated circuits. This is basically a 2D solid-state optical device capable of non-blocking switching operation. Except of its excellent performance (insertion loss<5dB, switching time<2ms...), the switch enables additional important build-in functionalities. It enables single-to- single channel switching and single-to-multiple channel multicasting/broadcasting. In addition, it has the capability of channel weighting and variable output power control (attenuation), for instance, to equalize signal levels and compensate for unbalanced different optical input powers, or to equalize unbalanced EDFA gain curve. We examine the market segments appropriate for the switch size and technology, followed by a discussion of the basic features of the technology. The discussion is focused on important requirements from the switch and the technology (e.g., insertion loss, power consumption, channel isolation, extinction ratio, switching time, and heat dissipation). The mechanical design is also considered. It must take into account integration of optical fiber, optical planar wafer, analog electronics and digital microprocessor controls, embedded software, and heating power dissipation. The Lynx Photon.8x8 switch is compared to competing technologies, in terms of typical market performance requirements.

Six-beam homodyne laser Doppler vibrometry based on silicon photonics technology.

PubMed

Li, Yanlu; Zhu, Jinghao; Duperron, Matthieu; O'Brien, Peter; Schüler, Ralf; Aasmul, Soren; de Melis, Mirko; Kersemans, Mathias; Baets, Roel

2018-02-05

This paper describes an integrated six-beam homodyne laser Doppler vibrometry (LDV) system based on a silicon-on-insulator (SOI) full platform technology, with on-chip photo-diodes and phase modulators. Electronics and optics are also implemented around the integrated photonic circuit (PIC) to enable a simultaneous six-beam measurement. Measurement of a propagating guided elastic wave in an aluminum plate (speed ≈ 909 m/s @ 61.5 kHz) is demonstrated.

Solid State Technology Branch of NASA Lewis Research Center: Fifth Annual Digest

NASA Technical Reports Server (NTRS)

1993-01-01

The digest is a collection of papers written by the members of the Solid State Technology Branch of NASA Lewis Research Center from June 1992-June 1993. The papers cover a range of topics relating to superconductivity, monolithic microwave integrated circuits (MMIC's), coplanar waveguide, and material characterization.

Long-wavelength photonic integrated circuits and avalanche photodetectors

NASA Astrophysics Data System (ADS)

Tsou, Yi-Jen D.; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volume require high data communication bandwidth over longer distances. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low-cost, high-speed laser modules at 1310 to 1550 nm wavelengths and avalanche photodetectors are required. The great success of GaAs 850nm VCSEls for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits (PICs), which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform of InP-based PICs compatible with surface-emitting laser technology, as well as a high data rate externally modulated laser module. Avalanche photodetectors (APDs) are the key component in the receiver to achieve high data rate over long transmission distance because of their high sensitivity and large gain- bandwidth product. We have used wafer fusion technology to achieve InGaAs/Si APDs with much greater potential than the traditional InGaAs/InP APDs. Preliminary results on their performance will be presented.

HEMT Amplifiers and Equipment for their On-Wafer Testing

NASA Technical Reports Server (NTRS)

Fung, King man; Gaier, Todd; Samoska, Lorene; Deal, William; Radisic, Vesna; Mei, Xiaobing; Lai, Richard

2008-01-01

Power amplifiers comprising InP-based high-electron-mobility transistors (HEMTs) in coplanar-waveguide (CPW) circuits designed for operation at frequencies of hundreds of gigahertz, and a test set for onwafer measurement of their power levels have been developed. These amplifiers utilize an advanced 35-nm HEMT monolithic microwave integrated-circuit (MMIC) technology and have potential utility as local-oscillator drivers and power sources in future submillimeter-wavelength heterodyne receivers and imaging systems. The test set can reduce development time by enabling rapid output power characterization, not only of these and similar amplifiers, but also of other coplanar-waveguide power circuits, without the necessity of packaging the circuits.

Diffused Silicon Transistors and Switches (1954-55): The Beginning of Integrated Circuit Technology

NASA Astrophysics Data System (ADS)

Holonyak, N.

2003-09-01

Silicon (Si) transistor and integrated circuit (IC) technology has grown so big, and become so important, that it is now hard to recognize where, apart from the invention of the transistor itself (Bardeen and Brattain, Dec 16, 1947), it had its origin. In spite of obvious differences in Ge and Si, in 1950-55 it was not evident in many laboratories, concentrating only on Ge, what form of Ge transistor (grown, alloyed, jet-etched, etc.) might be expected to prevail, with Si not even being considered (or being dismissed outright). What was the need for Si and, at the time, such a seemingly intractable peculiar new technology? The requirement on switching devices of low leakage, and thus the need to leave Ge in favor of Si, led directly in 1954-55 (Bell Telephone Laboratories, BTL) to the exploration of impurity-diffusion and metallization technology to realize Si transistors and p-n-p-n switches. This technology, a more or less ideal thin-layer technology that can be referenced from a single surface (and which indeed has proven to be basically invariant and constantly growing), led further to the discovery (1955) of the protective Si oxide, oxide masking and patterning, and the fundamental basis of the integrated circuit (i.e., device-to-device interconnection by patterned metallization across the oxide). We recount some of the exploratory diffused-impurity Si device development of 1954-55 at BTL, particularly the work in and near Moll's group, that helped to establish the basis for today's electronics. The Si diffused-impurity devices of 1954-55 are described, including work and data not previously reported or broadly known—in fact, much work and data (a new technology) that was carried across the Country to a place that became known as Silicon Valley. For further perspective, an appendix is included of independent early suggestions of Bardeen (Urbana notebook, Feb 1952) to leave Ge in favor of diffused Si devices.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Hierarchical hybrid control of manipulators: Artificial intelligence in large scale integrated circuits

NASA Technical Reports Server (NTRS)

Greene, P. H.

1972-01-01

Both in practical engineering and in control of muscular systems, low level subsystems automatically provide crude approximations to the proper response. Through low level tuning of these approximations, the proper response variant can emerge from standardized high level commands. Such systems are expressly suited to emerging large scale integrated circuit technology. A computer, using symbolic descriptions of subsystem responses, can select and shape responses of low level digital or analog microcircuits. A mathematical theory that reveals significant informational units in this style of control and software for realizing such information structures are formulated.

Monolithic FET structures for high-power control component applications

NASA Astrophysics Data System (ADS)

Shifrin, Mitchell B.; Katzin, Peter J.; Ayasli, Yalcin

1989-12-01

A monolithic FET switch is described that can be integrated with other monolithic functions or used as a discrete component in a microwave integrated circuit structure. This device increases the power-handling capability of the conventional single FET switch by an order of magnitude. It does this by overcoming the breakdown voltage limitation of the FET device. The design, fabrication, and performance of two high-power control components using these circuits are described as examples of the implementation of this technology. They are an L-band terminated single-pole, single-throw (SPST) switch and an L-band limiter).

The use of hybrid integrated circuit techniques in biotelemetry applications

NASA Technical Reports Server (NTRS)

Fryer, T. B.

1977-01-01

A review is presented of some features of hybrid integrated circuits that make their use advantageous in miniature biotelemetry applications. The various techniques for fabricating resistors, capacitors and interconnections by both thin film and thick film technology are discussed. The use of chip capacitors, resistors, and especially standard IC chips on substrates with fired-on interconnection patterns is emphasized. The review is designed primarily to acquaint biotelemetry users and designers with an overview of this fabrication technique so that they can better communicate their needs with an understanding of its limitations and advantages to facilities specializing in hybrid construction.

Microscale autonomous sensor and communications module

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-03-25

Various technologies pertaining to a microscale autonomous sensor and communications module are described herein. Such a module includes a sensor that generates a sensor signal that is indicative of an environmental parameter. An integrated circuit receives the sensor signal and generates an output signal based at least in part upon the sensor signal. An optical emitter receives the output signal and generates an optical signal as a function of the output signal. An energy storage device is configured to provide power to at least the integrated circuit and the optical emitter, and wherein the module has a relatively small diameter and thickness.

Recent Progress in the Development of Printed Thin-Film Transistors and Circuits with High-Resolution Printing Technology.

PubMed

Fukuda, Kenjiro; Someya, Takao

2017-07-01

Printed electronics enable the fabrication of large-scale, low-cost electronic devices and systems, and thus offer significant possibilities in terms of developing new electronics/optics applications in various fields. Almost all electronic applications require information processing using logic circuits. Hence, realizing the high-speed operation of logic circuits is also important for printed devices. This report summarizes recent progress in the development of printed thin-film transistors (TFTs) and integrated circuits in terms of materials, printing technologies, and applications. The first part of this report gives an overview of the development of functional inks such as semiconductors, electrodes, and dielectrics. The second part discusses high-resolution printing technologies and strategies to enable high-resolution patterning. The main focus of this report is on obtaining printed electrodes with high-resolution patterning and the electrical performance of printed TFTs using such printed electrodes. In the final part, some applications of printed electronics are introduced to exemplify their potential. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

NASA Astrophysics Data System (ADS)

Ou-Peng, Li; Yong, Zhang; Rui-Min, Xu; Wei, Cheng; Yuan, Wang; Bing, Niu; Hai-Yan, Lu

2016-05-01

Design and characterization of a G-band (140-220 GHz) terahertz monolithic integrated circuit (TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm InGaAs/InP double heterojunction bipolar transistor (DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the InP substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140-190 GHz respectively. The saturation output powers are -2.688 dBm at 210 GHz and -2.88 dBm at 220 GHz, respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications. Project supported by the National Natural Science Foundation of China (Grant No. 61501091) and the Fundamental Research Funds for the Central Universities of Ministry of Education of China (Grant Nos. ZYGX2014J003 and ZYGX2013J020).

Laser drilling of vias in dielectric for high density multilayer LSHI thick film circuits

NASA Technical Reports Server (NTRS)

Cocca, T.; Dakesian, S.

1977-01-01

A design analysis of a high density multilevel thick film digital microcircuit used for large scale integration is presented. The circuit employs 4 mil lines, 4 mil spaces and requires 4 mil diameter vias. Present screened and fired thick film technology is limited on a production basis to 16 mil square vias. A process whereby 4 mil diameter vias can be fabricated in production using laser technology was described along with a process to produce 4 mil diameter vias for conductor patterns which have 4 mil lines and 4 mil spacings.

Thread-Like CMOS Logic Circuits Enabled by Reel-Processed Single-Walled Carbon Nanotube Transistors via Selective Doping.

PubMed

Heo, Jae Sang; Kim, Taehoon; Ban, Seok-Gyu; Kim, Daesik; Lee, Jun Ho; Jur, Jesse S; Kim, Myung-Gil; Kim, Yong-Hoon; Hong, Yongtaek; Park, Sung Kyu

2017-08-01

The realization of large-area electronics with full integration of 1D thread-like devices may open up a new era for ultraflexible and human adaptable electronic systems because of their potential advantages in demonstrating scalable complex circuitry by a simply integrated weaving technology. More importantly, the thread-like fiber electronic devices can be achieved using a simple reel-to-reel process, which is strongly required for low-cost and scalable manufacturing technology. Here, high-performance reel-processed complementary metal-oxide-semiconductor (CMOS) integrated circuits are reported on 1D fiber substrates by using selectively chemical-doped single-walled carbon nanotube (SWCNT) transistors. With the introduction of selective n-type doping and a nonrelief photochemical patterning process, p- and n-type SWCNT transistors are successfully implemented on cylindrical fiber substrates under air ambient, enabling high-performance and reliable thread-like CMOS inverter circuits. In addition, it is noteworthy that the optimized reel-coating process can facilitate improvement in the arrangement of SWCNTs, building uniformly well-aligned SWCNT channels, and enhancement of the electrical performance of the devices. The p- and n-type SWCNT transistors exhibit field-effect mobility of 4.03 and 2.15 cm 2 V -1 s -1 , respectively, with relatively narrow distribution. Moreover, the SWCNT CMOS inverter circuits demonstrate a gain of 6.76 and relatively good dynamic operation at a supply voltage of 5.0 V. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nanosatellite program at Sandia National Laboratories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Reynolds, D.A.; Kern, J.P.; Schoeneman, J.L.

1999-11-11

The concept of building extremely small satellites which, either independently or as a collective, can perform missions which are comparable to their much larger cousins, has fascinated scientists and engineers for several years now. In addition to the now commonplace microelectronic integrated circuits, the more recent advent of technologies such as photonic integrated circuits (PIC's) and micro-electromechanical systems (MEMS) have placed such a goal within their grasp. Key to the acceptance of this technology will be the ability to manufacture these very small satellites in quantity without sacrificing their performance or versatility. In support of its nuclear treaty verification, proliferationmore » monitoring and other remote sensing missions, Sandia National laboratories has had a 35-year history of providing highly capable systems, densely packaged for unintrusive piggyback missions on government satellites. As monitoring requirements have become more challenging and remote sensing technologies become more sophisticated, packaging greater capability into these systems has become a requirement. Likewise, dwindling budgets are pushing satellite programs toward smaller and smaller platforms, reinforcing the need for smaller, cheaper satellite systems. In the next step of its miniaturization plan, Sandia has begun development of technologies for a highly integrated miniature satellite. The focus of this development is to achieve nanosat or smaller dimensions while maintaining significant capability utilizing semiconductor wafer-level integration and, at the same time promoting affordability through modular generic construction.« less

Research News: Are VLSI Microcircuits Too Hard to Design?

ERIC Educational Resources Information Center

Robinson, Arthur L.

1980-01-01

This research news article on microelectronics discusses the scientific challenge the integrated circuit industry will have in the next decade, for designing the complicated microcircuits made possible by advancing miniaturization technology. (HM)

The new technological solution for the JT-60SA quench protection circuits

NASA Astrophysics Data System (ADS)

Gaio, E.; Maistrello, A.; Novello, L.; Matsukawa, M.; Perna, M.; Ferro, A.; Yamauchi, K.; Piovan, R.

2018-07-01

An advanced technology has been developed and employed for the main circuit breakers (CB) of the quench protection circuits (QPC) of the superconducting coils of JT-60SA: it consists in a Hybrid mechanical-static CB (HCB) composed of a mechanical Bypass switch (BPS) for conducting the continuous current, in parallel to a static circuit breaker (SCB) based on integrated gate commutated thyristor (IGCT) for current interruption. It was the result of a R&D program carried out since 2006 to identify innovative solutions for the interruption of high dc current, able to improve the maintainability and availability of the CB. The HCB developed for the JT-60SA QPC is the first realization of a dc circuit breaker based on this design approach for interrupting current of some tens of kA with reapplied voltage of some kV. It also represents the first application of hybrid technology with IGCT for protection of superconducting magnets in fusion experiments. The paper aims at giving a comprehensive overview of the main R&D activities devoted to the development of this new technological approach; then, the key aspects of the design, manufacturing and testing of the QPCs for JT-60SA, successfully completed in Naka Site in summer 2015 are presented. Finally, the significance of this research is discussed and the possible future developments, in particular in view of DEMO fusion reactor, are outlined.

Silicon-Germanium Films Grown on Sapphire for Ka-Band Communications Applications

NASA Technical Reports Server (NTRS)

Alterovitz, Samuel A.; Mueller, Carl H.; Croke, Edward T.

2004-01-01

NASA's vision in the space communications area is to develop a broadband data network in which there is a high degree of interconnectivity among the various satellite systems, ground stations, and wired systems. To accomplish this goal, we will need complex electronic circuits integrating analog and digital data handling at the Ka-band (26 to 40 GHz). The purpose of this project is to show the feasibility of a new technology for Ka-band communications applications, namely silicon germanium (SiGe) on sapphire. This new technology will have several advantages in comparison to the existing silicon-substrate- based circuits. The main advantages are extremely low parasitic reactances that enable much higher quality active and passive components, better device isolation, higher radiation tolerance, and the integration of digital and analog circuitry on a single chip.

A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

NASA Astrophysics Data System (ADS)

Tu, Hongen; Xu, Yong

2012-07-01

This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

NASA Astrophysics Data System (ADS)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

A readout integrated circuit based on DBI-CTIA and cyclic ADC for MEMS-array-based focal plane

NASA Astrophysics Data System (ADS)

Miao, Liu; Dong, Wu; Zheyao, Wang

2016-11-01

A readout integrated circuit (ROIC) for a MEMS (microelectromechanical system)-array-based focal plane (MAFP) intended for imaging applications is presented. The ROIC incorporates current sources for diode detectors, scanners, timing sequence controllers, differential buffered injection-capacitive trans-impedance amplifier (DBI-CTIA) and 10-bit cyclic ADCs, and is integrated with MAFP using 3-D integration technology. A small-signal equivalent model is built to include thermal detectors into circuit simulations. The biasing current is optimized in terms of signal-to-noise ratio and power consumption. Layout design is tailored to fulfill the requirements of 3-D integration and to adapt to the size of MAFP elements, with not all but only the 2 bottom metal layers to complete nearly all the interconnections in DBI-CTIA and ADC in a 40 μm wide column. Experimental chips are designed and fabricated in a 0.35 μm CMOS mixed signal process, and verified in a code density test of which the results indicate a (0.29/-0.31) LSB differential nonlinearity (DNL) and a (0.61/-0.45) LSB integral nonlinearity (INL). Spectrum analysis shows that the effective number of bits (ENOB) is 9.09. The ROIC consumes 248 mW of power at most if not to cut off quiescent current paths when not needed. Project supported by by National Natural Science Foundation of China (No. 61271130), the Beijing Municipal Science and Tech Project (No. D13110100290000), the Tsinghua University Initiative Scientific Research Program (No. 20131089225), and the Shenzhen Science and Technology Development Fund (No. CXZZ20130322170740736).

High-performance integrated pick-up circuit for SPAD arrays in time-correlated single photon counting

NASA Astrophysics Data System (ADS)

Acconcia, Giulia; Cominelli, Alessandro; Peronio, Pietro; Rech, Ivan; Ghioni, Massimo

2017-05-01

The analysis of optical signals by means of Single Photon Avalanche Diodes (SPADs) has been subject to a widespread interest in recent years. The development of multichannel high-performance Time Correlated Single Photon Counting (TCSPC) acquisition systems has undergone a fast trend. Concerning the detector performance, best in class results have been obtained resorting to custom technologies leading also to a strong dependence of the detector timing jitter from the threshold used to determine the onset of the photogenerated current flow. In this scenario, the avalanche current pick-up circuit plays a key role in determining the timing performance of the TCSPC acquisition system, especially with a large array of SPAD detectors because of electrical crosstalk issues. We developed a new current pick-up circuit based on a transimpedance amplifier structure able to extract the timing information from a 50-μm-diameter custom technology SPAD with a state-of-art timing jitter as low as 32ps and suitable to be exploited with SPAD arrays. In this paper we discuss the key features of this structure and we present a new version of the pick-up circuit that also provides quenching capabilities in order to minimize the number of interconnections required, an aspect that becomes more and more crucial in densely integrated systems.

Recent advances in integrated photonic sensors.

PubMed

Passaro, Vittorio M N; de Tullio, Corrado; Troia, Benedetto; La Notte, Mario; Giannoccaro, Giovanni; De Leonardis, Francesco

2012-11-09

Nowadays, optical devices and circuits are becoming fundamental components in several application fields such as medicine, biotechnology, automotive, aerospace, food quality control, chemistry, to name a few. In this context, we propose a complete review on integrated photonic sensors, with specific attention to materials, technologies, architectures and optical sensing principles. To this aim, sensing principles commonly used in optical detection are presented, focusing on sensor performance features such as sensitivity, selectivity and rangeability. Since photonic sensors provide substantial benefits regarding compatibility with CMOS technology and integration on chips characterized by micrometric footprints, design and optimization strategies of photonic devices are widely discussed for sensing applications. In addition, several numerical methods employed in photonic circuits and devices, simulations and design are presented, focusing on their advantages and drawbacks. Finally, recent developments in the field of photonic sensing are reviewed, considering advanced photonic sensor architectures based on linear and non-linear optical effects and to be employed in chemical/biochemical sensing, angular velocity and electric field detection.

Recent Advances in Integrated Photonic Sensors

PubMed Central

Passaro, Vittorio M. N.; de Tullio, Corrado; Troia, Benedetto; La Notte, Mario; Giannoccaro, Giovanni; De Leonardis, Francesco

2012-01-01

Nowadays, optical devices and circuits are becoming fundamental components in several application fields such as medicine, biotechnology, automotive, aerospace, food quality control, chemistry, to name a few. In this context, we propose a complete review on integrated photonic sensors, with specific attention to materials, technologies, architectures and optical sensing principles. To this aim, sensing principles commonly used in optical detection are presented, focusing on sensor performance features such as sensitivity, selectivity and rangeability. Since photonic sensors provide substantial benefits regarding compatibility with CMOS technology and integration on chips characterized by micrometric footprints, design and optimization strategies of photonic devices are widely discussed for sensing applications. In addition, several numerical methods employed in photonic circuits and devices, simulations and design are presented, focusing on their advantages and drawbacks. Finally, recent developments in the field of photonic sensing are reviewed, considering advanced photonic sensor architectures based on linear and non-linear optical effects and to be employed in chemical/biochemical sensing, angular velocity and electric field detection. PMID:23202223

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Optical detectors for GaAs MMIC integration: Technology assessment

NASA Technical Reports Server (NTRS)

Claspy, P. C.; Bhasin, K. B.

1989-01-01

Fiber optic links are being considered to transmit digital and analog signals in phased array antenna feed networks in space communications systems. The radiating elements in these arrays will be GaAs monolithic microwave integrated circuits (MMIC's) in numbers ranging from a few hundred to several thousand. If such optical interconnects are to be practical it appears essential that the associated components, including detectors, be monolithically integrated on the same chip as the microwave circuitry. The general issue of monolithic integration of microwave and optoelectronic components is addressed from the point of view of fabrication technology and compatibility. Particular attention is given to the fabrication technology of various types of GaAs optical detectors that are designed to operate at a wavelength of 830 nm.

VLSI technology for smaller, cheaper, faster return link systems

NASA Technical Reports Server (NTRS)

Nanzetta, Kathy; Ghuman, Parminder; Bennett, Toby; Solomon, Jeff; Dowling, Jason; Welling, John

1994-01-01

Very Large Scale Integration (VLSI) Application-specific Integrated Circuit (ASIC) technology has enabled substantially smaller, cheaper, and more capable telemetry data systems. However, the rapid growth in available ASIC fabrication densities has far outpaced the application of this technology to telemetry systems. Available densities have grown by well over an order magnitude since NASA's Goddard Space Flight Center (GSFC) first began developing ASIC's for ground telemetry systems in 1985. To take advantage of these higher integration levels, a new generation of ASIC's for return link telemetry processing is under development. These new submicron devices are designed to further reduce the cost and size of NASA return link processing systems while improving performance. This paper describes these highly integrated processing components.

A New Microelectronics Curriculum Created by Synopsys, Inc.

ERIC Educational Resources Information Center

Goldman, Rich; Bartleson, Karen; Wood, Troy; Melikyan, Vazgen; Wang, Zhi-hua; Chen, Lan

2009-01-01

Rapid changes in integrated circuits (IC) technology and constantly shrinking process geometries demand a new curriculum that meets the contemporary requirements for IC design. This is especially important for 90nm and below technologies and the use of state-of-the-art EDA design tools and advanced IC design techniques. The creation of new…

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

NASA Technical Reports Server (NTRS)

Vasile, Stefan; Lipson, Jerold

2012-01-01

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Reconfigurable Cellular Photonic Crystal Arrays (RCPA)

DTIC Science & Technology

2013-03-01

signal processing based on reconfigurable integrated optics devices. This technology has the potential to revolutionize the design circle of optical...Accomplishments III.A. Design and fabrication of an accumulation-mode modulator Figure 1(a) shows the schematic of a compact resonator on the double-Si... integration of silicon nitride on silicon-on-insulator platform to enhance the arsenal of photonic circuit designers . The coherent integration of

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Interfacing spin qubits in quantum dots and donors—hot, dense, and coherent

NASA Astrophysics Data System (ADS)

Vandersypen, L. M. K.; Bluhm, H.; Clarke, J. S.; Dzurak, A. S.; Ishihara, R.; Morello, A.; Reilly, D. J.; Schreiber, L. R.; Veldhorst, M.

2017-09-01

Semiconductor spins are one of the few qubit realizations that remain a serious candidate for the implementation of large-scale quantum circuits. Excellent scalability is often argued for spin qubits defined by lithography and controlled via electrical signals, based on the success of conventional semiconductor integrated circuits. However, the wiring and interconnect requirements for quantum circuits are completely different from those for classical circuits, as individual direct current, pulsed and in some cases microwave control signals need to be routed from external sources to every qubit. This is further complicated by the requirement that these spin qubits currently operate at temperatures below 100 mK. Here, we review several strategies that are considered to address this crucial challenge in scaling quantum circuits based on electron spin qubits. Key assets of spin qubits include the potential to operate at 1 to 4 K, the high density of quantum dots or donors combined with possibilities to space them apart as needed, the extremely long-spin coherence times, and the rich options for integration with classical electronics based on the same technology.

Arbitrary-Shaped Graphene-Based Planar Sandwich Supercapacitors on One Substrate with Enhanced Flexibility and Integration.

PubMed

Zheng, Shuanghao; Tang, Xingyan; Wu, Zhong-Shuai; Tan, Yuan-Zhi; Wang, Sen; Sun, Chenglin; Cheng, Hui-Ming; Bao, Xinhe

2017-02-28

The emerging smart power source-unitized electronics represent an utmost innovative paradigm requiring dramatic alteration from materials to device assembly and integration. However, traditional power sources with huge bottlenecks on the design and performance cannot keep pace with the revolutionized progress of shape-confirmable integrated circuits. Here, we demonstrate a versatile printable technology to fabricate arbitrary-shaped, printable graphene-based planar sandwich supercapacitors based on the layer-structured film of electrochemically exfoliated graphene as two electrodes and nanosized graphene oxide (lateral size of 100 nm) as a separator on one substrate. These monolithic planar supercapacitors not only possess arbitrary shapes, e.g., rectangle, hollow-square, "A" letter, "1" and "2" numbers, circle, and junction-wire shape, but also exhibit outstanding performance (∼280 F cm -3 ), excellent flexibility (no capacitance degradation under different bending states), and applicable scalability, which are far beyond those achieved by conventional technologies. More notably, such planar supercapacitors with superior integration can be readily interconnected in parallel and series, without use of metal interconnects and contacts, to modulate the output current and voltage of modular power sources for designable integrated circuits in various shapes and sizes.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Programmable logic devices

NASA Astrophysics Data System (ADS)

Jacobs, J. L.

1993-04-01

Erasable programmable logic devices (EPLD's) were investigated to determine their advantages and/or disadvantages in Test Equipment Engineering applications. It was found that EPLD's performed as well as or better than identical circuits using standard transistor transistor logic (TTL). The chip count in these circuits was reduced, saving printed circuit board space and shortening fabrication and prove-in time. Troubleshooting circuits of EPLD's was also easier with 10 to 100 times fewer wires needed. The reduced number of integrated circuits (IC's) contributed to faster system speeds and an overall lower power consumption. In some cases changes to the circuit became software changes using EPLD's instead of hardware changes for standard logic. Using EPLD's was fairly easy; however, as with any new technology, a learning curve must be overcome before EPLD's can be used efficiently. The many benefits of EPLD's outweighed this initial inconvenience.

Modular minimally invasive extracorporeal circulation systems; can they become the standard practice for performing cardiac surgery?

PubMed

Anastasiadis, K; Antonitsis, P; Argiriadou, H; Deliopoulos, A; Grosomanidis, V; Tossios, P

2015-04-01

Minimally invasive extracorporeal circulation (MiECC) has been developed in an attempt to integrate all advances in cardiopulmonary bypass technology in one closed circuit that shows improved biocompatibility and minimizes the systemic detrimental effects of CPB. Despite well-evidenced clinical advantages, penetration of MiECC technology into clinical practice is hampered by concerns raised by perfusionists and surgeons regarding air handling together with blood and volume management during CPB. We designed a modular MiECC circuit, bearing an accessory circuit for immediate transition to an open system that can be used in every adult cardiac surgical procedure, offering enhanced safety features. We challenged this modular circuit in a series of 50 consecutive patients. Our results showed that the modular AHEPA circuit design offers 100% technical success rate in a cohort of random, high-risk patients who underwent complex procedures, including reoperation and valve and aortic surgery, together with emergency cases. This pilot study applies to the real world and prompts for further evaluation of modular MiECC systems through multicentre trials. © The Author(s) 2015.

Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays

NASA Technical Reports Server (NTRS)

Edwards, R. Timothy; Strohbehn, Kim; Jaskulek, Steven E.; Katz, Richard

1999-01-01

Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.

In-plant testing of a novel coal cleaning circuit using advanced technologies. Final technical report, September 1, 1995--August 31, 1996

DOE Office of Scientific and Technical Information (OSTI.GOV)

Honaker, R.Q.; Reed, S.; Mohanty, M.K.

1997-05-01

A circuit comprised of advanced fine coal cleaning technologies was evaluated in an operating preparation plant to determine circuit performance and to compare the performance with current technologies used to treat -16 mesh fine coal. The circuit integrated a Floatex hydrosizer, a Falcon enhanced gravity concentrator and a Jameson flotation cell. A Packed-Column was used to provide additional reductions in the pyritic sulfur and ash contents by treatment of the Floatex-Falcon-Jameson circuit product. For a low sulfur Illinois No. 5 coal, the pyritic sulfur content was reduced from 0.67% to 0.34% at a combustible recovery of 93.2%. The ash contentmore » was decreased from 27.6% to 5.84%, which equates to an organic efficiency of 95% according to gravity-based washability data. The separation performance achieved on a high sulfur Illinois No. 5 coal resulted in the rejection of 72.7% of the pyritic sulfur and 82.3% of the ash-forming material at a recovery of 8 1 %. Subsequent pulverization of the cleaned product and retreatment in a Falcon concentrator and Packed-Column resulted in overall circuit ash and pyritic sulfur rejections of 89% and 93%, respectively, which yielded a pyritic sulfur content reduction from 2.43% to 0.30%. This separation reduced the sulfur dioxide emission rating of an Illinois No. 5 coal from 6.21 to 1.75 lbs SO{sub 2}/MBTU, which is Phase I compliance coal. A comparison of the results obtained from the Floatex-Falcon-Jameson circuit with those of the existing circuit revealed that the novel fine coal circuit provides 10% to 20% improvement in mass yield to the concentrate while rejecting greater amounts of ash and pyritic sulfur.« less

Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

NASA Astrophysics Data System (ADS)

Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

2018-03-01

This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit.

PubMed

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-21

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10 -9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Integrated biocircuits: engineering functional multicellular circuits and devices.

PubMed

Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

2018-04-01

Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

NASA Astrophysics Data System (ADS)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10-9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Integrated biocircuits: engineering functional multicellular circuits and devices

NASA Astrophysics Data System (ADS)

Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

2018-04-01

Objective. Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. Approach. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. Main results. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. Significance. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

PubMed Central

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-01-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than −30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10−9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers. PMID:28000735

Super-Lattice Light Emitting Diodes (SLEDS) on GaAs

DTIC Science & Technology

2016-03-31

Super-Lattice Light Emitting Diodes (SLEDS) on GaAs Kassem Nabha1, Russel Ricker2, Rodney McGee1, Nick Waite1, John Prineas2, Sydney Provence2...infrared light emitting diodes (LEDs). Typically, the LED arrays are mated with CMOS read-in integrated circuit (RIIC) chips using flip-chip bonding. In...circuit (RIIC) chips using flip-chip bonding. This established technology is called Hybrid-super-lattice light emitting diodes (Hybrid- SLEDS). In

Design of Low Power CMOS Read-Out with TDI Function for Infrared Linear Photodiode Array Detectors

NASA Technical Reports Server (NTRS)

Vizcaino, Paul; Ramirez-Angulo, Jaime; Patel, Umesh D.

2007-01-01

A new low voltage CMOS infrared readout circuit using the buffer-direct injection method is presented. It uses a single supply voltage of 1.8 volts and a bias current of 1uA. The time-delay integration technique is used to increase the signal to noise ratio. A current memory circuit with faulty diode detection is used to remove dark current for background compensation and to disable a photodiode in a cell if detected as faulty. Simulations are shown that verify the circuit that is currently in fabrication in 0.5ym CMOS technology.

RAD hard PROM design study

NASA Technical Reports Server (NTRS)

1981-01-01

The results of a preliminary study on the design of a radiation hardened fusible link programmable read-only memory (PROM) are presented. Various fuse technologies and the effects of radiation on MOS integrated circuits are surveyed. A set of design rules allowing the fabrication of a radiation hardened PROM using a Si-gate CMOS process is defined. A preliminary cell layout was completed and the programming concept defined. A block diagram is used to describe the circuit components required for a 4 K design. A design goal data sheet giving target values for the AC, DC, and radiation parameters of the circuit is presented.

A family of neuromuscular stimulators with optical transcutaneous control.

PubMed

Jarvis, J C; Salmons, S

1991-01-01

A family of miniature implantable neuromuscular stimulators has been developed using surface-mounted Philips 4000-series integrated circuits. The electronic components are mounted by hand on printed circuits (platinum/gold on alumina) and the electrical connections are made by reflow soldering. The plastic integrated-circuit packages, ceramic resistors and metal interconnections are protected from the body fluids by a coating of biocompatible silicone rubber. This simple technology provides reliable function for at least 4 months under implanted conditions. The circuits have in common a single lithium cell power-supply (3.2 V) and an optical sensor which can be used to detect light flashes through the skin after the device has been implanted. This information channel may be used to switch the output of a device on or off, or to cycle through a series of pre-set programs. The devices are currently finding application in studies which provide an experimental basis for the clinical exploitation of electrically stimulated skeletal muscle in cardiac assistance, sphincter reconstruction or functional electrical stimulation of paralysed limbs.

Application of software technology to a future spacecraft computer design

NASA Technical Reports Server (NTRS)

Labaugh, R. J.

1980-01-01

A study was conducted to determine how major improvements in spacecraft computer systems can be obtained from recent advances in hardware and software technology. Investigations into integrated circuit technology indicated that the CMOS/SOS chip set being developed for the Air Force Avionics Laboratory at Wright Patterson had the best potential for improving the performance of spaceborne computer systems. An integral part of the chip set is the bit slice arithmetic and logic unit. The flexibility allowed by microprogramming, combined with the software investigations, led to the specification of a baseline architecture and instruction set.

Design of 2.4Ghz CMOS Floating Active Inductor LNA using 130nm Technology

NASA Astrophysics Data System (ADS)

Muhamad, M.; Soin, N.; Ramiah, H.

2018-03-01

This paper presents about design and optimization of CMOS active inductor integrated circuit. This active inductor implements using Silterra 0.13μm technology and simulated using Cadence Virtuoso and Spectre RF. The center frequency for this active inductor is at 2.4 GHz which follow IEEE 802.11 b/g/n standard. To reduce the chip size of silicon, active inductor is used instead of passive inductor at low noise amplifier LNA circuit. This inductor test and analyse by low noise amplifier circuit. Comparison between active with passive inductor based on LNA circuit has been performed. Result shown that the active inductor has significantly reduce the chip size with 73 % area without sacrificing the noise figure and gain of LNA which is the most important criteria in LNA. The best low noise amplifier provides a power gain (S21) of 20.7 dB with noise figure (NF) of 2.1dB.

Mode-locked laser with pulse interleavers in a monolithic photonic integrated circuit for millimeter wave and terahertz carrier generation.

PubMed

Lo, Mu-Chieh; Guzmán, Robinson; Gordón, Carlos; Carpintero, Guillermo

2017-04-15

This Letter presents a photonics-based millimeter wave and terahertz frequency synthesizer using a monolithic InP photonic integrated circuit composed of a mode-locked laser (MLL) and two pulse interleaver stages to multiply the repetition rate frequency. The MLL is a multiple colliding pulse MLL producing an 80 GHz repetition rate pulse train. Through two consecutive monolithic pulse interleaver structures, each doubling the repetition rate, we demonstrate the achievement of 160 and 320 GHz. The fabrication was done on a multi-project wafer run of a generic InP photonic technology platform.

Heterogeneous integration of low-temperature metal-oxide TFTs

NASA Astrophysics Data System (ADS)

Schuette, Michael L.; Green, Andrew J.; Leedy, Kevin D.; McCandless, Jonathan P.; Jessen, Gregg H.

2017-02-01

The breadth of circuit fabrication opportunities enabled by metal-oxide thin-film transistors (MO-TFTs) is unprecedented. Large-area deposition techniques and high electron mobility are behind their adoption in the display industry, and substrate agnosticism and low process temperatures enabled the present wave of flexible electronics research. Reports of circuits involving complementaryMO-TFTs, oxide-organic hybrid combinations, and even MO-TFTs integrated onto Si LSI back end of line interconnects demonstrate this technology's utility in 2D and 3D monolithic heterogeneous integration (HI). In addition to a brief literature review focused on functional HI between MO-TFTs and a variety of dissimilar active devices, we share progress toward integrating MO-TFTs with compound semiconductor devices, namely GaN HEMTs. A monolithically integrated cascode topology was used to couple a HEMT's >200 V breakdown characteristic with the gate driving characteristic of an IGZO TFT, effectively shifting the HEMT threshold voltage from -3 V to +1 V.

A fast low-power optical memory based on coupled micro-ring lasers

NASA Astrophysics Data System (ADS)

Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

2004-11-01

The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

Effects of /spl gamma/-rays on JFET devices and circuits fabricated in a detector-compatible Process

NASA Astrophysics Data System (ADS)

Betta, G. F. D.; Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.

2003-12-01

This work is concerned with the effects of /spl gamma/-rays on the static, signal and noise characteristics of JFET-based circuits belonging to a fabrication technology made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy. Such a process has been tuned with the aim of monolithically integrating the readout electronics on the same highly resistive substrate as multielectrode silicon detectors. The radiation tolerance of some test structures, including single devices and charge sensitive amplifiers, was studied in view of low-noise applications in industrial and medical imaging, X- and /spl gamma/-ray astronomy and high energy physics experiments. This paper intends to fill the gap in the study of gamma radiation effects on JFET devices and circuits belonging to detector-compatible technologies.

The Department of Defense Very High Speed Integrated Circuit (VHSIC) Technology Availability Program Plan for the Committees on Armed Services United States Congress.

DTIC Science & Technology

1986-06-30

features of computer aided design systems and statistical quality control procedures that are generic to chip sets and processes. RADIATION HARDNESS -The...System PSP Programmable Signal Processor SSI Small Scale Integration ." TOW Tube Launched, Optically Tracked, Wire Guided TTL Transistor Transitor Logic

Survey Of High Speed Test Techniques

NASA Astrophysics Data System (ADS)

Gheewala, Tushar

1988-02-01

The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.

Telemetry advances in data compression and channel coding

NASA Technical Reports Server (NTRS)

Miller, Warner H.; Morakis, James C.; Yeh, Pen-Shu

1990-01-01

Addressed in this paper is the dependence of telecommunication channel, forward error correcting coding and source data compression coding on integrated circuit technology. Emphasis is placed on real time high speed Reed Solomon (RS) decoding using full custom VLSI technology. Performance curves of NASA's standard channel coder and a proposed standard lossless data compression coder are presented.

Micro and nano devices in passive millimetre wave imaging systems

NASA Astrophysics Data System (ADS)

Appleby, R.

2013-06-01

The impact of micro and nano technology on millimetre wave imaging from the post war years to the present day is reviewed. In the 1950s whisker contacted diodes in mixers and vacuum tubes were used to realise both radiometers and radars but required considerable skill to realise the performance needed. Development of planar semiconductor devices such as Gunn and Schottky diodes revolutionised mixer performance and provided considerable improvement. The next major breakthrough was high frequency transistors based on gallium arsenide which were initially used at intermediate frequencies but later after further development at millimeter wave frequencies. More recently Monolithic Microwave Integrated circuits(MMICs) offer exceptional performance and the opportunity for innovative design in passive imaging systems. In the future the use of micro and nano technology will continue to drive system performance and we can expect to see integration of antennae, millimetre wave and sub millimetre wave circuits and signal processing.

Moore's law and the impact on trusted and radiation-hardened microelectronics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ma, Kwok Kee

2011-12-01

In 1965 Gordon Moore wrote an article claiming that integrated circuit density would scale exponentially. His prediction has remained valid for more than four decades. Integrated circuits have changed all aspects of everyday life. They are also the 'heart and soul' of modern systems for defense, national infrastructure, and intelligence applications. The United States government needs an assured and trusted microelectronics supply for military systems. However, migration of microelectronics design and manufacturing from the United States to other countries in recent years has placed the supply of trusted microelectronics in jeopardy. Prevailing wisdom dictates that it is necessary to usemore » microelectronics fabricated in a state-of-the-art technology for highest performance and military system superiority. Close examination of silicon microelectronics technology evolution and Moore's Law reveals that this prevailing wisdom is not necessarily true. This presents the US government the possibility of a totally new approach to acquire trusted microelectronics.« less

Compact earth stations, hubs for energy industry expanding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shimabukuro, T.

1992-02-01

That paper reports that advances in gallium arsenide (GaAs) technology, monolithic microwave integrated circuits (MMIC) and large scale integrated (VLSF) circuits, have contributed to the mass production of very reliable small aperture terminals (VSATs). Less publicized, but equally important to multinational energy organizations, are recent developments in compact earth station design and solid-state hubs for VSAT networks made possible by the new technology. Many applications are suited for the energy industry that involve compact earth station terminals and hubs. The first group of applications describes the use of GTE's ACES earth station for the Zaire Gulf Oil Co. in Zairemore » and for AMOCO in Trinidad. The second group of applications describes the compact hub for VSAT networks, which could potentially have a number of data communication uses in the energy industry, such as, IBM/SNA, X.25, or supervisory control an data acquisition (SCADA) applications.« less

Erbium-doped zinc-oxide waveguide amplifiers for hybrid photonic integrated circuits

NASA Astrophysics Data System (ADS)

O'Neal, Lawrence; Anthony, Deion; Bonner, Carl; Geddis, Demetris

2016-02-01

CMOS logic circuits have entered the sub-100nm regime, and research is on-going to investigate the quantum effects that are apparent at this dimension. To avoid some of the constraints imposed by fabrication, entropy, energy, and interference considerations for nano-scale devices, many have begun designing hybrid and/or photonic integrated circuits. These circuits consist of transistors, light emitters, photodetectors, and electrical and optical waveguides. As attenuation is a limiting factor in any communications system, it is advantageous to integrate a signal amplifier. There are numerous examples of electrical amplifiers, but in order to take advantage of the benefits provided by optically integrated systems, optical amplifiers are necessary. The erbium doped fiber amplifier is an example of an optical amplifier which is commercially available now, but the distance between the amplifier and the device benefitting from amplification can be decreased and provide greater functionality by providing local, on-chip amplification. Zinc oxide is an attractive material due to its electrical and optical properties. Its wide bandgap (≍3.4 eV) and high refractive index (≍2) make it an excellent choice for integrated optics systems. Moreover, erbium doped zinc oxide (Er:ZnO) is a suitable candidate for optical waveguide amplifiers because of its compatibility with semiconductor processing technology, 1.54 μm luminescence, transparency, low resistivity, and amplification characteristics. This research presents the characterization of radio frequency magnetron sputtered Er:ZnO, the design and fabrication of integrated waveguide amplifiers, and device analysis.

Testbed Experiment for SPIDER: A Photonic Integrated Circuit-based Interferometric imaging system

NASA Astrophysics Data System (ADS)

Badham, K.; Duncan, A.; Kendrick, R. L.; Wuchenich, D.; Ogden, C.; Chriqui, G.; Thurman, S. T.; Su, T.; Lai, W.; Chun, J.; Li, S.; Liu, G.; Yoo, S. J. B.

The Lockheed Martin Advanced Technology Center (LM ATC) and the University of California at Davis (UC Davis) are developing an electro-optical (EO) imaging sensor called SPIDER (Segmented Planar Imaging Detector for Electro-optical Reconnaissance) that seeks to provide a 10x to 100x size, weight, and power (SWaP) reduction alternative to the traditional bulky optical telescope and focal-plane detector array. The substantial reductions in SWaP would reduce cost and/or provide higher resolution by enabling a larger-aperture imager in a constrained volume. Our SPIDER imager replaces the traditional optical telescope and digital focal plane detector array with a densely packed interferometer array based on emerging photonic integrated circuit (PIC) technologies that samples the object being imaged in the Fourier domain (i.e., spatial frequency domain), and then reconstructs an image. Our approach replaces the large optics and structures required by a conventional telescope with PICs that are accommodated by standard lithographic fabrication techniques (e.g., complementary metal-oxide-semiconductor (CMOS) fabrication). The standard EO payload integration and test process that involves precision alignment and test of optical components to form a diffraction limited telescope is, therefore, replaced by in-process integration and test as part of the PIC fabrication, which substantially reduces associated schedule and cost. In this paper we describe the photonic integrated circuit design and the testbed used to create the first images of extended scenes. We summarize the image reconstruction steps and present the final images. We also describe our next generation PIC design for a larger (16x area, 4x field of view) image.

Photonic quantum technologies (Presentation Recording)

NASA Astrophysics Data System (ADS)

O'Brien, Jeremy L.

2015-09-01

The impact of quantum technology will be profound and far-reaching: secure communication networks for consumers, corporations and government; precision sensors for biomedical technology and environmental monitoring; quantum simulators for the design of new materials, pharmaceuticals and clean energy devices; and ultra-powerful quantum computers for addressing otherwise impossibly large datasets for machine learning and artificial intelligence applications. However, engineering quantum systems and controlling them is an immense technological challenge: they are inherently fragile; and information extracted from a quantum system necessarily disturbs the system itself. Of the various approaches to quantum technologies, photons are particularly appealing for their low-noise properties and ease of manipulation at the single qubit level. We have developed an integrated waveguide approach to photonic quantum circuits for high performance, miniaturization and scalability. We will described our latest progress in generating, manipulating and interacting single photons in waveguide circuits on silicon chips.

Fast, High-Precision Readout Circuit for Detector Arrays

NASA Technical Reports Server (NTRS)

Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

2013-01-01

The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

Arrays of Carbon Nanotubes as RF Filters in Waveguides

NASA Technical Reports Server (NTRS)

Hoppe, Daniel; Hunt, Brian; Hoenk, Michael; Noca, Flavio; Xu, Jimmy

2003-01-01

Brushlike arrays of carbon nanotubes embedded in microstrip waveguides provide highly efficient (high-Q) mechanical resonators that will enable ultraminiature radio-frequency (RF) integrated circuits. In its basic form, this invention is an RF filter based on a carbon nanotube array embedded in a microstrip (or coplanar) waveguide, as shown in Figure 1. In addition, arrays of these nanotube-based RF filters can be used as an RF filter bank. Applications of this new nanotube array device include a variety of communications and signal-processing technologies. High-Q resonators are essential for stable, low-noise communications, and radar applications. Mechanical oscillators can exhibit orders of magnitude higher Qs than electronic resonant circuits, which are limited by resistive losses. This has motivated the development of a variety of mechanical resonators, including bulk acoustic wave (BAW) resonators, surface acoustic wave (SAW) resonators, and Si and SiC micromachined resonators (known as microelectromechanical systems or MEMS). There is also a strong push to extend the resonant frequencies of these oscillators into the GHz regime of state-of-the-art electronics. Unfortunately, the BAW and SAW devices tend to be large and are not easily integrated into electronic circuits. MEMS structures have been integrated into circuits, but efforts to extend MEMS resonant frequencies into the GHz regime have been difficult because of scaling problems with the capacitively-coupled drive and readout. In contrast, the proposed devices would be much smaller and hence could be more readily incorporated into advanced RF (more specifically, microwave) integrated circuits.

NPS-SCAT: Systems Engineering and Payload Subsystem Design, Integration, and Testing of NPS’ First CubeSat

DTIC Science & Technology

2010-06-01

Subsystem Design, Integration, and Testing of NPS’ First CubeSat 6. AUTHOR(S) Jenkins, Robert D. IV 5. FUNDING NUMBERS 7. PERFORMING ORGANIZATION NAME(S...AND ADDRESS(ES) Naval Postgraduate School Monterey, CA 93943-5000 8. PERFORMING ORGANIZATION REPORT NUMBER 9. SPONSORING /MONITORING...Experimental Mission SOIC Small Outline Integrated Circuit SOT Small Outline Transistor SpaceX Space Exploration Technologies Corporation SPI

S-MMICs: Sub-mm-Wave Transistors and Integrated Circuits

DTIC Science & Technology

2008-09-01

Research Lab BAA DAAD19-03-R-0017 Research area 2.35: RF devices—Dr. Alfred Hung Submitted by: Mark Rodwell, Department of Electrical and Computer ...MOTIVATION / APPLICATION 3 TECHNOLOGY STATUS 4 TRANSISTOR SCALING LAWS 5 256 NM GENERATION 6 HBT POWER AMPLIFIER DEVELOPMENT 7 DRY-ETCHED EMITTER...TECHNOLOGY: 256 NM GENERATION 9 SCALED EPITAXY 11 CONCLUSIONS 12 20081103013 Executive Summary Transistor and power amplifier IC technology was

Optical MEMS platform for low-cost on-chip integration of planar light circuits and optical switching

NASA Astrophysics Data System (ADS)

German, Kristine A.; Kubby, Joel; Chen, Jingkuang; Diehl, James; Feinberg, Kathleen; Gulvin, Peter; Herko, Larry; Jia, Nancy; Lin, Pinyen; Liu, Xueyuan; Ma, Jun; Meyers, John; Nystrom, Peter; Wang, Yao Rong

2004-07-01

Xerox Corporation has developed a technology platform for on-chip integration of latching MEMS optical waveguide switches and Planar Light Circuit (PLC) components using a Silicon On Insulator (SOI) based process. To illustrate the current state of this new technology platform, working prototypes of a Reconfigurable Optical Add/Drop Multiplexer (ROADM) and a l-router will be presented along with details of the integrated latching MEMS optical switches. On-chip integration of optical switches and PLCs can greatly reduce the size, manufacturing cost and operating cost of multi-component optical equipment. It is anticipated that low-cost, low-overhead optical network products will accelerate the migration of functions and services from high-cost long-haul markets to price sensitive markets, including networks for metropolitan areas and fiber to the home. Compared to the more common silica-on-silicon PLC technology, the high index of refraction of silicon waveguides created in the SOI device layer enables miniaturization of optical components, thereby increasing yield and decreasing cost projections. The latching SOI MEMS switches feature moving waveguides, and are advantaged across multiple attributes relative to alternative switching technologies, such as thermal optical switches and polymer switches. The SOI process employed was jointly developed under the auspice of the NIST APT program in partnership with Coventor, Corning IntelliSense Corp., and MicroScan Systems to enable fabrication of a broad range of free space and guided wave MicroOptoElectroMechanical Systems (MOEMS).

Realization of MEMS-IC Vertical Integration Utilizing Smart Bumpless Bonding

NASA Astrophysics Data System (ADS)

Shiozaki, Masayoshi; Moriguchi, Makoto; Sasaki, Sho; Oba, Masatoshi

This paper reports fundamental technologies, properties, and new experimental results of SBB (Smart Bumpless Bonding) to realize MEMS-IC vertical integration. Although conventional bonding technologies have had difficulties integrating MEMS and its processing circuit because of their rough bonding surfaces, fragile structures, and thermal restriction, SBB technology realized the vertical integration without thermal treatment, any adhesive materials including bumps, and chemical mechanical polishing. The SBB technology bonds sealing parts for vacuum sealing and electrodes for electrical connection simultaneously as published in previous experimental study. The plasma CVD SiO2 is utilized to realize vacuum sealing as sealing material. And Au projection studs are formed on each electrode and connected electrically between two wafers by compressive plastic deformation and surface activation. In this paper, new experimental results including vacuum sealing properties, electrical improvement, IC bonding results on the described fundamental concept and properties are reported.

Open Source Radiation Hardened by Design Technology

NASA Technical Reports Server (NTRS)

Shuler, Robert

2016-01-01

The proposed technology allows use of the latest microcircuit technology with lowest power and fastest speed, with minimal delay and engineering costs, through new Radiation Hardened by Design (RHBD) techniques that do not require extensive process characterization, technique evaluation and re-design at each Moore's Law generation. The separation of critical node groups is explicitly parameterized so it can be increased as microcircuit technologies shrink. The technology will be open access to radiation tolerant circuit vendors. INNOVATION: This technology would enhance computation intensive applications such as autonomy, robotics, advanced sensor and tracking processes, as well as low power applications such as wireless sensor networks. OUTCOME / RESULTS: 1) Simulation analysis indicates feasibility. 2)Compact voting latch 65 nanometer test chip designed and submitted for fabrication -7/2016. INFUSION FOR SPACE / EARTH: This technology may be used in any digital integrated circuit in which a high level of resistance to Single Event Upsets is desired, and has the greatest benefit outside low earth orbit where cosmic rays are numerous.

Low-Dimensional Nanomaterials and Molecular Dielectrics for Radiation-Hard Electronics

NASA Astrophysics Data System (ADS)

McMorrow, Julian

The electronic materials research driving Moore's law has provided several decades of increasingly powerful yet simultaneously miniaturized computer technologies. As we approach the physical and practical limits of what can be accomplished with silicon electronics, we look to new materials to drive innovation in future electronic applications. New materials paradigms require the development of understanding from first principles to the demonstration of applications that comes with mature technologies. Semiconducting single-walled carbon nanotubes (SWCNTs), single- and few-layer molybdenum disulfide (MoS2) and self-assembled nanodielectric (SAND) gate materials have all made significant impacts in the research field of unconventional electronic materials. The materials selection, interfaces between materials, processing steps to assemble them, and their interaction with their environment all have significant bearing on the operation of the overall device. Operating in harsh radiation environments, like those of satellites orbiting the Earth, present unique challenges to the functionality and reliability of electronic devices. Because the future of space-bound electronics is often informed by the technology of terrestrial devices, a proactive approach is adopted to identify and understand the radiation response of new materials systems as they emerge and develop. The work discussed here drives the innovation and development of multiple nanomaterial based electronic technologies while simultaneously exploring their relevant radiation response mechanisms. First, collaborative efforts result in the demonstration of a SWCNT-based circuit technology that is solution processed, large-area, and compatible with flexible substrates. The statistical characterization of SWCNT transistors enables the development of robust doping and encapsulation schemes, which make the SWCNT circuits stable, scalable, and low-power. These SWCNTs are then integrated into static random access memory (SRAM) cells, an accomplishment that illustrates the technological relevance of this work by implementing a highly utilized component of modern day computing. Next, these SRAM devices demonstrate functionality as true random number generators (TRNGs), which are critical components in cryptography and encryption. The randomness of these SWCNT TRNGs is verified by a suite of statistical tests. This achievement has implications for securing data and communication in future solution-processed, large-area, flexible electronics. The unprecedented integration achieved by the underlying SWCNT doping and encapsulation motivates the study of this technology in a radiation environment. Doing so results in an understanding of the fundamental charge trapping mechanisms responsible for the radiation response in this system. The integrated nature of these devices enables, for the first time, the observation of system-level effects in a SWCNT integrated circuit technology. This technology is found to be total ionizing dose-hard, a promising result for the adoption of SWCNTs in future space-bound applications. Compared to SWCNTs, the field of MoS2 electronics is relatively nascent. As a result, studies of radiation effects in MoS2 devices focus on the fundamental mechanisms at play in the materials system. Here, we reveal the critical role of atmospheric adsorbates in the radiation effects of MoS2 transistors by measuring their response to vacuum ultraviolet radiation. These results highlight the importance of controlling the atmosphere of MoS2 devices during irradiation. Furthermore, we make recommendations for radiation-hard MoS2-based devices in the future as the technology continues to mature. One such recommendation is the incorporation of specialized dielectrics with proven radiation hardness. To this end, we address the materials integration challenge of incorporating SAND gate dielectrics on arbitrary substrates. We explore a novel approach for preparing metal substrates for SAND deposition, supporting the SAND superlattice structure and its superlative electronic properties on a metal surface. This result is critical for conducting fundamental transport studies when integrating SAND with novel semiconductor materials, as well as enabling complex circuit integration and SAND on flexible substrates. Altogether, these works drive the integration of novel nanoelectronic materials for future electronics while providing an understanding of their varying radiation response mechanisms to enable their adoption in future space-bound applications.

Merging parallel optics packaging and surface mount technologies

NASA Astrophysics Data System (ADS)

Kopp, Christophe; Volpert, Marion; Routin, Julien; Bernabé, Stéphane; Rossat, Cyrille; Tournaire, Myriam; Hamelin, Régis

2008-02-01

Optical links are well known to present significant advantages over electrical links for very high-speed data rate at 10Gpbs and above per channel. However, the transition towards optical interconnects solutions for short and very short reach applications requires the development of innovative packaging solutions that would deal with very high volume production capability and very low cost per unit. Moreover, the optoelectronic transceiver components must be able to move from the edge to anywhere on the printed circuit board, for instance close to integrated circuits with high speed IO. In this paper, we present an original packaging design to manufacture parallel optic transceivers that are surface mount devices. The package combines highly integrated Multi-Chip-Module on glass and usual IC ceramics packaging. The use of ceramic and the development of sealing technologies achieve hermetic requirements. Moreover, thanks to a chip scale package approach the final device exhibits a much minimized footprint. One of the main advantages of the package is its flexibility to be soldered or plugged anywhere on the printed circuit board as any other electronic device. As a demonstrator we present a 2 by 4 10Gbps transceiver operating at 850nm.

Comparison of a new integrated current source with the modified Howland circuit for EIT applications.

PubMed

Hong, Hongwei; Rahal, Mohamad; Demosthenous, Andreas; Bayford, Richard H

2009-10-01

Multi-frequency electrical impedance tomography (MF-EIT) systems require current sources that are accurate over a wide frequency range (1 MHz) and with large load impedance variations. The most commonly employed current source design in EIT systems is the modified Howland circuit (MHC). The MHC requires tight matching of resistors to achieve high output impedance and may suffer from instability over a wide frequency range in an integrated solution. In this paper, we introduce a new integrated current source design in CMOS technology and compare its performance with the MHC. The new integrated design has advantages over the MHC in terms of power consumption and area. The output current and the output impedance of both circuits were determined through simulations and measurements over the frequency range of 10 kHz to 1 MHz. For frequencies up to 1 MHz, the measured maximum variation of the output current for the integrated current source is 0.8% whereas for the MHC the corresponding value is 1.5%. Although the integrated current source has an output impedance greater than 1 MOmega up to 1 MHz in simulations, in practice, the impedance is greater than 160 kOmega up to 1 MHz due to the presence of stray capacitance.

Single-mode glass waveguide technology for optical interchip communication on board level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning

2012-01-01

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a hybrid packaging process and design issues are discussed.

Capacitive micromachined ultrasonic transducers for medical imaging and therapy.

PubMed

Khuri-Yakub, Butrus T; Oralkan, Omer

2011-05-01

Capacitive micromachined ultrasonic transducers (CMUTs) have been subject to extensive research for the last two decades. Although they were initially developed for air-coupled applications, today their main application space is medical imaging and therapy. This paper first presents a brief description of CMUTs, their basic structure, and operating principles. Our progression of developing several generations of fabrication processes is discussed with an emphasis on the advantages and disadvantages of each process. Monolithic and hybrid approaches for integrating CMUTs with supporting integrated circuits are surveyed. Several prototype transducer arrays with integrated frontend electronic circuits we developed and their use for 2-D and 3-D, anatomical and functional imaging, and ablative therapies are described. The presented results prove the CMUT as a MEMS technology for many medical diagnostic and therapeutic applications.

Capacitive micromachined ultrasonic transducers for medical imaging and therapy

PubMed Central

Khuri-Yakub, Butrus T.; Oralkan, Ömer

2011-01-01

Capacitive micromachined ultrasonic transducers (CMUTs) have been subject to extensive research for the last two decades. Although they were initially developed for air-coupled applications, today their main application space is medical imaging and therapy. This paper first presents a brief description of CMUTs, their basic structure, and operating principles. Our progression of developing several generations of fabrication processes is discussed with an emphasis on the advantages and disadvantages of each process. Monolithic and hybrid approaches for integrating CMUTs with supporting integrated circuits are surveyed. Several prototype transducer arrays with integrated frontend electronic circuits we developed and their use for 2-D and 3-D, anatomical and functional imaging, and ablative therapies are described. The presented results prove the CMUT as a MEMS technology for many medical diagnostic and therapeutic applications. PMID:21860542

Limits on silicon nanoelectronics for terascale integration.

PubMed

Meindl, J D; Chen, Q; Davis, J A

2001-09-14

Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

Electrically Isolating Subsystems in SOAC Technologies

NASA Technical Reports Server (NTRS)

Boyd, R. M.; Mojarradi, M. M.; Kuhn, W. B.; Shumaker, E. A.

2001-01-01

Integrated circuit fabrication technology has evolved to the point that it is possible to construct complete systems, including power, data processing, and communications, on a single chip. Such System-on-a-chip (SOAC) technologies can enable drastic reductions in spacecraft size and weight, lowering the cost of missions and presenting new mission opportunities. This paper overviews some key enabling technologies unique to the needs of spacecraft for outer-planet exploration and missions requiring extreme resistance to radiation such as Europa orbiters and Europa Landers. The work is being carried out by Kansas State University (KSU) under direction of the Center for Integrated Space Microsystems (CISM) at NASA's Jet Propulsion Laboratory. Additional information is contained in the original extended abstract.

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

NASA Astrophysics Data System (ADS)

Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

2018-01-01

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

[An integral chip for the multiphase pulse-duration modulation used for voltage changer in biomedical microprocessor systems].

PubMed

Balashov, A M; Selishchev, S V

2004-01-01

An integral chip (IC) was designed for controlling the step-down pulse voltage converter, which is based on the multiphase pulse-duration modulation, for use in biomedical microprocessor systems. The CMOS technology was an optimal basis for the IC designing. An additional feedback circuit diminishes the output voltage dispersion at dynamically changing loads.

Producibility of Vertically Integrated Photodiode (VIP)tm scanning focal plane arrays

NASA Astrophysics Data System (ADS)

Turner, Arthur M.; Teherani, Towfik; Ehmke, John C.; Pettitt, Cindy; Conlon, Peggy; Beck, Jeffrey D.; McCormack, Kent; Colombo, Luigi; Lahutsky, Tom; Murphy, Terry; Williams, Robert L.

1994-07-01

Vertically integrated photodiode, VIPTM, technology is now being used to produce second generation infrared focal plane arrays with high yields and performance. The VIPTM process employs planar, ion implanted, n on p diodes in HgCdTe which is epoxy hybridized directly to the read out integrated circuits on 100 mm Si wafers. The process parameters that are critical for high performance and yield include: HgCdTe dislocation density and thickness, backside passivation, frontside passivation, and junction formation. Producibility of infrared focal plane arrays (IRFPAs) is also significantly enhanced by read out integrated circuits (ROICs) which have the ability to deselect defective pixels. Cold probe screening before lab dewar assembly reduces costs and improves cycle times. The 240 X 1 and 240 X 2 scanning array formats are used to demonstrate the effect of process optimization, deselect, and cold probe screening on yield and cycle time. The versatility of the VIPTM technology and its extension to large area arrays is demonstrated using 240/288 X 4 and 480 X 5 TDI formats. Finally, the high performance of VIPTM IRFPAs is demonstrated by comparing data from a 480 X 5 to the SADA-II specification.

The research of digital circuit system for high accuracy CCD of portable Raman spectrometer

NASA Astrophysics Data System (ADS)

Yin, Yu; Cui, Yongsheng; Zhang, Xiuda; Yan, Huimin

2013-08-01

The Raman spectrum technology is widely used for it can identify various types of molecular structure and material. The portable Raman spectrometer has become a hot direction of the spectrometer development nowadays for its convenience in handheld operation and real-time detection which is superior to traditional Raman spectrometer with heavy weight and bulky size. But there is still a gap for its measurement sensitivity between portable and traditional devices. However, portable Raman Spectrometer with Shell-Isolated Nanoparticle-Enhanced Raman Spectroscopy (SHINERS) technology can enhance the Raman signal significantly by several orders of magnitude, giving consideration in both measurement sensitivity and mobility. This paper proposed a design and implementation of driver and digital circuit for high accuracy CCD sensor, which is core part of portable spectrometer. The main target of the whole design is to reduce the dark current generation rate and increase signal sensitivity during the long integration time, and in the weak signal environment. In this case, we use back-thinned CCD image sensor from Hamamatsu Corporation with high sensitivity, low noise and large dynamic range. In order to maximize this CCD sensor's performance and minimize the whole size of the device simultaneously to achieve the project indicators, we delicately designed a peripheral circuit for the CCD sensor. The design is mainly composed with multi-voltage circuit, sequential generation circuit, driving circuit and A/D transition parts. As the most important power supply circuit, the multi-voltage circuits with 12 independent voltages are designed with reference power supply IC and set to specified voltage value by the amplifier making up the low-pass filter, which allows the user to obtain a highly stable and accurate voltage with low noise. What's more, to make our design easy to debug, CPLD is selected to generate sequential signal. The A/D converter chip consists of a correlated double sampler; a digitally controlled variable gain amplifier and a 16-bit A/D converter which can help improve the data quality. And the acquired digital signals are transmitted into the computer via USB 2.0 data port. Our spectrometer with SHINERS technology can acquire the Raman spectrum signals efficiently in long time integration and weak signal environment, and the size of our system is well controlled for portable application.

Applying analog integrated circuits for HERO protection

NASA Technical Reports Server (NTRS)

Willis, Kenneth E.; Blachowski, Thomas J.

1994-01-01

One of the most efficient methods for protecting electro-explosive devices (EED's) from HERO and ESD is to shield the EED in a conducting shell (Faraday cage). Electrical energy is transferred to the bridge by means of a magnetic coupling which passes through a portion of the conducting shell that is made from a magnetically permeable but electrically conducting material. This technique was perfected by ML Aviation, a U.K. company, in the early 80's, and was called a Radio Frequency Attenuation Connector (RFAC). It is now in wide use in the U.K. Previously, the disadvantage of RFAC over more conventional methods was its relatively high cost, largely driven by a thick film hybrid circuit used to switch the primary of the transformer. Recently, through a licensing agreement, this technology has been transferred to the U.S. and significant cost reductions and performance improvements have been achieved by the introduction of analog integrated circuits. An integrated circuit performs the following functions: (1) Chops the DC input to a signal suitable for driving the primary of the transformer; (2) Verifies the input voltage is above a threshold; (3) Verifies the input voltage is valid for a pre set time before enabling the device; (4) Provides thermal protection of the circuit; and (5) Provides an external input for independent logic level enabling of the power transfer mechanism. This paper describes the new RFAC product and its applications.

Phased Arrays 1985 Symposium - Proceedings

DTIC Science & Technology

1985-08-01

have served the logic industry well, and appropriate versions can do the same for micruwdve drid millimeter * wave technology, An aspect of phased...continuing revolutions of the logic industry and the microwave monolithic integrated circuit community are bringing relevant technology closer to the array...monolithic phased array antennas, and discuss their relative advantages and disadvantages . Considerations such as bandwidth, maxianiru scan range, feed

Air Force Technical Objective Document, FY89.

DTIC Science & Technology

1988-04-01

threat warning; multimegawatt stand-off jammers; a family of new, broadband , active decoy expendables; E4? subsystems and EW suites for Military...and monolithic integrated circuits. (3) Microwave TWTs Develop microwave tube technology and selected thermionic power sources and amplifiers for ECM...Improved design reliability and multiple application of tube technology are stressed. Improve Traveling Wave Tube ( TWT ) reliability by instrumenting a TWT

Solid State Technology Branch of NASA Lewis Research Center: Fifth Annual Digest

DOE Office of Scientific and Technical Information (OSTI.GOV)

Not Available

1993-08-01

The digest is a collection of papers written by the members of the Solid State Technology Branch of NASA Lewis Research Center from June 1992-June 1993. The papers cover a range of topics relating to superconductivity, monolithic microwave integrated circuits (MMIC`s), coplanar waveguide, and material characterization. Individual papers are abstracted separately on the data base.

An integrated semiconductor device enabling non-optical genome sequencing.

PubMed

Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

2011-07-20

The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

NASA Communications Division (NASCOM) Tracking and Data Relay Satellite System (TDRSS) shuttle multiplexer-demultiplexer data system (MDM) and supporting items

NASA Technical Reports Server (NTRS)

New, S. R.

1981-01-01

The multiplexer-demultiplexer (MDM) project included the design, documentation, manufacture, and testing of three MDM Data Systems. The equipment is contained in 59 racks, and includes more than 3,000 circuit boards and 600 microprocessors. Spares, circuit card testers, a master set of programmable integrated circuits, and a program development system were included as deliverables. All three MDM's were installed, and were operationally tested. The systems performed well with no major problems. The progress and problems analysis, addresses schedule conformance, new technology, items awaiting government approval, and project conclusions are summarized. All contract modifications are described.

NASA Communications Division (NASCOM) Tracking and Data Relay Satellite System (TDRSS) shuttle multiplexer-demultiplexer data system (MDM) and supporting items

NASA Astrophysics Data System (ADS)

New, S. R.

1981-06-01

The multiplexer-demultiplexer (MDM) project included the design, documentation, manufacture, and testing of three MDM Data Systems. The equipment is contained in 59 racks, and includes more than 3,000 circuit boards and 600 microprocessors. Spares, circuit card testers, a master set of programmable integrated circuits, and a program development system were included as deliverables. All three MDM's were installed, and were operationally tested. The systems performed well with no major problems. The progress and problems analysis, addresses schedule conformance, new technology, items awaiting government approval, and project conclusions are summarized. All contract modifications are described.

Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics.

PubMed

Yu, Lili; El-Damak, Dina; Radhakrishna, Ujwal; Ling, Xi; Zubair, Ahmad; Lin, Yuxuan; Zhang, Yuhao; Chuang, Meng-Hsi; Lee, Yi-Hsien; Antoniadis, Dimitri; Kong, Jing; Chandrakasan, Anantha; Palacios, Tomas

2016-10-12

Two-dimensional electronics based on single-layer (SL) MoS 2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS 2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS 2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.

Electronics: State of the Art No. 2.

ERIC Educational Resources Information Center

Gosling, W.

1979-01-01

Reviewed is a brief history of electronics technology, from the early beginnings of vacuum devices to development of solid state devices, silicon fabrication in the use of transistors, and integrated circuits. Educational needs at the university or polytechnic level are discussed. (CS)

Layout-aware simulation of soft errors in sub-100 nm integrated circuits

NASA Astrophysics Data System (ADS)

Balbekov, A.; Gorbunov, M.; Bobkov, S.

2016-12-01

Single Event Transient (SET) caused by charged particle traveling through the sensitive volume of integral circuit (IC) may lead to different errors in digital circuits in some cases. In technologies below 180 nm, a single particle can affect multiple devices causing multiple SET. This fact adds the complexity to fault tolerant devices design, because the schematic design techniques become useless without their layout consideration. The most common layout mitigation technique is a spatial separation of sensitive nodes of hardened circuits. Spatial separation decreases the circuit performance and increases power consumption. Spacing should thus be reasonable and its scaling follows the device dimensions' scaling trend. This paper presents the development of the SET simulation approach comprised of SPICE simulation with "double exponent" current source as SET model. The technique uses layout in GDSII format to locate nearby devices that can be affected by a single particle and that can share the generated charge. The developed software tool automatizes multiple simulations and gathers the produced data to present it as the sensitivity map. The examples of conducted simulations of fault tolerant cells and their sensitivity maps are presented in this paper.

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

Highly efficient on-chip direct electronic-plasmonic transducers

NASA Astrophysics Data System (ADS)

Du, Wei; Wang, Tao; Chu, Hong-Son; Nijhuis, Christian A.

2017-10-01

Photonic elements can carry information with a capacity exceeding 1,000 times that of electronic components, but, due to the optical diffraction limit, these elements are large and difficult to integrate with modern-day nanoelectronics or upcoming packages, such as three-dimensional integrated circuits or stacked high-bandwidth memories1-3. Surface plasmon polaritons can be confined to subwavelength dimensions and can carry information at high speeds (>100 THz)4-6. To combine the small dimensions of nanoelectronics with the fast operating speed of optics via plasmonics, on-chip electronic-plasmonic transducers that directly convert electrical signals into plasmonic signals (and vice versa) are required. Here, we report electronic-plasmonic transducers based on metal-insulator-metal tunnel junctions coupled to plasmonic waveguides with high-efficiency on-chip generation, manipulation and readout of plasmons. These junctions can be readily integrated into existing technologies, and we thus believe that they are promising for applications in on-chip integrated plasmonic circuits.

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Beheim, Glenn M.; Okojie, Robert S.; Chang, Carl W.; Meredith, Roger D.; Ferrier, Terry L.; Evans, Laura J.; Krasowski, Michael J.;

MIMIC For Millimeter Wave Integrated Circuit Radars

NASA Astrophysics Data System (ADS)

Seashore, C. R.

1987-09-01

A significant program is currently underway in the U.S. to investigate, develop and produce a variety of GaAs analog circuits for use in microwave and millimeter wave sensors and systems. This represents a "new wave" of RF technology which promises to significantly change system engineering thinking relative to RF Architectures. At millimeter wave frequencies, we look forward to a relatively high level of critical component integration based on MESFET and HEMT device implementations. These designs will spawn more compact RF front ends with colocated antenna/transceiver functions and innovative packaging concepts which will survive and function in a typical military operational environment which includes challenging temperature, shock and special handling requirements.

Hybrid CMOS/Molecular Integrated Circuits

NASA Astrophysics Data System (ADS)

Stan, M. R.; Rose, G. S.; Ziegler, M. M.

CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

Superconductor Digital Electronics: -- Current Status, Future Prospects

NASA Astrophysics Data System (ADS)

Mukhanov, Oleg

2011-03-01

Two major applications of superconductor electronics: communications and supercomputing will be presented. These areas hold a significant promise of a large impact on electronics state-of-the-art for the defense and commercial markets stemming from the fundamental advantages of superconductivity: simultaneous high speed and low power, lossless interconnect, natural quantization, and high sensitivity. The availability of relatively small cryocoolers lowered the foremost market barrier for cryogenically-cooled superconductor electronic systems. These fundamental advantages enabled a novel Digital-RF architecture - a disruptive technological approach changing wireless communications, radar, and surveillance system architectures dramatically. Practical results were achieved for Digital-RF systems in which wide-band, multi-band radio frequency signals are directly digitized and digital domain is expanded throughout the entire system. Digital-RF systems combine digital and mixed signal integrated circuits based on Rapid Single Flux Quantum (RSFQ) technology, superconductor analog filter circuits, and semiconductor post-processing circuits. The demonstrated cryocooled Digital-RF systems are the world's first and fastest directly digitizing receivers operating with live satellite signals, enabling multi-net data links, and performing signal acquisition from HF to L-band with 30 GHz clock frequencies. In supercomputing, superconductivity leads to the highest energy efficiencies per operation. Superconductor technology based on manipulation and ballistic transfer of magnetic flux quanta provides a superior low-power alternative to CMOS and other charge-transfer based device technologies. The fundamental energy consumption in SFQ circuits defined by flux quanta energy 2 x 10-19 J. Recently, a novel energy-efficient zero-static-power SFQ technology, eSFQ/ERSFQ was invented, which retains all advantages of standard RSFQ circuits: high-speed, dc power, internal memory. The voltage bias regulation, determined by SFQ clock, enables the zero-power at zero-activity regimes, indispensable for sensor and quantum bit readout.

A microarchitecture for resource-limited superscalar microprocessors

NASA Astrophysics Data System (ADS)

Basso, Todd David

1999-11-01

Microelectronic components in space and satellite systems must be resistant to total dose radiation, single-even upset, and latchup in order to accomplish their missions. The demand for inexpensive, high-volume, radiation hardened (rad-hard) integrated circuits (ICs) is expected to increase dramatically as the communication market continues to expand. Motorola's Complementary Gallium Arsenide (CGaAsTM) technology offers superior radiation tolerance compared to traditional CMOS processes, while being more economical than dedicated rad-hard CMOS processes. The goals of this dissertation are to optimize a superscalar microarchitecture suitable for CGaAsTM microprocessors, develop circuit techniques for such applications, and evaluate the potential of CGaAsTM for the development of digital VLSI circuits. Motorola's 0.5 mum CGaAsTM process is summarized and circuit techniques applicable to digital CGaAsTM are developed. Direct coupled FET, complementary, and domino logic circuits are compared based on speed, power, area, and noise margins. These circuit techniques are employed in the design of a 600 MHz PowerPCTM arithmetic logic unit. The dissertation emphasizes CGaASTM-specific design considerations, specifically, low integration level. A baseline superscalar microarchitecture is defined and SPEC95 integer benchmark simulations are used to evaluate the applicability of advanced architectural features to microprocessors having low integration levels. The performance simulations center around the optimization of a simple superscalar core, small-scale branch prediction, instruction prefetching, and an off-chip primary data cache. The simulation results are used to develop a superscalar microarchitecture capable of outperforming a comparable sequential pipeline, while using only 500,000 transistors. The architecture, running at 200 MHz, is capable of achieving an estimated 153 MIPS, translating to a 27% performance increase over a comparable traditional pipelined microprocessor. The proposed microarchitecture is process independent and can be applied to low-cost, or transistor-limited applications. The proposed microarchitecture is implemented in the design of a 0.35 mum CMOS microprocessor, and the design of a 0.5 mum CGaAsTM micro-processor. The two technologies and designs are compared to ascertain the state of CGaAsTM for digital VLSI applications.

Moving Beyond 3D Hetero-Integration and Towards Monolithic Integration of Phase-Change RF Switches with SiGe BiCMOS

DTIC Science & Technology

2016-03-31

Corporation, Linthicum, Maryland *Corresponding author: Pavel.Borodulin@ngc.com Abstract: A chip -scale, highly-reconfigurable transmitter and...the technology has been used in a chip -scale, reconfigurable receiver demonstration and ongoing efforts to increase the level of performance and...circuit (RF-FPGA). It consists of a heterogeneous assembly of a SiGe BiCMOS chip with multiple 3D-integrated, low-loss, phase-change switch chiplets

Nanogap Electrodes towards Solid State Single-Molecule Transistors.

PubMed

Cui, Ajuan; Dong, Huanli; Hu, Wenping

2015-12-01

With the establishment of complementary metal-oxide-semiconductor (CMOS)-based integrated circuit technology, it has become more difficult to follow Moore's law to further downscale the size of electronic components. Devices based on various nanostructures were constructed to continue the trend in the minimization of electronics, and molecular devices are among the most promising candidates. Compared with other candidates, molecular devices show unique superiorities, and intensive studies on molecular devices have been carried out both experimentally and theoretically at the present time. Compared to two-terminal molecular devices, three-terminal devices, namely single-molecule transistors, show unique advantages both in fundamental research and application and are considered to be an essential part of integrated circuits based on molecular devices. However, it is very difficult to construct them using the traditional microfabrication techniques directly, thus new fabrication strategies are developed. This review aims to provide an exclusive way of manufacturing solid state gated nanogap electrodes, the foundation of constructing transistors of single or a few molecules. Such single-molecule transistors have the potential to be used to build integrated circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Characteristics of Monolithically Integrated InGaAs Active Pixel Imager Array

NASA Technical Reports Server (NTRS)

Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

2000-01-01

Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate. It consists of an InGaAs photodiode connected to InP depletion-mode junction field effect transistors (JFETs) for low leakage, low power, and fast control of circuit signal amplifying, buffering, selection, and reset. This monolithically integrated active pixel sensor configuration eliminates the need for hybridization with silicon multiplexer. In addition, the configuration allows the sensor to be front illuminated, making it sensitive to visible as well as near infrared signal radiation. Adapting the existing 1.55 micrometer fiber optical communication technology, this integration will be an ideal system of optoelectronic integration for dual band (Visible/IR) applications near room temperature, for use in atmospheric gas sensing in space, and for target identification on earth. In this paper, two different types of small 4 x 1 test arrays will be described. The effectiveness of switching and amplifying circuits will be discussed in terms of circuit effectiveness (leakage, operating frequency, and temperature) in preparation for the second phase demonstration of integrated, two-dimensional monolithic InGaAs active pixel sensor arrays for applications in transportable shipboard surveillance, night vision, and emission spectroscopy.

Scalable Fabrication of Integrated Nanophotonic Circuits on Arrays of Thin Single Crystal Diamond Membrane Windows.

PubMed

Piracha, Afaq H; Rath, Patrik; Ganesan, Kumaravelu; Kühn, Stefan; Pernice, Wolfram H P; Prawer, Steven

2016-05-11

Diamond has emerged as a promising platform for nanophotonic, optical, and quantum technologies. High-quality, single crystalline substrates of acceptable size are a prerequisite to meet the demanding requirements on low-level impurities and low absorption loss when targeting large photonic circuits. Here, we describe a scalable fabrication method for single crystal diamond membrane windows that achieves three major goals with one fabrication method: providing high quality diamond, as confirmed by Raman spectroscopy; achieving homogeneously thin membranes, enabled by ion implantation; and providing compatibility with established planar fabrication via lithography and vertical etching. On such suspended diamond membranes we demonstrate a suite of photonic components as building blocks for nanophotonic circuits. Monolithic grating couplers are used to efficiently couple light between photonic circuits and optical fibers. In waveguide coupled optical ring resonators, we find loaded quality factors up to 66 000 at a wavelength of 1560 nm, corresponding to propagation loss below 7.2 dB/cm. Our approach holds promise for the scalable implementation of future diamond quantum photonic technologies and all-diamond photonic metrology tools.

AIM Photonics: Tomorrow’s Technology at the Speed of Light

DTIC Science & Technology

2016-09-01

design automation companies AIM Photonics Tomorrow’s Technology at the Speed of Light Michael Liehr Defense AT&L: September-October 2010 386...in speed and complexity will increase cost, power consumption and heat too much to allow further, practical miniaturization. Light propagates...Integrated microwave photonic circuits (using light to transmit and process optical signals encoded with ana- log information at frequencies in the

Microwave/millimeter wave technology

NASA Astrophysics Data System (ADS)

Abita, Joseph L.

1988-09-01

The microwave/millimeter-wave monolithic integrated-circuit (MIMIC) technology and systems are discussed along with the application of MIMICs in electronic warfare. The components of a MIMIC are described, with particular attention given to the active-array antenna transmit/receive module, which is at the focus of the MIMIC, and to the features of a typical MIMIC chip. The typical performance characteristics of MIMIC components are presented in tabular form.

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array—Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique

PubMed Central

Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-01-01

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array—application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384. PMID:28672813

Development of an ultra-high temperature infrared scene projector at Santa Barbara Infrared Inc.

NASA Astrophysics Data System (ADS)

Franks, Greg; Laveigne, Joe; Danielson, Tom; McHugh, Steve; Lannon, John; Goodwin, Scott

2015-05-01

The rapid development of very-large format infrared detector arrays has challenged the IR scene projector community to develop correspondingly larger-format infrared emitter arrays to support the testing needs of systems incorporating these detectors. As with most integrated circuits, fabrication yields for the read-in integrated circuit (RIIC) that drives the emitter pixel array are expected to drop dramatically with increasing size, making monolithic RIICs larger than the current 1024x1024 format impractical and unaffordable. Additionally, many scene projector users require much higher simulated temperatures than current technology can generate to fully evaluate the performance of their systems and associated processing algorithms. Under the Ultra High Temperature (UHT) development program, Santa Barbara Infrared Inc. (SBIR) is developing a new infrared scene projector architecture capable of producing both very large format (>1024x1024) resistive emitter arrays and improved emitter pixel technology capable of simulating very high apparent temperatures. During an earlier phase of the program, SBIR demonstrated materials with MWIR apparent temperatures in excess of 1000K. New emitter materials have subsequently been selected to produce pixels that achieve even higher apparent temperatures. Test results from pixels fabricated using the new material set will be presented and discussed. Also in development under the same UHT program is a 'scalable' RIIC that will be used to drive the high temperature pixels. This RIIC will utilize through-silicon vias (TSVs) and quilt packaging (QP) technologies to allow seamless tiling of multiple chips to fabricate very large arrays, and thus overcome the inherent yield limitations of very-large-scale integrated circuits. Current status of the RIIC development effort will also be presented.

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

PubMed

Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-06-24

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

The future of automation for high-volume wafer fabrication and ASIC manufacturing

NASA Astrophysics Data System (ADS)

Hughes, Randall A.; Shott, John D.

1986-12-01

A framework is given to analyze the future trends in semiconductor manufacturing automation systems, focusing specifically on the needs of ASIC (application-specific integrated circuit) or custom integrated circuit manufacturing. Advances in technologies such as gate arrays and standard cells now make it significantly easier to obtain system cost and performance advantages by integrating nonstandard functions on silicon. ASICs are attractive to U.S. manufacturers because they place a premium on sophisticated design tools, familiarity with customer needs and applications, and fast turn-around fabrication. These are areas where U.S. manufacturers believe they have an advantage and, consequently, will not suffer from the severe price/manufacturing competition encountered in conventional high-volume semiconductor products. Previously, automation was often considered viable only for high-volume manufacturing, but automation becomes a necessity in the new ASIC environment.

Novel Material Integration for Reliable and Energy-Efficient NEM Relay Technology

NASA Astrophysics Data System (ADS)

Chen, I.-Ru

Energy-efficient switching devices have become ever more important with the emergence of ubiquitous computing. NEM relays are promising to complement CMOS transistors as circuit building blocks for future ultra-low-power information processing, and as such have recently attracted significant attention from the semiconductor industry and researchers. Relay technology potentially can overcome the energy efficiency limit for conventional CMOS technology due to several key characteristics, including zero OFF-state leakage, abrupt switching behavior, and potentially very low active energy consumption. However, two key issues must be addressed for relay technology to reach its full potential: surface oxide formation at the contacting surfaces leading to increased ON-state resistance after switching, and high switching voltages due to strain gradient present within the relay structure. This dissertation advances NEM relay technology by investigating solutions to both of these pressing issues. Ruthenium, whose native oxide is conductive, is proposed as the contacting material to improve relay ON-state resistance stability. Ruthenium-contact relays are fabricated after overcoming several process integration challenges, and show superior ON-state resistance stability in electrical measurements and extended device lifetime. The relay structural film is optimized via stress matching among all layers within the structure, to provide lower strain gradient (below 10E-3/microm -1) and hence lower switching voltage. These advancements in relay technology, along with the integration of a metallic interconnect layer, enable complex relay-based circuit demonstration. In addition to the experimental efforts, this dissertation theoretically analyzes the energy efficiency limit of a NEM switch, which is generally believed to be limited by the surface adhesion energy. New compact (<1 microm2 footprint), low-voltage (<0.1 V) switch designs are proposed to overcome this limit. The results pave a pathway to scaled energy-efficient electronic device technology.

Methods and systems for rapid prototyping of high density circuits

DOEpatents

Palmer, Jeremy A [Albuquerque, NM; Davis, Donald W [Albuquerque, NM; Chavez, Bart D [Albuquerque, NM; Gallegos, Phillip L [Albuquerque, NM; Wicker, Ryan B [El Paso, TX; Medina, Francisco R [El Paso, TX

2008-09-02

A preferred embodiment provides, for example, a system and method of integrating fluid media dispensing technology such as direct-write (DW) technologies with rapid prototyping (RP) technologies such as stereolithography (SL) to provide increased micro-fabrication and micro-stereolithography. A preferred embodiment of the present invention also provides, for example, a system and method for Rapid Prototyping High Density Circuit (RPHDC) manufacturing of solderless connectors and pilot devices with terminal geometries that are compatible with DW mechanisms and reduce contact resistance where the electrical system is encapsulated within structural members and manual electrical connections are eliminated in favor of automated DW traces. A preferred embodiment further provides, for example, a method of rapid prototyping comprising: fabricating a part layer using stereolithography and depositing thermally curable media onto the part layer using a fluid dispensing apparatus.

Surface and Electrical Characterization of Ag/AgCl Pseudo-Reference Electrodes Manufactured with Commercially Available PCB Technologies

PubMed Central

Moschou, Despina; Trantidou, Tatiana; Regoutz, Anna; Carta, Daniela; Morgan, Hywel; Prodromakis, Themistoklis

2015-01-01

Lab-on-Chip is a technology that could potentially revolutionize medical Point-of-Care diagnostics. Considerable research effort is focused towards innovating production technologies that will make commercial upscaling financially viable. Printed circuit board manufacturing techniques offer several prospects in this field. Here, we present a novel approach to manufacturing Printed Circuit Board (PCB)-based Ag/AgCl reference electrodes, an essential component of biosensors. Our prototypes were characterized both structurally and electrically. Scanning Electron Microscopy (SEM) and X-Ray Photoelectron Spectroscopy (XPS) were employed to evaluate the electrode surface characteristics. Electrical characterization was performed to determine stability and pH dependency. Finally, we demonstrate utilization along with PCB pH sensors, as a step towards a fully integrated PCB platform, comparing performance with discrete commercial reference electrodes. PMID:26213940

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

500 C Electronic Packaging and Dielectric Materials for High Temperature Applications

NASA Technical Reports Server (NTRS)

Chen, Liang-yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

2016-01-01

High-temperature environment operable sensors and electronics are required for exploring the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and application of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high temperature electronics, and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by these high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed. High-temperature environment operable sensors and electronics are required for probing the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and eventual applications of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high electronics and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed.

Closed-form internal impedance model and characterization of mixed carbon nanotube bundles for three-dimensional integrated circuits

NASA Astrophysics Data System (ADS)

Lu, Qijun; Zhu, Zhangming; Yang, Yintang; Ding, Ruixue; Li, Yuejin

2018-01-01

Not Available Project supported by the National Science and Technology Major Project of China (Grant No. 2015ZX03001004) and the National Natural Science Foundation of China (Grant Nos. 61604113, 61625403, 61334003, 61376039, 61574104, and 61474088).

Microprocessor Seminar, phase 2

NASA Technical Reports Server (NTRS)

Scott, W. R.

1977-01-01

Workshop sessions and papers were devoted to various aspects of microprocessor and large scale integrated circuit technology. Presentations were made on advanced LSI developments for high reliability military and NASA applications. Microprocessor testing techniques were discussed, and test data were presented. High reliability procurement specifications were also discussed.

Photonics

NASA Technical Reports Server (NTRS)

1991-01-01

Optoelectronic materials and devices are examined. Optoelectronic devices, which generate, detect, modulate, or switch electromagnetic radiation are being developed for a variety of space applications. The program includes spatial light modulators, solid state lasers, optoelectronic integrated circuits, nonlinear optical materials and devices, fiber optics, and optical networking photovoltaic technology and optical processing.

Soldering Tool for Integrated Circuits

NASA Technical Reports Server (NTRS)

Takahashi, Ted H.

1987-01-01

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Thin Film Transistor Control Circuitry for MEMS Acoustic Transducers

NASA Astrophysics Data System (ADS)

Daugherty, Robin

This work seeks to develop a practical solution for short range ultrasonic communications and produce an integrated array of acoustic transmitters on a flexible substrate. This is done using flexible thin film transistor (TFT) and micro electromechanical systems (MEMS). The goal is to develop a flexible system capable of communicating in the ultrasonic frequency range at a distance of 10-100 meters. This requires a great deal of innovation on the part of the FDC team developing the TFT driving circuitry and the MEMS team adapting the technology for fabrication on a flexible substrate. The technologies required for this research are independently developed. The TFT development is driven primarily by research into flexible displays. The MEMS development is driving by research in biosensors and micro actuators. This project involves the integration of TFT flexible circuit capabilities with MEMS micro actuators in the novel area of flexible acoustic transmitter arrays. This thesis focuses on the design, testing and analysis of the circuit components required for this project.

SNR characteristics of 850-nm OEIC receiver with a silicon avalanche photodetector.

PubMed

Youn, Jin-Sung; Lee, Myung-Jae; Park, Kang-Yeob; Rücker, Holger; Choi, Woo-Young

2014-01-13

We investigate signal-to-noise ratio (SNR) characteristics of an 850-nm optoelectronic integrated circuit (OEIC) receiver fabricated with standard 0.25-µm SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. The OEIC receiver is composed of a Si avalanche photodetector (APD) and BiCMOS analog circuits including a transimpedance amplifier with DC-balanced buffer, a tunable equalizer, a limiting amplifier, and an output buffer with 50-Ω loads. We measure APD SNR characteristics dependence on the reverse bias voltage as well as BiCMOS circuit noise characteristics. From these, we determine the SNR characteristics of the entire OEIC receiver, and finally, the results are verified with bit-error rate measurement.

Self-shielding flex-circuit drift tube, drift tube assembly and method of making

DOEpatents

Jones, David Alexander

2016-04-26

The present disclosure is directed to an ion mobility drift tube fabricated using flex-circuit technology in which every other drift electrode is on a different layer of the flex-circuit and each drift electrode partially overlaps the adjacent electrodes on the other layer. This results in a self-shielding effect where the drift electrodes themselves shield the interior of the drift tube from unwanted electro-magnetic noise. In addition, this drift tube can be manufactured with an integral flex-heater for temperature control. This design will significantly improve the noise immunity, size, weight, and power requirements of hand-held ion mobility systems such as those used for explosive detection.

The design of radiation-hardened ICs for space - A compendium of approaches

NASA Technical Reports Server (NTRS)

Kerns, Sherra E.; Shafer, B. D; Rockett, L. R., Jr.; Pridmore, J. S.; Berndt, D. F.

1988-01-01

Several technologies, including bulk and epi CMOS, CMOS/SOI-SOS (silicon-on-insulator-silicon-on-sapphire), CML (current-mode logic), ECL (emitter-coupled logic), analog bipolar (JI, single-poly DI, and SOI) and GaAs E/D (enhancement/depletion) heterojunction MESFET, are discussed. The discussion includes the direct effects of space radiation on microelectronic materials and devices, how these effects are evidenced in circuit and device design parameter variations, the particular effects of most significance to each functional class of circuit, specific techniques for hardening high-speed circuits, design examples for integrated systems, including operational amplifiers and A/D (analog/digital) converters, and the computer simulation of radiation effects on microelectronic ISs.

Low-frequency noise behavior of polysilicon emitter bipolar junction transistors: a review

NASA Astrophysics Data System (ADS)

Deen, M. Jamal; Pascal, Fabien

2003-05-01

For many analog integrated circuit applications, the polysilicon emitter bipolar junction transistor (PE-BJT) is still the preferred choice because of its higher operational frequency and lower noise performance characteristics compared to MOS transistors of similar active areas and at similar biasing currents. In this paper, we begin by motivating the reader with reasons why bipolar transistors are still of great interest for analog integrated circuits. This motivation includes a comparison between BJT and the MOSFET using a simple small-signal equivalent circuit to derive important parameters that can be used to compare these two technologies. An extensive review of the popular theories used to explain low frequency noise results is presented. However, in almost all instances, these theories have not been fully tested. The effects of different processing technologies and conditions on the noise performance of PE-BJTs is reviewed and a summary of some of the key technological steps and device parameters and their effects on noise is discussed. The effects of temperature and emitter geometries scaling is reviewed. It is shown that dispersion of the low frequency noise in ultra-small geometries is a serious issue since the rate of increase of the noise dispersion is faster than the noise itself as the emitter geometry is scaled to smaller values. Finally, some ideas for future research on PE-BJTs, some of which are also applicable to SiGe heteorjunction bipolar transistors and MOSFETs, are presented after the conclusions.

Thermally-isolated silicon-based integrated circuits and related methods

DOEpatents

Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

2017-05-09

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

An application specific integrated circuit based multi-anode microchannel array readout system

NASA Technical Reports Server (NTRS)

Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

1991-01-01

Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

Monolithic integration of GMR sensors for standard CMOS-IC current sensing

NASA Astrophysics Data System (ADS)

De Marcellis, A.; Reig, C.; Cubells-Beltrán, M.-D.; Madrenas, J.; Santos, J. D.; Cardoso, S.; Freitas, P. P.

2017-09-01

In this work we report on the development of Giant Magnetoresistive (GMR) sensors for off-line current measurements in standard integrated circuits. An ASIC has been specifically designed and fabricated in the well-known AMS-0.35 μm CMOS technology, including the electronic circuitry for sensor interfacing. It implements an oscillating circuit performing a voltage-to-frequency conversion. Subsequently, a fully CMOS-compatible low temperature post-process has been applied for depositing the GMR sensing devices in a full-bridge configuration onto the buried current straps. Sensitivity and resolution of these sensors have been investigated achieving experimental results that show a detection sensitivity of about 100 Hz/mA, with a resolution of about 5 μA.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

PubMed

Prezioso, M; Merrikh-Bayat, F; Hoskins, B D; Adam, G C; Likharev, K K; Strukov, D B

2015-05-07

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Monolithic integration of a silica AWG and Ge photodiodes on Si photonic platform for one-chip WDM receiver.

PubMed

Nishi, Hidetaka; Tsuchizawa, Tai; Kou, Rai; Shinojima, Hiroyuki; Yamada, Takashi; Kimura, Hideaki; Ishikawa, Yasuhiko; Wada, Kazumi; Yamada, Koji

2012-04-09

On the silicon (Si) photonic platform, we monolithically integrated a silica-based arrayed-waveguide grating (AWG) and germanium (Ge) photodiodes (PDs) using low-temperature fabrication technology. We confirmed demultiplexing by the AWG, optical-electrical signal conversion by Ge PDs, and high-speed signal detection at all channels. In addition, we mounted a multichannel transimpedance amplifier/limiting amplifier (TIA/LA) circuit on the fabricated AWG-PD device using flip-chip bonding technology. The results show the promising potential of our Si photonic platform as a photonics-electronics convergence.

Design and implementation of a low-power SOI CMOS receiver

NASA Astrophysics Data System (ADS)

Zencir, Ertan

There is a strong demand for wireless communications in civilian and military applications, and space explorations. This work attempts to implement a low-power, high-performance fully-integrated receiver for deep space communications using Silicon on Insulator (SOI) CMOS technology. Design and implementation of a UHF low-IF receiver front-end in a 0.35-mum SOI CMOS technology are presented. Problems and challenges in implementing a highly integrated receiver at UHF are identified. Low-IF architecture, suitable for low-power design, has been adopted to mitigate the noise at the baseband. Design issues of the receiver building blocks including single-ended and differential LNA's, passive and active mixers, and variable gain/bandwidth complex filters are discussed. The receiver is designed to have a variable conversion gain of more than 100 dB with a 70 dB image rejection and a power dissipation of 45 mW from a 2.5-V supply. Design and measured performance of the LNA's, and the mixer are presented. Measurement results of RF front-end blocks including a single-ended LNA, a differential LNA, and a double-balanced mixer demonstrate the low power realizability of RF front-end circuits in SOI CMOS technology. We also report on the design and simulation of the image-rejecting complex IF filter and the full receiver circuit. Gain, noise, and linearity performance of the receiver components prove the viability of fully integrated low-power receivers in SOI CMOS technology.

Flexible Packaging by Film-Assisted Molding for Microintegration of Inertia Sensors

PubMed Central

Hera, Daniel; Berndt, Armin; Günther, Thomas; Schmiel, Stephan; Harendt, Christine; Zimmermann, André

2017-01-01

Packaging represents an important part in the microintegration of sensors based on microelectromechanical system (MEMS). Besides miniaturization and integration density, functionality and reliability in combination with flexibility in packaging design at moderate costs and consequently high-mix, low-volume production are the main requirements for future solutions in packaging. This study investigates possibilities employing printed circuit board (PCB-)based assemblies to provide high flexibility for circuit designs together with film-assisted transfer molding (FAM) to package sensors. The feasibility of FAM in combination with PCB and MEMS as a packaging technology for highly sensitive inertia sensors is being demonstrated. The results prove the technology to be a viable method for damage-free packaging of stress- and pressure-sensitive MEMS. PMID:28653992

The technology on noise reduction of the APD detection circuit

NASA Astrophysics Data System (ADS)

Wu, Xue-ying; Zheng, Yong-chao; Cui, Jian-yong

2013-09-01

The laser pulse detection is widely used in the field of laser range finders, laser communications, laser radar, laser Identification Friend or Foe, et al, for the laser pulse detection has the advantage of high accuracy, high sensitivity and strong anti-interference. The avalanche photodiodes (APD) has the advantage of high quantum efficiency, high response speed and huge gain. The APD is particularly suitable for weak signal detection. The technology that APD acts as the photodetector for weak signal reception and amplification is widely used in laser pulse detection. The APD will convert the laser signal to weak electrical signal. The weak signal is amplified, processed and exported by the circuit. In the circuit design, the optimal signal detection is one key point in photoelectric detection system. The issue discusses how to reduce the noise of the photoelectric signal detection circuit and how to improve the signal-to-noise ratio, related analysis and practice included. The essay analyzes the mathematical model of the signal-to-noise ratio for photoelectric conversion and the noise of the APD photoelectric detection system. By analysis the bandwidth of the detection system is determined, and the circuit devices are selected that match the APD. In the circuit design separated devices with low noise are combined with integrated operational amplifier for the purpose of noise reduction. The methods can effectively suppress the noise, and improve the detection sensitivity.

How Small Is Too Small? Technology into 2035

DTIC Science & Technology

2010-12-01

by Arrayed Polyimide Joint Actuators,” Journal of Micromechanics and Microengineering 10, no. 3 [2000]: 337–49.) 6 A more integrated microrobot is...application-specific in- tegrated circuit used for overall control; three piezoelectric legs used for forward, reverse, and z-axis rotation move- ments...a piezoelectric touch sensor; and power storage Figure 3. Captured video image of an integrated and autonomous micro- robot. (Reproduced from Seth

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

DOE PAGES

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; ...

2016-01-27

We report that wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information13, could enable non-invasive monitoring. Previously reported sweat-based and other noninvasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state14–18. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanicallymore » flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Lastly, our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plasticbased sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing.« less

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin

We report that wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information13, could enable non-invasive monitoring. Previously reported sweat-based and other noninvasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state14–18. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanicallymore » flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Lastly, our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plasticbased sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing.« less

High density circuit technology, part 3

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

Dry processing - both etching and deposition - and present/future trends in semiconductor technology are discussed. In addition to a description of the basic apparatus, terminology, advantages, glow discharge phenomena, gas-surface chemistries, and key operational parameters for both dry etching and plasma deposition processes, a comprehensive survey of dry processing equipment (via vendor listing) is also included. The following topics are also discussed: fine-line photolithography, low-temperature processing, packaging for dense VLSI die, the role of integrated optics, and VLSI and technology innovations.

Design, fabrication and analysis of integrated optical waveguide devices

NASA Astrophysics Data System (ADS)

Sikorski, Yuri

Throughout the present dissertation, the main effort has been to develop the set of design rules for optical integrated circuits (OIC). At the present time, when planar optical integrated circuits seem to be the leading technology, and industry is heading towards much higher levels of integration, such design rules become necessary. It is known that analysis of light propagation in rectangular waveguides can not be carried out exactly. Various approximations become necessary, and their validity is discussed in this text. Various methods are used in the text for calculating the same problems, and results are compared. A few new concepts have been suggested to avoid approximations used elsewhere. The second part of this dissertation is directed to the development of a new technique for the fabrication of optical integrated circuits inside optical glass. This technique is based on the use of ultrafast laser pulses to alter the properties of glasses. Using this method we demonstrated the possibility of changing the refractive index of various passive and active optical glasses as well as ablating the material on the surface in a controlled fashion. A number of optical waveguide devices (e.g. waveguides, directional couplers, diffraction gratings, fiber Bragg gratings, V-grooves in dual-clad optical fibers, optical waveguide amplifiers) were fabricated and tested. Testing included measurements of loss/throughput, near-field mode profiles, efficiency and thermal stability. All of the experimental setup and test results are reported in the dissertation. We also demonstrated the possibility of using this technique to fabricate future bio-optical devices that will incorporate an OIC and a microfluidic circuit on a single substrate. Our results are expected to serve as a guide for the design and fabrication of a new generation of integrated optical and bio-optical devices.

Solid State Research

DTIC Science & Technology

1989-03-07

different regions of a single wafer, making possible multiwavelength optical intercon- nect technology. 6. ANALOG DEVICE TECHNOLOGY Superconducting...Sedlacek DJ. Ehrlich Monolithic Integration of H.K.. Choi GaAs/AlGaAs LED and Si Driver J.P. Mattia Circuit G.W. Turner B-Y. Tsaur An In-Situ...Study of the UV Photo- chemistry of Adsorbed TiCl4 by FTIR Spectroscopy R.P. Purohit M. Rothschild DJ. Ehrlich 6176 Transport and Kinetics

Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum

ERIC Educational Resources Information Center

Smith, S. C.; Al-Assadi, W. K.; Di, J.

2010-01-01

As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used in the semiconductor industry, as evidenced by the International Technology Roadmap for Semiconductors' (ITRS) prediction of a likely shift from synchronous to asynchronous design…

Final Technical Report - 300°C Capable Electronics Platform and Temperature Sensor System For Enhanced Geothermal Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Cheng-Po; Shaddock, David; Sandvik, Peter

2012-11-30

A silicon carbide (SiC) based electronic temperature sensor prototype has been demonstrated to operate at 300°C. We showed continuous operation of 1,000 hours with SiC operational amplifier and surface mounted discreet resistors and capacitors on a ceramic circuit board. This feasibility demonstration is a major milestone in the development of high temperature electronics in general and high temperature geothermal exploration and well management tools in particular. SiC technology offers technical advantages that are not found in competing technologies such as silicon-on-insulator (SOI) at high temperatures of 200°C to 300°C and beyond. The SiC integrated circuits and packaging methods can bemore » used in new product introduction by GE Oil and Gas for high temperature down-hole tools. The existing SiC fabrication facility at GE is sufficient to support the quantities currently demanded by the marketplace, and there are other entities in the United States and other countries capable of ramping up SiC technology manufacturing. The ceramic circuit boards are different from traditional organic-based electronics circuit boards, but the fabrication process is compatible with existing ceramic substrate manufacturing. This project has brought high temperature electronics forward, and brings us closer to commercializing tools that will enable and reduce the cost of enhanced geothermal technology to benefit the public in terms of providing clean renewable energy at lower costs.« less

19 CFR 10.14 - Fabricated components subject to the exemption.

Code of Federal Regulations, 2010 CFR

2010-04-01

... assembled, such as transistors, diodes, integrated circuits, machinery parts, or precut parts of wearing..., or integrated circuit wafers containing individual integrated circuit dice which have been scribed or... resulted in a substantial transformation of the foreign copper ingots. Example 2. An integrated circuit...

Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection.

PubMed

Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

2015-07-01

Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications.

Graphene/Si CMOS Hybrid Hall Integrated Circuits

PubMed Central

Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

2014-01-01

Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process. PMID:24998222

Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection

PubMed Central

Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

2015-01-01

Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications. PMID:26203382

Graphene/Si CMOS hybrid hall integrated circuits.

PubMed

Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

2014-07-07

Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

Interchip link system using an optical wiring method.

PubMed

Cho, In-Kui; Ryu, Jin-Hwa; Jeong, Myung-Yung

2008-08-15

A chip-scale optical link system is presented with a transmitter/receiver and optical wire link. The interchip link system consists of a metal optical bench, a printed circuit board module, a driver/receiver integrated circuit, a vertical cavity surface-emitting laser/photodiode array, and an optical wire link composed of plastic optical fibers (POFs). We have developed a downsized POF and an optical wiring method that allows on-site installation with a simple annealing as optical wiring technologies for achieving high-density optical interchip interconnection within such devices. Successful data transfer measurements are presented.

Measured thermal images of a gallium arsenide power MMIC with and without RF applied to the input

NASA Astrophysics Data System (ADS)

Oxley, C. H.; Coaker, B. M.; Priestley, N. E.

2003-04-01

A gallium arsenide microwave monolithic integrated circuit (MMIC) power amplifier (M/ACom type MAAM71100) has been measured using infra-red microscope technology, with and without the application of a RF input signal. A reduction of approximately 10 °C in chip temperature was observed with the application of a RF input signal, which will influence the MTTF of the chip. Further, the measurement technique may be used to monitor the thermal impedance and dynamic cooling of RF power devices under operational conditions in complex circuits.

Peptide Integrated Optics.

PubMed

Handelman, Amir; Lapshina, Nadezda; Apter, Boris; Rosenman, Gil

2018-02-01

Bio-nanophotonics is a wide field in which advanced optical materials, biomedicine, fundamental optics, and nanotechnology are combined and result in the development of biomedical optical chips. Silk fibers or synthetic bioabsorbable polymers are the main light-guiding components. In this work, an advanced concept of integrated bio-optics is proposed, which is based on bioinspired peptide optical materials exhibiting wide optical transparency, nonlinear and electrooptical properties, and effective passive and active waveguiding. Developed new technology combining bottom-up controlled deposition of peptide planar wafers of a large area and top-down focus ion beam lithography provides direct fabrication of peptide optical integrated circuits. Finding a deep modification of peptide optical properties by reconformation of biological secondary structure from native phase to β-sheet architecture is followed by the appearance of visible fluorescence and unexpected transition from a native passive optical waveguiding to an active one. Original biocompatibility, switchable regimes of waveguiding, and multifunctional nonlinear optical properties make these new peptide planar optical materials attractive for application in emerging technology of lab-on-biochips, combining biomedical photonic and electronic circuits toward medical diagnosis, light-activated therapy, and health monitoring. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A Printed Organic Circuit System for Wearable Amperometric Electrochemical Sensors.

PubMed

Shiwaku, Rei; Matsui, Hiroyuki; Nagamine, Kuniaki; Uematsu, Mayu; Mano, Taisei; Maruyama, Yuki; Nomura, Ayako; Tsuchiya, Kazuhiko; Hayasaka, Kazuma; Takeda, Yasunori; Fukuda, Takashi; Kumaki, Daisuke; Tokito, Shizuo

2018-04-23

Wearable sensor device technologies, which enable continuous monitoring of biological information from the human body, are promising in the fields of sports, healthcare, and medical applications. Further thinness, light weight, flexibility and low-cost are significant requirements for making the devices attachable onto human tissues or clothes like a patch. Here we demonstrate a flexible and printed circuit system consisting of an enzyme-based amperometric sensor, feedback control and amplification circuits based on organic thin-film transistors. The feedback control and amplification circuits based on pseudo-CMOS inverters were successfuly integrated by printing methods on a plastic film. This simple system worked very well like a potentiostat for electrochemical measurements, and enabled the quantitative and real-time measurement of lactate concentration with high sensitivity of 1 V/mM and a short response time of a hundred seconds.

New readout integrated circuit using continuous time fixed pattern noise correction

NASA Astrophysics Data System (ADS)

Dupont, Bertrand; Chammings, G.; Rapellin, G.; Mandier, C.; Tchagaspanian, M.; Dupont, Benoit; Peizerat, A.; Yon, J. J.

2008-04-01

LETI has been involved in IRFPA development since 1978; the design department (LETI/DCIS) has focused its work on new ROIC architecture since many years. The trend is to integrate advanced functions into the CMOS design to achieve cost efficient sensors production. Thermal imaging market is today more and more demanding of systems with instant ON capability and low power consumption. The purpose of this paper is to present the latest developments of fixed pattern noise continuous time correction. Several architectures are proposed, some are based on hardwired digital processing and some are purely analog. Both are using scene based algorithms. Moreover a new method is proposed for simultaneous correction of pixel offsets and sensitivities. In this scope, a new architecture of readout integrated circuit has been implemented; this architecture is developed with 0.18μm CMOS technology. The specification and the application of the ROIC are discussed in details.

Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

NASA Astrophysics Data System (ADS)

Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

2017-05-01

Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

UHF front-end feeding RFID-based body sensor networks by exploiting the reader signal

NASA Astrophysics Data System (ADS)

Pasca, M.; Colella, R.; Catarinucci, L.; Tarricone, L.; D'Amico, S.; Baschirotto, A.

2016-05-01

This paper presents an integrated, high-sensitivity UHF radio frequency identification (RFID) power management circuit for body sensor network applications. The circuit consists of a two-stage RF-DC Dickson's rectifier followed by an integrated five-stage DC-DC Pelliconi's charge pump driven by an ultralow start-up voltage LC oscillator. The DC-DC charge pump interposed between the RF-DC rectifier and the output load provides the RF to load isolation avoiding losses due to the diodes reverse saturation current. The RF-DC rectifier has been realized on FR4 substrate, while the charge pump and the oscillator have been realized in 180 nm complementary metal oxide semiconductor (CMOS) technology. Outdoor measurements demonstrate the ability of the power management circuit to provide 400 mV output voltage at 14 m distance from the UHF reader, in correspondence of -25 dBm input signal power. As demonstrated in the literature, such output voltage level is suitable to supply body sensor network nodes.

A CMOS micromachined capacitive tactile sensor with integrated readout circuits and compensation of process variations.

PubMed

Tsai, Tsung-Heng; Tsai, Hao-Cheng; Wu, Tien-Keng

2014-10-01

This paper presents a capacitive tactile sensor fabricated in a standard CMOS process. Both of the sensor and readout circuits are integrated on a single chip by a TSMC 0.35 μm CMOS MEMS technology. In order to improve the sensitivity, a T-shaped protrusion is proposed and implemented. This sensor comprises the metal layer and the dielectric layer without extra thin film deposition, and can be completed with few post-processing steps. By a nano-indenter, the measured spring constant of the T-shaped structure is 2.19 kNewton/m. Fully differential correlated double sampling capacitor-to-voltage converter (CDS-CVC) and reference capacitor correction are utilized to compensate process variations and improve the accuracy of the readout circuits. The measured displacement-to-voltage transductance is 7.15 mV/nm, and the sensitivity is 3.26 mV/μNewton. The overall power dissipation is 132.8 μW.

GaAs-based JFET and PHEMT technologies for ultra-low-power microwave circuits operating at frequencies up to 2.4 GHz

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baca, A.G.; Hietala, V.M.; Greenway, D.

1998-05-01

In this work the authors report results of narrowband amplifiers designed for milliwatt and submilliwatt power consumption using JFET and pseudomorphic high electron mobility transistors (PHEMT) GaAs-based technologies. Enhancement-mode JFETs were used to design both a hybrid amplifier with off-chip matching as well as a monolithic microwave integrated circuit (MMIC) with on-chip matching. The hybrid amplifier achieved 8--10 dB of gain at 2.4 GHz and 1 mW. The MMIC achieved 10 dB of gain at 2.4 GHz and 2 mW. Submilliwatt circuits were also explored by using 0.25 {micro}m PHEMTs. 25 {micro}W power levels were achieved with 5 dB ofmore » gain for a 215 MHz hybrid amplifier. These results significantly reduce power consumption levels achievable with the JFETs or prior MESFET, heterostructure field effect transistor (HFET), or Si bipolar results from other laboratories.« less

Integrated photonics for fiber optic based temperature sensing

NASA Astrophysics Data System (ADS)

Evenblij, R. S.; van Leest, T.; Haverdings, M. B.

2017-09-01

One of the promising space applications areas for fibre sensing is high reliable thermal mapping of metrology structures for effects as thermal deformation, focal plane distortion, etc. Subsequently, multi-point temperature sensing capability for payload panels and instrumentation instead of, or in addition to conventional thermo-couple technology will drastically reduce electrical wiring and sensor materials to minimize weight and costs. Current fiber sensing technologies based on solid state ASPIC (Application Specific Photonic Integrated Circuits) technology, allow significant miniaturization of instrumentation and improved reliability. These imperative aspects make the technology candidate for applications in harsh environments such as space. One of the major aspects in order to mature ASPIC technology for space is assessment on radiation hardness. This paper describes the results of radiation hardness experiments on ASPIC including typical multipoint temperature sensing and thermal mapping capabilities.

Parallelism in integrated fluidic circuits

NASA Astrophysics Data System (ADS)

Bousse, Luc J.; Kopf-Sill, Anne R.; Parce, J. W.

1998-04-01

Many research groups around the world are working on integrated microfluidics. The goal of these projects is to automate and integrate the handling of liquid samples and reagents for measurement and assay procedures in chemistry and biology. Ultimately, it is hoped that this will lead to a revolution in chemical and biological procedures similar to that caused in electronics by the invention of the integrated circuit. The optimal size scale of channels for liquid flow is determined by basic constraints to be somewhere between 10 and 100 micrometers . In larger channels, mixing by diffusion takes too long; in smaller channels, the number of molecules present is so low it makes detection difficult. At Caliper, we are making fluidic systems in glass chips with channels in this size range, based on electroosmotic flow, and fluorescence detection. One application of this technology is rapid assays for drug screening, such as enzyme assays and binding assays. A further challenge in this area is to perform multiple functions on a chip in parallel, without a large increase in the number of inputs and outputs. A first step in this direction is a fluidic serial-to-parallel converter. Fluidic circuits will be shown with the ability to distribute an incoming serial sample stream to multiple parallel channels.

High density circuit technology, part 2

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

A multilevel metal interconnection system for very large scale integration (VLSI) systems utilizing polyimides as the interlayer dielectric material is described. A complete characterization of polyimide materials is given as well as experimental methods accomplished using a double level metal test pattern. A low temperature, double exposure polyimide patterning procedure is also presented.

A Course on Plasma Processing in Integrated Circuit Fabrication.

ERIC Educational Resources Information Center

Sawin, Herbert H.; Reif, Rafael

1983-01-01

Describes a course, taught jointly by electrical/chemical engineering departments at the Massachusetts Institute of Technology, designed to teach the fundamental science of plasma processing as well as to give an overview of the present state of industrial processes. Provides rationale for course development, texts used, class composition, and…

Heat pipes. [technology utilization

NASA Technical Reports Server (NTRS)

1975-01-01

The development and use of heat pipes are described, including space requirements and contributions. Controllable heat pipes, and designs for automatically maintaining a selected constant temperature, are discussed which would add to the versatility and usefulness of heat pipes in industrial processing, manufacture of integrated circuits, and in temperature stabilization of electronics.

Photonic integrated transmitter and receiver for NG-PON2

NASA Astrophysics Data System (ADS)

Tavares, Ana; Lopes, Ana; Rodrigues, Cláudio; Mãocheia, Paulo; Mendes, Tiago; Brandão, Simão.; Rodrigues, Francisco; Ferreira, Ricardo; Teixeira, António

2014-08-01

In this paper the authors present a monolithic Photonic Integrated Circuit which includes a transmitter and a receiver for NG-PON2. With this layout it is possible to build an OLT and, by redesigning some filters, also an ONU. This technology allows reducing the losses in the transmitter and in the receiver, increasing power budget, and also reducing the OEO conversions, which has been a major problem that operators want to surpass.

InP Heterojunction Bipolar Transistor Amplifiers to 255 GHz

NASA Technical Reports Server (NTRS)

Radisic, Vesna; Sawdai, Donald; Scott, Dennis; Deal, William; Dang, Linh; Li, Danny; Cavus, Abdullah; To, Richard; Lai, Richard

2009-01-01

Two single-stage InP heterojunction bipolar transistor (HBT) amplifiers operate at 184 and 255 GHz, using Northrop Grumman Corporation s InP HBT MMIC (monolithic microwave integrated circuit) technology. At the time of this reporting, these are reported to be the highest HBT amplifiers ever created. The purpose of the amplifier design is to evaluate the technology capability for high-frequency designs and verify the model for future development work.

System and Method for Multi-Wavelength Optical Signal Detection

NASA Technical Reports Server (NTRS)

McGlone, Thomas D. (Inventor)

2017-01-01

The system and method for multi-wavelength optical signal detection enables the detection of optical signal levels significantly below those processed at the discrete circuit level by the use of mixed-signal processing methods implemented with integrated circuit technologies. The present invention is configured to detect and process small signals, which enables the reduction of the optical power required to stimulate detection networks, and lowers the required laser power to make specific measurements. The present invention provides an adaptation of active pixel networks combined with mixed-signal processing methods to provide an integer representation of the received signal as an output. The present invention also provides multi-wavelength laser detection circuits for use in various systems, such as a differential absorption light detection and ranging system.

Experimental observation of sub-terahertz backward-wave amplification in a multi-level microfabricated slow-wave circuit

NASA Astrophysics Data System (ADS)

Baik, Chan-Wook; Ahn, Ho Young; Kim, Yongsung; Lee, Jooho; Hong, Seogwoo; Lee, Sang Hun; Choi, Jun Hee; Kim, Sunil; Jeon, So-Yeon; Yu, SeGi; Collins, George; Read, Michael E.; Lawrence Ives, R.; Kim, Jong Min; Hwang, Sungwoo

2015-11-01

In our earlier paper dealing with dispersion retrieval from ultra-deep, reactive-ion-etched, slow-wave circuits on silicon substrates, it was proposed that splitting high-aspect-ratio circuits into multilevels enabled precise characterization in sub-terahertz frequency regime. This achievement prompted us to investigate beam-wave interaction through a vacuum-sealed integration with a 15-kV, 85-mA, thermionic, electron gun. Our experimental study demonstrates sub-terahertz, backward-wave amplification driven by an external oscillator. The measured output shows a frequency downshift, as well as power amplification, from beam loading even with low beam perveance. This offers a promising opportunity for the development of terahertz radiation sources, based on silicon technologies.

Experimental observation of sub-terahertz backward-wave amplification in a multi-level microfabricated slow-wave circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baik, Chan-Wook, E-mail: cw.baik@samsung.com; Ahn, Ho Young; Kim, Yongsung

2015-11-09

In our earlier paper dealing with dispersion retrieval from ultra-deep, reactive-ion-etched, slow-wave circuits on silicon substrates, it was proposed that splitting high-aspect-ratio circuits into multilevels enabled precise characterization in sub-terahertz frequency regime. This achievement prompted us to investigate beam-wave interaction through a vacuum-sealed integration with a 15-kV, 85-mA, thermionic, electron gun. Our experimental study demonstrates sub-terahertz, backward-wave amplification driven by an external oscillator. The measured output shows a frequency downshift, as well as power amplification, from beam loading even with low beam perveance. This offers a promising opportunity for the development of terahertz radiation sources, based on silicon technologies.

GaAs MMIC elements in phased-array antennas

NASA Technical Reports Server (NTRS)

Leonard, Regis F.

1988-01-01

Over the last six years NASA Lewis Research Center has carried out a program aimed at the development of advanced monolithic microwave integrated circuit technology, principally for use in phased-array antenna applications. Arising out of the Advanced Communications Technology Satellite (ACTS) program, the initial targets of the program were chips which operated at 30 and 20 GHz. Included in this group of activities were monolithic power modules with an output of 2 watts at GHz, variable phase shifters at both 20 and 30 GHz, low noise technology at 30 GHz, and a fully integrated (phase shifter, variable gain amplifier, power amplifier) transmit module at 20 GHz. Subsequent developments are centered on NASA mission requirements, particularly Space Station communications systems and deep space data communications.

Design of the small pixel pitch ROIC

NASA Astrophysics Data System (ADS)

Liang, Qinghua; Jiang, Dazhao; Chen, Honglei; Zhai, Yongcheng; Gao, Lei; Ding, Ruijun

2014-11-01

Since the technology trend of the third generation IRFPA towards resolution enhancing has steadily progressed,the pixel pitch of IRFPA has been greatly reduced.A 640×512 readout integrated circuit(ROIC) of IRFPA with 15μm pixel pitch is presented in this paper.The 15μm pixel pitch ROIC design will face many challenges.As we all known,the integrating capacitor is a key performance parameter when considering pixel area,charge capacity and dynamic range,so we adopt the effective method of 2 by 2 pixels sharing an integrating capacitor to solve this problem.The input unit cell architecture will contain two paralleled sample and hold parts,which not only allow the FPA to be operated in full frame snapshot mode but also save relatively unit circuit area.Different applications need more matching input unit circuits. Because the dimension of 2×2 pixels is 30μm×30μm, an input stage based on direct injection (DI) which has medium injection ratio and small layout area is proved to be suitable for middle wave (MW) while BDI with three-transistor cascode amplifier for long wave(LW). By adopting the 0.35μm 2P4M mixed signal process, the circuit architecture can make the effective charge capacity of 7.8Me- per pixel with 2.2V output range for MW and 7.3 Me- per pixel with 2.6V output range for LW. According to the simulation results, this circuit works well under 5V power supply and achieves less than 0.1% nonlinearity.

Inverter circuits on freestanding flexible substrate using ZnO nanoparticles for cost-efficient electronics

NASA Astrophysics Data System (ADS)

Vidor, Fábio F.; Meyers, Thorsten; Müller, Kathrin; Wirth, Gilson I.; Hilleringmann, Ulrich

2017-11-01

Driven by the Internet of Things (IoT), flexible and transparent smart systems have been intensively researched by the scientific community and by several companies. This technology is already available for consumers in a wide range of innovative products, e.g., flexible displays, radio-frequency identification tags and wearable electronic skins which, for instance, collect and analyze data for medical applications. For these systems, thin-film transistors (TFTs) are the key elements responsible for the driving currents. Solution-based materials such as nanoparticle dispersions avail the fabrication on large-area substrates with high throughput processes. In this study, we discuss the integration of ZnO nanoparticle thin-film transistors and inverter circuits on freestanding polymeric substrates enclosing the main issues concerning the transfer of the integration process from a rigid substrate to a flexible one. The TFTs depict VON between -0.2 and 1 V, ION/IOFF > 104 and field-effect mobility >0.5 cm2 V-1 s-1. Additionally, in order to enhance the transistors and inverters performance, an adaptation on the device configuration, from an inverted coplanar to an inverted staggered setup, was conducted and analyzed. By employing the inverted staggered setup a considerable increase in the contact quality between the semiconductor and the drain and source electrodes was observed. As the integrated devices depict electrical characteristics which enable the fabrication of electronic circuits for the low-cost sector, inverters were fabricated and characterized, evaluating the circuit's gain as function of the applied supply voltage and circuit's geometric ratio.

Scaling of graphene integrated circuits.

PubMed

Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

2015-05-07

The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

Optogenetic interrogation of neural circuits: technology for probing mammalian brain structures

PubMed Central

Zhang, Feng; Gradinaru, Viviana; Adamantidis, Antoine R; Durand, Remy; Airan, Raag D; de Lecea, Luis; Deisseroth, Karl

2015-01-01

Elucidation of the neural substrates underlying complex animal behaviors depends on precise activity control tools, as well as compatible readout methods. Recent developments in optogenetics have addressed this need, opening up new possibilities for systems neuroscience. Interrogation of even deep neural circuits can be conducted by directly probing the necessity and sufficiency of defined circuit elements with millisecond-scale, cell type-specific optical perturbations, coupled with suitable readouts such as electrophysiology, optical circuit dynamics measures and freely moving behavior in mammals. Here we collect in detail our strategies for delivering microbial opsin genes to deep mammalian brain structures in vivo, along with protocols for integrating the resulting optical control with compatible readouts (electrophysiological, optical and behavioral). The procedures described here, from initial virus preparation to systems-level functional readout, can be completed within 4–5 weeks. Together, these methods may help in providing circuit-level insight into the dynamics underlying complex mammalian behaviors in health and disease. PMID:20203662

Automatic visual inspection system for microelectronics

NASA Technical Reports Server (NTRS)

Micka, E. Z. (Inventor)

1975-01-01

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

George E. Pake Prize: A Few Challenges in the Evolution of Semiconductor Device/Manufacturing Technology

NASA Astrophysics Data System (ADS)

Doering, Robert

In the early 1980s, the semiconductor industry faced the related challenges of ``scaling through the one-micron barrier'' and converting single-level-metal NMOS integrated circuits to multi-level-metal CMOS. Multiple advances in lithography technology and device materials/process integration led the way toward the deep-sub-micron transistors and interconnects that characterize today's electronic chips. In the 1990s, CMOS scaling advanced at an accelerated pace enabled by rapid advances in many aspects of optical lithography. However, the industry also needed to continue the progress in manufacturing on ever-larger silicon wafers to maintain economy-of-scale trends. Simultaneously, the increasing complexity and absolute-precision requirements of manufacturing compounded the necessity for new processes, tools, and control methodologies. This talk presents a personal perspective on some of the approaches that addressed the aforementioned challenges. In particular, early work on integrating silicides, lightly-doped-drain FETs, shallow recessed isolation, and double-level metal will be discussed. In addition, some pioneering efforts in deep-UV lithography and single-wafer processing will be covered. The latter will be mainly based on results from the MMST Program - a 100 M +, 5-year R&D effort, funded by DARPA, the U.S. Air Force, and Texas Instruments, that developed a wide range of new technologies for advanced semiconductor manufacturing. The major highlight of the program was the demonstration of sub-3-day cycle time for manufacturing 350-nm CMOS integrated circuits in 1993. This was principally enabled by the development of: (1) 100% single-wafer processing, including rapid-thermal processing (RTP), and (2) computer-integrated-manufacturing (CIM), including real-time, in-situ process control.

The scientific data acquisition system of the GAMMA-400 space project

NASA Astrophysics Data System (ADS)

Bobkov, S. G.; Serdin, O. V.; Gorbunov, M. S.; Arkhangelskiy, A. I.; Topchiev, N. P.

2016-02-01

The description of scientific data acquisition system (SDAS) designed by SRISA for the GAMMA-400 space project is presented. We consider the problem of different level electronics unification: the set of reliable fault-tolerant integrated circuits fabricated on Silicon-on-Insulator 0.25 mkm CMOS technology and the high-speed interfaces and reliable modules used in the space instruments. The characteristics of reliable fault-tolerant very large scale integration (VLSI) technology designed by SRISA for the developing of computation systems for space applications are considered. The scalable net structure of SDAS based on Serial RapidIO interface including real-time operating system BAGET is described too.

Design and construction of a VHGT-attached WDM-type triplex transceiver module using polymer PLC hybrid integration technology

NASA Astrophysics Data System (ADS)

Jerábek, Vitezslav; Hüttel, Ivan; Prajzler, Václav; Busek, K.; Seliger, P.

2008-11-01

We report about design and construction of the bidirectional transceiver TRx module for subscriber part of the passive optical network PON for a fiber to the home FTTH topology. The TRx module consists of a epoxy novolak resin polymer planar lightwave circuit (PLC) hybrid integration technology with volume holographic grating triplex filter VHGT, surface-illuminated photodetectors and spot-size converted Fabry-Pérot laser diode in SMD package. The hybrid PLC has composed from a two parts-polymer optical waveguide including VHGT filter section and a optoelectronic microwave section. The both parts are placed on the composite substrate.

Smart integrated microsystems: the energy efficiency challenge (Conference Presentation) (Plenary Presentation)

NASA Astrophysics Data System (ADS)

Benini, Luca

2017-06-01

The "internet of everything" envisions trillions of connected objects loaded with high-bandwidth sensors requiring massive amounts of local signal processing, fusion, pattern extraction and classification. From the computational viewpoint, the challenge is formidable and can be addressed only by pushing computing fabrics toward massive parallelism and brain-like energy efficiency levels. CMOS technology can still take us a long way toward this goal, but technology scaling is losing steam. Energy efficiency improvement will increasingly hinge on architecture, circuits, design techniques such as heterogeneous 3D integration, mixed-signal preprocessing, event-based approximate computing and non-Von-Neumann architectures for scalable acceleration.

Smart image sensors: an emerging key technology for advanced optical measurement and microsystems

NASA Astrophysics Data System (ADS)

Seitz, Peter

1996-08-01

Optical microsystems typically include photosensitive devices, analog preprocessing circuitry and digital signal processing electronics. The advances in semiconductor technology have made it possible today to integrate all photosensitive and electronical devices on one 'smart image sensor' or photo-ASIC (application-specific integrated circuits containing photosensitive elements). It is even possible to provide each 'smart pixel' with additional photoelectronic functionality, without compromising the fill factor substantially. This technological capability is the basis for advanced cameras and optical microsystems showing novel on-chip functionality: Single-chip cameras with on- chip analog-to-digital converters for less than $10 are advertised; image sensors have been developed including novel functionality such as real-time selectable pixel size and shape, the capability of performing arbitrary convolutions simultaneously with the exposure, as well as variable, programmable offset and sensitivity of the pixels leading to image sensors with a dynamic range exceeding 150 dB. Smart image sensors have been demonstrated offering synchronous detection and demodulation capabilities in each pixel (lock-in CCD), and conventional image sensors are combined with an on-chip digital processor for complete, single-chip image acquisition and processing systems. Technological problems of the monolithic integration of smart image sensors include offset non-uniformities, temperature variations of electronic properties, imperfect matching of circuit parameters, etc. These problems can often be overcome either by designing additional compensation circuitry or by providing digital correction routines. Where necessary for technological or economic reasons, smart image sensors can also be combined with or realized as hybrids, making use of commercially available electronic components. It is concluded that the possibilities offered by custom smart image sensors will influence the design and the performance of future electronic imaging systems in many disciplines, reaching from optical metrology to machine vision on the factory floor and in robotics applications.

Design of high-speed burst mode clock and data recovery IC for passive optical network

NASA Astrophysics Data System (ADS)

Yan, Minhui; Hong, Xiaobin; Huang, Wei-Ping; Hong, Jin

2005-09-01

Design of a high bit rate burst mode clock and data recovery (BMCDR) circuit for gigabit passive optical networks (GPON) is described. A top-down design flow is established and some of the key issues related to the behavioural level modeling are addressed in consideration for the complexity of the BMCDR integrated circuit (IC). Precise implementation of Simulink behavioural model accounting for the saturation of frequency control voltage is therefore developed for the BMCDR, and the parameters of the circuit blocks can be readily adjusted and optimized based on the behavioural model. The newly designed BMCDR utilizes the 0.18um standard CMOS technology and is shown to be capable of operating at bit rate of 2.5Gbps, as well as the recovery time of one bit period in our simulation. The developed behaviour model is verified by comparing with the detailed circuit simulation.

Nonreciprocal signal routing in an active quantum network

NASA Astrophysics Data System (ADS)

Metelmann, A.; Türeci, H. E.

2018-04-01

As superconductor quantum technologies are moving towards large-scale integrated circuits, a robust and flexible approach to routing photons at the quantum level becomes a critical problem. Active circuits, which contain parametrically driven elements selectively embedded in the circuit, offer a viable solution. Here, we present a general strategy for routing nonreciprocally quantum signals between two sites of a given lattice of oscillators, implementable with existing superconducting circuit components. Our approach makes use of a dual lattice of overdamped oscillators linking the nodes of the main lattice. Solutions for spatially selective driving of the lattice elements can be found, which optimally balance coherent and dissipative hopping of microwave photons to nonreciprocally route signals between two given nodes. In certain lattices these optimal solutions are obtained at the exceptional point of the dynamical matrix of the network. We also demonstrate that signal and noise transmission characteristics can be separately optimized.

Design of Low-Complexity and High-Speed Coplanar Four-Bit Ripple Carry Adder in QCA Technology

NASA Astrophysics Data System (ADS)

Balali, Moslem; Rezai, Abdalhossein

2018-07-01

Quantum-dot Cellular Automata (QCA) technology is a suitable technology to replace CMOS technology due to low-power consumption, high-speed and high-density devices. Full adder has an important role in the digital circuit design. This paper presents and evaluates a novel single-layer four-bit QCA Ripple Carry Adder (RCA) circuit. The developed four-bit QCA RCA circuit is based on novel QCA full adder circuit. The developed circuits are simulated using QCADesigner tool version 2.0.3. The simulation results show that the developed circuits have advantages in comparison with existing single-layer and multilayer circuits in terms of cell count, area occupation and circuit latency.

Design of Low-Complexity and High-Speed Coplanar Four-Bit Ripple Carry Adder in QCA Technology

NASA Astrophysics Data System (ADS)

Balali, Moslem; Rezai, Abdalhossein

2018-03-01

Quantum-dot Cellular Automata (QCA) technology is a suitable technology to replace CMOS technology due to low-power consumption, high-speed and high-density devices. Full adder has an important role in the digital circuit design. This paper presents and evaluates a novel single-layer four-bit QCA Ripple Carry Adder (RCA) circuit. The developed four-bit QCA RCA circuit is based on novel QCA full adder circuit. The developed circuits are simulated using QCADesigner tool version 2.0.3. The simulation results show that the developed circuits have advantages in comparison with existing single-layer and multilayer circuits in terms of cell count, area occupation and circuit latency.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis.

PubMed

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A; Davis, Ronald W; Javey, Ali

2016-01-28

Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual's state of health. Sampling human sweat, which is rich in physiological information, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

NASA Astrophysics Data System (ADS)

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M.; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A.; Davis, Ronald W.; Javey, Ali

2016-01-01

Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications.

Compact component for integrated quantum optic processing

PubMed Central

Sahu, Partha Pratim

2015-01-01

Quantum interference is indispensable to derive integrated quantum optic technologies (1–2). For further progress in large scale integration of quantum optic circuit, we have introduced first time two mode interference (TMI) coupler as an ultra compact component. The quantum interference varying with coupling length corresponding to the coupling ratio is studied and the larger HOM dip with peak visibility ~0.963 ± 0.009 is found at half coupling length of TMI coupler. Our results also demonstrate complex quantum interference with high fabrication tolerance and quantum visibility in TMI coupler. PMID:26584759

Transceivers and receivers for quantum key distribution and methods pertaining thereto

DOE Office of Scientific and Technical Information (OSTI.GOV)

DeRose, Christopher; Sarovar, Mohan; Soh, Daniel B.S.

Various technologies for performing continuous-variable (CV) and discrete-variable (DV) quantum key distribution (QKD) with integrated electro-optical circuits are described herein. An integrated DV-QKD system uses Mach-Zehnder modulators to modulate a polarization of photons at a transmitter and select a photon polarization measurement basis at a receiver. An integrated CV-QKD system uses wavelength division multiplexing to send and receive amplitude-modulated and phase-modulated optical signals with a local oscillator signal while maintaining phase coherence between the modulated signals and the local oscillator signal.

Explicit finite-difference simulation of optical integrated devices on massive parallel computers.

PubMed

Sterkenburgh, T; Michels, R M; Dress, P; Franke, H

1997-02-20

An explicit method for the numerical simulation of optical integrated circuits by means of the finite-difference time-domain (FDTD) method is presented. This method, based on an explicit solution of Maxwell's equations, is well established in microwave technology. Although the simulation areas are small, we verified the behavior of three interesting problems, especially nonparaxial problems, with typical aspects of integrated optical devices. Because numerical losses are within acceptable limits, we suggest the use of the FDTD method to achieve promising quantitative simulation results.

Executive Summary: Quantifying the benefits to the national economy from secondary applications of NASA technology

NASA Technical Reports Server (NTRS)

1975-01-01

Preliminary estimates were prepared of the economic benefits to the U.S. economy from secondary applications of NASA technology. Technology is defined as the body of knowledge concerning how society's resources can be combined to yield economic goods and services, and NASA technology represents NASA's contribution to this body of technical knowledge. Secondary applications refer to uses of NASA generated knowledge for purposes other than those primary mission-oriented ones for which the original R&D was done. Case studies in cryogenics, integrated circuits, gas turbines, and NASTRAN are presented.

Factors related to the implementation and diffusion of new technologies: a pilot study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Not Available

1979-06-01

In order to develop an understanding of how government intervention affects the processes of implementation and diffusion of new technologies, case studies of 14 technologies were carried out: automobiles; broadcast radio; frozen foods; black and white TV; color TV; polio vaccine; supersonic transport; fluoridation of water supplies; computer-aided instruction; basic oxygen process for steel; numerical control in manufacturing; digital computers; lasers; and integrated circuit. The key factors, their motivations for implementing/adopting the technology (or not doing so), the interactions among the key factors, and how these affected implementation/adoption are examined.

Waveform stimulus subsystem: An advanced technology multifunction subsystem on a card

NASA Astrophysics Data System (ADS)

Pritchard, David J.

The F-15 TISS ATE (automatic test equipment) requires subsystem-on-a-card technology to achieve the required functionality within the space constraints. The waveform stimulus subsystem (WSS), an example of this advanced technology, is considered. The WSS circuit card consists of two 40-MHz pulse generators and an 80-MHz aribtrary waveform generator. Each generator is independently programmed and is available simultaneously to the user. The implementation of this highly integrated malfunction-detection system on a card is described, and the benefits to performance and maintainability are highlighted.

Mission oriented R and D and the advancement of technology: The impact of NASA contributions, volume 2

NASA Technical Reports Server (NTRS)

Robbins, M. D.; Kelley, J. A.; Elliott, L.

1972-01-01

NASA contributions to the advancement of major developments in twelve selected fields of technology are presented. The twelve fields of technology discussed are: (1) cryogenics, (2) electrochemical energy conversion and storage, (3) high-temperature ceramics, (4) high-temperature metals (5) integrated circuits, (6) internal gas dynamics (7) materials machining and forming, (8) materials joining, (9) microwave systems, (10) nondestructive testing, (11) simulation, and (12) telemetry. These field were selected on the basis of both NASA and nonaerospace interest and activity.

Simulation of a spiking neuron circuit using carbon nanotube transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Najari, Montassar, E-mail: malnjar@jazanu.edu.sa; IKCE unit, Jazan University, Jazan; El-Grour, Tarek, E-mail: grour-tarek@hotmail.fr

2016-06-10

Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuitmore » has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.« less

An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology.

PubMed

Youn, Jin-Sung; Lee, Myung-Jae; Park, Kang-Yeob; Rücker, Holger; Choi, Woo-Young

2012-12-17

An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 2(31)-1 pseudorandom bit sequence optical data with the bit-error rate less than 10(-12) at incident optical power of -7 dBm. The OEIC core has 1000 μm x 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

Multidimensional quantum entanglement with large-scale integrated optics.

PubMed

Wang, Jianwei; Paesani, Stefano; Ding, Yunhong; Santagati, Raffaele; Skrzypczyk, Paul; Salavrakos, Alexia; Tura, Jordi; Augusiak, Remigiusz; Mančinska, Laura; Bacco, Davide; Bonneau, Damien; Silverstone, Joshua W; Gong, Qihuang; Acín, Antonio; Rottwitt, Karsten; Oxenløwe, Leif K; O'Brien, Jeremy L; Laing, Anthony; Thompson, Mark G

2018-04-20

The ability to control multidimensional quantum systems is central to the development of advanced quantum technologies. We demonstrate a multidimensional integrated quantum photonic platform able to generate, control, and analyze high-dimensional entanglement. A programmable bipartite entangled system is realized with dimensions up to 15 × 15 on a large-scale silicon photonics quantum circuit. The device integrates more than 550 photonic components on a single chip, including 16 identical photon-pair sources. We verify the high precision, generality, and controllability of our multidimensional technology, and further exploit these abilities to demonstrate previously unexplored quantum applications, such as quantum randomness expansion and self-testing on multidimensional states. Our work provides an experimental platform for the development of multidimensional quantum technologies. Copyright © 2018 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

Using Tablet PCs and Interactive Software in IC Design Courses to Improve Learning

ERIC Educational Resources Information Center

Simoni, M.

2011-01-01

This paper describes an initial study of using tablet PCs and interactive course software in integrated circuit (IC) design courses. A rapidly growing community is demonstrating how this technology can improve learning and retention of material by facilitating interaction between faculty and students via cognitive exercises during lectures. While…

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

NASA Astrophysics Data System (ADS)

Li, Can; Liao, Cong-Wei; Yu, Tian-Bao; Ke, Jian-Yuan; Huang, Sheng-Xiang; Deng, Lian-Wen

2018-02-01

Not Available Supported by the National Key Research and Development Program of China under Grant No 2017YFA0204600, the National Natural Science Foundation of China under Grant No 61404002, and the Science and Technology Project of Hunan Province under Grant No 2015JC3041.

Phased array-fed antenna configuration study: Technology assessment

NASA Technical Reports Server (NTRS)

Croswell, W. F.; Ball, D. E.; Taylor, R. C.

1983-01-01

Spacecraft array fed reflector antenna systems were assessed for particular application to a multiple fixed spot beam/multiple scanning spot beam system. Reflector optics systems are reviewed in addition to an investigation of the feasibility of the use of monolithic microwave integrated circuit power amplifiers and phase shifters in each element of the array feed.

Securing health sensing using integrated circuit metric.

PubMed

Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

2015-10-20

Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware "fingerprints". The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

Image processing using Gallium Arsenide (GaAs) technology

NASA Technical Reports Server (NTRS)

Miller, Warner H.

1989-01-01

The need to increase the information return from space-borne imaging systems has increased in the past decade. The use of multi-spectral data has resulted in the need for finer spatial resolution and greater spectral coverage. Onboard signal processing will be necessary in order to utilize the available Tracking and Data Relay Satellite System (TDRSS) communication channel at high efficiency. A generally recognized approach to the increased efficiency of channel usage is through data compression techniques. The compression technique implemented is a differential pulse code modulation (DPCM) scheme with a non-uniform quantizer. The need to advance the state-of-the-art of onboard processing was recognized and a GaAs integrated circuit technology was chosen. An Adaptive Programmable Processor (APP) chip set was developed which is based on an 8-bit slice general processor. The reason for choosing the compression technique for the Multi-spectral Linear Array (MLA) instrument is described. Also a description is given of the GaAs integrated circuit chip set which will demonstrate that data compression can be performed onboard in real time at data rate in the order of 500 Mb/s.

Securing Health Sensing Using Integrated Circuit Metric

PubMed Central

Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

2015-01-01

Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware “fingerprints”. The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner. PMID:26492250

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Ten-channel InP-based large-scale photonic integrated transmitter fabricated by SAG technology

NASA Astrophysics Data System (ADS)

Zhang, Can; Zhu, Hongliang; Liang, Song; Cui, Xiao; Wang, Huitao; Zhao, Lingjuan; Wang, Wei

2014-12-01

A 10-channel InP-based large-scale photonic integrated transmitter was fabricated by selective area growth (SAG) technology combined with butt-joint regrowth (BJR) technology. The SAG technology was utilized to fabricate the electroabsorption modulated distributed feedback (DFB) laser (EML) arrays at the same time. The design of coplanar electrodes for electroabsorption modulator (EAM) was used for the flip-chip bonding package. The lasing wavelength of DFB laser could be tuned by the integrated micro-heater to match the ITU grids, which only needs one electrode pad. The average output power of each channel is 250 μW with an injection current of 200 mA. The static extinction ratios of the EAMs for 10 channels tested are ranged from 15 to 27 dB with a reverse bias of 6 V. The frequencies of 3 dB bandwidth of the chip for each channel are around 14 GHz. The novel design and simple fabrication process show its enormous potential in reducing the cost of large-scale photonic integrated circuit (LS-PIC) transmitter with high chip yields.

Operational considerations of the Advanced Photovoltaic Solar Array

NASA Technical Reports Server (NTRS)

Stella, Paul M.; Kurland, Richard M.

1992-01-01

Issues affecting the long-term operational performance of the Advanced Photovoltaic Solar Array (APSA) are discussed, with particular attention given to circuit electrical integrity from shadowed and cracked cell modules. The successful integration of individual advanced array components provides a doubling of array specific performance from the previous NASA-developed advanced array (SAFE). Flight test modules both recently fabricated and under fabrication are described. The development of advanced high-performance blanket technology for future APSA enhancement is presented.

Operational considerations of the Advanced Photovoltaic Solar Array

NASA Astrophysics Data System (ADS)

Stella, Paul M.; Kurland, Richard M.

Issues affecting the long-term operational performance of the Advanced Photovoltaic Solar Array (APSA) are discussed, with particular attention given to circuit electrical integrity from shadowed and cracked cell modules. The successful integration of individual advanced array components provides a doubling of array specific performance from the previous NASA-developed advanced array (SAFE). Flight test modules both recently fabricated and under fabrication are described. The development of advanced high-performance blanket technology for future APSA enhancement is presented.

Beyond G-band : a 235 GHz InP MMIC amplifier

NASA Technical Reports Server (NTRS)

Dawson, Douglas; Samoska, Lorene; Fung, A. K.; Lee, Karen; Lai, Richard; Grundbacher, Ronald; Liu, Po-Hsin; Raja, Rohit

2005-01-01

We present results on an InP monolithic millimeter- wave integrated circuit (MMIC) amplifier having 10-dB gain at 235 GHz. We designed this circuit and fabricated the chip in Northrop Grumman Space Technology's (NGST) 0.07- m InP high electron mobility transistor (HEMT) process. Using a WR3 (220-325 GHz) waveguide vector network analyzer system interfaced to waveguide wafer probes, we measured this chip on-wafer for -parameters. To our knowledge, this is the first time a WR3 waveguide on-wafer measurement system has been used to measure gain in a MMIC amplifier above 230 GHz.

Electromagnetic Modelling of MMIC CPWs for High Frequency Applications

NASA Astrophysics Data System (ADS)

Sinulingga, E. P.; Kyabaggu, P. B. K.; Rezazadeh, A. A.

2018-02-01

Realising the theoretical electrical characteristics of components through modelling can be carried out using computer-aided design (CAD) simulation tools. If the simulation model provides the expected characteristics, the fabrication process of Monolithic Microwave Integrated Circuit (MMIC) can be performed for experimental verification purposes. Therefore improvements can be suggested before mass fabrication takes place. This research concentrates on development of MMIC technology by providing accurate predictions of the characteristics of MMIC components using an improved Electromagnetic (EM) modelling technique. The knowledge acquired from the modelling and characterisation process in this work can be adopted by circuit designers for various high frequency applications.

Correlation Between Material Properties of Ferroelectric Thin Films and Design Parameters for Microwave Device Applications: Modeling Examples and Experimental Verification

NASA Technical Reports Server (NTRS)

Miranda, Felix A.; VanKeuls, Fred W.; Subramanyam, Guru; Mueller, Carl H.; Romanofsky, Robert R.; Rosado, Gerardo

2000-01-01

The application of thin ferroelectric films for frequency and phase agile components is the topic of interest of many research groups worldwide. Consequently, proof-of-concepts (POC) of different tunable microwave components using either (HTS, metal)/ferroelectric thin film/dielectric heterostructures or (thick, thin) film "flip-chip" technology have been reported. Either as ferroelectric thin film characterization tools or from the point of view of circuit implementation approach, both configurations have their respective advantages and limitations. However, we believe that because of the progress made so far using the heterostructure (i.e., multilayer) approach, and due to its intrinsic features such as planar configuration and monolithic integration, a study on the correlation of circuit geometry aspects and ferroelectric material properties could accelerate the insertion of this technology into working systems. In this paper, we will discuss our study performed on circuits based on microstrip lines at frequencies above 10 GHz, where the multilayer configuration offers greater ease of insertion due to circuit's size reduction. Modeled results of relevant circuit parameters such as the characteristic impedance, effective dielectric constant, and attenuation as a function of ferroelectric film's dielectric constant, tans, and thickness, will be presented for SrTiO3 and Ba(x)Sr(1-x)TiO3 ferroelectric films. A comparison between the modeled and experimental data for some of these parameters will be presented.

Flexible, Photopatterned, Colloidal CdSe Semiconductor Nanocrystal Integrated Circuits

NASA Astrophysics Data System (ADS)

Stinner, F. Scott

As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting "inks" into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with 7 kHz bandwidths, ring oscillators with <10 micros stage delays, and NAND and NOR logic gates. In order to produce higher performance and more consistent transistors, we develop a new hybrid procedure for processing the CdSe nanocrystals. This procedure produces transistors with repeatable performance exceeding 40 cm2/Vs when fabricated on silicon wafers and 16 cm 2/vs when fabricated as part of photopatterned integrated circuits on Kapton substrates. In order to demonstrate the full potential of these transistors, methods to create high-frequency oscillators were developed. These methods allow for transistors to operate at higher voltages as well as provide a means for wirebonding to the Kapton substrate, both of which are required for operating and probing high-frequency oscillators. Simulations of this system show the potential for operation at MHz frequencies. Demonstration of these transistors in this frequency range would open the door for development of CdSe integrated circuits for high-performance sensor, display, and audio applications. To develop further applications of electronics on flexible substrates, procedures are developed for the integration of polychromatic displays on polyethylene terephthalate (PET) substrates and a commercial near field communication (NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging.

Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

NASA Astrophysics Data System (ADS)

Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

2015-03-01

This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

NASA Technical Reports Server (NTRS)

Windyka, John A.; Zablocki, Ed G.

1997-01-01

This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

Metal oxide semiconductor thin-film transistors for flexible electronics

NASA Astrophysics Data System (ADS)

Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

2016-06-01

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

Metal oxide semiconductor thin-film transistors for flexible electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Petti, Luisa; Vogt, Christian; Büthe, Lars

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This reviewmore » reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.« less

A TinyOS-enabled MICA2-based wireless neural interface.

PubMed

Farshchi, Shahin; Nuyujukian, Paul H; Pesterev, Aleksey; Mody, Istvan; Judy, Jack W

2006-07-01

Existing approaches used to develop compact low-power multichannel wireless neural recording systems range from creating custom-integrated circuits to assembling commercial-off-the-shelf (COTS) PC-based components. Custom-integrated-circuit designs yield extremely compact and low-power devices at the expense of high development and upgrade costs and turn-around times, while assembling COTS-PC-technology yields high performance at the expense of large system size and increased power consumption. To achieve a balance between implementing an ultra-compact custom-fabricated neural transceiver and assembling COTS-PC-technology, an overlay of a neural interface upon the TinyOS-based MICA2 platform is described. The system amplifies, digitally encodes, and transmits neural signals real-time at a rate of 9.6 kbps, while consuming less than 66 mW of power. The neural signals are received and forwarded to a client PC over a serial connection. This data rate can be divided for recording on up to 6 channels, with a resolution of 8 bits/sample. This work demonstrates the strengths and limitations of the TinyOS-based sensor technology as a foundation for chronic remote biological monitoring applications and, thus, provides an opportunity to create a system that can leverage from the frequent networking and communications advancements being made by the global TinyOS-development community.

Development of high-performance printed organic field-effect transistors and integrated circuits.

PubMed

Xu, Yong; Liu, Chuan; Khim, Dongyoon; Noh, Yong-Young

2015-10-28

Organic electronics is regarded as an important branch of future microelectronics especially suited for large-area, flexible, transparent, and green devices, with their low cost being a key benefit. Organic field-effect transistors (OFETs), the primary building blocks of numerous expected applications, have been intensively studied, and considerable progress has recently been made. However, there are still a number of challenges to the realization of high-performance OFETs and integrated circuits (ICs) using printing technologies. Therefore, in this perspective article, we investigate the main issues concerning developing high-performance printed OFETs and ICs and seek strategies for further improvement. Unlike many other studies in the literature that deal with organic semiconductors (OSCs), printing technology, and device physics, our study commences with a detailed examination of OFET performance parameters (e.g., carrier mobility, threshold voltage, and contact resistance) by which the related challenges and potential solutions to performance development are inspected. While keeping this complete understanding of device performance in mind, we check the printed OFETs' components one by one and explore the possibility of performance improvement regarding device physics, material engineering, processing procedure, and printing technology. Finally, we analyze the performance of various organic ICs and discuss ways to optimize OFET characteristics and thus develop high-performance printed ICs for broad practical applications.

High-voltage solar-cell chip

NASA Technical Reports Server (NTRS)

Kapoor, V. J.; Valco, G. J.; Skebe, G. G.; Evans, J. C., Jr.

1985-01-01

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Electro-optical Probing Of Terahertz Integrated Circuits

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Romanofsky, R.; Whitaker, J. F.; Valdmanis, J. A.; Mourou, G.; Jackson, T. A.

1990-01-01

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Monolithic photonic integration technology platform and devices at wavelengths beyond 2μm for gas spectroscopy applications

NASA Astrophysics Data System (ADS)

Latkowski, S.; van Veldhoven, P. J.; Hänsel, A.; D'Agostino, D.; Rabbani-Haghighi, H.; Docter, B.; Bhattacharya, N.; Thijs, P. J. A.; Ambrosius, H. P. M. M.; Smit, M. K.; Williams, K. A.; Bente, E. A. J. M.

2017-02-01

In this paper a generic monolithic photonic integration technology platform and tunable laser devices for gas sensing applications at 2 μm will be presented. The basic set of long wavelength optical functions which is fundamental for a generic photonic integration approach is realized using planar, but-joint, active-passive integration on indium phosphide substrate with active components based on strained InGaAs quantum wells. Using this limited set of basic building blocks a novel geometry, widely tunable laser source was designed and fabricated within the first long wavelength multiproject wafer run. The fabricated laser operates around 2027 nm, covers a record tuning range of 31 nm and is successfully employed in absorption measurements of carbon dioxide. These results demonstrate a fully functional long wavelength photonic integrated circuit that operates at these wavelengths. Moreover, the process steps and material system used for the long wavelength technology are almost identical to the ones which are used in the technology process at 1.5μm which makes it straightforward and hassle-free to transfer to the photonic foundries with existing fabrication lines. The changes from the 1550 nm technology and the trade-offs made in the building block design and layer stack will be discussed.

Wide-band polarization controller for Si photonic integrated circuits.

PubMed

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

A High-Voltage Integrated Circuit Engine for a Dielectrophoresis-based Programmable Micro-Fluidic Processor

PubMed Central

Current, K. Wayne; Yuk, Kelvin; McConaghy, Charles; Gascoyne, Peter R. C.; Schwartz, Jon A.; Vykoukal, Jody V.; Andrews, Craig

2010-01-01

A high-voltage (HV) integrated circuit has been demonstrated to transport droplets on programmable paths across its coated surface. This chip is the engine for a dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip system. This chip creates DEP forces that move and help inject droplets. Electrode excitation voltage and frequency are variable. With the electrodes driven with a 100V peak-to-peak periodic waveform, the maximum high-voltage electrode waveform frequency is about 200Hz. Data communication rate is variable up to 250kHz. This demonstration chip has a 32×32 array of nominally 100V electrode drivers. It is fabricated in a 130V SOI CMOS fabrication technology, dissipates a maximum of 1.87W, and is about 10.4 mm × 8.2 mm. PMID:23989241

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Iontronics

NASA Astrophysics Data System (ADS)

Chun, Honggu; Chung, Taek Dong

2015-07-01

Iontronics is an emerging technology based on sophisticated control of ions as signal carriers that bridges solid-state electronics and biological system. It is found in nature, e.g., information transduction and processing of brain in which neurons are dynamically polarized or depolarized by ion transport across cell membranes. It suggests the operating principle of aqueous circuits made of predesigned structures and functional materials that characteristically interact with ions of various charge, mobility, and affinity. Working in aqueous environments, iontronic devices offer profound implications for biocompatible or biodegradable logic circuits for sensing, ecofriendly monitoring, and brain-machine interfacing. Furthermore, iontronics based on multi-ionic carriers sheds light on futuristic biomimic information processing. In this review, we overview the historical achievements and the current state of iontronics with regard to theory, fabrication, integration, and applications, concluding with comments on where the technology may advance.

Design of an Intelligent Front-End Signal Conditioning Circuit for IR Sensors

NASA Astrophysics Data System (ADS)

de Arcas, G.; Ruiz, M.; Lopez, J. M.; Gutierrez, R.; Villamayor, V.; Gomez, L.; Montojo, Mª. T.

2008-02-01

This paper presents the design of an intelligent front-end signal conditioning system for IR sensors. The system has been developed as an interface between a PbSe IR sensor matrix and a TMS320C67x digital signal processor. The system architecture ensures its scalability so it can be used for sensors with different matrix sizes. It includes an integrator based signal conditioning circuit, a data acquisition converter block, and a FPGA based advanced control block that permits including high level image preprocessing routines such as faulty pixel detection and sensor calibration in the signal conditioning front-end. During the design phase virtual instrumentation technologies proved to be a very valuable tool for prototyping when choosing the best A/D converter type for the application. Development time was significantly reduced due to the use of this technology.

Infrared readout electronics; Proceedings of the Meeting, Orlando, FL, Apr. 21, 22, 1992

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Editor)

1992-01-01

The present volume on IR readout electronics discusses cryogenic readout using silicon devices, cryogenic readout using III-V and LTS devices, multiplexers for higher temperatures, and focal-plane signal processing electronics. Attention is given to the optimization of cryogenic CMOS processes for sub-10-K applications, cryogenic measurements of aerojet GaAs n-JFETs, inP-based heterostructure device technology for ultracold readout applications, and a three-terminal semiconductor-superconductor transimpedance amplifier. Topics addressed include unfulfilled needs in IR astronomy focal-plane readout electronics, IR readout integrated circuit technology for tactical missile systems, and radiation-hardened 10-bit A/D for FPA signal processing. Also discussed are the implementation of a noise reduction circuit for spaceflight IR spectrometers, a real-time processor for staring receivers, and a fiber-optic link design for INMOS transputers.

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics

PubMed Central

Weigel, Peter O.; Savanier, Marc; DeRose, Christopher T.; Pomerene, Andrew T.; Starbuck, Andrew L.; Lentine, Anthony L.; Stenger, Vincent; Mookherjea, Shayan

2016-01-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost. PMID:26927022

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics.

PubMed

Weigel, Peter O; Savanier, Marc; DeRose, Christopher T; Pomerene, Andrew T; Starbuck, Andrew L; Lentine, Anthony L; Stenger, Vincent; Mookherjea, Shayan

2016-03-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost.

Evaluation of a High Temperature SOI Half-Bridge MOSFET Driver, Type CHT-HYPERION

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2010-01-01

Silicon-On-Insulator (SOI) technology utilizes the addition of an insulation layer in its structure to reduce leakage currents and to minimize parasitic junctions. As a result, SOIbased devices exhibit reduced internal heating as compared to the conventional silicon devices, consume less power, and can withstand higher operating temperatures. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a commercial-off-the-shelf (COTS) SOI half-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

NASA Astrophysics Data System (ADS)

Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

2013-09-01

A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

Rectenna Technology Program: Ultra light 2.45 GHz rectenna 20 GHz rectenna

NASA Technical Reports Server (NTRS)

Brown, William C.

1987-01-01

The program had two general objectives. The first objective was to develop the two plane rectenna format for space application at 2.45 GHz. The resultant foreplane was a thin-film, etched-circuit format fabricated from a laminate composed of 2 mil Kapton F sandwiched between sheets of 1 oz copper. The thin-film foreplane contains half wave dipoles, filter circuits, rectifying Schottky diode, and dc bussing lead. It weighs 160 grams per square meter. Efficiency and dc power output density were measured at 85% and 1 kw/sq m, respectively. Special testing techniques to measure temperature of circuit and diode without perturbing microwave operation using the fluoroptic thermometer were developed. A second objective was to investigate rectenna technology for use at 20 GHz and higher frequencies. Several fabrication formats including the thin-film scaled from 2.45 GHz, ceramic substrate and silk-screening, and monolithic were investigated, with the conclusion that the monolithic approach was the best. A preliminary design of the monolithic rectenna structure and the integrated Schottky diode were made.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Suspended Integrated Strip-line Transition Design for Highly Integrated Radar Systems

DTIC Science & Technology

2017-03-01

RF Circuit Design,” Second Edition, Pearson Education, 2009. 3. B. Ma, A. Chousseaud, and S . Toutain, “A new design of compact planar microstrip...technology. The measured results show good correlation to the simulated results with a return loss and insertion loss of less than 10 dB and greater...1) where is the cavity width, is the thickness of substrate 3, is the cavity height, and is the dielectric constant of substrate 3, and m/ s

Monolithic photonic integration for visible and short near-infrared wavelengths: technologies and platforms for bio and life science applications

NASA Astrophysics Data System (ADS)

Porcel, Marco A. G.; Artundo, Iñigo; Domenech, J. David; Geuzebroek, Douwe; Sunarto, Rino; Hoofman, Romano

2018-04-01

This tutorial aims to provide a general overview on the state-of-the-art of photonic integrated circuits (PICs) in the visible and short near-infrared (NIR) wavelength ranges, mostly focusing in silicon nitride (SiN) substrates, and a guide to the necessary steps in the design toward the fabrication of such PICs. The focus is put on bio- and life sciences, given the adequacy and, thus, a large number of applications in this field.

Majority logic gate for 3D magnetic computing.

PubMed

Eichwald, Irina; Breitkreutz, Stephan; Ziemys, Grazvydas; Csaba, György; Porod, Wolfgang; Becherer, Markus

2014-08-22

For decades now, microelectronic circuits have been exclusively built from transistors. An alternative way is to use nano-scaled magnets for the realization of digital circuits. This technology, known as nanomagnetic logic (NML), may offer significant improvements in terms of power consumption and integration densities. Further advantages of NML are: non-volatility, radiation hardness, and operation at room temperature. Recent research focuses on the three-dimensional (3D) integration of nanomagnets. Here we show, for the first time, a 3D programmable magnetic logic gate. Its computing operation is based on physically field-interacting nanometer-scaled magnets arranged in a 3D manner. The magnets possess a bistable magnetization state representing the Boolean logic states '0' and '1.' Magneto-optical and magnetic force microscopy measurements prove the correct operation of the gate over many computing cycles. Furthermore, micromagnetic simulations confirm the correct functionality of the gate even for a size in the nanometer-domain. The presented device demonstrates the potential of NML for three-dimensional digital computing, enabling the highest integration densities.

A low-power integrated humidity CMOS sensor by printing-on-chip technology.

PubMed

Lee, Chang-Hung; Chuang, Wen-Yu; Cowan, Melissa A; Wu, Wen-Jung; Lin, Chih-Ting

2014-05-23

A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene)/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

Measurement of the Boltzmann constant by Johnson noise thermometry using a superconducting integrated circuit

NASA Astrophysics Data System (ADS)

Urano, C.; Yamazawa, K.; Kaneko, N.-H.

2017-12-01

We report on our measurement of the Boltzmann constant by Johnson noise thermometry (JNT) using an integrated quantum voltage noise source (IQVNS) that is fully implemented with superconducting integrated circuit technology. The IQVNS generates calculable pseudo white noise voltages to calibrate the JNT system. The thermal noise of a sensing resistor placed at the temperature of the triple point of water was measured precisely by the IQVNS-based JNT. We accumulated data of more than 429 200 s in total (over 6 d) and used the Akaike information criterion to estimate the fitting frequency range for the quadratic model to calculate the Boltzmann constant. Upon detailed evaluation of the uncertainty components, the experimentally obtained Boltzmann constant was k=1.380 6436× {{10}-23} J K-1 with a relative combined uncertainty of 10.22× {{10}-6} . The value of k is relatively -3.56× {{10}-6} lower than the CODATA 2014 value (Mohr et al 2016 Rev. Mod. Phys. 88 035009).

A Low-Power Integrated Humidity CMOS Sensor by Printing-on-Chip Technology

PubMed Central

Lee, Chang-Hung; Chuang, Wen-Yu; Cowan, Melissa A.; Wu, Wen-Jung; Lin, Chih-Ting

2014-01-01

A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene)/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems. PMID:24859027

Theoretical and experimental characterization of the DUal-BAse transistor (DUBAT)

NASA Astrophysics Data System (ADS)

Wu, Chung-Yu; Wu, Ching-Yuan

1980-11-01

A new A-type integrated voltage controlled differential negative resistance device using an extra effective base region to form a lateral pnp (npn) bipolar transistor beside the original base region of a vertical npn (pnp) bipolar junction transistor, and so called the DUal BAse Transistor (DUBAT), is studied both experimentally and theoretically, The DUBAT has three terminals and is fully comparible with the existing bipolar integrated circuits technologies. Based upon the equivalent circuit of the DUBAT, a simple first-order analytical theory is developed, and important device parameters, such as: the I-V characteristic, the differential negative resistance, and the peak and valley points, are also characterized. One of the proposed integrated structures of the DUBAT, which is similar in structure to I 2L but with similar high density and a normally operated vertical npn transistor, has been successfully fabricated and studied. Comparisons between the experimental data and theoretical analyses are made, and show in satisfactory agreements.

Adaptive neuro fuzzy inference system-based power estimation method for CMOS VLSI circuits

NASA Astrophysics Data System (ADS)

Vellingiri, Govindaraj; Jayabalan, Ramesh

2018-03-01

Recent advancements in very large scale integration (VLSI) technologies have made it feasible to integrate millions of transistors on a single chip. This greatly increases the circuit complexity and hence there is a growing need for less-tedious and low-cost power estimation techniques. The proposed work employs Back-Propagation Neural Network (BPNN) and Adaptive Neuro Fuzzy Inference System (ANFIS), which are capable of estimating the power precisely for the complementary metal oxide semiconductor (CMOS) VLSI circuits, without requiring any knowledge on circuit structure and interconnections. The ANFIS to power estimation application is relatively new. Power estimation using ANFIS is carried out by creating initial FIS modes using hybrid optimisation and back-propagation (BP) techniques employing constant and linear methods. It is inferred that ANFIS with the hybrid optimisation technique employing the linear method produces better results in terms of testing error that varies from 0% to 0.86% when compared to BPNN as it takes the initial fuzzy model and tunes it by means of a hybrid technique combining gradient descent BP and mean least-squares optimisation algorithms. ANFIS is the best suited for power estimation application with a low RMSE of 0.0002075 and a high coefficient of determination (R) of 0.99961.

The Development of an IMU Integrated Clothes for Postural Monitoring Using Conductive Yarn and Interconnecting Technology.

PubMed

Kang, Sung-Won; Choi, Hyeob; Park, Hyung-Il; Choi, Byoung-Gun; Im, Hyobin; Shin, Dongjun; Jung, Young-Giu; Lee, Jun-Young; Park, Hong-Won; Park, Sukyung; Roh, Jung-Sim

2017-11-07

Spinal disease is a common yet important condition that occurs because of inappropriate posture. Prevention could be achieved by continuous posture monitoring, but most measurement systems cannot be used in daily life due to factors such as burdensome wires and large sensing modules. To improve upon these weaknesses, we developed comfortable "smart wear" for posture measurement using conductive yarn for circuit patterning and a flexible printed circuit board (FPCB) for interconnections. The conductive yarn was made by twisting polyester yarn and metal filaments, and the resistance per unit length was about 0.05 Ω/cm. An embroidered circuit was made using the conductive yarn, which showed increased yield strength and uniform electrical resistance per unit length. Circuit networks of sensors and FPCBs for interconnection were integrated into clothes using a computer numerical control (CNC) embroidery process. The system was calibrated and verified by comparing the values measured by the smart wear with those measured by a motion capture camera system. Six subjects performed fixed movements and free computer work, and, with this system, we were able to measure the anterior/posterior direction tilt angle with an error of less than 4°. The smart wear does not have excessive wires, and its structure will be optimized for better posture estimation in a later study.

An analog integrated circuit beamformer for high-frequency medical ultrasound imaging.

PubMed

Gurun, Gokce; Zahorian, Jaime S; Sisman, Alper; Karaman, Mustafa; Hasler, Paul E; Degertekin, F Levent

2012-10-01

We designed and fabricated a dynamic receive beamformer integrated circuit (IC) in 0.35-μm CMOS technology. This beamformer IC is suitable for integration with an annular array transducer for high-frequency (30-50 MHz) intravascular ultrasound (IVUS) imaging. The beamformer IC consists of receive preamplifiers, an analog dynamic delay-and-sum beamformer, and buffers for 8 receive channels. To form an analog dynamic delay line we designed an analog delay cell based on the current-mode first-order all-pass filter topology, as the basic building block. To increase the bandwidth of the delay cell, we explored an enhancement technique on the current mirrors. This technique improved the overall bandwidth of the delay line by a factor of 6. Each delay cell consumes 2.1-mW of power and is capable of generating a tunable time delay between 1.75 ns to 2.5 ns. We successfully integrated the fabricated beamformer IC with an 8-element annular array. Experimental test results demonstrated the desired buffering, preamplification and delaying capabilities of the beamformer.

Quantum cascade lasers grown on silicon.

PubMed

Nguyen-Van, Hoang; Baranov, Alexei N; Loghmari, Zeineb; Cerutti, Laurent; Rodriguez, Jean-Baptiste; Tournet, Julie; Narcy, Gregoire; Boissier, Guilhem; Patriarche, Gilles; Bahriz, Michael; Tournié, Eric; Teissier, Roland

2018-05-08

Technological platforms offering efficient integration of III-V semiconductor lasers with silicon electronics are eagerly awaited by industry. The availability of optoelectronic circuits combining III-V light sources with Si-based photonic and electronic components in a single chip will enable, in particular, the development of ultra-compact spectroscopic systems for mass scale applications. The first circuits of such type were fabricated using heterogeneous integration of semiconductor lasers by bonding the III-V chips onto silicon substrates. Direct epitaxial growth of interband III-V laser diodes on silicon substrates has also been reported, whereas intersubband emitters grown on Si have not yet been demonstrated. We report the first quantum cascade lasers (QCLs) directly grown on a silicon substrate. These InAs/AlSb QCLs grown on Si exhibit high performances, comparable with those of the devices fabricated on their native InAs substrate. The lasers emit near 11 µm, the longest emission wavelength of any laser integrated on Si. Given the wavelength range reachable with InAs/AlSb QCLs, these results open the way to the development of a wide variety of integrated sensors.

Roughness measurements on coupling structures for optical interconnections integrated on a printed circuit board

NASA Astrophysics Data System (ADS)

Hendrickx, Nina; Van Erps, Jürgen; Suyal, Himanshu; Taghizadeh, Mohammad; Thienpont, Hugo; Van Daele, Peter

2006-04-01

In this paper, laser ablation (at UGent), deep proton writing (at VUB) and laser direct writing (at HWU) are presented as versatile technologies that can be used for the fabrication of coupling structures for optical interconnections integrated on a printed circuit board (PCB). The optical layer, a highly cross-linked acrylate based polymer, is applied on an FR4 substrate. Both laser ablation and laser direct writing are used for the definition of arrays of multimode optical waveguides, which guide the light in the plane of the optical layer. In order to couple light vertically in/out of the plane of the optical waveguides, coupling structures have to be integrated into the optical layer. Out-of-plane turning mirrors, that deflect the light beam over 90°, are used for this purpose. The surface roughness and angle of three mirror configurations are evaluated: a laser ablated one that is integrated into the optical waveguide, a laser direct written one that is also directly written onto the waveguide and a DPW insert that is plugged into a cavity into the waveguiding layer.

Quantifying the benefits to the national economy from secondary applications of NASA technology, executive summary

NASA Technical Reports Server (NTRS)

1976-01-01

The feasibility of systematically quantifying the economic benefits of secondary applications of NASA related R and D was investigated. Based upon the tools of economic theory and econometric analysis, a set of empirical methods was developed and selected applications were made to demonstrate their workability. Analyses of the technological developments related to integrated circuits, cryogenic insulation, gas turbines, and computer programs for structural analysis indicated substantial secondary benefits accruing from NASA's R and D in these areas.

Quantifying the benefits to the national economy from secondary applications of NASA technology

NASA Technical Reports Server (NTRS)

1976-01-01

The feasibility of systematically quantifying the economic benefits of secondary applications of NASA related R and D is investigated. Based upon the tools of economic theory and econometric analysis, it develops a set of empirical methods and makes selected applications to demonstrate their workability. Analyses of the technological developments related to integrated circuits, cryogenic insulation, gas turbines, and computer programs for structural analysis indicated substantial secondary benefits accruing from NASA's R and D in these areas.

MEMS testing and applications in automotive and aerospace industries

NASA Astrophysics Data System (ADS)

Ma, Zhichun; Chen, Xuyuan

2009-05-01

MEMS technology combines micromachining and integrated circuit fabrication technologies to produce highly reliable MEMS transducers. This paper presents an overview of MEMS transducers applications, particularly in automotive and aerospace industries, which includes inertia sensors for safety, navigation, and guidance control, thermal anemometer for temperature and heat-flux sensors in engine applications, MEMS atomizers for fuel injection, and micromachined actuators for flow control applications. Design examples for the devices in above mentioned applications are also presented and test results are given.

Silicon Technologies Adjust to RF Applications

NASA Technical Reports Server (NTRS)

Reinecke Taub, Susan; Alterovitz, Samuel A.

1994-01-01

Silicon (Si), although not traditionally the material of choice for RF and microwave applications, has become a serious challenger to other semiconductor technologies for high-frequency applications. Fine-line electron- beam and photolithographic techniques are now capable of fabricating silicon gate sizes as small as 0.1 micron while commonly-available high-resistivity silicon wafers support low-loss microwave transmission lines. These advances, coupled with the recent development of silicon-germanium (SiGe), arm silicon integrated circuits (ICs) with the speed required for increasingly higher-frequency applications.

Silicon photonic IC embedded optical-PCB for high-speed interconnect application

NASA Astrophysics Data System (ADS)

Kallega, Rakshitha; Nambiar, Siddharth; Kumar, Abhai; Ranganath, Praveen; Selvaraja, Shankar Kumar

2018-02-01

Optical-Printed Circuit Board (PCB) is an emerging optical interconnect technology to bridge the gap between the board edge and the processing module. The technology so far has been used as a broadband transmitter using polymer waveguides in the PCB. In this paper, we report a Silicon Nitride based photonic IC embedded in the PCB along with the polymers as waveguides in the PCB. The motivation for such integration is to bring routing capability and to reduce the power loss due to broadcasting mode.