Silica Integrated Optical Circuits Based on Glass Photosensitivity

NASA Technical Reports Server (NTRS)

Abushagur, Mustafa A. G.

1999-01-01

Integrated optical circuits play a major rule in the new photonics technology both in communication and sensing due to their small size and compatibility with integrated circuits. Currently integrated optical circuits (IOCs) are fabricated using similar manufacturing to those used in the semiconductor industry. In this study we are considering a new technique to fabricate IOCs which does not require layers of photolithography, depositing and etching. This method is based on the photosensitivity of germanosilicate glasses. Waveguides and other IOC devises can be patterned in these glasses by exposing them using UV lasers. This exposure by UV light changes the index of refraction of the germanosilicate glass. This technique enjoys both the simplicity and flexibility of design and fabrication with also the potential of being fast and low cost.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

Fault tolerant system based on IDDQ testing

NASA Astrophysics Data System (ADS)

Guibane, Badi; Hamdi, Belgacem; Mtibaa, Abdellatif; Bensalem, Brahim

2018-06-01

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.

A statistical-based material and process guidelines for design of carbon nanotube field-effect transistors in gigascale integrated circuits.

PubMed

Ghavami, Behnam; Raji, Mohsen; Pedram, Hossein

2011-08-26

Carbon nanotube field-effect transistors (CNFETs) show great promise as building blocks of future integrated circuits. However, synthesizing single-walled carbon nanotubes (CNTs) with accurate chirality and exact positioning control has been widely acknowledged as an exceedingly complex task. Indeed, density and chirality variations in CNT growth can compromise the reliability of CNFET-based circuits. In this paper, we present a novel statistical compact model to estimate the failure probability of CNFETs to provide some material and process guidelines for the design of CNFETs in gigascale integrated circuits. We use measured CNT spacing distributions within the framework of detailed failure analysis to demonstrate that both the CNT density and the ratio of metallic to semiconducting CNTs play dominant roles in defining the failure probability of CNFETs. Besides, it is argued that the large-scale integration of these devices within an integrated circuit will be feasible only if a specific range of CNT density with an acceptable ratio of semiconducting to metallic CNTs can be adjusted in a typical synthesis process.

Addressable-Matrix Integrated-Circuit Test Structure

NASA Technical Reports Server (NTRS)

Sayah, Hoshyar R.; Buehler, Martin G.

1991-01-01

Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits.

PubMed

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-12-24

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits.

The Design and Assessment of a Hypermedia Course on Semiconductor Manufacturing.

ERIC Educational Resources Information Center

Schank, Patrick K.; Rowe, Lawrence A.

1993-01-01

Describes the design and evaluation of a multimedia course on integrated circuit manufacturing that was developed at the University of California at Berkeley using IC-HIP (Integrated Circuit-Hypermedia in PICASSO), a hypermedia-based instructional system. Learning effects based on prior knowledge, methods of navigation, and other factors are…

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

NASA Astrophysics Data System (ADS)

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm.

PubMed

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

Cost optimization in low volume VLSI circuits

NASA Technical Reports Server (NTRS)

Cook, K. B., Jr.; Kerns, D. V., Jr.

1982-01-01

The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

Integrated neuron circuit for implementing neuromorphic system with synaptic device

NASA Astrophysics Data System (ADS)

Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

2018-02-01

In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

PubMed

Cao, Qing; Kim, Hoon-sik; Pimparkar, Ninad; Kulkarni, Jaydeep P; Wang, Congjun; Shim, Moonsub; Roy, Kaushik; Alam, Muhammad A; Rogers, John A

2008-07-24

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm(2) V(-1) s(-1), subthreshold slopes as low as 140 m V dec(-1), operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 10(5), switching speeds in the kilohertz range even for coarse (approximately 100-microm) device geometries, and good mechanical flexibility-all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

International Conference on Integrated Optical Circuit Engineering, 1st, Cambridge, MA, October 23-25, 1984, Proceedings

NASA Astrophysics Data System (ADS)

Ostrowsky, D. B.; Sriram, S.

Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.

Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

NASA Astrophysics Data System (ADS)

Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

2011-12-01

A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

PubMed

LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

2014-06-02

We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

PubMed

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

NASA Technical Reports Server (NTRS)

Pavlidis, Dimitris

1991-01-01

The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

NASA Astrophysics Data System (ADS)

Pavlidis, Dimitris

1991-02-01

The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

Chemical sensors fabricated by a photonic integrated circuit foundry

NASA Astrophysics Data System (ADS)

Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

2018-02-01

We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits

PubMed Central

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-01-01

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits. DOI: http://dx.doi.org/10.7554/eLife.10056.001 PMID:26705334

Integrated Circuit-Based Biofabrication with Common Biomaterials for Probing Cellular Biomechanics.

PubMed

Sung, Chun-Yen; Yang, Chung-Yao; Yeh, J Andrew; Cheng, Chao-Min

2016-02-01

Recent advances in bioengineering have enabled the development of biomedical tools with modifiable surface features (small-scale architecture) to mimic extracellular matrices and aid in the development of well-controlled platforms that allow for the application of mechanical stimulation for studying cellular biomechanics. An overview of recent developments in common biomaterials that can be manufactured using integrated circuit-based biofabrication is presented. Integrated circuit-based biofabrication possesses advantages including mass and diverse production capacities for fabricating in vitro biomedical devices. This review highlights the use of common biomaterials that have been most frequently used to study cellular biomechanics. In addition, the influence of various small-scale characteristics on common biomaterial surfaces for a range of different cell types is discussed. Copyright © 2015 Elsevier Ltd. All rights reserved.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.

2 μm wavelength range InP-based type-II quantum well photodiodes heterogeneously integrated on silicon photonic integrated circuits.

PubMed

Wang, Ruijun; Sprengel, Stephan; Muneeb, Muhammad; Boehm, Gerhard; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

2015-10-05

The heterogeneous integration of InP-based type-II quantum well photodiodes on silicon photonic integrated circuits for the 2 µm wavelength range is presented. A responsivity of 1.2 A/W at a wavelength of 2.32 µm and 0.6 A/W at 2.4 µm wavelength is demonstrated. The photodiodes have a dark current of 12 nA at -0.5 V at room temperature. The absorbing active region of the integrated photodiodes consists of six periods of a "W"-shaped quantum well, also allowing for laser integration on the same platform.

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

ELECTRONIC INTEGRATING CIRCUIT

DOEpatents

Englemann, R.H.

1963-08-20

An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

NASA Technical Reports Server (NTRS)

Leonard, Regis F. (Editor); Bhasin, Kul B. (Editor)

1991-01-01

Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure.

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

NASA Astrophysics Data System (ADS)

Arefin, Md Shamsul; Bulut Coskun, M.; Alan, Tuncay; Redoute, Jean-Michel; Neild, Adrian; Rasit Yuce, Mehmet

2014-06-01

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0-5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

Multislice imaging of integrated circuits by precession X-ray ptychography.

PubMed

Shimomura, Kei; Hirose, Makoto; Takahashi, Yukio

2018-01-01

A method for nondestructively visualizing multisection nanostructures of integrated circuits by X-ray ptychography with a multislice approach is proposed. In this study, tilt-series ptychographic diffraction data sets of a two-layered circuit with a ∼1.4 µm gap at nine incident angles are collected in a wide Q range and then artifact-reduced phase images of each layer are successfully reconstructed at ∼10 nm resolution. The present method has great potential for the three-dimensional observation of flat specimens with thickness on the order of 100 µm, such as three-dimensional stacked integrated circuits based on through-silicon vias, without laborious sample preparation.

Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

PubMed

Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators.

PubMed

Qiu, Ciyuan; Gao, Weilu; Soref, Richard; Robinson, Jacob T; Xu, Qianfan

2014-12-15

Here we demonstrate a reconfigurable electro-optical directed-logic circuit based on a regular array of integrated optical switches. Each 1×1 optical switch consists of a micro-ring resonator with an embedded lateral p-n junction and a micro-heater. We achieve high-speed on-off switching by applying electrical logic signals to the p-n junction. We can configure the operation mode of each switch by thermal tuning the resonance wavelength. The result is an integrated optical circuit that can be reconfigured to perform any combinational logic operation. As a proof-of-principle, we fabricated a multi-spectral directed-logic circuit based on a fourfold array of switches and showed that this circuit can be reconfigured to perform arbitrary two-input logic functions with speeds up to 3  GB/s.

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures.

PubMed

Yan, Xiao; Zhang, David Wei; Liu, Chunsen; Bao, Wenzhong; Wang, Shuiyuan; Ding, Shijin; Zheng, Gengfeng; Zhou, Peng

2018-04-01

2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field-effect transistors. However, 2DLM-based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS 2 /GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM-based integrated circuits based on amplifier circuits.

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures

PubMed Central

Yan, Xiao; Zhang, David Wei; Liu, Chunsen; Bao, Wenzhong; Wang, Shuiyuan; Ding, Shijin; Zheng, Gengfeng

2018-01-01

Abstract 2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field‐effect transistors. However, 2DLM‐based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS2/GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM‐based integrated circuits based on amplifier circuits. PMID:29721428

Implementation of an integrated op-amp based chaotic neuron model and observation of its chaotic dynamics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jung, Jinwoo; Lee, Jewon; Song, Hanjung

2011-03-15

This paper presents a fully integrated circuit implementation of an operational amplifier (op-amp) based chaotic neuron model with a bipolar output function, experimental measurements, and analyses of its chaotic behavior. The proposed chaotic neuron model integrated circuit consists of several op-amps, sample and hold circuits, a nonlinear function block for chaotic signal generation, a clock generator, a nonlinear output function, etc. Based on the HSPICE (circuit program) simulation results, approximated empirical equations for analyses were formulated. Then, the chaotic dynamical responses such as bifurcation diagrams, time series, and Lyapunov exponent were calculated using these empirical equations. In addition, we performedmore » simulations about two chaotic neuron systems with four synapses to confirm neural network connections and got normal behavior of the chaotic neuron such as internal state bifurcation diagram according to the synaptic weight variation. The proposed circuit was fabricated using a 0.8-{mu}m single poly complementary metal-oxide semiconductor technology. Measurements of the fabricated single chaotic neuron with {+-}2.5 V power supplies and a 10 kHz sampling clock frequency were carried out and compared with the simulated results.« less

A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems

PubMed Central

Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

2017-01-01

This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors. PMID:28368355

A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems.

PubMed

Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

2017-04-03

This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

Experimental and theoretical analysis of integrated circuit (IC) chips on flexible substrates subjected to bending

NASA Astrophysics Data System (ADS)

Chen, Ying; Yuan, Jianghong; Zhang, Yingchao; Huang, Yonggang; Feng, Xue

2017-10-01

The interfacial failure of integrated circuit (IC) chips integrated on flexible substrates under bending deformation has been studied theoretically and experimentally. A compressive buckling test is used to impose the bending deformation onto the interface between the IC chip and the flexible substrate quantitatively, after which the failed interface is investigated using scanning electron microscopy. A theoretical model is established based on the beam theory and a bi-layer interface model, from which an analytical expression of the critical curvature in relation to the interfacial failure is obtained. The relationships between the critical curvature, the material, and the geometric parameters of the device are discussed in detail, providing guidance for future optimization flexible circuits based on IC chips.

Photonic crystal ring resonator based optical filters for photonic integrated circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, S., E-mail: mail2robinson@gmail.com

In this paper, a two Dimensional (2D) Photonic Crystal Ring Resonator (PCRR) based optical Filters namely Add Drop Filter, Bandpass Filter, and Bandstop Filter are designed for Photonic Integrated Circuits (PICs). The normalized output response of the filters is obtained using 2D Finite Difference Time Domain (FDTD) method and the band diagram of periodic and non-periodic structure is attained by Plane Wave Expansion (PWE) method. The size of the device is minimized from a scale of few tens of millimeters to the order of micrometers. The overall size of the filters is around 11.4 μm × 11.4 μm which ismore » highly suitable of photonic integrated circuits.« less

Wide-temperature integrated operational amplifier

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad (Inventor); Levanas, Greg (Inventor); Chen, Yuan (Inventor); Cozy, Raymond S. (Inventor); Greenwell, Robert (Inventor); Terry, Stephen (Inventor); Blalock, Benjamin J. (Inventor)

2009-01-01

The present invention relates to a reference current circuit. The reference circuit comprises a low-level current bias circuit, a voltage proportional-to-absolute temperature generator for creating a proportional-to-absolute temperature voltage (VPTAT), and a MOSFET-based constant-IC regulator circuit. The MOSFET-based constant-IC regulator circuit includes a constant-IC input and constant-IC output. The constant-IC input is electrically connected with the VPTAT generator such that the voltage proportional-to-absolute temperature is the input into the constant-IC regulator circuit. Thus the constant-IC output maintains the constant-IC ratio across any temperature range.

Monolithic optical integrated control circuitry for GaAs MMIC-based phased arrays

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Ponchak, G. E.; Kascak, T. J.

1985-01-01

Gallium arsenide (GaAs) monolithic microwave integrated circuits (MMIC's) show promise in phased-array antenna applications for future space communications systems. Their efficient usage will depend on the control of amplitude and phase signals for each MMIC element in the phased array and in the low-loss radiofrequency feed. For a phased array contining several MMIC elements a complex system is required to control and feed each element. The characteristics of GaAs MMIC's for 20/30-GHz phased-array systems are discussed. The optical/MMIC interface and the desired characteristics of optical integrated circuits (OIC's) for such an interface are described. Anticipated fabrication considerations for eventual full monolithic integration of optical integrated circuits with MMIC's on a GaAs substrate are presented.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

Simulation of 100-300 GHz solid-state harmonic sources

NASA Technical Reports Server (NTRS)

Zybura, Michael F.; Jones, J. Robert; Jones, Stephen H.; Tait, Gregory B.

1995-01-01

Accurate and efficient simulations of the large-signal time-dependent characteristics of second-harmonic Transferred Electron Oscillators (TEO's) and Heterostructure Barrier Varactor (HBV) frequency triplers have been obtained. This is accomplished by using a novel and efficient harmonic-balance circuit analysis technique which facilitates the integration of physics-based hydrodynamic device simulators. The integrated hydrodynamic device/harmonic-balance circuit simulators allow TEO and HBV circuits to be co-designed from both a device and a circuit point of view. Comparisons have been made with published experimental data for both TEO's and HBV's. For TEO's, excellent correlation has been obtained at 140 GHz and 188 GHz in second-harmonic operation. Excellent correlation has also been obtained for HBV frequency triplers operating near 200 GHz. For HBV's, both a lumped quasi-static equivalent circuit model and the hydrodynamic device simulator have been linked to the harmonic-balance circuit simulator. This comparison illustrates the importance of representing active devices with physics-based numerical device models rather than analytical device models.

Toolbox for the design of LiNbO3-based passive and active integrated quantum circuits

NASA Astrophysics Data System (ADS)

Sharapova, P. R.; Luo, K. H.; Herrmann, H.; Reichelt, M.; Meier, T.; Silberhorn, C.

2017-12-01

We present and discuss perspectives of current developments on advanced quantum optical circuits monolithically integrated in the lithium niobate platform. A set of basic components comprising photon pair sources based on parametric down conversion (PDC), passive routing elements and active electro-optically controllable switches and polarisation converters are building blocks of a toolbox which is the basis for a broad range of diverse quantum circuits. We review the state-of-the-art of these components and provide models that properly describe their performance in quantum circuits. As an example for applications of these models we discuss design issues for a circuit providing on-chip two-photon interference. The circuit comprises a PDC section for photon pair generation followed by an actively controllable modified mach-Zehnder structure for observing Hong-Ou-Mandel interference. The performance of such a chip is simulated theoretically by taking even imperfections of the properties of the individual components into account.

Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools

ERIC Educational Resources Information Center

Aziz, Syed Mahfuzul; Sicard, Etienne; Ben Dhia, Sonia

2010-01-01

This paper presents the strategies used for effective teaching and skill development in integrated circuit (IC) design using project-based learning (PBL) methodologies. It presents the contexts in which these strategies are applied to IC design courses at the University of South Australia, Adelaide, Australia, and the National Institute of Applied…

Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

PubMed

Aull, Brian

2016-04-08

This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

Flow sensor based on monolithic integration of organic light-emitting diodes (OLEDs) and CMOS circuits

NASA Astrophysics Data System (ADS)

Reckziegel, S.; Kreye, D.; Puegner, T.; Vogel, U.; Scholles, M.; Grillberger, C.; Fehse, K.

2009-02-01

In this paper we present an optoelectronic integrated circuit (OEIC) based on monolithic integration of organic lightemitting diodes (OLEDs) and CMOS technology. By the use of integrated circuits, photodetectors and highly efficient OLEDs on the same silicon chip, novel OEICs with combined sensors and actuating elements can be realized. The OLEDs are directly deposited on the CMOS top metal. The metal layer serves as OLED bottom electrode and determines the bright area. Furthermore, the area below the OLED electrodes can be used for integrated circuits. The monolithic integration of actuators, sensors and electronics on a common silicon substrate brings significant advantages in most sensory applications. The developed OEIC combines three different types of sensors: a reflective sensor, a color sensor and a particle flow sensor and is configured with an orange (597nm) emitting p-i-n OLED. We describe the architecture of such a monolithic OEIC and demonstrate a method to determine the velocity of a fluid being conveyed pneumatically in a transparent capillary. The integrated OLEDs illuminate the capillary with the flowing fluid. The fluid has a random reflection profile. Depending on the velocity and a random contrast difference, more or less light is reflected back to the substrate. The integrated photodiodes located at different fixed points detect the reflected light and using crosscorrelation, the velocity is calculated from the time in which contrast differences move over a fixed distance.

170 GHz Uni-Traveling Carrier Photodiodes for InP-based photonic integrated circuits.

PubMed

Rouvalis, E; Chtioui, M; van Dijk, F; Lelarge, F; Fice, M J; Renaud, C C; Carpintero, G; Seeds, A J

2012-08-27

We demonstrate the capability of fabricating extremely high-bandwidth Uni-Traveling Carrier Photodiodes (UTC-PDs) using techniques that are suitable for active-passive monolithic integration with Multiple Quantum Well (MQW)-based photonic devices. The devices achieved a responsivity of 0.27 A/W, a 3-dB bandwidth of 170 GHz, and an output power of -9 dBm at 200 GHz. We anticipate that this work will deliver Photonic Integrated Circuits with extremely high bandwidth for optical communications and millimetre-wave applications.

Smart Phase Tuning in Microwave Photonic Integrated Circuits Toward Automated Frequency Multiplication by Design

NASA Astrophysics Data System (ADS)

Nabavi, N.

2018-07-01

The author investigates the monitoring methods for fine adjustment of the previously proposed on-chip architecture for frequency multiplication and translation of harmonics by design. Digital signal processing (DSP) algorithms are utilized to create an optimized microwave photonic integrated circuit functionality toward automated frequency multiplication. The implemented DSP algorithms are formed on discrete Fourier transform and optimization-based algorithms (Greedy and gradient-based algorithms), which are analytically derived and numerically compared based on the accuracy and speed of convergence criteria.

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

PubMed Central

Kazior, Thomas E.

2014-01-01

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications. PMID:24567473

Beyond CMOS: heterogeneous integration of III-V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems.

PubMed

Kazior, Thomas E

2014-03-28

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

Simple circuit for pacing hearts of experimental animals.

PubMed

Freeman, G L; Colston, J T

1992-06-01

In this paper we describe a simple pacing circuit which can be used to drive the heart over a wide range of rates. The circuit is an astable multivibrator, based on an LM555 integrated circuit. It is powered by a 9-V battery and is small enough for use in rabbits. The circuit is easily constructed and inexpensive, making it attractive for numerous applications in cardiovascular research.

A 40 GHz fully integrated circuit with a vector network analyzer and a coplanar-line-based detection area for circulating tumor cell analysis using 65 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nakanishi, Taiki; Matsunaga, Maya; Kobayashi, Atsuki; Nakazato, Kazuo; Niitsu, Kiichi

2018-03-01

A 40-GHz fully integrated CMOS-based circuit for circulating tumor cells (CTC) analysis, consisting of an on-chip vector network analyzer (VNA) and a highly sensitive coplanar-line-based detection area is presented in this paper. In this work, we introduce a fully integrated architecture that eliminates unwanted parasitic effects. The proposed analyzer was designed using 65 nm CMOS technology, and SPICE and MWS simulations were used to validate its operation. The simulation confirmed that the proposed circuit can measure S-parameter shifts resulting from the addition of various types of tumor cells to the detection area, the data of which are provided in a previous study: the |S 21| values for HepG2, A549, and HEC-1-A cells are -0.683, -0.580, and -0.623 dB, respectively. Additionally, the measurement demonstrated an S-parameters reduction of -25.7% when a silicone resin was put on the circuit. Hence, the proposed system is expected to contribute to cancer diagnosis.

Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

PubMed

Hasan, Mehedi; Hall, Trevor

2015-11-01

A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

An Anatomically Constrained Model for Path Integration in the Bee Brain.

PubMed

Stone, Thomas; Webb, Barbara; Adden, Andrea; Weddig, Nicolai Ben; Honkanen, Anna; Templin, Rachel; Wcislo, William; Scimeca, Luca; Warrant, Eric; Heinze, Stanley

2017-10-23

Path integration is a widespread navigational strategy in which directional changes and distance covered are continuously integrated on an outward journey, enabling a straight-line return to home. Bees use vision for this task-a celestial-cue-based visual compass and an optic-flow-based visual odometer-but the underlying neural integration mechanisms are unknown. Using intracellular electrophysiology, we show that polarized-light-based compass neurons and optic-flow-based speed-encoding neurons converge in the central complex of the bee brain, and through block-face electron microscopy, we identify potential integrator cells. Based on plausible output targets for these cells, we propose a complete circuit for path integration and steering in the central complex, with anatomically identified neurons suggested for each processing step. The resulting model circuit is thus fully constrained biologically and provides a functional interpretation for many previously unexplained architectural features of the central complex. Moreover, we show that the receptive fields of the newly discovered speed neurons can support path integration for the holonomic motion (i.e., a ground velocity that is not precisely aligned with body orientation) typical of bee flight, a feature not captured in any previously proposed model of path integration. In a broader context, the model circuit presented provides a general mechanism for producing steering signals by comparing current and desired headings-suggesting a more basic function for central complex connectivity, from which path integration may have evolved. Copyright © 2017 Elsevier Ltd. All rights reserved.

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit.

PubMed

Bougioukos, M; Kouloumentas, Ch; Spyropoulou, M; Giannoulis, G; Kalavrouziotis, D; Maziotis, A; Bakopoulos, P; Harmon, R; Rogers, D; Harrison, J; Poustie, A; Maxwell, G; Avramopoulos, H

2011-06-06

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors

PubMed Central

Graham, Anthony H. D.; Robbins, Jon; Bowen, Chris R.; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented. PMID:22163884

Genetic programs constructed from layered logic gates in single cells

PubMed Central

Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

2014-01-01

Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

Displacement Damage in Bipolar Linear Integrated Circuits

NASA Technical Reports Server (NTRS)

Rax, B. G.; Johnston, A. H.; Miyahira, T.

2000-01-01

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

Photonic integrated circuits based on silica and polymer PLC

NASA Astrophysics Data System (ADS)

Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

2013-03-01

Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

Modular integration of electronics and microfluidic systems using flexible printed circuit boards.

PubMed

Wu, Amy; Wang, Lisen; Jensen, Erik; Mathies, Richard; Boser, Bernhard

2010-02-21

Microfluidic systems offer an attractive alternative to conventional wet chemical methods with benefits including reduced sample and reagent volumes, shorter reaction times, high-throughput, automation, and low cost. However, most present microfluidic systems rely on external means to analyze reaction products. This substantially adds to the size, complexity, and cost of the overall system. Electronic detection based on sub-millimetre size integrated circuits (ICs) has been demonstrated for a wide range of targets including nucleic and amino acids, but deployment of this technology to date has been limited due to the lack of a flexible process to integrate these chips within microfluidic devices. This paper presents a modular and inexpensive process to integrate ICs with microfluidic systems based on standard printed circuit board (PCB) technology to assemble the independently designed microfluidic and electronic components. The integrated system can accommodate multiple chips of different sizes bonded to glass or PDMS microfluidic systems. Since IC chips and flex PCB manufacturing and assembly are industry standards with low cost, the integrated system is economical for both laboratory and point-of-care settings.

Dielectric Spectroscopic Detection of Early Failures in 3-D Integrated Circuits.

PubMed

Obeng, Yaw; Okoro, C A; Ahn, Jung-Joon; You, Lin; Kopanski, Joseph J

The commercial introduction of three dimensional integrated circuits (3D-ICs) has been hindered by reliability challenges, such as stress related failures, resistivity changes, and unexplained early failures. In this paper, we discuss a new RF-based metrology, based on dielectric spectroscopy, for detecting and characterizing electrically active defects in fully integrated 3D devices. These defects are traceable to the chemistry of the insolation dielectrics used in the through silicon via (TSV) construction. We show that these defects may be responsible for some of the unexplained early reliability failures observed in TSV enabled 3D devices.

Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication.

PubMed

Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

2017-02-01

In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80-100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes.

Interfacing spin qubits in quantum dots and donors—hot, dense, and coherent

NASA Astrophysics Data System (ADS)

Vandersypen, L. M. K.; Bluhm, H.; Clarke, J. S.; Dzurak, A. S.; Ishihara, R.; Morello, A.; Reilly, D. J.; Schreiber, L. R.; Veldhorst, M.

2017-09-01

Semiconductor spins are one of the few qubit realizations that remain a serious candidate for the implementation of large-scale quantum circuits. Excellent scalability is often argued for spin qubits defined by lithography and controlled via electrical signals, based on the success of conventional semiconductor integrated circuits. However, the wiring and interconnect requirements for quantum circuits are completely different from those for classical circuits, as individual direct current, pulsed and in some cases microwave control signals need to be routed from external sources to every qubit. This is further complicated by the requirement that these spin qubits currently operate at temperatures below 100 mK. Here, we review several strategies that are considered to address this crucial challenge in scaling quantum circuits based on electron spin qubits. Key assets of spin qubits include the potential to operate at 1 to 4 K, the high density of quantum dots or donors combined with possibilities to space them apart as needed, the extremely long-spin coherence times, and the rich options for integration with classical electronics based on the same technology.

Organic printed photonics: From microring lasers to integrated circuits

PubMed Central

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-01-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 105, which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices. PMID:26601256

Organic printed photonics: From microring lasers to integrated circuits.

PubMed

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-09-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

Silica-on-silicon waveguide quantum circuits.

PubMed

Politi, Alberto; Cryan, Martin J; Rarity, John G; Yu, Siyuan; O'Brien, Jeremy L

2008-05-02

Quantum technologies based on photons will likely require an integrated optics architecture for improved performance, miniaturization, and scalability. We demonstrate high-fidelity silica-on-silicon integrated optical realizations of key quantum photonic circuits, including two-photon quantum interference with a visibility of 94.8 +/- 0.5%; a controlled-NOT gate with an average logical basis fidelity of 94.3 +/- 0.2%; and a path-entangled state of two photons with fidelity of >92%. These results show that it is possible to directly "write" sophisticated photonic quantum circuits onto a silicon chip, which will be of benefit to future quantum technologies based on photons, including information processing, communication, metrology, and lithography, as well as the fundamental science of quantum optics.

PC based graphic display real-time particle beam uniformity

NASA Technical Reports Server (NTRS)

Huebner, M. A.; Malone, C. J.; Smith, L. S.; Soli, G. A.

1989-01-01

A technique has been developed to support the study of the effects of cosmic rays on integrated circuits. The system is designed to determine the particle distribution across the surface of an integrated circuit accurately while the circuit is bombarded by a particle beam. The system uses photomultiplier tubes, an octal discriminator, a computer-controlled NIM quad counter, and an IBM PC. It provides real-time operator feedback for fast beam tuning and monitors momentary fluctuations in the particle beam. The hardware, software, and system performance are described.

Thin glass based packaging and photonic single-mode waveguide integration by ion-exchange technology on board and module level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Lang, Günter; Schröder, Henning

2011-01-01

The proposed novel packaging approach merges micro-system packaging and glass integrated optics. It provides 3D optical single-mode intra system links to bridge the gap between novel photonic integrated circuits and the glass fibers for inter system interconnects. We introduce our hybrid 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip links. Optical mirrors and lenses provide optical mode matching for photonic IC assemblies and optical fiber interconnects. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties as reviewed in the paper. That makes it perfect for micro-system packaging. The adopted planar waveguide process based on ion-exchange technology is capable for high-volume manufacturing. This ion-exchange process and the optical propagation are described in detail for thin glass substrates. An extensive characterization of all basic circuit elements like straight and curved waveguides, couplers and crosses proves the low attenuation of the optical circuit elements.

Realizing topological edge states in a silicon nitride microring-based photonic integrated circuit.

PubMed

Yin, Chenxuan; Chen, Yujie; Jiang, Xiaohui; Zhang, Yanfeng; Shao, Zengkai; Xu, Pengfei; Yu, Siyuan

2016-10-15

Topological edge states in a photonic integrated circuit based on the platform of silicon nitride are demonstrated with a two-dimensional coupled resonator optical waveguide array involving the synthetic magnetic field for photons at near-infrared wavelengths. Measurements indicate that the topological edge states can be observed at certain wavelengths, with light travelling around the boundary of the array. Combined with the induced disorders in fabrication near the edge, the system shows the defect immunity under the topological protection of edge states.

Silicon/III-V laser with super-compact diffraction grating for WDM applications in electronic-photonic integrated circuits.

PubMed

Wang, Yadong; Wei, Yongqiang; Huang, Yingyan; Tu, Yongming; Ng, Doris; Lee, Cheewei; Zheng, Yunan; Liu, Boyang; Ho, Seng-Tiong

2011-01-31

We have demonstrated a heterogeneously integrated III-V-on-Silicon laser based on an ultra-large-angle super-compact grating (SCG). The SCG enables single-wavelength operation due to its high-spectral-resolution aberration-free design, enabling wavelength division multiplexing (WDM) applications in Electronic-Photonic Integrated Circuits (EPICs). The SCG based Si/III-V laser is realized by fabricating the SCG on silicon-on-insulator (SOI) substrate. Optical gain is provided by electrically pumped heterogeneous integrated III-V material on silicon. Single-wavelength lasing at 1550 nm with an output power of over 2 mW and a lasing threshold of around 150 mA were achieved.

Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator

PubMed Central

Kornijcuk, Vladimir; Lim, Hyungkwang; Seok, Jun Yeong; Kim, Guhyun; Kim, Seong Keun; Kim, Inho; Choi, Byung Joon; Jeong, Doo Seok

2016-01-01

The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (<100 Hz) with a capacitor of merely 6 fF, which is hosted in an FG metal-oxide-semiconductor field-effect transistor. The FG-LIF neuron also has the advantage of low operation power (<30 pW/spike). Finally, the proposed circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex. PMID:27242416

Integrated circuit package with lead structure and method of preparing the same

NASA Technical Reports Server (NTRS)

Kennedy, B. W. (Inventor)

1973-01-01

A beam-lead integrated circuit package assembly including a beam-lead integrated circuit chip, a lead frame array bonded to projecting fingers of the chip, a rubber potting compound disposed around the chip, and an encapsulating molded plastic is described. The lead frame array is prepared by photographically printing a lead pattern on a base metal sheet, selectively etching to remove metal between leads, and plating with gold. Joining of the chip to the lead frame array is carried out by thermocompression bonding of mating goldplated surfaces. A small amount of silicone rubber is then applied to cover the chip and bonded joints, and the package is encapsulated with epoxy resin, applied by molding.

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less

Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

2016-11-01

Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

Soldering Tool for Integrated Circuits

NASA Technical Reports Server (NTRS)

Takahashi, Ted H.

1987-01-01

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

PubMed Central

Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

2017-01-01

In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes. PMID:28145513

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator.

PubMed

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-07-04

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing.

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator

PubMed Central

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-01-01

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing. PMID:24993440

Silicon nitride tri-layer vertical Y-junction and 3D couplers with arbitrary splitting ratio for photonic integrated circuits.

PubMed

Shang, Kuanping; Pathak, Shibnath; Liu, Guangyao; Feng, Shaoqi; Li, Siwei; Lai, Weicheng; Yoo, S J B

2017-05-01

We designed and demonstrated a tri-layer Si₃N₄/SiO₂ photonic integrated circuit capable of vertical interlayer coupling with arbitrary splitting ratios. Based on this multilayer photonic integrated circuit platform with each layer thicknesses of 150 nm, 50 nm, and 150 nm, we designed and simulated the vertical Y-junctions and 3D couplers with arbitrary power splitting ratios between 1:10 and 10:1 and with negligible(< -50 dB) reflection. Based on the design, we fabricated and demonstrated tri-layer vertical Y-junctions with the splitting ratios of 1:1 and 3:2 with excess optical losses of 0.230 dB. Further, we fabricated and demonstrated the 1 × 3 3D couplers with the splitting ratio of 1:1:4 for symmetric structures and variable splitting ratio for asymmetric structures.

Integrated Electrode Arrays for Neuro-Prosthetic Implants

NASA Technical Reports Server (NTRS)

Brandon, Erik; Mojarradi, Mohammede

2003-01-01

Arrays of electrodes integrated with chip-scale packages and silicon-based integrated circuits have been proposed for use as medical electronic implants, including neuro-prosthetic devices that might be implanted in brains of patients who suffer from strokes, spinal-cord injuries, or amyotrophic lateral sclerosis. The electrodes of such a device would pick up signals from neurons in the cerebral cortex, and the integrated circuit would perform acquisition and preprocessing of signal data. The output of the integrated circuit could be used to generate, for example, commands for a robotic arm. Electrode arrays capable of acquiring electrical signals from neurons already exist, but heretofore, there has been no convenient means to integrate these arrays with integrated-circuit chips. Such integration is needed in order to eliminate the need for the extensive cabling now used to pass neural signals to data-acquisition and -processing equipment outside the body. The proposed integration would enable progress toward neuro-prostheses that would be less restrictive of patients mobility. An array of electrodes would comprise a set of thin wires of suitable length and composition protruding from and supported by a fine-pitch micro-ball grid array or chip-scale package (see figure). The associated integrated circuit would be mounted on the package face opposite the probe face, using the solder bumps (the balls of the ball grid array) to make the electrical connections between the probes and the input terminals of the integrated circuit. The key innovation is the insertion of probe wires of the appropriate length and material into the solder bumps through a reflow process, thereby fixing the probes in place and electrically connecting them with the integrated circuit. The probes could be tailored to any distribution of lengths and made of any suitable metal that could be drawn into fine wires. Furthermore, the wires could be coated with an insulating layer using anodization or other processes, to achieve the correct electrical impedance. The probe wires and the packaging materials must be biocompatible using such materials as lead-free solders. For protection, the chip and package can be coated with parylene.

Multiple piezo-patch energy harvesters integrated to a thin plate with AC-DC conversion: analytical modeling and numerical validation

NASA Astrophysics Data System (ADS)

Aghakhani, Amirreza; Basdogan, Ipek; Erturk, Alper

2016-04-01

Plate-like components are widely used in numerous automotive, marine, and aerospace applications where they can be employed as host structures for vibration based energy harvesting. Piezoelectric patch harvesters can be easily attached to these structures to convert the vibrational energy to the electrical energy. Power output investigations of these harvesters require accurate models for energy harvesting performance evaluation and optimization. Equivalent circuit modeling of the cantilever-based vibration energy harvesters for estimation of electrical response has been proposed in recent years. However, equivalent circuit formulation and analytical modeling of multiple piezo-patch energy harvesters integrated to thin plates including nonlinear circuits has not been studied. In this study, equivalent circuit model of multiple parallel piezoelectric patch harvesters together with a resistive load is built in electronic circuit simulation software SPICE and voltage frequency response functions (FRFs) are validated using the analytical distributedparameter model. Analytical formulation of the piezoelectric patches in parallel configuration for the DC voltage output is derived while the patches are connected to a standard AC-DC circuit. The analytic model is based on the equivalent load impedance approach for piezoelectric capacitance and AC-DC circuit elements. The analytic results are validated numerically via SPICE simulations. Finally, DC power outputs of the harvesters are computed and compared with the peak power amplitudes in the AC output case.

Study of Piezoelectric Vibration Energy Harvester with non-linear conditioning circuit using an integrated model

NASA Astrophysics Data System (ADS)

Manzoor, Ali; Rafique, Sajid; Usman Iftikhar, Muhammad; Mahmood Ul Hassan, Khalid; Nasir, Ali

2017-08-01

Piezoelectric vibration energy harvester (PVEH) consists of a cantilever bimorph with piezoelectric layers pasted on its top and bottom, which can harvest power from vibrations and feed to low power wireless sensor nodes through some power conditioning circuit. In this paper, a non-linear conditioning circuit, consisting of a full-bridge rectifier followed by a buck-boost converter, is employed to investigate the issues of electrical side of the energy harvesting system. An integrated mathematical model of complete electromechanical system has been developed. Previously, researchers have studied PVEH with sophisticated piezo-beam models but employed simplistic linear circuits, such as resistor, as electrical load. In contrast, other researchers have worked on more complex non-linear circuits but with over-simplified piezo-beam models. Such models neglect different aspects of the system which result from complex interactions of its electrical and mechanical subsystems. In this work, authors have integrated the distributed parameter-based model of piezo-beam presented in literature with a real world non-linear electrical load. Then, the developed integrated model is employed to analyse the stability of complete energy harvesting system. This work provides a more realistic and useful electromechanical model having realistic non-linear electrical load unlike the simplistic linear circuit elements employed by many researchers.

Stretchable polymer-based electronic device

DOEpatents

Maghribi, Mariam N [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA; Davidson, James Courtney [Livermore, CA; Wilson, Thomas S [Castro Valley, CA; Hamilton, Julie K [Tracy, CA; Benett, William J [Livermore, CA; Tovar, Armando R [San Antonio, TX

2008-02-26

A stretchable electronic circuit or electronic device and a polymer-based process to produce a circuit or electronic device containing a stretchable conducting circuit. The stretchable electronic apparatus has a central longitudinal axis and the apparatus is stretchable in a longitudinal direction generally aligned with the central longitudinal axis. The apparatus comprises a stretchable polymer body and at least one circuit line operatively connected to the stretchable polymer body. The circuit line extends in the longitudinal direction and has a longitudinal component that extends in the longitudinal direction and has an offset component that is at an angle to the longitudinal direction. The longitudinal component and the offset component allow the apparatus to stretch in the longitudinal direction while maintaining the integrity of the circuit line.

Neural CMOS-integrated circuit and its application to data classification.

PubMed

Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

2012-05-01

Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

The Electric Circuit as a System: A New Approach.

ERIC Educational Resources Information Center

Hartel, H.

1982-01-01

Traditionally, the terms "current,""voltage," and "resistance" are introduced in a linear sequence according to structure of the discipline and based on measurement operations. A new approach is discussed, the terms being introduced simultaneously in a qualitative way, using the system aspect of the electric circuit as an integrative base.…

Foundry fabricated photonic integrated circuit optical phase lock loop.

PubMed

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

Biosensor system-on-a-chip including CMOS-based signal processing circuits and 64 carbon nanotube-based sensors for the detection of a neurotransmitter.

PubMed

Lee, Byung Yang; Seo, Sung Min; Lee, Dong Joon; Lee, Minbaek; Lee, Joohyung; Cheon, Jun-Ho; Cho, Eunju; Lee, Hyunjoong; Chung, In-Young; Park, Young June; Kim, Suhwan; Hong, Seunghun

2010-04-07

We developed a carbon nanotube (CNT)-based biosensor system-on-a-chip (SoC) for the detection of a neurotransmitter. Here, 64 CNT-based sensors were integrated with silicon-based signal processing circuits in a single chip, which was made possible by combining several technological breakthroughs such as efficient signal processing, uniform CNT networks, and biocompatible functionalization of CNT-based sensors. The chip was utilized to detect glutamate, a neurotransmitter, where ammonia, a byproduct of the enzymatic reaction of glutamate and glutamate oxidase on CNT-based sensors, modulated the conductance signals to the CNT-based sensors. This is a major technological advancement in the integration of CNT-based sensors with microelectronics, and this chip can be readily integrated with larger scale lab-on-a-chip (LoC) systems for various applications such as LoC systems for neural networks.

Fully chip-embedded automation of a multi-step lab-on-a-chip process using a modularized timer circuit.

PubMed

Kang, Junsu; Lee, Donghyeon; Heo, Young Jin; Chung, Wan Kyun

2017-11-07

For highly-integrated microfluidic systems, an actuation system is necessary to control the flow; however, the bulk of actuation devices including pumps or valves has impeded the broad application of integrated microfluidic systems. Here, we suggest a microfluidic process control method based on built-in microfluidic circuits. The circuit is composed of a fluidic timer circuit and a pneumatic logic circuit. The fluidic timer circuit is a serial connection of modularized timer units, which sequentially pass high pressure to the pneumatic logic circuit. The pneumatic logic circuit is a NOR gate array designed to control the liquid-controlling process. By using the timer circuit as a built-in signal generator, multi-step processes could be done totally inside the microchip without any external controller. The timer circuit uses only two valves per unit, and the number of process steps can be extended without limitation by adding timer units. As a demonstration, an automation chip has been designed for a six-step droplet treatment, which entails 1) loading, 2) separation, 3) reagent injection, 4) incubation, 5) clearing and 6) unloading. Each process was successfully performed for a pre-defined step-time without any external control device.

19 CFR 10.14 - Fabricated components subject to the exemption.

Code of Federal Regulations, 2010 CFR

2010-04-01

... assembled, such as transistors, diodes, integrated circuits, machinery parts, or precut parts of wearing..., or integrated circuit wafers containing individual integrated circuit dice which have been scribed or... resulted in a substantial transformation of the foreign copper ingots. Example 2. An integrated circuit...

Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Connolly, D. J.

1986-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

Integrated circuit electrometer and sweep circuitry for an atmospheric probe

NASA Technical Reports Server (NTRS)

Zimmerman, L. E.

1971-01-01

The design of electrometer circuitry using an integrated circuit operational amplifier with a MOSFET input is described. Input protection against static voltages is provided by a dual ultra low leakage diode or a neon lamp. Factors affecting frequency response leakage resistance, and current stability are discussed, and methods are suggested for increasing response speed and for eliminating leakage resistance and current instabilities. Based on the above, two practical circuits, one having a linear response and the other a logarithmic response, were designed and evaluated experimentally. The design of a sweep circuit to implement mobility measurements using atmospheric probes is presented. A triangular voltage waveform is generated and shaped to contain a step in voltage from zero volts in both positive and negative directions.

Fast, High-Precision Readout Circuit for Detector Arrays

NASA Technical Reports Server (NTRS)

Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

2013-01-01

The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

Arrays of Carbon Nanotubes as RF Filters in Waveguides

NASA Technical Reports Server (NTRS)

Hoppe, Daniel; Hunt, Brian; Hoenk, Michael; Noca, Flavio; Xu, Jimmy

2003-01-01

Brushlike arrays of carbon nanotubes embedded in microstrip waveguides provide highly efficient (high-Q) mechanical resonators that will enable ultraminiature radio-frequency (RF) integrated circuits. In its basic form, this invention is an RF filter based on a carbon nanotube array embedded in a microstrip (or coplanar) waveguide, as shown in Figure 1. In addition, arrays of these nanotube-based RF filters can be used as an RF filter bank. Applications of this new nanotube array device include a variety of communications and signal-processing technologies. High-Q resonators are essential for stable, low-noise communications, and radar applications. Mechanical oscillators can exhibit orders of magnitude higher Qs than electronic resonant circuits, which are limited by resistive losses. This has motivated the development of a variety of mechanical resonators, including bulk acoustic wave (BAW) resonators, surface acoustic wave (SAW) resonators, and Si and SiC micromachined resonators (known as microelectromechanical systems or MEMS). There is also a strong push to extend the resonant frequencies of these oscillators into the GHz regime of state-of-the-art electronics. Unfortunately, the BAW and SAW devices tend to be large and are not easily integrated into electronic circuits. MEMS structures have been integrated into circuits, but efforts to extend MEMS resonant frequencies into the GHz regime have been difficult because of scaling problems with the capacitively-coupled drive and readout. In contrast, the proposed devices would be much smaller and hence could be more readily incorporated into advanced RF (more specifically, microwave) integrated circuits.

On-chip continuous-variable quantum entanglement

NASA Astrophysics Data System (ADS)

Masada, Genta; Furusawa, Akira

2016-09-01

Entanglement is an essential feature of quantum theory and the core of the majority of quantum information science and technologies. Quantum computing is one of the most important fruits of quantum entanglement and requires not only a bipartite entangled state but also more complicated multipartite entanglement. In previous experimental works to demonstrate various entanglement-based quantum information processing, light has been extensively used. Experiments utilizing such a complicated state need highly complex optical circuits to propagate optical beams and a high level of spatial interference between different light beams to generate quantum entanglement or to efficiently perform balanced homodyne measurement. Current experiments have been performed in conventional free-space optics with large numbers of optical components and a relatively large-sized optical setup. Therefore, they are limited in stability and scalability. Integrated photonics offer new tools and additional capabilities for manipulating light in quantum information technology. Owing to integrated waveguide circuits, it is possible to stabilize and miniaturize complex optical circuits and achieve high interference of light beams. The integrated circuits have been firstly developed for discrete-variable systems and then applied to continuous-variable systems. In this article, we review the currently developed scheme for generation and verification of continuous-variable quantum entanglement such as Einstein-Podolsky-Rosen beams using a photonic chip where waveguide circuits are integrated. This includes balanced homodyne measurement of a squeezed state of light. As a simple example, we also review an experiment for generating discrete-variable quantum entanglement using integrated waveguide circuits.

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

PubMed

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

PubMed Central

Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

2016-01-01

The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

PubMed

Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

2016-04-13

The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.

A modular cell-based biosensor using engineered genetic logic circuits to detect and integrate multiple environmental signals

PubMed Central

Wang, Baojun; Barahona, Mauricio; Buck, Martin

2013-01-01

Cells perceive a wide variety of cellular and environmental signals, which are often processed combinatorially to generate particular phenotypic responses. Here, we employ both single and mixed cell type populations, pre-programmed with engineered modular cell signalling and sensing circuits, as processing units to detect and integrate multiple environmental signals. Based on an engineered modular genetic AND logic gate, we report the construction of a set of scalable synthetic microbe-based biosensors comprising exchangeable sensory, signal processing and actuation modules. These cellular biosensors were engineered using distinct signalling sensory modules to precisely identify various chemical signals, and combinations thereof, with a quantitative fluorescent output. The genetic logic gate used can function as a biological filter and an amplifier to enhance the sensing selectivity and sensitivity of cell-based biosensors. In particular, an Escherichia coli consortium-based biosensor has been constructed that can detect and integrate three environmental signals (arsenic, mercury and copper ion levels) via either its native two-component signal transduction pathways or synthetic signalling sensors derived from other bacteria in combination with a cell-cell communication module. We demonstrate how a modular cell-based biosensor can be engineered predictably using exchangeable synthetic gene circuit modules to sense and integrate multiple-input signals. This study illustrates some of the key practical design principles required for the future application of these biosensors in broad environmental and healthcare areas. PMID:22981411

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit.

PubMed

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-29

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit

NASA Astrophysics Data System (ADS)

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-01

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Defense Industrial Base Assessment: U.S. Integrated Circuit Design and Fabrication Capability

DTIC Science & Technology

2009-05-01

in the U.S for the period 2003-2006, with projections to 2011.6 The resulting draft OTE survey was field tested for accuracy and usability with a...custom application specific integrated circuits (ASICs) to field programmable gate arrays (FPGAs). Companies of all sizes can manufacture these IC...able to design one-time Electronically Programmable Gate Arrays (EPGAs) while nine are able to design Field Programmable Gate Arrays (FPGAs). Eight

Nanoelectronics from the bottom up.

PubMed

Lu, Wei; Lieber, Charles M

2007-11-01

Electronics obtained through the bottom-up approach of molecular-level control of material composition and structure may lead to devices and fabrication strategies not possible with top-down methods. This review presents a brief summary of bottom-up and hybrid bottom-up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif. First, we will discuss representative electromechanical and resistance-change memory devices based on carbon nanotube and core-shell nanowire structures, respectively. These device structures show robust switching, promising performance metrics and the potential for terabit-scale density. Second, we will review architectures being developed for circuit-level integration, hybrid crossbar/CMOS circuits and array-based systems, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers. Finally, bottom-up fabrication approaches, including the opportunity for assembly of three-dimensional, vertically integrated multifunctional circuits, will be critically discussed.

Digitally Programmable Analogue Circuits for Sensor Conditioning Systems

PubMed Central

Zatorre, Guillermo; Medrano, Nicolás; Sanz, María Teresa; Aldea, Concepción; Calvo, Belén; Celma, Santiago

2009-01-01

This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components. PMID:22412331

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Graphene-based plasmonic photodetector for photonic integrated circuits.

PubMed

Kim, Jin Tae; Yu, Young-Jun; Choi, Hongkyw; Choi, Choon-Gi

2014-01-13

We developed a planar-type graphene-based plasmonic photodetector (PD) for the development of all-graphene photonic-integrated-circuits (PICs). By configuring the graphene plasmonic waveguide and PD structure all-in-one, the proposed graphene PD detects horizontally incident light. The photocurrent profile with opposite polarity is the maximum at graphene-electrode interfaces due to a Schottky-like barrier effect at the interface. The photocurrent amplitude increases with an increase of the graphene-metal interface length. Obtaining time constants of less than 39.7 ms for the time response, we concluded that the proposed graphene PD could be exploited further for application in all graphene-based PICs.

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Nanogap Electrodes towards Solid State Single-Molecule Transistors.

PubMed

Cui, Ajuan; Dong, Huanli; Hu, Wenping

2015-12-01

With the establishment of complementary metal-oxide-semiconductor (CMOS)-based integrated circuit technology, it has become more difficult to follow Moore's law to further downscale the size of electronic components. Devices based on various nanostructures were constructed to continue the trend in the minimization of electronics, and molecular devices are among the most promising candidates. Compared with other candidates, molecular devices show unique superiorities, and intensive studies on molecular devices have been carried out both experimentally and theoretically at the present time. Compared to two-terminal molecular devices, three-terminal devices, namely single-molecule transistors, show unique advantages both in fundamental research and application and are considered to be an essential part of integrated circuits based on molecular devices. However, it is very difficult to construct them using the traditional microfabrication techniques directly, thus new fabrication strategies are developed. This review aims to provide an exclusive way of manufacturing solid state gated nanogap electrodes, the foundation of constructing transistors of single or a few molecules. Such single-molecule transistors have the potential to be used to build integrated circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Common source cascode amplifiers for integrating IR-FPA applications

NASA Technical Reports Server (NTRS)

Woolaway, James T.; Young, Erick T.

1989-01-01

Space based astronomical infrared measurements present stringent performance requirements on the infrared detector arrays and their associated readout circuitry. To evaluate the usefulness of commercial CMOS technology for astronomical readout applications a theoretical and experimental evaluation was performed on source follower and common-source cascode integrating amplifiers. Theoretical analysis indicates that for conditions where the input amplifier integration capacitance is limited by the detectors capacitance the input referred rms noise electrons of each amplifier should be equivalent. For conditions of input gate limited capacitance the source follower should provide lower noise. Measurements of test circuits containing both source follower and common source cascode circuits showed substantially lower input referred noise for the common-source cascode input circuits. Noise measurements yielded 4.8 input referred rms noise electrons for an 8.5 minute integration. The signal and noise gain of the common-source cascode amplifier appears to offer substantial advantages in acheiving predicted noise levels.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

NASA Astrophysics Data System (ADS)

Shulaker, Max M.; Hills, Gage; Park, Rebecca S.; Howe, Roger T.; Saraswat, Krishna; Wong, H.-S. Philip; Mitra, Subhasish

2017-07-01

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors—promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage—fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip.

PubMed

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish

2017-07-05

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage-fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce 'highly processed' information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Automatic visual inspection system for microelectronics

NASA Technical Reports Server (NTRS)

Micka, E. Z. (Inventor)

1975-01-01

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Effect of the structure and mechanical properties of the near-surface layer of lithium niobate single crystals on the manufacture of integrated optic circuits

NASA Astrophysics Data System (ADS)

Sosunov, A. V.; Ponomarev, R. S.; Yur'ev, V. A.; Volyntsev, A. B.

2017-01-01

This paper shows that the near-surface layer of a lithium niobate single layer 15 μm in depth is essentially different from the rest of the volume of the material from the standpoint of composition, structure, and mechanical properties. The pointed out differences are due to the effect of cutting, polishing, and smoothing of the lithium niobate plates, which increase the density of point defects and dislocations. The increasing density of the structural defects leads to uncontrollable changes in the conditions of the formations of waveguides and the drifting of characteristics of integrated optical circuits. The results obtained are very important for the manufacture of lithium niobate based integrated optical circuits.

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liang-Yu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Design of high precision temperature control system for TO packaged LD

NASA Astrophysics Data System (ADS)

Liang, Enji; Luo, Baoke; Zhuang, Bin; He, Zhengquan

2017-10-01

Temperature is an important factor affecting the performance of TO package LD. In order to ensure the safe and stable operation of LD, a temperature control circuit for LD based on PID technology is designed. The MAX1978 and an external PID circuit are used to form a control circuit that drives the thermoelectric cooler (TEC) to achieve control of temperature and the external load can be changed. The system circuit has low power consumption, high integration and high precision,and the circuit can achieve precise control of the LD temperature. Experiment results show that the circuit can achieve effective and stable control of the laser temperature.

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

Assessment of SOI Devices and Circuits at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik; Hammoud, Ahmad; Patterson, Richard L.

2007-01-01

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Ultra-high aspect ratio copper nanowires as transparent conductive electrodes for dye sensitized solar cells

NASA Astrophysics Data System (ADS)

Zhu, Zhaozhao; Mankowski, Trent; Shikoh, Ali Sehpar; Touati, Farid; Benammar, Mohieddine A.; Mansuripur, Masud; Falco, Charles M.

2016-09-01

We report the synthesis of ultra-high aspect ratio copper nanowires (CuNW) and fabrication of CuNW-based transparent conductive electrodes (TCE) with high optical transmittance (>80%) and excellent sheet resistance (Rs <30 Ω/sq). These CuNW TCEs are subsequently hybridized with aluminum-doped zinc oxide (AZO) thin-film coatings, or platinum thin film coatings, or nickel thin-film coatings. Our hybrid transparent electrodes can replace indium tin oxide (ITO) films in dye-sensitized solar cells (DSSCs) as either anodes or cathodes. We highlight the challenges of integrating bare CuNWs into DSSCs, and demonstrate that hybridization renders the solar cell integrations feasible. The CuNW/AZO-based DSSCs have reasonably good open-circuit voltage (Voc = 720 mV) and short-circuit current-density (Jsc = 0.96 mA/cm2), which are comparable to what is obtained with an ITO-based DSSC fabricated with a similar process. Our CuNW-Ni based DSSCs exhibit a good open-circuit voltage (Voc = 782 mV) and a decent short-circuit current (Jsc = 3.96 mA/cm2), with roughly 1.5% optical-to-electrical conversion efficiency.

Design of micro-ring optical sensors and circuits for integration on optical printed circuit boards (O-PCBs)

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, Hyun S.; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.

2007-05-01

We report on the design of micro-ring resonator optical sensors for integration on what we call optical printed circuit boards (O-PCBs). The objective is to realize application-specific O-PCBs, either on hard board or on flexible board, by integrating micro/nano-scale optical sensors for compact, light-weight, low-energy, high-speed, intelligent, and environmentally friendly processing of information. The O-PCBs consist of two-dimensional planar arrays of micro/nano-scale optical wires, circuits and devices that are interconnected and integrated to perform the functions of sensing and then storing, transporting, processing, switching, routing and distributing optical signals that have been collected by means of sensors. For fabrication, the polymer and organic optical wires and waveguides are first fabricated on a board and are used to interconnect and integrate sensors and other micro/ nano-scale photonic devices. Here, in our study, we focus on the sensors based on the micro-ring structures. We designed bio-sensors using silicon based micro-ring resonator. We investigate the characteristics such as sensitivity and selectivity (or quality factor) of micro-ring resonator for their use in bio-sensing application. We performed simulation studies on the quality factor of micro-ring resonators by varying the radius of the ring resonators and the separation between adjacent waveguides. We introduce the effective coupling coefficient as a realistic value to describe the strength of the coupling in micro-ring resonators.

Conception et realisation d'un echantillonneur de grande vitesse en technologie HIGFET (transistor a effet de champ avec heterostructure et grille isolee)

NASA Astrophysics Data System (ADS)

Tazlauanu, Mihai

The research work reported in this thesis details a new fabrication technology for high speed integrated circuits in the broadest sense, including original contributions to device modeling, circuit simulation, integrated circuit design, wafer fabrication, micro-physical and electrical characterization, process flow and final device testing as part of an electrical system. The primary building block of this technology is the heterostructure insulated gate field effect transistor, HIGFET. We used an InP/InGaAs epitaxial heterostructure to ensure a high charge carrier mobility and hence obtain a higher operating frequency than that currently possible for silicon devices. We designed and built integrated circuits with two system architectures. The first architecture integrates the clock signal generator with the sample and hold circuitry on the InP die, while the second is a hybrid architecture of an InP sample and hold assembled with an external clock signal generator made with ECL circuits on GaAs. To generate the clock signals on the same die with the sample and hold circuits, we developed a digital circuit family based on an original inverter, appropriate for depletion mode NMOS technology. We used this circuit to design buffer amplifiers and ring oscillators. Four mask sets produced in a Cadence environment, have permitted the fabrication of test and working devices. Each new mask generation has reflected the previous achievements and has implemented new structures and circuit techniques. The fabrication technology has undergone successive modifications and refinements to optimize device manufacturing. Particular attention has been paid to the technological robustness. The plasma enhanced etching process (RIE) had been used for an exhaustive study for the statistical simulation of the technological steps. Electrical measurements, performed on the experimental samples, have permitted the modeling of the devices, technological processing to be adjusted and circuit design improved. Electrical measurements performed on dedicated test structures, during the fabrication cycle, allowed the identification and correction of some technological problems (ohmic contacts, current leakage, interconnection integrity, and thermal instabilities). Feedback corrections were validated by dedicated experiments with the experimental effort optimized by statistical techniques (factorial fractional design). (Abstract shortened by UMI.)

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Nonreciprocal frequency conversion in a multimode microwave optomechanical circuit

NASA Astrophysics Data System (ADS)

Feofanov, A. K.; Bernier, N. R.; Toth, L. D.; Koottandavida, A.; Kippenberg, T. J.

Nonreciprocal devices such as isolators, circulators, and directional amplifiers are pivotal to quantum signal processing with superconducting circuits. In the microwave domain, commercially available nonreciprocal devices are based on ferrite materials. They are barely compatible with superconducting quantum circuits, lossy, and cannot be integrated on chip. Significant potential exists for implementing non-magnetic chip-scale nonreciprocal devices using microwave optomechanical circuits. Here we demonstrate a possibility of nonreciprocal frequency conversion in a multimode microwave optomechanical circuit using solely optomechanical interaction between modes. The conversion scheme and the results reflecting the actual progress on the experimental implementation of the scheme will be presented.

Mouldable all-carbon integrated circuits

NASA Astrophysics Data System (ADS)

Sun, Dong-Ming; Timmermans, Marina Y.; Kaskela, Antti; Nasibulin, Albert G.; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I.; Ohno, Yutaka

2013-08-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027cm2V-1s-1 and an ON/OFF ratio of 105. The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Mouldable all-carbon integrated circuits.

PubMed

Sun, Dong-Ming; Timmermans, Marina Y; Kaskela, Antti; Nasibulin, Albert G; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I; Ohno, Yutaka

2013-01-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027 cm(2) V(-1) s(-1) and an ON/OFF ratio of 10(5). The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

A fast low-power optical memory based on coupled micro-ring lasers

NASA Astrophysics Data System (ADS)

Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

2004-11-01

The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit.

PubMed

Yao, Zong; Liang, Ting; Jia, Pinggang; Hong, Yingping; Qi, Lei; Lei, Cheng; Zhang, Bin; Xiong, Jijun

2016-06-18

This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI) material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of -50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts), the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor's output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit

PubMed Central

Yao, Zong; Liang, Ting; Jia, Pinggang; Hong, Yingping; Qi, Lei; Lei, Cheng; Zhang, Bin; Xiong, Jijun

2016-01-01

This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI) material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of −50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts), the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor’s output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments. PMID:27322288

Facilitating Integration of Electron Beam Lithography Devices with Interactive Videodisc, Computer-Based Simulation and Job Aids.

ERIC Educational Resources Information Center

Von Der Linn, Robert Christopher

A needs assessment of the Grumman E-Beam Systems Group identified the requirement for additional skill mastery for the engineers who assemble, integrate, and maintain devices used to manufacture integrated circuits. Further analysis of the tasks involved led to the decision to develop interactive videodisc, computer-based job aids to enable…

A programmable microsystem using system-on-chip for real-time biotelemetry.

PubMed

Wang, Lei; Johannessen, Erik A; Hammond, Paul A; Cui, Li; Reid, Stuart W J; Cooper, Jonathan M; Cumming, David R S

2005-07-01

A telemetry microsystem, including multiple sensors, integrated instrumentation and a wireless interface has been implemented. We have employed a methodology akin to that for System-on-Chip microelectronics to design an integrated circuit instrument containing several "intellectual property" blocks that will enable convenient reuse of modules in future projects. The present system was optimized for low-power and included mixed-signal sensor circuits, a programmable digital system, a feedback clock control loop and RF circuits integrated on a 5 mm x 5 mm silicon chip using a 0.6 microm, 3.3 V CMOS process. Undesirable signal coupling between circuit components has been investigated and current injection into sensitive instrumentation nodes was minimized by careful floor-planning. The chip, the sensors, a magnetic induction-based transmitter and two silver oxide cells were packaged into a 36 mm x 12 mm capsule format. A base station was built in order to retrieve the data from the microsystem in real-time. The base station was designed to be adaptive and timing tolerant since the microsystem design was simplified to reduce power consumption and size. The telemetry system was found to have a packet error rate of 10(-3) using an asynchronous simplex link. Trials in animal carcasses were carried out to show that the transmitter was as effective as a conventional RF device whilst consuming less power.

Compressive Sensing Based Bio-Inspired Shape Feature Detection CMOS Imager

NASA Technical Reports Server (NTRS)

Duong, Tuan A. (Inventor)

2015-01-01

A CMOS imager integrated circuit using compressive sensing and bio-inspired detection is presented which integrates novel functions and algorithms within a novel hardware architecture enabling efficient on-chip implementation.

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Low-temperature crack-free Si3N4 nonlinear photonic circuits for CMOS-compatible optoelectronic co-integration

NASA Astrophysics Data System (ADS)

Casale, Marco; Kerdiles, Sebastien; Brianceau, Pierre; Hugues, Vincent; El Dirani, Houssein; Sciancalepore, Corrado

2017-02-01

In this communication, authors report for the first time on the fabrication and testing of Si3N4 non-linear photonic circuits for CMOS-compatible monolithic co-integration with silicon-based optoelectronics. In particular, a novel process has been developed to fabricate low-loss crack-free Si3N4 750-nm-thick films for Kerr-based nonlinear functions featuring full thermal budget compatibility with existing Silicon photonics and front-end Si optoelectronics. Briefly, differently from previous and state-of-the-art works, our nonlinear nitride-based platform has been realized without resorting to commonly-used high-temperature annealing ( 1200°C) of the film and its silica upper-cladding used to break N-H bonds otherwise causing absorption in the C-band and destroying its nonlinear functionality. Furthermore, no complex and fabrication-intolerant Damascene process - as recently reported earlier this year - aimed at controlling cracks generated in thick tensile-strained Si3N4 films has been used as well. Instead, a tailored Si3N4 multiple-step film deposition in 200-mm LPCVD-based reactor and subsequent low-temperature (400°C) PECVD oxide encapsulation have been used to fabricate the nonlinear micro-resonant circuits aiming at generating optical frequency combs via optical parametric oscillators (OPOs), thus allowing the monolithic co-integration of such nonlinear functions on existing CMOS-compatible optoelectronics, for both active and passive components such as, for instance, silicon modulators and wavelength (de-)multiplexers. Experimental evidence based on wafer-level statistics show nitride-based 112-μm-radius ring resonators using such low-temperature crack-free nitride film exhibiting quality factors exceeding Q >3 x 105, thus paving the way to low-threshold power-efficient Kerr-based comb sources and dissipative temporal solitons in the C-band featuring full thermal processing compatibility with Si photonic integrated circuits (Si-PICs).

Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

PubMed

Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers

PubMed Central

Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V.

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification. PMID:26798055

Integrated source of tunable nonmaximally mode-entangled photons in a domain-engineered lithium niobate waveguide

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ming, Yang; Wu, Zi-jian; Xu, Fei, E-mail: feixu@nju.edu.cn

The nonmaximally entangled state is a special kind of entangled state, which has important applications in quantum information processing. It has been generated in quantum circuits based on bulk optical elements. However, corresponding schemes in integrated quantum circuits have been rarely considered. In this Letter, we propose an effective solution for this problem. An electro-optically tunable nonmaximally mode-entangled photon state is generated in an on-chip domain-engineered lithium niobate (LN) waveguide. Spontaneous parametric down-conversion and electro-optic interaction are effectively combined through suitable domain design to transform the entangled state into our desired formation. Moreover, this is a flexible approach to entanglementmore » architectures. Other kinds of reconfigurable entanglements are also achievable through this method. LN provides a very promising platform for future quantum circuit integration.« less

Electro-optical Probing Of Terahertz Integrated Circuits

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Romanofsky, R.; Whitaker, J. F.; Valdmanis, J. A.; Mourou, G.; Jackson, T. A.

1990-01-01

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Nonlinear relaxation algorithms for circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saleh, R.A.

Circuit simulation is an important Computer-Aided Design (CAD) tool in the design of Integrated Circuits (IC). However, the standard techniques used in programs such as SPICE result in very long computer-run times when applied to large problems. In order to reduce the overall run time, a number of new approaches to circuit simulation were developed and are described. These methods are based on nonlinear relaxation techniques and exploit the relative inactivity of large circuits. Simple waveform-processing techniques are described to determine the maximum possible speed improvement that can be obtained by exploiting this property of large circuits. Three simulation algorithmsmore » are described, two of which are based on the Iterated Timing Analysis (ITA) method and a third based on the Waveform-Relaxation Newton (WRN) method. New programs that incorporate these techniques were developed and used to simulate a variety of industrial circuits. The results from these simulations are provided. The techniques are shown to be much faster than the standard approach. In addition, a number of parallel aspects of these algorithms are described, and a general space-time model of parallel-task scheduling is developed.« less

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

PubMed

Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

2017-02-14

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

PubMed Central

Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

2017-01-01

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

Wide-band polarization controller for Si photonic integrated circuits.

PubMed

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

Schematic driven silicon photonics design

NASA Astrophysics Data System (ADS)

Chrostowski, Lukas; Lu, Zeqin; Flückiger, Jonas; Pond, James; Klein, Jackson; Wang, Xu; Li, Sarah; Tai, Wei; Hsu, En Yao; Kim, Chan; Ferguson, John; Cone, Chris

2016-03-01

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is very common for the design to begin at the physical component level. In order to build large integrated photonic systems, it is crucial to design using a schematic-driven approach. This includes simulations based on schematics, schematic-driven layout, layout versus schematic verification, and post-layout simulations. This paper describes such a design framework implemented using Mentor Graphics and Lumerical Solutions design tools. In addition, we describe challenges in silicon photonics related to manufacturing, and how these can be taken into account in simulations and how these impact circuit performance.

Basic dynamics from a pulse-coupled network of autonomous integrate-and-fire chaotic circuits.

PubMed

Nakano, H; Saito, T

2002-01-01

This paper studies basic dynamics from a novel pulse-coupled network (PCN). The unit element of the PCN is an integrate-and-fire circuit (IFC) that exhibits chaos. We an give an iff condition for the chaos generation. Using two IFC, we construct a master-slave PCN. It exhibits interesting chaos synchronous phenomena and their breakdown phenomena. We give basic classification of the phenomena and their existence regions can be elucidated in the parameter space. We then construct a ring-type PCN and elucidate that the PCN exhibits interesting grouping phenomena based on the chaos synchronization patterns. Using a simple test circuit, some of typical phenomena can be verified in the laboratory.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Testing Fixture For Microwave Integrated Circuits

NASA Technical Reports Server (NTRS)

Romanofsky, Robert; Shalkhauser, Kurt

1989-01-01

Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

CMOS output buffer wave shaper

NASA Technical Reports Server (NTRS)

Albertson, L.; Whitaker, S.; Merrell, R.

1990-01-01

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

A silicon technology for millimeter-wave monolithic circuits

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-12-01

A silicon millimeter-wave integrated-circuit (SIMMWIC) technology that includes high-energy ion implantation and pulsed-laser annealing, secondary ion mass spectrometry (SIMS) profile diagnostics, and novel wafer thinning has been developed. This technology has been applied to a SIMMWIC single-pole single-throw (SPST) switch and to IMPATT and p-i-n diode fabrication schemes. Thus, the SIMMWIC technology is a proven base for monolithic millimeter-wave sources and control circuit applications.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Stable long-term indigo production by overexpression of dioxygenase genes using a chromosomal integrated cascade expression circuit.

PubMed

Royo, Jose Luis; Moreno-Ruiz, Emilia; Cebolla, Angel; Santero, Eduardo

2005-03-16

In our laboratory we have analyzed different factors to maximize the yield in heterologous protein expression for long-term cultivation, by combination of an efficient cascade expression system and stable integration in the bacterial chromosome. In this work, we have explored this system for the production of indigo dye as a model for biotechnological production, by expressing in Escherichia coli the thnA1A2A3A4 genes from Sphingomonas macrogolitabida strain TFA, which encode the components of a tetralin dioxygenase activity. We compared Ptac, and the Pm-based cascade expression circuit in a multicopy plasmid and stably integrated into the bacterial chromosome. Plasmid-based expression systems resulted in instability of indigo production when serially diluted batch experiments were performed without a selective pressure. This problem was solved by integrating the expression module in the chromosome. Despite the gene dosage reduction, the synergic effect of the cascade expression system produced comparable expression to the dioxygenase activity in the plasmid configuration but could be stably maintained for at least 5 days. Here, we show that the cascade amplification circuit integrated in the chromosome could be an excellent system for tight control and stable production of recombinant products.

Solar cell circuit and method for manufacturing solar cells

NASA Technical Reports Server (NTRS)

Mardesich, Nick (Inventor)

2010-01-01

The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.

Universal discrete Fourier optics RF photonic integrated circuit architecture.

PubMed

Hall, Trevor J; Hasan, Mehedi

2016-04-04

This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO_3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

System Modeling of a MEMS Vibratory Gyroscope and Integration to Circuit Simulation.

PubMed

Kwon, Hyukjin J; Seok, Seyeong; Lim, Geunbae

2017-11-18

Recently, consumer applications have dramatically created the demand for low-cost and compact gyroscopes. Therefore, on the basis of microelectromechanical systems (MEMS) technology, many gyroscopes have been developed and successfully commercialized. A MEMS gyroscope consists of a MEMS device and an electrical circuit for self-oscillation and angular-rate detection. Since the MEMS device and circuit are interactively related, the entire system should be analyzed together to design or test the gyroscope. In this study, a MEMS vibratory gyroscope is analyzed based on the system dynamic modeling; thus, it can be mathematically expressed and integrated into a circuit simulator. A behavioral simulation of the entire system was conducted to prove the self-oscillation and angular-rate detection and to determine the circuit parameters to be optimized. From the simulation, the operating characteristic according to the vacuum pressure and scale factor was obtained, which indicated similar trends compared with those of the experimental results. The simulation method presented in this paper can be generalized to a wide range of MEMS devices.

A clocking discipline for two-phase digital integrated circuits

NASA Astrophysics Data System (ADS)

Noice, D. C.

1983-09-01

Sooner or later a designer of digital circuits must face the problem of timing verification so he can avoid errors caused by clock skew, critical races, and hazards. Unlike previous verification methods, such as timing simulation and timing analysis, the approach presented here guarantees correct operation despite uncertainty about delays in the circuit. The result is a clocking discipline that deals with timing abstractions only. It is not based on delay calculations; it is only concerned with the correct, synchronous operation at some clock rate. Accordingly, it may be used earlier in the design cycle, which is particularly important to integrated circuit designs. The clocking discipline consists of a notation of clocking types, and composition rules for using the types. Together, the notation and rules define a formal theory of two phase clocking. The notation defines the names and exact characteristics for different signals that are used in a two phase digital system. The notation makes it possible to develop rules for propagating the clocking types through particular circuits.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

PubMed

Prezioso, M; Merrikh-Bayat, F; Hoskins, B D; Adam, G C; Likharev, K K; Strukov, D B

2015-05-07

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

InP-based three-dimensional photonic integrated circuits

NASA Astrophysics Data System (ADS)

Tsou, Diana; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volumes require high data communication bandwidth over longer distances than short wavelength (850 nm) multi-mode fiber systems can provide. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low cost, high-speed laser modules at 1310 and 1550 nm wavelengths are required. The great success of GaAs 850 nm VCSELs for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with available intrinsic materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits, which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits (PICs) have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform for fabricating InP-based photonic integrated circuits compatible with surface-emitting laser technology. Employing InP transparency at 1310 and 1550 nm wavelengths, we have created 3-D photonic integrated circuits (PICs) by utilizing light beams in both surface normal and in-plane directions within the InP-based structure. This additional beam routing flexibility allows significant size reduction and process simplification without sacrificing device performance. This innovative 3-D PIC technology platform can be easily extended to create surface-emitting lasers integrated with power monitoring detectors, micro-lenses, external modulators, amplifiers, and other passive and active components. Such added functionality can produce cost--effective solutions for the highest-end laser transmitters required for datacom and short range telecom networks, as well as fiber channels and other cost and performance sensitive applications. We present results for 1310 nm photonic IC surface-emitting laser transmitters operating at 2.5 Gbps without active thermal electric cooling.

Universal nondestructive mm-wave integrated circuit test fixture

NASA Technical Reports Server (NTRS)

Romanofsky, Robert R. (Inventor); Shalkhauser, Kurt A. (Inventor)

1990-01-01

Monolithic microwave integrated circuit (MMIC) test includes a bias module having spring-loaded contacts which electrically engage pads on a chip carrier disposed in a recess of a base member. RF energy is applied to and passed from the chip carrier by chamfered edges of ridges in the waveguide passages of housings which are removably attached to the base member. Thru, Delay, and Short calibration standards having dimensions identical to those of the chip carrier assure accuracy and reliability of the test. The MMIC chip fits in an opening in the chip carrier with the boundaries of the MMIC lying on movable reference planes thereby establishing accuracy and flexibility.

High Density Polymer-Based Integrated Electgrode Array

DOEpatents

Maghribi, Mariam N.; Krulevitch, Peter A.; Davidson, James Courtney; Hamilton, Julie K.

2006-04-25

A high density polymer-based integrated electrode apparatus that comprises a central electrode body and a multiplicity of arms extending from the electrode body. The central electrode body and the multiplicity of arms are comprised of a silicone material with metal features in said silicone material that comprise electronic circuits.

Reusable vibration resistant integrated circuit mounting socket

DOEpatents

Evans, Craig N.

1995-01-01

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Portable Cytometry Using Microscale Electronic Sensing

PubMed Central

Emaminejad, Sam; Paik, Kee-Hyun; Tabard-Cossa, Vincent; Javanmard, Mehdi

2015-01-01

In this manuscript, we present three different micro-impedance sensing architectures for electronic counting of cells and beads. The first method of sensing is based on using an open circuit sensing electrode integrated in a micro-pore, which measures the shift in potential as a micron-sized particle passes through. Our micro-pore, based on a funnel shaped microchannel, was fabricated in PDMS and was bound covalently to a glass substrate patterned with a gold open circuit electrode. The amplification circuitry was integrated onto a battery-powered custom printed circuit board. The second method is based on a three electrode differential measurement, which opens up the potential of using signal processing techniques to increase signal to noise ratio post measurement. The third architecture uses a contactless sensing approach, which significantly minimizes the cost of the consumable component of the impedance cytometer. We demonstrated proof of concept for the three sensing architectures by measuring the detected signal due to the passage of micron sized beads through the pore. PMID:27647950

A ROIC for Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET sensitive to histamine.

PubMed

Samah, N L M A; Lee, Khuan Y; Sulaiman, S A; Jarmin, R

2017-07-01

Intolerance of histamine could lead to scombroid poisoning with fatal consequences. Current detection methods for histamine are wet laboratory techniques which employ expensive equipment that depends on skills of seasoned technicians and produces delayed test analysis result. Previous works from our group has established that ISFETs can be adapted for detecting histamine with the use of a novel membrane. However, work to integrate ISFETs with a readout interfacing circuit (ROIC) circuit to display the histamine concentration has not been reported so far. This paper concerns the development of a ROIC specifically to integrate with a Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET to display the histamine concentration. It embodies the design of constant voltage constant current (CVCC) circuit, amplification circuit and micro-controller based display circuit. A DC millivolt source is used to substitute the membrane modified ISFET as preliminary work. Input is histamine concentration corresponding to the safety level designated by the Food and Drugs Administration (FDA). Results show the CVCC circuit makes the output follows the input and keeps VDS constant. The amplification circuit amplifies the output from the CVCC circuit to the range 2.406-4.888V to integrate with the microcontroller, which is programmed to classify and display the histamine safety level and its corresponding voltage on a LCD panel. The ROIC could be used to produce direct output voltages corresponding to histamine concentrations, for in-situ applications.

Integrated coherent matter wave circuits

DOE PAGES

Ryu, C.; Boshier, M. G.

2015-09-21

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore » electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

High-flux ionic diodes, ionic transistors and ionic amplifiers based on external ion concentration polarization by an ion exchange membrane: a new scalable ionic circuit platform.

PubMed

Sun, Gongchen; Senapati, Satyajyoti; Chang, Hsueh-Chia

2016-04-07

A microfluidic ion exchange membrane hybrid chip is fabricated using polymer-based, lithography-free methods to achieve ionic diode, transistor and amplifier functionalities with the same four-terminal design. The high ionic flux (>100 μA) feature of the chip can enable a scalable integrated ionic circuit platform for micro-total-analytical systems.

Empty substrate integrated waveguide technology for E plane high-frequency and high-performance circuits

NASA Astrophysics Data System (ADS)

Belenguer, Angel; Cano, Juan Luis; Esteban, Héctor; Artal, Eduardo; Boria, Vicente E.

2017-01-01

Substrate integrated circuits (SIC) have attracted much attention in the last years because of their great potential of low cost, easy manufacturing, integration in a circuit board, and higher-quality factor than planar circuits. A first suite of SIC where the waves propagate through dielectric have been first developed, based on the well-known substrate integrated waveguide (SIW) and related technological implementations. One step further has been made with a new suite of empty substrate integrated waveguides, where the waves propagate through air, thus reducing the associated losses. This is the case of the empty substrate integrated waveguide (ESIW) or the air-filled substrate integrated waveguide (air-filled SIW). However, all these SIC are H plane structures, so classical H plane solutions in rectangular waveguides have already been mapped to most of these new SIC. In this paper a novel E plane empty substrate integrated waveguide (ESIW-E) is presented. This structure allows to easily map classical E plane solutions in rectangular waveguide to this new substrate integrated solution. It is similar to the ESIW, although more layers are needed to build the structure. A wideband transition (covering the frequency range between 33 GHz and 50 GHz) from microstrip to ESIW-E is designed and manufactured. Measurements are successfully compared with simulation, proving the validity of this new SIC. A broadband high-frequency phase shifter (for operation from 35 GHz to 47 GHz) is successfully implemented in ESIW-E, thus proving the good performance of this new SIC in a practical application.

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Tumor Immunotherapy by Gene-circuit Recruited Immunomodulatory Systems (TIGRIS) for Prostate Cancer

DTIC Science & Technology

2017-09-01

Fu, X., Huang, W., and Cai, Z. (2014). Syn- thesizing AND gate genetic circuits based on CRISPR -Cas9 for identification of bladder cancer cells. Nat...and Lu, T.K. (2014). Multi- plexed and programmable regulation of gene networks with an integrated RNA and CRISPR /Cas toolkit in human cells. Mol

Energy efficient circuit design using nanoelectromechanical relays

NASA Astrophysics Data System (ADS)

Venkatasubramanian, Ramakrishnan

Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS. This dissertation demonstrates NEM relay based charge pump and NEM-CMOS heterogeneous discontinuous conduction mode (DCM) buck regulator and the results are compared against a standard commercial 0.35μm CMOS implementation. It is shown that NEM-CMOS heterogeneous DC-DC converter has an area savings of 60% over CMOS and achieves an overall higher efficiency over CMOS, with a peak efficiency of 94.3% at 100mA. NEM relays offers unprecedented 10X-30X energy efficiency improvement in logic design for low frequency operation and has the potential to break the CMOS efficiency barrier in power electronic circuits as well. The practical aspects of NEM Relay integration are evaluated and algorithms for synthesis and development of large NEM relay based logic circuits are explored.

Space Gator: a giant leap for fiber optic sensing

NASA Astrophysics Data System (ADS)

Evenblij, R. S.; Leijtens, J. A. P.

2017-11-01

Fibre Optic Sensing is a rapidly growing application field for Photonics Integrated Circuits (PIC) technology. PIC technology is regarded enabling for required performances and miniaturization of next generation fibre optic sensing instrumentation. So far a number of Application Specific Photonics Integrated Circuits (ASPIC) based interrogator systems have been realized as operational system-on-chip devices. These circuits have shown that all basic building blocks are working and complete interrogator on chip solutions can be produced. Within the Saristu (FP7) project several high reliability solutions for fibre optic sensing in Aeronautics are being developed, combining the specifically required performance aspects for the different sensing applications: damage detection, impact detection, load monitoring and shape sensing (including redundancy aspects and time division features). Further developments based on devices and taking into account specific space requirements (like radiation aspects) will lead to the Space Gator, which is a radiation tolerant highly integrated Fibre Bragg Grating (FBG) interrogator on chip. Once developed and qualified the Space Gator will be a giant leap for fibre optic sensing in future space applications.

Development of a W-band Serpentine Waveguide Amplifier based on a UV-LIGA Microfabricated Copper Circuit

DTIC Science & Technology

2013-03-01

beam tunnel [5,6] for a high - power , wideband W- band traveling-wave tube (TWT) amplifier. UV-LIGA is also a promising technique at higher...wide- band , high - power operation of the amplifier [7, 8]. The interaction circuit consists of two traveling-wave stages separated by a power ...technique produces monolithic all-copper circuits, integrated with electron beam tunnel, suitable for high - power continuous-wave operation [1]. We

Temporal integration and 1/f power scaling in a circuit model of cerebellar interneurons.

PubMed

Maex, Reinoud; Gutkin, Boris

2017-07-01

Inhibitory interneurons interconnected via electrical and chemical (GABA A receptor) synapses form extensive circuits in several brain regions. They are thought to be involved in timing and synchronization through fast feedforward control of principal neurons. Theoretical studies have shown, however, that whereas self-inhibition does indeed reduce response duration, lateral inhibition, in contrast, may generate slow response components through a process of gradual disinhibition. Here we simulated a circuit of interneurons (stellate and basket cells) of the molecular layer of the cerebellar cortex and observed circuit time constants that could rise, depending on parameter values, to >1 s. The integration time scaled both with the strength of inhibition, vanishing completely when inhibition was blocked, and with the average connection distance, which determined the balance between lateral and self-inhibition. Electrical synapses could further enhance the integration time by limiting heterogeneity among the interneurons and by introducing a slow capacitive current. The model can explain several observations, such as the slow time course of OFF-beam inhibition, the phase lag of interneurons during vestibular rotation, or the phase lead of Purkinje cells. Interestingly, the interneuron spike trains displayed power that scaled approximately as 1/ f at low frequencies. In conclusion, stellate and basket cells in cerebellar cortex, and interneuron circuits in general, may not only provide fast inhibition to principal cells but also act as temporal integrators that build a very short-term memory. NEW & NOTEWORTHY The most common function attributed to inhibitory interneurons is feedforward control of principal neurons. In many brain regions, however, the interneurons are densely interconnected via both chemical and electrical synapses but the function of this coupling is largely unknown. Based on large-scale simulations of an interneuron circuit of cerebellar cortex, we propose that this coupling enhances the integration time constant, and hence the memory trace, of the circuit. Copyright © 2017 the American Physiological Society.

High-resolution inkjet printing of all-polymer transistor circuits.

PubMed

Sirringhaus, H; Kawase, T; Friend, R H; Shimoda, T; Inbasekaran, M; Wu, W; Woo, E P

2000-12-15

Direct printing of functional electronic materials may provide a new route to low-cost fabrication of integrated circuits. However, to be useful it must allow continuous manufacturing of all circuit components by successive solution deposition and printing steps in the same environment. We demonstrate direct inkjet printing of complete transistor circuits, including via-hole interconnections based on solution-processed polymer conductors, insulators, and self-organizing semiconductors. We show that the use of substrate surface energy patterning to direct the flow of water-based conducting polymer inkjet droplets enables high-resolution definition of practical channel lengths of 5 micrometers. High mobilities of 0.02 square centimeters per volt second and on-off current switching ratios of 10(5) were achieved.

Finite Ground Coplanar (FGC) Waveguide: It's Characteristics and Advantages for Use in RF and Wireless Communication Circuits

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Katehi, Linda P. B.; Tentzeris, Emmanouil M.

1998-01-01

To solve many of the problems encountered when using conventional coplanar waveguide (CPW) with its semi-infinite ground planes, a new version of coplanar waveguide with electrically narrow ground planes has been developed. This new transmission line which we call Finite Ground Coplanar (FGC) waveguide has several advantages which make it a better transmission line for RF and wireless circuits. Since the ground planes are electrically narrow, spurious resonances created by the CPW ground planes and the metal carrier or package base are eliminated. In addition, lumped and distributed circuit elements may now be integrated into the ground strips in the same way as they traditionally have been integrated into the center conductor to realize novel circuit layouts that are smaller and have less parasitic reactance. Lastly, FGC is shown to have lower coupling between adjacent transmission lines than conventional CPW.

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

Polarization-analyzing circuit on InP for integrated Stokes vector receiver.

PubMed

Ghosh, Samir; Kawabata, Yuto; Tanemura, Takuo; Nakano, Yoshiaki

2017-05-29

Stokes vector modulation and direct detection (SVM/DD) has immense potentiality to reduce the cost burden for the next-generation short-reach optical communication networks. In this paper, we propose and demonstrate an InGaAsP/InP waveguide-based polarization-analyzing circuit for an integrated Stokes vector (SV) receiver. By transforming the input state-of-polarization (SOP) and projecting its SV onto three different vectors on the Poincare sphere, we show that the actual SOP can be retrieved by simple calculation. We also reveal that this projection matrix has a flexibility and its deviation due to device imperfectness can be calibrated to a certain degree, so that the proposed device would be fundamentally robust against fabrication errors. A proof-of-concept photonic integrated circuit (PIC) is fabricated on InP by using half-ridge waveguides to successfully demonstrate detection of different SOPs scattered on the Poincare sphere.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMICs to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMICs is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Theoretical and experimental characterization of the DUal-BAse transistor (DUBAT)

NASA Astrophysics Data System (ADS)

Wu, Chung-Yu; Wu, Ching-Yuan

1980-11-01

A new A-type integrated voltage controlled differential negative resistance device using an extra effective base region to form a lateral pnp (npn) bipolar transistor beside the original base region of a vertical npn (pnp) bipolar junction transistor, and so called the DUal BAse Transistor (DUBAT), is studied both experimentally and theoretically, The DUBAT has three terminals and is fully comparible with the existing bipolar integrated circuits technologies. Based upon the equivalent circuit of the DUBAT, a simple first-order analytical theory is developed, and important device parameters, such as: the I-V characteristic, the differential negative resistance, and the peak and valley points, are also characterized. One of the proposed integrated structures of the DUBAT, which is similar in structure to I 2L but with similar high density and a normally operated vertical npn transistor, has been successfully fabricated and studied. Comparisons between the experimental data and theoretical analyses are made, and show in satisfactory agreements.

Monolithic photonic integrated circuit with a GaN-based bent waveguide

NASA Astrophysics Data System (ADS)

Cai, Wei; Qin, Chuan; Zhang, Shuai; Yuan, Jialei; Zhang, Fenghua; Wang, Yongjin

2018-06-01

Integration of a transmitter, waveguide and receiver into a single chip can generate a multicomponent system with multiple functionalities. Here, we fabricate and characterize a GaN-based photonic integrated circuit (PIC) on a GaN-on-silicon platform. With removal of the silicon and back wafer thinning of the epitaxial film, ultrathin membrane-type devices and highly confined suspended GaN waveguides were formed. Two suspended-membrane InGaN/GaN multiple-quantum-well diodes (MQW-diodes) served as an MQW light-emitting diode (MQW-LED) to emit light and an MQW photodiode (MQW-PD) to sense light. The optical interconnects between the MQW-LED and MQW-PD were achieved using the GaN bent waveguide. The GaN-based PIC consisting of an MQW-LED, waveguides and an MQW-PD forms an in-plane light communication system with a data transmission rate of 70 Mbps.

Engineering integrated digital circuits with allosteric ribozymes for scaling up molecular computation and diagnostics.

PubMed

Penchovsky, Robert

2012-10-19

Here we describe molecular implementations of integrated digital circuits, including a three-input AND logic gate, a two-input multiplexer, and 1-to-2 decoder using allosteric ribozymes. Furthermore, we demonstrate a multiplexer-decoder circuit. The ribozymes are designed to seek-and-destroy specific RNAs with a certain length by a fully computerized procedure. The algorithm can accurately predict one base substitution that alters the ribozyme's logic function. The ability to sense the length of RNA molecules enables single ribozymes to be used as platforms for multiple interactions. These ribozymes can work as integrated circuits with the functionality of up to five logic gates. The ribozyme design is universal since the allosteric and substrate domains can be altered to sense different RNAs. In addition, the ribozymes can specifically cleave RNA molecules with triplet-repeat expansions observed in genetic disorders such as oculopharyngeal muscular dystrophy. Therefore, the designer ribozymes can be employed for scaling up computing and diagnostic networks in the fields of molecular computing and diagnostics and RNA synthetic biology.

Integrating anatomy and function for zebrafish circuit analysis.

PubMed

Arrenberg, Aristides B; Driever, Wolfgang

2013-01-01

Due to its transparency, virtually every brain structure of the larval zebrafish is accessible to light-based interrogation of circuit function. Advanced stimulation techniques allow the activation of optogenetic actuators at different resolution levels, and genetically encoded calcium indicators report the activity of a large proportion of neurons in the CNS. Large datasets result and need to be analyzed to identify cells that have specific properties-e.g., activity correlation to sensory stimulation or behavior. Advances in three-dimensional (3D) functional mapping in zebrafish are promising; however, the mere coordinates of implicated neurons are not sufficient. To comprehensively understand circuit function, these functional maps need to be placed into the proper context of morphological features and projection patterns, neurotransmitter phenotypes, and key anatomical landmarks. We discuss the prospect of merging functional and anatomical data in an integrated atlas from the perspective of our work on long-range dopaminergic neuromodulation and the oculomotor system. We propose that such a resource would help researchers to surpass current hurdles in circuit analysis to achieve an integrated understanding of anatomy and function.

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith, Roger; Ferrier, Terry; Krasowski, Michael J.;

Polymer planar lightwave circuit based hybrid-integrated coherent receiver for advanced modulation signals

NASA Astrophysics Data System (ADS)

Wang, Jin; Han, Yang; Liang, Zhongcheng; Chen, Yongjin

2012-11-01

Applying coherent detection technique to advanced modulation formats makes it possible to electronically compensate the signal impairments. A key issue for a successful deployment of coherent detection technique is the availability of cost-efficient and compact integrated receivers, which are composed of an optical 90° hybrid mixer and four photodiodes (PDs). In this work, three different types of optical hybrids are fabricated with polymer planar lightwave circuit (PLC), and hybridly integrated with four vertical backside illuminated III-V PDs. Their performances, such as the insertion loss, the transmission imbalance, the polarization dependence and the phase deviation of 90° hybrid will be discussed.

Microprocessor-based integration of microfluidic control for the implementation of automated sensor monitoring and multithreaded optimization algorithms.

PubMed

Ezra, Elishai; Maor, Idan; Bavli, Danny; Shalom, Itai; Levy, Gahl; Prill, Sebastian; Jaeger, Magnus S; Nahmias, Yaakov

2015-08-01

Microfluidic applications range from combinatorial synthesis to high throughput screening, with platforms integrating analog perfusion components, digitally controlled micro-valves and a range of sensors that demand a variety of communication protocols. Currently, discrete control units are used to regulate and monitor each component, resulting in scattered control interfaces that limit data integration and synchronization. Here, we present a microprocessor-based control unit, utilizing the MS Gadgeteer open framework that integrates all aspects of microfluidics through a high-current electronic circuit that supports and synchronizes digital and analog signals for perfusion components, pressure elements, and arbitrary sensor communication protocols using a plug-and-play interface. The control unit supports an integrated touch screen and TCP/IP interface that provides local and remote control of flow and data acquisition. To establish the ability of our control unit to integrate and synchronize complex microfluidic circuits we developed an equi-pressure combinatorial mixer. We demonstrate the generation of complex perfusion sequences, allowing the automated sampling, washing, and calibrating of an electrochemical lactate sensor continuously monitoring hepatocyte viability following exposure to the pesticide rotenone. Importantly, integration of an optical sensor allowed us to implement automated optimization protocols that require different computational challenges including: prioritized data structures in a genetic algorithm, distributed computational efforts in multiple-hill climbing searches and real-time realization of probabilistic models in simulated annealing. Our system offers a comprehensive solution for establishing optimization protocols and perfusion sequences in complex microfluidic circuits.

A Printed Organic Circuit System for Wearable Amperometric Electrochemical Sensors.

PubMed

Shiwaku, Rei; Matsui, Hiroyuki; Nagamine, Kuniaki; Uematsu, Mayu; Mano, Taisei; Maruyama, Yuki; Nomura, Ayako; Tsuchiya, Kazuhiko; Hayasaka, Kazuma; Takeda, Yasunori; Fukuda, Takashi; Kumaki, Daisuke; Tokito, Shizuo

2018-04-23

Wearable sensor device technologies, which enable continuous monitoring of biological information from the human body, are promising in the fields of sports, healthcare, and medical applications. Further thinness, light weight, flexibility and low-cost are significant requirements for making the devices attachable onto human tissues or clothes like a patch. Here we demonstrate a flexible and printed circuit system consisting of an enzyme-based amperometric sensor, feedback control and amplification circuits based on organic thin-film transistors. The feedback control and amplification circuits based on pseudo-CMOS inverters were successfuly integrated by printing methods on a plastic film. This simple system worked very well like a potentiostat for electrochemical measurements, and enabled the quantitative and real-time measurement of lactate concentration with high sensitivity of 1 V/mM and a short response time of a hundred seconds.

A readout integrated circuit based on DBI-CTIA and cyclic ADC for MEMS-array-based focal plane

NASA Astrophysics Data System (ADS)

Miao, Liu; Dong, Wu; Zheyao, Wang

2016-11-01

A readout integrated circuit (ROIC) for a MEMS (microelectromechanical system)-array-based focal plane (MAFP) intended for imaging applications is presented. The ROIC incorporates current sources for diode detectors, scanners, timing sequence controllers, differential buffered injection-capacitive trans-impedance amplifier (DBI-CTIA) and 10-bit cyclic ADCs, and is integrated with MAFP using 3-D integration technology. A small-signal equivalent model is built to include thermal detectors into circuit simulations. The biasing current is optimized in terms of signal-to-noise ratio and power consumption. Layout design is tailored to fulfill the requirements of 3-D integration and to adapt to the size of MAFP elements, with not all but only the 2 bottom metal layers to complete nearly all the interconnections in DBI-CTIA and ADC in a 40 μm wide column. Experimental chips are designed and fabricated in a 0.35 μm CMOS mixed signal process, and verified in a code density test of which the results indicate a (0.29/-0.31) LSB differential nonlinearity (DNL) and a (0.61/-0.45) LSB integral nonlinearity (INL). Spectrum analysis shows that the effective number of bits (ENOB) is 9.09. The ROIC consumes 248 mW of power at most if not to cut off quiescent current paths when not needed. Project supported by by National Natural Science Foundation of China (No. 61271130), the Beijing Municipal Science and Tech Project (No. D13110100290000), the Tsinghua University Initiative Scientific Research Program (No. 20131089225), and the Shenzhen Science and Technology Development Fund (No. CXZZ20130322170740736).

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection

PubMed Central

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-01

We developed a Fabry–Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction. PMID:29304011

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection.

PubMed

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-05

We developed a Fabry-Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction.

33 Years of Continuous Solar Radio Flux Observations

NASA Astrophysics Data System (ADS)

Monstein, Christian

2015-10-01

In 1982, after development and testing of several analog receiver concepts, I started continuous solar radio flux observations at 230 MHz. My instruments for the observations were based on cheap commercial components out of consumer TV electronics. The main components included a TV-tuner (at that time analog), intermediate frequency (IF) amplifier and video-detector taken from used TV sets. The 5.5 MHz wide video signal was fed into an integrating circuit, in fact a low pass filter, followed by dc-offset circuit and dc-amplifier built with four ua741 and CA3140 operational amplifier integrated circuits. At that time the signal was recorded with a Heathkit stripchart recorder and ink pen; an example is shown in figure 1.

High-Performance Complementary Transistors and Medium-Scale Integrated Circuits Based on Carbon Nanotube Thin Films.

PubMed

Yang, Yingjun; Ding, Li; Han, Jie; Zhang, Zhiyong; Peng, Lian-Mao

2017-04-25

Solution-derived carbon nanotube (CNT) network films with high semiconducting purity are suitable materials for the wafer-scale fabrication of field-effect transistors (FETs) and integrated circuits (ICs). However, it is challenging to realize high-performance complementary metal-oxide semiconductor (CMOS) FETs with high yield and stability on such CNT network films, and this difficulty hinders the development of CNT-film-based ICs. In this work, we developed a doping-free process for the fabrication of CMOS FETs based on solution-processed CNT network films, in which the polarity of the FETs was controlled using Sc or Pd as the source/drain contacts to selectively inject carriers into the channels. The fabricated top-gated CMOS FETs showed high symmetry between the characteristics of n- and p-type devices and exhibited high-performance uniformity and excellent scalability down to a gate length of 1 μm. Many common types of CMOS ICs, including typical logic gates, sequential circuits, and arithmetic units, were constructed based on CNT films, and the fabricated ICs exhibited rail-to-rail outputs because of the high noise margin of CMOS circuits. In particular, 4-bit full adders consisting of 132 CMOS FETs were realized with 100% yield, thereby demonstrating that this CMOS technology shows the potential to advance the development of medium-scale CNT-network-film-based ICs.

High-flux ionic diodes, ionic transistors and ionic amplifiers based on external ion concentration polarization by an ion exchange membrane: a new scalable ionic circuit platform†

PubMed Central

Sun, Gongchen; Senapati, Satyajyoti

2016-01-01

A microfluidic-ion exchange membrane hybrid chip is fabricated by polymer-based, lithography-free methods to achieve ionic diode, transistor and amplifier functionalities with the same four-terminal design. The high ionic flux (> 100 μA) feature of the chip can enable a scalable integrated ionic circuit platform for micro-total-analytical systems. PMID:26960551

Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

Inverter Circuits using Pentacene and ZnO Transistors

NASA Astrophysics Data System (ADS)

Iechi, Hiroyuki; Watanabe, Yasuyuki; Kudo, Kazuhiro

2007-04-01

We report two types of integrated circuits based on a pentacene static-induction transistor (SIT), a pentacene thin-film transistor (TFT) and a zinc oxide (ZnO) TFT. The operating characteristics of a p-p inverter using pentacene SITs and a complementary inverter using a p-channel pentacene TFT and an n-channel ZnO TFT are described. The basic operation of logic circuits at a low voltage was achieved for the first time using the pentacene SIT inverter and complementary circuits with hybrid inorganic and organic materials. Furthermore, we describe the electrical properties of the ZnO films depending on sputtering conditions, and the complementary circuits using ZnO and pentacene TFTs.

Organic–Inorganic Eu3+/Tb3+ codoped hybrid films for temperature mapping in integrated circuits

PubMed Central

Brites, Carlos D. S.; Lima, Patrícia P.; Silva, Nuno J. O.; Millán, Angel; Amaral, Vitor S.; Palacio, Fernando; Carlos, Luís D.

2013-01-01

The continuous decrease on the geometric size of electronic devices and integrated circuits generates higher local power densities and localized heating problems that cannot be characterized by conventional thermographic techniques. Here, a self-referencing intensity-based molecular thermometer involving a di-ureasil organic-inorganic hybrid thin film co-doped with Eu3+ and Tb3+ tris (β-diketonate) chelates is used to obtain the temperature map of a FR4 printed wiring board with spatio-temporal resolutions of 0.42 μm/4.8 ms. PMID:24790938

All-fiber hybrid photon-plasmon circuits: integrating nanowire plasmonics with fiber optics.

PubMed

Li, Xiyuan; Li, Wei; Guo, Xin; Lou, Jingyi; Tong, Limin

2013-07-01

We demonstrate all-fiber hybrid photon-plasmon circuits by integrating Ag nanowires with optical fibers. Relying on near-field coupling, we realize a photon-to-plasmon conversion efficiency up to 92% in a fiber-based nanowire plasmonic probe. Around optical communication band, we assemble an all-fiber resonator and a Mach-Zehnder interferometer (MZI) with Q-factor of 6 × 10(6) and extinction ratio up to 30 dB, respectively. Using the MZI, we demonstrate fiber-compatible plasmonic sensing with high sensitivity and low optical power.

Performance of a 300 Mbps 1:16 serial/parallel optoelectronic receiver module

NASA Technical Reports Server (NTRS)

Richard, M. A.; Claspy, P. C.; Bhasin, K. B.; Bendett, M. B.

1990-01-01

Optical interconnects are being considered for the high speed distribution of multiplexed control signals in GaAs monolithic microwave integrated circuit (MMIC) based phased array antennas. The performance of a hybrid GaAs optoelectronic integrated circuit (OEIC) is described, as well as its design and fabrication. The OEIC converts a 16-bit serial optical input to a 16 parallel line electrical output using an on-board 1:16 demultiplexer and operates at data rates as high as 30b Mbps. The performance characteristics and potential applications of the device are presented.

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes are developed that provide low-loss, hermetic enclosure for enhanced monolithic microwave and millimeter-wave integrated circuits. These package schemes are based on a fused quartz substrate material offering improved RF performance through 44 GHz. The small size and weight of the packages make them useful for a number of applications, including phased array antenna systems. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices.

Integrated Cryogenic Electronics Testbed (ICE-T) for Evaluation of Superconductor and Cryo-Semiconductor Integrated Circuits

NASA Astrophysics Data System (ADS)

Dotsenko, V. V.; Sahu, A.; Chonigman, B.; Tang, J.; Lehmann, A. E.; Gupta, V.; Talalevskii, A.; Ruotolo, S.; Sarwana, S.; Webber, R. J.; Gupta, D.

2017-02-01

Research and development of cryogenic application-specific integrated circuits (ASICs), such as high-frequency (tens of GHz) semiconductor and superconductor mixed-signal circuits and large-scale (>10,000 Josephson Junctions) superconductor digital circuits, have long been hindered by the absence of specialized cryogenic test apparatus. During their iterative development phase, most ASICs require many additional input-output lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. We are developing a full suite of modular test apparatus based on cryocoolers that do not consume liquid helium, and support extensive electrical interfaces to standard and custom test equipment. Our design separates the cryogenics from electrical connections, allowing even inexperienced users to conduct testing by simply mounting their ASIC on a removable electrical insert. Thermal connections between the cold stages and the inserts are made with robust thermal links. ICE-T accommodates two independent electrical inserts at the same time. We have designed various inserts, such as universal ones with all 40 or 80 coaxial cables and those with customized wiring and temperature-controlled stages. ICE-T features fast thermal cycling for rapid testing, enables detailed testing over long periods (days to months, if necessary), and even supports automated testing of digital ICs with modular additions.

A framework for scalable parameter estimation of gene circuit models using structural information.

PubMed

Kuwahara, Hiroyuki; Fan, Ming; Wang, Suojin; Gao, Xin

2013-07-01

Systematic and scalable parameter estimation is a key to construct complex gene regulatory models and to ultimately facilitate an integrative systems biology approach to quantitatively understand the molecular mechanisms underpinning gene regulation. Here, we report a novel framework for efficient and scalable parameter estimation that focuses specifically on modeling of gene circuits. Exploiting the structure commonly found in gene circuit models, this framework decomposes a system of coupled rate equations into individual ones and efficiently integrates them separately to reconstruct the mean time evolution of the gene products. The accuracy of the parameter estimates is refined by iteratively increasing the accuracy of numerical integration using the model structure. As a case study, we applied our framework to four gene circuit models with complex dynamics based on three synthetic datasets and one time series microarray data set. We compared our framework to three state-of-the-art parameter estimation methods and found that our approach consistently generated higher quality parameter solutions efficiently. Although many general-purpose parameter estimation methods have been applied for modeling of gene circuits, our results suggest that the use of more tailored approaches to use domain-specific information may be a key to reverse engineering of complex biological systems. http://sfb.kaust.edu.sa/Pages/Software.aspx. Supplementary data are available at Bioinformatics online.

A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

NASA Astrophysics Data System (ADS)

Li, Y.-Q.; Wang, H.-B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S.-T.; He, A.-L.; Guo, G.; Baeg, S. H.; Wen, S.-J.; Wong, R.; Chen, M.; Wu, Q.

2017-06-01

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.

Multiplier Architecture for Coding Circuits

NASA Technical Reports Server (NTRS)

Wang, C. C.; Truong, T. K.; Shao, H. M.; Deutsch, L. J.

1986-01-01

Multipliers based on new algorithm for Galois-field (GF) arithmetic regular and expandable. Pipeline structures used for computing both multiplications and inverses. Designs suitable for implementation in very-large-scale integrated (VLSI) circuits. This general type of inverter and multiplier architecture especially useful in performing finite-field arithmetic of Reed-Solomon error-correcting codes and of some cryptographic algorithms.

A photonic circuit for complementary frequency shifting, in-phase quadrature/single sideband modulation and frequency multiplication: analysis and integration feasibility

NASA Astrophysics Data System (ADS)

Hasan, Mehedi; Hu, Jianqi; Nikkhah, Hamdam; Hall, Trevor

2017-08-01

A novel photonic integrated circuit architecture for implementing orthogonal frequency division multiplexing by means of photonic generation of phase-correlated sub-carriers is proposed. The circuit can also be used for implementing complex modulation, frequency up-conversion of the electrical signal to the optical domain and frequency multiplication. The principles of operation of the circuit are expounded using transmission matrices and the predictions of the analysis are verified by computer simulation using an industry-standard software tool. Non-ideal scenarios that may affect the correct function of the circuit are taken into consideration and quantified. The discussion of integration feasibility is illustrated by a photonic integrated circuit that has been fabricated using 'library' components and which features most of the elements of the proposed circuit architecture. The circuit is found to be practical and may be fabricated in any material platform that offers a linear electro-optic modulator such as organic or ferroelectric thin films hybridized with silicon photonics.

GaAs Optoelectronic Integrated-Circuit Neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H.; Kim, Jae H.; Psaltis, Demetri

1992-01-01

Monolithic GaAs optoelectronic integrated circuits developed for use as artificial neurons. Neural-network computer contains planar arrays of optoelectronic neurons, and variable synaptic connections between neurons effected by diffraction of light from volume hologram in photorefractive material. Basic principles of neural-network computers explained more fully in "Optoelectronic Integrated Circuits For Neural Networks" (NPO-17652). In present circuits, devices replaced by metal/semiconductor field effect transistors (MESFET's), which consume less power.

Compact pulse width modulation circuitry for silicon photomultiplier readout.

PubMed

Bieniosek, M F; Olcott, P D; Levin, C S

2013-08-07

The adoption of solid-state photodetectors for positron emission tomography (PET) system design and the interest in 3D interaction information from PET detectors has lead to an increasing number of readout channels in PET systems. To handle these additional readout channels, PET readout electronics should be simplified to reduce the power consumption, cost, and size of the electronics for a single channel. Pulse-width modulation (PWM), where detector pulses are converted to digital pulses with width proportional to the detected photon energy, promises to simplify PET readout by converting the signals to digital form at the beginning of the processing chain, and allowing a single time-to-digital converter to perform the data acquisition for many channels rather than routing many analogue channels and digitizing in the back end. Integrator based PWM systems, also known as charge-to-time converters (QTCs), are especially compact, reducing the front-end electronics to an op-amp integrator with a resistor discharge, and a comparator. QTCs, however, have a long dead-time during which dark count noise is integrated, reducing the output signal-to-noise ratio. This work presents a QTC based PWM circuit with a gated integrator that shows performance improvements over existing QTC based PWM. By opening and closing an analogue switch on the input of the integrator, the circuit can be controlled to integrate only the portions of the signal with a high signal-to-noise ratio. It also allows for multiplexing different detectors into the same PWM circuit while avoiding uncorrelated noise propagation between photodetector channels. Four gated integrator PWM circuits were built to readout the spatial channels of two position sensitive solid-state photomultiplier (PS-SSPM). Results show a 4 × 4 array 0.9 mm × 0.9 mm × 15 mm of LYSO crystals being identified on the 5 mm × 5 mm PS-SSPM at room temperature with no degradation for twofold multiplexing. In principle, much larger multiplexing ratios are possible, limited only by count rate issues.

Algorithms and architecture for multiprocessor based circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deutsch, J.T.

Accurate electrical simulation is critical to the design of high performance integrated circuits. Logic simulators can verify function and give first-order timing information. Switch level simulators are more effective at dealing with charge sharing than standard logic simulators, but cannot provide accurate timing information or discover DC problems. Delay estimation techniques and cell level simulation can be used in constrained design methods, but must be tuned for each application, and circuit simulation must still be used to generate the cell models. None of these methods has the guaranteed accuracy that many circuit designers desire, and none can provide detailed waveformmore » information. Detailed electrical-level simulation can predict circuit performance if devices and parasitics are modeled accurately. However, the computational requirements of conventional circuit simulators make it impractical to simulate current large circuits. In this dissertation, the implementation of Iterated Timing Analysis (ITA), a relaxation-based technique for accurate circuit simulation, on a special-purpose multiprocessor is presented. The ITA method is an SOR-Newton, relaxation-based method which uses event-driven analysis and selective trace to exploit the temporal sparsity of the electrical network. Because event-driven selective trace techniques are employed, this algorithm lends itself to implementation on a data-driven computer.« less

Spatially controlled doping of two-dimensional SnS 2 through intercalation for electronics

DOE PAGES

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan; ...

2018-02-26

Doped semiconductors are the most important building elements for modern electronic devices. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturallymore » grown n-type S-vacancy SnS 2, Cu intercalated bilayer SnS 2 obtained by this technique displays a hole field-effect mobility of ~40 cm 2 V -1 s -1, and the obtained Co-SnS 2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene. Combining this intercalation technique with lithography, an atomically seamless p–n–metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.« less

Spatially controlled doping of two-dimensional SnS 2 through intercalation for electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan

Doped semiconductors are the most important building elements for modern electronic devices. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturallymore » grown n-type S-vacancy SnS 2, Cu intercalated bilayer SnS 2 obtained by this technique displays a hole field-effect mobility of ~40 cm 2 V -1 s -1, and the obtained Co-SnS 2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene. Combining this intercalation technique with lithography, an atomically seamless p–n–metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.« less

Spatially controlled doping of two-dimensional SnS2 through intercalation for electronics

NASA Astrophysics Data System (ADS)

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan; Tang, Peizhe; Yang, Shi-Ze; Yang, Ankun; Li, Guodong; Liu, Bofei; van de Groep, Jorik; Brongersma, Mark L.; Chisholm, Matthew F.; Zhang, Shou-Cheng; Zhou, Wu; Cui, Yi

2018-04-01

Doped semiconductors are the most important building elements for modern electronic devices1. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface2,3. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits4-9. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturally grown n-type S-vacancy SnS2, Cu intercalated bilayer SnS2 obtained by this technique displays a hole field-effect mobility of 40 cm2 V-1 s-1, and the obtained Co-SnS2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene5. Combining this intercalation technique with lithography, an atomically seamless p-n-metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.

A novel readout integrated circuit for ferroelectric FPA detector

NASA Astrophysics Data System (ADS)

Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

2017-11-01

Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

Modelling of optoelectronic circuits based on resonant tunneling diodes

NASA Astrophysics Data System (ADS)

Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

2017-08-01

Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

Equivalent circuit modeling of a piezo-patch energy harvester on a thin plate with AC-DC conversion

NASA Astrophysics Data System (ADS)

Bayik, B.; Aghakhani, A.; Basdogan, I.; Erturk, A.

2016-05-01

As an alternative to beam-like structures, piezoelectric patch-based energy harvesters attached to thin plates can be readily integrated to plate-like structures in automotive, marine, and aerospace applications, in order to directly exploit structural vibration modes of the host system without mass loading and volumetric occupancy of cantilever attachments. In this paper, a multi-mode equivalent circuit model of a piezo-patch energy harvester integrated to a thin plate is developed and coupled with a standard AC-DC conversion circuit. Equivalent circuit parameters are obtained in two different ways: (1) from the modal analysis solution of a distributed-parameter analytical model and (2) from the finite-element numerical model of the harvester by accounting for two-way coupling. After the analytical modeling effort, multi-mode equivalent circuit representation of the harvester is obtained via electronic circuit simulation software SPICE. Using the SPICE software, electromechanical response of the piezoelectric energy harvester connected to linear and nonlinear circuit elements are computed. Simulation results are validated for the standard AC-AC and AC-DC configurations. For the AC input-AC output problem, voltage frequency response functions are calculated for various resistive loads, and they show excellent agreement with modal analysis-based analytical closed-form solution and with the finite-element model. For the standard ideal AC input-DC output case, a full-wave rectifier and a smoothing capacitor are added to the harvester circuit for conversion of the AC voltage to a stable DC voltage, which is also validated against an existing solution by treating the single-mode plate dynamics as a single-degree-of-freedom system.

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Semicustom integrated circuits and the standard transistor array radix (STAR)

NASA Technical Reports Server (NTRS)

Edge, T. M.

1977-01-01

The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit.

PubMed

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-21

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10 -9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Integrated biocircuits: engineering functional multicellular circuits and devices.

PubMed

Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

2018-04-01

Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

NASA Astrophysics Data System (ADS)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10-9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Integrated biocircuits: engineering functional multicellular circuits and devices

NASA Astrophysics Data System (ADS)

Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

2018-04-01

Objective. Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. Approach. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. Main results. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. Significance. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

PubMed Central

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-01-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than −30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10−9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers. PMID:28000735

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications

PubMed Central

Vidor, Fábio F.; Meyers, Thorsten; Hilleringmann, Ulrich

2016-01-01

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high-k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the ION/IOFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V/V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates. PMID:28335282

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications.

PubMed

Vidor, Fábio F; Meyers, Thorsten; Hilleringmann, Ulrich

2016-08-23

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high- k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the I ON / I OFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V / V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates.

Synthetic biology: applying biological circuits beyond novel therapies.

PubMed

Dobrin, Anton; Saxena, Pratik; Fussenegger, Martin

2016-04-18

Synthetic biology, an engineering, circuit-driven approach to biology, has developed whole new classes of therapeutics. Unfortunately, these advances have thus far been undercapitalized upon by basic researchers. As discussed herein, using synthetic circuits, one can undertake exhaustive investigations of the endogenous circuitry found in nature, develop novel detectors and better temporally and spatially controlled inducers. One could detect changes in DNA, RNA, protein or even transient signaling events, in cell-based systems, in live mice, and in humans. Synthetic biology has also developed inducible systems that can be induced chemically, optically or using radio waves. This induction has been re-wired to lead to changes in gene expression, RNA stability and splicing, protein stability and splicing, and signaling via endogenous pathways. Beyond simple detectors and inducible systems, one can combine these modalities and develop novel signal integration circuits that can react to a very precise pre-programmed set of conditions or even to multiple sets of precise conditions. In this review, we highlight some tools that were developed in which these circuits were combined such that the detection of a particular event automatically triggered a specific output. Furthermore, using novel circuit-design strategies, circuits have been developed that can integrate multiple inputs together in Boolean logic gates composed of up to 6 inputs. We highlight the tools available and what has been developed thus far, and highlight how some clinical tools can be very useful in basic science. Most of the systems that are presented can be integrated together; and the possibilities far exceed the number of currently developed strategies.

Subsurface microscopy of interconnect layers of an integrated circuit.

PubMed

Köklü, F Hakan; Unlü, M Selim

2010-01-15

We apply the NA-increasing lens technique to confocal and wide-field backside microscopy of integrated circuits. We demonstrate 325 nm (lambda(0)/4) lateral spatial resolution while imaging metal structures located inside the interconnect layer of an integrated circuit. Vectorial field calculations are presented justifying our findings.

Postirradiation Effects In Integrated Circuits

NASA Technical Reports Server (NTRS)

Shaw, David C.; Barnes, Charles E.

1993-01-01

Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-06

... INTERNATIONAL TRADE COMMISSION [Docket No. 2899] Certain Integrated Circuit Packages Provided With... complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and..., telephone (202) 205-2000. The public version of the complaint can be accessed on the Commission's electronic...

FAST: a framework for simulation and analysis of large-scale protein-silicon biosensor circuits.

PubMed

Gu, Ming; Chakrabartty, Shantanu

2013-08-01

This paper presents a computer aided design (CAD) framework for verification and reliability analysis of protein-silicon hybrid circuits used in biosensors. It is envisioned that similar to integrated circuit (IC) CAD design tools, the proposed framework will be useful for system level optimization of biosensors and for discovery of new sensing modalities without resorting to laborious fabrication and experimental procedures. The framework referred to as FAST analyzes protein-based circuits by solving inverse problems involving stochastic functional elements that admit non-linear relationships between different circuit variables. In this regard, FAST uses a factor-graph netlist as a user interface and solving the inverse problem entails passing messages/signals between the internal nodes of the netlist. Stochastic analysis techniques like density evolution are used to understand the dynamics of the circuit and estimate the reliability of the solution. As an example, we present a complete design flow using FAST for synthesis, analysis and verification of our previously reported conductometric immunoassay that uses antibody-based circuits to implement forward error-correction (FEC).

2.3 µm range InP-based type-II quantum well Fabry-Perot lasers heterogeneously integrated on a silicon photonic integrated circuit.

PubMed

Wang, Ruijun; Sprengel, Stephan; Boehm, Gerhard; Muneeb, Muhammad; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

2016-09-05

Heterogeneously integrated InP-based type-II quantum well Fabry-Perot lasers on a silicon waveguide circuit emitting in the 2.3 µm wavelength range are demonstrated. The devices consist of a "W"-shaped InGaAs/GaAsSb multi-quantum-well gain section, III-V/silicon spot size converters and two silicon Bragg grating reflectors to form the laser cavity. In continuous-wave (CW) operation, we obtain a threshold current density of 2.7 kA/cm² and output power of 1.3 mW at 5 °C for 2.35 μm lasers. The lasers emit over 3.7 mW of peak power with a threshold current density of 1.6 kA/cm² in pulsed regime at room temperature. This demonstration of heterogeneously integrated lasers indicates that the material system and heterogeneous integration method are promising to realize fully integrated III-V/silicon photonics spectroscopic sensors in the 2 µm wavelength range.

Method for producing a hybridization of detector array and integrated circuit for readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Grunthaner, Frank J. (Inventor)

1993-01-01

A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

A Mathematical Model of a Simple Amplifier Using a Ferroelectric Transistor

NASA Technical Reports Server (NTRS)

Sayyah, Rana; Hunt, Mitchell; MacLeod, Todd C.; Ho, Fat D.

2009-01-01

This paper presents a mathematical model characterizing the behavior of a simple amplifier using a FeFET. The model is based on empirical data and incorporates several variables that affect the output, including frequency, load resistance, and gate-to-source voltage. Since the amplifier is the basis of many circuit configurations, a mathematical model that describes the behavior of a FeFET-based amplifier will help in the integration of FeFETs into many other circuits.

Prototyping and implementing flight qualifiable semicustom CMOS P-well bulk integrated circuits in the JPL environment

NASA Technical Reports Server (NTRS)

Olson, E. M.

1986-01-01

Presently, there are many difficulties associated with implementing application specific custom or semi-custom (standard cell based) integrated circuits (ICs) into JPL flight projects. One of the primary difficulties is developing prototype semi-custom integrated circuits for use and evaluation in engineering prototype flight hardware. The prototype semi-custom ICs must be extremely cost-effective and yet still representative of flight qualifiable versions of the design. A second difficulty is encountered in the transport of the design from engineering prototype quality to flight quality. Normally, flight quality integrated circuits have stringent quality standards, must be radiation resistant and should consume minimal power. It is often not necessary or cost effective, however, to impose such stringent quality standards on engineering models developed for systems analysis in controlled lab environments. This article presents work originally initiated for ground based applications that also addresses these two problems. Furthermore, this article suggests a method that has been shown successful in prototyping flight quality semi-custom ICs through the Metal Oxide Semiconductor Implementation Service (MOSIS) program run by the University of Southern California's Information Sciences Institute. The method has been used successfully to design and fabricate through the MOSIS three different semi-custom prototype CMOS p-well chips. The three designs make use of the work presented and were designed consistent with design techniques and structures that are flight qualifiable, allowing one hour transfer of the design from engineering model status to flight qualifiable foundry-ready status through methods outlined in this article.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Flexible circuits with integrated switches for robotic shape sensing

NASA Astrophysics Data System (ADS)

Harnett, C. K.

2016-05-01

Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

PubMed

Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... that there exists a domestic industry with respect to each of the asserted patents. The complaint named...

HEMT Amplifiers and Equipment for their On-Wafer Testing

NASA Technical Reports Server (NTRS)

Fung, King man; Gaier, Todd; Samoska, Lorene; Deal, William; Radisic, Vesna; Mei, Xiaobing; Lai, Richard

2008-01-01

Power amplifiers comprising InP-based high-electron-mobility transistors (HEMTs) in coplanar-waveguide (CPW) circuits designed for operation at frequencies of hundreds of gigahertz, and a test set for onwafer measurement of their power levels have been developed. These amplifiers utilize an advanced 35-nm HEMT monolithic microwave integrated-circuit (MMIC) technology and have potential utility as local-oscillator drivers and power sources in future submillimeter-wavelength heterodyne receivers and imaging systems. The test set can reduce development time by enabling rapid output power characterization, not only of these and similar amplifiers, but also of other coplanar-waveguide power circuits, without the necessity of packaging the circuits.

Spin-Based Devices for Magneto-Optoelectronic Integrated Circuits

DTIC Science & Technology

2009-04-29

bulk material and matches that in quantum wells. While these simple linear relationships hold for spin-polarized light-emitting diodes (spin-LEDs...temperature. The quantum efficiency and hence r| increases with decreasing temperature. The individual circuit elements, 33 therefore, exhibit the...Injection, Threshold Reduction and Output Circular Polarization Modulation in Quantum Well and Quantum Dot Semiconductor Spin Polarized Lasers working

PV Systems Reliability Final Technical Report: Ground Fault Detection

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lavrova, Olga; Flicker, Jack David; Johnson, Jay

We have examined ground faults in PhotoVoltaic (PV) arrays and the efficacy of fuse, current detection (RCD), current sense monitoring/relays (CSM), isolation/insulation (Riso) monitoring, and Ground Fault Detection and Isolation (GFID) using simulations based on a Simulation Program with Integrated Circuit Emphasis SPICE ground fault circuit model, experimental ground faults installed on real arrays, and theoretical equations.

Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

PubMed

Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

2016-07-26

A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials.

An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks.

PubMed

Chen, Huan-Yuan; Chen, Chih-Chang; Hwang, Wen-Jyi

2017-09-28

This study aims to present an effective VLSI circuit for multi-channel spike sorting. The circuit supports the spike detection, feature extraction and classification operations. The detection circuit is implemented in accordance with the nonlinear energy operator algorithm. Both the peak detection and area computation operations are adopted for the realization of the hardware architecture for feature extraction. The resulting feature vectors are classified by a circuit for competitive learning (CL) neural networks. The CL circuit supports both online training and classification. In the proposed architecture, all the channels share the same detection, feature extraction, learning and classification circuits for a low area cost hardware implementation. The clock-gating technique is also employed for reducing the power dissipation. To evaluate the performance of the architecture, an application-specific integrated circuit (ASIC) implementation is presented. Experimental results demonstrate that the proposed circuit exhibits the advantages of a low chip area, a low power dissipation and a high classification success rate for spike sorting.

An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks

PubMed Central

Chen, Huan-Yuan; Chen, Chih-Chang

2017-01-01

This study aims to present an effective VLSI circuit for multi-channel spike sorting. The circuit supports the spike detection, feature extraction and classification operations. The detection circuit is implemented in accordance with the nonlinear energy operator algorithm. Both the peak detection and area computation operations are adopted for the realization of the hardware architecture for feature extraction. The resulting feature vectors are classified by a circuit for competitive learning (CL) neural networks. The CL circuit supports both online training and classification. In the proposed architecture, all the channels share the same detection, feature extraction, learning and classification circuits for a low area cost hardware implementation. The clock-gating technique is also employed for reducing the power dissipation. To evaluate the performance of the architecture, an application-specific integrated circuit (ASIC) implementation is presented. Experimental results demonstrate that the proposed circuit exhibits the advantages of a low chip area, a low power dissipation and a high classification success rate for spike sorting. PMID:28956859

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Multichannel, Active Low-Pass Filters

NASA Technical Reports Server (NTRS)

Lev, James J.

1989-01-01

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

A binary-decision-diagram-based two-bit arithmetic logic unit on a GaAs-based regular nanowire network with hexagonal topology.

PubMed

Zhao, Hong-Quan; Kasai, Seiya; Shiratori, Yuta; Hashizume, Tamotsu

2009-06-17

A two-bit arithmetic logic unit (ALU) was successfully fabricated on a GaAs-based regular nanowire network with hexagonal topology. This fundamental building block of central processing units can be implemented on a regular nanowire network structure with simple circuit architecture based on graphical representation of logic functions using a binary decision diagram and topology control of the graph. The four-instruction ALU was designed by integrating subgraphs representing each instruction, and the circuitry was implemented by transferring the logical graph structure to a GaAs-based nanowire network formed by electron beam lithography and wet chemical etching. A path switching function was implemented in nodes by Schottky wrap gate control of nanowires. The fabricated circuit integrating 32 node devices exhibits the correct output waveforms at room temperature allowing for threshold voltage variation.

Petri-net-based 2D design of DNA walker circuits.

PubMed

Gilbert, David; Heiner, Monika; Rohr, Christian

2018-01-01

We consider localised DNA computation, where a DNA strand walks along a binary decision graph to compute a binary function. One of the challenges for the design of reliable walker circuits consists in leakage transitions, which occur when a walker jumps into another branch of the decision graph. We automatically identify leakage transitions, which allows for a detailed qualitative and quantitative assessment of circuit designs, design comparison, and design optimisation. The ability to identify leakage transitions is an important step in the process of optimising DNA circuit layouts where the aim is to minimise the computational error inherent in a circuit while minimising the area of the circuit. Our 2D modelling approach of DNA walker circuits relies on coloured stochastic Petri nets which enable functionality, topology and dimensionality all to be integrated in one two-dimensional model. Our modelling and analysis approach can be easily extended to 3-dimensional walker systems.

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1993-12-31

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and hold it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components.« less

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1995-08-29

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components. 11 figs.« less

SiGe Integrated Circuit Developments for SQUID/TES Readout

NASA Astrophysics Data System (ADS)

Prêle, D.; Voisin, F.; Beillimaz, C.; Chen, S.; Piat, M.; Goldwurm, A.; Laurent, P.

2018-03-01

SiGe integrated circuits dedicated to the readout of superconducting bolometer arrays for astrophysics have been developed since more than 10 years at APC. Whether for Cosmic Microwave Background (CMB) observations with the QUBIC ground-based experiment (Aumont et al. in astro-ph.IM, 2016. arXiv:1609.04372) or for the Hot and Energetic Universe science theme with the X-IFU instrument on-board of the ATHENA space mission (Barret et al. in SPIE 9905, space telescopes & instrumentation 2016: UV to γ Ray, 2016. https://doi.org/10.1117/12.2232432), several kinds of Transition Edge Sensor (TES) (Irwin and Hilton, in ENSS (ed) Cryogenic particle detection, Springer, Berlin, 2005) arrays have been investigated. To readout such superconducting detector arrays, we use time or frequency domain multiplexers (TDM, FDM) (Prêle in JINST 10:C08015, 2016. https://doi.org/10.1088/1748-0221/10/08/C08015) with Superconducting QUantum Interference Devices (SQUID). In addition to the SQUID devices, low-noise biasing and amplification are needed. These last functions can be obtained by using BiCMOS SiGe technology in an Application Specific Integrated Circuit (ASIC). ASIC technology allows integration of highly optimised circuits specifically designed for a unique application. Moreover, we could reach very low-noise and wide band amplification using SiGe bipolar transistor either at room or cryogenic temperatures (Cressler in J Phys IV 04(C6):C6-101, 1994. https://doi.org/10.1051/jp4:1994616). This paper discusses the use of SiGe integrated circuits for SQUID/TES readout and gives an update of the last developments dedicated to the QUBIC telescope and to the X-IFU instrument. Both ASIC called SQmux128 and AwaXe are described showing the interest of such SiGe technology for SQUID multiplexer controls.

Behavioral modeling of VCSELs for high-speed optical interconnects

NASA Astrophysics Data System (ADS)

Szczerba, Krzysztof; Kocot, Chris

2018-02-01

Transition from on-off keying to 4-level pulse amplitude modulation (PAM) in VCSEL based optical interconnects allows for an increase of data rates, at the cost of 4.8 dB sensitivity penalty. The resulting strained link budget creates a need for accurate VCSEL models for driver integrated circuit (IC) design and system level simulations. Rate equation based equivalent circuit models are convenient for the IC design, but system level analysis requires computationally efficient closed form behavioral models based Volterra series and neural networks. In this paper we present and compare these models.

A 30 Mbps in-plane full-duplex light communication using a monolithic GaN photonic circuit

NASA Astrophysics Data System (ADS)

Gao, Xumin; Yuan, Jialei; Yang, Yongchao; Li, Yuanhang; Yuan, Wei; Zhu, Guixia; Zhu, Hongbo; Feng, Meixin; Sun, Qian; Liu, Yuhuai; Wang, Yongjin

2017-07-01

We propose, fabricate and characterize photonic integration of a InGaN/GaN multiple-quantum-well light-emitting diode (MQW-LED), waveguide, ring resonator and InGaN/GaN MQW-photodiode on a single chip, in which the photonic circuit is suspended by the support beams. Both experimental observations and simulation results illustrate the manipulation of in-plane light coupling and propagation by the waveguide and the ring resonator. The monolithic photonic circuit forms an in-plane data communication system using visible light. When the two suspended InGaN/GaN MQW-diodes simultaneously serve as the transmitter and the receiver, an in-plane full-duplex light communication is experimentally demonstrated with a transmission rate of 30 Mbps, and the superimposed signals are extracted using the self-interference cancellation method. The suspended photonic circuit creates new possibilities for exploring the in-plane full-duplex light communication and manufacturing complex GaN-based monolithic photonic integrations.

Use of a pediatric oxygenator integrated in a veno-venous hemofiltration circuit to remove CO2: a case report in a severe burn patient with refractory hypercapnia.

PubMed

Rousseau, Anne-Françoise; Damas, Pierre; Renwart, Ludovic; Amand, Théo; Erpicum, Marie; Morimont, Philippe; Dubois, Bernard; Massion, Paul B

2014-11-01

Acute respiratory distress syndrome management is currently based on lung protective ventilation. Such strategy may lead to hypercapnic acidosis. We report a case of refractory hypercapnia in a severe burn adult, treated with simplified veno-venous extracorporeal carbon dioxide removal technique. We integrated a pediatric oxygenator in a continuous veno-venous hemofiltration circuit. This technique, used during at least 96h, was feasible, sure and efficient with carbon dioxide removal rate up to 32%. Copyright © 2014 Elsevier Ltd and ISBI. All rights reserved.

On the Synchronization of EEG Spindle Waves

NASA Astrophysics Data System (ADS)

Long, Wen; Zhang, ChengFu; Zhao, SiLan; Shi, RuiHong

2000-06-01

Based on recently sleeping cellular substrates, a network model synaptically coupled by N three-cell circuits is provided. Simulation results show that: (i) the dynamic behavior of every circuit is chaotic; (ii) the synchronization of the network is incomplete; (iii) the incomplete synchronization can integrate burst firings of cortical cells into waxing-and-wanning EEG spindle waves. These results enlighten us that this kind of incomplete synchronization may integrate microscopic, electrical activities of neurons in billions into macroscopic, functional states in human brain. In addition, the effects of coupling strength, connectional mode and noise to the synchronization are discussed.

Printed dose-recording tag based on organic complementary circuits and ferroelectric nonvolatile memories

PubMed Central

Nga Ng, Tse; Schwartz, David E.; Mei, Ping; Krusor, Brent; Kor, Sivkheng; Veres, Janos; Bröms, Per; Eriksson, Torbjörn; Wang, Yong; Hagel, Olle; Karlsson, Christer

2015-01-01

We have demonstrated a printed electronic tag that monitors time-integrated sensor signals and writes to nonvolatile memories for later readout. The tag is additively fabricated on flexible plastic foil and comprises a thermistor divider, complementary organic circuits, and two nonvolatile memory cells. With a supply voltage below 30 V, the threshold temperatures can be tuned between 0 °C and 80 °C. The time-temperature dose measurement is calibrated for minute-scale integration. The two memory bits are sequentially written in a thermometer code to provide an accumulated dose record. PMID:26307438

Microscale autonomous sensor and communications module

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-03-25

Various technologies pertaining to a microscale autonomous sensor and communications module are described herein. Such a module includes a sensor that generates a sensor signal that is indicative of an environmental parameter. An integrated circuit receives the sensor signal and generates an output signal based at least in part upon the sensor signal. An optical emitter receives the output signal and generates an optical signal as a function of the output signal. An energy storage device is configured to provide power to at least the integrated circuit and the optical emitter, and wherein the module has a relatively small diameter and thickness.

Walk-through survey report: Control technology for integrated circuit fabrication, Xerox Corporation, El Segundo, California

NASA Astrophysics Data System (ADS)

Mihlan, G. J.; Ungers, L. J.; Smith, R. K.; Mitchell, R. I.; Jones, J. H.

1983-05-01

A preliminary control technology assessment survey was conducted at the facility which manufactures N-channel metal oxide semiconductor (NMOS) integrated circuits. The facility has industrial hygiene review procedures for evaluating all new and existing process equipment. Employees are trained in safety, use of personal protective equipment, and emergency response. Workers potentially exposed to arsenic are monitored for urinary arsenic levels. The facility should be considered a candidate for detailed study based on the diversity of process operations encountered and the use of state-of-the-art technology and process equipment.

Arbitrary-Shaped Graphene-Based Planar Sandwich Supercapacitors on One Substrate with Enhanced Flexibility and Integration.

PubMed

Zheng, Shuanghao; Tang, Xingyan; Wu, Zhong-Shuai; Tan, Yuan-Zhi; Wang, Sen; Sun, Chenglin; Cheng, Hui-Ming; Bao, Xinhe

2017-02-28

The emerging smart power source-unitized electronics represent an utmost innovative paradigm requiring dramatic alteration from materials to device assembly and integration. However, traditional power sources with huge bottlenecks on the design and performance cannot keep pace with the revolutionized progress of shape-confirmable integrated circuits. Here, we demonstrate a versatile printable technology to fabricate arbitrary-shaped, printable graphene-based planar sandwich supercapacitors based on the layer-structured film of electrochemically exfoliated graphene as two electrodes and nanosized graphene oxide (lateral size of 100 nm) as a separator on one substrate. These monolithic planar supercapacitors not only possess arbitrary shapes, e.g., rectangle, hollow-square, "A" letter, "1" and "2" numbers, circle, and junction-wire shape, but also exhibit outstanding performance (∼280 F cm -3 ), excellent flexibility (no capacitance degradation under different bending states), and applicable scalability, which are far beyond those achieved by conventional technologies. More notably, such planar supercapacitors with superior integration can be readily interconnected in parallel and series, without use of metal interconnects and contacts, to modulate the output current and voltage of modular power sources for designable integrated circuits in various shapes and sizes.

An ultra low-power CMOS automatic action potential detector.

PubMed

Gosselin, Benoit; Sawan, Mohamad

2009-08-01

We present a low-power complementary metal-oxide semiconductor (CMOS) analog integrated biopotential detector intended for neural recording in wireless multichannel implants. The proposed detector can achieve accurate automatic discrimination of action potential (APs) from the background activity by means of an energy-based preprocessor and a linear delay element. This strategy improves detected waveforms integrity and prompts for better performance in neural prostheses. The delay element is implemented with a low-power continuous-time filter using a ninth-order equiripple allpass transfer function. All circuit building blocks use subthreshold OTAs employing dedicated circuit techniques for achieving ultra low-power and high dynamic range. The proposed circuit function in the submicrowatt range as the implemented CMOS 0.18- microm chip dissipates 780 nW, and it features a size of 0.07 mm(2). So it is suitable for massive integration in a multichannel device with modest overhead. The fabricated detector succeeds to automatically detect APs from underlying background activity. Testbench validation results obtained with synthetic neural waveforms are presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Donnelly, Vincent M.; Kornblit, Avinoam

The field of plasma etching is reviewed. Plasma etching, a revolutionary extension of the technique of physical sputtering, was introduced to integrated circuit manufacturing as early as the mid 1960s and more widely in the early 1970s, in an effort to reduce liquid waste disposal in manufacturing and achieve selectivities that were difficult to obtain with wet chemistry. Quickly, the ability to anisotropically etch silicon, aluminum, and silicon dioxide in plasmas became the breakthrough that allowed the features in integrated circuits to continue to shrink over the next 40 years. Some of this early history is reviewed, and a discussionmore » of the evolution in plasma reactor design is included. Some basic principles related to plasma etching such as evaporation rates and Langmuir–Hinshelwood adsorption are introduced. Etching mechanisms of selected materials, silicon, silicon dioxide, and low dielectric-constant materials are discussed in detail. A detailed treatment is presented of applications in current silicon integrated circuit fabrication. Finally, some predictions are offered for future needs and advances in plasma etching for silicon and nonsilicon-based devices.« less

Poly-4-vinylphenol (PVP) and Poly(melamine-co-formaldehyde) (PMF)-Based Atomic Switching Device and Its Application to Logic Gate Circuits with Low Operating Voltage.

PubMed

Kang, Dong-Ho; Choi, Woo-Young; Woo, Hyunsuk; Jang, Sungkyu; Park, Hyung-Youl; Shim, Jaewoo; Choi, Jae-Woong; Kim, Sungho; Jeon, Sanghun; Lee, Sungjoo; Park, Jin-Hong

2017-08-16

In this study, we demonstrate a high-performance solid polymer electrolyte (SPE) atomic switching device with low SET/RESET voltages (0.25 and -0.5 V, respectively), high on/off-current ratio (10 5 ), excellent cyclic endurance (>10 3 ), and long retention time (>10 4 s), where poly-4-vinylphenol (PVP)/poly(melamine-co-formaldehyde) (PMF) is used as an SPE layer. To accomplish these excellent device performance parameters, we reduce the off-current level of the PVP/PMF atomic switching device by improving the electrical insulating property of the PVP/PMF electrolyte through adjustment of the number of cross-linked chains. We then apply a titanium buffer layer to the PVP/PMF switching device for further improvement of bipolar switching behavior and device stability. In addition, we first implement SPE atomic switch-based logic AND and OR circuits with low operating voltages below 2 V by integrating 5 × 5 arrays of PVP/PMF switching devices on the flexible substrate. In particular, this low operating voltage of our logic circuits was much lower than that (>5 V) of the circuits configured by polymer resistive random access memory. This research successfully presents the feasibility of PVP/PMF atomic switches for flexible integrated circuits for next-generation electronic applications.

Electrofluidic Circuit-Based Microfluidic Viscometer for Analysis of Newtonian and Non-Newtonian Liquids under Different Temperatures.

PubMed

Lee, Tse-Ang; Liao, Wei-Hao; Wu, Yi-Fan; Chen, Yeng-Long; Tung, Yi-Chung

2018-02-06

This paper reports a microfluidic viscometer with an integrated pressure sensor based on electrofluidic circuits, which are electrical circuits constructed by ionic liquid-filled microfluidic channels. The electrofluidic circuit provides a pressure-sensing scheme with great long-term and thermal stability. The viscosity of the tested fluidic sample is estimated by its flow resistance, which is a function of pressure drop, flow rate, and the geometry of the microfluidic channel. The viscometer can be exploited to measure viscosity of either Newtonian or non-Newtonian power-law fluid under various shear rates (3-500 1/s) and temperatures (4-70 °C) with small sample volume (less than 400 μL). The developed sensor-integrated microfluidic viscometer is made of poly(dimethylsiloxane) (PDMS) with transparent electrofluidic circuit, which makes it feasible to simultaneously image samples under tests. In addition, the entire device is disposable to prevent cross-contamination between samples, which is desired for various chemical and biomedical applications. In the experiments, viscosities of Newtonian fluids, glycerol water solutions with different concentrations and a mixture of pyrogallol and sodium hydroxide (NaOH), and non-Newtonian fluids, xanthan gum solutions and human blood samples, have been characterized. The results demonstrate that the developed microfluidic viscometer provides a convenient and useful platform for practical viscosity characterization of fluidic samples for a wide variety of applications.

New readout integrated circuit using continuous time fixed pattern noise correction

NASA Astrophysics Data System (ADS)

Dupont, Bertrand; Chammings, G.; Rapellin, G.; Mandier, C.; Tchagaspanian, M.; Dupont, Benoit; Peizerat, A.; Yon, J. J.

2008-04-01

LETI has been involved in IRFPA development since 1978; the design department (LETI/DCIS) has focused its work on new ROIC architecture since many years. The trend is to integrate advanced functions into the CMOS design to achieve cost efficient sensors production. Thermal imaging market is today more and more demanding of systems with instant ON capability and low power consumption. The purpose of this paper is to present the latest developments of fixed pattern noise continuous time correction. Several architectures are proposed, some are based on hardwired digital processing and some are purely analog. Both are using scene based algorithms. Moreover a new method is proposed for simultaneous correction of pixel offsets and sensitivities. In this scope, a new architecture of readout integrated circuit has been implemented; this architecture is developed with 0.18μm CMOS technology. The specification and the application of the ROIC are discussed in details.

Two-dimensional thermal modeling of power monolithic microwave integrated circuits (MMIC's)

NASA Technical Reports Server (NTRS)

Fan, Mark S.; Christou, Aris; Pecht, Michael G.

1992-01-01

Numerical simulations of the two-dimensional temperature distributions for a typical GaAs MMIC circuit are conducted, aiming at understanding the heat conduction process of the circuit chip and providing temperature information for device reliability analysis. The method used is to solve the two-dimensional heat conduction equation with a control-volume-based finite difference scheme. In particular, the effects of the power dissipation and the ambient temperature are examined, and the criterion for the worst operating environment is discussed in terms of the allowed highest device junction temperature.

Performance of an optical encoder based on a nondiffractive beam implemented with a specific photodetection integrated circuit and a diffractive optical element.

PubMed

Quintián, Fernando Perez; Calarco, Nicolás; Lutenberg, Ariel; Lipovetzky, José

2015-09-01

In this paper, we study the incremental signal produced by an optical encoder based on a nondiffractive beam (NDB). The NDB is generated by means of a diffractive optical element (DOE). The detection system is composed by an application specific integrated circuit (ASIC) sensor. The sensor consists of an array of eight concentric annular photodiodes, each one provided with a programmable gain amplifier. In this way, the system is able to synthesize a nonuniform detectivity. The contrast, amplitude, and harmonic content of the sinusoidal output signal are analyzed. The influence of the cross talk among the annular photodiodes is placed in evidence through the dependence of the signal contrast on the wavelength.

An application specific integrated circuit based multi-anode microchannel array readout system

NASA Technical Reports Server (NTRS)

Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

1991-01-01

Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

Metropolitan Quantum Key Distribution with Silicon Photonics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bunandar, Darius; Lentine, Anthony; Lee, Catherine

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalablemore » resource for future formation of metropolitan quantum-secure communications networks.« less

Metropolitan Quantum Key Distribution with Silicon Photonics

DOE PAGES

Bunandar, Darius; Lentine, Anthony; Lee, Catherine; ...

2018-04-06

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalablemore » resource for future formation of metropolitan quantum-secure communications networks.« less

Metropolitan Quantum Key Distribution with Silicon Photonics

NASA Astrophysics Data System (ADS)

Bunandar, Darius; Lentine, Anthony; Lee, Catherine; Cai, Hong; Long, Christopher M.; Boynton, Nicholas; Martinez, Nicholas; DeRose, Christopher; Chen, Changchen; Grein, Matthew; Trotter, Douglas; Starbuck, Andrew; Pomerene, Andrew; Hamilton, Scott; Wong, Franco N. C.; Camacho, Ryan; Davids, Paul; Urayama, Junji; Englund, Dirk

2018-04-01

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalable resource for future formation of metropolitan quantum-secure communications networks.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Integrated circuits based on conjugated polymer monolayer

DOE PAGES

Li, Mengmeng; Mangalore, Deepthi Kamath; Zhao, Jingbo; ...

2018-01-31

It is still a great challenge to fabricate conjugated polymer monolayer field-effect transistors (PoM-FETs) due to intricate crystallization and film formation of conjugated polymers. Here we demonstrate PoM-FETs based on a single monolayer of a conjugated polymer. The resulting PoM-FETs are highly reproducible and exhibit charge carrier mobilities reaching 3 cm 2 V -1 s -1. The high performance is attributed to the strong interactions of the polymer chains present already in solution leading to pronounced edge-on packing and well-defined microstructure in the monolayer. The high reproducibility enables the integration of discrete unipolar PoM-FETs into inverters and ring oscillators. Realmore » logic functionality has been demonstrated by constructing a 15-bit code generator in which hundreds of self-assembled PoM-FETs are addressed simultaneously. Lastly, our results provide the state-of-the-art example of integrated circuits based on a conjugated polymer monolayer, opening prospective pathways for bottom-up organic electronics.« less

Integrated circuits based on conjugated polymer monolayer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Mengmeng; Mangalore, Deepthi Kamath; Zhao, Jingbo

It is still a great challenge to fabricate conjugated polymer monolayer field-effect transistors (PoM-FETs) due to intricate crystallization and film formation of conjugated polymers. Here we demonstrate PoM-FETs based on a single monolayer of a conjugated polymer. The resulting PoM-FETs are highly reproducible and exhibit charge carrier mobilities reaching 3 cm 2 V -1 s -1. The high performance is attributed to the strong interactions of the polymer chains present already in solution leading to pronounced edge-on packing and well-defined microstructure in the monolayer. The high reproducibility enables the integration of discrete unipolar PoM-FETs into inverters and ring oscillators. Realmore » logic functionality has been demonstrated by constructing a 15-bit code generator in which hundreds of self-assembled PoM-FETs are addressed simultaneously. Lastly, our results provide the state-of-the-art example of integrated circuits based on a conjugated polymer monolayer, opening prospective pathways for bottom-up organic electronics.« less

Integrated circuits based on conjugated polymer monolayer.

PubMed

Li, Mengmeng; Mangalore, Deepthi Kamath; Zhao, Jingbo; Carpenter, Joshua H; Yan, Hongping; Ade, Harald; Yan, He; Müllen, Klaus; Blom, Paul W M; Pisula, Wojciech; de Leeuw, Dago M; Asadi, Kamal

2018-01-31

It is still a great challenge to fabricate conjugated polymer monolayer field-effect transistors (PoM-FETs) due to intricate crystallization and film formation of conjugated polymers. Here we demonstrate PoM-FETs based on a single monolayer of a conjugated polymer. The resulting PoM-FETs are highly reproducible and exhibit charge carrier mobilities reaching 3 cm 2  V -1  s -1 . The high performance is attributed to the strong interactions of the polymer chains present already in solution leading to pronounced edge-on packing and well-defined microstructure in the monolayer. The high reproducibility enables the integration of discrete unipolar PoM-FETs into inverters and ring oscillators. Real logic functionality has been demonstrated by constructing a 15-bit code generator in which hundreds of self-assembled PoM-FETs are addressed simultaneously. Our results provide the state-of-the-art example of integrated circuits based on a conjugated polymer monolayer, opening prospective pathways for bottom-up organic electronics.

Analog bus driver and multiplexer

NASA Technical Reports Server (NTRS)

Pain, Bedabrata (Inventor); Hancock, Bruce (Inventor); Cunningham, Thomas J. (Inventor)

2012-01-01

For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.

System-on-Chip Considerations for Heterogeneous Integration of CMOS and Fluidic Bio-Interfaces.

PubMed

Datta-Chaudhuri, Timir; Smela, Elisabeth; Abshire, Pamela A

2016-12-01

CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. While many biosensing systems have successfully combined CMOS chips for readout and signal processing with passive sensing arrays, systems that co-locate sensing with active circuits on a single chip offer significant advantages in size and performance but increase the complexity of multi-domain design and heterogeneous integration. This emerging class of lab-on-CMOS systems also poses distinct and vexing technical challenges that arise from the disparate requirements of biosensors and integrated circuits (ICs). Modeling these systems must address not only circuit design, but also the behavior of biological components on the surface of the IC and any physical structures. Existing tools do not support the cross-domain simulation of heterogeneous lab-on-CMOS systems, so we recommend a two-step modeling approach: using circuit simulation to inform physics-based simulation, and vice versa. We review the primary lab-on-CMOS implementation challenges and discuss practical approaches to overcome them. Issues include new versions of classical challenges in system-on-chip integration, such as thermal effects, floor-planning, and signal coupling, as well as new challenges that are specifically attributable to biological and fluidic domains, such as electrochemical effects, non-standard packaging, surface treatments, sterilization, microfabrication of surface structures, and microfluidic integration. We describe these concerns as they arise in lab-on-CMOS systems and discuss solutions that have been experimentally demonstrated.

Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits

PubMed Central

Khuri-Yakub, B. (Pierre) T.; Oralkan, Ömer; Nikoozadeh, Amin; Wygant, Ira O.; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N.; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O’Donnell, Matthew; Truong, Uyen; Sahn, David J.

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics. PMID:21097106

Simple photometer circuits using modular electronic components

NASA Technical Reports Server (NTRS)

Wampler, J. E.

1975-01-01

Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.

Relaxation oscillator-realized artificial electronic neurons, their responses, and noise

NASA Astrophysics Data System (ADS)

Lim, Hyungkwang; Ahn, Hyung-Woo; Kornijcuk, Vladimir; Kim, Guhyun; Seok, Jun Yeong; Kim, Inho; Hwang, Cheol Seong; Jeong, Doo Seok

2016-05-01

A proof-of-concept relaxation oscillator-based leaky integrate-and-fire (ROLIF) neuron circuit is realized by using an amorphous chalcogenide-based threshold switch and non-ideal operational amplifier (op-amp). The proposed ROLIF neuron offers biologically plausible features such as analog-type encoding, signal amplification, unidirectional synaptic transmission, and Poisson noise. The synaptic transmission between pre- and postsynaptic neurons is achieved through a passive synapse (simple resistor). The synaptic resistor coupled to the non-ideal op-amp realizes excitatory postsynaptic potential (EPSP) evolution that evokes postsynaptic neuron spiking. In an attempt to generalize our proposed model, we theoretically examine ROLIF neuron circuits adopting different non-ideal op-amps having different gains and slew rates. The simulation results indicate the importance of gain in postsynaptic neuron spiking, irrespective of the slew rate (as long as the rate exceeds a particular value), providing the basis for the ROLIF neuron circuit design. Eventually, the behavior of a postsynaptic neuron in connection to multiple presynaptic neurons via synapses is highlighted in terms of EPSP evolution amid simultaneously incident asynchronous presynaptic spikes, which in fact reveals an important role of the random noise in spatial integration.A proof-of-concept relaxation oscillator-based leaky integrate-and-fire (ROLIF) neuron circuit is realized by using an amorphous chalcogenide-based threshold switch and non-ideal operational amplifier (op-amp). The proposed ROLIF neuron offers biologically plausible features such as analog-type encoding, signal amplification, unidirectional synaptic transmission, and Poisson noise. The synaptic transmission between pre- and postsynaptic neurons is achieved through a passive synapse (simple resistor). The synaptic resistor coupled to the non-ideal op-amp realizes excitatory postsynaptic potential (EPSP) evolution that evokes postsynaptic neuron spiking. In an attempt to generalize our proposed model, we theoretically examine ROLIF neuron circuits adopting different non-ideal op-amps having different gains and slew rates. The simulation results indicate the importance of gain in postsynaptic neuron spiking, irrespective of the slew rate (as long as the rate exceeds a particular value), providing the basis for the ROLIF neuron circuit design. Eventually, the behavior of a postsynaptic neuron in connection to multiple presynaptic neurons via synapses is highlighted in terms of EPSP evolution amid simultaneously incident asynchronous presynaptic spikes, which in fact reveals an important role of the random noise in spatial integration. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr01278g

LEC GaAs for integrated circuit applications

NASA Technical Reports Server (NTRS)

Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

1984-01-01

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

A closed-loop compressive-sensing-based neural recording system.

PubMed

Zhang, Jie; Mitra, Srinjoy; Suo, Yuanming; Cheng, Andrew; Xiong, Tao; Michon, Frederic; Welkenhuysen, Marleen; Kloosterman, Fabian; Chin, Peter S; Hsiao, Steven; Tran, Trac D; Yazicioglu, Firat; Etienne-Cummings, Ralph

2015-06-01

This paper describes a low power closed-loop compressive sensing (CS) based neural recording system. This system provides an efficient method to reduce data transmission bandwidth for implantable neural recording devices. By doing so, this technique reduces a majority of system power consumption which is dissipated at data readout interface. The design of the system is scalable and is a viable option for large scale integration of electrodes or recording sites onto a single device. The entire system consists of an application-specific integrated circuit (ASIC) with 4 recording readout channels with CS circuits, a real time off-chip CS recovery block and a recovery quality evaluation block that provides a closed feedback to adaptively adjust compression rate. Since CS performance is strongly signal dependent, the ASIC has been tested in vivo and with standard public neural databases. Implemented using efficient digital circuit, this system is able to achieve >10 times data compression on the entire neural spike band (500-6KHz) while consuming only 0.83uW (0.53 V voltage supply) additional digital power per electrode. When only the spikes are desired, the system is able to further compress the detected spikes by around 16 times. Unlike other similar systems, the characteristic spikes and inter-spike data can both be recovered which guarantes a >95% spike classification success rate. The compression circuit occupied 0.11mm(2)/electrode in a 180nm CMOS process. The complete signal processing circuit consumes <16uW/electrode. Power and area efficiency demonstrated by the system make it an ideal candidate for integration into large recording arrays containing thousands of electrode. Closed-loop recording and reconstruction performance evaluation further improves the robustness of the compression method, thus making the system more practical for long term recording.

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

SiC Integrated Circuits for Power Device Drivers Able to Operate in Harsh Environments

NASA Astrophysics Data System (ADS)

Godignon, P.; Alexandru, M.; Banu, V.; Montserrat, J.; Jorda, X.; Vellvehi, M.; Schmidt, B.; Michel, P.; Millan, J.

2014-08-01

The currently developed SiC electronic devices are more robust to high temperature operation and radiation exposure damage than correspondingly rated Si ones. In order to integrate the existent SiC high power and high temperature electronics into more complex systems, a SiC integrated circuit (IC) technology capable of operation at temperatures substantially above the conventional ones is required. Therefore, this paper is a step towards the development of ICs-control electronics that have to attend the harsh environment power applications. Concretely, we present the development of SiC MESFET-based digital circuitry, able to integrate gate driver for SiC power devices. Furthermore, a planar lateral power MESFET is developed with the aim of its co-integration on the same chip with the previously mentioned SiC digital ICs technology. And finally, experimental results on SiC Schottky-gated devices irradiated with protons and electrons are presented. This development is based on the Tungsten-Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

Controlling system for smart hyper-spectral imaging array based on liquid-crystal Fabry-Perot device

NASA Astrophysics Data System (ADS)

Jiang, Xue; Chen, Xin; Rong, Xin; Liu, Kan; Zhang, Xinyu; Ji, An; Xie, Changsheng

2011-11-01

A research for developing a kind of smart spectral imaging detection technique based on the electrically tunable liquidcrystal (LC) FP structure is launched. It has some advantages of low cost, highly compact integration, perfuming wavelength selection without moving any micro-mirror of FP device, and the higher reliability and stability. The controlling system for hyper-spectral imaging array based on LC-FP device includes mainly a MSP430F5438 as its core. Considering the characteristics of LC-FP device, the controlling system can provide a driving signal of 1-10 kHz and 0- 30Vrms for the device in a static driving mode. This paper introduces the hardware designing of the control system in detail. It presents an overall hardware solutions including: (1) the MSP430 controlling circuit, and (2) the operational amplifier circuit, and (3) the power supply circuit, and (4) the AD conversion circuit. The techniques for the realization of special high speed digital circuits, which is necessary for the PCB employed, is also discussed.

Superior model for fault tolerance computation in designing nano-sized circuit systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, N. S. S., E-mail: narinderjit@petronas.com.my; Muthuvalu, M. S., E-mail: msmuthuvalu@gmail.com; Asirvadam, V. S., E-mail: vijanth-sagayan@petronas.com.my

2014-10-24

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalizationmore » of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.« less

A Substrate Integrated Waveguide Sensor for Measurement of Dielectric Properties of Biomass Materials

USDA-ARS?s Scientific Manuscript database

Substrate integrated waveguide- based sensors balance the performance and well known design techniques of classical waveguides with the cheaper and more adaptable aspects of planar circuits. Propagation characteristics are similar to waveguides with the design retaining many positive aspects of wave...

Surface-micromachined and high-aspect ratio electrostatic actuators for aeronautic and space applications: design and lifetime considerations

NASA Astrophysics Data System (ADS)

Vescovo, P.; Joseph, E.; Bourbon, G.; Le Moal, P.; Minotti, P.; Hibert, C.; Pont, G.

2003-09-01

This paper focuses on recent advances in the field of MEMS-based actuators and distributed microelectromechanical systems (MEMS). IC-processed actuators (e.g. actuators that are machined using integrated circuit batch processes) are expected to open a wide range of industrial applications on the near term. The most promising investigations deal with high-aspect ratio electric field driven microactuators suitable for use in numerous technical fields such as aeronautics and space industry. Because the silicon micromachining technology have the potential to integrate both mechanical components and control circuits within a single process, MEMS-based active control of microscopic and macroscopic structures appears to be one of the most promising challenges for the next decade. As a first step towards new generations of MEMS-based smart structures, recent investigations dealing with silicon mechanisms involving MEMS-based actuators are briefly discussed in this paper.

Sensor readout detector circuit

DOEpatents

Chu, Dahlon D.; Thelen, Jr., Donald C.

1998-01-01

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

Sensor readout detector circuit

DOEpatents

Chu, D.D.; Thelen, D.C. Jr.

1998-08-11

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

Addiction: decreased reward sensitivity and increased expectation sensitivity conspire to overwhelm the brain's control circuit.

PubMed

Volkow, Nora D; Wang, Gene-Jack; Fowler, Joanna S; Tomasi, Dardo; Telang, Frank; Baler, Ruben

2010-09-01

Based on brain imaging findings, we present a model according to which addiction emerges as an imbalance in the information processing and integration among various brain circuits and functions. The dysfunctions reflect (a) decreased sensitivity of reward circuits, (b) enhanced sensitivity of memory circuits to conditioned expectations to drugs and drug cues, stress reactivity, and (c) negative mood, and a weakened control circuit. Although initial experimentation with a drug of abuse is largely a voluntary behavior, continued drug use can eventually impair neuronal circuits in the brain that are involved in free will, turning drug use into an automatic compulsive behavior. The ability of addictive drugs to co-opt neurotransmitter signals between neurons (including dopamine, glutamate, and GABA) modifies the function of different neuronal circuits, which begin to falter at different stages of an addiction trajectory. Upon exposure to the drug, drug cues or stress this results in unrestrained hyperactivation of the motivation/drive circuit that results in the compulsive drug intake that characterizes addiction.

Technology CAD for integrated circuit fabrication technology development and technology transfer

NASA Astrophysics Data System (ADS)

Saha, Samar

2003-07-01

In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are used to optimize the device and process parameters to develop a new generation of IC manufacturing technology by reverse engineering from the target product specifications. While in technology transfer to manufacturing co-location, TCAD is used for process centering with respect to high-volume manufacturing equipment of the target manufacturing equipment of the target manufacturing facility. A quantitative model is developed to demonstrate the potential benefits of the simulation-based methodology in reducing the cycle time and cost of typical technology development and technology transfer projects over the traditional practices. The strategy for predictive simulation to improve the effectiveness of a TCAD-based project, is also discussed.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Generating millimeter-wave Bessel beam with orbital angular momentum using reflective-type metasurface inherently integrated with source

NASA Astrophysics Data System (ADS)

Shen, Yizhu; Yang, Jiawei; Meng, Hongfu; Dou, Wenbin; Hu, Sanming

2018-04-01

Metasurfaces, orbital angular momenta (OAM), and non-diffractive Bessel beams have been attracting worldwide research. Combining the benefits of these three promising techniques, this paper proposes a metasurface-based reflective-type approach to generate a first-order Bessel beam carrying OAM. To validate this approach, a millimeter-wave metasurface is analyzed, designed, fabricated, and measured. Experimental results agree well with simulation. Moreover, this reflective-type metasurface, generating a Bessel beam with OAM, is inherently integrated with a planar feeding source in the same single-layer printed circuit board. Therefore, the proposed design features low profile, low cost, easy integration with front-end active circuits, and no alignment error between the feeding source and the metasurface.

Integrating DNA strand-displacement circuitry with DNA tile self-assembly

PubMed Central

Zhang, David Yu; Hariadi, Rizal F.; Choi, Harry M.T.; Winfree, Erik

2013-01-01

DNA nanotechnology has emerged as a reliable and programmable way of controlling matter at the nanoscale through the specificity of Watson–Crick base pairing, allowing both complex self-assembled structures with nanometer precision and complex reaction networks implementing digital and analog behaviors. Here we show how two well-developed frameworks, DNA tile self-assembly and DNA strand-displacement circuits, can be systematically integrated to provide programmable kinetic control of self-assembly. We demonstrate the triggered and catalytic isothermal self-assembly of DNA nanotubes over 10 μm long from precursor DNA double-crossover tiles activated by an upstream DNA catalyst network. Integrating more sophisticated control circuits and tile systems could enable precise spatial and temporal organization of dynamic molecular structures. PMID:23756381

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

NASA Astrophysics Data System (ADS)

Ou-Peng, Li; Yong, Zhang; Rui-Min, Xu; Wei, Cheng; Yuan, Wang; Bing, Niu; Hai-Yan, Lu

2016-05-01

Design and characterization of a G-band (140-220 GHz) terahertz monolithic integrated circuit (TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm InGaAs/InP double heterojunction bipolar transistor (DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the InP substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140-190 GHz respectively. The saturation output powers are -2.688 dBm at 210 GHz and -2.88 dBm at 220 GHz, respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications. Project supported by the National Natural Science Foundation of China (Grant No. 61501091) and the Fundamental Research Funds for the Central Universities of Ministry of Education of China (Grant Nos. ZYGX2014J003 and ZYGX2013J020).

Fabric-based active electrode design and fabrication for health monitoring clothing.

PubMed

Merritt, Carey R; Nagle, H Troy; Grant, Edward

2009-03-01

In this paper, two versions of fabric-based active electrodes are presented to provide a wearable solution for ECG monitoring clothing. The first version of active electrode involved direct attachment of surface-mountable components to a textile screen-printed circuit using polymer thick film techniques. The second version involved attaching a much smaller, thinner, and less obtrusive interposer containing the active electrode circuitry to a simplified textile circuit. These designs explored techniques for electronic textile interconnection, chip attachment to textiles, and packaging of circuits on textiles for durability. The results from ECG tests indicate that the performance of each active electrode is comparable to commercial Ag/AgCl electrodes. The interposer-based active electrodes survived a five-cycle washing test while maintaining good signal integrity.

Analysis of the Measurement and Modeling of a Digital Inverter Based on a Ferroelectric Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Sayyah, Rana; Ho, Fat D.

2009-01-01

The use of ferroelectric materials for digital memory devices is widely researched and implemented, but ferroelectric devices also possess unique characteristics that make them have interesting and useful properties in digital circuits. Because ferroelectric transistors possess the properties of hysteresis and nonlinearity, a digital inverter containing a FeFET has very different characteristics than one with a traditional FET. This paper characterizes the properties of the measurement and modeling of a FeFET based digital inverter. The circuit was set up using discrete FeFETs. The purpose of this circuit was not to produce a practical integrated circuit that could be inserted directly into existing digital circuits, but to explore the properties and characteristics of such a device and to look at possible future uses. Input and output characteristics are presented, as well as timing measurements. Comparisons are made between the ferroelectric device and the properties of a standard digital inverter. Potential benefits and possible uses of such a device are presented.

Technical Reliability Studies. EOS/ESD Technology Abstracts

DTIC Science & Technology

1982-01-01

RESISTANT BIPOLAR TRANSISTOR DESIGN AND ITS APPLICATIONS TO LINEAR INTEGRATED CIRCUITS 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR 15786 SOME...T.M. 16476 STATIC DISCHARGE MODELING TECHNIQUES FOR EVALUATION OF INTEGRATED (FET) CIRCUIT DESTRUCTION 16145 MODULE ELECTAOSTATIC DISCHARGE SIMULATOR...PLASTIC LSI CIRCUITS PRklE, L.A., II 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR PRICE, R.D. 13455 EVALUATION OF PLASTIC LSI CIRCUITS PSHAENICH, A

Silicon millimetre-wave integrated-circuit (SIMMWIC) SPST switch

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-10-01

The first silicon millimetre-wave integrated circuit (SIMMWIC) has been successfully fabricated. This circuit is a monolithic SPST switch with a 3 dB bandwidth of 20 percent and a minimum isolation of 21.6 dB across the band (centre frequency is 36.75 GHz). This monolithic circuit is a low-cost reproducible building block for all millimetre-wave control applications.

Demonstration of Inexact Computing Implemented in the JPEG Compression Algorithm using Probabilistic Boolean Logic applied to CMOS Components

DTIC Science & Technology

2015-12-24

Signal to Noise Ratio SPICE Simulation Program with Integrated Circuit Emphasis TIFF Tagged Image File Format USC University of Southern California xvii...sources can create errors in digital circuits. These effects can be simulated using Simulation Program with Integrated Circuit Emphasis ( SPICE ) or...compute summary statistics. 4.1 Circuit Simulations Noisy analog circuits can be simulated in SPICE or Cadence SpectreTM software via noisy voltage

Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

NASA Astrophysics Data System (ADS)

Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

2017-05-01

A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

Optical printed circuit board (O-PCB) and VLSI photonic integrated circuits: visions, challenges, and progresses

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Noh, H. S.; Kim, K. H.; Song, S. H.

2006-09-01

A collective overview and review is presented on the original work conducted on the theory, design, fabrication, and in-tegration of micro/nano-scale optical wires and photonic devices for applications in a newly-conceived photonic systems called "optical printed circuit board" (O-PCBs) and "VLSI photonic integrated circuits" (VLSI-PIC). These are aimed for compact, high-speed, multi-functional, intelligent, light-weight, low-energy and environmentally friendly, low-cost, and high-volume applications to complement or surpass the capabilities of electrical PCBs (E-PCBs) and/or VLSI electronic integrated circuit (VLSI-IC) systems. These consist of 2-dimensional or 3-dimensional planar arrays of micro/nano-optical wires and circuits to perform the functions of all-optical sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards or substrates. The integrated optical devices include micro/nano-scale waveguides, lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices, made of polymer, silicon and other semiconductor materials. For VLSI photonic integration, photonic crystals and plasmonic structures have been used. Scientific and technological issues concerning the processes of miniaturization, interconnection and integration of these systems as applicable to board-to-board, chip-to-chip, and intra-chip integration, are discussed along with applications for future computers, telecommunications, and sensor-systems. Visions and challenges toward these goals are also discussed.

Antibody-controlled actuation of DNA-based molecular circuits.

PubMed

Engelen, Wouter; Meijer, Lenny H H; Somers, Bram; de Greef, Tom F A; Merkx, Maarten

2017-02-17

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

Antibody-controlled actuation of DNA-based molecular circuits

NASA Astrophysics Data System (ADS)

Engelen, Wouter; Meijer, Lenny H. H.; Somers, Bram; de Greef, Tom F. A.; Merkx, Maarten

2017-02-01

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ryu, C.; Boshier, M. G.

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore » electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

A simple structure wavelet transform circuit employing function link neural networks and SI filters

NASA Astrophysics Data System (ADS)

Mu, Li; Yigang, He

2016-12-01

Signal processing by means of analog circuits offers advantages from a power consumption viewpoint. Implementing wavelet transform (WT) using analog circuits is of great interest when low-power consumption becomes an important issue. In this article, a novel simple structure WT circuit in analog domain is presented by employing functional link neural network (FLNN) and switched-current (SI) filters. First, the wavelet base is approximated using FLNN algorithms for giving a filter transfer function that is suitable for simple structure WT circuit implementation. Next, the WT circuit is constructed with the wavelet filter bank, whose impulse response is the approximated wavelet and its dilations. The filter design that follows is based on a follow-the-leader feedback (FLF) structure with multiple output bilinear SI integrators and current mirrors as the main building blocks. SI filter is well suited for this application since the dilation constant across different scales of the transform can be precisely implemented and controlled by the clock frequency of the circuit with the same system architecture. Finally, to illustrate the design procedure, a seventh-order FLNN-approximated Gaussian wavelet is implemented as an example. Simulations have successfully verified that the designed simple structure WT circuit has low sensitivity, low-power consumption and litter effect to the imperfections.

Process development of beam-lead silicon-gate COS/MOS integrated circuits

NASA Technical Reports Server (NTRS)

Baptiste, B.; Boesenberg, W.

1974-01-01

Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.

SiNOI and AlGaAs-on-SOI nonlinear circuits for continuum generation in Si photonics

NASA Astrophysics Data System (ADS)

El Dirani, Houssein; Monat, Christelle; Brision, Stéphane; Olivier, Nicolas; Jany, Christophe; Letartre, Xavier; Pu, Minhao; Girouard, Peter D.; Hagedorn Frandsen, Lars; Semenova, Elizaveta; Katsuo Oxenløwe, Leif; Yvind, Kresten; Sciancalepore, Corrado

2018-02-01

In this communication, we report on the design, fabrication, and testing of Silicon Nitride on Insulator (SiNOI) and Aluminum-Gallium-Arsenide (AlGaAs) on silicon-on-insulator (SOI) nonlinear photonic circuits for continuum generation in Silicon (Si) photonics. As recently demonstrated, the generation of frequency continua and supercontinua can be used to overcome the intrinsic limitations of nowadays silicon photonics notably concerning the heterogeneous integration of III-V on SOI lasers for datacom and telecom applications. By using the Kerr nonlinearity of monolithic silicon nitride and heterointegrated GaAs-based alloys on SOI, the generation of tens or even hundreds of new optical frequencies can be obtained in dispersion tailored waveguides, thus providing an all-optical alternative to the heterointegration of hundreds of standalone III-V on Si lasers. In our work, we present paths to energy-efficient continua generation on silicon photonics circuits. Notably, we demonstrate spectral broadening covering the full C-band via Kerrbased self-phase modulation in SiNOI nanowires featuring full process compatibility with Si photonic devices. Moreover, AlGaAs waveguides are heterointegrated on SOI in order to dramatically reduce (x1/10) thresholds in optical parametric oscillation and in the power required for supercontinuum generation under pulsed pumping. The manufacturing techniques allowing the monolithic co-integration of nonlinear functionalities on existing CMOS-compatible Si photonics for both active and passive components will be shown. Experimental evidence based on self-phase modulation show SiNOI and AlGaAs nanowires capable of generating wide-spanning frequency continua in the C-Band. This will pave the way for low-threshold power-efficient Kerr-based comb- and continuum- sources featuring compatibility with Si photonic integrated circuits (Si-PICs).

The Effects of Space Radiation on Linear Integrated Circuit

NASA Technical Reports Server (NTRS)

Johnston, A.

2000-01-01

Permanent and transient effects are discussed that are induced in linear integrated circuits by space radiation. Recent developments include enhanced damage at low dose rate, increased damage from protons due to displacement effects, and transients in digital comparators that can cause circuit malfunctions.

35 GHz integrated circuit rectifying antenna with 33 percent efficiency

NASA Technical Reports Server (NTRS)

Yoo, T.-W.; Chang, K.

1991-01-01

A 35 GHz integrated circuit rectifying antenna (rectenna) has been developed using a microstrip dipole antenna and beam-lead mixer diode. Greater than 33 percent conversion efficiency has been achieved. The circuit should have applications in microwave/millimeter-wave power transmission and detection.

Thermostatic system of sensor in NIR spectrometer based on PID control

NASA Astrophysics Data System (ADS)

Wang, Zhihong; Qiao, Liwei; Ji, Xufei

2016-11-01

Aiming at the shortcomings of the primary sensor thermostatic control system in the near infrared (NIR) spectrometer, a novel thermostatic control system based on proportional-integral-derivative (PID) control technology was developed to improve the detection precision of the NIR spectrometer. There were five parts including bridge amplifier circuit, analog-digital conversion (ADC) circuit, microcontroller, digital-analog conversion (DAC) circuit and drive circuit in the system. The five parts formed a closed-loop control system based on PID algorithm that was used to control the error between the temperature calculated by the sampling data of ADC and the designed temperature to ensure the stability of the spectrometer's sensor. The experimental results show that, when the operating temperature of sensor is -11°, compared with the original system, the temperature control precision of the new control system is improved from ±0.64° to ±0.04° and the spectrum signal to noise ratio (SNR) is improved from 4891 to 5967.

Digital logic circuit based on two component molecular systems of BSA and salen

NASA Astrophysics Data System (ADS)

Hai-Bin, Lin; Feng, Chen; Hong-Xu, Guo

2018-02-01

A new fluorescent molecular probe 1 was designed and constructed by combining bovine serum albumin (BSA) and N,N‧-bis(salicylidene)ethylenediamine (salen). Stimulated by Zn2 +, tris, or EDTAH2Na2, the distance between BSA and salen was regulated, which was accompanied by an obvious change in the fluorescence intensity at 350 or 445 nm based on Förster resonance energy transfer. Moreover, based on the encoding binary digits in these inputs and outputs applying positive logic conventions, a monomolecular circuit integrating one OR, three NOT, and three YES gates, was successfully achieved.

Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

PubMed

Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

2016-02-23

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

PubMed

Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley

2009-10-01

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

System perspectives for mobile platform design in m-Health

NASA Astrophysics Data System (ADS)

Roveda, Janet M.; Fink, Wolfgang

2016-05-01

Advances in integrated circuit technologies have led to the integration of medical sensor front ends with data processing circuits, i.e., mobile platform design for wearable sensors. We discuss design methodologies for wearable sensor nodes and their applications in m-Health. From the user perspective, flexibility, comfort, appearance, fashion, ease-of-use, and visibility are key form factors. From the technology development point of view, high accuracy, low power consumption, and high signal to noise ratio are desirable features. From the embedded software design standpoint, real time data analysis algorithms, application and database interfaces are the critical components to create successful wearable sensor-based products.

Mode-locked laser with pulse interleavers in a monolithic photonic integrated circuit for millimeter wave and terahertz carrier generation.

PubMed

Lo, Mu-Chieh; Guzmán, Robinson; Gordón, Carlos; Carpintero, Guillermo

2017-04-15

This Letter presents a photonics-based millimeter wave and terahertz frequency synthesizer using a monolithic InP photonic integrated circuit composed of a mode-locked laser (MLL) and two pulse interleaver stages to multiply the repetition rate frequency. The MLL is a multiple colliding pulse MLL producing an 80 GHz repetition rate pulse train. Through two consecutive monolithic pulse interleaver structures, each doubling the repetition rate, we demonstrate the achievement of 160 and 320 GHz. The fabrication was done on a multi-project wafer run of a generic InP photonic technology platform.

Variable self-powered light detection CMOS chip with real-time adaptive tracking digital output based on a novel on-chip sensor.

PubMed

Wang, HongYi; Fan, Youyou; Lu, Zhijian; Luo, Tao; Fu, Houqiang; Song, Hongjiang; Zhao, Yuji; Christen, Jennifer Blain

2017-10-02

This paper provides a solution for a self-powered light direction detection with digitized output. Light direction sensors, energy harvesting photodiodes, real-time adaptive tracking digital output unit and other necessary circuits are integrated on a single chip based on a standard 0.18 µm CMOS process. Light direction sensors proposed have an accuracy of 1.8 degree over a 120 degree range. In order to improve the accuracy, a compensation circuit is presented for photodiodes' forward currents. The actual measurement precision of output is approximately 7 ENOB. Besides that, an adaptive under voltage protection circuit is designed for variable supply power which may undulate with temperature and process.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

PubMed Central

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-01

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits. PMID:24463956

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

PubMed

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-27

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

Design, fabrication and analysis of integrated optical waveguide devices

NASA Astrophysics Data System (ADS)

Sikorski, Yuri

Throughout the present dissertation, the main effort has been to develop the set of design rules for optical integrated circuits (OIC). At the present time, when planar optical integrated circuits seem to be the leading technology, and industry is heading towards much higher levels of integration, such design rules become necessary. It is known that analysis of light propagation in rectangular waveguides can not be carried out exactly. Various approximations become necessary, and their validity is discussed in this text. Various methods are used in the text for calculating the same problems, and results are compared. A few new concepts have been suggested to avoid approximations used elsewhere. The second part of this dissertation is directed to the development of a new technique for the fabrication of optical integrated circuits inside optical glass. This technique is based on the use of ultrafast laser pulses to alter the properties of glasses. Using this method we demonstrated the possibility of changing the refractive index of various passive and active optical glasses as well as ablating the material on the surface in a controlled fashion. A number of optical waveguide devices (e.g. waveguides, directional couplers, diffraction gratings, fiber Bragg gratings, V-grooves in dual-clad optical fibers, optical waveguide amplifiers) were fabricated and tested. Testing included measurements of loss/throughput, near-field mode profiles, efficiency and thermal stability. All of the experimental setup and test results are reported in the dissertation. We also demonstrated the possibility of using this technique to fabricate future bio-optical devices that will incorporate an OIC and a microfluidic circuit on a single substrate. Our results are expected to serve as a guide for the design and fabrication of a new generation of integrated optical and bio-optical devices.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Volkow, N.D.; Wang, G.; Volkow, N.D.

Based on brain imaging findings, we present a model according to which addiction emerges as an imbalance in the information processing and integration among various brain circuits and functions. The dysfunctions reflect (a) decreased sensitivity of reward circuits, (b) enhanced sensitivity of memory circuits to conditioned expectations to drugs and drug cues, stress reactivity, and (c) negative mood, and a weakened control circuit. Although initial experimentation with a drug of abuse is largely a voluntary behavior, continued drug use can eventually impair neuronal circuits in the brain that are involved in free will, turning drug use into an automatic compulsivemore » behavior. The ability of addictive drugs to co-opt neurotransmitter signals between neurons (including dopamine, glutamate, and GABA) modifies the function of different neuronal circuits, which begin to falter at different stages of an addiction trajectory. Upon exposure to the drug, drug cues or stress this results in unrestrained hyperactivation of the motivation/drive circuit that results in the compulsive drug intake that characterizes addiction.« less

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Advances in integrated photonic circuits for packet-switched interconnection

NASA Astrophysics Data System (ADS)

Williams, Kevin A.; Stabile, Ripalta

2014-03-01

Sustained increases in capacity and connectivity are needed to overcome congestion in a range of broadband communication network nodes. Packet routing and switching in the electronic domain are leading to unsustainable energy- and bandwidth-densities, motivating research into hybrid solutions: optical switching engines are introduced for massive-bandwidth data transport while the electronic domain is clocked at more modest GHz rates to manage routing. Commercially-deployed optical switching engines using MEMS technologies are unwieldy and too slow to reconfigure for future packet-based networking. Optoelectronic packet-compliant switch technologies have been demonstrated as laboratory prototypes, but they have so far mostly used discretely pigtailed components, which are impractical for control plane development and product assembly. Integrated photonics has long held the promise of reduced hardware complexity and may be the critical step towards packet-compliant optical switching engines. Recently a number of laboratories world-wide have prototyped optical switching circuits using monolithic integration technology with up to several hundreds of integrated optical components per chip. Our own work has focused on multi-input to multi-output switching matrices. Recently we have demonstrated 8×8×8λ space and wavelength selective switches using gated cyclic routers and 16×16 broadband switching chips using monolithic multi-stage networks. We now operate these advanced circuits with custom control planes implemented with FPGAs to explore real time packet routing in multi-wavelength, multi-port test-beds. We review our contributions in the context of state of the art photonic integrated circuit technology and packet optical switching hardware demonstrations.

Réalisation de circuits intégrés I^2L à base de transistors bipolaires a double hétérojonction GaAlAs/GaAs

NASA Astrophysics Data System (ADS)

Vannel, J. P.; Camps, T.; Ferreira, A. S.; Tasselh, J.; Cazarré, A.; Marty, A.; Bailbé, J. P.

1991-04-01

GaAlAs/GaAs double heterojunction bipolar transistors (DHBT's) have a number of advantages for I^2L (integrated injection logic) high speed integrated circuits concerning the interchangeability between the emitter and the collector and a high design flexibility due to the use of two heterojunctions. We present the fabrication process of an I^2L integrated circuit including a frequency divider-by-two and a ring oscillator which presents a propagation delay time of 1.2 ns for a power consumption of 8 mW. Les transistors bipolaires à double hétérojonction GaAlAs/GaAs (TBDH) présentent de nombreux avantages pour leur application dans des circuits intégrés de logique I^2L (logique à injection intégrée), dont en particulier l'interchangeabilité entre émetteur et collecteur, et la liberté de conception résultant de l'utilisation de deux hétérojonctions. Dans ce cadre nous décrivons les principales étapes technologiques de fabrication d'un circuit intégré I^2L comportant un diviseur de fréquence par 2 et un oscillateur en anneau. Ce demier présente un temps de propagation de 1,2 ns pour une puissance dissipée de 8 mW.

Nonlinear silicon photonics

NASA Astrophysics Data System (ADS)

Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

2017-09-01

Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

An on-chip coupled resonator optical waveguide single-photon buffer

PubMed Central

Takesue, Hiroki; Matsuda, Nobuyuki; Kuramochi, Eiichi; Munro, William J.; Notomi, Masaya

2013-01-01

Integrated quantum optical circuits are now seen as one of the most promising approaches with which to realize single-photon quantum information processing. Many of the core elements for such circuits have been realized, including sources, gates and detectors. However, a significant missing function necessary for photonic quantum information processing on-chip is a buffer, where single photons are stored for a short period of time to facilitate circuit synchronization. Here we report an on-chip single-photon buffer based on coupled resonator optical waveguides (CROW) consisting of 400 high-Q photonic crystal line-defect nanocavities. By using the CROW, a pulsed single photon is successfully buffered for 150 ps with 50-ps tunability while maintaining its non-classical properties. Furthermore, we show that our buffer preserves entanglement by storing and retrieving one photon from a time-bin entangled state. This is a significant step towards an all-optical integrated quantum information processor. PMID:24217422

MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

NASA Astrophysics Data System (ADS)

Jang, Munseon; Yun, Kwang-Seok

2017-12-01

In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

Heuristics for the Hodgkin-Huxley system.

PubMed

Hoppensteadt, Frank

2013-09-01

Hodgkin and Huxley (HH) discovered that voltages control ionic currents in nerve membranes. This led them to describe electrical activity in a neuronal membrane patch in terms of an electronic circuit whose characteristics were determined using empirical data. Due to the complexity of this model, a variety of heuristics, including relaxation oscillator circuits and integrate-and-fire models, have been used to investigate activity in neurons, and these simpler models have been successful in suggesting experiments and explaining observations. Connections between most of the simpler models had not been made clear until recently. Shown here are connections between these heuristics and the full HH model. In particular, we study a new model (Type III circuit): It includes the van der Pol-based models; it can be approximated by a simple integrate-and-fire model; and it creates voltages and currents that correspond, respectively, to the h and V components of the HH system. Copyright © 2012 Elsevier Inc. All rights reserved.

Power Electronics Design of a Solar Powered In-car Wireless Tag for Asset Tracking and Parking Applications

NASA Astrophysics Data System (ADS)

Zhu, D.; Henaut, J.; Beeby, S. P.

2014-11-01

This paper reports the design and testing of a power conditioning circuit for a solar powered in-car wireless tag for asset tracking and parking application. Existing long range asset tracking is based on the GSM/GPRS network, which requires expensive subscriptions. The EU FP7 project CEWITT aims at developing a credit card sized autonomous wireless tag with GNSS geo-positioning capabilities to ensure the integrity and cost effectiveness for parking applications. It was found in previous research that solar cells are the most suitable energy sources for this application. This study focused on the power electronics design for the wireless tag. A suitable solar cell was chosen for its high power density. Charging circuit, hysteresis control circuit and LDO were designed and integrated to meet the system requirement. Test results showed that charging efficiency of 80 % had been achieved.

An open-source laser electronics suite

NASA Astrophysics Data System (ADS)

Pisenti, Neal C.; Reschovsky, Benjamin J.; Barker, Daniel S.; Restelli, Alessandro; Campbell, Gretchen K.

2016-05-01

We present an integrated set of open-source electronics for controlling external-cavity diode lasers and other instruments in the laboratory. The complete package includes a low-noise circuit for driving high-voltage piezoelectric actuators, an ultra-stable current controller based on the design of, and a high-performance, multi-channel temperature controller capable of driving thermo-electric coolers or resistive heaters. Each circuit (with the exception of the temperature controller) is designed to fit in a Eurocard rack equipped with a low-noise linear power supply capable of driving up to 5 A at +/- 15 V. A custom backplane allows signals to be shared between modules, and a digital communication bus makes the entire rack addressable by external control software over TCP/IP. The modular architecture makes it easy for additional circuits to be designed and integrated with existing electronics, providing a low-cost, customizable alternative to commercial systems without sacrificing performance.

A Close Loop Low-Power and High Speed 130 nm CMOS Sample and Hold Circuit Based on Switched Capacitor for ADC Module

NASA Astrophysics Data System (ADS)

Nasir, Z.; Ruslan, S. H.

2017-08-01

A sample and hold (S/H) block is typically used as an analogue to digital interface in the analogue to digital converter (ADC) system. Since ADC is widely used in processing signals, the power consumption of the ADC must be lowered to conserve energy. Therefore the S/H circuit must be of a low powered too. Sampling phase and hold phase are the two phases of the operation cycle of the S/H circuit. Switched capacitor (SC) techniques have been developed in order to allow the integration on a single silicon chip of both digital and analogue functions. By controlling switches around the SC, the SC circuit works by passing charge into and out of a capacitor. SC circuits are suitable for on chip implementations because they replace a resistor with switches and capacitors. In this research, a closed-loop sample and hold circuit based on SC is designed and simulated with Cadence EDA tools. The schematic, layout, and simulation of the circuit is done using generic Silterra 130 nm technology file. All the analysis is done using Virtuoso Analog Design Environment. Layout and schematic are drawn using Virtuoso Schematic Editor and Virtuoso Layout Editor, Calibre is used for post layout simulation. The closed loop S/H circuit based on SC is successfully designed and able to sample and hold the analogue input waveform. The power consumption of the circuit is 0.919 mW and the propagation delay is 64.96 ps.

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit

PubMed Central

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed

2017-01-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for −4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz. PMID:28763043

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit.

PubMed

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed; Kanaya, Haruichi

2017-08-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for -4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

Micromachined integrated quantum circuit containing a superconducting qubit

NASA Astrophysics Data System (ADS)

Brecht, Teresa; Chu, Yiwen; Axline, Christopher; Pfaff, Wolfgang; Blumoff, Jacob; Chou, Kevin; Krayzman, Lev; Frunzio, Luigi; Schoelkopf, Robert

We demonstrate a functional multilayer microwave integrated quantum circuit (MMIQC). This novel hardware architecture combines the high coherence and isolation of three-dimensional structures with the advantages of integrated circuits made with lithographic techniques. We present fabrication and measurement of a two-cavity/one-qubit prototype, including a transmon coupled to a three-dimensional microwave cavity micromachined in a silicon wafer. It comprises a simple MMIQC with competitive lifetimes and the ability to perform circuit QED operations in the strong dispersive regime. Furthermore, the design and fabrication techniques that we have developed are extensible to more complex quantum information processing devices.

Power system with an integrated lubrication circuit

DOEpatents

Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

2009-11-10

A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

A memristor-based nonvolatile latch circuit

NASA Astrophysics Data System (ADS)

Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-06-01

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Low-power integrated-circuit driver for ferrite-memory word lines

NASA Technical Reports Server (NTRS)

Katz, S.

1970-01-01

Composite circuit uses both n-p-n bipolar and p-channel MOS transistors /BIMOS/. The BIMOS driver provides 1/ ease of integrated circuit construction, 2/ low standby power consumption, 3/ bidirectional current pulses, and 4/ current-pulse amplitudes and rise times independent of active device parameters.

Aluminum heat sink enables power transistors to be mounted integrally with printed circuit board

NASA Technical Reports Server (NTRS)

Seaward, R. C.

1967-01-01

Power transistor is provided with an integral flat plate aluminum heat sink which mounts directly on a printed circuit board containing associated circuitry. Standoff spacers are used to attach the heat sink to the printed circuit board containing the remainder of the circuitry.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

Multi-lead heat sink

DOEpatents

Roose, L.D.

1984-07-03

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again. 4 figs.

Multi-lead heat sink

DOEpatents

Roose, Lars D.

1984-01-01

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

Multi-lead heat sink

DOEpatents

Roose, L.D.

1982-08-25

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

InP-based photonic integrated circuit platform on SiC wafer.

PubMed

Takenaka, Mitsuru; Takagi, Shinichi

2017-11-27

We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

Microfabricated ion trap array

DOEpatents

Blain, Matthew G [Albuquerque, NM; Fleming, James G [Albuquerque, NM

2006-12-26

A microfabricated ion trap array, comprising a plurality of ion traps having an inner radius of order one micron, can be fabricated using surface micromachining techniques and materials known to the integrated circuits manufacturing and microelectromechanical systems industries. Micromachining methods enable batch fabrication, reduced manufacturing costs, dimensional and positional precision, and monolithic integration of massive arrays of ion traps with microscale ion generation and detection devices. Massive arraying enables the microscale ion traps to retain the resolution, sensitivity, and mass range advantages necessary for high chemical selectivity. The reduced electrode voltage enables integration of the microfabricated ion trap array with on-chip circuit-based rf operation and detection electronics (i.e., cell phone electronics). Therefore, the full performance advantages of the microfabricated ion trap array can be realized in truly field portable, handheld microanalysis systems.

Identifying behavioral circuits in Drosophila melanogaster: moving targets in a flying insect.

PubMed

Griffith, Leslie C

2012-08-01

Drosophila melanogaster has historically been the premier model system for understanding the molecular and genetic bases of complex behaviors. In the last decade technical advances, in the form of new genetic tools and electrophysiological and optical methods, have allowed investigators to begin to dissect the neuronal circuits that generate behavior in the adult. The blossoming of circuit analysis in this organism has also reinforced our appreciation of the inadequacy of wiring diagrams for specifying complex behavior. Neuromodulation and neuronal plasticity act to reconfigure circuits on both short and long time scales. These processes act on the connectome, providing context by integrating external and internal cues that are relevant for behavioral choices. New approaches in the fly are providing insight into these basic principles of circuit function. Copyright © 2012 Elsevier Ltd. All rights reserved.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Oler, Kiri J.; Miller, Carl H.

In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

Reconfigurable Cellular Photonic Crystal Arrays (RCPA)

DTIC Science & Technology

2013-03-01

signal processing based on reconfigurable integrated optics devices. This technology has the potential to revolutionize the design circle of optical...Accomplishments III.A. Design and fabrication of an accumulation-mode modulator Figure 1(a) shows the schematic of a compact resonator on the double-Si... integration of silicon nitride on silicon-on-insulator platform to enhance the arsenal of photonic circuit designers . The coherent integration of

A Physics-Based Engineering Methodology for Calculating Soft Error Rates of Bulk CMOS and SiGe Heterojunction Bipolar Transistor Integrated Circuits

NASA Astrophysics Data System (ADS)

Fulkerson, David E.

2010-02-01

This paper describes a new methodology for characterizing the electrical behavior and soft error rate (SER) of CMOS and SiGe HBT integrated circuits that are struck by ions. A typical engineering design problem is to calculate the SER of a critical path that commonly includes several circuits such as an input buffer, several logic gates, logic storage, clock tree circuitry, and an output buffer. Using multiple 3D TCAD simulations to solve this problem is too costly and time-consuming for general engineering use. The new and simple methodology handles the problem with ease by simple SPICE simulations. The methodology accurately predicts the measured threshold linear energy transfer (LET) of a bulk CMOS SRAM. It solves for circuit currents and voltage spikes that are close to those predicted by expensive 3D TCAD simulations. It accurately predicts the measured event cross-section vs. LET curve of an experimental SiGe HBT flip-flop. The experimental cross section vs. frequency behavior and other subtle effects are also accurately predicted.

Testbed Experiment for SPIDER: A Photonic Integrated Circuit-based Interferometric imaging system

NASA Astrophysics Data System (ADS)

Badham, K.; Duncan, A.; Kendrick, R. L.; Wuchenich, D.; Ogden, C.; Chriqui, G.; Thurman, S. T.; Su, T.; Lai, W.; Chun, J.; Li, S.; Liu, G.; Yoo, S. J. B.

The Lockheed Martin Advanced Technology Center (LM ATC) and the University of California at Davis (UC Davis) are developing an electro-optical (EO) imaging sensor called SPIDER (Segmented Planar Imaging Detector for Electro-optical Reconnaissance) that seeks to provide a 10x to 100x size, weight, and power (SWaP) reduction alternative to the traditional bulky optical telescope and focal-plane detector array. The substantial reductions in SWaP would reduce cost and/or provide higher resolution by enabling a larger-aperture imager in a constrained volume. Our SPIDER imager replaces the traditional optical telescope and digital focal plane detector array with a densely packed interferometer array based on emerging photonic integrated circuit (PIC) technologies that samples the object being imaged in the Fourier domain (i.e., spatial frequency domain), and then reconstructs an image. Our approach replaces the large optics and structures required by a conventional telescope with PICs that are accommodated by standard lithographic fabrication techniques (e.g., complementary metal-oxide-semiconductor (CMOS) fabrication). The standard EO payload integration and test process that involves precision alignment and test of optical components to form a diffraction limited telescope is, therefore, replaced by in-process integration and test as part of the PIC fabrication, which substantially reduces associated schedule and cost. In this paper we describe the photonic integrated circuit design and the testbed used to create the first images of extended scenes. We summarize the image reconstruction steps and present the final images. We also describe our next generation PIC design for a larger (16x area, 4x field of view) image.

Highly efficient on-chip direct electronic-plasmonic transducers

NASA Astrophysics Data System (ADS)

Du, Wei; Wang, Tao; Chu, Hong-Son; Nijhuis, Christian A.

2017-10-01

Photonic elements can carry information with a capacity exceeding 1,000 times that of electronic components, but, due to the optical diffraction limit, these elements are large and difficult to integrate with modern-day nanoelectronics or upcoming packages, such as three-dimensional integrated circuits or stacked high-bandwidth memories1-3. Surface plasmon polaritons can be confined to subwavelength dimensions and can carry information at high speeds (>100 THz)4-6. To combine the small dimensions of nanoelectronics with the fast operating speed of optics via plasmonics, on-chip electronic-plasmonic transducers that directly convert electrical signals into plasmonic signals (and vice versa) are required. Here, we report electronic-plasmonic transducers based on metal-insulator-metal tunnel junctions coupled to plasmonic waveguides with high-efficiency on-chip generation, manipulation and readout of plasmons. These junctions can be readily integrated into existing technologies, and we thus believe that they are promising for applications in on-chip integrated plasmonic circuits.

System-Level Integrated Circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

System-level integrated circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

Free-world microelectronic manufacturing equipment

NASA Astrophysics Data System (ADS)

Kilby, J. S.; Arnold, W. H.; Booth, W. T.; Cunningham, J. A.; Hutcheson, J. D.; Owen, R. W.; Runyan, W. R.; McKenney, Barbara L.; McGrain, Moira; Taub, Renee G.

1988-12-01

Equipment is examined and evaluated for the manufacture of microelectronic integrated circuit devices and sources for that equipment within the Free World. Equipment suitable for the following are examined: single-crystal silicon slice manufacturing and processing; required lithographic processes; wafer processing; device packaging; and test of digital integrated circuits. Availability of the equipment is also discussed, now and in the near future. Very adequate equipment for most stages of the integrated circuit manufacturing process is available from several sources, in different countries, although the best and most widely used versions of most manufacturing equipment are made in the United States or Japan. There is also an active market in used equipment, suitable for manufacture of capable integrated circuits with performance somewhat short of the present state of the art.

Silicon-based silicon–germanium–tin heterostructure photonics

PubMed Central

Soref, Richard

2014-01-01

The wavelength range that extends from 1550 to 5000 nm is a new regime of operation for Si-based photonic and opto-electronic integrated circuits. To actualize the new chips, heterostructure active devices employing the ternary SiGeSn alloy are proposed in this paper. Foundry-based monolithic integration is described. Opportunities and challenges abound in creating laser diodes, optical amplifiers, light-emitting diodes, photodetectors, modulators, switches and a host of high-performance passive infrared waveguided components. PMID:24567479

Hybrid stretchable circuits on silicone substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk; Liu, Q.

When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

An Electronics Course Emphasizing Circuit Design

ERIC Educational Resources Information Center

Bergeson, Haven E.

1975-01-01

Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

An energy-efficient readout circuit for resonant sensors based on ring-down measurement

NASA Astrophysics Data System (ADS)

Zeng, Z.; Pertijs, M. A. P.; Karabacak, D. M.

2013-02-01

This paper presents an energy-efficient readout circuit for resonant sensors that operates based on a transient measurement method. The resonant sensor is driven at a frequency close to its resonance frequency by an excitation source that can be intermittently disconnected, causing the sensor to oscillate at its resonance frequency with exponentially decaying amplitude. By counting the zero crossings of this ring-down response, the interface circuit can detect the resonance frequency. In contrast with oscillator-based readout, the presented readout circuit is readily able to detect quality factor (Q) of the resonator from the envelope of the ring-down response, and can be used even in the presence of large parasitic capacitors. A prototype of the readout circuit has been integrated in 0.35 μm CMOS technology, and consumes only 36 μA from a 3.3 V supply during a measurement time of 2 ms. The resonance frequency and quality factor of a micro-machined SiN resonator obtained using this prototype are in good agreement with results obtained using impedance analysis. Furthermore, a clear transient response is observed to ethanol flow using the presented readout, demonstrating the use of this technique in sensing applications.

Analog Integrated Circuit Design for Spike Time Dependent Encoder and Reservoir in Reservoir Computing Processors

DTIC Science & Technology

2018-01-01

14. ABSTRACT The objective of this effort was to: (a) develop novel and fundamental methodologies for data representation using hardware-based spike...Distribution Unlimited. 1 1.0 SUMMARY This effort is a critical part of an overall program to develop novel and fundamental methodologies for data...to fabrication a dynamic-reservoir circuit that utilizes sensory encoding methodologies similar to those employed in biological brains. Inspired

Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

NASA Astrophysics Data System (ADS)

Heck, Martijn J. R.

2017-01-01

Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Integrated-Circuit Pseudorandom-Number Generator

NASA Technical Reports Server (NTRS)

Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

1992-01-01

Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

Long life assurance study for manned spacecraft long life hardware. Volume 2: Long life assurance studies of EEE parts and packaging

NASA Technical Reports Server (NTRS)

1972-01-01

Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.

Asymmetric Memory Circuit Would Resist Soft Errors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Perlman, Marvin

1990-01-01

Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities.

Radiation damage in MOS integrated circuits, Part 1

NASA Technical Reports Server (NTRS)

Danchenko, V.

1971-01-01

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

Magnetic-free non-reciprocity based on staggered commutation

PubMed Central

Reiskarimian, Negar; Krishnaswamy, Harish

2016-01-01

Lorentz reciprocity is a fundamental characteristic of the vast majority of electronic and photonic structures. However, non-reciprocal components such as isolators, circulators and gyrators enable new applications ranging from radio frequencies to optical frequencies, including full-duplex wireless communication and on-chip all-optical information processing. Such components today dominantly rely on the phenomenon of Faraday rotation in magneto-optic materials. However, they are typically bulky, expensive and not suitable for insertion in a conventional integrated circuit. Here we demonstrate magnetic-free linear passive non-reciprocity based on the concept of staggered commutation. Commutation is a form of parametric modulation with very high modulation ratio. We observe that staggered commutation enables time-reversal symmetry breaking within very small dimensions (λ/1,250 × λ/1,250 in our device), resulting in a miniature radio-frequency circulator that exhibits reduced implementation complexity, very low loss, strong non-reciprocity, significantly enhanced linearity and real-time reconfigurability, and is integrated in a conventional complementary metal–oxide–semiconductor integrated circuit for the first time. PMID:27079524

Design of integrated laser initiator

NASA Astrophysics Data System (ADS)

Cao, Chunqiang; He, Aifeng; Jing, Bo; Ma, Yue

2018-03-01

This paper analyzes the design principle of integrated laser detonator, introduces the design method of integrated laser Detonators. Based on the integrated laser detonator, structure, laser energy -exchange device, circuit design and the energetic material properties and the charge parameters, developed a high level of integration Antistatic ability Small size of the integrated laser prototype Detonator. The laser detonator prototype antistatic ability of 25 kV. The research of this paper can solve the key design of laser detonator miniaturization and integration of weapons and equipment, satisfy the electromagnetic safety and micro weapons development of explosive demand.

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

Heterogeneous Silicon III-V Mode-Locked Lasers

NASA Astrophysics Data System (ADS)

Davenport, Michael Loehrlein

Mode-locked lasers are useful for a variety of applications, such as sensing, telecommunication, and surgical instruments. This work focuses on integrated-circuit mode-locked lasers: those that combine multiple optical and electronic functions and are manufactured together on a single chip. While this allows production at high volume and lower cost, the true potential of integration is to open applications for mode-locked laser diodes where solid state lasers cannot fit, either due to size and power consumption constraints, or where small optical or electrical paths are needed for high bandwidth. Unfortunately, most high power and highly stable mode-locked laser diode demonstrations in scientific literature are based on the Fabry-Perot resonator design, with cleaved mirrors, and are unsuitable for use in integrated circuits because of the difficulty of producing integrated Fabry-Perot cavities. We use silicon photonics and heterogeneous integration with III-V gain material to produce the most powerful and lowest noise fully integrated mode-locked laser diode in the 20 GHz frequency range. If low noise and high peak power are required, it is arguably the best performing fully integrated mode-locked laser ever demonstrated. We present the design methodology and experimental pathway to realize a fully integrated mode-locked laser diode. The construction of the device, beginning with the selection of an integration platform, and proceeding through the fabrication process to final optimization, is presented in detail. The dependence of mode-locked laser performance on a wide variety of design parameters is presented. Applications for integrated circuit mode-locked lasers are also discussed, as well as proposed methods for using integration to improve mode-locking performance to beyond the current state of the art.

Electronic Switch Arrays for Managing Microbattery Arrays

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Alahmad, Mahmoud; Sukumar, Vinesh; Zghoul, Fadi; Buck, Kevin; Hess, Herbert; Li, Harry; Cox, David

2008-01-01

Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.

Column-parallel correlated multiple sampling circuits for CMOS image sensors and their noise reduction effects.

PubMed

Suh, Sungho; Itoh, Shinya; Aoyama, Satoshi; Kawahito, Shoji

2010-01-01

For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and their noise reduction effects. In the CMS, the gain of the noise cancelling is controlled by the number of samplings. It has a similar effect to that of an amplified CDS for the thermal noise but is a little more effective for 1/f and RTS noises. Two types of the CMS with simple integration and folding integration are proposed. In the folding integration, the output signal swing is suppressed by a negative feedback using a comparator and one-bit D-to-A converter. The CMS circuit using the folding integration technique allows to realize a very low-noise level while maintaining a wide dynamic range. The noise reduction effects of their circuits have been investigated with a noise analysis and an implementation of a 1Mpixel pinned photodiode CMOS image sensor. Using 16 samplings, dynamic range of 59.4 dB and noise level of 1.9 e(-) for the simple integration CMS and 75 dB and 2.2 e(-) for the folding integration CMS, respectively, are obtained.

Respiration detection chip with integrated temperature-insensitive MEMS sensors and CMOS signal processing circuits.

PubMed

Wei, Chia-Ling; Lin, Yu-Chen; Chen, Tse-An; Lin, Ren-Yi; Liu, Tin-Hao

2015-02-01

An airflow sensing chip, which integrates MEMS sensors with their CMOS signal processing circuits into a single chip, is proposed for respiration detection. Three micro-cantilever-based airflow sensors were designed and fabricated using a 0.35 μm CMOS/MEMS 2P4M mixed-signal polycide process. Two main differences were present among these three designs: they were either metal-covered or metal-free structures, and had either bridge-type or fixed-type reference resistors. The performances of these sensors were measured and compared, including temperature sensitivity and airflow sensitivity. Based on the measured results, the metal-free structure with fixed-type reference resistors is recommended for use, because it has the highest airflow sensitivity and also can effectively reduce the output voltage drift caused by temperature change.

A High-Voltage Integrated Circuit Engine for a Dielectrophoresis-based Programmable Micro-Fluidic Processor

PubMed Central

Current, K. Wayne; Yuk, Kelvin; McConaghy, Charles; Gascoyne, Peter R. C.; Schwartz, Jon A.; Vykoukal, Jody V.; Andrews, Craig

2010-01-01

A high-voltage (HV) integrated circuit has been demonstrated to transport droplets on programmable paths across its coated surface. This chip is the engine for a dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip system. This chip creates DEP forces that move and help inject droplets. Electrode excitation voltage and frequency are variable. With the electrodes driven with a 100V peak-to-peak periodic waveform, the maximum high-voltage electrode waveform frequency is about 200Hz. Data communication rate is variable up to 250kHz. This demonstration chip has a 32×32 array of nominally 100V electrode drivers. It is fabricated in a 130V SOI CMOS fabrication technology, dissipates a maximum of 1.87W, and is about 10.4 mm × 8.2 mm. PMID:23989241

Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

NASA Astrophysics Data System (ADS)

Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

2017-04-01

A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

Pneumatic oscillator circuits for timing and control of integrated microfluidics.

PubMed

Duncan, Philip N; Nguyen, Transon V; Hui, Elliot E

2013-11-05

Frequency references are fundamental to most digital systems, providing the basis for process synchronization, timing of outputs, and waveform synthesis. Recently, there has been growing interest in digital logic systems that are constructed out of microfluidics rather than electronics, as a possible means toward fully integrated laboratory-on-a-chip systems that do not require any external control apparatus. However, the full realization of this goal has not been possible due to the lack of on-chip frequency references, thus requiring timing signals to be provided from off-chip. Although microfluidic oscillators have been demonstrated, there have been no reported efforts to characterize, model, or optimize timing accuracy, which is the fundamental metric of a clock. Here, we report pneumatic ring oscillator circuits built from microfluidic valves and channels. Further, we present a compressible-flow analysis that differs fundamentally from conventional circuit theory, and we show the utility of this physically based model for the optimization of oscillator stability. Finally, we leverage microfluidic clocks to demonstrate circuits for the generation of phase-shifted waveforms, self-driving peristaltic pumps, and frequency division. Thus, pneumatic oscillators can serve as on-chip frequency references for microfluidic digital logic circuits. On-chip clocks and pumps both constitute critical building blocks on the path toward achieving autonomous laboratory-on-a-chip devices.

On-chip passive three-port circuit of all-optical ordered-route transmission.

PubMed

Liu, Li; Dong, Jianji; Gao, Dingshan; Zheng, Aoling; Zhang, Xinliang

2015-05-13

On-chip photonic circuits of different specific functions are highly desirable and becoming significant demands in all-optical communication network. Especially, the function to control the transmission directions of the optical signals in integrated circuits is a fundamental research. Previous schemes, such as on-chip optical circulators, are mostly realized by Faraday effect which suffers from material incompatibilities between semiconductors and magneto-optical materials. Achieving highly functional circuits in which light circulates in a particular direction with satisfied performances are still difficult in pure silicon photonics platform. Here, we propose and experimentally demonstrate a three-port passive device supporting optical ordered-route transmission based on silicon thermo-optic effect for the first time. By injecting strong power from only one port, the light could transmit through the three ports in a strict order (1→2, 2→3, 3→1) while be blocked in the opposite order (1→3, 3→2, 2→1). The blocking extinction ratios and operation bandwidths have been investigated in this paper. Moreover, with compact size, economic fabrication process and great extensibility, this proposed photonic integrated circuit is competitive to be applied in on-chip all-optical information processing systems, such as path priority selector.

On-chip passive three-port circuit of all-optical ordered-route transmission

PubMed Central

Liu, Li; Dong, Jianji; Gao, Dingshan; Zheng, Aoling; Zhang, Xinliang

2015-01-01

On-chip photonic circuits of different specific functions are highly desirable and becoming significant demands in all-optical communication network. Especially, the function to control the transmission directions of the optical signals in integrated circuits is a fundamental research. Previous schemes, such as on-chip optical circulators, are mostly realized by Faraday effect which suffers from material incompatibilities between semiconductors and magneto-optical materials. Achieving highly functional circuits in which light circulates in a particular direction with satisfied performances are still difficult in pure silicon photonics platform. Here, we propose and experimentally demonstrate a three-port passive device supporting optical ordered-route transmission based on silicon thermo-optic effect for the first time. By injecting strong power from only one port, the light could transmit through the three ports in a strict order (1→2, 2→3, 3→1) while be blocked in the opposite order (1→3, 3→2, 2→1). The blocking extinction ratios and operation bandwidths have been investigated in this paper. Moreover, with compact size, economic fabrication process and great extensibility, this proposed photonic integrated circuit is competitive to be applied in on-chip all-optical information processing systems, such as path priority selector. PMID:25970855

Hybrid integrated biological-solid-state system powered with adenosine triphosphate.

PubMed

Roseman, Jared M; Lin, Jianxun; Ramakrishnan, Siddharth; Rosenstein, Jacob K; Shepard, Kenneth L

2015-12-07

There is enormous potential in combining the capabilities of the biological and the solid state to create hybrid engineered systems. While there have been recent efforts to harness power from naturally occurring potentials in living systems in plants and animals to power complementary metal-oxide-semiconductor integrated circuits, here we report the first successful effort to isolate the energetics of an electrogenic ion pump in an engineered in vitro environment to power such an artificial system. An integrated circuit is powered by adenosine triphosphate through the action of Na(+)/K(+) adenosine triphosphatases in an integrated in vitro lipid bilayer membrane. The ion pumps (active in the membrane at numbers exceeding 2 × 10(6) mm(-2)) are able to sustain a short-circuit current of 32.6 pA mm(-2) and an open-circuit voltage of 78 mV, providing for a maximum power transfer of 1.27 pW mm(-2) from a single bilayer. Two series-stacked bilayers provide a voltage sufficient to operate an integrated circuit with a conversion efficiency of chemical to electrical energy of 14.9%.

Applications of SPICE for modeling miniaturized biomedical sensor systems

NASA Technical Reports Server (NTRS)

Mundt, C. W.; Nagle, H. T.

2000-01-01

This paper proposes a model for a miniaturized signal conditioning system for biopotential and ion-selective electrode arrays. The system consists of three main components: sensors, interconnections, and signal conditioning chip. The model for this system is based on SPICE. Transmission-line based equivalent circuits are used to represent the sensors, lumped resistance-capacitance circuits describe the interconnections, and a model for the signal conditioning chip is extracted from its layout. A system for measurements of biopotentials and ionic activities can be miniaturized and optimized for cardiovascular applications based on the development of an integrated SPICE system model of its electrochemical, interconnection, and electronic components.

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, A.D.; Haigh, R.E.; Hugenberg, K.F.

1995-09-26

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place. 7 figs.

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, Alan D.; Haigh, Ronald E.; Hugenberg, Keith F.

1995-01-01

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, X.

1996-12-17

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window. 5 figs.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, Xucheng

1996-01-01

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window.

Enhacement of intrafield overlay using a design based metrology system

NASA Astrophysics Data System (ADS)

Jo, Gyoyeon; Ji, Sunkeun; Kim, Shinyoung; Kang, Hyunwoo; Park, Minwoo; Kim, Sangwoo; Kim, Jungchan; Park, Chanha; Yang, Hyunjo; Maruyama, Kotaro; Park, Byungjun

2016-03-01

As the scales of the semiconductor devices continue to shrink, accurate measurement and control of the overlay have been emphasized for securing more overlay margin. Conventional overlay analysis methods are based on the optical measurement of the overlay mark. However, the overlay data obtained from these optical methods cannot represent the exact misregistration between two layers at the circuit level. The overlay mismatch may arise from the size or pitch difference between the overlay mark and the real pattern. Pattern distortion, caused by CMP or etching, could be a source of the overlay mismatch as well. Another issue is the overlay variation in the real circuit pattern which varies depending on its location. The optical overlay measurement methods, such as IBO and DBO that use overlay mark on the scribeline, are not capable of defining the exact overlay values of the real circuit. Therefore, the overlay values of the real circuit need to be extracted to integrate the semiconductor device properly. The circuit level overlay measurement using CDSEM is time-consuming in extracting enough data to indicate overall trend of the chip. However DBM tool is able to derive sufficient data to display overlay tendency of the real circuit region with high repeatability. An E-beam based DBM(Design Based Metrology) tool can be an alternative overlay measurement method. In this paper, we are going to certify that the overlay values extracted from optical measurement cannot represent the circuit level overlay values. We will also demonstrate the possibility to correct misregistration between two layers using the overlay data obtained from the DBM system.

Disposable photonic integrated circuits for evanescent wave sensors by ultra-high volume roll-to-roll method.

PubMed

Aikio, Sanna; Hiltunen, Jussi; Hiitola-Keinänen, Johanna; Hiltunen, Marianne; Kontturi, Ville; Siitonen, Samuli; Puustinen, Jarkko; Karioja, Pentti

2016-02-08

Flexible photonic integrated circuit technology is an emerging field expanding the usage possibilities of photonics, particularly in sensor applications, by enabling the realization of conformable devices and introduction of new alternative production methods. Here, we demonstrate that disposable polymeric photonic integrated circuit devices can be produced in lengths of hundreds of meters by ultra-high volume roll-to-roll methods on a flexible carrier. Attenuation properties of hundreds of individual devices were measured confirming that waveguides with good and repeatable performance were fabricated. We also demonstrate the applicability of the devices for the evanescent wave sensing of ambient refractive index. The production of integrated photonic devices using ultra-high volume fabrication, in a similar manner as paper is produced, may inherently expand methods of manufacturing low-cost disposable photonic integrated circuits for a wide range of sensor applications.

Lead sulfide - Silicon MOSFET infrared focal plane development

NASA Technical Reports Server (NTRS)

Barrett, J. R.; Jhabvala, M. D.

1983-01-01

A process for directly integrating photoconductive lead sulfide (PbS) infrared detector material with silicon MOS integrated circuits has been developed primarily for application in long (greater than 10,000 detector elements) linear arrays for pushbroom scanning applications. The processing technology is based on the conventional PMOS and CMOS technologies with a variation in the metallization. Results and measurements on a fully integrated eight-element multiplexer are shown.

Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

PubMed

Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

2014-09-01

The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Beheim, Glenn M.; Okojie, Robert S.; Chang, Carl W.; Meredith, Roger D.; Ferrier, Terry L.; Evans, Laura J.; Krasowski, Michael J.;

Note: A 102 dB dynamic-range charge-sampling readout for ionizing particle/radiation detectors based on an application-specific integrated circuit (ASIC)

NASA Astrophysics Data System (ADS)

Pullia, A.; Zocca, F.; Capra, S.

2018-02-01

An original technique for the measurement of charge signals from ionizing particle/radiation detectors has been implemented in an application-specific integrated circuit form. The device performs linear measurements of the charge both within and beyond its output voltage swing. The device features an unprecedented spectroscopic dynamic range of 102 dB and is suitable for high-resolution ion and X-γ ray spectroscopy. We believe that this approach may change a widespread paradigm according to which no high-resolution spectroscopy is possible when working close to or beyond the limit of the preamplifier's output voltage swing.

Note: A 102 dB dynamic-range charge-sampling readout for ionizing particle/radiation detectors based on an application-specific integrated circuit (ASIC).

PubMed

Pullia, A; Zocca, F; Capra, S

2018-02-01

An original technique for the measurement of charge signals from ionizing particle/radiation detectors has been implemented in an application-specific integrated circuit form. The device performs linear measurements of the charge both within and beyond its output voltage swing. The device features an unprecedented spectroscopic dynamic range of 102 dB and is suitable for high-resolution ion and X-γ ray spectroscopy. We believe that this approach may change a widespread paradigm according to which no high-resolution spectroscopy is possible when working close to or beyond the limit of the preamplifier's output voltage swing.

Neuronal Circuitry Mechanisms Regulating Adult Mammalian Neurogenesis

PubMed Central

Song, Juan; Olsen, Reid H.J.; Sun, Jiaqi; Ming, Guo-li; Song, Hongjun

2017-01-01

The adult mammalian brain is a dynamic structure, capable of remodeling in response to various physiological and pathological stimuli. One dramatic example of brain plasticity is the birth and subsequent integration of newborn neurons into the existing circuitry. This process, termed adult neurogenesis, recapitulates neural developmental events in two specialized adult brain regions: the lateral ventricles of the forebrain. Recent studies have begun to delineate how the existing neuronal circuits influence the dynamic process of adult neurogenesis, from activation of quiescent neural stem cells (NSCs) to the integration and survival of newborn neurons. Here, we review recent progress toward understanding the circuit-based regulation of adult neurogenesis in the hippocampus and olfactory bulb. PMID:27143698

MIMIC For Millimeter Wave Integrated Circuit Radars

NASA Astrophysics Data System (ADS)

Seashore, C. R.

1987-09-01

A significant program is currently underway in the U.S. to investigate, develop and produce a variety of GaAs analog circuits for use in microwave and millimeter wave sensors and systems. This represents a "new wave" of RF technology which promises to significantly change system engineering thinking relative to RF Architectures. At millimeter wave frequencies, we look forward to a relatively high level of critical component integration based on MESFET and HEMT device implementations. These designs will spawn more compact RF front ends with colocated antenna/transceiver functions and innovative packaging concepts which will survive and function in a typical military operational environment which includes challenging temperature, shock and special handling requirements.

Photonic integrated circuits unveil crisis-induced intermittency.

PubMed

Karsaklian Dal Bosco, Andreas; Akizawa, Yasuhiro; Kanno, Kazutaka; Uchida, Atsushi; Harayama, Takahisa; Yoshimura, Kazuyuki

2016-09-19

We experimentally investigate an intermittent route to chaos in a photonic integrated circuit consisting of a semiconductor laser with time-delayed optical feedback from a short external cavity. The transition from a period-doubling dynamics to a fully-developed chaos reveals a stage intermittently exhibiting these two dynamics. We unveil the bifurcation mechanism underlying this route to chaos by using the Lang-Kobayashi model and demonstrate that the process is based on a phenomenon of attractor expansion initiated by a particular distribution of the local Lyapunov exponents. We emphasize on the crucial importance of the distribution of the steady-state solutions introduced by the time-delayed feedback on the existence of this intermittent dynamics.

Monolithic microwave integrated circuit devices for active array antennas

NASA Technical Reports Server (NTRS)

Mittra, R.

1984-01-01

Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

A molybdenum disulfide/carbon nanotube heterogeneous complementary inverter.

PubMed

Huang, Jun; Somu, Sivasubramanian; Busnaina, Ahmed

2012-08-24

We report a simple, bottom-up/top-down approach for integrating drastically different nanoscale building blocks to form a heterogeneous complementary inverter circuit based on layered molybdenum disulfide and carbon nanotube (CNT) bundles. The fabricated CNT/MoS(2) inverter is composed of n-type molybdenum disulfide (MOS(2)) and p-type CNT transistors, with a high voltage gain of 1.3. The CNT channels are fabricated using directed assembly while the layered molybdenum disulfide channels are fabricated by mechanical exfoliation. This bottom-up fabrication approach for integrating various nanoscale elements with unique characteristics provides an alternative cost-effective methodology to complementary metal-oxide-semiconductors, laying the foundation for the realization of high performance logic circuits.

Package for integrated optic circuit and method

DOEpatents

Kravitz, Stanley H.; Hadley, G. Ronald; Warren, Mial E.; Carson, Richard F.; Armendariz, Marcelino G.

1998-01-01

A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-29

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-08

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc B.; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Ouellette, Michael R.; Strissel, Scott A.

2007-12-18

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Package for integrated optic circuit and method

DOEpatents

Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

1998-08-04

A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

Associative Pattern Recognition In Analog VLSI Circuits

NASA Technical Reports Server (NTRS)

Tawel, Raoul

1995-01-01

Winner-take-all circuit selects best-match stored pattern. Prototype cascadable very-large-scale integrated (VLSI) circuit chips built and tested to demonstrate concept of electronic associative pattern recognition. Based on low-power, sub-threshold analog complementary oxide/semiconductor (CMOS) VLSI circuitry, each chip can store 128 sets (vectors) of 16 analog values (vector components), vectors representing known patterns as diverse as spectra, histograms, graphs, or brightnesses of pixels in images. Chips exploit parallel nature of vector quantization architecture to implement highly parallel processing in relatively simple computational cells. Through collective action, cells classify input pattern in fraction of microsecond while consuming power of few microwatts.

Postfabrication Phase Error Correction of Silicon Photonic Circuits by Single Femtosecond Laser Pulses

DOE PAGES

Bachman, Daniel; Chen, Zhijiang; Wang, Christopher; ...

2016-11-29

Phase errors caused by fabrication variations in silicon photonic integrated circuits are an important problem, which negatively impacts device yield and performance. This study reports our recent progress in the development of a method for permanent, postfabrication phase error correction of silicon photonic circuits based on femtosecond laser irradiation. Using beam shaping technique, we achieve a 14-fold enhancement in the phase tuning resolution of the method with a Gaussian-shaped beam compared to a top-hat beam. The large improvement in the tuning resolution makes the femtosecond laser method potentially useful for very fine phase trimming of silicon photonic circuits. Finally, wemore » also show that femtosecond laser pulses can directly modify silicon photonic devices through a SiO 2 cladding layer, making it the only permanent post-fabrication method that can tune silicon photonic circuits protected by an oxide cladding.« less

Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

NASA Astrophysics Data System (ADS)

Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

2018-03-01

This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

Exchange circuits for FASTBUS slaves

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bratskii, A.A.; Matseev, M.Y.; Rybakov, V.G.

1985-09-01

This paper describes general-purpose circuits for FASTBUS interfacing of the functional part of a slave device. The circuits contain buffered receivers and transmitters, addressrecognition and data-transfer logic, and the required control/status registers. The described circuits are implemented with series-K500 integrated circuits.

Student use of model-based reasoning when troubleshooting an electronic circuit

NASA Astrophysics Data System (ADS)

Lewandowski, Heather; Stetzer, Mackenzie; van de Bogart, Kevin; Dounas-Frazer, Dimitri

2016-03-01

Troubleshooting systems is an integral part of experimental physics in both research and educational settings. Accordingly, ability to troubleshoot is an important learning goal for undergraduate physics lab courses. We investigate students' model-based reasoning on a troubleshooting task using data collected in think-aloud interviews during which pairs of students from two institutions attempted to diagnose and repair a malfunctioning circuit. Our analysis scheme was informed by the Experimental Modeling Framework, which describes physicists' use of mathematical and conceptual models when reasoning about experimental systems. We show that system and subsystem models were crucial for the evaluation of repairs to the circuit and played an important role in some troubleshooting strategies. Finally, drawing on data from interviews with electronics instructors from a broad range of institution types, we outline recommendations for model-based approaches to teaching and learning troubleshooting skills.

Student use of model-based reasoning when troubleshooting an electric circuit

NASA Astrophysics Data System (ADS)

Dounas-Frazer, Dimitri

2016-05-01

Troubleshooting systems is an integral part of experimental physics in both research and educational settings. Accordingly, ability to troubleshoot is an important learning goal for undergraduate physics lab courses. We investigate students' model-based reasoning on a troubleshooting task using data collected in think-aloud interviews during which pairs of students from two institutions attempted to diagnose and repair a malfunctioning circuit. Our analysis scheme was informed by the Experimental Modeling Framework, which describes physicists' use of mathematical and conceptual models when reasoning about experimental systems. We show that system and subsystem models were crucial for the evaluation of repairs to the circuit and played an important role in some troubleshooting strategies. Finally, drawing on data from interviews with electronics instructors from a broad range of institution types, we outline recommendations for model-based approaches to teaching and learning troubleshooting skills.

Six-beam homodyne laser Doppler vibrometry based on silicon photonics technology.

PubMed

Li, Yanlu; Zhu, Jinghao; Duperron, Matthieu; O'Brien, Peter; Schüler, Ralf; Aasmul, Soren; de Melis, Mirko; Kersemans, Mathias; Baets, Roel

2018-02-05

This paper describes an integrated six-beam homodyne laser Doppler vibrometry (LDV) system based on a silicon-on-insulator (SOI) full platform technology, with on-chip photo-diodes and phase modulators. Electronics and optics are also implemented around the integrated photonic circuit (PIC) to enable a simultaneous six-beam measurement. Measurement of a propagating guided elastic wave in an aluminum plate (speed ≈ 909 m/s @ 61.5 kHz) is demonstrated.

In situ fabricated 3D micro-lenses for photonic integrated circuits.

PubMed

Thomas, R; Li, J; Ladak, Sam; Barrow, D; Smowton, P M

2018-05-14

Aspheric astigmatic polymer micro-lenses were fabricated directly onto photonic integrated circuits using two-photon lithography. We observed a 12.6 dB improvement in the free space coupling efficiency between integrated ridge laser pairs with micro-lenses to those without.

Multipurpose instrumentation cable provides integral thermocouple circuit

NASA Technical Reports Server (NTRS)

Zellner, G.

1967-01-01

Multipurpose cable with an integral thermocouple circuit measures strain, vibration, pressure, throughout a wide temperature range. This cable reduces bulky and complex circuitry by eliminating separate thermocouples for each transducer.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Solitonic guide and multiphoton absorption processes in photopolymerizable materials for optical integrated circuits

NASA Astrophysics Data System (ADS)

Klein, Stephane; Barsella, Alberto; Acker, D.; Sutter, C.; Beyer, N.; Andraud, Chantal; Fort, Alain F.; Dorkenoo, Kokou D.

2004-09-01

Up to now, most of the optical integrated devices are realized on glass or III-V substrates and the waveguides are usually obtained by photolithography techniques. We present here a new approach based on the use of photopolymerizable compounds. The conditions of self-written channel creation by solitonic propagation inside the bulk of these photopolymerizable formulations are analyzed. Both experimental and theoretical results of the various stages of self-written guide propagation are presented. A further step has been achieved by using a two-photon absorption process for the polymerization via a confocal microscopy technique. Combined with the solitonic guide creation, this technique allows to draw 3D optical circuits. Finally, by doping the photopolymerizable mixtures with push-pull chromophores having a controlled orientation, it will be possible to create active optical integrated devices.

A fully integrated, wide-load-range, high-power-conversion-efficiency switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit

NASA Astrophysics Data System (ADS)

Asano, Hiroki; Hirose, Tetsuya; Kojima, Yuta; Kuroki, Nobutaka; Numa, Masahiro

2018-04-01

In this paper, we present a wide-load-range switched-capacitor DC-DC buck converter with an adaptive bias comparator for ultra-low-power power management integrated circuit. The proposed converter is based on a conventional one and modified to operate in a wide load range by developing a load current monitor used in an adaptive bias comparator. Measurement results demonstrated that our proposed converter generates a 1.0 V output voltage from a 3.0 V input voltage at a load of up to 100 µA, which is 20 times higher than that of the conventional one. The power conversion efficiency was higher than 60% in the load range from 0.8 to 100 µA.

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

Investigation for connecting waveguide in off-planar integrated circuits.

PubMed

Lin, Jie; Feng, Zhifang

2017-09-01

The transmission properties of a vertical waveguide connected by different devices in off-planar integrated circuits are designed, investigated, and analyzed in detail by the finite-difference time-domain method. The results show that both guide bandwidth and transmission efficiency can be adjusted effectively by shifting the vertical waveguide continuously. Surprisingly, the wide guide band (0.385[c/a]∼0.407[c/a]) and well transmission (-6  dB) are observed simultaneously in several directions when the vertical waveguide is located at a specific location. The results are very important for all-optical integrated circuits, especially in compact integration.

Non-Contact Circuit for Real-Time Electric and Magnetic Field Measurements

DTIC Science & Technology

2015-10-01

addresses these needs, and additionally has “smart” features that adjust integrated circuits ( ICs ) on the sensor during start-up based upon the...Hall effect sensors, the datasheet information on the MLX91205 gives a dynamic range of 66 to 96 dB for frequencies of 10 Hz and 10 kHz, respectively...Electric Field Sensors. 18 August 2009. 4. Melexis. IMC-Hall Current Sensor, MLX91205 Datasheet . June. 2012 5. Vinci SJ, Hull DM. Electrostatic

Design automation for integrated nonlinear logic circuits (Conference Presentation)

NASA Astrophysics Data System (ADS)

Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

2016-05-01

A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite PCells (modules) which consist of primitive building-block PCells (components). To automatically produce layouts, we built on a construct provided by Luceda called a PlaceAndAutoRoute cell: we create a module component by supplying a list of child cells, and a list of the desired connections between the cells (e.g. the out0 port of a microring is connected to a grating coupler). This functionality allowed us to write algorithms to automatically lay out the components: for instance, by laying out the first component and walking through the list of connections to check to see if the next component is already placed or not. The placement and orientation of the new component is determined by minimizing the length of a connecting waveguide. Our photonic circuits also utilize electrical signals to tune the photonic elements (setting propagation phases or microring resonant frequencies via thermo-optical tuning): the algorithm also routes the contacts for the metal heaters to contact pads at the edge of the circuit being designed where it can be contacted by electrical probes. We are currently validating a test run fabricated over the summer, and will use detailed characterization results to prepare our final design cycle in which we aim to demonstrate complex operational logic circuits containing ~50-100 nonlinear resonators.

Design of the small pixel pitch ROIC

NASA Astrophysics Data System (ADS)

Liang, Qinghua; Jiang, Dazhao; Chen, Honglei; Zhai, Yongcheng; Gao, Lei; Ding, Ruijun

2014-11-01

Since the technology trend of the third generation IRFPA towards resolution enhancing has steadily progressed,the pixel pitch of IRFPA has been greatly reduced.A 640×512 readout integrated circuit(ROIC) of IRFPA with 15μm pixel pitch is presented in this paper.The 15μm pixel pitch ROIC design will face many challenges.As we all known,the integrating capacitor is a key performance parameter when considering pixel area,charge capacity and dynamic range,so we adopt the effective method of 2 by 2 pixels sharing an integrating capacitor to solve this problem.The input unit cell architecture will contain two paralleled sample and hold parts,which not only allow the FPA to be operated in full frame snapshot mode but also save relatively unit circuit area.Different applications need more matching input unit circuits. Because the dimension of 2×2 pixels is 30μm×30μm, an input stage based on direct injection (DI) which has medium injection ratio and small layout area is proved to be suitable for middle wave (MW) while BDI with three-transistor cascode amplifier for long wave(LW). By adopting the 0.35μm 2P4M mixed signal process, the circuit architecture can make the effective charge capacity of 7.8Me- per pixel with 2.2V output range for MW and 7.3 Me- per pixel with 2.6V output range for LW. According to the simulation results, this circuit works well under 5V power supply and achieves less than 0.1% nonlinearity.

Inverter circuits on freestanding flexible substrate using ZnO nanoparticles for cost-efficient electronics

NASA Astrophysics Data System (ADS)

Vidor, Fábio F.; Meyers, Thorsten; Müller, Kathrin; Wirth, Gilson I.; Hilleringmann, Ulrich

2017-11-01

Driven by the Internet of Things (IoT), flexible and transparent smart systems have been intensively researched by the scientific community and by several companies. This technology is already available for consumers in a wide range of innovative products, e.g., flexible displays, radio-frequency identification tags and wearable electronic skins which, for instance, collect and analyze data for medical applications. For these systems, thin-film transistors (TFTs) are the key elements responsible for the driving currents. Solution-based materials such as nanoparticle dispersions avail the fabrication on large-area substrates with high throughput processes. In this study, we discuss the integration of ZnO nanoparticle thin-film transistors and inverter circuits on freestanding polymeric substrates enclosing the main issues concerning the transfer of the integration process from a rigid substrate to a flexible one. The TFTs depict VON between -0.2 and 1 V, ION/IOFF > 104 and field-effect mobility >0.5 cm2 V-1 s-1. Additionally, in order to enhance the transistors and inverters performance, an adaptation on the device configuration, from an inverted coplanar to an inverted staggered setup, was conducted and analyzed. By employing the inverted staggered setup a considerable increase in the contact quality between the semiconductor and the drain and source electrodes was observed. As the integrated devices depict electrical characteristics which enable the fabrication of electronic circuits for the low-cost sector, inverters were fabricated and characterized, evaluating the circuit's gain as function of the applied supply voltage and circuit's geometric ratio.

Performance evaluation of an architecture for the characterisation of photo-devices: design, fabrication and test on a CMOS technology

NASA Astrophysics Data System (ADS)

Castillo-Cabrera, G.; García-Lamont, J.; Reyes-Barranca, M. A.; Moreno-Cadenas, J. A.; Escobosa-Echavarría, A.

2011-03-01

In this report, the performance of a particular pixel's architecture is evaluated. It consists mainly of an optical sensor coupled to an amplifier. The circuit contains photoreceptors such as phototransistors and photodiodes. The circuit integrates two main blocks: (a) the pixel architecture, containing four p-channel transistors and a photoreceptor, and (b) a current source for biasing the signal conditioning amplifier. The generated photocurrent is integrated through the gate capacitance of the input p-channel MOS transistor, then converted to voltage and amplified. Both input transistor and current source are implemented as a voltage amplifier having variable gain (between 10dB and 32dB). Considering characterisation purposes, this last fact is relevant since it gives a degree of freedom to the measurement of different kinds of photo-devices and is not limited to either a single operating point of the circuit or one kind and size of photo-sensor. The gain of the amplifier can be adjusted with an external DC power supply that also sets the DC quiescent point of the circuit. Design of the row-select transistor's aspect ratio used in the matrix array is critical for the pixel's amplifier performance. Based on circuit design data such as capacitance magnitude, time and voltage integration, and amplifier gain, characterisation of all the architecture can be readily carried out and evaluated. For the specific technology used in this work, the spectral response of photo-sensors reveals performance differences between phototransistors and photodiodes. Good approximation between simulation and measurement was obtained.

MOS Circuitry Would Detect Low-Energy Charged Particles

NASA Technical Reports Server (NTRS)

Sinha, Mahadeva; Wadsworth, Mark

2003-01-01

Metal oxide semiconductor (MOS) circuits for measuring spatially varying intensities of beams of low-energy charged particles have been developed. These circuits are intended especially for use in measuring fluxes of ions with spatial resolution along the focal planes of mass spectrometers. Unlike prior mass spectrometer focal-plane detectors, these MOS circuits would not be based on ion-induced generation of electrons, and photons; instead, they would be based on direct detection of the electric charges of the ions. Hence, there would be no need for microchannel plates (for ion-to-electron conversion), phosphors (for electron-to-photon conversion), and photodetectors (for final detection) -- components that degrade spatial resolution and contribute to complexity and size. The developmental circuits are based on linear arrays of charge-coupled devices (CCDs) with associated readout circuitry (see figure). They resemble linear CCD photodetector arrays, except that instead of a photodetector, each pixel contains a capacitive charge sensor. The capacitor in each sensor comprises two electrodes (typically made of aluminum) separated by a layer of insulating material. The exposed electrode captures ions and accumulates their electric charges during signal-integration periods.

Design, Fabrication, and Characterization of Carbon Nanotube Field Emission Devices for Advanced Applications

NASA Astrophysics Data System (ADS)

Radauscher, Erich Justin

Carbon nanotubes (CNTs) have recently emerged as promising candidates for electron field emission (FE) cathodes in integrated FE devices. These nanostructured carbon materials possess exceptional properties and their synthesis can be thoroughly controlled. Their integration into advanced electronic devices, including not only FE cathodes, but sensors, energy storage devices, and circuit components, has seen rapid growth in recent years. The results of the studies presented here demonstrate that the CNT field emitter is an excellent candidate for next generation vacuum microelectronics and related electron emission devices in several advanced applications. The work presented in this study addresses determining factors that currently confine the performance and application of CNT-FE devices. Characterization studies and improvements to the FE properties of CNTs, along with Micro-Electro-Mechanical Systems (MEMS) design and fabrication, were utilized in achieving these goals. Important performance limiting parameters, including emitter lifetime and failure from poor substrate adhesion, are examined. The compatibility and integration of CNT emitters with the governing MEMS substrate (i.e., polycrystalline silicon), and its impact on these performance limiting parameters, are reported. CNT growth mechanisms and kinetics were investigated and compared to silicon (100) to improve the design of CNT emitter integrated MEMS based electronic devices, specifically in vacuum microelectronic device (VMD) applications. Improved growth allowed for design and development of novel cold-cathode FE devices utilizing CNT field emitters. A chemical ionization (CI) source based on a CNT-FE electron source was developed and evaluated in a commercial desktop mass spectrometer for explosives trace detection. This work demonstrated the first reported use of a CNT-based ion source capable of collecting CI mass spectra. The CNT-FE source demonstrated low power requirements, pulsing capabilities, and average lifetimes of over 320 hours when operated in constant emission mode under elevated pressures, without sacrificing performance. Additionally, a novel packaged ion source for miniature mass spectrometer applications using CNT emitters, a MEMS based Nier-type geometry, and a Low Temperature Cofired Ceramic (LTCC) 3D scaffold with integrated ion optics were developed and characterized. While previous research has shown other devices capable of collecting ion currents on chip, this LTCC packaged MEMS micro-ion source demonstrated improvements in energy and angular dispersion as well as the ability to direct the ions out of the packaged source and towards a mass analyzer. Simulations and experimental design, fabrication, and characterization were used to make these improvements. Finally, novel CNT-FE devices were developed to investigate their potential to perform as active circuit elements in VMD circuits. Difficulty integrating devices at micron-scales has hindered the use of vacuum electronic devices in integrated circuits, despite the unique advantages they offer in select applications. Using a combination of particle trajectory simulation and experimental characterization, device performance in an integrated platform was investigated. Solutions to the difficulties in operating multiple devices in close proximity and enhancing electron transmission (i.e., reducing grid loss) are explored in detail. A systematic and iterative process was used to develop isolation structures that reduced crosstalk between neighboring devices from 15% on average, to nearly zero. Innovative geometries and a new operational mode reduced grid loss by nearly threefold, thereby improving transmission of the emitted cathode current to the anode from 25% in initial designs to 70% on average. These performance enhancements are important enablers for larger scale integration and for the realization of complex vacuum microelectronic circuits.

Flexible integrated diode-transistor logic (DTL) driving circuits based on printed carbon nanotube thin film transistors with low operation voltage.

PubMed

Liu, Tingting; Zhao, Jianwen; Xu, Weiwei; Dou, Junyan; Zhao, Xinluo; Deng, Wei; Wei, Changting; Xu, Wenya; Guo, Wenrui; Su, Wenming; Jie, Jiansheng; Cui, Zheng

2018-01-03

Fabrication and application of hybrid functional circuits have become a hot research topic in the field of printed electronics. In this study, a novel flexible diode-transistor logic (DTL) driving circuit is proposed, which was fabricated based on a light emitting diode (LED) integrated with printed high-performance single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs). The LED, which is made of AlGaInP on GaAs, is commercial off-the-shelf, which could generate free electrical charges upon white light illumination. Printed top-gate TFTs were made on a PET substrate by inkjet printing high purity semiconducting SWCNTs (sc-SWCNTs) ink as the semiconductor channel materials, together with printed silver ink as the top-gate electrode and printed poly(pyromellitic dianhydride-co-4,4'-oxydianiline) (PMDA/ODA) as gate dielectric layer. The LED, which is connected to the gate electrode of the TFT, generated electrical charge when illuminated, resulting in biased gate voltage to control the TFT from "ON" status to "OFF" status. The TFTs with a PMDA/ODA gate dielectric exhibited low operating voltages of ±1 V, a small subthreshold swing of 62-105 mV dec -1 and ON/OFF ratio of 10 6 , which enabled DTL driving circuits to have high ON currents, high dark-to-bright current ratios (up to 10 5 ) and good stability under repeated white light illumination. As an application, the flexible DTL driving circuit was connected to external quantum dot LEDs (QLEDs), demonstrating its ability to drive and to control the QLED.

Tachometers Derived From a Brushless DC Motor

NASA Technical Reports Server (NTRS)

Howard, David E.; Smith, Dennis A.

2007-01-01

The upper part of the figure illustrates the major functional blocks of a direction-sensitive analog tachometer circuit based on the use of an unexcited two-phase brushless dc motor as a rotation transducer. The primary advantages of this circuit over many older tachometer circuits include the following: Its output inherently varies linearly with the rate of rotation of the shaft. Unlike some tachometer circuits that rely on differentiation of voltages with respect to time, this circuit relies on integration, which results in signals that are less noisy. There is no need for an additional shaft-angle sensor, nor is there any need to supply electrical excitation to a shaft-angle sensor. There is no need for mechanical brushes (which tend to act as sources of electrical noise). The underlying concept and electrical design are relatively simple. This circuit processes the back-electromagnetic force (back-emf) outputs of the two motor phases into a voltage directly proportional to the instantaneous rate (sign magnitude) of rotation of the shaft. The processing in this circuit effects a straightforward combination of mathematical operations leading to a final operation based on the well-known trigonometric identity (sin x)2 + (cos x)2 = 1 for any value of x. The principle of operation of this circuit is closely related to that of the tachometer circuit described in Tachometer Derived From Brushless Shaft-Angle Resolver (MFS-28845), NASA Tech Briefs, Vol. 19, No. 3 (March 1995), page 39. However, the present circuit is simpler in some respects because there is no need for sinusoidal excitation of shaftangle- resolver windings.

Parallelism in integrated fluidic circuits

NASA Astrophysics Data System (ADS)

Bousse, Luc J.; Kopf-Sill, Anne R.; Parce, J. W.

1998-04-01

Many research groups around the world are working on integrated microfluidics. The goal of these projects is to automate and integrate the handling of liquid samples and reagents for measurement and assay procedures in chemistry and biology. Ultimately, it is hoped that this will lead to a revolution in chemical and biological procedures similar to that caused in electronics by the invention of the integrated circuit. The optimal size scale of channels for liquid flow is determined by basic constraints to be somewhere between 10 and 100 micrometers . In larger channels, mixing by diffusion takes too long; in smaller channels, the number of molecules present is so low it makes detection difficult. At Caliper, we are making fluidic systems in glass chips with channels in this size range, based on electroosmotic flow, and fluorescence detection. One application of this technology is rapid assays for drug screening, such as enzyme assays and binding assays. A further challenge in this area is to perform multiple functions on a chip in parallel, without a large increase in the number of inputs and outputs. A first step in this direction is a fluidic serial-to-parallel converter. Fluidic circuits will be shown with the ability to distribute an incoming serial sample stream to multiple parallel channels.

On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

PubMed

Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

2017-08-30

Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Single Molecule Detection Using a Silicon Nanopore-Nanotransistor Integrated Circuit

DTIC Science & Technology

2006-01-01

indicates the dipole moment of the DNA bases projected along the pore axis. During this simulation 14 bases translocated through the pore. The letters...recorded S tU signals are plotted versus time on the top figure. The bottom figure indicates C" the dipole moment of DNA bases 0 - projected along the

Department of Defense statement on the X-ray Lithography Program to the Research and Development Subcommittee of the House Armed Services Committee of 100th Congress, second session

NASA Astrophysics Data System (ADS)

Maynard, E. D., Jr.

1988-03-01

The Department has a broad and necessarily diverse program in semiconductor science and technology. The three principal goals of that effort are: Reduce the gap between commercial integrated circuit usage and its deployment in military systems, assure a healthy on-shore industrial base to support our defense needs, enhance the producibility of specialized military semiconductor products. The major effort to achieve the first of these objectives is the Very High Speed Integrated Circuits (VHSIC) Program which is nearing completion. The Microwave/millimeter wave Monolithic Integrated Circuit (MIMIC) program has just completed a study program to define the product mix needed to meet military system requirements for radar, electronic warfare, smart weapons and telecommunications. We are bringing together the system requirements of all DoD with the device fabrication and product delivery capabilities of industry in an Infrared Focal Plane Array (IRFPA) program. The goal of the Software Initiative is to enhance our warfighting capability through development of efficient software generation technology and products plus the creation of a technology infusion infrastructure to couple the technology and products to system applications. The X-Ray Lithography Program will begin to establish the industrial base which will be required to sustain U.S. leadership in the semiconductor industry for the late 1990s.

670-GHz Schottky Diode-Based Subharmonic Mixer with CPW Circuits and 70-GHz IF

NASA Technical Reports Server (NTRS)

Chattopadhyay, Goutam; Schlecht, Erich T.; Lee, Choonsup; Lin, Robert H.; Gill, John J.; Mehdi, Imran; Sin, Seth; Deal, William; Loi, Kwok K.; Nam, Peta;

Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

PubMed

Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

2016-11-01

2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A novel high performance ESD power clamp circuit with a small area

NASA Astrophysics Data System (ADS)

Zhaonian, Yang; Hongxia, Liu; Li, Li; Qingqing, Zhuo

2012-09-01

A MOSFET-based electrostatic discharge (ESD) power clamp circuit with only a 10 ns RC time constant for a 0.18-μm process is proposed. A diode-connected NMOSFET is used to maintain a long delay time and save area. The special structure overcomes other shortcomings in this clamp circuit. Under fast power-up events, the gate voltage of the clamp MOSFET does not rise as quickly as under ESD events, the special structure can keep the clamp MOSFET thoroughly off. Under a falsely triggered event, the special structure can turn off the clamp MOSFET in a short time. The clamp circuit can also reject the power supply noise effectively. Simulation results show that the clamp circuit avoids fast false triggering events such as a 30 ns/1.8 V power-up, maintains a 1.2 μs delay time and a 2.14 μs turn-off time, and reduces to about 70% of the RC time constant. It is believed that the proposed clamp circuit can be widely used in high-speed integrated circuits.

On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

PubMed

He, Li; Li, Mo

2014-05-01

The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

Smart Power: New power integrated circuit technologies and their applications

NASA Astrophysics Data System (ADS)

Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

1992-05-01

Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

The Management of Cognitive Load During Complex Cognitive Skill Acquisition by Means of Computer-Simulated Problem Solving

ERIC Educational Resources Information Center

Kester, Liesbeth; Kirschner, Paul A.; van Merrienboer, Jeroen J.G.

2005-01-01

This study compared the effects of two information presentation formats on learning to solve problems in electrical circuits. In one condition, the split-source format, information relating to procedural aspects of the functioning of an electrical circuit was not integrated in a circuit diagram, while information in the integrated format condition…

Large-scale quantum photonic circuits in silicon

NASA Astrophysics Data System (ADS)

Harris, Nicholas C.; Bunandar, Darius; Pant, Mihir; Steinbrecher, Greg R.; Mower, Jacob; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Englund, Dirk

2016-08-01

Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today's classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability. For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

Dual-function photonic integrated circuit for frequency octo-tupling or single-side-band modulation.

PubMed

Hasan, Mehedi; Maldonado-Basilio, Ramón; Hall, Trevor J

2015-06-01

A dual-function photonic integrated circuit for microwave photonic applications is proposed. The circuit consists of four linear electro-optic phase modulators connected optically in parallel within a generalized Mach-Zehnder interferometer architecture. The photonic circuit is arranged to have two separate output ports. A first port provides frequency up-conversion of a microwave signal from the electrical to the optical domain; equivalently single-side-band modulation. A second port provides tunable millimeter wave carriers by frequency octo-tupling of an appropriate amplitude RF carrier. The circuit exploits the intrinsic relative phases between the ports of multi-mode interference couplers to provide substantially all the static optical phases needed. The operation of the proposed dual-function photonic integrated circuit is verified by computer simulations. The performance of the frequency octo-tupling and up-conversion functions is analyzed in terms of the electrical signal to harmonic distortion ratio and the optical single side band to unwanted harmonics ratio, respectively.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, David M.

1996-01-01

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, D.M.

1996-11-05

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

An integrated circuit switch

NASA Technical Reports Server (NTRS)

Bonin, E. L.

1969-01-01

Multi-chip integrated circuit switch consists of a GaAs photon-emitting diode in close proximity with S1 phototransistor. A high current gain is obtained when the transistor has a high forward common-emitter current gain.

Chemical etching for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1981-01-01

Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and loading from a receiving air track into automatic furnaces and unloading onto a sending air track are included.

Multiple network interface core apparatus and method

DOEpatents

Underwood, Keith D [Albuquerque, NM; Hemmert, Karl Scott [Albuquerque, NM

2011-04-26

A network interface controller and network interface control method comprising providing a single integrated circuit as a network interface controller and employing a plurality of network interface cores on the single integrated circuit.

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

Unraveling the High Open Circuit Voltage and High Performance of Integrated Perovskite/Organic Bulk-Heterojunction Solar Cells.

PubMed

Dong, Shiqi; Liu, Yongsheng; Hong, Ziruo; Yao, Enping; Sun, Pengyu; Meng, Lei; Lin, Yuze; Huang, Jinsong; Li, Gang; Yang, Yang

2017-08-09

We have demonstrated high-performance integrated perovskite/bulk-heterojunction (BHJ) solar cells due to the low carrier recombination velocity, high open circuit voltage (V OC ), and increased light absorption ability in near-infrared (NIR) region of integrated devices. In particular, we find that the V OC of the integrated devices is dominated by (or pinned to) the perovskite cells, not the organic photovoltaic cells. A Quasi-Fermi Level Pinning Model was proposed to understand the working mechanism and the origin of the V OC of the integrated perovskite/BHJ solar cell, which following that of the perovskite solar cell and is much higher than that of the low bandgap polymer based organic BHJ solar cell. Evidence for the model was enhanced by examining the charge carrier behavior and photovoltaic behavior of the integrated devices under illumination of monochromatic light-emitting diodes at different characteristic wavelength. This finding shall pave an interesting possibility for integrated photovoltaic devices to harvest low energy photons in NIR region and further improve the current density without sacrificing V OC , thus providing new opportunities and significant implications for future industry applications of this kind of integrated solar cells.

3D hybrid integrated lasers for silicon photonics

NASA Astrophysics Data System (ADS)

Song, B.; Pinna, S.; Liu, Y.; Megalini, L.; Klamkin, J.

2018-02-01

A novel 3D hybrid integration platform combines group III-V materials and silicon photonics to yield high-performance lasers is presented. This platform is based on flip-chip bonding and vertical optical coupling integration. In this work, indium phosphide (InP) devices with monolithic vertical total internal reflection turning mirrors were bonded to active silicon photonic circuits containing vertical grating couplers. Greater than 2 mW of optical power was coupled into a silicon waveguide from an InP laser. The InP devices can also be bonded directly to the silicon substrate, providing an efficient path for heat dissipation owing to the higher thermal conductance of silicon compared to InP. Lasers realized with this technique demonstrated a thermal impedance as low as 6.2°C/W, allowing for high efficiency and operation at high temperature. InP reflective semiconductor optical amplifiers were also integrated with 3D hybrid integration to form integrated external cavity lasers. These lasers demonstrated a wavelength tuning range of 30 nm, relative intensity noise lower than -135 dB/Hz and laser linewidth of 1.5 MHz. This platform is promising for integration of InP lasers and photonic integrated circuits on silicon photonics.

(DCT) A Reconfigurable RF Photonics Unit Cell For Integrated Circuits

DTIC Science & Technology

2012-08-10

Public Release In this work, the integration of a Quantum Dot Mode Locked Laser , that acts as a microwave and millimeter wave source, with a wideband...antenna is presented. Two aspects of research are discussed. The first aspect deals with a Mode Locked Laser (MLL) based on quantum dot (QD...designed antennas were integrated with laser chips using the lithographic method. The challenges of designing this wideband antenna that can operate

Integrated circuit-based instrumentation for microchip capillary electrophoresis.

PubMed

Behnam, M; Kaigala, G V; Khorasani, M; Martel, S; Elliott, D G; Backhouse, C J

2010-09-01

Although electrophoresis with laser-induced fluorescence (LIF) detection has tremendous potential in lab on chip-based point-of-care disease diagnostics, the wider use of microchip electrophoresis has been limited by the size and cost of the instrumentation. To address this challenge, the authors designed an integrated circuit (IC, i.e. a microelectronic chip, with total silicon area of <0.25 cm2, less than 5 mmx5 mm, and power consumption of 28 mW), which, with a minimal additional infrastructure, can perform microchip electrophoresis with LIF detection. The present work enables extremely compact and inexpensive portable systems consisting of one or more complementary metal-oxide-semiconductor (CMOS) chips and several other low-cost components. There are, to the authors' knowledge, no other reports of a CMOS-based LIF capillary electrophoresis instrument (i.e. high voltage generation, switching, control and interface circuit combined with LIF detection). This instrument is powered and controlled using a universal serial bus (USB) interface to a laptop computer. The authors demonstrate this IC in various configurations and can readily analyse the DNA produced by a standard medical diagnostic protocol (end-labelled polymerase chain reaction (PCR) product) with a limit of detection of approximately 1 ng/microl (approximately 1 ng of total DNA). The authors believe that this approach may ultimately enable lab-on-a-chip-based electrophoretic instruments that cost on the order of several dollars.

Hybrid VLSI/QCA Architecture for Computing FFTs

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Nikzad; Modarres, Katayoon; Spotnitz, Matthew

2003-01-01

A data-processor architecture that would incorporate elements of both conventional very-large-scale integrated (VLSI) circuitry and quantum-dot cellular automata (QCA) has been proposed to enable the highly parallel and systolic computation of fast Fourier transforms (FFTs). The proposed circuit would complement the QCA-based circuits described in several prior NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; and Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35. The cited prior articles described the limitations of very-large-scale integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCAbased signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes.

Three-Dimensional, Inkjet-Printed Organic Transistors and Integrated Circuits with 100% Yield, High Uniformity, and Long-Term Stability.

PubMed

Kwon, Jimin; Takeda, Yasunori; Fukuda, Kenjiro; Cho, Kilwon; Tokito, Shizuo; Jung, Sungjune

2016-11-22

In this paper, we demonstrate three-dimensional (3D) integrated circuits (ICs) based on a 3D complementary organic field-effect transistor (3D-COFET). The transistor-on-transistor structure was achieved by vertically stacking a p-type OFET over an n-type OFET with a shared gate joining the two transistors, effectively halving the footprint of printed transistors. All the functional layers including organic semiconductors, source/drain/gate electrodes, and interconnection paths were fully inkjet-printed except a parylene dielectric which was deposited by chemical vapor deposition. An array of printed 3D-COFETs and their inverter logic gates comprising over 100 transistors showed 100% yield, and the uniformity and long-term stability of the device were also investigated. A full-adder circuit, the most basic computing unit, has been successfully demonstrated using nine NAND gates based on the 3D structure. The present study fulfills the essential requirements for the fabrication of organic printed complex ICs (increased transistor density, 100% yield, high uniformity, and long-term stability), and the findings can be applied to realize more complex digital/analogue ICs and intelligent devices.

Performance of an SOI Boot-Strapped Full-Bridge MOSFET Driver, Type CHT-FBDR, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

High-Throughput Fabrication of Flexible and Transparent All-Carbon Nanotube Electronics.

PubMed

Chen, Yong-Yang; Sun, Yun; Zhu, Qian-Bing; Wang, Bing-Wei; Yan, Xin; Qiu, Song; Li, Qing-Wen; Hou, Peng-Xiang; Liu, Chang; Sun, Dong-Ming; Cheng, Hui-Ming

2018-05-01

This study reports a simple and effective technique for the high-throughput fabrication of flexible all-carbon nanotube (CNT) electronics using a photosensitive dry film instead of traditional liquid photoresists. A 10 in. sized photosensitive dry film is laminated onto a flexible substrate by a roll-to-roll technology, and a 5 µm pattern resolution of the resulting CNT films is achieved for the construction of flexible and transparent all-CNT thin-film transistors (TFTs) and integrated circuits. The fabricated TFTs exhibit a desirable electrical performance including an on-off current ratio of more than 10 5 , a carrier mobility of 33 cm 2 V -1 s -1 , and a small hysteresis. The standard deviations of on-current and mobility are, respectively, 5% and 2% of the average value, demonstrating the excellent reproducibility and uniformity of the devices, which allows constructing a large noise margin inverter circuit with a voltage gain of 30. This study indicates that a photosensitive dry film is very promising for the low-cost, fast, reliable, and scalable fabrication of flexible and transparent CNT-based integrated circuits, and opens up opportunities for future high-throughput CNT-based printed electronics.

Athermal laser design.

PubMed

Bovington, Jock; Srinivasan, Sudharsanan; Bowers, John E

2014-08-11

This paper discusses circuit based and waveguide based athermalization schemes and provides some design examples of athermalized lasers utilizing fully integrated athermal components as an alternative to power hungry thermo-electric controllers (TECs), off-chip wavelength lockers or monitors with lookup tables for tunable lasers. This class of solutions is important for uncooled transmitters on silicon.

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

W-band InP based HEMT MMIC low noise amplifiers

NASA Technical Reports Server (NTRS)

Lin, K. Y.; Tang, Y. L.; Wang, H.; Gaier, T.; Gough, R. G.; Sinclair, M.

2002-01-01

This paper presents the designs and measurement results of a three-stage and a four-stage W-band monolithic microwave integrated circuits (MMIC) including a three-stage and a four-stage low noise amplifiers.

Superconducting Microelectronics.

ERIC Educational Resources Information Center

Henry, Richard W.

1984-01-01

Discusses superconducting microelectronics based on the Josephson effect and its advantages over conventional integrated circuits in speed and sensitivity. Considers present uses in standards laboratories (voltage) and in measuring weak magnetic fields. Also considers future applications in superfast computer circuitry using Superconducting…

Label-Free Direct Electronic Detection of Biomolecules with Amorphous Silicon Nanostructures

PubMed Central

Lund, John; Mehta, Ranjana; Parviz, Babak A.

2007-01-01

We present the fabrication and characterization of a nano-scale sensor made of amorphous silicon for the label-free, electronic detection of three classes of biologically important molecules: ions, oligonucleotides, and proteins. The sensor structure has an active element which is a 50 nm wide amorphous silicon semicircle and has a total footprint of less than 4 μm2. We demonstrate the functionalization of the sensor with receptor molecules and the electronic detection of three targets: H+ ions, short single-stranded DNAs, and streptavidin. The sensor is able to reliably distinguish single base-pair mismatches in 12 base long strands of DNA and monitor the introduction and identification of straptavidin in real-time. The versatile sensor structure can be readily functionalized with a wide range of receptor molecules and is suitable for integration with high-speed electronic circuits as a post-process on an integrated circuit chip. PMID:17292148