Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lauermann, M.; Weimann, C.; Palmer, R.

2014-05-27

We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

High Density Polymer-Based Integrated Electgrode Array

DOEpatents

Maghribi, Mariam N.; Krulevitch, Peter A.; Davidson, James Courtney; Hamilton, Julie K.

2006-04-25

A high density polymer-based integrated electrode apparatus that comprises a central electrode body and a multiplicity of arms extending from the electrode body. The central electrode body and the multiplicity of arms are comprised of a silicone material with metal features in said silicone material that comprise electronic circuits.

Elemental Education.

ERIC Educational Resources Information Center

Daniel, Esther Gnanamalar Sarojini; Saat, Rohaida Mohd.

2001-01-01

Introduces a learning module integrating three disciplines--physics, chemistry, and biology--and based on four elements: carbon, oxygen, hydrogen, and silicon. Includes atomic model and silicon-based life activities. (YDS)

Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

NASA Astrophysics Data System (ADS)

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

2016-03-01

We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.

Phase sensitive amplification in integrated waveguides (Conference Presentation)

NASA Astrophysics Data System (ADS)

Schroeder, Jochen B.; Zhang, Youngbin; Husko, Chad A.; LeFrancois, Simon; Eggleton, Benjamin J.

2017-02-01

Phase sensitive amplification (PSA) is an attractive technology for integrated all-optical signal processing, due to it's potential for noiseless amplification, phase regeneration and generation of squeezed light. In this talk I will review our results on implementing four-wave-mixing based PSA inside integrated photonic devices. In particular I will discuss PSA in chalcogenide ridge waveguides and silicon slow-light photonic crystals. We achieve PSA in both pump- and signal-degenerate schemes with maximum extinction ratios of 11 (silicon) and 18 (chalcogenide) dB. I will further discuss the influence of two-photon absorption and free carrier effects on the performance of silicon-based PSAs.

Silicon coupled with plasmon nanocavities generates bright visible hot luminescence

NASA Astrophysics Data System (ADS)

Cho, Chang-Hee; Aspetti, Carlos O.; Park, Joohee; Agarwal, Ritesh

2013-04-01

To address the limitations in device speed and performance in silicon-based electronics, there have been extensive studies on silicon optoelectronics with a view to achieving ultrafast optical data processing. The biggest challenge has been to develop an efficient silicon-based light source, because the indirect bandgap of silicon gives rise to extremely low emission efficiencies. Although light emission in quantum-confined silicon at sub-10 nm length scales has been demonstrated, there are difficulties in integrating quantum structures with conventional electronics. It is desirable to develop new concepts to obtain emission from silicon at length scales compatible with current electronic devices (20-100 nm), which therefore do not utilize quantum-confinement effects. Here, we demonstrate an entirely new method to achieve bright visible light emission in `bulk-sized' silicon coupled with plasmon nanocavities at room temperature, from non-thermalized carrier recombination. The highly enhanced emission (internal quantum efficiency of >1%) in plasmonic silicon, together with its size compatibility with current silicon electronics, provides new avenues for developing monolithically integrated light sources on conventional microchips.

50 Gb/s hybrid silicon traveling-wave electroabsorption modulator.

PubMed

Tang, Yongbo; Chen, Hui-Wen; Jain, Siddharth; Peters, Jonathan D; Westergren, Urban; Bowers, John E

2011-03-28

We have demonstrated a traveling-wave electroabsorption modulator based on the hybrid silicon platform. For a device with a 100 μm active segment, the small-signal electro/optical response renders a 3 dB bandwidth of around 42 GHz and its modulation efficiency reaches 23 GHz/V. A dynamic extinction ratio of 9.8 dB with a driving voltage swing of only 2 V was demonstrated at a transmission rate of 50 Gb/s. This represents a significant improvement for modulators compatible with integration of silicon-based photonic integrated circuits.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

NASA Astrophysics Data System (ADS)

Hussain, Muhammad M.; Rojas, Jhonathan P.; Torres Sevilla, Galo A.

2013-05-01

Today's information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor - heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon - industry's darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%).

Room-Temperature Low-Threshold Lasing from Monolithically Integrated Nanostructured Porous Silicon Hybrid Microcavities.

PubMed

Robbiano, Valentina; Paternò, Giuseppe M; La Mattina, Antonino A; Motti, Silvia G; Lanzani, Guglielmo; Scotognella, Francesco; Barillaro, Giuseppe

2018-05-22

Silicon photonics would strongly benefit from monolithically integrated low-threshold silicon-based laser operating at room temperature, representing today the main challenge toward low-cost and power-efficient electronic-photonic integrated circuits. Here we demonstrate low-threshold lasing from fully transparent nanostructured porous silicon (PSi) monolithic microcavities (MCs) infiltrated with a polyfluorene derivative, namely, poly(9,9-di- n-octylfluorenyl-2,7-diyl) (PFO). The PFO-infiltrated PSiMCs support single-mode blue lasing at the resonance wavelength of 466 nm, with a line width of ∼1.3 nm and lasing threshold of 5 nJ (15 μJ/cm 2 ), a value that is at the state of the art of PFO lasers. Furthermore, time-resolved photoluminescence shows a significant shortening (∼57%) of PFO emission lifetime in the PSiMCs, with respect to nonresonant PSi reference structures, confirming a dramatic variation of the radiative decay rate due to a Purcell effect. Our results, given also that blue lasing is a worst case for silicon photonics, are highly appealing for the development of low-cost, low-threshold silicon-based lasers with wavelengths tunable from visible to the near-infrared region by simple infiltration of suitable emitting polymers in monolithically integrated nanostructured PSiMCs.

High-speed detection at two micrometres with monolithic silicon photodiodes

NASA Astrophysics Data System (ADS)

Ackert, Jason J.; Thomson, David J.; Shen, Li; Peacock, Anna C.; Jessop, Paul E.; Reed, Graham T.; Mashanovich, Goran Z.; Knights, Andrew P.

2015-06-01

With continued steep growth in the volume of data transmitted over optical networks there is a widely recognized need for more sophisticated photonics technologies to forestall a ‘capacity crunch’. A promising solution is to open new spectral regions at wavelengths near 2 μm and to exploit the long-wavelength transmission and amplification capabilities of hollow-core photonic-bandgap fibres and the recently available thulium-doped fibre amplifiers. To date, photodetector devices for this window have largely relied on III-V materials or, where the benefits of integration with silicon photonics are sought, GeSn alloys, which have been demonstrated thus far with only limited utility. Here, we describe a silicon photodiode operating at 20 Gbit s-1 in this wavelength region. The detector is compatible with standard silicon processing and is integrated directly with silicon-on-insulator waveguides, which suggests future utility in silicon-based mid-infrared integrated optics for applications in communications.

2 μm wavelength range InP-based type-II quantum well photodiodes heterogeneously integrated on silicon photonic integrated circuits.

PubMed

Wang, Ruijun; Sprengel, Stephan; Muneeb, Muhammad; Boehm, Gerhard; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

2015-10-05

The heterogeneous integration of InP-based type-II quantum well photodiodes on silicon photonic integrated circuits for the 2 µm wavelength range is presented. A responsivity of 1.2 A/W at a wavelength of 2.32 µm and 0.6 A/W at 2.4 µm wavelength is demonstrated. The photodiodes have a dark current of 12 nA at -0.5 V at room temperature. The absorbing active region of the integrated photodiodes consists of six periods of a "W"-shaped quantum well, also allowing for laser integration on the same platform.

High quality silicon-based substrates for microwave and millimeter wave passive circuits

NASA Astrophysics Data System (ADS)

Belaroussi, Y.; Rack, M.; Saadi, A. A.; Scheen, G.; Belaroussi, M. T.; Trabelsi, M.; Raskin, J.-P.

2017-09-01

Porous silicon substrate is very promising for next generation wireless communication requiring the avoidance of high-frequency losses originating from the bulk silicon. In this work, new variants of porous silicon (PSi) substrates have been introduced. Through an experimental RF performance, the proposed PSi substrates have been compared with different silicon-based substrates, namely, standard silicon (Std), trap-rich (TR) and high resistivity (HR). All of the mentioned substrates have been fabricated where identical samples of CPW lines have been integrated on. The new PSi substrates have shown successful reduction in the substrate's effective relative permittivity to values as low as 3.7 and great increase in the substrate's effective resistivity to values higher than 7 kΩ cm. As a concept proof, a mm-wave bandpass filter (MBPF) centred at 27 GHz has been integrated on the investigated substrates. Compared with the conventional MBPF implemented on standard silicon-based substrates, the measured S-parameters of the PSi-based MBPF have shown high filtering performance, such as a reduction in insertion loss and an enhancement of the filter selectivity, with the joy of having the same filter performance by varying the temperature. Therefore, the efficiency of the proposed PSi substrates has been well highlighted. From 1994 to 1995, she was assistant of physics at (USTHB), Algiers . From 1998 to 2011, she was a Researcher at characterization laboratory in ionized media and laser division at the Advanced Technologies Development Center. She has integrated the Analog Radio Frequency Integrated Circuits team as Researcher since 2011 until now in Microelectronic and Nanotechnology Division at Advanced Technologies Development Center (CDTA), Algiers. She has been working towards her Ph.D. degree jointly at CDTA and Ecole Nationale Polytechnique, Algiers, since 2012. Her research interest includes fabrication and characterization of microwave passive devices on porous silicon as new substrate, such as characterization of FinFET components.

Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

NASA Astrophysics Data System (ADS)

Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

2016-03-01

Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on porous silicon, dissolution tests for 0.1 M and 0.01 M NaOH trigger solutions, EIS analysis for VOx coated devices, and EDS compositional analysis of VOx. (ii) Video showing transient behavior of integrated VOx/porous silicon scaffolds. See DOI: 10.1039/c5nr09095d

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2004-12-07

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process For Direct Integration Of A Thin-Film Silicon P-N Junction Diode With A Magnetic Tunnel Junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2005-08-23

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2003-01-01

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Energy Conversion Properties of ZnSiP2, a Lattice-Matched Material for Silicon-Based Tandem Photovoltaics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Martinez, Aaron D.; Warren, Emily L.; Gorai, Prashun

ZnSiP2 demonstrates promising potential as an optically active material on silicon. There has been a longstanding need for wide band gap materials that can be integrated with Si for tandem photovoltaics and other optoelectronic applications. ZnSiP2 is an inexpensive, earth abundant, wide band gap material that is stable and lattice matched with silicon. This conference proceeding summarizes our PV-relevant work on bulk single crystal ZnSiP2, highlighting the key findings and laying the ground work for integration into Si-based tandem devices.

Integration of mask and silicon metrology in DFM

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

2009-03-01

We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based on the profiling method of the field proven CD metrology algorithm. The detected edges are then converted to GDSII format, which is a standard format for a design data, and utilized for various DFM systems such as simulation. Namely, by integrating pattern shapes of mask and silicon formed during a manufacturing process into GDSII format, it makes it possible to bridge highly accurate pattern profile information over to the design field of various EDA systems. These are fully integrated into design data and automated. Bi-directional cross probing between mask data and process control data is allowed by linking them. This method is a solution for total optimization that covers Design, MDP, mask production and silicon device producing. This method therefore is regarded as a strategic DFM approach in the semiconductor metrology.

High surface area silicon materials: fundamentals and new technology.

PubMed

Buriak, Jillian M

2006-01-15

Crystalline silicon forms the basis of just about all computing technologies on the planet, in the form of microelectronics. An enormous amount of research infrastructure and knowledge has been developed over the past half-century to construct complex functional microelectronic structures in silicon. As a result, it is highly probable that silicon will remain central to computing and related technologies as a platform for integration of, for instance, molecular electronics, sensing elements and micro- and nanoelectromechanical systems. Porous nanocrystalline silicon is a fascinating variant of the same single crystal silicon wafers used to make computer chips. Its synthesis, a straightforward electrochemical, chemical or photochemical etch, is compatible with existing silicon-based fabrication techniques. Porous silicon literally adds an entirely new dimension to the realm of silicon-based technologies as it has a complex, three-dimensional architecture made up of silicon nanoparticles, nanowires, and channel structures. The intrinsic material is photoluminescent at room temperature in the visible region due to quantum confinement effects, and thus provides an optical element to electronic applications. Our group has been developing new organic surface reactions on porous and nanocrystalline silicon to tailor it for a myriad of applications, including molecular electronics and sensing. Integration of organic and biological molecules with porous silicon is critical to harness the properties of this material. The construction and use of complex, hierarchical molecular synthetic strategies on porous silicon will be described.

Reconfigurable Cellular Photonic Crystal Arrays (RCPA)

DTIC Science & Technology

2013-03-01

signal processing based on reconfigurable integrated optics devices. This technology has the potential to revolutionize the design circle of optical...Accomplishments III.A. Design and fabrication of an accumulation-mode modulator Figure 1(a) shows the schematic of a compact resonator on the double-Si... integration of silicon nitride on silicon-on-insulator platform to enhance the arsenal of photonic circuit designers . The coherent integration of

High-efficiency power transfer for silicon-based photonic devices

NASA Astrophysics Data System (ADS)

Son, Gyeongho; Yu, Kyoungsik

2018-02-01

We demonstrate an efficient coupling of guided light of 1550 nm from a standard single-mode optical fiber to a silicon waveguide using the finite-difference time-domain method and propose a fabrication method of tapered optical fibers for efficient power transfer to silicon-based photonic integrated circuits. Adiabatically-varying fiber core diameters with a small tapering angle can be obtained using the tube etching method with hydrofluoric acid and standard single-mode fibers covered by plastic jackets. The optical power transmission of the fundamental HE11 and TE-like modes between the fiber tapers and the inversely-tapered silicon waveguides was calculated with the finite-difference time-domain method to be more than 99% at a wavelength of 1550 nm. The proposed method for adiabatic fiber tapering can be applied in quantum optics, silicon-based photonic integrated circuits, and nanophotonics. Furthermore, efficient coupling within the telecommunication C-band is a promising approach for quantum networks in the future.

An innovative large scale integration of silicon nanowire-based field effect transistors

NASA Astrophysics Data System (ADS)

Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

2018-05-01

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Donnelly, Vincent M.; Kornblit, Avinoam

The field of plasma etching is reviewed. Plasma etching, a revolutionary extension of the technique of physical sputtering, was introduced to integrated circuit manufacturing as early as the mid 1960s and more widely in the early 1970s, in an effort to reduce liquid waste disposal in manufacturing and achieve selectivities that were difficult to obtain with wet chemistry. Quickly, the ability to anisotropically etch silicon, aluminum, and silicon dioxide in plasmas became the breakthrough that allowed the features in integrated circuits to continue to shrink over the next 40 years. Some of this early history is reviewed, and a discussionmore » of the evolution in plasma reactor design is included. Some basic principles related to plasma etching such as evaporation rates and Langmuir–Hinshelwood adsorption are introduced. Etching mechanisms of selected materials, silicon, silicon dioxide, and low dielectric-constant materials are discussed in detail. A detailed treatment is presented of applications in current silicon integrated circuit fabrication. Finally, some predictions are offered for future needs and advances in plasma etching for silicon and nonsilicon-based devices.« less

Multi-Step Deep Reactive Ion Etching Fabrication Process for Silicon-Based Terahertz Components

NASA Technical Reports Server (NTRS)

Reck, Theodore (Inventor); Perez, Jose Vicente Siles (Inventor); Lee, Choonsup (Inventor); Cooper, Ken B. (Inventor); Jung-Kubiak, Cecile (Inventor); Mehdi, Imran (Inventor); Chattopadhyay, Goutam (Inventor); Lin, Robert H. (Inventor); Peralta, Alejandro (Inventor)

2016-01-01

A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

Microelectromechanical system pressure sensor integrated onto optical fiber by anodic bonding.

PubMed

Saran, Anish; Abeysinghe, Don C; Boyd, Joseph T

2006-03-10

Optical microelectromechanical system pressure sensors based on the principle of Fabry-Perot interferometry have been developed and fabricated using the technique of silicon-to-silicon anodic bonding. The pressure sensor is then integrated onto an optical fiber by a novel technique of anodic bonding without use of any adhesives. In this anodic bonding technique we use ultrathin silicon of thickness 10 microm to bond the optical fiber to the sensor head. The ultrathin silicon plays the role of a stress-reducing layer, which helps the bonding of an optical fiber to silicon having conventional wafer thickness. The pressure-sensing membrane is formed by 8 microm thick ultrathin silicon acting as a membrane, thus eliminating the need for bulk silicon etching. The pressure sensor integrated onto an optical fiber is tested for static response, and experimental results indicate degradation in the fringe visibility of the Fabry-Perot interferometer. This effect was mainly due to divergent light rays from the fiber degrading the fringe visibility. This effect is demonstrated in brief by an analytical model.

Lead sulfide - Silicon MOSFET infrared focal plane development

NASA Technical Reports Server (NTRS)

Barrett, J. R.; Jhabvala, M. D.

1983-01-01

A process for directly integrating photoconductive lead sulfide (PbS) infrared detector material with silicon MOS integrated circuits has been developed primarily for application in long (greater than 10,000 detector elements) linear arrays for pushbroom scanning applications. The processing technology is based on the conventional PMOS and CMOS technologies with a variation in the metallization. Results and measurements on a fully integrated eight-element multiplexer are shown.

Buried anti resonant reflecting optical waveguide based on porous silicon material for an integrated Mach Zehnder structure

NASA Astrophysics Data System (ADS)

Hiraoui, M.; Guendouz, M.; Lorrain, N.; Haji, L.; Oueslati, M.

2012-11-01

A buried anti resonant reflecting optical waveguide for an integrated Mach Zehnder structure based on porous silicon material is achieved using a classical photolithography process. Three distinct porous silicon layers are then elaborated in a single step, by varying the porosity (thus the refractive index) and the thickness while respecting the anti-resonance conditions. Simulations and experimental results clearly show the antiresonant character of the buried waveguides. Significant variation of the reflectance and light propagation with different behavior depending on the polarization and the Mach Zehnder dimensions is obtained. Finally, we confirm the feasibility of this structure for sensing applications.

System-level integration of active silicon photonic biosensors

NASA Astrophysics Data System (ADS)

Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

2017-02-01

Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

Six-beam homodyne laser Doppler vibrometry based on silicon photonics technology.

PubMed

Li, Yanlu; Zhu, Jinghao; Duperron, Matthieu; O'Brien, Peter; Schüler, Ralf; Aasmul, Soren; de Melis, Mirko; Kersemans, Mathias; Baets, Roel

2018-02-05

This paper describes an integrated six-beam homodyne laser Doppler vibrometry (LDV) system based on a silicon-on-insulator (SOI) full platform technology, with on-chip photo-diodes and phase modulators. Electronics and optics are also implemented around the integrated photonic circuit (PIC) to enable a simultaneous six-beam measurement. Measurement of a propagating guided elastic wave in an aluminum plate (speed ≈ 909 m/s @ 61.5 kHz) is demonstrated.

Integrated TiN coated porous silicon supercapacitor with large capacitance per foot print

NASA Astrophysics Data System (ADS)

Grigoras, Kestutis; Grönberg, Leif; Ahopelto, Jouni; Prunnila, Mika

2017-05-01

We have fabricated a micro-supercapacitor with porous silicon electrodes coated with TiN by atomic layer deposition technique. The coating provides an efficient surface passivation and high electrical conductivity of the electrodes, resulting in stable and almost ideal electrochemical double layer capacitor behavior with characteristics comparable to the best carbon based micro-supercapacitors. Stability of the supercapacitor is verified by performing 50 000 voltammetry cycles with high capacitance retention obtained. Silicon microfabrication techniques facilitate integration of both supercapacitor electrodes inside the silicon substrate and, in this work, such in-chip supercapacitor is demonstrated. This approach allows realization of very high capacitance per foot print area. The in-chip micro-supercapacitor can be integrated with energy harvesting elements and can be used in wearable and implantable microdevices.

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

A silicon Brillouin laser

NASA Astrophysics Data System (ADS)

Otterstrom, Nils T.; Behunin, Ryan O.; Kittlaus, Eric A.; Wang, Zheng; Rakich, Peter T.

2018-06-01

Brillouin laser oscillators offer powerful and flexible dynamics as the basis for mode-locked lasers, microwave oscillators, and optical gyroscopes in a variety of optical systems. However, Brillouin interactions are markedly weak in conventional silicon photonic waveguides, stifling progress toward silicon-based Brillouin lasers. The recent advent of hybrid photonic-phononic waveguides has revealed Brillouin interactions to be one of the strongest and most tailorable nonlinearities in silicon. In this study, we have harnessed these engineered nonlinearities to demonstrate Brillouin lasing in silicon. Moreover, we show that this silicon-based Brillouin laser enters a regime of dynamics in which optical self-oscillation produces phonon linewidth narrowing. Our results provide a platform to develop a range of applications for monolithic integration within silicon photonic circuits.

Hybrid Integrated Silicon Microfluidic Platform for Fluorescence Based Biodetection.

PubMed

Chandrasekaran, Arvind; Acharya, Ashwin; You, Jian Liang; Soo, Kim Young; Packirisamy, Muthukumaran; Stiharu, Ion; Darveau, André

2007-09-11

The desideratum to develop a fully integrated Lab-on-a-chip device capable ofrapid specimen detection for high throughput in-situ biomedical diagnoses and Point-of-Care testing applications has called for the integration of some of the novel technologiessuch as the microfluidics, microphotonics, immunoproteomics and Micro ElectroMechanical Systems (MEMS). In the present work, a silicon based microfluidic device hasbeen developed for carrying out fluorescence based immunoassay. By hybrid attachment ofthe microfluidic device with a Spectrometer-on-chip, the feasibility of synthesizing anintegrated Lab-on-a-chip type device for fluorescence based biosensing has beendemonstrated. Biodetection using the microfluidic device has been carried out usingantigen sheep IgG and Alexafluor-647 tagged antibody particles and the experimentalresults prove that silicon is a compatible material for the present application given thevarious advantages it offers such as cost-effectiveness, ease of bulk microfabrication,superior surface affinity to biomolecules, ease of disposability of the device etc., and is thussuitable for fabricating Lab-on-a-chip type devices.

A monolithic integrated micro direct methanol fuel cell based on sulfo functionalized porous silicon

NASA Astrophysics Data System (ADS)

Wang, M.; Lu, Y. X.; Liu, L. T.; Wang, X. H.

2016-11-01

In this paper, we demonstrate a monolithic integrated micro direct methanol fuel cell (μDMFC) for the first time. The monolithic integrated μDMFC combines proton exchange membrane (PEM) and Pt nanocatalysts, in which PEM is achieved by the functionalized porous silicon membrane and 3D Pt nanoflowers being synthesized in situ on it as catalysts. Sulfo groups functionalized porous silicon membrane serves as a PEM and a catalyst support simultaneously. The μDMFC prototype achieves an open circuit voltage of 0.3 V, a maximum power density of 5.5 mW/cm2. The monolithic integrated μDMFC offers several desirable features such as compatibility with micro fabrication techniques, an undeformable solid PEM and the convenience of assembly.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Quantum cascade lasers grown on silicon.

PubMed

Nguyen-Van, Hoang; Baranov, Alexei N; Loghmari, Zeineb; Cerutti, Laurent; Rodriguez, Jean-Baptiste; Tournet, Julie; Narcy, Gregoire; Boissier, Guilhem; Patriarche, Gilles; Bahriz, Michael; Tournié, Eric; Teissier, Roland

2018-05-08

Technological platforms offering efficient integration of III-V semiconductor lasers with silicon electronics are eagerly awaited by industry. The availability of optoelectronic circuits combining III-V light sources with Si-based photonic and electronic components in a single chip will enable, in particular, the development of ultra-compact spectroscopic systems for mass scale applications. The first circuits of such type were fabricated using heterogeneous integration of semiconductor lasers by bonding the III-V chips onto silicon substrates. Direct epitaxial growth of interband III-V laser diodes on silicon substrates has also been reported, whereas intersubband emitters grown on Si have not yet been demonstrated. We report the first quantum cascade lasers (QCLs) directly grown on a silicon substrate. These InAs/AlSb QCLs grown on Si exhibit high performances, comparable with those of the devices fabricated on their native InAs substrate. The lasers emit near 11 µm, the longest emission wavelength of any laser integrated on Si. Given the wavelength range reachable with InAs/AlSb QCLs, these results open the way to the development of a wide variety of integrated sensors.

CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization.

PubMed

Tran, Duy Phu; Pham, Thuy Thi Thanh; Wolfrum, Bernhard; Offenhäusser, Andreas; Thierry, Benjamin

2018-05-11

Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs' promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology.

Fabrication of silicon-based shape memory alloy micro-actuators

NASA Technical Reports Server (NTRS)

Johnson, A. David; Busch, John D.; Ray, Curtis A.; Sloan, Charles L.

1992-01-01

Thin film shape memory alloy has been integrated with silicon in a new actuation mechanism for microelectromechanical systems. This paper compares nickel-titanium film with other actuators, describes recent results of chemical milling processes developed to fabricate shape memory alloy microactuators in silicon, and describes simple actuation mechanisms which have been fabricated and tested.

Nonclassical light sources for silicon photonics

NASA Astrophysics Data System (ADS)

Bajoni, Daniele; Galli, Matteo

2017-09-01

Quantum photonics has recently attracted a lot of attention for its disruptive potential in emerging technologies like quantum cryptography, quantum communication and quantum computing. Driven by the impressive development in nanofabrication technologies and nanoscale engineering, silicon photonics has rapidly become the platform of choice for on-chip integration of high performing photonic devices, now extending their functionalities towards quantum-based applications. Focusing on quantum Information Technology (qIT) as a key application area, we review recent progress in integrated silicon-based sources of nonclassical states of light. We assess the state of the art in this growing field and highlight the challenges that need to be overcome to make quantum photonics a reliable and widespread technology.

Silica-on-silicon waveguide quantum circuits.

PubMed

Politi, Alberto; Cryan, Martin J; Rarity, John G; Yu, Siyuan; O'Brien, Jeremy L

2008-05-02

Quantum technologies based on photons will likely require an integrated optics architecture for improved performance, miniaturization, and scalability. We demonstrate high-fidelity silica-on-silicon integrated optical realizations of key quantum photonic circuits, including two-photon quantum interference with a visibility of 94.8 +/- 0.5%; a controlled-NOT gate with an average logical basis fidelity of 94.3 +/- 0.2%; and a path-entangled state of two photons with fidelity of >92%. These results show that it is possible to directly "write" sophisticated photonic quantum circuits onto a silicon chip, which will be of benefit to future quantum technologies based on photons, including information processing, communication, metrology, and lithography, as well as the fundamental science of quantum optics.

Broadband optical antireflection enhancement by integrating antireflective nanoislands with silicon nanoconical-frustum arrays.

PubMed

Park, Haesung; Shin, Dongheok; Kang, Gumin; Baek, Seunghwa; Kim, Kyoungsik; Padilla, Willie J

2011-12-22

Based on conventional colloidal nanosphere lithography, we experimentally demonstrate novel graded-index nanostructures for broadband optical antireflection enhancement including the near-ultraviolet (NUV) region by integrating residual polystyrene antireflective (AR) nanoislands coating arrays with silicon nano-conical-frustum arrays. This is a feasible optimized integration method of two major approaches for antireflective surfaces: quarter-wavelength AR coating and biomimetic moth's eye structure. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Realizing topological edge states in a silicon nitride microring-based photonic integrated circuit.

PubMed

Yin, Chenxuan; Chen, Yujie; Jiang, Xiaohui; Zhang, Yanfeng; Shao, Zengkai; Xu, Pengfei; Yu, Siyuan

2016-10-15

Topological edge states in a photonic integrated circuit based on the platform of silicon nitride are demonstrated with a two-dimensional coupled resonator optical waveguide array involving the synthetic magnetic field for photons at near-infrared wavelengths. Measurements indicate that the topological edge states can be observed at certain wavelengths, with light travelling around the boundary of the array. Combined with the induced disorders in fabrication near the edge, the system shows the defect immunity under the topological protection of edge states.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

InGaAlAsPN: A Materials System for Silicon Based Optoelectronics and Heterostructure Device Technologies

NASA Technical Reports Server (NTRS)

Broekaert, T. P. E.; Tang, S.; Wallace, R. M.; Beam, E. A., III; Duncan, W. M.; Kao, Y. -C.; Liu, H. -Y.

1995-01-01

A new material system is proposed for silicon based opto-electronic and heterostructure devices; the silicon lattice matched compositions of the (In,Ga,Al)-(As,P)N 3-5 compounds. In this nitride alloy material system, the bandgap is expected to be direct at the silicon lattice matched compositions with a bandgap range most likely to be in the infrared to visible. At lattice constants ranging between those of silicon carbide and silicon, a wider bandgap range is expected to be available and the high quality material obtained through lattice matching could enable applications such as monolithic color displays, high efficiency multi-junction solar cells, opto-electronic integrated circuits for fiber communications, and the transfer of existing 3-5 technology to silicon.

RF performances of inductors integrated on localized p+-type porous silicon regions

PubMed Central

2012-01-01

To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate. PMID:23009746

Fabrication and demonstration of 1 × 8 silicon-silica multi-chip switch based on optical phased array

NASA Astrophysics Data System (ADS)

Katayose, Satomi; Hashizume, Yasuaki; Itoh, Mikitaka

2016-08-01

We experimentally demonstrated a 1 × 8 silicon-silica hybrid thermo-optic switch based on an optical phased array using a multi-chip integration technique. The switch consists of a silicon chip with optical phase shifters and two silica-based planar lightwave circuit (PLC) chips composed of optical couplers and fiber connections. We adopted a rib waveguide as the silicon waveguide to reduce the coupling loss and increase the alignment tolerance for coupling between silicon and silica waveguides. As a result, we achieved a fast switching response of 81 µs, a high extinction ratio of over 18 dB and a low insertion loss of 4.9-8.1 dB including a silicon-silica coupling loss of 0.5 ± 0.3 dB at a wavelength of 1.55 µm.

Infrared transparent graphene heater for silicon photonic integrated circuits.

PubMed

Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

2016-04-18

Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

Semi-transparent solar cells

NASA Astrophysics Data System (ADS)

Sun, J.; Jasieniak, J. J.

2017-03-01

Semi-transparent solar cells are a type of technology that combines the benefits of visible light transparency and light-to-electricity conversion. One of the biggest opportunities for such technologies is in their integration as windows and skylights within energy-sustainable buildings. Currently, such building integrated photovoltaics (BIPV) are dominated by crystalline silicon based modules; however, the opaque nature of silicon creates a unique opportunity for the adoption of emerging photovoltaic candidates that can be made truly semi-transparent. These include: amorphous silicon-, kesterite-, chalcopyrite-, CdTe-, dye-sensitized-, organic- and perovskite- based systems. For the most part, amorphous silicon has been the workhorse in the semi-transparent solar cell field owing to its established, low-temperature fabrication processes. Excitement around alternative classes, particularly perovskites and the inorganic candidates, has recently arisen because of the major efficiency gains exhibited by these technologies. Importantly, each of these presents unique opportunities and challenges within the context of BIPV. This topic review provides an overview into the broader benefits of semi-transparent solar cells as building-integrated features, as well as providing the current development status into all of the major types of semi-transparent solar cells technologies.

1.55 μm room-temperature lasing from subwavelength quantum-dot microdisks directly grown on (001) Si

NASA Astrophysics Data System (ADS)

Shi, Bei; Zhu, Si; Li, Qiang; Tang, Chak Wah; Wan, Yating; Hu, Evelyn L.; Lau, Kei May

2017-03-01

Miniaturized laser sources can benefit a wide variety of applications ranging from on-chip optical communications and data processing, to biological sensing. There is a tremendous interest in integrating these lasers with rapidly advancing silicon photonics, aiming to provide the combined strength of the optoelectronic integrated circuits and existing large-volume, low-cost silicon-based manufacturing foundries. Using III-V quantum dots as the active medium has been proven to lower power consumption and improve device temperature stability. Here, we demonstrate room-temperature InAs/InAlGaAs quantum-dot subwavelength microdisk lasers epitaxially grown on (001) Si, with a lasing wavelength of 1563 nm, an ultralow-threshold of 2.73 μW, and lasing up to 60 °C under pulsed optical pumping. This result unambiguously offers a promising path towards large-scale integration of cost-effective and energy-efficient silicon-based long-wavelength lasers.

CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization

PubMed Central

Wolfrum, Bernhard; Thierry, Benjamin

2018-01-01

Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs’ promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology. PMID:29751688

Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

2016-11-01

Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

Silicon sample holder for molecular beam epitaxy on pre-fabricated integrated circuits

NASA Technical Reports Server (NTRS)

Hoenk, Michael E. (Inventor); Grunthaner, Paula J. (Inventor); Grunthaner, Frank J. (Inventor)

1994-01-01

The sample holder of the invention is formed of the same semiconductor crystal as the integrated circuit on which the molecular beam expitaxial process is to be performed. In the preferred embodiment, the sample holder comprises three stacked micro-machined silicon wafers: a silicon base wafer having a square micro-machined center opening corresponding in size and shape to the active area of a CCD imager chip, a silicon center wafer micro-machined as an annulus having radially inwardly pointing fingers whose ends abut the edges of and center the CCD imager chip within the annulus, and a silicon top wafer micro-machined as an annulus having cantilevered membranes which extend over the top of the CCD imager chip. The micro-machined silicon wafers are stacked in the order given above with the CCD imager chip centered in the center wafer and sandwiched between the base and top wafers. The thickness of the center wafer is about 20% less than the thickness of the CCD imager chip. Preferably, four titanium wires, each grasping the edges of the top and base wafers, compress all three wafers together, flexing the cantilever fingers of the top wafer to accommodate the thickness of the CCD imager chip, acting as a spring holding the CCD imager chip in place.

Wire-bonder-assisted integration of non-bondable SMA wires into MEMS substrates

NASA Astrophysics Data System (ADS)

Fischer, A. C.; Gradin, H.; Schröder, S.; Braun, S.; Stemme, G.; van der Wijngaart, W.; Niklaus, F.

2012-05-01

This paper reports on a novel technique for the integration of NiTi shape memory alloy wires and other non-bondable wire materials into silicon-based microelectromechanical system structures using a standard wire-bonding tool. The efficient placement and alignment functions of the wire-bonding tool are used to mechanically attach the wire to deep-etched silicon anchoring and clamping structures. This approach enables a reliable and accurate integration of wire materials that cannot be wire bonded by traditional means.

Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s.

PubMed

Kim, Gyungock; Park, Jeong Woo; Kim, In Gyoo; Kim, Sanghoon; Kim, Sanggi; Lee, Jong Moo; Park, Gun Sik; Joo, Jiho; Jang, Ki-Seok; Oh, Jin Hyuk; Kim, Sun Ae; Kim, Jong Hoon; Lee, Jun Young; Park, Jong Moon; Kim, Do-Won; Jeong, Deog-Kyoon; Hwang, Moon-Sang; Kim, Jeong-Kyoum; Park, Kyu-Sang; Chi, Han-Kyu; Kim, Hyun-Chang; Kim, Dong-Wook; Cho, Mu Hee

2011-12-19

We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s. Under differential drive of low-voltage 1.2 V(pp), the integrated 1 mm-phase-shifter modulator in the PIC(off-chip) demonstrated an extinction ratio (ER) of 10.5dB for 12.5 Gb/s, an ER of 9.1dB for 20 Gb/s, and an ER of 7.2 dB for 30 Gb/s operation, without adoption of travelling-wave electrodes. The device showed the modulation efficiency of V(π)L(π) ~1.59 Vcm, and the phase-shifter loss of 3.2 dB/mm for maximum optical transmission. The Ge photodetector, which allows simpler integration process based on reduced pressure chemical vapor deposition exhibited operation over 30 Gb/s with a low dark current of 700 nA at -1V. The fabricated silicon PIC(intra-chip) for on-chip (intra-chip) photonic interconnects, where the monolithically integrated modulator and Ge photodetector were connected by a silicon waveguide on the same chip, showed on-chip data transmissions up to 20 Gb/s, indicating potential application in future silicon on-chip optical network. We also report the performance of the hybrid silicon electronic-photonic IC (EPIC), where a PIC(intra-chip) chip and 0.13μm CMOS interface IC chips were hybrid-integrated.

Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics.

PubMed

Rao, Sandro; Pangallo, Giovanni; Della Corte, Francesco Giuseppe

2016-01-06

Hydrogenated amorphous silicon (a-Si:H) shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34-40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

A Ratiometric Wavelength Measurement Based on a Silicon-on-Insulator Directional Coupler Integrated Device

PubMed Central

Wang, Pengfei; Hatta, Agus Muhamad; Zhao, Haoyu; Zheng, Jie; Farrell, Gerald; Brambilla, Gilberto

2015-01-01

A ratiometric wavelength measurement based on a Silicon-on-Insulator (SOI) integrated device is proposed and designed, which consists of directional couplers acting as two edge filters with opposite spectral responses. The optimal separation distance between two parallel silicon waveguides and the interaction length of the directional coupler are designed to meet the desired spectral response by using local supermodes. The wavelength discrimination ability of the designed ratiometric structure is demonstrated by a beam propagation method numerically and then is verified experimentally. The experimental results have shown a general agreement with the theoretical models. The ratiometric wavelength system demonstrates a resolution of better than 50 pm at a wavelength around 1550 nm with ease of assembly and calibration. PMID:26343668

FIBER AND INTEGRATED OPTICS: New type of heterogeneous nanophotonic silicon-on-insulator optical waveguides

NASA Astrophysics Data System (ADS)

Tsarev, Andrei V.

2007-08-01

A new type of optical waveguides in silicon-on-insulator nanostructures is proposed and studied. Their optical properties are simulated by the beam propagation method and discussed. A new design in the form of heterogeneous waveguide structures is based on the production of additionally heavily doped p+-regions on the sides of a multimode stripe waveguide (the silicon core cross section is ~200 nm × 16 μm). Such doping provides the 'single-mode' behaviour of the heterogeneous waveguide due to the decrease in the optical losses for the fundamental mode and increase in losses for higher-order modes. Single-mode heterogeneous waveguides can be used as base waveguides in photonic and integrated optical elements.

Photothermally tunable silicon-microring-based optical add-drop filter through integrated light absorber.

PubMed

Chen, Xi; Shi, Yuechun; Lou, Fei; Chen, Yiting; Yan, Min; Wosinski, Lech; Qiu, Min

2014-10-20

An optically pumped thermo-optic (TO) silicon ring add-drop filter with fast thermal response is experimentally demonstrated. We propose that metal-insulator-metal (MIM) light absorber can be integrated into silicon TO devices, acting as a localized heat source which can be activated remotely by a pump beam. The MIM absorber design introduces less thermal capacity to the device, compared to conventional electrically-driven approaches. Experimentally, the absorber-integrated add-drop filter shows an optical response time of 13.7 μs following the 10%-90% rule (equivalent to a exponential time constant of 5 μs) and a wavelength shift over pump power of 60 pm/mW. The photothermally tunable add-drop filter may provide new perspectives for all-optical routing and switching in integrated Si photonic circuits.

Polymer waveguide grating sensor integrated with a thin-film photodetector

PubMed Central

Song, Fuchuan; Xiao, Jing; Xie, Antonio Jou; Seo, Sang-Woo

2014-01-01

This paper presents a planar waveguide grating sensor integrated with a photodetector (PD) for on-chip optical sensing systems which are suitable for diagnostics in the field and in-situ measurements. III–V semiconductor-based thin-film PD is integrated with a polymer based waveguide grating device on a silicon platform. The fabricated optical sensor successfully discriminates optical spectral characteristics of the polymer waveguide grating from the on-chip PD. In addition, its potential use as a refractive index sensor is demonstrated. Based on a planar waveguide structure, the demonstrated sensor chip may incorporate multiple grating waveguide sensing regions with their own optical detection PDs. In addition, the demonstrated processing is based on a post-integration process which is compatible with silicon complementary metal-oxide semiconductor (CMOS) electronics. Potentially, this leads a compact, chip-scale optical sensing system which can monitor multiple physical parameters simultaneously without need for external signal processing. PMID:24466407

Organization of the Integrated Photonics Topical Meeting Held in Victoria, British Columbia on 30 March-1 April 1998. Technical Digest Series. Volume 4. Postconference Edition

DTIC Science & Technology

1999-03-22

amplifiers fabricated on Si substrates by co- sputtering, (p. 27) 11:30am IMC3 ■ Birefrlngent oxidized porous silicon-based optical waveguides, Yu. N...that integrated optical waveguides based on oxidized porous silicon have a relatively large birefringence. As a result, the modes of both... Membrane microresonator lasers with 2-D photonic bandgap crystal mirrors for compact in- plane optics, B. D’Urso, O. Painter, A. Yariv, A. Scherer

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

NASA Astrophysics Data System (ADS)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

Design and fabrication of a foldable 3D silicon based package for solid state lighting applications

NASA Astrophysics Data System (ADS)

Sokolovskij, R.; Liu, P.; van Zeijl, H. W.; Mimoun, B.; Zhang, G. Q.

2015-05-01

Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies.

Integration of lateral porous silicon membranes into planar microfluidics.

PubMed

Leïchlé, Thierry; Bourrier, David

2015-02-07

In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

Research and development of low cost processes for integrated solar arrays. Final report, April 15, 1974--January 14, 1976

DOE Office of Scientific and Technical Information (OSTI.GOV)

Graham, C.D.; Kulkarni, S.; Louis, E.

1976-05-01

Results of a program to study process routes leading to a low cost large area integrated silicon solar array manufacture for terrestrial applications are reported. Potential processes for the production of solar-grade silicon are evaluated from thermodynamic, economic, and technical feasibility points of view. Upgrading of the present arc-furnace process is found most favorable. Experimental studies of the Si/SiF/sub 4/ transport and purification process show considerable impurity removal and reasonable transport rates. Silicon deformation experiments indicate production of silicon sheet by rolling at 1350/sup 0/C is feasible. Significant recrystallization by strain-anneal technique has been observed. Experimental recrystallization studies using anmore » electron beam line source are discussed. A maximum recrystallization velocity of approximately 9 m/hr is calculated for silicon sheet. A comparative process rating technique based on detailed cost analysis is presented.« less

Nanobonding: A key technology for emerging applications in health and environmental sciences

NASA Astrophysics Data System (ADS)

Howlader, Matiar M. R.; Deen, M. Jamal; Suga, Tadatomo

2015-03-01

In this paper, surface-activation-based nanobonding technology and its applications are described. This bonding technology allows for the integration of electronic, photonic, fluidic and mechanical components into small form-factor systems for emerging sensing and imaging applications in health and environmental sciences. Here, we describe four different nanobonding techniques that have been used for the integration of various substrates — silicon, gallium arsenide, glass, and gold. We use these substrates to create electronic (silicon), photonic (silicon and gallium arsenide), microelectromechanical (glass and silicon), and fluidic (silicon and glass) components for biosensing and bioimaging systems being developed. Our nanobonding technologies provide void-free, strong, and nanometer scale bonding at room temperature or at low temperatures (<200 °C), and do not require chemicals, adhesives, or high external pressure. The interfaces of the nanobonded materials in ultra-high vacuum and in air correspond to covalent bonds, and hydrogen or hydroxyl bonds, respectively.

Reducing Stiffness and Electrical Losses of High Channel Hybrid Nerve Cuff Electrodes

DTIC Science & Technology

2001-10-25

Electrodes were developed. These electrodes consisted of a micromachined polyimide -based thin-film structure with integrated electrode contacts and...electrodes, mechanical properties were enhanced by changing the method of joining silicone and polyimide from using one part silicone adhesive to...gold, platinum, platinum black, polyimide , silicone, polymer bonding I. INTRODUCTION Cuff-type electrodes are probably the most commonly used neural

Nanostructured Silicon Used for Flexible and Mobile Electricity Generation.

PubMed

Sun, Baoquan; Shao, Mingwang; Lee, Shuitong

2016-12-01

The use of nanostructured silicon for the generation of electricity in flexible and mobile devices is reviewed. This field has attracted widespread interest in recent years due to the emergence of plastic electronics. Such developments are likely to alter the nature of power sources in the near future. For example, flexible photovoltaic cells can supply electricity to rugged and collapsible electronics, biomedical devices, and conformable solar panels that are integrated with the curved surfaces of vehicles or buildings. Here, the unique optical and electrical properties of nanostructured silicon are examined, with regard to how they can be exploited in flexible photovoltaics, thermoelectric generators, and piezoelectric devices, which serve as power generators. Particular emphasis is placed on organic-silicon heterojunction photovoltaic devices, silicon-nanowire-based thermoelectric generators, and core-shell silicon/silicon oxide nanowire-based piezoelectric devices, because they are flexible, lightweight, and portable. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

SiNOI and AlGaAs-on-SOI nonlinear circuits for continuum generation in Si photonics

NASA Astrophysics Data System (ADS)

El Dirani, Houssein; Monat, Christelle; Brision, Stéphane; Olivier, Nicolas; Jany, Christophe; Letartre, Xavier; Pu, Minhao; Girouard, Peter D.; Hagedorn Frandsen, Lars; Semenova, Elizaveta; Katsuo Oxenløwe, Leif; Yvind, Kresten; Sciancalepore, Corrado

2018-02-01

In this communication, we report on the design, fabrication, and testing of Silicon Nitride on Insulator (SiNOI) and Aluminum-Gallium-Arsenide (AlGaAs) on silicon-on-insulator (SOI) nonlinear photonic circuits for continuum generation in Silicon (Si) photonics. As recently demonstrated, the generation of frequency continua and supercontinua can be used to overcome the intrinsic limitations of nowadays silicon photonics notably concerning the heterogeneous integration of III-V on SOI lasers for datacom and telecom applications. By using the Kerr nonlinearity of monolithic silicon nitride and heterointegrated GaAs-based alloys on SOI, the generation of tens or even hundreds of new optical frequencies can be obtained in dispersion tailored waveguides, thus providing an all-optical alternative to the heterointegration of hundreds of standalone III-V on Si lasers. In our work, we present paths to energy-efficient continua generation on silicon photonics circuits. Notably, we demonstrate spectral broadening covering the full C-band via Kerrbased self-phase modulation in SiNOI nanowires featuring full process compatibility with Si photonic devices. Moreover, AlGaAs waveguides are heterointegrated on SOI in order to dramatically reduce (x1/10) thresholds in optical parametric oscillation and in the power required for supercontinuum generation under pulsed pumping. The manufacturing techniques allowing the monolithic co-integration of nonlinear functionalities on existing CMOS-compatible Si photonics for both active and passive components will be shown. Experimental evidence based on self-phase modulation show SiNOI and AlGaAs nanowires capable of generating wide-spanning frequency continua in the C-Band. This will pave the way for low-threshold power-efficient Kerr-based comb- and continuum- sources featuring compatibility with Si photonic integrated circuits (Si-PICs).

Silicon-nanomembrane-based photonic crystal nanostructures for chip-integrated open sensor systems

NASA Astrophysics Data System (ADS)

Chakravarty, Swapnajit; Lai, Wei-Cheng; Zou, Yi; Lin, Cheyun; Wang, Xiaolong; Chen, Ray T.

2011-11-01

We experimentally demonstrate two devices on the photonic crystal platform for chip-integrated optical absorption spectroscopy and chip-integrated biomolecular microarray assays. Infrared optical absorption spectroscopy and biomolecular assays based on conjugate-specific binding principles represent two dominant sensing mechanisms for a wide spectrum of applications in environmental pollution sensing in air and water, chem-bio agents and explosives detection for national security, microbial contamination sensing in food and beverages to name a few. The easy scalability of photonic crystal devices to any wavelength ensures that the sensing principles hold across a wide electromagnetic spectrum. Silicon, the workhorse of the electronics industry, is an ideal platform for the above optical sensing applications.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

Waveguide silicon nitride grating coupler

NASA Astrophysics Data System (ADS)

Litvik, Jan; Dolnak, Ivan; Dado, Milan

2016-12-01

Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

Hybrid integration of III-V semiconductor lasers on silicon waveguides using optofluidic microbubble manipulation

PubMed Central

Jung, Youngho; Shim, Jaeho; Kwon, Kyungmook; You, Jong-Bum; Choi, Kyunghan; Yu, Kyoungsik

2016-01-01

Optofluidic manipulation mechanisms have been successfully applied to micro/nano-scale assembly and handling applications in biophysics, electronics, and photonics. Here, we extend the laser-based optofluidic microbubble manipulation technique to achieve hybrid integration of compound semiconductor microdisk lasers on the silicon photonic circuit platform. The microscale compound semiconductor block trapped on the microbubble surface can be precisely assembled on a desired position using photothermocapillary convective flows induced by focused laser beam illumination. Strong light absorption within the micro-scale compound semiconductor object allows real-time and on-demand microbubble generation. After the assembly process, we verify that electromagnetic radiation from the optically-pumped InGaAsP microdisk laser can be efficiently coupled to the single-mode silicon waveguide through vertical evanescent coupling. Our simple and accurate microbubble-based manipulation technique may provide a new pathway for realizing high precision fluidic assembly schemes for heterogeneously integrated photonic/electronic platforms as well as microelectromechanical systems. PMID:27431769

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit.

PubMed

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-21

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10 -9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

NASA Astrophysics Data System (ADS)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-12-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10-9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

PubMed Central

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J.; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif Katsuo

2016-01-01

Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7 × 7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than −30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing switching is demonstrated successfully. Bit error rate performance below 10−9 is obtained for all spatial channels with low power penalty. The proposed design can be easily upgraded to reconfigurable optical add/drop multiplexer capable of switching several multicore fibers. PMID:28000735

Nano-islands integrated evanescence-based lab-on-a-chip on silica-on-silicon and polydimethylsiloxane hybrid platform for detection of recombinant growth hormone

PubMed Central

Ozhikandathil, J.; Packirisamy, M.

2012-01-01

Integration of nano-materials in optical microfluidic devices facilitates the realization of miniaturized analytical systems with enhanced sensing abilities for biological and chemical substances. In this work, a novel method of integration of gold nano-islands in a silica-on-silicon-polydimethylsiloxane microfluidic device is reported. The device works based on the nano-enhanced evanescence technique achieved by interacting the evanescent tail of propagating wave with the gold nano-islands integrated on the core of the waveguide resulting in the modification of the propagating UV-visible spectrum. The biosensing ability of the device is investigated by finite-difference time-domain simulation with a simplified model of the device. The performance of the proposed device is demonstrated for the detection of recombinant growth hormone based on antibody-antigen interaction. PMID:24106526

Lasing in silicon–organic hybrid waveguides

PubMed Central

Korn, Dietmar; Lauermann, Matthias; Koeber, Sebastian; Appel, Patrick; Alloatti, Luca; Palmer, Robert; Dumon, Pieter; Freude, Wolfgang; Leuthold, Juerg; Koos, Christian

2016-01-01

Silicon photonics enables large-scale photonic–electronic integration by leveraging highly developed fabrication processes from the microelectronics industry. However, while a rich portfolio of devices has already been demonstrated on the silicon platform, on-chip light sources still remain a key challenge since the indirect bandgap of the material inhibits efficient photon emission and thus impedes lasing. Here we demonstrate a class of infrared lasers that can be fabricated on the silicon-on-insulator (SOI) integration platform. The lasers are based on the silicon–organic hybrid (SOH) integration concept and combine nanophotonic SOI waveguides with dye-doped organic cladding materials that provide optical gain. We demonstrate pulsed room-temperature lasing with on-chip peak output powers of up to 1.1 W at a wavelength of 1,310 nm. The SOH approach enables efficient mass-production of silicon photonic light sources emitting in the near infrared and offers the possibility of tuning the emission wavelength over a wide range by proper choice of dye materials and resonator geometry. PMID:26949229

Silicon technology-based micro-systems for atomic force microscopy/photon scanning tunnelling microscopy.

PubMed

Gall-Borrut, P; Belier, B; Falgayrettes, P; Castagne, M; Bergaud, C; Temple-Boyer, P

2001-04-01

We developed silicon nitride cantilevers integrating a probe tip and a wave guide that is prolonged on the silicon holder with one or two guides. A micro-system is bonded to a photodetector. The resulting hybrid system enables us to obtain simultaneously topographic and optical near-field images. Examples of images obtained on a longitudinal cross-section of an optical fibre are shown.

Ultra-fast photon counting with a passive quenching silicon photomultiplier in the charge integration regime

NASA Astrophysics Data System (ADS)

Zhang, Guoqing; Lina, Liu

2018-02-01

An ultra-fast photon counting method is proposed based on the charge integration of output electrical pulses of passive quenching silicon photomultipliers (SiPMs). The results of the numerical analysis with actual parameters of SiPMs show that the maximum photon counting rate of a state-of-art passive quenching SiPM can reach ~THz levels which is much larger than that of the existing photon counting devices. The experimental procedure is proposed based on this method. This photon counting regime of SiPMs is promising in many fields such as large dynamic light power detection.

Tiny surface plasmon resonance sensor integrated on silicon waveguide based on vertical coupling into finite metal-insulator-metal plasmonic waveguide.

PubMed

Lee, Dong-Jin; Yim, Hae-Dong; Lee, Seung-Gol; O, Beom-Hoan

2011-10-10

We propose a tiny surface plasmon resonance (SPR) sensor integrated on a silicon waveguide based on vertical coupling into a finite thickness metal-insulator-metal (f-MIM) plasmonic waveguide structure acting as a Fabry-Perot resonator. The resonant characteristics of vertically coupled f-MIM plasmonic waveguides are theoretically investigated and optimized. Numerical results show that the SPR sensor with a footprint of ~0.0375 μm2 and a sensitivity of ~635 nm/RIU can be designed at a 1.55 μm transmission wavelength.

Graphene-silicon phase modulators with gigahertz bandwidth

NASA Astrophysics Data System (ADS)

Sorianello, V.; Midrio, M.; Contestabile, G.; Asselberghs, I.; Van Campenhout, J.; Huyghebaert, C.; Goykhman, I.; Ott, A. K.; Ferrari, A. C.; Romagnoli, M.

2018-01-01

The modulator is a key component in optical communications. Several graphene-based amplitude modulators have been reported based on electro-absorption. However, graphene phase modulators (GPMs) are necessary for functions such as applying complex modulation formats or making switches or phased arrays. Here, we present a 10 Gb s-1 GPM integrated in a Mach-Zehnder interferometer configuration. This is a compact device based on a graphene-insulator-silicon capacitor, with a phase-shifter length of 300 μm and extinction ratio of 35 dB. The GPM has a modulation efficiency of 0.28 V cm at 1,550 nm. It has 5 GHz electro-optical bandwidth and operates at 10 Gb s-1 with 2 V peak-to-peak driving voltage in a push-pull configuration for binary transmission of a non-return-to-zero data stream over 50 km of single-mode fibre. This device is the key building block for graphene-based integrated photonics, enabling compact and energy-efficient hybrid graphene-silicon modulators for telecom, datacom and other applications.

Fabrication of a silver particle-integrated silicone polymer-covered metal stent against sludge and biofilm formation and stent-induced tissue inflammation

PubMed Central

Lee, Tae Hoon; Jang, Bong Seok; Jung, Min Kyo; Pack, Chan Gi; Choi, Jun-Ho; Park, Do Hyun

2016-01-01

To reduce tissue or tumor ingrowth, covered self-expandable metal stents (SEMSs) have been developed. The effectiveness of covered SEMSs may be attenuated by sludge or stone formation or by stent clogging due to the formation of biofilm on the covering membrane. In this study, we tested the hypothesis that a silicone membrane containing silver particles (Ag-P) would prevent sludge and biofilm formation on the covered SEMS. In vitro, the Ag-P-integrated silicone polymer-covered membrane exhibited sustained antibacterial activity, and there was no definite release of silver ions from the Ag-P-integrated silicone polymer membrane at any time point. Using a porcine stent model, in vivo analysis demonstrated that the Ag-P-integrated silicone polymer-covered SEMS reduced the thickness of the biofilm and the quantity of sludge formed, compared with a conventional silicone-covered SEMS. In vivo, the release of silver ions from an Ag-P-integrated silicone polymer-covered SEMS was not detected in porcine serum. The Ag-P-integrated silicone polymer-covered SEMS also resulted in significantly less stent-related bile duct and subepithelium tissue inflammation than a conventional silicone polymer-covered SEMS. Therefore, the Ag-P-integrated silicone polymer-covered SEMS reduced sludge and biofilm formation and stent-induced pathological changes in tissue. This novel SEMS may prolong the stent patency in clinical application. PMID:27739486

Fabrication of a silver particle-integrated silicone polymer-covered metal stent against sludge and biofilm formation and stent-induced tissue inflammation.

PubMed

Lee, Tae Hoon; Jang, Bong Seok; Jung, Min Kyo; Pack, Chan Gi; Choi, Jun-Ho; Park, Do Hyun

2016-10-14

To reduce tissue or tumor ingrowth, covered self-expandable metal stents (SEMSs) have been developed. The effectiveness of covered SEMSs may be attenuated by sludge or stone formation or by stent clogging due to the formation of biofilm on the covering membrane. In this study, we tested the hypothesis that a silicone membrane containing silver particles (Ag-P) would prevent sludge and biofilm formation on the covered SEMS. In vitro, the Ag-P-integrated silicone polymer-covered membrane exhibited sustained antibacterial activity, and there was no definite release of silver ions from the Ag-P-integrated silicone polymer membrane at any time point. Using a porcine stent model, in vivo analysis demonstrated that the Ag-P-integrated silicone polymer-covered SEMS reduced the thickness of the biofilm and the quantity of sludge formed, compared with a conventional silicone-covered SEMS. In vivo, the release of silver ions from an Ag-P-integrated silicone polymer-covered SEMS was not detected in porcine serum. The Ag-P-integrated silicone polymer-covered SEMS also resulted in significantly less stent-related bile duct and subepithelium tissue inflammation than a conventional silicone polymer-covered SEMS. Therefore, the Ag-P-integrated silicone polymer-covered SEMS reduced sludge and biofilm formation and stent-induced pathological changes in tissue. This novel SEMS may prolong the stent patency in clinical application.

Widely-tunable, narrow-linewidth III-V/silicon hybrid external-cavity laser for coherent communication.

PubMed

Guan, Hang; Novack, Ari; Galfsky, Tal; Ma, Yangjin; Fathololoumi, Saeed; Horth, Alexandre; Huynh, Tam N; Roman, Jose; Shi, Ruizhi; Caverley, Michael; Liu, Yang; Baehr-Jones, Thomas; Bergman, Keren; Hochberg, Michael

2018-04-02

We demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm at the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling the silicon chip through a Si 3 N 4 spot size converter. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. The laser has a largest output power of 11 mW with a maximum wall-plug efficiency of 4.2%, tunability of 60 nm (more than covering the C-band), and a side-mode suppression ratio of 55 dB (>46 dB across the C-band). The lowest measured linewidth is 37 kHz (<80 kHz across the C-band), which is the narrowest linewidth using a silicon-based external cavity. In addition, we successfully demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. To the best of our knowledge, this is the first experimental demonstration of a complete silicon photonic based coherent link. This is also the first experimental demonstration of >250 Gb/s coherent optical transmission using a silicon micro-ring-based tunable laser.

Materials and processing approaches for foundry-compatible transient electronics.

PubMed

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A; Song, Enming; Yu, Xinge; Rogers, John A

2017-07-11

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for "green" electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are ( i ) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, ( ii ) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and ( iii ) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Materials and processing approaches for foundry-compatible transient electronics

NASA Astrophysics Data System (ADS)

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-07-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Magneto-optical non-reciprocal devices in silicon photonics

PubMed Central

Shoji, Yuya; Mizumoto, Tetsuya

2014-01-01

Silicon waveguide optical non-reciprocal devices based on the magneto-optical effect are reviewed. The non-reciprocal phase shift caused by the first-order magneto-optical effect is effective in realizing optical non-reciprocal devices in silicon waveguide platforms. In a silicon-on-insulator waveguide, the low refractive index of the buried oxide layer enhances the magneto-optical phase shift, which reduces the device footprints. A surface activated direct bonding technique was developed to integrate a magneto-optical garnet crystal on the silicon waveguides. A silicon waveguide optical isolator based on the magneto-optical phase shift was demonstrated with an optical isolation of 30 dB and insertion loss of 13 dB at a wavelength of 1548 nm. Furthermore, a four port optical circulator was demonstrated with maximum isolations of 15.3 and 9.3 dB in cross and bar ports, respectively, at a wavelength of 1531 nm. PMID:27877640

Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

PubMed

Dai, Daoxin; Mao, Mao

2015-11-02

An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

Nanocrystalline silicon thin films and grating structures for solar cells

NASA Astrophysics Data System (ADS)

Juneja, Sucheta; Sudhakar, Selvakumar; Khonina, Svetlana N.; Skidanov, Roman V.; Porfirevb, Alexey P.; Moissev, Oleg Y.; Kazanskiy, Nikolay L.; Kumar, Sushil

2016-03-01

Enhancement of optical absorption for achieving high efficiencies in thin film silicon solar cells is a challenge task. Herein, we present the use of grating structure for the enhancement of optical absorption. We have made grating structures and same can be integrated in hydrogenated micro/nanocrystalline silicon (μc/nc-Si: H) thin films based p-i-n solar cells. μc/nc-Si: H thin films were grown using plasma enhanced chemical vapor deposition method. Grating structures integrated with μc/nc-Si: H thin film solar cells may enhance the optical path length and reduce the reflection losses and its characteristics can be probed by spectroscopic and microscopic technique with control design and experiment.

A special purpose silicon compiler for designing supercomputing VLSI systems

NASA Technical Reports Server (NTRS)

Venkateswaran, N.; Murugavel, P.; Kamakoti, V.; Shankarraman, M. J.; Rangarajan, S.; Mallikarjun, M.; Karthikeyan, B.; Prabhakar, T. S.; Satish, V.; Venkatasubramaniam, P. R.

1991-01-01

Design of general/special purpose supercomputing VLSI systems for numeric algorithm execution involves tackling two important aspects, namely their computational and communication complexities. Development of software tools for designing such systems itself becomes complex. Hence a novel design methodology has to be developed. For designing such complex systems a special purpose silicon compiler is needed in which: the computational and communicational structures of different numeric algorithms should be taken into account to simplify the silicon compiler design, the approach is macrocell based, and the software tools at different levels (algorithm down to the VLSI circuit layout) should get integrated. In this paper a special purpose silicon (SPS) compiler based on PACUBE macrocell VLSI arrays for designing supercomputing VLSI systems is presented. It is shown that turn-around time and silicon real estate get reduced over the silicon compilers based on PLA's, SLA's, and gate arrays. The first two silicon compiler characteristics mentioned above enable the SPS compiler to perform systolic mapping (at the macrocell level) of algorithms whose computational structures are of GIPOP (generalized inner product outer product) form. Direct systolic mapping on PLA's, SLA's, and gate arrays is very difficult as they are micro-cell based. A novel GIPOP processor is under development using this special purpose silicon compiler.

Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

NASA Astrophysics Data System (ADS)

Fu, Enjin

Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier injection modulators and light-emitting diodes (LED) with drive voltage requirements below 1.5V. Measurement results show an optical link based on a 70MHz red LED work well at 300Mbps by using the pre-emphasis driver module. A traveling wave electrode (TWE) modulator structure is presented, including a novel design methodology to address process limitations imposed by a commercial silicon fabrication technology. Results from 3D full wave EM simulation demonstrate the application of the design methodology to achieve specifications, including phase velocity matching, insertion loss, and impedance matching. Results show the HBT-based TWE-EAM system has the bandwidth higher than 60GHz.

A polymer-based Fabry-Perot filter integrated with 3-D MEMS structures

NASA Astrophysics Data System (ADS)

Zhang, Ping (Cerina); Le, Kevin; Malalur-Nagaraja-Rao, Smitha; Hsu, Lun-Chen; Chiao, J.-C.

2006-01-01

Polymers have been considered as one of the most versatile materials in making optical devices for communication and sensor applications. They provide good optical transparency to form filters, lenses and many optical components with ease of fabrication. They are scalable and compatible in dimensions with requirements in optics and can be fabricated on inorganic substrates, such as silicon and quartz. Recent polymer synthesis also made great progresses on conductive and nonlinear polymers, opening opportunities for new applications. In this paper, we discussed hybrid-material integration of polymers on silicon-based microelectromechanical system (MEMS) devices. The motivation is to combine the advantages of demonstrated silicon-based MEMS actuators and excellent optical performance of polymers. We demonstrated the idea with a polymer-based out-of-plane Fabry-Perot filter that can be self-assembled by scratch drive actuators. We utilized a fabrication foundry service, MUMPS (Multi-User MEMS Process), to demonstrate the feasibility and flexibility of integration. The polysilicon, used as the structural material for construction of 3-D framework and actuators, has high absorption in the visible and near infrared ranges. Therefore, previous efforts using a polysilicon layer as optical interfaces suffer from high losses. We applied the organic compound materials on the silicon-based framework within the optical signal propagation path to form the optical interfaces. In this paper, we have shown low losses in the optical signal processing and feasibility of building a thin-film Fabry-Perot filter. We discussed the optical filter designs, mechanical design, actuation mechanism, fabrication issues, optical measurements, and results.

Piezoresistive silicon nanowire resonators as embedded building blocks in thick SOI

NASA Astrophysics Data System (ADS)

Nasr Esfahani, Mohammad; Kilinc, Yasin; Çagatay Karakan, M.; Orhan, Ezgi; Hanay, M. Selim; Leblebici, Yusuf; Erdem Alaca, B.

2018-04-01

The use of silicon nanowire resonators in nanoelectromechanical systems for new-generation sensing and communication devices faces integration challenges with higher-order structures. Monolithic and deterministic integration of such nanowires with the surrounding microscale architecture within the same thick crystal is a critical aspect for the improvement of throughput, reliability and device functionality. A monolithic and IC-compatible technology based on a tuned combination of etching and protection processes was recently introduced yielding silicon nanowires within a 10 μ m-thick device layer. Motivated by its success, the implications of the technology regarding the electromechanical resonance are studied within a particular setting, where the resonator is co-fabricated with all terminals and tuning electrodes. Frequency response is measured via piezoresistive readout with frequency down-mixing. Measurements indicate mechanical resonance with frequencies as high as 100 MHz exhibiting a Lorentzian behavior with proper transition to nonlinearity, while Allan deviation on the order of 3-8 ppm is achieved. Enabling the fabrication of silicon nanowires in thick silicon crystals using conventional semiconductor manufacturing, the present study thus demonstrates an alternative pathway to bottom-up and thin silicon-on-insulator approaches for silicon nanowire resonators.

UV-visible sensors based on polymorphous silicon

NASA Astrophysics Data System (ADS)

Guedj, Cyril S.; Cabarrocas, Pere R. i.; Massoni, Nicolas; Moussy, Norbert; Morel, Damien; Tchakarov, Svetoslav; Bonnassieux, Yvan

2003-09-01

UV-based imaging systems can be used for low-altitude rockets detection or biological agents identification (for instance weapons containing ANTHRAX). Compared to conventional CCD technology, CMOS-based active pixel sensors provide several advantages, including excellent electro-optical performances, high integration, low voltage operation, low power consumption, low cost, long lifetime, and robustness against environment. The monolithic integration of UV, visible and infrared detectors on the same uncooled CMOS smart system would therefore represent a major advance in the combat field, for characterization and representation of targets and backgrounds. In this approach, we have recently developped a novel technology using polymorphous silicon. This new material, fully compatible with above-IC silicon technology, is made of nanometric size ordered domains embedded in an amorphous matrix. The typical quantum efficiency of detectors made of this nano-material reach up to 80 % at 550 nm and 30 % in the UV range, depending of the design and the growth parameters. Furthermore, a record dark current of 20 pA/cm2 at -3 V has been reached. In addition, this new generation of sensors is significantly faster and more stable than their amorphous silicon counterparts. In this paper, we will present the relationship between the sensor technology and the overall performances.

Embedding solar cell materials with on-board integrated energy storage for load-leveling and dark power delivery (Presentation Recording)

NASA Astrophysics Data System (ADS)

Pint, Cary L.; Westover, Andrew S.; Cohn, Adam P.; Erwin, William R.; Share, Keith; Metke, Thomas; Bardhan, Rizia

2015-10-01

This work will discuss our recent advances focused on integrating high power energy storage directly into the native materials of both conventional photovoltaics (PV) and dye-sensitized solar cells (DSSCs). In the first case (PV), we demonstrate the ability to etch high surface-area porous silicon charge storage interfaces directly into the backside of a conventional polycrystalline silicon photovoltaic device exhibiting over 14% efficiency. These high surface area materials are then coupled with solid-state ionic liquid-polymer electrolytes to produce solid-state fully integrated devices where the PV device can directly inject charge into an on-board supercapacitor that can be separately discharged under dark conditions with a Coulombic efficiency of 84%. In a similar manner, we further demonstrate that surface engineered silicon materials can be utilized to replace Pt counterelectrodes in conventional DSSC energy conversion devices. As the silicon counterelectrodes rely strictly on surface Faradaic chemical reactions with the electrolyte on one side of the wafer electrode, we demonstrate double-sided processing of electrodes that enables dual-function of the material for simultaneous energy storage and conversion, each on opposing sides. In both of these devices, we demonstrate the ability to produce an all-silicon coupled energy conversion and storage system through the common ability to convert unused silicon in solar cells into high power silicon-based supercapacitors. Beyond the proof-of-concept design and performance of this integrated solar-storage system, this talk will conclude with a brief discussion of the hurdles and challenges that we envision for this emerging area both from a fundamental and technological viewpoint.

Probing low noise at the MOS interface with a spin-orbit qubit.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jock, Ryan Michael; Jacobson, Noah Tobias; Harvey-Collard, Patrick

The silicon metal-oxide-semiconductor (MOS) material system is technologically important for the implementation of electron spin-based quantum information technologies. Researchers predict the need for an integrated platform in order to implement useful computation, and decades of advancements in silicon microelectronics fabrication lends itself to this challenge. However, fundamental concerns have been raised about the MOS interface (e.g. trap noise, variations in electron g-factor and practical implementation of multi-QDs). Furthermore, two-axis control of silicon qubits has, to date, required the integration of non-ideal components (e.g. microwave strip-lines, micro-magnets, triple quantum dots, or introduction of donor atoms). In this paper, we introduce amore » spin-orbit (SO) driven singlet- triplet (ST) qubit in silicon, demonstrating all-electrical two-axis control that requires no additional integrated elements and exhibits charge noise properties equivalent to other more model, but less commercially mature, semiconductor systems. We demonstrate the ability to tune an intrinsic spin-orbit interface effect, which is consistent with Rashba and Dresselhaus contributions that are remarkably strong for a low spin-orbit material such as silicon. The qubit maintains the advantages of using isotopically enriched silicon for producing a quiet magnetic environment, measuring spin dephasing times of 1.6 μs using 99.95% 28Si epitaxy for the qubit, comparable to results from other isotopically enhanced silicon ST qubit systems. This work, therefore, demonstrates that the interface inherently provides properties for two-axis control, and the technologically important MOS interface does not add additional detrimental qubit noise. isotopically enhanced silicon ST qubit systems« less

SOI-silicon as structural layer for NEMS applications

NASA Astrophysics Data System (ADS)

Villarroya, Maria; Figueras, Eduard; Perez-Murano, Francesc; Campabadal, Francesca; Esteve, Jaume; Barniol, Nuria

2003-04-01

The objective of this paper is to present the compatibilization between a standard CMOS on bulk silicon process and the fabrication of nanoelectromechanical systems using Silicon On Insulator (SOI) wafers as substrate. This compatibilization is required as first step to fabricate a very high sensitive mass sensor based on a resonant cantilever with nanometer dimensions using the crystal silicon COI layer as the structural layer. The cantilever is driven electrostatically to its resonance frequency by an electrode placed parallel to the cantilever. A capacitive readout is performed. To achieve very high resolution, very small dimensions of the cantilever (nanometer range) are needed. For this reason, the control and excitation circuitry has to be integrated on the same substrate than the cantilever. Prior to the development of this sensor, it is necessary to develop a substrate able to be used first to integrate a standard CMOS circuit and afterwards to fabricate the nano-resonator. Starting from a SOI wafer and using very simple processes, the SOI silicon layer is removed, except from the areas in which nano-structures will be fabricated; obtaining a silicon substrate with islands with a SOI structure. The CMOS circuitry will be integrated on the bulk silicon region, while the remainder SOI region will be used for the nanoresonator. The silicon oxide of this SOI region is used as insulator; and as sacrificial layer, etched to release the cantilever from the substrate. To assure the cover of the different CMOS layers over the step of the islands, it is essential to avoid very sharp steps.

Periodically poled silicon

NASA Astrophysics Data System (ADS)

Hon, Nick K.; Tsia, Kevin K.; Solli, Daniel R.; Khurgin, Jacob B.; Jalali, Bahram

2010-02-01

Bulk centrosymmetric silicon lacks second-order optical nonlinearity χ(2) - a foundational component of nonlinear optics. Here, we propose a new class of photonic device which enables χ(2) as well as quasi-phase matching based on periodic stress fields in silicon - periodically-poled silicon (PePSi). This concept adds the periodic poling capability to silicon photonics, and allows the excellent crystal quality and advanced manufacturing capabilities of silicon to be harnessed for devices based on χ(2)) effects. The concept can also be simply achieved by having periodic arrangement of stressed thin films along a silicon waveguide. As an example of the utility, we present simulations showing that mid-wave infrared radiation can be efficiently generated through difference frequency generation from near-infrared with a conversion efficiency of 50% based on χ(2) values measurements for strained silicon reported in the literature [Jacobson et al. Nature 441, 199 (2006)]. The use of PePSi for frequency conversion can also be extended to terahertz generation. With integrated piezoelectric material, dynamically control of χ(2)nonlinearity in PePSi waveguide may also be achieved. The successful realization of PePSi based devices depends on the strength of the stress induced χ(2) in silicon. Presently, there exists a significant discrepancy in the literature between the theoretical and experimentally measured values. We present a simple theoretical model that produces result consistent with prior theoretical works and use this model to identify possible reasons for this discrepancy.

Mitotic trafficking of silicon microparticles†

PubMed Central

Serda, Rita E.; Ferrati, Silvia; Godin, Biana; Tasciotti, Ennio; Liu, XueWu

2010-01-01

Multistage carriers were recently introduced by our laboratory, with the concurrent objectives of co-localized delivery of multiple therapeutic agents, the “theranostic” integration of bioactive moieties with imaging contrast, and the selective, potentially personalized bypassing of the multiplicity of biological barriers that adversely impact biodistribution of vascularly injected particulates. Mesoporous (“nanoporous”) silicon microparticles were selected as primary carriers in multi-stage devices, with targets including vascular endothelia at pathological lesions. The objective of this study was to evaluate biocompatibility of mesoporous silicon microparticles with endothelial cells using in vitro assays with an emphasis on microparticle compatibility with mitotic events. We observed that vascular endothelial cells, following internalization of silicon microparticles, maintain cellular integrity, as demonstrated by cellular morphology, viability and intact mitotic trafficking of vesicles bearing silicon microparticles. The presence of gold or iron oxide nanoparticles within the porous matrix did not alter the cellular uptake of particles or the viability of endothelial cells subsequent to engulfment of microparticles. Endothelial cells maintained basal levels of IL-6 and IL-8 release in the presence of silicon microparticles. This is the first study that demonstrates polarized, ordered partitioning of endosomes based on tracking microparticles. The finding that mitotic sorting of endosomes is unencumbered by the presence of nanoporous silicon microparticles advocates the use of silicon microparticles for biomedical applications. PMID:20644846

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

Formation of ultra Si/Ti nano thin film for enhancing silicon solar cell efficiency

NASA Astrophysics Data System (ADS)

Adam, T.; Dhahi, T. S.; Mohammed, M.; Al-Hajj, A. M.; Hashim, U.

2017-10-01

An alternative electrical source has l has become the major quest of every researchers due to it numerous advantages and applications of power supply and as electronic devices are becoming more and more portable. A highly efficient power supply is become inevitable. Thus. in this study, present ultrasonic based assisted fabrication of electrochemical silicon-Titanium nano thin film by in-house simple technique, uniformly silicon Nano film was fabricated and etched with HF (40%): C2H5OH (99%):1:1, < 20 nm pore diameter of silicon was fabricated. The surface and morphology reveal that the method produce uniform nano silicon porous layer with smaller silicon pores with high etching efficiency. The silicon-Titanium integrated nano porous exhibited excellent observation properties with low reflection index ~ 1.1 compared to silicon alone thin film.

Silicon Modulators, Switches and Sub-systems for Optical Interconnect

NASA Astrophysics Data System (ADS)

Li, Qi

Silicon photonics is emerging as a promising platform for manufacturing and integrating photonic devices for light generation, modulation, switching and detection. The compatibility with existing CMOS microelectronic foundries and high index contrast in silicon could enable low cost and high performance photonic systems, which find many applications in optical communication, data center networking and photonic network-on-chip. This thesis first develops and demonstrates several experimental work on high speed silicon modulators and switches with record performance and novel functionality. A 8x40 Gb/s transmitter based on silicon microrings is first presented. Then an end-to-end link using microrings for Binary Phase Shift Keying (BPSK) modulation and demodulation is shown, and its performance with conventional BPSK modulation/ demodulation techniques is compared. Next, a silicon traveling-wave Mach- Zehnder modulator is demonstrated at data rate up to 56 Gb/s for OOK modulation and 48 Gb/s for BPSK modulation, showing its capability at high speed communication systems. Then a single silicon microring is shown with 2x2 full crossbar switching functionality, enabling optical interconnects with ultra small footprint. Then several other experiments in the silicon platform are presented, including a fully integrated in-band Optical Signal to Noise Ratio (OSNR) monitor, characterization of optical power upper bound in a silicon microring modulator, and wavelength conversion in a dispersion-engineered waveguide. The last part of this thesis is on network-level application of photonics, specically a broadcast-and-select network based on star coupler is introduced, and its scalability performance is studied. Finally a novel switch architecture for data center networks is discussed, and its benefits as a disaggregated network are presented.

Label-Free Direct Electronic Detection of Biomolecules with Amorphous Silicon Nanostructures

PubMed Central

Lund, John; Mehta, Ranjana; Parviz, Babak A.

2007-01-01

We present the fabrication and characterization of a nano-scale sensor made of amorphous silicon for the label-free, electronic detection of three classes of biologically important molecules: ions, oligonucleotides, and proteins. The sensor structure has an active element which is a 50 nm wide amorphous silicon semicircle and has a total footprint of less than 4 μm2. We demonstrate the functionalization of the sensor with receptor molecules and the electronic detection of three targets: H+ ions, short single-stranded DNAs, and streptavidin. The sensor is able to reliably distinguish single base-pair mismatches in 12 base long strands of DNA and monitor the introduction and identification of straptavidin in real-time. The versatile sensor structure can be readily functionalized with a wide range of receptor molecules and is suitable for integration with high-speed electronic circuits as a post-process on an integrated circuit chip. PMID:17292148

Mid-infrared materials and devices on a Si platform for optical sensing

PubMed Central

Singh, Vivek; Lin, Pao Tai; Patel, Neil; Lin, Hongtao; Li, Lan; Zou, Yi; Deng, Fei; Ni, Chaoying; Hu, Juejun; Giammarco, James; Soliani, Anna Paola; Zdyrko, Bogdan; Luzinov, Igor; Novak, Spencer; Novak, Jackie; Wachtel, Peter; Danto, Sylvain; Musgraves, J David; Richardson, Kathleen; Kimerling, Lionel C; Agarwal, Anuradha M

2014-01-01

In this article, we review our recent work on mid-infrared (mid-IR) photonic materials and devices fabricated on silicon for on-chip sensing applications. Pedestal waveguides based on silicon are demonstrated as broadband mid-IR sensors. Our low-loss mid-IR directional couplers demonstrated in SiNx waveguides are useful in differential sensing applications. Photonic crystal cavities and microdisk resonators based on chalcogenide glasses for high sensitivity are also demonstrated as effective mid-IR sensors. Polymer-based functionalization layers, to enhance the sensitivity and selectivity of our sensor devices, are also presented. We discuss the design of mid-IR chalcogenide waveguides integrated with polycrystalline PbTe detectors on a monolithic silicon platform for optical sensing, wherein the use of a low-index spacer layer enables the evanescent coupling of mid-IR light from the waveguides to the detector. Finally, we show the successful fabrication processing of our first prototype mid-IR waveguide-integrated detectors. PMID:27877641

Silicon graphene waveguide tunable broadband microwave photonics phase shifter.

PubMed

Capmany, José; Domenech, David; Muñoz, Pascual

2014-04-07

We propose the use of silicon graphene waveguides to implement a tunable broadband microwave photonics phase shifter based on integrated ring cavities. Numerical computation results show the feasibility for broadband operation over 40 GHz bandwidth and full 360° radiofrequency phase-shift with a modest voltage excursion of 0.12 volt.

Quantum-Well Infrared Photodetector (QWIP) Focal Plane Assembly

NASA Technical Reports Server (NTRS)

Jhabvala, Murzy; Jhabvala, Christine A.; Ewin, Audrey J.; Hess, Larry A.; Hartmann, Thomas M.; La, Anh T.

2012-01-01

A paper describes the Thermal Infrared Sensor (TIRS), a QWIP-based instrument intended to supplement the Operational Land Imager (OLI) for the Landsat Data Continuity Mission (LDCM). The TIRS instrument is a far-infrared imager operating in the pushbroom mode with two IR channels: 10.8 and 12 microns. The focal plane will contain three 640x512 QWIP arrays mounted on a silicon substrate. The silicon substrate is a custom-fabricated carrier board with a single layer of aluminum interconnects. The general fabrication process starts with a 4-in. (approx.10-cm) diameter silicon wafer. The wafer is oxidized, a single substrate contact is etched, and aluminum is deposited, patterned, and alloyed. This technology development is aimed at incorporating three large-format infrared detecting arrays based on GaAs QWIP technology onto a common focal plane with precision alignment of all three arrays. This focal plane must survive the rigors of flight qualification and operate at a temperature of 43 K (-230 C) for five years while orbiting the Earth. The challenges presented include ensuring thermal compatibility among all the components, designing and building a compact, somewhat modular system and ensuring alignment to very tight levels. The multi-array focal plane integrated onto a single silicon substrate is a new application of both QWIP array development and silicon wafer scale integration. The Invar-based assembly has been tested to ensure thermal reliability.

A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive

DOE PAGES

Wang, Zhiqiang; Shi, Xiaojie; Tolbert, Leon M.; ...

2014-04-30

Here we present a board-level integrated silicon carbide (SiC) MOSFET power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200°C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate drivermore » and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225°C.« less

A monolithically integrated polarization entangled photon pair source on a silicon chip

PubMed Central

Matsuda, Nobuyuki; Le Jeannic, Hanna; Fukuda, Hiroshi; Tsuchizawa, Tai; Munro, William John; Shimizu, Kaoru; Yamada, Koji; Tokura, Yasuhiro; Takesue, Hiroki

2012-01-01

Integrated photonic circuits are one of the most promising platforms for large-scale photonic quantum information systems due to their small physical size and stable interferometers with near-perfect lateral-mode overlaps. Since many quantum information protocols are based on qubits defined by the polarization of photons, we must develop integrated building blocks to generate, manipulate, and measure the polarization-encoded quantum state on a chip. The generation unit is particularly important. Here we show the first integrated polarization-entangled photon pair source on a chip. We have implemented the source as a simple and stable silicon-on-insulator photonic circuit that generates an entangled state with 91 ± 2% fidelity. The source is equipped with versatile interfaces for silica-on-silicon or other types of waveguide platforms that accommodate the polarization manipulation and projection devices as well as pump light sources. Therefore, we are ready for the full-scale implementation of photonic quantum information systems on a chip. PMID:23150781

The silicon vidicon: Integration, storage and slow scan capability - Experimental observation of a secondary mode of operation.

NASA Technical Reports Server (NTRS)

Ando, K. J.

1971-01-01

Description of the performance of the silicon diode array vidicon - an imaging sensor which possesses wide spectral response, high quantum efficiency, and linear response. These characteristics, in addition to its inherent ruggedness, simplicity, and long-term stability and operating life make this device potentially of great usefulness for ground-base and spaceborne planetary and stellar imaging applications. However, integration and charged storage for periods greater than approximately five seconds are not possible at room temperature because of diode saturation from dark current buildup. Since dark current can be reduced by cooling, measurements were made in the range from -65 to 25 C. Results are presented on the extension of integration, storage, and slow scan capabilities achievable by cooling. Integration times in excess of 20 minutes were achieved at the lowest temperatures. The measured results are compared with results obtained with other types of sensors and the advantages of the silicon diode array vidicon for imaging applications are discussed.

Optofluidic encapsulation and manipulation of silicon microchips using image processing based optofluidic maskless lithography and railed microfluidics.

PubMed

Chung, Su Eun; Lee, Seung Ah; Kim, Jiyun; Kwon, Sunghoon

2009-10-07

We demonstrate optofluidic encapsulation of silicon microchips using image processing based optofluidic maskless lithography and manipulation using railed microfluidics. Optofluidic maskless lithography is a dynamic photopolymerization technique of free-floating microstructures within a fluidic channel using spatial light modulator. Using optofluidic maskless lithography via computer-vision aided image processing, polymer encapsulants are fabricated for chip protection and guiding-fins for efficient chip conveying within a fluidic channel. Encapsulated silicon chips with guiding-fins are assembled using railed microfluidics, which is an efficient guiding and heterogeneous self-assembly system of microcomponents. With our technology, externally fabricated silicon microchips are encapsulated, fluidically guided and self-assembled potentially enabling low cost fluidic manipulation and assembly of integrated circuits.

Implementation Challenges for Sintered Silicon Carbide Fiber Bonded Ceramic Materials for High Temperature Applications

NASA Technical Reports Server (NTRS)

Singh, M.

2011-01-01

During the last decades, a number of fiber reinforced ceramic composites have been developed and tested for various aerospace and ground based applications. However, a number of challenges still remain slowing the wide scale implementation of these materials. In addition to continuous fiber reinforced composites, other innovative materials have been developed including the fibrous monoliths and sintered fiber bonded ceramics. The sintered silicon carbide fiber bonded ceramics have been fabricated by the hot pressing and sintering of silicon carbide fibers. However, in this system reliable property database as well as various issues related to thermomechanical performance, integration, and fabrication of large and complex shape components has yet to be addressed. In this presentation, thermomechanical properties of sintered silicon carbide fiber bonded ceramics (as fabricated and joined) will be presented. In addition, critical need for manufacturing and integration technologies in successful implementation of these materials will be discussed.

Characteristics of High-Resolution Hemoglobin Measurement Microchip Integrated with Signal Processing Circuit

NASA Astrophysics Data System (ADS)

Noda, Toshihiko; Takao, Hidekuni; Ashiki, Mitsuaki; Ebi, Hiroyuki; Sawada, Kazuaki; Ishida, Makoto

2004-04-01

In this study, a microchip for measurement of hemoglobin in human blood has been proposed, fabricated and evaluated. The measurement principle of hemoglobin is based on the “cyanmethemoglobin method” that calculates the cyanmethemoglobin concentration by absorption photometry. A glass/silicon/silicon structure was used for the microchip. The middle silicon layer includes flow channels, and 45° mirrors formed at each end of the flow channels. Photodiodes and metal oxide semiconductor (MOS) integrated circuits were fabricated on the bottom silicon layer. The performance of the microchip for hemoglobin measurement was evaluated using a solution of red food color instead of a real blood sample. The fabricated microchip exhibited a similar performance to a nonminiaturized absorption cell which has the same optical path length. Signal processing output varied with solution concentration from 5.32 V to 5.55 V with very high stability due to differential signal processing.

Monolithically integrated broad-band Mach-Zehnder interferometers for highly sensitive label-free detection of biomolecules through dual polarization optics.

PubMed

Psarouli, A; Salapatas, A; Botsialas, A; Petrou, P S; Raptis, I; Makarona, E; Jobst, G; Tukkiniemi, K; Sopanen, M; Stoffer, R; Kakabakos, S E; Misiakos, K

2015-12-02

Protein detection and characterization based on Broad-band Mach-Zehnder Interferometry is analytically outlined and demonstrated through a monolithic silicon microphotonic transducer. Arrays of silicon light emitting diodes and monomodal silicon nitride waveguides forming Mach-Zehnder interferometers were integrated on a silicon chip. Broad-band light enters the interferometers and exits sinusoidally modulated with two distinct spectral frequencies characteristic of the two polarizations. Deconvolution in the Fourier transform domain makes possible the separation of the two polarizations and the simultaneous monitoring of the TE and the TM signals. The dual polarization analysis over a broad spectral band makes possible the refractive index calculation of the binding adlayers as well as the distinction of effective medium changes into cover medium or adlayer ones. At the same time, multi-analyte detection at concentrations in the pM range is demonstrated.

Photonic-assisted microwave signal multiplication and modulation using a silicon Mach–Zehnder modulator

PubMed Central

Long, Yun; Zhou, Linjie; Wang, Jian

2016-01-01

Photonic generation of microwave signal is obviously attractive for many prominent advantages, such as large bandwidth, low loss, and immunity to electromagnetic interference. Based on a single integrated silicon Mach–Zehnder modulator (MZM), we propose and experimentally demonstrate a simple and compact photonic scheme to enable frequency-multiplicated microwave signal. Using the fabricated integrated MZM, we also demonstrate the feasibility of microwave amplitude-shift keying (ASK) modulation based on integrated photonic approach. In proof-of-concept experiments, 2-GHz frequency-doubled microwave signal is generated using a 1-GHz driving signal. 750-MHz/1-GHz frequency-tripled/quadrupled microwave signals are obtained with a driving signal of 250 MHz. In addition, a 50-Mb/s binary amplitude coded 1-GHz microwave signal is also successfully generated. PMID:26832305

AIN-Based Packaging for SiC High-Temperature Electronics

NASA Technical Reports Server (NTRS)

Savrun, Ender

2004-01-01

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Silicon Nanowire/Polymer Hybrid Solar Cell-Supercapacitor: A Self-Charging Power Unit with a Total Efficiency of 10.5.

PubMed

Liu, Ruiyuan; Wang, Jie; Sun, Teng; Wang, Mingjun; Wu, Changsheng; Zou, Haiyang; Song, Tao; Zhang, Xiaohong; Lee, Shuit-Tong; Wang, Zhong Lin; Sun, Baoquan

2017-07-12

An integrated self-charging power unit, combining a hybrid silicon nanowire/polymer heterojunction solar cell with a polypyrrole-based supercapacitor, has been demonstrated to simultaneously harvest solar energy and store it. By efficiency enhancement of the hybrid nanowire solar cells and a dual-functional titanium film serving as conjunct electrode of the solar cell and supercapacitor, the integrated system is able to yield a total photoelectric conversion to storage efficiency of 10.5%, which is the record value in all the integrated solar energy conversion and storage system. This system may not only serve as a buffer that diminishes the solar power fluctuations from light intensity, but also pave its way toward cost-effective high efficiency self-charging power unit. Finally, an integrated device based on ultrathin Si substrate is demonstrated to expand its feasibility and potential application in flexible energy conversion and storage devices.

David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices

NASA Astrophysics Data System (ADS)

Riel, Heike

Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.

A physically transient form of silicon electronics.

PubMed

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

2012-09-28

A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

Monolithic photonic integrated circuit with a GaN-based bent waveguide

NASA Astrophysics Data System (ADS)

Cai, Wei; Qin, Chuan; Zhang, Shuai; Yuan, Jialei; Zhang, Fenghua; Wang, Yongjin

2018-06-01

Integration of a transmitter, waveguide and receiver into a single chip can generate a multicomponent system with multiple functionalities. Here, we fabricate and characterize a GaN-based photonic integrated circuit (PIC) on a GaN-on-silicon platform. With removal of the silicon and back wafer thinning of the epitaxial film, ultrathin membrane-type devices and highly confined suspended GaN waveguides were formed. Two suspended-membrane InGaN/GaN multiple-quantum-well diodes (MQW-diodes) served as an MQW light-emitting diode (MQW-LED) to emit light and an MQW photodiode (MQW-PD) to sense light. The optical interconnects between the MQW-LED and MQW-PD were achieved using the GaN bent waveguide. The GaN-based PIC consisting of an MQW-LED, waveguides and an MQW-PD forms an in-plane light communication system with a data transmission rate of 70 Mbps.

Materials and processing approaches for foundry-compatible transient electronics

PubMed Central

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-01-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries. PMID:28652373

Si photonics technology for future optical interconnection

NASA Astrophysics Data System (ADS)

Zheng, Xuezhe; Krishnamoorthy, Ashok V.

2011-12-01

Scaling of computing systems require ultra-efficient interconnects with large bandwidth density. Silicon photonics offers a disruptive solution with advantages in reach, energy efficiency and bandwidth density. We review our progress in developing building blocks for ultra-efficient WDM silicon photonic links. Employing microsolder based hybrid integration with low parasitics and high density, we optimize photonic devices on SOI platforms and VLSI circuits on more advanced bulk CMOS technology nodes independently. Progressively, we successfully demonstrated single channel hybrid silicon photonic transceivers at 5 Gbps and 10 Gbps, and 80 Gbps arrayed WDM silicon photonic transceiver using reverse biased depletion ring modulators and Ge waveguide photo detectors. Record-high energy efficiency of less than 100fJ/bit and 385 fJ/bit were achieved for the hybrid integrated transmitter and receiver, respectively. Waveguide grating based optical proximity couplers were developed with low loss and large optical bandwidth to enable multi-layer intra/inter-chip optical interconnects. Thermal engineering of WDM devices by selective substrate removal, together with WDM link using synthetic wavelength comb, we significantly improved the device tuning efficiency and reduced the tuning range. Using these innovative techniques, two orders of magnitude tuning power reduction was achieved. And tuning cost of only a few 10s of fJ/bit is expected for high data rate WDM silicon photonic links.

George E. Pake Prize Lecture: CMOS Technology Roadmap: Is Scaling Ending?

NASA Astrophysics Data System (ADS)

Chen, Tze-Chiang (T. C.)

The development of silicon technology has been based on the principle of physics and driven by the system needs. Traditionally, the system needs have been satisfied by the increase in transistor density and performance, as suggested by Moore's Law and guided by ''Dennard CMOS scaling theory''. As the silicon industry moves towards the 14nm node and beyond, three of the most important challenges facing Moore's Law and continued CMOS scaling are the growing standby power dissipation, the increasing variability in device characteristics and the ever increasing manufacturing cost. Actually, the first two factors are the embodiments of CMOS approaching atomistic and quantum-mechanical physics boundaries. Industry directions for addressing these challenges are also developing along three primary approaches: Extending silicon scaling through innovations in materials and device structure, expanding the level of integration through three-dimensional structures comprised of through-silicon-vias holes and chip stacking in order to enhance functionality and parallelism and exploring post-silicon CMOS innovation with new nano-devices based on distinctly different principles of physics, new materials and new processes such as spintronics, carbon nanotubes and nanowires. Hence, the infusion of new materials, innovative integration and novel device structures will continue to extend CMOS technology scaling for at least another decade.

III-V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2-4 μm Wavelength Range.

PubMed

Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

2017-08-04

The availability of silicon photonic integrated circuits (ICs) in the 2-4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III-V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III-V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy.

III–V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2–4 μm Wavelength Range

PubMed Central

Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

2017-01-01

The availability of silicon photonic integrated circuits (ICs) in the 2–4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III–V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III–V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy. PMID:28777291

Efficient Second-Harmonic Generation in Nanocrystalline Silicon Nanoparticles.

PubMed

Makarov, Sergey V; Petrov, Mihail I; Zywietz, Urs; Milichko, Valentin; Zuev, Dmitry; Lopanitsyna, Natalia; Kuksin, Alexey; Mukhin, Ivan; Zograf, George; Ubyivovk, Evgeniy; Smirnova, Daria A; Starikov, Sergey; Chichkov, Boris N; Kivshar, Yuri S

2017-05-10

Recent trends to employ high-index dielectric particles in nanophotonics are motivated by their reduced dissipative losses and large resonant enhancement of nonlinear effects at the nanoscale. Because silicon is a centrosymmetric material, the studies of nonlinear optical properties of silicon nanoparticles have been targeting primarily the third-harmonic generation effects. Here we demonstrate, both experimentally and theoretically, that resonantly excited nanocrystalline silicon nanoparticles fabricated by an optimized laser printing technique can exhibit strong second-harmonic generation (SHG) effects. We attribute an unexpectedly high yield of the nonlinear conversion to a nanocrystalline structure of nanoparticles supporting the Mie resonances. The demonstrated efficient SHG at green light from a single silicon nanoparticle is 2 orders of magnitude higher than that from unstructured silicon films. This efficiency is significantly higher than that of many plasmonic nanostructures and small silicon nanoparticles in the visible range, and it can be useful for a design of nonlinear nanoantennas and silicon-based integrated light sources.

Lithographically defined few-electron silicon quantum dots based on a silicon-on-insulator substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Horibe, Kosuke; Oda, Shunri; Kodera, Tetsuo, E-mail: kodera.t.ac@m.titech.ac.jp

2015-02-23

Silicon quantum dot (QD) devices with a proximal single-electron transistor (SET) charge sensor have been fabricated in a metal-oxide-semiconductor structure based on a silicon-on-insulator substrate. The charge state of the QDs was clearly read out using the charge sensor via the SET current. The lithographically defined small QDs enabled clear observation of the few-electron regime of a single QD and a double QD by charge sensing. Tunnel coupling on tunnel barriers of the QDs can be controlled by tuning the top-gate voltages, which can be used for manipulation of the spin quantum bit via exchange interaction between tunnel-coupled QDs. Themore » lithographically defined silicon QD device reported here is technologically simple and does not require electrical gates to create QD confinement potentials, which is advantageous for the integration of complicated constructs such as multiple QD structures with SET charge sensors for the purpose of spin-based quantum computing.« less

High-contrast gratings for long-wavelength laser integration on silicon

NASA Astrophysics Data System (ADS)

Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

2014-02-01

Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

High-speed all-optical logic inverter based on stimulated Raman scattering in silicon nanocrystal.

PubMed

Sen, Mrinal; Das, Mukul K

2015-11-01

In this paper, we propose a new device architecture for an all-optical logic inverter (NOT gate), which is cascadable with a similar device. The inverter is based on stimulated Raman scattering in silicon nanocrystal waveguides, which are embedded in a silicon photonic crystal structure. The Raman response function of silicon nanocrystal is evaluated to explore the transfer characteristic of the inverter. A maximum product criterion for the noise margin is taken to analyze the cascadability of the inverter. The time domain response of the inverter, which explores successful inversion operation at 100 Gb/s, is analyzed. Propagation delay of the inverter is on the order of 5 ps, which is less than the delay in most of the electronic logic families as of today. Overall dimension of the device is around 755  μm ×15  μm, which ensures integration compatibility with the matured silicon industry.

Apparatus and method for fabricating a microbattery

DOEpatents

Shul, Randy J.; Kravitz, Stanley H.; Christenson, Todd R.; Zipperian, Thomas E.; Ingersoll, David

2002-01-01

An apparatus and method for fabricating a microbattery that uses silicon as the structural component, packaging component, and semiconductor to reduce the weight, size, and cost of thin film battery technology is described. When combined with advanced semiconductor packaging techniques, such a silicon-based microbattery enables the fabrication of autonomous, highly functional, integrated microsystems having broad applicability.

Integration of hybrid silicon lasers and electroabsorption modulators.

PubMed

Sysak, Matthew N; Anthes, Joel O; Bowers, John E; Raday, Omri; Jones, Richard

2008-08-18

We present an integration platform based on quantum well intermixing for multi-section hybrid silicon lasers and electroabsorption modulators. As a demonstration of the technology, we have fabricated discrete sampled grating DBR lasers and sampled grating DBR lasers integrated with InGaAsP/InP electroabsorption modulators. The integrated sampled grating DBR laser-modulators use the as-grown III-V bandgap for optical gain, a 50 nm blue shifted bandgap for the electrabosprtion modulators, and an 80 nm blue shifted bandgap for low loss mirrors. Laser continuous wave operation up to 45 ?C is achieved with output power >1.0 mW and threshold current of <50 mA. The modulator bandwidth is >2GHz with 5 dB DC extinction.

Joining and Integration of Silicon Carbide-Based Materials for High Temperature Applications

NASA Technical Reports Server (NTRS)

Halbig, Michael C.; Singh, Mrityunjay

2016-01-01

Advanced joining and integration technologies of silicon carbide-based ceramics and ceramic matrix composites are enabling for their implementation into wide scale aerospace and ground-based applications. The robust joining and integration technologies allow for large and complex shapes to be fabricated and integrated with the larger system. Potential aerospace applications include lean-direct fuel injectors, thermal actuators, turbine vanes, blades, shrouds, combustor liners and other hot section components. Ground based applications include components for energy and environmental systems. Performance requirements and processing challenges are identified for the successful implementation different joining technologies. An overview will be provided of several joining approaches which have been developed for high temperature applications. In addition, various characterization approaches were pursued to provide an understanding of the processing-microstructure-property relationships. Microstructural analysis of the joint interfaces was conducted using optical, scanning electron, and transmission electron microscopy to identify phases and evaluate the bond quality. Mechanical testing results will be presented along with the need for new standardized test methods. The critical need for tailoring interlayer compositions for optimum joint properties will also be highlighted.

An optical microsystem based on vertical silicon-air Bragg mirror for liquid substances monitoring

NASA Astrophysics Data System (ADS)

De Stefano, Luca; Rendina, Ivo; Rea, Ilaria; Rotiroti, Lucia; De Tommasi, Edoardo; Barillaro, Giuseppe

2007-05-01

In this work, an integrated optical microsystems for the continuous detection of flammable liquids has been fabricated and characterized. The proposed system is composed of a the transducer element, which is a vertical silicon/air Bragg mirror fabricated by silicon electrochemical micromachining, sealed with a cover glass anodically bonded on its top. The device has been optically characterized in presence of liquid substances of environmental interest, such as ethanol and isopropanol. The preliminary experimental results are in good agreement with the theoretical calculations and show the possibility to use the device as an optical sensor based on the change of its reflectivity spectrum.

A review of recent progress in heterogeneous silicon tandem solar cells

NASA Astrophysics Data System (ADS)

Yamaguchi, Masafumi; Lee, Kan-Hua; Araki, Kenji; Kojima, Nobuaki

2018-04-01

Silicon solar cells are the most established solar cell technology and are expected to dominate the market in the near future. As state-of-the-art silicon solar cells are approaching the Shockley-Queisser limit, stacking silicon solar cells with other photovoltaic materials to form multi-junction devices is an obvious pathway to further raise the efficiency. However, many challenges stand in the way of fully realizing the potential of silicon tandem solar cells because heterogeneously integrating silicon with other materials often degrades their qualities. Recently, above or near 30% silicon tandem solar cell has been demonstrated, showing the promise of achieving high-efficiency and low-cost solar cells via silicon tandem. This paper reviews the recent progress of integrating solar cell with other mainstream solar cell materials. The first part of this review focuses on the integration of silicon with III-V semiconductor solar cells, which is a long-researched topic since the emergence of III-V semiconductors. We will describe the main approaches—heteroepitaxy, wafer bonding and mechanical stacking—as well as other novel approaches. The second part introduces the integration of silicon with polycrystalline thin-film solar cells, mainly perovskites on silicon solar cells because of its rapid progress recently. We will also use an analytical model to compare the material qualities of different types of silicon tandem solar cells and project their practical efficiency limits.

Wurtzite-Phased InP Micropillars Grown on Silicon with Low Surface Recombination Velocity.

PubMed

Li, Kun; Ng, Kar Wei; Tran, Thai-Truong D; Sun, Hao; Lu, Fanglu; Chang-Hasnain, Connie J

2015-11-11

The direct growth of III-V nanostructures on silicon has shown great promise in the integration of optoelectronics with silicon-based technologies. Our previous work showed that scaling up nanostructures to microsize while maintaining high quality heterogeneous integration opens a pathway toward a complete photonic integrated circuit and high-efficiency cost-effective solar cells. In this paper, we present a thorough material study of novel metastable InP micropillars monolithically grown on silicon, focusing on two enabling aspects of this technology-the stress relaxation mechanism at the heterogeneous interface and the microstructure surface quality. Aberration-corrected transmission electron microscopy studies show that InP grows directly on silicon without any amorphous layer in between. A set of periodic dislocations was found at the heterointerface, relaxing the 8% lattice mismatch between InP and Si. Single crystalline InP therefore can grow on top of the fully relaxed template, yielding high-quality micropillars with diameters expanding beyond 1 μm. An interesting power-dependence trend of carrier recombination lifetimes was captured for these InP micropillars at room temperature, for the first time for micro/nanostructures. By simply combining internal quantum efficiency with carrier lifetime, we revealed the recombination dynamics of nonradiative and radiative portions separately. A very low surface recombination velocity of 1.1 × 10(3) cm/sec was obtained. In addition, we experimentally estimated the radiative recombination B coefficient of 2.0 × 10(-10) cm(3)/sec for pure wurtzite-phased InP. These values are comparable with those obtained from InP bulk. Exceeding the limits of conventional nanowires, our InP micropillars combine the strengths of both nanostructures and bulk materials and will provide an avenue in heterogeneous integration of III-V semiconductor materials onto silicon platforms.

Plant-Mimetic Heat Pipes for Operation with Large Inertial and Gravitation Stresses

DTIC Science & Technology

2012-08-16

tensiometer based on the integration of the membrane with a MEMS-based pressure sen heat transfer, biomimicry , microfluidics, plant science U U U U...stable at each tension. Inset shows an optical micrograph of 25 cavities; dark cavities are filled and bright cavities are empty (cavitated). (C... Optical micrograph of a silicon membrane that has been anodically etched from the top to form nano- porous silicon and wet etched from the bottom to

Adaptive optics high-resolution IR spectroscopy with silicon grisms and immersion gratings

NASA Astrophysics Data System (ADS)

Ge, Jian; McDavitt, Daniel L.; Chakraborty, Abhijit; Bernecker, John L.; Miller, Shane

2003-02-01

The breakthrough of silicon immersion grating technology at Penn State has the ability to revolutionize high-resolution infrared spectroscopy when it is coupled with adaptive optics at large ground-based telescopes. Fabrication of high quality silicon grism and immersion gratings up to 2 inches in dimension, less than 1% integrated scattered light, and diffraction-limited performance becomes a routine process thanks to newly developed techniques. Silicon immersion gratings with etched dimensions of ~ 4 inches are being developed at Penn State. These immersion gratings will be able to provide a diffraction-limited spectral resolution of R = 300,000 at 2.2 micron, or 130,000 at 4.6 micron. Prototype silicon grisms have been successfully used in initial scientific observations at the Lick 3m telescope with adaptive optics. Complete K band spectra of a total of 6 T Tauri and Ae/Be stars and their close companions at a spectral resolution of R ~ 3000 were obtained. This resolving power was achieved by using a silicon echelle grism with a 5 mm pupil diameter in an IR camera. These results represent the first scientific observations conducted by the high-resolution silicon grisms, and demonstrate the extremely high dispersing power of silicon-based gratings. New discoveries from this high spatial and spectral resolution IR spectroscopy will be reported. The future of silicon-based grating applications in ground-based AO IR instruments is promising. Silicon immersion gratings will make very high-resolution spectroscopy (R > 100,000) feasible with compact instruments for implementation on large telescopes. Silicon grisms will offer an efficient way to implement low-cost medium to high resolution IR spectroscopy (R ~ 1000-50000) through the conversion of existing cameras into spectrometers by locating a grism in the instrument's pupil location.

Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source.

PubMed

Steidle, Jeffrey A; Fanto, Michael L; Preble, Stefan F; Tison, Christopher C; Howland, Gregory A; Wang, Zihao; Alsing, Paul M

2017-04-04

Silicon photonic chips have the potential to realize complex integrated quantum information processing circuits, including photon sources, qubit manipulation, and integrated single-photon detectors. Here, we present the key aspects of preparing and testing a silicon photonic quantum chip with an integrated photon source and two-photon interferometer. The most important aspect of an integrated quantum circuit is minimizing loss so that all of the generated photons are detected with the highest possible fidelity. Here, we describe how to perform low-loss edge coupling by using an ultra-high numerical aperture fiber to closely match the mode of the silicon waveguides. By using an optimized fusion splicing recipe, the UHNA fiber is seamlessly interfaced with a standard single-mode fiber. This low-loss coupling allows the measurement of high-fidelity photon production in an integrated silicon ring resonator and the subsequent two-photon interference of the produced photons in a closely integrated Mach-Zehnder interferometer. This paper describes the essential procedures for the preparation and characterization of high-performance and scalable silicon quantum photonic circuits.

Monolithically interconnected silicon-film™ module technology

NASA Astrophysics Data System (ADS)

DelleDonne, E. J.; Ford, D. H.; Hall, R. B.; Ingram, A. E.; Rand, J. A.; Barnett, A. M.

1999-03-01

AstroPower is developing an advanced thin-silicon-based, photovoltaic module product. A low-cost monolithic interconnected device is being integrated into a module that combines the design and process features of advanced light trapped, thin-silicon solar cells. This advanced product incorporates a low-cost substrate, a nominally 50-μm thick grown silicon layer with minority carrier diffusion lengths exceeding the active layer thickness, light trapping due to back-surface reflection, and back-surface passivation. The thin silicon layer enables high solar cell performance and can lead to a module conversion efficiency as high as 19%. These performance design features, combined with low-cost manufacturing using relatively low-cost capital equipment, continuous processing and a low-cost substrate, will lead to high-performance, low-cost photovoltaic panels.

Hybrid integration of VCSELs onto a silicon photonic platform for biosensing application

NASA Astrophysics Data System (ADS)

Lu, Huihui; Lee, Jun Su; Zhao, Yan; Cardile, Paolo; Daly, Aidan; Carroll, Lee; O'Brien, Peter

2017-02-01

This paper presents a technology of hybrid integration vertical cavity surface emitting lasers (VCSELs) directly on silicon photonics chip. By controlling the reflow of the solder balls used for electrical and mechanical bonding, the VCSELs were bonded at 10 degree to achieve the optimum angle-of-incidence to the planar grating coupler through vision based flip-chip techniques. The 1 dB discrepancy between optical loss values of flip-chip passive assembly and active alignment confirmed that the general purpose of the flip-chip design concept is achieved. This hybrid approach of integrating a miniaturized light source on chip opens the possibly of highly compact sensor system, which enable future portable and wearable diagnostics devices.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pradeepkumar, Aiswarya; Mishra, Neeraj; Kermany, Atieh Ranjbar

Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High–resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurementsmore » indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications.« less

Flexible integration of free-standing nanowires into silicon photonics.

PubMed

Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

2017-06-14

Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Vertically Integrated MEMS SOI Composite Porous Silicon-Crystalline Silicon Cantilever-Array Sensors: Concept for Continuous Sensing of Explosives and Warfare Agents

NASA Astrophysics Data System (ADS)

Stolyarova, Sara; Shemesh, Ariel; Aharon, Oren; Cohen, Omer; Gal, Lior; Eichen, Yoav; Nemirovsky, Yael

This study focuses on arrays of cantilevers made of crystalline silicon (c-Si), using SOI wafers as the starting material and using bulk micromachining. The arrays are subsequently transformed into composite porous silicon-crystalline silicon cantilevers, using a unique vapor phase process tailored for providing a thin surface layer of porous silicon on one side only. This results in asymmetric cantilever arrays, with one side providing nano-structured porous large surface, which can be further coated with polymers, thus providing additional sensing capabilities and enhanced sensing. The c-Si cantilevers are vertically integrated with a bottom silicon die with electrodes allowing electrostatic actuation. Flip Chip bonding is used for the vertical integration. The readout is provided by a sensitive Capacitance to Digital Converter. The fabrication, processing and characterization results are reported. The reported study is aimed towards achieving miniature cantilever chips with integrated readout for sensing explosives and chemical warfare agents in the field.

Silicon photonics: Design, fabrication, and characterization of on-chip optical interconnects

NASA Astrophysics Data System (ADS)

Hsieh, I.-Wei

In recent years, the research field of silicon photonics has been developing rapidly from a concept to a demonstrated technology, and has gathered much attention from both academia and industry communities. Its many potential applications in long-haul telecommunication, mid-range data-communication, on-chip optical interconnection networks, and nano-scale sensing as well as its compatibility with electronic integrated circuits have driven much effort in realizing silicon photonics both as a disruptive technology for existing markets and as an enabling technology for new ones. Despite the promising future of silicon photonics, many fundamental issues still remain to be understood---both in the linear- and nonlinear-optical regimes. There are also many engineering challenges to make silicon photonics the gold standard in photonic integrated circuits. In this thesis, we focus on the design, fabrication, and characterization of active and passive silicon-on-insulator (SOI) photonic devices. The SOI material system differs from most conventional optical material platforms because of its high-refractive-index-contrast, which enables engineers to design very compact integrated photonic networks with sub-micron transverse waveguide dimensions and sharp bends. On the other hand, because most analytical formulas for designing waveguide devices are valid only in low-index-contrast cases, SOI photonic devices need to be analyzed numerically for accurate results. The second chapter of this thesis describes some common numerical methods such as Beam Propagation Method (BPM) and Finite Element Method (FEM) for waveguide-design simulations, and presents two design studies based on these methods. The compatibility of silicon photonic integrated circuits with conventional CMOS fabrication technology is another important aspect that distinguishes silicon photonics from others such as III-V materials and lithium niobate. However, the requirements for fabricating silicon photonic devices are quite different from those of electronic devices. Minimizing propagation losses by reducing sidewall roughness to nanometer scale over a device length of several millimeters or even centimeters has prompted researchers in academia and industry to refine the fabrication process. Chapter 3 of this thesis summarizes our efforts in fabricating silicon photonic devices using standard CMOS technology. Chapter 4 describes the characterization of nonlinear effects, including self-phase modulation (SPM), cross-phase modulation (XPM), and supercontinuum generation in silicon-wire waveguides. Silicon-wire waveguides are strip waveguides with submicron transverse dimensions, which allow strong light confinement inside the silicon core. This strong optical confinement, in addition to the large third-order nonlinear optical susceptibility of crystalline silicon, leads to a net nonlinearity which is several orders of magnitude higher than the nonlinearity of silica fiber. Significant nonlinear effects can be observed and characterized over a device length of only several millimeters in silicon wires with very small input power. These effects provide opportunities for engineers to design active silicon photonic devices which are compact and energy-efficient. Chapter 5 presents a realization of an integrated SOI optical isolator, which is a critical yet often overlooked component in photonic integrated circuits. This study shows the feasibility to make a hybrid garnet/SOI active device with very promising results. Finally, Chapter 6 summarizes our demonstration of transmitting terabit-scale data streams in silicon-wire waveguides, which is an important first-step towards enabling intra-chip interconnection networks with ultra-high bandwidths. Although the scope of this thesis is limited to providing only fractional views of the whole silicon photonics area, it provides enough references for interested readers to conduct further literature research in other aspects of silicon photonics. It is the author's hope that the thesis would convey to its readers the significance and potential of this exciting emerging technology.

Silicon waveguided components for the long-wave infrared region

NASA Astrophysics Data System (ADS)

Soref, Richard A.; Emelett, Stephen J.; Buchwald, Walter R.

2006-10-01

We propose that the operational wavelength of waveguided Si-based photonic integrated circuits and optoelectronic integrated circuits can be extended beyond the 1.55 µm telecom range into the wide infrared from 1.55 to 100 µm. The Si rib-membrane waveguide offers low-loss transmission from 1.2 to 6 µm and from 24 to 100 µm. This waveguide, which is compatible with Si microelectronics manufacturing, is constructed from silicon-on-insulator by etching away the oxide locally beneath the rib. Alternatively, low-loss waveguiding from 1.9 to 14.7 µm is assured by employing a crystal Ge rib grown directly upon the Si substrate. The Si-based hollow-core waveguide is an excellent device that minimizes loss due to silicon's 6-24 µm multi-phonon absorption. Here the rectangular air-filled core is surrounded by SiGe/Si multi-layer anti-resonant or Bragg claddings. The hollow channel offers less than 1.7 dB cm-1 loss from 1.2 to 100 µm. .

30GHz Ge electro-absorption modulator integrated with 3 μm silicon-on-insulator waveguide.

PubMed

Feng, Ning-Ning; Feng, Dazeng; Liao, Shirong; Wang, Xin; Dong, Po; Liang, Hong; Kung, Cheng-Chih; Qian, Wei; Fong, Joan; Shafiiha, Roshanak; Luo, Ying; Cunningham, Jack; Krishnamoorthy, Ashok V; Asghari, Mehdi

2011-04-11

We demonstrate a compact waveguide-based high-speed Ge electro-absorption (EA) modulator integrated with a single mode 3 µm silicon-on-isolator (SOI) waveguide. The Ge EA modulator is based on a horizontally-oriented p-i-n structure butt-coupled with a deep-etched silicon waveguide, which transitions adiabatically to a shallow-etched single mode large core SOI waveguide. The demonstrated device has a compact active region of 1.0 × 45 µm(2), a total insertion loss of 2.5-5 dB and an extinction ratio of 4-7.5 dB over a wavelength range of 1610-1640 nm with -4V(pp) bias. The estimated Δα/α value is in the range of 2-3.3. The 3 dB bandwidth measurements show that the device is capable of operating at more than 30 GHz. Clear eye-diagram openings at 12.5 Gbps demonstrates large signal modulation at high transmission rate. © 2011 Optical Society of America

Highly efficient luminescent solar concentrators based on earth-abundant indirect-bandgap silicon quantum dots

NASA Astrophysics Data System (ADS)

Meinardi, Francesco; Ehrenberg, Samantha; Dhamo, Lorena; Carulli, Francesco; Mauri, Michele; Bruni, Francesco; Simonutti, Roberto; Kortshagen, Uwe; Brovelli, Sergio

2017-02-01

Building-integrated photovoltaics is gaining consensus as a renewable energy technology for producing electricity at the point of use. Luminescent solar concentrators (LSCs) could extend architectural integration to the urban environment by realizing electrode-less photovoltaic windows. Crucial for large-area LSCs is the suppression of reabsorption losses, which requires emitters with negligible overlap between their absorption and emission spectra. Here, we demonstrate the use of indirect-bandgap semiconductor nanostructures such as highly emissive silicon quantum dots. Silicon is non-toxic, low-cost and ultra-earth-abundant, which avoids the limitations to the industrial scaling of quantum dots composed of low-abundance elements. Suppressed reabsorption and scattering losses lead to nearly ideal LSCs with an optical efficiency of η = 2.85%, matching state-of-the-art semi-transparent LSCs. Monte Carlo simulations indicate that optimized silicon quantum dot LSCs have a clear path to η > 5% for 1 m2 devices. We are finally able to realize flexible LSCs with performances comparable to those of flat concentrators, which opens the way to a new design freedom for building-integrated photovoltaics elements.

Integrated Arrays on Silicon at Terahertz Frequencies

NASA Technical Reports Server (NTRS)

Chattopadhayay, Goutam; Lee, Choonsup; Jung, Cecil; Lin, Robert; Peralta, Alessandro; Mehdi, Imran; Llombert, Nuria; Thomas, Bertrand

2011-01-01

In this paper we explore various receiver font-end and antenna architecture for use in integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies and use of novel integrated antennas with silicon micromachining are reported. We report novel stacking of micromachined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages which easily leads to the development of 2- dimensioanl multi-pixel receiver front-ends in the terahertz frequency range. We also report an integrated micro-lens antenna that goes with the silicon micro-machined front-end. The micro-lens antenna is fed by a waveguide that excites a silicon lens antenna through a leaky-wave or electromagnetic band gap (EBG) resonant cavity. We utilized advanced semiconductor nanofabrication techniques to design, fabricate, and demonstrate a super-compact, low-mass submillimeter-wave heterodyne frontend. When the micro-lens antenna is integrated with the receiver front-end we will be able to assemble integrated heterodyne array receivers for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

Novel method for measurement of transistor gate length using energy-filtered transmission electron microscopy

NASA Astrophysics Data System (ADS)

Lee, Sungho; Kim, Tae-Hoon; Kang, Jonghyuk; Yang, Cheol-Woong

2016-12-01

As the feature size of devices continues to decrease, transmission electron microscopy (TEM) is becoming indispensable for measuring the critical dimension (CD) of structures. Semiconductors consist primarily of silicon-based materials such as silicon, silicon dioxide, and silicon nitride, and the electrons transmitted through a plan-view TEM sample provide diverse information about various overlapped silicon-based materials. This information is exceedingly complex, which makes it difficult to clarify the boundary to be measured. Therefore, we propose a simple measurement method using energy-filtered TEM (EF-TEM). A precise and effective measurement condition was obtained by determining the maximum value of the integrated area ratio of the electron energy loss spectrum at the boundary to be measured. This method employs an adjustable slit allowing only electrons with a certain energy range to pass. EF-TEM imaging showed a sharp transition at the boundary when the energy-filter’s passband centre was set at 90 eV, with a slit width of 40 eV. This was the optimum condition for the CD measurement of silicon-based materials involving silicon nitride. Electron energy loss spectroscopy (EELS) and EF-TEM images were used to verify this method, which makes it possible to measure the transistor gate length in a dynamic random access memory manufactured using 35 nm process technology. This method can be adapted to measure the CD of other non-silicon-based materials using the EELS area ratio of the boundary materials.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Custer, Jonathan S.; Fleming, James G.; Roherty-Osmun, Elizabeth

Refractory ternary nitride films for diffusion barriers in microelectronics have been grown using chemical vapor deposition. Thin films of titanium-silicon-nitride, tungsten-boron-nitride, and tungsten-silicon-nitride of various compositions have been deposited on 150 mm Si wafers. The microstructure of the films are either fully amorphous for the tungsten based films, or nauocrystalline TiN in an amorphous matrix for titanium-silicon-nitride. All films exhibit step coverages suitable for use in future microelectronics generations. Selected films have been tested as diffusion barriers between copper and silicon, and generally perform extremely weH. These fiIms are promising candidates for advanced diffusion barriers for microelectronics applications. The manufacturingmore » of silicon wafers into integrated circuits uses many different process and materials. The manufacturing process is usually divided into two parts: the front end of line (FEOL) and the back end of line (BEOL). In the FEOL the individual transistors that are the heart of an integrated circuit are made on the silicon wafer. The responsibility of the BEOL is to wire all the transistors together to make a complete circuit. The transistors are fabricated in the silicon itself. The wiring is made out of metal, currently aluminum and tungsten, insulated by silicon dioxide, see Figure 1. Unfortunately, silicon will diffuse into aluminum, causing aluminum spiking of junctions, killing transistors. Similarly, during chemical vapor deposition (CVD) of tungsten from ~fj, the reactivity of the fluorine can cause "worn-holes" in the silicon, also destroying transistors. The solution to these problems is a so-called diffusion barrier, which will allow current to pass from the transistors to the wiring, but will prevent reactions between silicon and the metal.« less

Hybrid indium phosphide-on-silicon nanolaser diode

NASA Astrophysics Data System (ADS)

Crosnier, Guillaume; Sanchez, Dorian; Bouchoule, Sophie; Monnier, Paul; Beaudoin, Gregoire; Sagnes, Isabelle; Raj, Rama; Raineri, Fabrice

2017-04-01

The most-awaited convergence of microelectronics and photonics promises to bring about a revolution for on-chip data communications and processing. Among all the optoelectronic devices to be developed, power-efficient nanolaser diodes able to be integrated densely with silicon photonics and electronics are essential to convert electrical data into the optical domain. Here, we report a demonstration of ultracompact laser diodes based on one-dimensional (1D) photonic crystal (PhC) nanocavities made in InP nanoribs heterogeneously integrated on a silicon-waveguide circuitry. The specific nanorib design enables an efficient electrical injection of carriers in the nanocavity without spoiling its optical properties. Room-temperature continuous-wave (CW) single-mode operation is obtained with a low current threshold of 100 µA. Laser emission at 1.56 µm in the silicon waveguides is obtained with wall-plug efficiencies greater than 10%. This result opens up exciting avenues for constructing optical networks at the submillimetre scale for on-chip interconnects and signal processing.

Silicon nitride photonics: from visible to mid-infrared wavelengths

NASA Astrophysics Data System (ADS)

Micó, Gloria; Bru, Luis A.; Pastor, Daniel; Doménech, David; Fernández, Juan; Sánchez, Ana; Cirera, Josep M.; Domínguez, Carlos; Muñoz, Pascual

2018-02-01

Silicon nitride has received a lot of attention during the last ten years, for applications such as bio-photonics, tele/datacom, optical signal processing and sensing. In this paper, firstly an updated review of the state of the art of silicon nitride photonics integration platforms will be provided. Secondly, our developments on a moderate confinement Si3N4 platform in the near-infrared will be presented. Finally, our steps towards establishing a Si3N4 based platform for broadband operation spanning from visible to mid-infrared wavelengths will be introduced.

Fabrication and testing of freestanding Si nanogratings for UV filtration on space-based particle sensors.

PubMed

Mukherjee, Pran; Zurbuchen, Thomas H; Guo, L Jay

2009-08-12

We demonstrate complete fabrication process integration and device performance of sturdy, self-supported transmission gratings in silicon. Gratings are patterned with nanoimprint lithography and aluminum liftoff on silicon-on-insulator wafers. Double-sided deep reactive ion etching (DRIE) creates freestanding 120 nm half-pitch gratings with 2000 nm depth and built-in 1 mm pitch bulk silicon support structures. Optical characterization demonstrates 10(-4) transmission of UV in the 190-250 nm band while a 25-30% geometric transparency allows particles to pass unimpeded for space plasma measurements.

Study of shape evaluation for mask and silicon using large field of view

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Mito, Hiroaki; Shinoda, Shinichi; Toyoda, Yasutaka

2010-09-01

We have developed a highly integrated method of mask and silicon metrology. The aim of this integration is evaluating the performance of the silicon corresponding to Hotspot on a mask. It can use the mask shape of a large field, besides. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. Currently, as semiconductor manufacture moves towards even smaller feature size, this necessitates more aggressive optical proximity correction (OPC) to drive the super-resolution technology (RET). In other words, there is a trade-off between highly precise RET and mask manufacture, and this has a big impact on the semiconductor market that centers on the mask business. As an optimal solution to these issues, we provide a DFM solution that extracts 2-dimensional data for a more realistic and error-free simulation by reproducing accurately the contour of the actual mask, in addition to the simulation results from the mask data. On the other hand, there is roughness in the silicon form made from a mass-production line. Moreover, there is variation in the silicon form. For this reason, quantification of silicon form is important, in order to estimate the performance of a pattern. In order to quantify, the same form is equalized in two dimensions. And the method of evaluating based on the form is popular. In this study, we conducted experiments for averaging method of the pattern (Measurement Based Contouring) as two-dimensional mask and silicon evaluation technique. That is, observation of the identical position of a mask and a silicon was considered. The result proved its detection accuracy and reliability of variability on two-dimensional pattern (mask and silicon) and is adaptable to following fields of mask quality management. •Discrimination of nuisance defects for fine pattern. •Determination of two-dimensional variability of pattern. •Verification of the performance of the pattern of various kinds of Hotspots. In this report, we introduce the experimental results and the application. We expect that the mask measurement and the shape control on mask production will make a huge contribution to mask yield-enhancement and that the DFM solution for mask quality control process will become much more important technology than ever. It is very important to observe the form of the same location of Design, Mask, and Silicon in such a viewpoint. And we report it about algorithm of the image composition in Large Field.

[A micro-silicon multi-slit spectrophotometer based on MEMS technology].

PubMed

Hao, Peng; Wu, Yi-Hui; Zhang, Ping; Liu, Yong-Shun; Zhang, Ke; Li, Hai-Wen

2009-06-01

A new mini-spectrophotometer was developed by adopting micro-silicon slit and pixel segmentation technology, and this spectrophotometer used photoelectron diode array as the detector by the back-dividing-light way. At first, the effect of the spectral bandwidth on the tested absorbance linear correlation was analyzed. A theory for the design of spectrophotometer's slit was brought forward after discussing the relationships between spectrophotometer spectrum band width and pre-and post-slits width. Then, the integrative micro-silicon-slit, which features small volume, high precision, and thin thickness, was manufactured based on the MEMS technology. Finally, a test was carried on linear absorbance solution by this spectrophotometer. The final result showed that the correlation coefficients were larger than 0.999, which means that the new mini-spectrophotometer with micro-silicon slit pixel segmentation has an obvious linear correlation.

Hybrid integrated single-wavelength laser with silicon micro-ring reflector

NASA Astrophysics Data System (ADS)

Ren, Min; Pu, Jing; Krishnamurthy, Vivek; Xu, Zhengji; Lee, Chee-Wei; Li, Dongdong; Gonzaga, Leonard; Toh, Yeow T.; Tjiptoharsono, Febi; Wang, Qian

2018-02-01

A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic integration on silicon wafer for optical communication and optical sensing application.

Integrated programmable photonic filter on the silicon-on-insulator platform.

PubMed

Liao, Shasha; Ding, Yunhong; Peucheret, Christophe; Yang, Ting; Dong, Jianji; Zhang, Xinliang

2014-12-29

We propose and demonstrate a silicon-on-insulator (SOI) on-chip programmable filter based on a four-tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heaters. We further demonstrate the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability for integrating with electronics.

Process development for waveguide chemical sensors with integrated polymeric sensitive layers

NASA Astrophysics Data System (ADS)

Amberkar, Raghu; Gao, Zhan; Park, Jongwon; Henthorn, David B.; Kim, Chang-Soo

2008-02-01

Due to the proper optical property and flexibility in the process development, an epoxy-based, high-aspect ratio photoresist SU-8 is now attracting attention in optical sensing applications. Manipulation of the surface properties of SU-8 waveguides is critical to attach functional films such as chemically-sensitive layers. We describe a new integration process to immobilize fluorescence molecules on SU-8 waveguide surface for application to intensity-based optical chemical sensors. We use two polymers for this application. Spin-on, hydrophobic, photopatternable silicone is a convenient material to contain fluorophore molecules and to pattern a photolithographically defined thin layer on the surface of SU-8. We use fumed silica powders as an additive to uniformly disperse the fluorophores in the silicone precursor. In general, additional processes are not critically required to promote the adhesion between the SU-8 and silicone. The other material is polyethylene glycol diacrylate (PEGDA). Recently we demonstrated a novel photografting method to modify the surface of SU-8 using a surface bound initiator to control its wettability. The activated surface is then coated with a monomer precursor solution. Polymerization follows when the sample is exposed to UV irradiation, resulting in a grafted PEGDA layer incorporating fluorophores within the hydrogel matrix. Since this method is based the UV-based photografting reaction, it is possible to grow off photolithographically defined hydrogel patterns on the waveguide structures. The resulting films will be viable integrated components in optical bioanalytical sensors. This is a promising technique for integrated chemical sensors both for planar type waveguide and vertical type waveguide chemical sensors.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

PubMed

Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

2017-12-13

Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

Metropolitan Quantum Key Distribution with Silicon Photonics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bunandar, Darius; Lentine, Anthony; Lee, Catherine

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalablemore » resource for future formation of metropolitan quantum-secure communications networks.« less

Metropolitan Quantum Key Distribution with Silicon Photonics

DOE PAGES

Bunandar, Darius; Lentine, Anthony; Lee, Catherine; ...

2018-04-06

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalablemore » resource for future formation of metropolitan quantum-secure communications networks.« less

Metropolitan Quantum Key Distribution with Silicon Photonics

NASA Astrophysics Data System (ADS)

Bunandar, Darius; Lentine, Anthony; Lee, Catherine; Cai, Hong; Long, Christopher M.; Boynton, Nicholas; Martinez, Nicholas; DeRose, Christopher; Chen, Changchen; Grein, Matthew; Trotter, Douglas; Starbuck, Andrew; Pomerene, Andrew; Hamilton, Scott; Wong, Franco N. C.; Camacho, Ryan; Davids, Paul; Urayama, Junji; Englund, Dirk

2018-04-01

Photonic integrated circuits provide a compact and stable platform for quantum photonics. Here we demonstrate a silicon photonics quantum key distribution (QKD) encoder in the first high-speed polarization-based QKD field tests. The systems reach composable secret key rates of 1.039 Mbps in a local test (on a 103.6-m fiber with a total emulated loss of 9.2 dB) and 157 kbps in an intercity metropolitan test (on a 43-km fiber with 16.4 dB loss). Our results represent the highest secret key generation rate for polarization-based QKD experiments at a standard telecom wavelength and demonstrate photonic integrated circuits as a promising, scalable resource for future formation of metropolitan quantum-secure communications networks.

On-chip optical transduction scheme for graphene nano-electro-mechanical systems in silicon-photonic platform.

PubMed

Dash, Aneesh; Selvaraja, S K; Naik, A K

2018-02-15

We present a scheme for on-chip optical transduction of strain and displacement of graphene-based nano-electro-mechanical systems (NEMS). A detailed numerical study on the feasibility of three silicon-photonic integrated circuit configurations is presented: the Mach-Zehnder interferometer (MZI), the micro-ring resonator, and the ring-loaded MZI. An index sensing based technique using an MZI loaded with a ring resonator with a moderate Q-factor of 2400 can yield a sensitivity of 28  fm/Hz and 6.5×10 -6 %/Hz for displacement and strain, respectively. Though any phase-sensitive integrated-photonic device could be used for optical transduction, here we show that optimal sensitivity is achievable by combining resonance with phase sensitivity.

On-chip optical transduction scheme for graphene nano-electro-mechanical systems in silicon-photonic platform

NASA Astrophysics Data System (ADS)

Dash, Aneesh; Selvaraja, S. K.; Naik, A. K.

2018-02-01

We present a scheme for on-chip optical transduction of strain and displacement of Graphene-based Nano-Electro-Mechanical Systems (NEMS). A detailed numerical study on the feasibility of three silicon-photonic integrated circuit configurations is presented: Mach-Zehnder Interferometer(MZI), micro-ring resonator and ring-loaded MZI. An index-sensing based technique using a Mach-Zehnder Interferometer loaded with a ring resonator with a moderate Q-factor of 2400 can yield a sensitivity of 28 fm/sqrt(Hz), and 6.5E-6 %/sqrt(Hz) for displacement and strain respectively. Though any phase sensitive integrated photonic device could be used for optical transduction, here we show that optimal sensitivity is achievable by combining resonance with phase sensitivity.

A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

NASA Astrophysics Data System (ADS)

Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

2013-03-01

Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

Silicon-based optoelectronics: Monolithic integration for WDM

NASA Astrophysics Data System (ADS)

Pearson, Matthew Richard T.

2000-10-01

This thesis details the development of enabling technologies required for inexpensive, monolithic integration of Si-based wavelength division multiplexing (WDM) components and photodetectors. The work involves the design and fabrication of arrayed waveguide grating demultiplexers in silicon-on-insulator (SOI), the development of advanced SiGe photodetectors capable of photodetection at 1.55 mum wavelengths, and the development of a low cost fabrication technique that enables the high volume production of Si-based photonic components. Arrayed waveguide grating (AWG) demultiplexers were designed and fabricated in SOI. The fabrication of AWGs in SOI has been reported in the literature, however there are a number of design issues specific to the SOI material system that can have a large effect on device performance and design, and have not been theoretically examined in earlier work. The SOI AWGs presented in this thesis are the smallest devices of this type reported, and they exhibit performance acceptable for commercial applications. The SiGe photodetectors reported in the literature exhibit extremely low responsivities at wavelengths near 1.55 mum. We present the first use of three dimensional growth modes to enhance the photoresponse of SiGe at 1.55 mum wavelengths. Metal semiconductor-metal (MSM) photodetectors were fabricated using this undulating quantum well structure, and demonstrate the highest responsivities yet reported for a SiGe-based photodetector at 1.55 mum. These detectors were monolithically integrated with low-loss SOI waveguides, enabling integration with nearly any Si-based passive WDM component. The pursuit of inexpensive Si-based photonic components also requires the development of new manufacturing techniques that are more suitable for high volume production. This thesis presents the development of a low cost fabrication technique based on the local oxidation of silicon (LOCOS), a standard processing technique used for Si integrated circuits. This process is developed for both SiGe and SOI waveguides, but is shown to be commercially suitable only for SOI waveguide devices. The technique allows nearly any Si microelectronics fabrication facility to begin manufacturing optical components with minimal change in processing equipment or techniques. These enabling technologies provide the critical elements for inexpensive, monolithic integration in a Si-based system.

Monolithically integrated self-rolled-up microtube-based vertical coupler for three-dimensional photonic integration

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yu, Xin; Arbabi, Ehsan; Goddard, Lynford L.

2015-07-20

We demonstrate a self-rolled-up microtube-based vertical photonic coupler monolithically integrated on top of a ridge waveguide to achieve three-dimensional (3D) photonic integration. The fabrication process is fully compatible with standard planar silicon processing technology. Strong light coupling between the vertical coupler and the ridge waveguide was observed experimentally, which may provide an alternative route for 3D heterogeneous photonic integration. The highest extinction ratio observed in the transmission spectrum passing through the ridge waveguide was 23 dB.

DAPHNE silicon photonics technological platform for research and development on WDM applications

NASA Astrophysics Data System (ADS)

Baudot, Charles; Fincato, Antonio; Fowler, Daivid; Perez-Galacho, Diego; Souhaité, Aurélie; Messaoudène, Sonia; Blanc, Romuald; Richard, Claire; Planchot, Jonathan; De-Buttet, Come; Orlando, Bastien; Gays, Fabien; Mezzomo, Cécilia; Bernard, Emilie; Marris-Morini, Delphine; Vivien, Laurent; Kopp, Christophe; Boeuf, Frédéric

2016-05-01

A new technological platform aimed at making prototypes and feasibility studies has been setup at STMicroelectronics using 300mm wafer foundry facilities. The technology, called DAPHNE (Datacom Advanced PHotonic Nanoscale Environment), is devoted at developing and evaluating new devices and sub-systems in particular for wavelength division multiplexing (WDM) applications and ring resonator based applications. Developed in the course of PLAT4MFP7 European project, DAPHNE is a flexible platform that fits perfectly R&D needs. The fabrication flow enables the processing of photonic integrated circuits using a silicon-on-insulator (SOI) of 300nm, partial etches of 150nm and 50nm and a total silicon etching. Consequently, two varieties of rib waveguides and one strip waveguide can be fabricated simultaneously with auto-alignment properties. The process variability on the 150nm partially etched silicon and the thin 50nm slab region are both less than 6 nm. Using a variety of different implantation configurations and a back-end of line of 5 metal layers, active devices are fabricated both in germanium and silicon. An available far back-end of line process consists of making 20 μm diameter copper posts on top of the electrical pads so that an electronic integrated circuit can be bonded on top the photonic die by 3D integration. Besides having those fabrication process options, DAPHNE is equipped with a library of standard cells for optical routing and multiplexing. Moreover, typical Mach-Zehnder modulators based on silicon pn junctions are also available for optical signal modulation. To achieve signal detection, germanium photodetectors also exist as standard cells. The measured single-mode propagation losses are 3.5 dB/cm for strip, 3.7 dB/cm for deep-rib (50nm slab) and 1.4 dB/cm for standard rib (150nm slab) waveguides. Transition tapers between different waveguide structures are as low as 0.006 dB.

R&D issues in scale-up and manufacturing of amorphous silicon tandem modules

NASA Astrophysics Data System (ADS)

Arya, R. R.; Carlson, D. E.; Chen, L. F.; Ganguly, G.; He, M.; Lin, G.; Middya, R.; Wood, G.; Newton, J.; Bennett, M.; Jackson, F.; Willing, F.

1999-03-01

R & D on amorphous silicon based tandem junction devices has improved the throughtput, the material utilization, and the performance of devices on commercial tin oxide coated glass. The tandem junction technology has been scaled-up to produce 8.6 Ft2 monolithically integrated modules in manufacturing at the TF1 plant. Optimization of performance and stability of these modules is ongoing.

An all-silicon optical PC-to-PC link utilizing USB

NASA Astrophysics Data System (ADS)

Goosen, Marius E.; Alberts, Antonie C.; Venter, Petrus J.; du Plessis, Monuko; Rademeyer, Pieter

2013-02-01

An integrated silicon light source still remains the Holy Grail for integrated optical communication systems. Hot carrier luminescent light sources provide a way to create light in a standard CMOS process, potentially enabling cost effective optical communication between CMOS integrated circuits. In this paper we present a 1 Mb/s integrated silicon optical link for information transfer, targeting a real-world integrated solution by connecting two PCs via a USB port while transferring data optically between the devices. This realization represents the first optical communication product prototype utilizing a CMOS light emitter. The silicon light sources which are implemented in a standard 0.35 μm CMOS technology are electrically modulated and detected using a commercial silicon avalanche photodiode. Data rates exceeding 10 Mb/s using silicon light sources have previously been demonstrated using raw bit streams. In this work data is sent in two half duplex streams accompanied with the separate transmission of a clock. Such an optical communication system could find application in high noise environments where data fidelity, range and cost are a determining factor.

Hybrid optofluidic biosensors

NASA Astrophysics Data System (ADS)

Parks, Joshua W.

Optofluidics, born of the desire to create a system containing microfluidic environments with integrated optical elements, has seen dramatic increases in popularity over the last 10 years. In particular, the application of this technology towards chip based molecular sensors has undergone significant development. The most sensitive of these biosensors interface liquid- and solid-core antiresonant reflecting optical waveguides (ARROWs). These sensor chips are created using conventional silicon microfabrication. As such, ARROW technology has previously been unable to utilize state-of-the-art microfluidic developments because the technology used--soft polydimethyl siloxane (PDMS) micromolded chips--is unamenable to the silicon microfabrication workflows implemented in the creation of ARROW detection chips. The original goal of this thesis was to employ hybrid integration, or the connection of independently designed and fabricated optofluidic and microfluidic chips, to create enhanced biosensors with the capability of processing and detecting biological samples on a single hybrid system. After successful demonstration of this paradigm, this work expanded into a new direction--direct integration of sensing and detection technologies on a new platform with dynamic, multi-dimensional photonic re-configurability. This thesis reports a number of firsts, including: • 1,000 fold optical transmission enhancement of ARROW optofluidic detection chips through thermal annealing, • Detection of single nucleic acids on a silicon-based ARROW chip, • Hybrid optofluidic integration of ARROW detection chips and passive PDMS microfluidic chips, • Hybrid optofluidic integration of ARROW detection chips and actively controllable PDMS microfluidic chips with integrated microvalves, • On-chip concentration and detection of clinical Ebola nucleic acids, • Multimode interference (MMI) waveguide based wavelength division multiplexing for detection of single influenza virions, • All PDMS platform created from monolithically integrated solid- and liquid-core waveguides with single particle detection efficiency and directly integrated microvalves, featuring: ∘ Tunable/tailorable PDMS MMI waveguides, ∘ Lightvalves (optical switch/fluidic microvalve) with the ability to dynamically control light and fluid flow simultaneously, ∘ Lightvalve trap architecture with the ability to physically trap, detect, and analyze single biomolecules.

Silicon-Germanium Films Grown on Sapphire for Ka-Band Communications Applications

NASA Technical Reports Server (NTRS)

Alterovitz, Samuel A.; Mueller, Carl H.; Croke, Edward T.

2004-01-01

NASA's vision in the space communications area is to develop a broadband data network in which there is a high degree of interconnectivity among the various satellite systems, ground stations, and wired systems. To accomplish this goal, we will need complex electronic circuits integrating analog and digital data handling at the Ka-band (26 to 40 GHz). The purpose of this project is to show the feasibility of a new technology for Ka-band communications applications, namely silicon germanium (SiGe) on sapphire. This new technology will have several advantages in comparison to the existing silicon-substrate- based circuits. The main advantages are extremely low parasitic reactances that enable much higher quality active and passive components, better device isolation, higher radiation tolerance, and the integration of digital and analog circuitry on a single chip.

On-chip photonic microsystem for optical signal processing based on silicon and silicon nitride platforms

NASA Astrophysics Data System (ADS)

Li, Yu; Li, Jiachen; Yu, Hongchen; Yu, Hai; Chen, Hongwei; Yang, Sigang; Chen, Minghua

2018-04-01

The explosive growth of data centers, cloud computing and various smart devices is limited by the current state of microelectronics, both in terms of speed and heat generation. Benefiting from the large bandwidth, promising low power consumption and passive calculation capability, experts believe that the integrated photonics-based signal processing and transmission technologies can break the bottleneck of microelectronics technology. In recent years, integrated photonics has become increasingly reliable and access to the advanced fabrication process has been offered by various foundries. In this paper, we review our recent works on the integrated optical signal processing system. We study three different kinds of on-chip signal processors and use these devices to build microsystems for the fields of microwave photonics, optical communications and spectrum sensing. The microwave photonics front receiver was demonstrated with a signal processing range of a full-band (L-band to W-band). A fully integrated microwave photonics transceiver without the on-chip laser was realized on silicon photonics covering the signal frequency of up 10 GHz. An all-optical orthogonal frequency division multiplexing (OFDM) de-multiplier was also demonstrated and used for an OFDM communication system with the rate of 64 Gbps. Finally, we show our work on the monolithic integrated spectrometer with a high resolution of about 20 pm at the central wavelength of 1550 nm. These proposed on-chip signal processing systems potential applications in the fields of radar, 5G wireless communication, wearable devices and optical access networks.

Dissolution chemistry and biocompatibility of silicon- and germanium-based semiconductors for transient electronics.

PubMed

Kang, Seung-Kyun; Park, Gayoung; Kim, Kyungmin; Hwang, Suk-Won; Cheng, Huanyu; Shin, Jiho; Chung, Sangjin; Kim, Minjin; Yin, Lan; Lee, Jeong Chul; Lee, Kyung-Mi; Rogers, John A

2015-05-06

Semiconducting materials are central to the development of high-performance electronics that are capable of dissolving completely when immersed in aqueous solutions, groundwater, or biofluids, for applications in temporary biomedical implants, environmentally degradable sensors, and other systems. The results reported here include comprehensive studies of the dissolution by hydrolysis of polycrystalline silicon, amorphous silicon, silicon-germanium, and germanium in aqueous solutions of various pH values and temperatures. In vitro cellular toxicity evaluations demonstrate the biocompatibility of the materials and end products of dissolution, thereby supporting their potential for use in biodegradable electronics. A fully dissolvable thin-film solar cell illustrates the ability to integrate these semiconductors into functional systems.

Broadband wavelength conversion in hydrogenated amorphous silicon waveguide with silicon nitride layer

NASA Astrophysics Data System (ADS)

Wang, Jiang; Li, Yongfang; Wang, Zhaolu; Han, Jing; Huang, Nan; Liu, Hongjun

2018-01-01

Broadband wavelength conversion based on degenerate four-wave mixing is theoretically investigated in a hydrogenated amorphous silicon (a-Si:H) waveguide with silicon nitride inter-cladding layer (a-Si:HN). We have found that enhancement of the non-linear effect of a-Si:H waveguide nitride intermediate layer facilitates broadband wavelength conversion. Conversion bandwidth of 490 nm and conversion efficiency of 11.4 dB were achieved in a numerical simulation of a 4 mm-long a-Si:HN waveguide under 1.55 μm continuous wave pumping. This broadband continuous-wave wavelength converter has potential applications in photonic networks, a type of readily manufactured low-cost highly integrated optical circuits.

Surface-micromachined and high-aspect ratio electrostatic actuators for aeronautic and space applications: design and lifetime considerations

NASA Astrophysics Data System (ADS)

Vescovo, P.; Joseph, E.; Bourbon, G.; Le Moal, P.; Minotti, P.; Hibert, C.; Pont, G.

2003-09-01

This paper focuses on recent advances in the field of MEMS-based actuators and distributed microelectromechanical systems (MEMS). IC-processed actuators (e.g. actuators that are machined using integrated circuit batch processes) are expected to open a wide range of industrial applications on the near term. The most promising investigations deal with high-aspect ratio electric field driven microactuators suitable for use in numerous technical fields such as aeronautics and space industry. Because the silicon micromachining technology have the potential to integrate both mechanical components and control circuits within a single process, MEMS-based active control of microscopic and macroscopic structures appears to be one of the most promising challenges for the next decade. As a first step towards new generations of MEMS-based smart structures, recent investigations dealing with silicon mechanisms involving MEMS-based actuators are briefly discussed in this paper.

Sensing systems using chip-based spectrometers

NASA Astrophysics Data System (ADS)

Nitkowski, Arthur; Preston, Kyle J.; Sherwood-Droz, Nicolás.; Behr, Bradford B.; Bismilla, Yusuf; Cenko, Andrew T.; DesRoches, Brandon; Meade, Jeffrey T.; Munro, Elizabeth A.; Slaa, Jared; Schmidt, Bradley S.; Hajian, Arsen R.

2014-06-01

Tornado Spectral Systems has developed a new chip-based spectrometer called OCTANE, the Optical Coherence Tomography Advanced Nanophotonic Engine, built using a planar lightwave circuit with integrated waveguides fabricated on a silicon wafer. While designed for spectral domain optical coherence tomography (SD-OCT) systems, the same miniaturized technology can be applied to many other spectroscopic applications. The field of integrated optics enables the design of complex optical systems which are monolithically integrated on silicon chips. The form factors of these systems can be significantly smaller, more robust and less expensive than their equivalent free-space counterparts. Fabrication techniques and material systems developed for microelectronics have previously been adapted for integrated optics in the telecom industry, where millions of chip-based components are used to power the optical backbone of the internet. We have further adapted the photonic technology platform for spectroscopy applications, allowing unheard-of economies of scale for these types of optical devices. Instead of changing lenses and aligning systems, these devices are accurately designed programmatically and are easily customized for specific applications. Spectrometers using integrated optics have large advantages in systems where size, robustness and cost matter: field-deployable devices, UAVs, UUVs, satellites, handheld scanning and more. We will discuss the performance characteristics of our chip-based spectrometers and the type of spectral sensing applications enabled by this technology.

Development and Characterization of the Bonding and Integration Technologies Needed for Fabricating Silicon Carbide Based Injector Components

NASA Technical Reports Server (NTRS)

Halbig,Michael C.; Singh, Mrityunjay

2008-01-01

Advanced ceramic bonding and integration technologies play a critical role in the fabrication and application of silicon carbide based components for a number of aerospace and ground based applications. One such application is a lean direct injector for a turbine engine to achieve low NOx emissions. Ceramic to ceramic diffusion bonding and ceramic to metal brazing technologies are being developed for this injector application. For the diffusion bonding technology, titanium interlayers (coatings and foils) were used to aid in the joining of silicon carbide (SiC) substrates. The influence of such variables as surface finish, interlayer thickness, and processing time were investigated. Electron microprobe analysis was used to identify the reaction formed phases. In the diffusion bonds, an intermediate phase, Ti5Si3Cx, formed that is thermally incompatible in its thermal expansion and caused thermal stresses and cracking during the processing cool-down. Thinner interlayers of pure titanium and/or longer processing times resulted in an optimized microstructure. Tensile tests on the joined materials resulted in strengths of 13-28 MPa depending on the SiC substrate material. Nondestructive evaluation using ultrasonic immersion showed well formed bonds. For the joining technology of brazing Kovar fuel tubes to silicon carbide, preliminary development of the joining approach has begun. Various technical issues and requirements for the injector application are addressed.

Adaptable silicon-carbon nanocables sandwiched between reduced graphene oxide sheets as lithium ion battery anodes.

PubMed

Wang, Bin; Li, Xianglong; Zhang, Xianfeng; Luo, Bin; Jin, Meihua; Liang, Minghui; Dayeh, Shadi A; Picraux, S T; Zhi, Linjie

2013-02-26

Silicon has been touted as one of the most promising anode materials for next generation lithium ion batteries. Yet, how to build energetic silicon-based electrode architectures by addressing the structural and interfacial stability issues facing silicon anodes still remains a big challenge. Here, we develop a novel kind of self-supporting binder-free silicon-based anodes via the encapsulation of silicon nanowires (SiNWs) with dual adaptable apparels (overlapped graphene (G) sheaths and reduced graphene oxide (RGO) overcoats). In the resulted architecture (namely, SiNW@G@RGO), the overlapped graphene sheets, as adaptable but sealed sheaths, prevent the direct exposure of encapsulated silicon to the electrolyte and enable the structural and interfacial stabilization of silicon nanowires. Meanwhile, the flexible and conductive RGO overcoats accommodate the volume change of embedded SiNW@G nanocables and thus maintain the structural and electrical integrity of the SiNW@G@RGO. As a result, the SiNW@G@RGO electrodes exhibit high reversible specific capacity of 1600 mAh g⁻¹ at 2.1 A g⁻¹, 80% capacity retention after 100 cycles, and superior rate capability (500 mAh g⁻¹ at 8.4 A g⁻¹) on the basis of the total electrode weight.

Postfabrication Phase Error Correction of Silicon Photonic Circuits by Single Femtosecond Laser Pulses

DOE PAGES

Bachman, Daniel; Chen, Zhijiang; Wang, Christopher; ...

2016-11-29

Phase errors caused by fabrication variations in silicon photonic integrated circuits are an important problem, which negatively impacts device yield and performance. This study reports our recent progress in the development of a method for permanent, postfabrication phase error correction of silicon photonic circuits based on femtosecond laser irradiation. Using beam shaping technique, we achieve a 14-fold enhancement in the phase tuning resolution of the method with a Gaussian-shaped beam compared to a top-hat beam. The large improvement in the tuning resolution makes the femtosecond laser method potentially useful for very fine phase trimming of silicon photonic circuits. Finally, wemore » also show that femtosecond laser pulses can directly modify silicon photonic devices through a SiO 2 cladding layer, making it the only permanent post-fabrication method that can tune silicon photonic circuits protected by an oxide cladding.« less

Tailoring the optical characteristics of microsized InP nanoneedles directly grown on silicon.

PubMed

Li, Kun; Sun, Hao; Ren, Fan; Ng, Kar Wei; Tran, Thai-Truong D; Chen, Roger; Chang-Hasnain, Connie J

2014-01-08

Nanoscale self-assembly offers a pathway to realize heterogeneous integration of III-V materials on silicon. However, for III-V nanowires directly grown on silicon, dislocation-free single-crystal quality could only be attained below certain critical dimensions. We recently reported a new approach that overcomes this size constraint, demonstrating the growth of single-crystal InGaAs/GaAs and InP nanoneedles with the base diameters exceeding 1 μm. Here, we report distinct optical characteristics of InP nanoneedles which are varied from mostly zincblende, zincblende/wurtzite-mixed, to pure wurtzite crystalline phase. We achieved, for the first time, pure single-crystal wurtzite-phase InP nanoneedles grown on silicon with bandgaps of 80 meV larger than that of zincblende-phase InP. Being able to attain excellent material quality while scaling up in size promises outstanding device performance of these nanoneedles. At room temperature, a high internal quantum efficiency of 25% and optically pumped lasing are demonstrated for single nanoneedle as-grown on silicon substrate. Recombination dynamics proves the excellent surface quality of the InP nanoneedles, which paves the way toward achieving multijunction photovoltaic cells, long-wavelength heterostructure lasers, and advanced photonic integrated circuits.

Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

PubMed

Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

2014-07-22

Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

Polycrystalline silicon study: Low-cost silicon refining technology prospects and semiconductor-grade polycrystalline silicon availability through 1988

NASA Technical Reports Server (NTRS)

Costogue, E. N.; Ferber, R.; Lutwack, R.; Lorenz, J. H.; Pellin, R.

1984-01-01

Photovoltaic arrays that convert solar energy into electrical energy can become a cost effective bulk energy generation alternative, provided that an adequate supply of low cost materials is available. One of the key requirements for economic photovoltaic cells is reasonably priced silicon. At present, the photovoltaic industry is dependent upon polycrystalline silicon refined by the Siemens process primarily for integrated circuits, power devices, and discrete semiconductor devices. This dependency is expected to continue until the DOE sponsored low cost silicon refining technology developments have matured to the point where they are in commercial use. The photovoltaic industry can then develop its own source of supply. Silicon material availability and market pricing projections through 1988 are updated based on data collected early in 1984. The silicon refining industry plans to meet the increasing demands of the semiconductor device and photovoltaic product industries are overviewed. In addition, the DOE sponsored technology research for producing low cost polycrystalline silicon, probabilistic cost analysis for the two most promising production processes for achieving the DOE cost goals, and the impacts of the DOE photovoltaics program silicon refining research upon the commercial polycrystalline silicon refining industry are addressed.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

A Microsystem Based on Porous Silicon-Glass Anodic Bonding for Gas and Liquid Optical Sensing

PubMed Central

De Stefano, Luca; Malecki, Krzysztof; Della Corte, Francesco G.; Moretti, Luigi; Rea, Ilaria; Rotiroti, Lucia; Rendina, Ivo

2006-01-01

We have recently presented an integrated silicon-glass opto-chemical sensor for lab-on-chip applications, based on porous silicon and anodic bonding technologies. In this work, we have optically characterized the sensor response on exposure to vapors of several organic compounds by means of reflectivity measurements. The interaction between the porous silicon, which acts as transducer layer, and the organic vapors fluxed into the glass sealed microchamber, is preserved by the fabrication process, resulting in optical path increase, due to the capillary condensation of the vapors into the pores. Using the Bruggemann theory, we have calculated the filled pores volume for each substance. The sensor dynamic has been described by time-resolved measurements: due to the analysis chamber miniaturization, the response time is only of 2 s. All these results have been compared with data acquired on the same PSi structure before the anodic bonding process.

Flow restrictor silicon membrane microvalve actuated by optically controlled paraffin phase transition

NASA Astrophysics Data System (ADS)

Kolari, K.; Havia, T.; Stuns, I.; Hjort, K.

2014-08-01

Restrictor valves allow proportional control of fluid flow but are rarely integrated in microfluidic systems. In this study, an optically actuated silicon membrane restrictor microvalve is demonstrated. Its actuation is based on the phase transition of paraffin, using a paraffin wax mixed with a suitable concentration of optically absorbing nanographite particles. Backing up the membrane with oil (the melted paraffin) allows for a compliant yet strong contact to the valve seat, which enables handling of high pressures. At flow rates up to 30 µL min-1 and at a pressure of 2 bars, the valve can successfully be closed and control the flow level by restriction. The use of this paraffin composite as an adhesive layer sandwiched between the silicon valve and glass eases fabrication. This type of restrictor valve is best suited for high pressure, low volume flow silicon-based nanofluidic systems.

High Temperature Joining and Characterization of Joint Properties in Silicon Carbide-Based Composite Materials

NASA Technical Reports Server (NTRS)

Halbig, Michael C.; Singh, Mrityunjay

2015-01-01

Advanced silicon carbide-based ceramics and composites are being developed for a wide variety of high temperature extreme environment applications. Robust high temperature joining and integration technologies are enabling for the fabrication and manufacturing of large and complex shaped components. The development of a new joining approach called SET (Single-step Elevated Temperature) joining will be described along with the overview of previously developed joining approaches including high temperature brazing, ARCJoinT (Affordable, Robust Ceramic Joining Technology), diffusion bonding, and REABOND (Refractory Eutectic Assisted Bonding). Unlike other approaches, SET joining does not have any lower temperature phases and will therefore have a use temperature above 1315C. Optimization of the composition for full conversion to silicon carbide will be discussed. The goal is to find a composition with no remaining carbon or free silicon. Green tape interlayers were developed for joining. Microstructural analysis and preliminary mechanical tests of the joints will be presented.

Thin-film reliability and engineering overview

NASA Technical Reports Server (NTRS)

Ross, R. G., Jr.

1984-01-01

The reliability and engineering technology base required for thin film solar energy conversions modules is discussed. The emphasis is on the integration of amorphous silicon cells into power modules. The effort is being coordinated with SERI's thin film cell research activities as part of DOE's Amorphous Silicon Program. Program concentration is on temperature humidity reliability research, glass breaking strength research, point defect system analysis, hot spot heating assessment, and electrical measurements technology.

Dispersion engineering of thick high-Q silicon nitride ring-resonators via atomic layer deposition.

PubMed

Riemensberger, Johann; Hartinger, Klaus; Herr, Tobias; Brasch, Victor; Holzwarth, Ronald; Kippenberg, Tobias J

2012-12-03

We demonstrate dispersion engineering of integrated silicon nitride based ring resonators through conformal coating with hafnium dioxide deposited on top of the structures via atomic layer deposition. Both, magnitude and bandwidth of anomalous dispersion can be significantly increased. The results are confirmed by high resolution frequency-comb-assisted-diode-laser spectroscopy and are in very good agreement with the simulated modification of the mode spectrum.

Thin-film reliability and engineering overview

NASA Astrophysics Data System (ADS)

Ross, R. G., Jr.

1984-10-01

The reliability and engineering technology base required for thin film solar energy conversions modules is discussed. The emphasis is on the integration of amorphous silicon cells into power modules. The effort is being coordinated with SERI's thin film cell research activities as part of DOE's Amorphous Silicon Program. Program concentration is on temperature humidity reliability research, glass breaking strength research, point defect system analysis, hot spot heating assessment, and electrical measurements technology.

Silicon Satellites: Picosats, Nanosats, and Microsats

NASA Technical Reports Server (NTRS)

Janson, Siegfried W.

1995-01-01

Silicon, the most abundant solid element in the Earth's lithosphere, is a useful material for spacecraft construction. Silicon is stronger than stainless steel, has a thermal conductivity about half that of aluminum, is transparent to much of the infrared radiation spectrum, and can form a stable oxide. These unique properties enable silicon to become most of the mass of a satellite, it can simultaneously function as structure, heat transfer system, radiation shield, optics, and semiconductor substrate. Semiconductor batch-fabrication techniques can produce low-power digital circuits, low-power analog circuits, silicon-based radio frequency circuits, and micro-electromechanical systems (MEMS) such as thrusters and acceleration sensors on silicon substrates. By exploiting these fabrication techniques, it is possible to produce highly-integrated satellites for a number of applications. This paper analyzes the limitations of silicon satellites due to size. Picosatellites (approximately 1 gram mass), nanosatellites (about 1 kg mass), and highly capable microsatellites (about 10 kg mass) can perform various missions with lifetimes of a few days to greater than a decade.

Sub-parts per million NO2 chemi-transistor sensors based on composite porous silicon/gold nanostructures prepared by metal-assisted etching.

PubMed

Sainato, Michela; Strambini, Lucanos Marsilio; Rella, Simona; Mazzotta, Elisabetta; Barillaro, Giuseppe

2015-04-08

Surface doping of nano/mesostructured materials with metal nanoparticles to promote and optimize chemi-transistor sensing performance represents the most advanced research trend in the field of solid-state chemical sensing. In spite of the promising results emerging from metal-doping of a number of nanostructured semiconductors, its applicability to silicon-based chemi-transistor sensors has been hindered so far by the difficulties in integrating the composite metal-silicon nanostructures using the complementary metal-oxide-semiconductor (CMOS) technology. Here we propose a facile and effective top-down method for the high-yield fabrication of chemi-transistor sensors making use of composite porous silicon/gold nanostructures (cSiAuNs) acting as sensing gate. In particular, we investigate the integration of cSiAuNs synthesized by metal-assisted etching (MAE), using gold nanoparticles (NPs) as catalyst, in solid-state junction-field-effect transistors (JFETs), aimed at the detection of NO2 down to 100 parts per billion (ppb). The chemi-transistor sensors, namely cSiAuJFETs, are CMOS compatible, operate at room temperature, and are reliable, sensitive, and fully recoverable for the detection of NO2 at concentrations between 100 and 500 ppb, up to 48 h of continuous operation.

Graphene/Si CMOS Hybrid Hall Integrated Circuits

PubMed Central

Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

2014-01-01

Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process. PMID:24998222

Graphene/Si CMOS hybrid hall integrated circuits.

PubMed

Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

2014-07-07

Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

Chemical silicon surface modification and bioreceptor attachment to develop competitive integrated photonic biosensors.

PubMed

Escorihuela, Jorge; Bañuls, María José; García Castelló, Javier; Toccafondo, Veronica; García-Rupérez, Jaime; Puchades, Rosa; Maquieira, Ángel

2012-12-01

Methodology for the functionalization of silicon-based materials employed for the development of photonic label-free nanobiosensors is reported. The studied functionalization based on organosilane chemistry allowed the direct attachment of biomolecules in a single step, maintaining their bioavailability. Using this immobilization approach in probe microarrays, successful specific detection of bacterial DNA is achieved, reaching hybridization sensitivities of 10 pM. The utility of the immobilization approach for the functionalization of label-free nanobiosensors based on photonic crystals and ring resonators was demonstrated using bovine serum albumin (BSA)/anti-BSA as a model system.

Silicon photonics cloud (SiCloud)

NASA Astrophysics Data System (ADS)

DeVore, Peter T. S.; Jiang, Yunshan; Lynch, Michael; Miyatake, Taira; Carmona, Christopher; Chan, Andrew C.; Muniam, Kuhan; Jalali, Bahram

2015-02-01

We present SiCloud (Silicon Photonics Cloud), the first free, instructional web-based research and education tool for silicon photonics. SiCloud's vision is to provide a host of instructional and research web-based tools. Such interactive learning tools enhance traditional teaching methods by extending access to a very large audience, resulting in very high impact. Interactive tools engage the brain in a way different from merely reading, and so enhance and reinforce the learning experience. Understanding silicon photonics is challenging as the topic involves a wide range of disciplines, including material science, semiconductor physics, electronics and waveguide optics. This web-based calculator is an interactive analysis tool for optical properties of silicon and related material (SiO2, Si3N4, Al2O3, etc.). It is designed to be a one stop resource for students, researchers and design engineers. The first and most basic aspect of Silicon Photonics is the Material Parameters, which provides the foundation for the Device, Sub-System and System levels. SiCloud includes the common dielectrics and semiconductors for waveguide core, cladding, and photodetection, as well as metals for electrical contacts. SiCloud is a work in progress and its capability is being expanded. SiCloud is being developed at UCLA with funding from the National Science Foundation's Center for Integrated Access Networks (CIAN) Engineering Research Center.

Review of the Potential of the Ni/Cu Plating Technique for Crystalline Silicon Solar Cells

PubMed Central

Rehman, Atteq ur; Lee, Soo Hong

2014-01-01

Developing a better method for the metallization of silicon solar cells is integral part of realizing superior efficiency. Currently, contact realization using screen printing is the leading technology in the silicon based photovoltaic industry, as it is simple and fast. However, the problem with metallization of this kind is that it has a lower aspect ratio and higher contact resistance, which limits solar cell efficiency. The mounting cost of silver pastes and decreasing silicon wafer thicknesses encourages silicon solar cell manufacturers to develop fresh metallization techniques involving a lower quantity of silver usage and not relying pressing process of screen printing. In recent times nickel/copper (Ni/Cu) based metal plating has emerged as a metallization method that may solve these issues. This paper offers a detailed review and understanding of a Ni/Cu based plating technique for silicon solar cells. The formation of a Ni seed layer by adopting various deposition techniques and a Cu conducting layer using a light induced plating (LIP) process are appraised. Unlike screen-printed metallization, a step involving patterning is crucial for opening the masking layer. Consequently, experimental procedures involving patterning methods are also explicated. Lastly, the issues of adhesion, back ground plating, process complexity and reliability for industrial applications are also addressed. PMID:28788516

Review of the Potential of the Ni/Cu Plating Technique for Crystalline Silicon Solar Cells.

PubMed

Rehman, Atteq Ur; Lee, Soo Hong

2014-02-18

Developing a better method for the metallization of silicon solar cells is integral part of realizing superior efficiency. Currently, contact realization using screen printing is the leading technology in the silicon based photovoltaic industry, as it is simple and fast. However, the problem with metallization of this kind is that it has a lower aspect ratio and higher contact resistance, which limits solar cell efficiency. The mounting cost of silver pastes and decreasing silicon wafer thicknesses encourages silicon solar cell manufacturers to develop fresh metallization techniques involving a lower quantity of silver usage and not relying pressing process of screen printing. In recent times nickel/copper (Ni/Cu) based metal plating has emerged as a metallization method that may solve these issues. This paper offers a detailed review and understanding of a Ni/Cu based plating technique for silicon solar cells. The formation of a Ni seed layer by adopting various deposition techniques and a Cu conducting layer using a light induced plating (LIP) process are appraised. Unlike screen-printed metallization, a step involving patterning is crucial for opening the masking layer. Consequently, experimental procedures involving patterning methods are also explicated. Lastly, the issues of adhesion, back ground plating, process complexity and reliability for industrial applications are also addressed.

Polyaniline-encapsulated silicon on three-dimensional carbon nanotubes foam with enhanced electrochemical performance for lithium-ion batteries

NASA Astrophysics Data System (ADS)

Zhou, Xiaoming; Liu, Yang; Du, Chunyu; Ren, Yang; Mu, Tiansheng; Zuo, Pengjian; Yin, Geping; Ma, Yulin; Cheng, Xinqun; Gao, Yunzhi

2018-03-01

Seeking free volume around nanostructures for silicon-based anodes has been a crucial strategy to improve cycling and rate performance in the next generation Li-ion batteries. Herein, through a simple pyrolysis and in-situ polymerization approach, the low cost commercially available melamine foam as a soft template converts carbon nanotubes into highly dispersed and three-dimensionally interconnected framework with encapsulated silicon/polyaniline hierarchical nanoarchitecture. This unique core-sheath structure based on carbon nanotubes foam integrates a large number of mesoporous, thus providing well-accessible space for electrolyte wetting, whereas the carbon nanotubes matrix serves as conductive thoroughfares for electron transport. Meanwhile, the outer polyaniline coated on silicon nanoparticles provides effective space for volume expansion of silicon, further inhibiting the active material escape from the current collector. As expected, the PANI-Si@CNTs foam exhibits a high initial specific capacity of 1954 mAh g-1 and retains 727 mAh g-1 after 100 cycles at 100 mA g-1, which can be attributed to highly electrical conductivity of carbon nanotubes and protective layer of polyaniline sheath, together with three-dimensionally interconnected porous skeleton. This facile structure can pave a way for large scale synthesis of high durable silicon-based anodes or other electrode materials with huge volume expansion.

Novel Approach for Positioning Sensor Lead Wires on SiC-Based Monolithic Ceramic and FRCMC Components/Subcomponents Having Flat and Curved Surfaces

NASA Technical Reports Server (NTRS)

Kiser, J. Douglas; Singh, Mrityunjay; Lei, Jin-Fen; Martin, Lisa C.

1999-01-01

A novel attachment approach for positioning sensor lead wires on silicon carbide-based monolithic ceramic and fiber reinforced ceramic matrix composite (FRCMC) components has been developed. This approach is based on an affordable, robust ceramic joining technology, named ARCJoinT, which was developed for the joining of silicon carbide-based ceramic and fiber reinforced composites. The ARCJoinT technique has previously been shown to produce joints with tailorable thickness and good high temperature strength. In this study, silicon carbide-based ceramic and FRCMC attachments of different shapes and sizes were joined onto silicon carbide fiber reinforced silicon carbide matrix (SiC/ SiC) composites having flat and curved surfaces. Based on results obtained in previous joining studies. the joined attachments should maintain their mechanical strength and integrity at temperatures up to 1350 C in air. Therefore they can be used to position and secure sensor lead wires on SiC/SiC components that are being tested in programs that are focused on developing FRCMCs for a number of demanding high temperature applications in aerospace and ground-based systems. This approach, which is suitable for installing attachments on large and complex shaped monolithic ceramic and composite components, should enhance the durability of minimally intrusive high temperature sensor systems. The technology could also be used to reinstall attachments on ceramic components that were damaged in service.

IIIV/Si Nanoscale Lasers and Their Integration with Silicon Photonics

NASA Astrophysics Data System (ADS)

Bondarenko, Olesya

The rapidly evolving global information infrastructure requires ever faster data transfer within computer networks and stations. Integrated chip scale photonics can pave the way to accelerated signal manipulation and boost bandwidth capacity of optical interconnects in a compact and ergonomic arrangement. A key building block for integrated photonic circuits is an on-chip laser. In this dissertation we explore ways to reduce the physical footprint of semiconductor lasers and make them suitable for high density integration on silicon, a standard material platform for today's integrated circuits. We demonstrated the first room temperature metalo-dielectric nanolaser, sub-wavelength in all three dimensions. Next, we demonstrated a nanolaser on silicon, showing the feasibility of its integration with this platform. We also designed and realized an ultracompact feedback laser with edge-emitting structure, amenable for in-plane coupling with a standard silicon waveguide. Finally, we discuss the challenges and propose solutions for improvement of the device performance and practicality.

Limits on silicon nanoelectronics for terascale integration.

PubMed

Meindl, J D; Chen, Q; Davis, J A

2001-09-14

Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

Near-infrared sub-bandgap all-silicon photodetectors: state of the art and perspectives.

PubMed

Casalino, Maurizio; Coppola, Giuseppe; Iodice, Mario; Rendina, Ivo; Sirleto, Luigi

2010-01-01

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared.

Near-Infrared Sub-Bandgap All-Silicon Photodetectors: State of the Art and Perspectives

PubMed Central

Casalino, Maurizio; Coppola, Giuseppe; Iodice, Mario; Rendina, Ivo; Sirleto, Luigi

2010-01-01

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared. PMID:22163487

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachman, Daniel; Chen, Zhijiang; Wang, Christopher

Phase errors caused by fabrication variations in silicon photonic integrated circuits are an important problem, which negatively impacts device yield and performance. This study reports our recent progress in the development of a method for permanent, postfabrication phase error correction of silicon photonic circuits based on femtosecond laser irradiation. Using beam shaping technique, we achieve a 14-fold enhancement in the phase tuning resolution of the method with a Gaussian-shaped beam compared to a top-hat beam. The large improvement in the tuning resolution makes the femtosecond laser method potentially useful for very fine phase trimming of silicon photonic circuits. Finally, wemore » also show that femtosecond laser pulses can directly modify silicon photonic devices through a SiO 2 cladding layer, making it the only permanent post-fabrication method that can tune silicon photonic circuits protected by an oxide cladding.« less

High-performance silicon photonics technology for telecommunications applications.

PubMed

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-04-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge-based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge-based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications.

High-performance silicon photonics technology for telecommunications applications

PubMed Central

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-01-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge–based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge–based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications. PMID:27877659

High-performance silicon photonics technology for telecommunications applications

NASA Astrophysics Data System (ADS)

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-04-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge-based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge-based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications.

Towards on-chip integration of brain imaging photodetectors using standard CMOS process.

PubMed

Kamrani, Ehsan; Lesage, Frederic; Sawan, Mohamad

2013-01-01

The main effects of on-chip integration on the performance and efficiency of silicon avalanche photodiode (SiAPD) and photodetector front-end is addressed in this paper based on the simulation and fabrication experiments. Two different silicon APDs are fabricated separately and also integrated with a transimpedance amplifier (TIA) front-end using standard CMOS technology. SiAPDs are designed in p+/n-well structure with guard rings realized in different shapes. The TIA front-end has been designed using distributed-gain concept combined with resistive-feedback and common-gate topology to reach low-noise and high gain-bandwidth product (GBW) characteristics. The integrated SiAPDs show higher signal-to-noise ratio (SNR), sensitivity and detection efficiency comparing to the separate SiAPDs. The integration does not show a significant effect on the gain and preserves the low power consumption. Using APDs with p-well guard-ring is preferred due to the higher observed efficiency after integration.

Printable nanostructured silicon solar cells for high-performance, large-area flexible photovoltaics.

PubMed

Lee, Sung-Min; Biswas, Roshni; Li, Weigu; Kang, Dongseok; Chan, Lesley; Yoon, Jongseung

2014-10-28

Nanostructured forms of crystalline silicon represent an attractive materials building block for photovoltaics due to their potential benefits to significantly reduce the consumption of active materials, relax the requirement of materials purity for high performance, and hence achieve greatly improved levelized cost of energy. Despite successful demonstrations for their concepts over the past decade, however, the practical application of nanostructured silicon solar cells for large-scale implementation has been hampered by many existing challenges associated with the consumption of the entire wafer or expensive source materials, difficulties to precisely control materials properties and doping characteristics, or restrictions on substrate materials and scalability. Here we present a highly integrable materials platform of nanostructured silicon solar cells that can overcome these limitations. Ultrathin silicon solar microcells integrated with engineered photonic nanostructures are fabricated directly from wafer-based source materials in configurations that can lower the materials cost and can be compatible with deterministic assembly procedures to allow programmable, large-scale distribution, unlimited choices of module substrates, as well as lightweight, mechanically compliant constructions. Systematic studies on optical and electrical properties, photovoltaic performance in experiments, as well as numerical modeling elucidate important design rules for nanoscale photon management with ultrathin, nanostructured silicon solar cells and their interconnected, mechanically flexible modules, where we demonstrate 12.4% solar-to-electric energy conversion efficiency for printed ultrathin (∼ 8 μm) nanostructured silicon solar cells when configured with near-optimal designs of rear-surface nanoposts, antireflection coating, and back-surface reflector.

Quantum electromechanics on silicon nitride nanomembranes

PubMed Central

Fink, J. M.; Kalaee, M.; Pitanti, A.; Norte, R.; Heinzle, L.; Davanço, M.; Srinivasan, K.; Painter, O.

2016-01-01

Radiation pressure has recently been used to effectively couple the quantum motion of mechanical elements to the fields of optical or microwave light. Integration of all three degrees of freedom—mechanical, optical and microwave—would enable a quantum interconnect between microwave and optical quantum systems. We present a platform based on silicon nitride nanomembranes for integrating superconducting microwave circuits with planar acoustic and optical devices such as phononic and photonic crystals. Using planar capacitors with vacuum gaps of 60 nm and spiral inductor coils of micron pitch we realize microwave resonant circuits with large electromechanical coupling to planar acoustic structures of nanoscale dimensions and femtoFarad motional capacitance. Using this enhanced coupling, we demonstrate microwave backaction cooling of the 4.48 MHz mechanical resonance of a nanobeam to an occupancy as low as 0.32. These results indicate the viability of silicon nitride nanomembranes as an all-in-one substrate for quantum electro-opto-mechanical experiments. PMID:27484751

Experimental demonstration of two-dimensional hybrid waveguide-integrated plasmonic crystals on silicon-on-insulator platform

NASA Astrophysics Data System (ADS)

Ren, Guanghui; Yudistira, Didit; Nguyen, Thach G.; Khodasevych, Iryna; Schoenhardt, Steffen; Berean, Kyle J.; Hamm, Joachim M.; Hess, Ortwin; Mitchell, Arnan

2017-07-01

Nanoscale plasmonic structures can offer unique functionality due to extreme sub-wavelength optical confinement, but the realization of complex plasmonic circuits is hampered by high propagation losses. Hybrid approaches can potentially overcome this limitation, but only few practical approaches based on either single or few element arrays of nanoantennas on dielectric nanowire have been experimentally demonstrated. In this paper, we demonstrate a two dimensional hybrid photonic plasmonic crystal interfaced with a standard silicon photonic platform. Off resonance, we observe low loss propagation through our structure, while on resonance we observe strong propagation suppression and intense concentration of light into a dense lattice of nanoscale hot-spots on the surface providing clear evidence of a hybrid photonic plasmonic crystal bandgap. This fully integrated approach is compatible with established silicon-on-insulator (SOI) fabrication techniques and constitutes a significant step toward harnessing plasmonic functionality within SOI photonic circuits.

Quantum electromechanics on silicon nitride nanomembranes.

PubMed

Fink, J M; Kalaee, M; Pitanti, A; Norte, R; Heinzle, L; Davanço, M; Srinivasan, K; Painter, O

2016-08-03

Radiation pressure has recently been used to effectively couple the quantum motion of mechanical elements to the fields of optical or microwave light. Integration of all three degrees of freedom-mechanical, optical and microwave-would enable a quantum interconnect between microwave and optical quantum systems. We present a platform based on silicon nitride nanomembranes for integrating superconducting microwave circuits with planar acoustic and optical devices such as phononic and photonic crystals. Using planar capacitors with vacuum gaps of 60 nm and spiral inductor coils of micron pitch we realize microwave resonant circuits with large electromechanical coupling to planar acoustic structures of nanoscale dimensions and femtoFarad motional capacitance. Using this enhanced coupling, we demonstrate microwave backaction cooling of the 4.48 MHz mechanical resonance of a nanobeam to an occupancy as low as 0.32. These results indicate the viability of silicon nitride nanomembranes as an all-in-one substrate for quantum electro-opto-mechanical experiments.

Vertical waveguides integrated with silicon photodetectors: Towards high efficiency and low cross-talk image sensors

NASA Astrophysics Data System (ADS)

Tut, Turgut; Dan, Yaping; Duane, Peter; Yu, Young; Wober, Munib; Crozier, Kenneth B.

2012-01-01

We describe the experimental realization of vertical silicon nitride waveguides integrated with silicon photodetectors. The waveguides are embedded in a silicon dioxide layer. Scanning photocurrent microscopy is performed on a device containing a waveguide, and on a device containing the silicon dioxide layer, but without the waveguide. The results confirm the waveguide's ability to guide light onto the photodetector with high efficiency. We anticipate that the use of these structures in image sensors, with one waveguide per pixel, would greatly improve efficiency and significantly reduce inter-pixel crosstalk.

Monolithic integration of elliptic-symmetry diffractive optical element on silicon-based 45 degrees micro-reflector.

PubMed

Lan, Hsiao-Chin; Hsiao, Hsu-Liang; Chang, Chia-Chi; Hsu, Chih-Hung; Wang, Chih-Ming; Wu, Mount-Learn

2009-11-09

A monolithically integrated micro-optical element consisting of a diffractive optical element (DOE) and a silicon-based 45 degrees micro-reflector is experimentally demonstrated to facilitate the optical alignment of non-coplanar fiber-to-fiber coupling. The slanted 45 degrees reflector with a depth of 216 microm is fabricated on a (100) silicon wafer by anisotropic wet etching. The DOE with a diameter of 174.2 microm and a focal length of 150 microm is formed by means of dry etching. Such a compact device is suitable for the optical micro-system to deflect the incident light by 90 degrees and to focus it on the image plane simultaneously. The measured light pattern with a spot size of 15 microm has a good agreement with the simulated result of the elliptic-symmetry DOE with an off-axis design for eliminating the strongly astigmatic aberration. The coupling efficiency is enhanced over 10-folds of the case without a DOE on the 45 degrees micro-reflector. This device would facilitate the optical alignment of non-coplanar light coupling and further miniaturize the volume of microsystem.

In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

PubMed Central

Makey, Ghaith; Elahi, Parviz; Çolakoğlu, Tahir; Ergeçen, Emre; Yavuz, Özgün; Hübner, René; Borra, Mona Zolfaghari; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ömer

2017-01-01

Silicon is an excellent material for microelectronics and integrated photonics1–3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e., “in-chip” microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances. PMID:28983323

In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

NASA Astrophysics Data System (ADS)

Tokel, Onur; Turnalı, Ahmet; Makey, Ghaith; Elahi, Parviz; ćolakoǧlu, Tahir; Ergeçen, Emre; Yavuz, Ã.-zgün; Hübner, René; Zolfaghari Borra, Mona; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ã.-mer

2017-10-01

Silicon is an excellent material for microelectronics and integrated photonics1-3, with untapped potential for mid-infrared optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow the fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realized with techniques like reactive ion etching. Embedded optical elements7, electronic devices and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1-µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has an optical index different to that in unmodified parts, enabling the creation of numerous photonic devices. Optionally, these parts can be chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface—that is, `in-chip'—microstructures for microfluidic cooling of chips, vias, micro-electro-mechanical systems, photovoltaic applications and photonic devices that match or surpass corresponding state-of-the-art device performances.

From Bell Labs to Silicon Valley: A Saga of Technology Transfer, 1954-1961

NASA Astrophysics Data System (ADS)

Riordan, Michael

2009-03-01

Although Bell Telephone Laboratories invented the transistor and developed most of the associated semiconductor technology, the integrated circuit or microchip emerged elsewhere--at Texas Instruments and Fairchild Semiconductor Company. I recount how the silicon technology required to make microchips possible was first developed at Bell Labs in the mid-1950s. Much of it reached the San Francisco Bay Area when transistor pioneer William Shockley left Bell Labs in 1955 to establish the Shockley Semiconductor Laboratory in Mountain View, hiring a team of engineers and scientists to develop and manufacture transistors and related semiconductor devices. But eight of them--including Gordon Moore and Robert Noyce, eventually the co-founders of Intel--resigned en masse in September 1957 to start Fairchild, bringing with them the scientific and technological expertise they had acquired and further developed at Shockley's firm. This event marked the birth of Silicon Valley, both technologically and culturally. By March 1961 the company was marketing its Micrologic integrated circuits, the first commercial silicon microchips, based on the planar processing technique developed at Fairchild by Jean Hoerni.

Innovative and water based stripping approach for thick and bulk photoresists

NASA Astrophysics Data System (ADS)

Rudolph, Matthias; Schumann, Dirk; Thrun, Xaver; Esche, Silvio; Hohle, Christoph

2014-10-01

The usage of phase fluid based stripping agents to remove photoresists from silicon substrates was studied. Photoresists are required for many silicon based technologies such as MEMS patterning, 3D-Integration or frontend and backend of line semiconductor applications [1]. Although the use of resists is very common, their successful integration often depends on the ability to remove the resist after certain processing steps. On the one hand the resist is changing during subsequent process steps that can cause a thermally activated cross-linking which increases the stripping complexity. Resist removal is also challenging after the formation of a hard polymer surface layer during plasma or implant processes which is called skin or crust [2]. On the other hand the choice of stripping chemistry is often limited due to the presence of functional materials such as metals which can be damaged by aggressive stripping chemistries [3].

Low-temperature crack-free Si3N4 nonlinear photonic circuits for CMOS-compatible optoelectronic co-integration

NASA Astrophysics Data System (ADS)

Casale, Marco; Kerdiles, Sebastien; Brianceau, Pierre; Hugues, Vincent; El Dirani, Houssein; Sciancalepore, Corrado

2017-02-01

In this communication, authors report for the first time on the fabrication and testing of Si3N4 non-linear photonic circuits for CMOS-compatible monolithic co-integration with silicon-based optoelectronics. In particular, a novel process has been developed to fabricate low-loss crack-free Si3N4 750-nm-thick films for Kerr-based nonlinear functions featuring full thermal budget compatibility with existing Silicon photonics and front-end Si optoelectronics. Briefly, differently from previous and state-of-the-art works, our nonlinear nitride-based platform has been realized without resorting to commonly-used high-temperature annealing ( 1200°C) of the film and its silica upper-cladding used to break N-H bonds otherwise causing absorption in the C-band and destroying its nonlinear functionality. Furthermore, no complex and fabrication-intolerant Damascene process - as recently reported earlier this year - aimed at controlling cracks generated in thick tensile-strained Si3N4 films has been used as well. Instead, a tailored Si3N4 multiple-step film deposition in 200-mm LPCVD-based reactor and subsequent low-temperature (400°C) PECVD oxide encapsulation have been used to fabricate the nonlinear micro-resonant circuits aiming at generating optical frequency combs via optical parametric oscillators (OPOs), thus allowing the monolithic co-integration of such nonlinear functions on existing CMOS-compatible optoelectronics, for both active and passive components such as, for instance, silicon modulators and wavelength (de-)multiplexers. Experimental evidence based on wafer-level statistics show nitride-based 112-μm-radius ring resonators using such low-temperature crack-free nitride film exhibiting quality factors exceeding Q >3 x 105, thus paving the way to low-threshold power-efficient Kerr-based comb sources and dissipative temporal solitons in the C-band featuring full thermal processing compatibility with Si photonic integrated circuits (Si-PICs).

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

GaN-on-Silicon - Present capabilities and future directions

NASA Astrophysics Data System (ADS)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

NASA Astrophysics Data System (ADS)

Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

2017-02-01

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

Integrated resonant micro-optical gyroscope and method of fabrication

DOEpatents

Vawter, G Allen [Albuquerque, NM; Zubrzycki, Walter J [Sandia Park, NM; Guo, Junpeng [Albuquerque, NM; Sullivan, Charles T [Albuquerque, NM

2006-09-12

An integrated optic gyroscope is disclosed which is based on a photonic integrated circuit (PIC) having a bidirectional laser source, a pair of optical waveguide phase modulators and a pair of waveguide photodetectors. The PIC can be connected to a passive ring resonator formed either as a coil of optical fiber or as a coiled optical waveguide. The lasing output from each end of the bidirectional laser source is phase modulated and directed around the passive ring resonator in two counterpropagating directions, with a portion of the lasing output then being detected to determine a rotation rate for the integrated optical gyroscope. The coiled optical waveguide can be formed on a silicon, glass or quartz substrate with a silicon nitride core and a silica cladding, while the PIC includes a plurality of III V compound semiconductor layers including one or more quantum well layers which are disordered in the phase modulators and to form passive optical waveguides.

R&D issues in scale-up and manufacturing of amorphous silicon tandem modules

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arya, R.R.; Carlson, D.E.; Chen, L.F.

1999-03-01

R & D on amorphous silicon based tandem junction devices has improved the throughtput, the material utilization, and the performance of devices on commercial tin oxide coated glass. The tandem junction technology has been scaled-up to produce 8.6&hthinsp;Ft{sup 2} monolithically integrated modules in manufacturing at the TF1 plant. Optimization of performance and stability of these modules is ongoing. {copyright} {ital 1999 American Institute of Physics.}

A silicon technology for millimeter-wave monolithic circuits

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-12-01

A silicon millimeter-wave integrated-circuit (SIMMWIC) technology that includes high-energy ion implantation and pulsed-laser annealing, secondary ion mass spectrometry (SIMS) profile diagnostics, and novel wafer thinning has been developed. This technology has been applied to a SIMMWIC single-pole single-throw (SPST) switch and to IMPATT and p-i-n diode fabrication schemes. Thus, the SIMMWIC technology is a proven base for monolithic millimeter-wave sources and control circuit applications.

Silicon photonics for neuromorphic information processing

NASA Astrophysics Data System (ADS)

Bienstman, Peter; Dambre, Joni; Katumba, Andrew; Freiberger, Matthias; Laporte, Floris; Lugnan, Alessio

2018-02-01

We present our latest results on silicon photonics neuromorphic information processing based a.o. on techniques like reservoir computing. We will discuss aspects like scalability, novel architectures for enhanced power efficiency, as well as all-optical readout. Additionally, we will touch upon new machine learning techniques to operate these integrated readouts. Finally, we will show how these systems can be used for high-speed low-power information processing for applications like recognition of biological cells.

Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

PubMed

Aull, Brian

2016-04-08

This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

Millimeter-wave silicon-based ultra-wideband automotive radar transceivers

NASA Astrophysics Data System (ADS)

Jain, Vipul

Since the invention of the integrated circuit, the semiconductor industry has revolutionized the world in ways no one had ever anticipated. With the advent of silicon technologies, consumer electronics became light-weight and affordable and paved the way for an Information-Communication-Entertainment age. While silicon almost completely replaced compound semiconductors from these markets, it has been unable to compete in areas with more stringent requirements due to technology limitations. One of these areas is automotive radar sensors, which will enable next-generation collision-warning systems in automobiles. A low-cost implementation is absolutely essential for widespread use of these systems, which leads us to the subject of this dissertation---silicon-based solutions for automotive radars. This dissertation presents architectures and design techniques for mm-wave automotive radar transceivers. Several fully-integrated transceivers and receivers operating at 22-29 GHz and 77-81 GHz are demonstrated in both CMOS and SiGe BiCMOS technologies. Excellent performance is achieved indicating the suitability of silicon technologies for automotive radar sensors. The first CMOS 22-29-GHz pulse-radar receiver front-end for ultra-wideband radars is presented. The chip includes a low noise amplifier, I/Q mixers, quadrature voltage-controlled oscillators, pulse formers and variable-gain amplifiers. Fabricated in 0.18-mum CMOS, the receiver achieves a conversion gain of 35-38.1 dB and a noise figure of 5.5-7.4 dB. Integration of multi-mode multi-band transceivers on a single chip will enable next-generation low-cost automotive radar sensors. Two highly-integrated silicon ICs are designed in a 0.18-mum BiCMOS technology. These designs are also the first reported demonstrations of mm-wave circuits with high-speed digital circuits on the same chip. The first mm-wave dual-band frequency synthesizer and transceiver, operating in the 24-GHz and 77-GHz bands, are demonstrated. All circuits except the oscillators are shared between the two bands. A multi-functional injection-locked circuit is used after the oscillators to reconfigure the division ratio inside the phase-locked loop. The synthesizer is suitable for integration in automotive radar transceivers and heterodyne receivers for 94-GHz imaging applications. The transceiver chip includes a dual-band low noise amplifier, a shared downconversion chain, dual-band pulse formers, power amplifiers, a dual-band frequency synthesizer and a high-speed programmable baseband pulse generator. Radar functionality is demonstrated using loopback measurements.

Bonding and Integration Technologies for Silicon Carbide Based Injector Components

NASA Technical Reports Server (NTRS)

Halbig, Michael C.; Singh, Mrityunjay

2008-01-01

Advanced ceramic bonding and integration technologies play a critical role in the fabrication and application of silicon carbide based components for a number of aerospace and ground based applications. One such application is a lean direct injector for a turbine engine to achieve low NOx emissions. Ceramic to ceramic diffusion bonding and ceramic to metal brazing technologies are being developed for this injector application. For the diffusion bonding, titanium interlayers (PVD and foils) were used to aid in the joining of silicon carbide (SiC) substrates. The influence of such variables as surface finish, interlayer thickness (10, 20, and 50 microns), processing time and temperature, and cooling rates were investigated. Microprobe analysis was used to identify the phases in the bonded region. For bonds that were not fully reacted an intermediate phase, Ti5Si3Cx, formed that is thermally incompatible in its thermal expansion and caused thermal stresses and cracking during the processing cool-down. Thinner titanium interlayers and/or longer processing times resulted in stable and compatible phases that did not contribute to microcracking and resulted in an optimized microstructure. Tensile tests on the joined materials resulted in strengths of 13-28 MPa depending on the SiC substrate material. Non-destructive evaluation using ultrasonic immersion showed well formed bonds. For the joining technology of brazing Kovar fuel tubes to silicon carbide, preliminary development of the joining approach has begun. Various technical issues and requirements for the injector application are addressed.

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide

PubMed Central

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P. K. A.

2014-01-01

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W−1/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems. PMID:25417847

First-principles prediction of the softening of the silicon shock Hugoniot curve

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hu, S. X.; Militzer, B.; Collins, L. A.

Here, whock compression of silicon (Si) under extremely high pressures (>100 Mbar) was investigated by using two first-principles methods of orbital-free molecular dynamics (OFMD) and path integral Monte Carlo (PIMC). While pressures from the two methods agree very well, PIMC predicts a second compression maximum because of 1s electron ionization that is absent in OFMD calculations since Thomas–Fermi-based theories lack inner shell structure. The Kohn–Sham density functional theory is used to calculate the equation of state (EOS) of warm dense silicon for low-pressure loadings (P < 100 Mbar). Combining these first-principles EOS results, the principal Hugoniot curve of silicon formore » pressures varying from 0.80 Mbar to above ~10 Gbar was derived. We find that silicon is ~20% or more softer than what was predicted by EOS models based on the chemical picture of matter. Existing experimental data (P ≈ 1–2 Mbar) seem to indicate this softening behavior of Si, which calls for future strong-shock experiments (P > 10 Mbar) to benchmark our results.« less

First-principles prediction of the softening of the silicon shock Hugoniot curve

DOE PAGES

Hu, S. X.; Militzer, B.; Collins, L. A.; ...

2016-09-15

Here, whock compression of silicon (Si) under extremely high pressures (>100 Mbar) was investigated by using two first-principles methods of orbital-free molecular dynamics (OFMD) and path integral Monte Carlo (PIMC). While pressures from the two methods agree very well, PIMC predicts a second compression maximum because of 1s electron ionization that is absent in OFMD calculations since Thomas–Fermi-based theories lack inner shell structure. The Kohn–Sham density functional theory is used to calculate the equation of state (EOS) of warm dense silicon for low-pressure loadings (P < 100 Mbar). Combining these first-principles EOS results, the principal Hugoniot curve of silicon formore » pressures varying from 0.80 Mbar to above ~10 Gbar was derived. We find that silicon is ~20% or more softer than what was predicted by EOS models based on the chemical picture of matter. Existing experimental data (P ≈ 1–2 Mbar) seem to indicate this softening behavior of Si, which calls for future strong-shock experiments (P > 10 Mbar) to benchmark our results.« less

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide.

PubMed

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P K A

2014-11-24

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W(-1)/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems.

Silicon-based silicon–germanium–tin heterostructure photonics

PubMed Central

Soref, Richard

2014-01-01

The wavelength range that extends from 1550 to 5000 nm is a new regime of operation for Si-based photonic and opto-electronic integrated circuits. To actualize the new chips, heterostructure active devices employing the ternary SiGeSn alloy are proposed in this paper. Foundry-based monolithic integration is described. Opportunities and challenges abound in creating laser diodes, optical amplifiers, light-emitting diodes, photodetectors, modulators, switches and a host of high-performance passive infrared waveguided components. PMID:24567479

On-Wafer Measurement of a Silicon-Based CMOS VCO at 324 GHz

NASA Technical Reports Server (NTRS)

Samoska, Lorene; Man Fung, King; Gaier, Todd; Huang, Daquan; Larocca, Tim; Chang, M. F.; Campbell, Richard; Andrews, Michael

2008-01-01

The world s first silicon-based complementary metal oxide/semiconductor (CMOS) integrated-circuit voltage-controlled oscillator (VCO) operating in a frequency range around 324 GHz has been built and tested. Concomitantly, equipment for measuring the performance of this oscillator has been built and tested. These accomplishments are intermediate steps in a continuing effort to develop low-power-consumption, low-phase-noise, electronically tunable signal generators as local oscillators for heterodyne receivers in submillimeter-wavelength (frequency > 300 GHz) scientific instruments and imaging systems. Submillimeter-wavelength imaging systems are of special interest for military and law-enforcement use because they could, potentially, be used to detect weapons hidden behind clothing and other opaque dielectric materials. In comparison with prior submillimeter- wavelength signal generators, CMOS VCOs offer significant potential advantages, including great reductions in power consumption, mass, size, and complexity. In addition, there is potential for on-chip integration of CMOS VCOs with other CMOS integrated circuitry, including phase-lock loops, analog- to-digital converters, and advanced microprocessors.

Wavelength-tunable entangled photons from silicon-integrated III-V quantum dots.

PubMed

Chen, Yan; Zhang, Jiaxiang; Zopf, Michael; Jung, Kyubong; Zhang, Yang; Keil, Robert; Ding, Fei; Schmidt, Oliver G

2016-01-27

Many of the quantum information applications rely on indistinguishable sources of polarization-entangled photons. Semiconductor quantum dots are among the leading candidates for a deterministic entangled photon source; however, due to their random growth nature, it is impossible to find different quantum dots emitting entangled photons with identical wavelengths. The wavelength tunability has therefore become a fundamental requirement for a number of envisioned applications, for example, nesting different dots via the entanglement swapping and interfacing dots with cavities/atoms. Here we report the generation of wavelength-tunable entangled photons from on-chip integrated InAs/GaAs quantum dots. With a novel anisotropic strain engineering technique based on PMN-PT/silicon micro-electromechanical system, we can recover the quantum dot electronic symmetry at different exciton emission wavelengths. Together with a footprint of several hundred microns, our device facilitates the scalable integration of indistinguishable entangled photon sources on-chip, and therefore removes a major stumbling block to the quantum-dot-based solid-state quantum information platforms.

Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology.

PubMed

Llobet, J; Rius, G; Chuquitarqui, A; Borrisé, X; Koops, R; van Veghel, M; Perez-Murano, F

2018-04-02

We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

Fabrication of Silicon Backshorts with Improved Out-of-Band Rejection for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology

NASA Astrophysics Data System (ADS)

Llobet, J.; Rius, G.; Chuquitarqui, A.; Borrisé, X.; Koops, R.; van Veghel, M.; Perez-Murano, F.

2018-04-01

We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

Graphene optical modulator

NASA Astrophysics Data System (ADS)

Liu, Ming; Yin, Xiaobo; Wang, Feng; Zhang, Xiang

2011-10-01

Data communications have been growing at a speed even faster than Moore's Law, with a 44-fold increase expected within the next 10 years. Data Transfer on such scale would have to recruit optical communication technology and inspire new designs of light sources, modulators, and photodetectors. An ideal optical modulator will require high modulation speed, small device footprint and large operating bandwidth. Silicon modulators based on free carrier plasma dispersion effect and compound semiconductors utilizing direct bandgap transition have seen rapid improvement over the past decade. One of the key limitations for using silicon as modulator material is its weak refractive index change, which limits the footprint of silicon Mach-Zehnder interferometer modulators to millimeters. Other approaches such as silicon microring modulators reduce the operation wavelength range to around 100 pm and are highly sensitive to typical fabrication tolerances and temperature fluctuations. Growing large, high quality wafers of compound semiconductors, and integrating them on silicon or other substrates is expensive, which also restricts their commercialization. In this work, we demonstrate that graphene can be used as the active media for electroabsorption modulators. By tuning the Fermi energy level of the graphene layer, we induced changes in the absorption coefficient of graphene at communication wavelength and achieve a modulation depth above 3 dB. This integrated device also has the potential of working at high speed.

Low-cost solar array project and Proceedings of the 14th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Mcdonald, R. R.

1980-01-01

Activities are reported on the following areas: project analysis and integration; technology development in silicon material, large area sheet silicon, and encapsulation; production process and equipment development; and engineering and operations, and the steps taken to integrate these efforts. Visual materials presented at the project Integration Meeting are included.

Magnetic resonance imaging of breast implants.

PubMed

Shah, Mala; Tanna, Neil; Margolies, Laurie

2014-12-01

Silicone breast implants have significantly evolved since their introduction half a century ago, yet implant rupture remains a common and expected complication, especially in patients with earlier-generation implants. Magnetic resonance imaging is the primary modality for assessing the integrity of silicone implants and has excellent sensitivity and specificity, and the Food and Drug Administration currently recommends periodic magnetic resonance imaging screening for silent silicone breast implant rupture. Familiarity with the types of silicone implants and potential complications is essential for the radiologist. Signs of intracapsular rupture include the noose, droplet, subcapsular line, and linguine signs. Signs of extracapsular rupture include herniation of silicone with a capsular defect and extruded silicone material. Specific sequences including water and silicone suppression are essential for distinguishing rupture from other pathologies and artifacts. Magnetic resonance imaging provides valuable information about the integrity of silicone implants and associated complications.

Powerful, Efficient Electric Vehicle Chargers: Low-Cost, Highly-Integrated Silicon Carbide (SiC) Multichip Power Modules (MCPMs) for Plug-In Hybrid Electric

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

2010-09-14

ADEPT Project: Currently, charging the battery of an electric vehicle (EV) is a time-consuming process because chargers can only draw about as much power from the grid as a hair dryer. APEI is developing an EV charger that can draw as much power as a clothes dryer, which would drastically speed up charging time. APEI's charger uses silicon carbide (SiC)-based power transistors. These transistors control the electrical energy flowing through the charger's circuits more effectively and efficiently than traditional transistors made of straight silicon. The SiC-based transistors also require less cooling, enabling APEI to create EV chargers that are 10more » times smaller than existing chargers.« less

Integrated Optics for Planar imaging and Optical Signal Processing

NASA Astrophysics Data System (ADS)

Song, Qi

Silicon photonics is a subject of growing interest with the potential of delivering planar electro-optical devices with chip scale integration. Silicon-on-insulator (SOI) technology has provided a marvelous platform for photonics industry because of its advantages in integration capability in CMOS circuit and countless nonlinearity applications in optical signal processing. This thesis is focused on the investigation of planar imaging techniques on SOI platform and potential applications in ultra-fast optical signal processing. In the first part, a general review and background introduction about integrated photonics circuit and planar imaging technique are provided. In chapter 2, planar imaging platform is realized by a silicon photodiode on SOI chip. Silicon photodiode on waveguide provides a high numerical aperture for an imaging transceiver pixel. An erbium doped Y2O3 particle is excited by 1550nm Laser and the fluorescent image is obtained with assistance of the scanning system. Fluorescence image is reconstructed by using image de-convolution technique. Under photovoltaic mode, we use an on-chip photodiode and an external PIN photodiode to realize similar resolution as 5μm. In chapter 3, a time stretching technique is developed to a spatial domain to realize a 2D imaging system as an ultrafast imaging tool. The system is evaluated based on theoretical calculation. The experimental results are shown for a verification of system capability to imaging a micron size particle or a finger print. Meanwhile, dynamic information for a moving object is also achieved by correlation algorithm. In chapter 4, the optical leaky wave antenna based on SOI waveguide has been utilized for imaging applications and extensive numerical studied has been conducted. and the theoretical explanation is supported by leaky wave theory. The highly directive radiation has been obtained from the broadside with 15.7 dB directivity and a 3dB beam width of ΔØ 3dB ≈ 1.65° in free space environment when β -1 = 2.409 × 105/m, α=4.576 ×103/m. At the end, electronics beam-steering principle has been studied and the comprehensive model has been built to explain carrier transformation behavior in a PIN junction as individual silicon perturbation. Results show that 1019/cm3 is possible obtained with electron injection mechanism. Although the radiation modulation based on carrier injection of 1019/cm3 gives 0.5dB variation, resonant structure, such as Fabry Perrot Cavity, can be integrated with LOWAs to enhance modulation effect.

Thermally controlled coupling of a rolled-up microtube integrated with a waveguide on a silicon electronic-photonic integrated circuit.

PubMed

Zhong, Qiuhang; Tian, Zhaobing; Veerasubramanian, Venkat; Dastjerdi, M Hadi Tavakoli; Mi, Zetian; Plant, David V

2014-05-01

We report on the first experimental demonstration of the thermal control of coupling strength between a rolled-up microtube and a waveguide on a silicon electronic-photonic integrated circuit. The microtubes are fabricated by selectively releasing a coherently strained GaAs/InGaAs heterostructure bilayer. The fabricated microtubes are then integrated with silicon waveguides using an abruptly tapered fiber probe. By tuning the gap between the microtube and the waveguide using localized heaters, the microtube-waveguide evanescent coupling is effectively controlled. With heating, the extinction ratio of a microtube whispering-gallery mode changes over an 18 dB range, while the resonant wavelength remains approximately unchanged. Utilizing this dynamic thermal tuning effect, we realize coupling modulation of the microtube integrated with the silicon waveguide at 2 kHz with a heater voltage swing of 0-6 V.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

The chemo-mechanical effect of cutting fluid on material removal in diamond scribing of silicon

NASA Astrophysics Data System (ADS)

Kumar, Arkadeep; Melkote, Shreyes N.

2017-07-01

The mechanical integrity of silicon wafers cut by diamond wire sawing depends on the damage (e.g., micro-cracks) caused by the cutting process. The damage type and extent depends on the material removal mode, i.e., ductile or brittle. This paper investigates the effect of cutting fluid on the mode of material removal in diamond scribing of single crystal silicon, which simulates the material removal process in diamond wire sawing of silicon wafers. We conducted scribing experiments with a diamond tipped indenter in the absence (dry) and in the presence of a water-based cutting fluid. We found that the cutting mode is more ductile when scribing in the presence of cutting fluid compared to dry scribing. We explain the experimental observations by the chemo-mechanical effect of the cutting fluid on silicon, which lowers its hardness and promotes ductile mode material removal.

Hybrid Silicon Photonic Integration using Quantum Well Intermixing

NASA Astrophysics Data System (ADS)

Jain, Siddharth R.

With the push for faster data transfer across all domains of telecommunication, optical interconnects are transitioning into shorter range applications such as in data centers and personal computing. Silicon photonics, with its economic advantages of leveraging well-established silicon manufacturing facilities, is considered the most promising approach to further scale down the cost and size of optical interconnects for chip-to-chip communication. Intrinsic properties of silicon however limit its ability to generate and modulate light, both of which are key to realizing on-chip optical data transfer. The hybrid silicon approach directly addresses this problem by using molecularly bonded III-V epitaxial layers on silicon for optical gain and absorption. This technology includes direct transfer of III-V wafer to a pre-patterned silicon-on-insulator wafer. Several discrete devices for light generation, modulation, amplification and detection have already been demonstrated on this platform. As in the case of electronics, multiple photonic elements can be integrated on a single chip to improve performance and functionality. However, scalable photonic integration requires the ability to control the bandgap for individual devices along with design changes to simplify fabrication. In the research presented here, quantum well intermixing is used as a technique to define multiple bandgaps for integration on the hybrid silicon platform. Implantation enhanced disordering is used to generate four bandgaps spread over 120+ nm. By combining these selectively intermixed III-V layers with pre-defined gratings and waveguides on silicon, we fabricate distributed feedback, distributed Bragg reflector, Fabry-Perot and mode-locked lasers along with photodetectors, electro-absorption modulators and other test structures, all on a single chip. We demonstrate a broadband laser source with continuous-wave operational lasers over a 200 nm bandwidth. Some of these lasers are integrated with modulators with a 3-dB bandwidth above 25 GHz, thus demonstrating coarse wavelength division multiplexing transmitter on silicon.

Solar cell circuit and method for manufacturing solar cells

NASA Technical Reports Server (NTRS)

Mardesich, Nick (Inventor)

2010-01-01

The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.

Low-temperature wafer direct bonding of silicon and quartz glass by a two-step wet chemical surface cleaning

NASA Astrophysics Data System (ADS)

Wang, Chenxi; Xu, Jikai; Zeng, Xiaorun; Tian, Yanhong; Wang, Chunqing; Suga, Tadatomo

2018-02-01

We demonstrate a facile bonding process for combining silicon and quartz glass wafers by a two-step wet chemical surface cleaning. After a post-annealing at 200 °C, strong bonding interfaces with no defects or microcracks were obtained. On the basis of the detailed surface and bonding interface characterizations, the bonding mechanism was explored and discussed. The amino groups terminated on the cleaned surfaces might contribute to the bonding strength enhancement during the annealing. This cost-effective bonding process has great potentials for silicon- and glass-based heterogeneous integrations without requiring a vacuum system.

Cascaded Mach-Zehnder wavelength filters in silicon photonics for low loss and flat pass-band WDM (de-)multiplexing.

PubMed

Horst, Folkert; Green, William M J; Assefa, Solomon; Shank, Steven M; Vlasov, Yurii A; Offrein, Bert Jan

2013-05-20

We present 1-to-8 wavelength (de-)multiplexer devices based on a binary tree of cascaded Mach-Zehnder-like lattice filters, and manufactured using a 90 nm CMOS-integrated silicon photonics technology. We demonstrate that these devices combine a flat pass-band over more than 50% of the channel spacing with low insertion loss of less than 1.6 dB, and have a small device size of approximately 500 × 400 µm. This makes this type of filters well suited for application as WDM (de-)multiplexer in silicon photonics transceivers for optical data communication in large scale computer systems.

Athermal Photonic Devices and Circuits on a Silicon Platform

NASA Astrophysics Data System (ADS)

Raghunathan, Vivek

In recent years, silicon based optical interconnects has been pursued as an effective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in significant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the effect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiN x to hermetically seal the athermal. Further, we employ visible light for post-fabrication trimming of athermal rings by sandwiching a thin photosensitive layer of As2S3 in between amorphous Si core and polymer top cladding. System design of an add-drop filter requires an optimum combination of channel counts performance and power handling capacity for maximum aggregate bandwidth. We establish the superior performance of athermal add-drop filter compared to a standard filter treating bandwidth as the figure-of-merit. (Copies available exclusively from MIT Libraries, libraries.mit.edu/docs - docs mit.edu)

Schematic driven silicon photonics design

NASA Astrophysics Data System (ADS)

Chrostowski, Lukas; Lu, Zeqin; Flückiger, Jonas; Pond, James; Klein, Jackson; Wang, Xu; Li, Sarah; Tai, Wei; Hsu, En Yao; Kim, Chan; Ferguson, John; Cone, Chris

2016-03-01

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is very common for the design to begin at the physical component level. In order to build large integrated photonic systems, it is crucial to design using a schematic-driven approach. This includes simulations based on schematics, schematic-driven layout, layout versus schematic verification, and post-layout simulations. This paper describes such a design framework implemented using Mentor Graphics and Lumerical Solutions design tools. In addition, we describe challenges in silicon photonics related to manufacturing, and how these can be taken into account in simulations and how these impact circuit performance.

Silicon-based products and solutions

NASA Astrophysics Data System (ADS)

Painchaud, Y.; Poulin, M.; Pelletier, F.; Latrasse, C.; Gagné, J.-F.; Savard, S.; Robidoux, G.; Picard, M.-.; Paquet, S.; Davidson, C.-.; Pelletier, M.; Cyr, M.; Paquet, C.; Guy, M.; Morsy-Osman, M.; Chagnon, M.; Plant, D. V.

2014-03-01

TeraXion started silicon photonics activities aiming at developing building blocks for new products and customized solutions. Passive and active devices have been developed including MMI couplers, power splitters, Bragg grating filters, high responsivity photodetectors, high speed modulators and variable optical attenuators. Packaging solutions including fiber attachment and hybrid integration using flip-chip were also developed. More specifically, a compact packaged integrated coherent receiver has been realized. Good performances were obtained as demonstrated by our system tests results showing transmission up to 4800 km with BER below hard FEC threshold. The package size is small but still limited by the electrical interface. Migrating to more compact RF interface would allow realizing the full benefit of this technology.

Determination of the quasi-TE mode (in-plane) graphene linear absorption coefficient via integration with silicon-on-insulator racetrack cavity resonators.

PubMed

Crowe, Iain F; Clark, Nicholas; Hussein, Siham; Towlson, Brian; Whittaker, Eric; Milosevic, Milan M; Gardes, Frederic Y; Mashanovich, Goran Z; Halsall, Matthew P; Vijayaraghaven, Aravind

2014-07-28

We examine the near-IR light-matter interaction for graphene integrated cavity ring resonators based on silicon-on-insulator (SOI) race-track waveguides. Fitting of the cavity resonances from quasi-TE mode transmission spectra reveal the real part of the effective refractive index for graphene, n(eff) = 2.23 ± 0.02 and linear absorption coefficient, α(gTE) = 0.11 ± 0.01dBμm(-1). The evanescent nature of the guided mode coupling to graphene at resonance depends strongly on the height of the graphene above the cavity, which places limits on the cavity length for optical sensing applications.

Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

NASA Astrophysics Data System (ADS)

Buettel, G.; Joppich, J.; Hartmann, U.

2017-12-01

Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Plasmonic engineering of spontaneous emission from silicon nanocrystals.

PubMed

Goffard, Julie; Gérard, Davy; Miska, Patrice; Baudrion, Anne-Laure; Deturche, Régis; Plain, Jérôme

2013-01-01

Silicon nanocrystals offer huge advantages compared to other semi-conductor quantum dots as they are made from an abundant, non-toxic material and are compatible with silicon devices. Besides, among a wealth of extraordinary properties ranging from catalysis to nanomedicine, metal nanoparticles are known to increase the radiative emission rate of semiconductor quantum dots. Here, we use gold nanoparticles to accelerate the emission of silicon nanocrystals. The resulting integrated hybrid emitter is 5-fold brighter than bare silicon nanocrystals. We also propose an in-depth analysis highlighting the role of the different physical parameters in the photoluminescence enhancement phenomenon. This result has important implications for the practical use of silicon nanocrystals in optoelectronic devices, for instance for the design of efficient down-shifting devices that could be integrated within future silicon solar cells.

Origami silicon optoelectronics for hemispherical electronic eye systems.

PubMed

Zhang, Kan; Jung, Yei Hwan; Mikael, Solomon; Seo, Jung-Hun; Kim, Munho; Mi, Hongyi; Zhou, Han; Xia, Zhenyang; Zhou, Weidong; Gong, Shaoqin; Ma, Zhenqiang

2017-11-24

Digital image sensors in hemispherical geometries offer unique imaging advantages over their planar counterparts, such as wide field of view and low aberrations. Deforming miniature semiconductor-based sensors with high-spatial resolution into such format is challenging. Here we report a simple origami approach for fabricating single-crystalline silicon-based focal plane arrays and artificial compound eyes that have hemisphere-like structures. Convex isogonal polyhedral concepts allow certain combinations of polygons to fold into spherical formats. Using each polygon block as a sensor pixel, the silicon-based devices are shaped into maps of truncated icosahedron and fabricated on flexible sheets and further folded either into a concave or convex hemisphere. These two electronic eye prototypes represent simple and low-cost methods as well as flexible optimization parameters in terms of pixel density and design. Results demonstrated in this work combined with miniature size and simplicity of the design establish practical technology for integration with conventional electronic devices.

Heterogeneously-integrated VCSEL using high-contrast grating on silicon

NASA Astrophysics Data System (ADS)

Ferrara, James; Zhu, Li; Yang, Weijian; Qiao, Pengfei; Chang-Hasnain, Connie J.

2015-02-01

We present a unique heterogeneous integration approach for VCSELs on silicon using eutectic bonding. An electrically pumped III-V - silicon heterogeneous VCSEL is demonstrated using a high-contrast grating (HCG) reflector on silicon. CW output power >1.5 mW, thermal resistance of 1.46 K/mW, and 5 Gb/s direct modulation is demonstrated. We also explore the possibility of an all-HCG VCSEL structure that would benefit from stronger thermal performance, larger tuning efficiency, and higher direct modulation speeds.

Neuromorphic Silicon Neuron Circuits

PubMed Central

Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

2011-01-01

Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

Quantitative prediction of phase transformations in silicon during nanoindentation

NASA Astrophysics Data System (ADS)

Zhang, Liangchi; Basak, Animesh

2013-08-01

This paper establishes the first quantitative relationship between the phases transformed in silicon and the shape characteristics of nanoindentation curves. Based on an integrated analysis using TEM and unit cell properties of phases, the volumes of the phases emerged in a nanoindentation are formulated as a function of pop-out size and depth of nanoindentation impression. This simple formula enables a fast, accurate and quantitative prediction of the phases in a nanoindentation cycle, which has been impossible before.

Flow sensor based on monolithic integration of organic light-emitting diodes (OLEDs) and CMOS circuits

NASA Astrophysics Data System (ADS)

Reckziegel, S.; Kreye, D.; Puegner, T.; Vogel, U.; Scholles, M.; Grillberger, C.; Fehse, K.

2009-02-01

In this paper we present an optoelectronic integrated circuit (OEIC) based on monolithic integration of organic lightemitting diodes (OLEDs) and CMOS technology. By the use of integrated circuits, photodetectors and highly efficient OLEDs on the same silicon chip, novel OEICs with combined sensors and actuating elements can be realized. The OLEDs are directly deposited on the CMOS top metal. The metal layer serves as OLED bottom electrode and determines the bright area. Furthermore, the area below the OLED electrodes can be used for integrated circuits. The monolithic integration of actuators, sensors and electronics on a common silicon substrate brings significant advantages in most sensory applications. The developed OEIC combines three different types of sensors: a reflective sensor, a color sensor and a particle flow sensor and is configured with an orange (597nm) emitting p-i-n OLED. We describe the architecture of such a monolithic OEIC and demonstrate a method to determine the velocity of a fluid being conveyed pneumatically in a transparent capillary. The integrated OLEDs illuminate the capillary with the flowing fluid. The fluid has a random reflection profile. Depending on the velocity and a random contrast difference, more or less light is reflected back to the substrate. The integrated photodiodes located at different fixed points detect the reflected light and using crosscorrelation, the velocity is calculated from the time in which contrast differences move over a fixed distance.

Towards Silicon-Based Longwave Integrated Optoelectronics (LIO)

DTIC Science & Technology

2008-01-21

circuitry. The photonics can use, for example, microbolometers and III-V photodetectors as well as III-V interband cascade and quantum cascade lasers...chips using inputs from several sensors. (4) imaging: focal - plane - array imager with integral readout, infrared-to-visible image converter chip, (5... photodetectors , type II interband cascades and QCLs. I would integrate the cascades in LIO using a technique similar to that developed by John Bower’s

The mid-IR silicon photonics sensor platform (Conference Presentation)

NASA Astrophysics Data System (ADS)

Kimerling, Lionel; Hu, Juejun; Agarwal, Anuradha M.

2017-02-01

Advances in integrated silicon photonics are enabling highly connected sensor networks that offer sensitivity, selectivity and pattern recognition. Cost, performance and the evolution path of the so-called `Internet of Things' will gate the proliferation of these networks. The wavelength spectral range of 3-8um, commonly known as the mid-IR, is critical to specificity for sensors that identify materials by detection of local vibrational modes, reflectivity and thermal emission. For ubiquitous sensing applications in this regime, the sensors must move from premium to commodity level manufacturing volumes and cost. Scaling performance/cost is critically dependent on establishing a minimum set of platform attributes for point, wearable, and physical sensing. Optical sensors are ideal for non-invasive applications. Optical sensor device physics involves evanescent or intra-cavity structures for applied to concentration, interrogation and photo-catalysis functions. The ultimate utility of a platform is dependent on sample delivery/presentation modalities; system reset, recalibration and maintenance capabilities; and sensitivity and selectivity performance. The attributes and performance of a unified Glass-on-Silicon platform has shown good prospects for heterogeneous integration on materials and devices using a low cost process flow. Integrated, single mode, silicon photonic platforms offer significant performance and cost advantages, but they require discovery and qualification of new materials and process integration schemes for the mid-IR. Waveguide integrated light sources based on rare earth dopants and Ge-pumped frequency combs have promise. Optical resonators and waveguide spirals can enhance sensitivity. PbTe materials are among the best choices for a standard, waveguide integrated photodetector. Chalcogenide glasses are capable of transmitting mid-IR signals with high transparency. Integrated sensor case studies of i) high sensitivity analyte detection in solution; ii) gas sensing in air and iii) on-chip spectrometry provide good insight into the tradeoffs being made en route to ubiquitous sensor deployment in an Internet of Things.

Wavelength dispersion characteristics of integrated silicon avalanche LEDs: potential applications in futuristic on-chip micro- and nano-biosensors

NASA Astrophysics Data System (ADS)

Okhai, Timothy A.; Snyman, Lukas W.; Polleux, Jean-Luc

2016-02-01

Si Av LEDs are easily integrated in on-chip integrated circuitry. They have high modulation frequencies into the GHz range and can be fabricated to sub-micron dimensions. Due to subsurface light generation in the silicon device itself, and the high refractive index differences between silicon and the device environment, the exiting light radiation has interesting dispersion characteristics. Three junction micro p+-np+ Silicon Avalanche based Light Emitting Devices (Si Av LEDs) have been analyzed in terms of dispersion characteristics, generally resulting in different wavelengths of light (colors) being emitted at different angles and solid angles from the surfaces of these devices. The emission wavelength is in the 450 - 850 nm range. The devices are of micron dimension and operate at 8 - 10V, 1μA - 2mA. The emission spot sizes are about 1 micron square. Emission intensities are up to 500 nW.μm-2. The observed dispersion characteristics range from 0.05 degrees per nm per degree at emission angle of 5 degrees, to 0.15 degrees per nm at emission angles of 30 degrees. It is believed that the dispersion characteristics can find interesting and futuristic on-chip electro-optic applications involving particularly a ranging from on chip micro optical wavelength dispersers, communication de-multiplexers, and novel bio-sensor applications. All of these could penetrate into the nanoscale dimensions.

Monte: A compact and versatile multidetector system based on monolithic telescopes

NASA Astrophysics Data System (ADS)

Amorini, F.; Bonanno, A.; Cardella, G.; di Pietro, A.; Fallica, G.; Figuera, P.; Morea, A.; Musumarra, A.; Papa, M.; Pappalardo, G.; Pinto, A.; Rizzo, F.; Tian, W.; Tudisco, S.; Valvo, G.

2005-09-01

We present the characteristics of a new multidetector based on monolithic silicon telescopes: MONTE. By using high-energy ion implantation techniques, the ΔE and residual energy stages of such telescopes have been integrated on the same silicon chip, obtaining extremely thin ΔE stages of the order of 1 μm. This allowed one to obtain a very low charge identification energy threshold and a very good β background suppression in reactions induced by radioactive ion beams. The multidetector has a modular structure and can be assembled in different geometrical configurations according to experimental needs.

Self-formed cylindrical microcapillaries through surface migration of silicon and their application to single-cell analysis

NASA Astrophysics Data System (ADS)

Zeng, Fan; Luo, Yuan; Yobas, Levent; Wong, Man

2013-05-01

Surface migration of monocrystalline silicon has been applied to demonstrate self-formed cylindrical microcapillaries with diameters from 0.8 to 2.8 µm based on the microstructured substrate topography. The microcapillaries are entirely enclosed in silicon and can be conveniently etched to create fluidic access ports and microchannels for their subsequent integration into functional microfluidic devices. Moreover, the microcapillaries can be thermally oxidized through their access ports with silica walls remain intact upon release from surrounding silicon in an effort to enhance optical clarity. Straight microcapillaries and microcapillaries with perpendicular turns and crossings (junctions) have all been fabricated and validated for fluidic continuity with a fluorescein solution pumped through. The utility of the microcapillaries has been showcased on particle traps in which biological cells are probed for single-cell impedance spectroscopy. The approach disclosed, given its full compatibility with semiconductor device fabrication, offers great potential towards intelligent cell and molecule-based devices merging microelectronics and microfluidics.

Ultra-compact resonant tunneling-based TE-pass and TM-pass polarizers for SOI platform.

PubMed

Azzam, Shaimaa I; Obayya, Salah S A

2015-03-15

We investigate the polarization-dependent resonance tunneling effect in silicon waveguides to achieve ultra-compact and highly efficient polarization fitters for integrated silicon photonics, to the best of our knowledge for the first time. We hence propose simple structures for silicon-on-insulator transverse electric (TE)-pass and transverse magnetic (TM)-pass polarizers based on the resonance tunneling effect in silicon waveguides. The suggested TE-pass polarizer has insertion losses (IL), extinction ratio (ER), and return losses (RL) of 0.004 dB, 18 dB, and 24 dB, respectively; whereas, the TM-pass polarizer is characterized by IL, ER, and RL of 0.15 dB, 20 dB, and 23 dB, respectively. Both polarizers have an ultra-short device length of only 1.35 and 1.31 μm for the TE-pass and the TM-pass polarizers which are the shortest reported lengths to the best of our knowledge.

A strong electro-optically active lead-free ferroelectric integrated on silicon

NASA Astrophysics Data System (ADS)

Abel, Stefan; Stöferle, Thilo; Marchiori, Chiara; Rossel, Christophe; Rossell, Marta D.; Erni, Rolf; Caimi, Daniele; Sousa, Marilyne; Chelnokov, Alexei; Offrein, Bert J.; Fompeyrine, Jean

2013-04-01

The development of silicon photonics could greatly benefit from the linear electro-optical properties, absent in bulk silicon, of ferroelectric oxides, as a novel way to seamlessly connect the electrical and optical domain. Of all oxides, barium titanate exhibits one of the largest linear electro-optical coefficients, which has however not yet been explored for thin films on silicon. Here we report on the electro-optical properties of thin barium titanate films epitaxially grown on silicon substrates. We extract a large effective Pockels coefficient of reff=148 pm V-1, which is five times larger than in the current standard material for electro-optical devices, lithium niobate. We also reveal the tensor nature of the electro-optical properties, as necessary for properly designing future devices, and furthermore unambiguously demonstrate the presence of ferroelectricity. The integration of electro-optical active films on silicon could pave the way towards power-efficient, ultra-compact integrated devices, such as modulators, tuning elements and bistable switches.

MITLL Silicon Integrated Photonics Process: Design Guide

DTIC Science & Technology

2015-07-31

Silicon Integrated Photonics Process Comprehensive Design Guide 16  Deep Etch for Fiber Coupling (DEEP_ETCH...facets for fiber coupling. Standard design layers for each process are defined in Section 3, but other options can be made available. Notes on...a silicon thinning process that can create very low loss waveguides (and which better suppresses back scatter and, therefore, resonance splitting in

Building Integrated Photovoltaic (BIPV) Roofs for Sustainability and Energy Efficiency

DTIC Science & Technology

2014-04-01

ACRONYMS A/C Air Conditioning a-Si Amorphous Silicon AC Alternating Current AFB Air Force Base AHU Air Handing Unit APS Arizona Public...Service ASTM American Society for Testing and Materials AZ Arizona BIPV Building Integrated Photovoltaic BTU British Thermal Units C Celsius CA...AFB) in Arizona (AZ). This site was chosen based on the ESTCP review board’s recommendation, the large size of the BIPV roof, and the age. Site I

Fully Digital Arrays of Silicon Photomultipliers (dSiPM) - a Scalable Alternative to Vacuum Photomultiplier Tubes (PMT)

NASA Astrophysics Data System (ADS)

Haemisch, York; Frach, Thomas; Degenhardt, Carsten; Thon, Andreas

Silicon Photomultipliers (SiPMs) have emerged as promising alternative to fast vacuum photomultiplier tubes (PMT). A fully digital implementation of the Silicon Photomultiplier (dSiPM) has been developed in order to overcome the deficiencies and limitations of the so far only analog SiPMs (aSiPMs). Our sensor is based on arrays of single photon avalanche photodiodes (SPADs) integrated in a standard CMOS process. Photons are detected directly by sensing the voltage at the SPAD anode using a dedicated cell electronics block next to each diode. This block also contains active quenching and recharge circuits as well as a one bit memory for the selective inhibit of detector cells. A balanced trigger network is used to propagate the trigger signal from all cells to the integrated time-to-digital converter. In consequence, photons are detected and counted as digital signals, thus making the sensor less susceptible to temperature variations and electronic noise. The integration with CMOS logic provides the added benefit of low power consumption and possible integration of data post-processing directly in the sensor. In this overview paper, we discuss the sensor architecture together with its characteristics with a focus on scalability and practicability aspects for applications in medical imaging, high energy- and astrophysics.

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

PubMed Central

Kazior, Thomas E.

2014-01-01

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications. PMID:24567473

Beyond CMOS: heterogeneous integration of III-V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems.

PubMed

Kazior, Thomas E

2014-03-28

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

Al transmon qubits on silicon-on-insulator for quantum device integration

NASA Astrophysics Data System (ADS)

Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

2017-07-01

We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

Micro benchtop optics by bulk silicon micromachining

DOEpatents

Lee, Abraham P.; Pocha, Michael D.; McConaghy, Charles F.; Deri, Robert J.

2000-01-01

Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.

Single Molecule Detection Using a Silicon Nanopore-Nanotransistor Integrated Circuit

DTIC Science & Technology

2006-01-01

indicates the dipole moment of the DNA bases projected along the pore axis. During this simulation 14 bases translocated through the pore. The letters...recorded S tU signals are plotted versus time on the top figure. The bottom figure indicates C" the dipole moment of DNA bases 0 - projected along the

Large-scale quantum photonic circuits in silicon

NASA Astrophysics Data System (ADS)

Harris, Nicholas C.; Bunandar, Darius; Pant, Mihir; Steinbrecher, Greg R.; Mower, Jacob; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Englund, Dirk

2016-08-01

Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today's classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.

Self-catalyzed GaAs nanowires on silicon by hydride vapor phase epitaxy.

PubMed

Dong, Zhenning; André, Yamina; Dubrovskii, Vladimir G; Bougerol, Catherine; Leroux, Christine; Ramdani, Mohammed R; Monier, Guillaume; Trassoudaine, Agnès; Castelluci, Dominique; Gil, Evelyne

2017-03-24

Gold-free GaAs nanowires on silicon substrates can pave the way for monolithic integration of photonic nanodevices with silicon electronic platforms. It is extensively documented that the self-catalyzed approach works well in molecular beam epitaxy but is much more difficult to implement in vapor phase epitaxies. Here, we report the first gallium-catalyzed hydride vapor phase epitaxy growth of long (more than 10 μm) GaAs nanowires on Si(111) substrates with a high integrated growth rate up to 60 μm h -1 and pure zincblende crystal structure. The growth is achieved by combining a low temperature of 600 °C with high gaseous GaCl/As flow ratios to enable dechlorination and formation of gallium droplets. GaAs nanowires exhibit an interesting bottle-like shape with strongly tapered bases, followed by straight tops with radii as small as 5 nm. We present a model that explains the peculiar growth mechanism in which the gallium droplets nucleate and rapidly swell on the silicon surface but then are gradually consumed to reach a stationary size. Our results unravel the necessary conditions for obtaining gallium-catalyzed GaAs nanowires by vapor phase epitaxy techniques.

Novel drift structures for silicon and compound semiconductor X-ray and gamma-ray detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Patt, B.E.; Iwanczyk, J.S.

Recently developed silicon- and compound-semiconductor-based drift detector structures have produced excellent performance for charged particles, X-rays, and gamma rays and for low-signal visible light detection. The silicon drift detector (SDD) structures that the authors discuss relate to direct X-ray detectors and scintillation photon detectors coupled with scintillators for gamma rays. Recent designs include several novel features that ensure very low dark current and hence low noise. In addition, application of thin window technology ensures a very high quantum efficiency entrance window on the drift photodetector. The main features of the silicon drift structures for X rays and light detection aremore » very small anode capacitance independent of the overall detector size, low noise, and high throughput. To take advantage of the small detector capacitance, the first stage of the electronics needs to be integrated into the detector anode. In the gamma-ray application, factors other than electronic noise dominate, and there is no need to integrate the electronics into the anode. Thus, a different drift structure is needed in conjunction with a high-Z material. The main features in this case are large active detector volume and electron-only induced signal.« less

Linear and passive silicon diodes, isolators, and logic gates

NASA Astrophysics Data System (ADS)

Li, Zhi-Yuan

2013-12-01

Silicon photonic integrated devices and circuits have offered a promising means to revolutionalize information processing and computing technologies. One important reason is that these devices are compatible with conventional complementary metal oxide semiconductor (CMOS) processing technology that overwhelms current microelectronics industry. Yet, the dream to build optical computers has yet to come without the breakthrough of several key elements including optical diodes, isolators, and logic gates with low power, high signal contrast, and large bandwidth. Photonic crystal has a great power to mold the flow of light in micrometer/nanometer scale and is a promising platform for optical integration. In this paper we present our recent efforts of design, fabrication, and characterization of ultracompact, linear, passive on-chip optical diodes, isolators and logic gates based on silicon two-dimensional photonic crystal slabs. Both simulation and experiment results show high performance of these novel designed devices. These linear and passive silicon devices have the unique properties of small fingerprint, low power request, large bandwidth, fast response speed, easy for fabrication, and being compatible with COMS technology. Further improving their performance would open up a road towards photonic logics and optical computing and help to construct nanophotonic on-chip processor architectures for future optical computers.

Ductile cutting of silicon microstructures with surface inclination measurement and compensation by using a force sensor integrated single point diamond tool

NASA Astrophysics Data System (ADS)

Chen, Yuan-Liu; Cai, Yindi; Shimizu, Yuki; Ito, So; Gao, Wei; Ju, Bing-Feng

2016-02-01

This paper presents a measurement and compensation method of surface inclination for ductile cutting of silicon microstructures by using a diamond tool with a force sensor based on a four-axis ultra-precision lathe. The X- and Y-directional inclinations of a single crystal silicon workpiece with respect to the X- and Y-motion axes of the lathe slides were measured respectively by employing the diamond tool as a touch-trigger probe, in which the tool-workpiece contact is sensitively detected by monitoring the force sensor output. Based on the measurement results, fabrication of silicon microstructures can be thus carried out directly along the tilted silicon workpiece by compensating the cutting motion axis to be parallel to the silicon surface without time-consuming pre-adjustment of the surface inclination or turning of a flat surface. A diamond tool with a negative rake angle was used in the experiment for superior ductile cutting performance. The measurement precision by using the diamond tool as a touch-trigger probe was investigated. Experiments of surface inclination measurement and ultra-precision ductile cutting of a micro-pillar array and a micro-pyramid array with inclination compensation were carried out respectively to demonstrate the feasibility of the proposed method.

Total internal reflection-evanescent coupler for fiber-to-waveguide integration of planar optoelectric devices.

PubMed

Lu, Zhaolin; Prather, Dennis W

2004-08-01

We present a method for parallel coupling from a single-mode fiber, or fiber ribbon, into a silicon-on-insulator waveguide for integration with silicon optoelectronic circuits. The coupler incorporates the advantages of the vertically tapered waveguides and prism couplers, yet offers the flexibility of planar integration. The coupler can be fabricated by use of either wafer polishing technology or gray-scale photolithography. When optimal coupling is achieved in our experimental setup, the coupler can be packaged by epoxy bonding to form a fiber-waveguide parallel coupler or connector. Two-dimensional electromagnetic calculation predicts a coupling efficiency of 77% (- 1.14-dB insertion loss) for a silicon-to-silicon coupler with a uniform tunnel layer. The coupling efficiency is experimentally achieved to be 46% (-3.4-dB insertion loss), excluding the loss in silicon and the reflections from the input surface and the output facet.

Performance of an SOI Boot-Strapped Full-Bridge MOSFET Driver, Type CHT-FBDR, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Compact silicon diffractive sensor: design, fabrication, and prototype.

PubMed

Maikisch, Jonathan S; Gaylord, Thomas K

2012-07-01

An in-plane constant-efficiency variable-diffraction-angle grating and an in-plane high-angular-selectivity grating are combined to enable a new compact silicon diffractive sensor. This sensor is fabricated in silicon-on-insulator and uses telecommunications wavelengths. A single sensor element has a micron-scale device size and uses intensity-based (as opposed to spectral-based) detection for increased integrability. In-plane diffraction gratings provide an intrinsic splitting mechanism to enable a two-dimensional sensor array. Detection of the relative values of diffracted and transmitted intensities is independent of attenuation and is thus robust. The sensor prototype measures refractive index changes of 10(-4). Simulations indicate that this sensor configuration may be capable of measuring refractive index changes three or four orders of magnitude smaller. The characteristics of this sensor type make it promising for lab-on-a-chip applications.

Improved process for epitaxial deposition of silicon on prediffused substrates

NASA Technical Reports Server (NTRS)

Clarke, M. G.; Halsor, J. L.; Word, J. C.

1968-01-01

Process for fabricating integrated circuits uniformly deposits silicon epitaxially on prediffused substrates without affecting the sublayer diffusion pattern. Two silicon deposits from different sources, and deposited at different temperatures, protect the sublayer pattern from the silicon tetrachloride reaction.

Silicon photonic IC embedded optical-PCB for high-speed interconnect application

NASA Astrophysics Data System (ADS)

Kallega, Rakshitha; Nambiar, Siddharth; Kumar, Abhai; Ranganath, Praveen; Selvaraja, Shankar Kumar

2018-02-01

Optical-Printed Circuit Board (PCB) is an emerging optical interconnect technology to bridge the gap between the board edge and the processing module. The technology so far has been used as a broadband transmitter using polymer waveguides in the PCB. In this paper, we report a Silicon Nitride based photonic IC embedded in the PCB along with the polymers as waveguides in the PCB. The motivation for such integration is to bring routing capability and to reduce the power loss due to broadcasting mode.

Porous silicon carbide and aluminum oxide with unidirectional open porosity as model target materials for radioisotope beam production

NASA Astrophysics Data System (ADS)

Czapski, M.; Stora, T.; Tardivat, C.; Deville, S.; Santos Augusto, R.; Leloup, J.; Bouville, F.; Fernandes Luis, R.

2013-12-01

New silicon carbide (SiC) and aluminum oxide (Al2O3) of a tailor-made microstructure were produced using the ice-templating technique, which permits controlled pore formation conditions within the material. These prototypes will serve to verify aging of the new advanced target materials under irradiation with proton beams. Before this, the evaluation of their mechanical integrity was made based on the energy deposition spectra produced by FLUKA codes.

60-nm-thick basic photonic components and Bragg gratings on the silicon-on-insulator platform.

PubMed

Zou, Zhi; Zhou, Linjie; Li, Xinwan; Chen, Jianping

2015-08-10

We demonstrate integrated basic photonic components and Bragg gratings using 60-nm-thick silicon-on-insulator strip waveguides. The ultra-thin waveguides exhibit a propagation loss of 0.61 dB/cm and a bending loss of approximately 0.015 dB/180° with a 30 μm bending radius (including two straight-bend waveguide junctions). Basic structures based on the ultra-thin waveguides, including micro-ring resonators, 1 × 2 MMI couplers, and Mach-Zehnder interferometers are realized. Upon thinning-down, the waveguide effective refractive index is reduced, making the fabrication of Bragg gratings possible using the standard 248-nm deep ultra-violet (DUV) photolithography process. The Bragg grating exhibits a stopband width of 1 nm and an extinction ratio of 35 dB, which is practically applicable as an optical filter or a delay line. The transmission spectrum can be thermally tuned via an integrated resistive micro-heater formed by a heavily doped silicon slab beside the waveguide.

Integrated optics ring-resonator chemical sensor for detection of air contamination

NASA Technical Reports Server (NTRS)

Manfreda, A. M.; Homer, M. L.; Ksendzov, A.

2004-01-01

We report a silicon nitride-based ring resonator chemical sensor with sensing polymer coating. Its sensitivity to isopropanol in air is at least 50 ppm - well under the permissible exposure level of 400 ppm.

Athermal laser design.

PubMed

Bovington, Jock; Srinivasan, Sudharsanan; Bowers, John E

2014-08-11

This paper discusses circuit based and waveguide based athermalization schemes and provides some design examples of athermalized lasers utilizing fully integrated athermal components as an alternative to power hungry thermo-electric controllers (TECs), off-chip wavelength lockers or monitors with lookup tables for tunable lasers. This class of solutions is important for uncooled transmitters on silicon.

Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

PubMed

Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

2017-02-15

An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si₃N₄) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si₃N₄ and the LN-Si₃N₄ waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

Robust Joining and Integration Technologies for Advanced Metallic, Ceramic, and Composite Systems

NASA Technical Reports Server (NTRS)

Singh, M.; Shpargel, Tarah; Morscher, Gregory N.; Halbig, Michael H.; Asthana, Rajiv

2006-01-01

Robust integration and assembly technologies are critical for the successful implementation of advanced metallic, ceramic, carbon-carbon, and ceramic matrix composite components in a wide variety of aerospace, space exploration, and ground based systems. Typically, the operating temperature of these components varies from few hundred to few thousand Kelvin with different working times (few minutes to years). The wide ranging system performance requirements necessitate the use of different integration technologies which includes adhesive bonding, low temperature soldering, active metal brazing, diffusion bonding, ARCJoinT, and ultra high temperature joining technologies. In this presentation, a number of joining examples and test results will be provided related to the adhesive bonding and active metal brazing of titanium to C/C composites, diffusion bonding of silicon carbide to silicon carbide using titanium interlayer, titanium and hastelloy brazing to silicon carbide matrix composites, and ARCJoinT joining of SiC ceramics and SiC matrix composites. Various issues in the joining of metal-ceramic systems including thermal expansion mismatch and resulting residual stresses generated during joining will be discussed. In addition, joint design and testing issues for a wide variety of joints will be presented.

On-chip optical diode based on silicon photonic crystal heterojunctions.

PubMed

Wang, Chen; Zhou, Chang-Zhu; Li, Zhi-Yuan

2011-12-19

Optical isolation is a long pursued object with fundamental difficulty in integrated photonics. As a step towards this goal, we demonstrate the design, fabrication, and characterization of on-chip wavelength-scale optical diodes that are made from the heterojunction between two different silicon two-dimensional square-lattice photonic crystal slabs with directional bandgap mismatch and different mode transitions. The measured transmission spectra show considerable unidirectional transmission behavior, in good agreement with numerical simulations. The experimental realization of on-chip optical diodes with wavelength-scale size using all-dielectric, passive, and linear silicon photonic crystal structures may help to construct on-chip optical logical devices without nonlinearity or magnetism, and would open up a road towards photonic computers.

Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes [Invited].

PubMed

Stojanović, Vladimir; Ram, Rajeev J; Popović, Milos; Lin, Sen; Moazeni, Sajjad; Wade, Mark; Sun, Chen; Alloatti, Luca; Atabaki, Amir; Pavanello, Fabio; Mehta, Nandish; Bhargava, Pavan

2018-05-14

Integrating photonics with advanced electronics leverages transistor performance, process fidelity and package integration, to enable a new class of systems-on-a-chip for a variety of applications ranging from computing and communications to sensing and imaging. Monolithic silicon photonics is a promising solution to meet the energy efficiency, sensitivity, and cost requirements of these applications. In this review paper, we take a comprehensive view of the performance of the silicon-photonic technologies developed to date for photonic interconnect applications. We also present the latest performance and results of our "zero-change" silicon photonics platforms in 45 nm and 32 nm SOI CMOS. The results indicate that the 45 nm and 32 nm processes provide a "sweet-spot" for adding photonic capability and enhancing integrated system applications beyond the Moore-scaling, while being able to offload major communication tasks from more deeply-scaled compute and memory chips without complicated 3D integration approaches.

Multisite silicon neural probes with integrated silicon nitride waveguides and gratings for optogenetic applications.

PubMed

Shim, Euijae; Chen, Yu; Masmanidis, Sotiris; Li, Mo

2016-03-04

Optimal optogenetic perturbation of brain circuit activity often requires light delivery in a precise spatial pattern that cannot be achieved with conventional optical fibers. We demonstrate an implantable silicon-based probe with a compact light delivery system, consisting of silicon nitride waveguides and grating couplers for out-of-plane light emission with high spatial resolution. 473 nm light is coupled into and guided in cm-long waveguide and emitted at the output grating coupler. Using the direct cut-back and out-scattering measurement techniques, the propagation optical loss of the waveguide is measured to be below 3 dB/cm. The grating couplers provide collimated light emission with sufficient irradiance for neural stimulation. Finally, a probe with multisite light delivery with three output grating emitters from a single laser input is demonstrated.

APPLIED OPTICS. Voltage-tunable circular photogalvanic effect in silicon nanowires.

PubMed

Dhara, Sajal; Mele, Eugene J; Agarwal, Ritesh

2015-08-14

Electronic bands in crystals can support nontrivial topological textures arising from spin-orbit interactions, but purely orbital mechanisms can realize closely related dynamics without breaking spin degeneracies, opening up applications in materials containing only light elements. One such application is the circular photogalvanic effect (CPGE), which is the generation of photocurrents whose magnitude and polarity depend on the chirality of optical excitation. We show that the CPGE can arise from interband transitions at the metal contacts to silicon nanowires, where inversion symmetry is locally broken by an electric field. Bias voltage that modulates this field further controls the sign and magnitude of the CPGE. The generation of chirality-dependent photocurrents in silicon with a purely orbital-based mechanism will enable new functionalities in silicon that can be integrated with conventional electronics. Copyright © 2015, American Association for the Advancement of Science.

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors

PubMed Central

Marrs, Michael A.; Raupp, Gregory B.

2016-01-01

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm2 and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate. PMID:27472329

Silicon carbide, an emerging high temperature semiconductor

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Powell, J. Anthony

1991-01-01

In recent years, the aerospace propulsion and space power communities have expressed a growing need for electronic devices that are capable of sustained high temperature operation. Applications for high temperature electronic devices include development instrumentation within engines, engine control, and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Other earth-based applications include deep-well drilling instrumentation, nuclear reactor instrumentation and control, and automotive sensors. To meet the needs of these applications, the High Temperature Electronics Program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. Research is focussed on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of silicon carbide electronic devices and integrated sensors. The progress made in developing silicon carbide is presented, and the challenges that lie ahead are discussed.

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors.

PubMed

Marrs, Michael A; Raupp, Gregory B

2016-07-26

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm² and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate.

Light emission from silicon: Some perspectives and applications

NASA Astrophysics Data System (ADS)

Fiory, A. T.; Ravindra, N. M.

2003-10-01

Research on efficient light emission from silicon devices is moving toward leading-edge advances in components for nano-optoelectronics and related areas. A silicon laser is being eagerly sought and may be at hand soon. A key advantage is in the use of silicon-based materials and processing, thereby using high yield and low-cost fabrication techniques. Anticipated applications include an optical emitter for integrated optical circuits, logic, memory, and interconnects; electro-optic isolators; massively parallel optical interconnects and cross connects for integrated circuit chips; lightwave components; high-power discrete and array emitters; and optoelectronic nanocell arrays for detecting biological and chemical agents. The new technical approaches resolve a basic issue with native interband electro-optical emission from bulk Si, which competes with nonradiative phonon- and defect-mediated pathways for electron-hole recombination. Some of the new ways to enhance optical emission efficiency in Si diode devices rely on carrier confinement, including defect and strain engineering in the bulk material. Others use Si nanocrystallites, nanowires, and alloying with Ge and crystal strain methods to achieve the carrier confinement required to boost radiative recombination efficiency. Another approach draws on the considerable progress that has been made in high-efficiency, solar-cell design and uses the reciprocity between photo- and light-emitting diodes. Important advances are also being made with silicon-oxide materials containing optically active rare-earth impurities.

The all-optical modulator in dielectric-loaded waveguide with graphene-silicon heterojunction structure

NASA Astrophysics Data System (ADS)

Sun, Feiying; Xia, Liangping; Nie, Changbin; Shen, Jun; Zou, Yixuan; Cheng, Guiyu; Wu, Hao; Zhang, Yong; Wei, Dongshan; Yin, Shaoyun; Du, Chunlei

2018-04-01

All-optical modulators based on graphene show great promise for on-chip optical interconnects. However, the modulation performance of all-optical modulators is usually based on the interaction between graphene and the fiber, limiting their potential in high integration. Based on this point, an all-optical modulator in a dielectric-loaded waveguide (DLW) with a graphene-silicon heterojunction structure (GSH) is proposed. The DLW raises the waveguide mode, which provides a strong light-graphene interaction. Sufficient tuning of the graphene Fermi energy beyond the Pauli blocking effect is obtained with the presented GSH structure. Under the modulation light with a wavelength of 532 nm and a power of 60 mW, a modulation efficiency of 0.0275 dB µm-1 is achieved for light with a communication wavelength of 1.55 µm in the experiment. This modulator has the advantage of having a compact footprint, which may make it a candidate for achieving a highly integrated all-optical modulator.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

NASA Astrophysics Data System (ADS)

Yin, Lan; Bozler, Carl; Harburg, Daniel V.; Omenetto, Fiorenzo; Rogers, John A.

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

Parameter Estimation of a Spiking Silicon Neuron

PubMed Central

Russell, Alexander; Mazurek, Kevin; Mihalaş, Stefan; Niebur, Ernst; Etienne-Cummings, Ralph

2012-01-01

Spiking neuron models are used in a multitude of tasks ranging from understanding neural behavior at its most basic level to neuroprosthetics. Parameter estimation of a single neuron model, such that the model’s output matches that of a biological neuron is an extremely important task. Hand tuning of parameters to obtain such behaviors is a difficult and time consuming process. This is further complicated when the neuron is instantiated in silicon (an attractive medium in which to implement these models) as fabrication imperfections make the task of parameter configuration more complex. In this paper we show two methods to automate the configuration of a silicon (hardware) neuron’s parameters. First, we show how a Maximum Likelihood method can be applied to a leaky integrate and fire silicon neuron with spike induced currents to fit the neuron’s output to desired spike times. We then show how a distance based method which approximates the negative log likelihood of the lognormal distribution can also be used to tune the neuron’s parameters. We conclude that the distance based method is better suited for parameter configuration of silicon neurons due to its superior optimization speed. PMID:23852978

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

PubMed Central

Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E.; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S.

2015-01-01

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

Controlling the optical properties of monocrystalline 3C-SiC heteroepitaxially grown on silicon at low temperatures

NASA Astrophysics Data System (ADS)

Colston, Gerard; Myronov, Maksym

2017-11-01

Cubic silicon carbide (3C-SiC) offers an alternative wide bandgap semiconductor to conventional materials such as hexagonal silicon carbide (4H-SiC) or gallium nitride (GaN) for the detection of UV light and can offer a closely lattice matched virtual substrate for subsequent GaN heteroepitaxy. As 3C-SiC can be heteroepitaxially grown on silicon (Si) substrates its optical properties can be manipulated by controlling the thickness and doping concentrations. The optical properties of 3C-SiC epilayers have been characterized by measuring the transmission of light through suspended membranes. Decreasing the thickness of the 3C-SiC epilayers is shown to shift the absorbance edge to lower wavelengths, a result of the indirect bandgap nature of silicon carbide. This property, among others, can be exploited to fabricate very low-cost, tuneable 3C-SiC based UV photodetectors. This study investigates the effect of thickness and doping concentration on the optical properties of 3C-SiC epilayers grown at low temperatures by a standard Si based growth process. The results demonstrate the potential photonic applications of 3C-SiC and its heterogeneous integration into the Si industry.

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

PubMed

Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

2018-04-01

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Impurity engineering of Czochralski silicon used for ultra large-scaled-integrated circuits

NASA Astrophysics Data System (ADS)

Yang, Deren; Chen, Jiahe; Ma, Xiangyang; Que, Duanlin

2009-01-01

Impurities in Czochralski silicon (Cz-Si) used for ultra large-scaled-integrated (ULSI) circuits have been believed to deteriorate the performance of devices. In this paper, a review of the recent processes from our investigation on internal gettering in Cz-Si wafers which were doped with nitrogen, germanium and/or high content of carbon is presented. It has been suggested that those impurities enhance oxygen precipitation, and create both denser bulk microdefects and enough denuded zone with the desirable width, which is benefit of the internal gettering of metal contamination. Based on the experimental facts, a potential mechanism of impurity doping on the internal gettering structure is interpreted and, a new concept of 'impurity engineering' for Cz-Si used for ULSI is proposed.

A digital front-end and readout microsystem for calorimetry at LHC

NASA Astrophysics Data System (ADS)

Alippi, C.; Appelquist, G.; Berglund, S.; Bohm, C.; Breveglieri, L.; Brigati, S.; Carlson, P.; Cattaneo, P.; Dadda, L.; David, J.; Del Buono, L.; Dell'Acqua, A.; Engström, M.; Fumagalli, G.; Gatti, U.; Genat, J. F.; Goggi, G.; Hansen, M.; Hentzell, H.; Höglund, I.; Inkinen, S.; Kerek, A.; Lebbolo, H.; LeDortz, O.; Lofstedt, B.; Maloberti, F.; Nayman, P.; Persson, S.-T.; Piuri, V.; Salice, F.; Sami, M.; Savoy-Navarro, A.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Zitoun, R.

1994-04-01

A digital solution to the front-end electronics for calorimetric detectors at future supercolliders is presented. The solution is based on high speed {A}/{D} converters, a fully programmable pipeline/digital filter chain and local intelligence. Questions of error correction, fault-tolerance and system redundancy are also being considered. A system integration of a multichannel device in a multichip, Silicon-on-Silicon Microsystem hybrid, is used. This solution allows a new level of integration of complex analogue and digital functions, with an excellent flexibility in mixing technologies for the different functional blocks. It also allows a high degree of programmability at both the function and the system level, and offers the possibility of customising the microsystem with detector-specific functions.

High-speed polarization-encoded quantum key distribution based on silicon photonic integrated devices

NASA Astrophysics Data System (ADS)

Bunandar, Darius; Urayama, Junji; Boynton, Nicholas; Martinez, Nicholas; Derose, Christopher; Lentine, Anthony; Davids, Paul; Camacho, Ryan; Wong, Franco; Englund, Dirk

We present a compact polarization-encoded quantum key distribution (QKD) transmitter near a 1550-nm wavelength implemented on a CMOS-compatible silicon-on-insulator photonics platform. The transmitter generates arbitrary polarization qubits at gigahertz bandwidth with an extinction ratio better than 30 dB using high-speed carrier-depletion phase modulators. We demonstrate the performance of this device by generating secret keys at a rate of 1 Mbps in a complete QKD field test. Our work shows the potential of using advanced photonic integrated circuits to enable high-speed quantum-secure communications. This work was supported by the SECANT QKD Grand Challenge, the Samsung Global Research Outreach Program, and the Air Force Office of Scientific Research.

Fast assembling microarrays of superparamagnetic Fe3O4@Au nanoparticle clusters as reproducible substrates for surface-enhanced Raman scattering

NASA Astrophysics Data System (ADS)

Ye, Min; Wei, Zewen; Hu, Fei; Wang, Jianxin; Ge, Guanglu; Hu, Zhiyuan; Shao, Mingwang; Lee, Shuit-Tong; Liu, Jian

2015-08-01

It is currently a very active research area to develop new types of substrates which integrate various nanomaterials for surface-enhanced Raman scattering (SERS) techniques. Here we report a unique approach to prepare SERS substrates with reproducible performance. It features silicon mold-assisted magnetic assembling of superparamagnetic Fe3O4@Au nanoparticle clusters (NCs) into arrayed microstructures on a wafer scale. This approach enables the fabrication of both silicon-based and hydrogel-based substrates in a sequential manner. We have demonstrated that strong SERS signals can be harvested from these substrates due to an efficient coupling effect between Fe3O4@Au NCs, with enhancement factors >106. These substrates have been confirmed to provide reproducible SERS signals, with low variations in different locations or batches of samples. We investigate the spatial distributions of electromagnetic field enhancement around Fe3O4@Au NCs assemblies using finite-difference-time-domain (FDTD) simulations. The procedure to prepare the substrates is straightforward and fast. The silicon mold can be easily cleaned out and refilled with Fe3O4@Au NCs assisted by a magnet, therefore being re-useable for many cycles. Our approach has integrated microarray technologies and provided a platform for thousands of independently addressable SERS detection, in order to meet the requirements of a rapid, robust, and high throughput performance.It is currently a very active research area to develop new types of substrates which integrate various nanomaterials for surface-enhanced Raman scattering (SERS) techniques. Here we report a unique approach to prepare SERS substrates with reproducible performance. It features silicon mold-assisted magnetic assembling of superparamagnetic Fe3O4@Au nanoparticle clusters (NCs) into arrayed microstructures on a wafer scale. This approach enables the fabrication of both silicon-based and hydrogel-based substrates in a sequential manner. We have demonstrated that strong SERS signals can be harvested from these substrates due to an efficient coupling effect between Fe3O4@Au NCs, with enhancement factors >106. These substrates have been confirmed to provide reproducible SERS signals, with low variations in different locations or batches of samples. We investigate the spatial distributions of electromagnetic field enhancement around Fe3O4@Au NCs assemblies using finite-difference-time-domain (FDTD) simulations. The procedure to prepare the substrates is straightforward and fast. The silicon mold can be easily cleaned out and refilled with Fe3O4@Au NCs assisted by a magnet, therefore being re-useable for many cycles. Our approach has integrated microarray technologies and provided a platform for thousands of independently addressable SERS detection, in order to meet the requirements of a rapid, robust, and high throughput performance. Electronic supplementary information (ESI) available: XRD, reflection spectra, zeta potential, TEM images, evaluations of reproducibility, EDS, tables of EF and RSD values of different substrates. See DOI: 10.1039/c5nr02491a

Silicon-graphene photonic devices

NASA Astrophysics Data System (ADS)

Yin, Yanlong; Li, Jiang; Xu, Yang; Tsang, Hon Ki; Dai, Daoxin

2018-06-01

Silicon photonics has attracted much attention because of the advantages of CMOS (complementary-metal-oxide-semiconductor) compatibility, ultra-high integrated density, etc. Great progress has been achieved in the past decades. However, it is still not easy to realize active silicon photonic devices and circuits by utilizing the material system of pure silicon due to the limitation of the intrinsic properties of silicon. Graphene has been regarded as a promising material for optoelectronics due to its unique properties and thus provides a potential option for realizing active photonic integrated devices on silicon. In this paper, we present a review on recent progress of some silicon-graphene photonic devices for photodetection, all-optical modulation, as well as thermal-tuning. Project supported by the National Major Research and Development Program (No. 2016YFB0402502), the National Natural Science Foundation of China (Nos. 11374263, 61422510, 61431166001, 61474099, 61674127), and the National Key Research and Development Program (No. 2016YFA0200200).

New dynamic silicon photonic components enabled by MEMS technology

NASA Astrophysics Data System (ADS)

Errando-Herranz, Carlos; Edinger, Pierre; Colangelo, Marco; Björk, Joel; Ahmed, Samy; Stemme, Göran; Niklaus, Frank; Gylfason, Kristinn B.

2018-02-01

Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.

Label-free silicon photonic biosensor system with integrated detector array.

PubMed

Yan, Rongjin; Mestas, Santano P; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S; Lear, Kevin L

2009-08-07

An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide's upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip.

Label-free silicon photonic biosensor system with integrated detector array

PubMed Central

Yan, Rongjin; Mestas, Santano P.; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S.

2010-01-01

An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide’s upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip. PMID:19606292

An Integrated 520-600 GHz Sub-Harmonic Mixer and Tripler Combination Based on GaAs MMIC Membrane Planar Schottky Diodes

NASA Technical Reports Server (NTRS)

Thomas, B.; Gill, J.; Maestrini, A.; Lee, C.; Lin, R.; Sin, S.; Peralta, A.; Mehdi, I.

2011-01-01

We present here the design, development and test of an integrated sub-millimeter front-end featuring a 520-600 GHz sub-harmonic mixer and a 260-300 GHz frequency tripler in a single cavity. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional machined as well as silicon micro-machined blocks. Measurement results on the metal block give best DSB mixer noise temperature of 2360 K and conversion losses of 7.7 dB at 520 GHz. Preliminary results on the silicon micro-machined blocks give a DSB mixer noise temperature of 4860 K and conversion losses of 12.16 dB at 540 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer for both packages is between 30 and 50 mW

An Integrated 520-600 GHz Sub-Harmonic Mixer and Tripler Combination Based on GaAs MMIC Membrane Planar Schottky Diodes

NASA Technical Reports Server (NTRS)

Thomas, B.; Gill, J.; Maestrini, A.; Lee, C.; Lin, R.; Sin, S.; Peralta, A.; Mehdi, I.

2010-01-01

We present here the design, development and test of an integrated sub-millimeter front-end featuring a 520-600 GHz sub-harmonic mixer and a 260-300 GHz frequency tripler in a single cavity. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional machined as well as silicon micro-machined blocks. Measurement results on the metal block give best DSB mixer noise temperature of 2360 K and conversion losses of 7.7 dB at 520 GHz. Preliminary results on the silicon micro-machined blocks give a DSB mixer noise temperature of 4860 K and conversion losses of 12.16 dB at 540 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer for both packages is between 30 and 50 mW.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

Smart integration of silicon nanowire arrays in all-silicon thermoelectric micro-nanogenerators

NASA Astrophysics Data System (ADS)

Fonseca, Luis; Santos, Jose-Domingo; Roncaglia, Alberto; Narducci, Dario; Calaza, Carlos; Salleras, Marc; Donmez, Inci; Tarancon, Albert; Morata, Alex; Gadea, Gerard; Belsito, Luca; Zulian, Laura

2016-08-01

Micro and nanotechnologies are called to play a key role in the fabrication of small and low cost sensors with excellent performance enabling new continuous monitoring scenarios and distributed intelligence paradigms (Internet of Things, Trillion Sensors). Harvesting devices providing energy autonomy to those large numbers of microsensors will be essential. In those scenarios where waste heat sources are present, thermoelectricity will be the obvious choice. However, miniaturization of state of the art thermoelectric modules is not easy with the current technologies used for their fabrication. Micro and nanotechnologies offer an interesting alternative considering that silicon in nanowire form is a material with a promising thermoelectric figure of merit. This paper presents two approaches for the integration of large numbers of silicon nanowires in a cost-effective and practical way using only micromachining and thin-film processes compatible with silicon technologies. Both approaches lead to automated physical and electrical integration of medium-high density stacked arrays of crystalline or polycrystalline silicon nanowires with arbitrary length (tens to hundreds microns) and diameters below 100 nm.

Silicon nanowire arrays as thermoelectric material for a power microgenerator

NASA Astrophysics Data System (ADS)

Dávila, D.; Tarancón, A.; Fernández-Regúlez, M.; Calaza, C.; Salleras, M.; San Paulo, A.; Fonseca, L.

2011-10-01

A novel design of a silicon-based thermoelectric power microgenerator is presented in this work. Arrays of silicon nanowires, working as thermoelectric material, have been integrated in planar uni-leg thermocouple microstructures to convert waste heat into electrical energy. Homogeneous, uniformly dense, well-oriented and size-controlled arrays of silicon nanowires have been grown by chemical vapor deposition using the vapor-liquid-solid mechanism. Compatibility issues between the nanowire growth method and microfabrication techniques, such as electrical contact patterning, are discussed. Electrical measurements of the nanowire array electrical conductivity and the Seebeck voltage induced by a controlled thermal gradient or under harvesting operation mode have been carried out to demonstrate the feasibility of the microdevice. A resistance of 240 Ω at room temperature was measured for an array of silicon nanowires 10 µm -long, generating a Seebeck voltage of 80 mV under an imposed thermal gradient of 450 °C, whereas only 4.5 mV were generated under a harvesting operation mode. From the results presented, a Seebeck coefficient of about 150-190 µV K-1 was estimated, which corresponds to typical values for bulk silicon.

Integrated on-chip solid state capacitor based on vertically aligned carbon nanofibers, grown using a CMOS temperature compatible process

NASA Astrophysics Data System (ADS)

Saleem, Amin M.; Andersson, Rickard; Desmaris, Vincent; Enoksson, Peter

2018-01-01

Complete miniaturized on-chip integrated solid-state capacitors have been fabricated based on conformal coating of vertically aligned carbon nanofibers (VACNFs), using a CMOS temperature compatible microfabrication processes. The 5 μm long VACNFs, operating as electrode, are grown on a silicon substrate and conformally coated by aluminum oxide dielectric using atomic layer deposition (ALD) technique. The areal (footprint) capacitance density value of 11-15 nF/mm2 is realized with high reproducibility. The CMOS temperature compatible microfabrication, ultra-low profile (less than 7 μm thickness) and high capacitance density would enables direct integration of micro energy storage devices on the active CMOS chip, multi-chip package and passives on silicon or glass interposer. A model is developed to calculate the surface area of VACNFs and the effective capacitance from the devices. It is thereby shown that 71% of surface area of the VACNFs has contributed to the measured capacitance, and by using the entire area the capacitance can potentially be increased.

Epitaxial growth of high quality InP on Si substrates: The role of InAs/InP quantum dots as effective dislocation filters

NASA Astrophysics Data System (ADS)

Shi, Bei; Li, Qiang; Lau, Kei May

2018-05-01

Monolithic integration of InP on a Si platform ideally facilitates on-chip light sources in silicon photonic applications. In addition to the well-developed hybrid bonding techniques, the direct epitaxy method is spawning as a more strategic and potentially cost-effective approach to monolithically integrate InP-based telecom lasers. To minimize the unwanted defects within the InP crystal, we explore multiple InAs/InP quantum dots as dislocation filters. The high quality InP buffer is thus obtained, and the dislocation filtering effects of the quantum dots are directly examined via both plan-view and cross-sectional transmission electron microscopy, along with room-temperature photoluminescence. The defect density on the InP surface was reduced to 3 × 108/cm2, providing an improved optical property of active photonic devices on Si substrates. This work offers a novel solution to advance large-scale integration of InP on Si, which is beneficial to silicon-based long-wavelength lasers in telecommunications.

Micro-opto-mechanical devices and systems using epitaxial lift off

NASA Technical Reports Server (NTRS)

Camperi-Ginestet, C.; Kim, Young W.; Wilkinson, S.; Allen, M.; Jokerst, N. M.

1993-01-01

The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.

Optimization of silicon oxynitrides by plasma-enhanced chemical vapor deposition for an interferometric biosensor

NASA Astrophysics Data System (ADS)

Choo, Sung Joong; Lee, Byung-Chul; Lee, Sang-Myung; Park, Jung Ho; Shin, Hyun-Joon

2009-09-01

In this paper, silicon oxynitride layers deposited with different plasma-enhanced chemical vapor deposition (PECVD) conditions were fabricated and optimized, in order to make an interferometric sensor for detecting biochemical reactions. For the optimization of PECVD silicon oxynitride layers, the influence of the N2O/SiH4 gas flow ratio was investigated. RF power in the PEVCD process was also adjusted under the optimized N2O/SiH4 gas flow ratio. The optimized silicon oxynitride layer was deposited with 15 W in chamber under 25/150 sccm of N2O/SiH4 gas flow rates. The clad layer was deposited with 20 W in chamber under 400/150 sccm of N2O/SiH4 gas flow condition. An integrated Mach-Zehnder interferometric biosensor based on optical waveguide technology was fabricated under the optimized PECVD conditions. The adsorption reaction between bovine serum albumin (BSA) and the silicon oxynitride surface was performed and verified with this device.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime.

PubMed

Goykhman, Ilya; Desiatov, Boris; Khurgin, Jacob; Shappir, Joseph; Levy, Uriel

2011-06-08

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

Waveguide based compact silicon Schottky photodetector with enhanced responsivity in the telecom spectral band.

PubMed

Goykhman, Ilya; Desiatov, Boris; Khurgin, Jacob; Shappir, Joseph; Levy, Uriel

2012-12-17

We experimentally demonstrate an on-chip compact and simple to fabricate silicon Schottky photodetector for telecom wavelengths operating on the basis of internal photoemission process. The device is realized using CMOS compatible approach of local-oxidation of silicon, which enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. The photodetector demonstrates enhanced internal responsivity of 12.5mA/W for operation wavelength of 1.55µm corresponding to an internal quantum efficiency of 1%, about two orders of magnitude higher than our previously demonstrated results [22]. We attribute this improved detection efficiency to the presence of surface roughness at the boundary between the materials forming the Schottky contact. The combination of enhanced quantum efficiency together with a simple fabrication process provides a promising platform for the realization of all silicon photodetectors and their integration with other nanophotonic and nanoplasmonic structures towards the construction of monolithic silicon opto-electronic circuitry on-chip.

Low cost silicon solar array project: Feasibility of low-cost, high-volume production of silane and pyrolysis of silane to semiconductor-grade silicon

NASA Technical Reports Server (NTRS)

Breneman, W. C.

1978-01-01

Silicon epitaxy analysis of silane produced in the Process Development Unit operating in a completely integrated mode consuming only hydrogen and metallurgical silicon resulted in film resistivities of up to 120 ohms cm N type. Preliminary kinetic studies of dichlorosilane disproportionation in the liquid phase have shown that 11.59% SiH4 is formed at equilibrium after 12 minutes contact time at 56 C. The fluid-bed reactor was operated continuously for 48 hours with a mixture of one percent silane in helium as the fluidizing gas. A high silane pyrolysis efficiency was obtained without the generation of excessive fines. Gas flow conditions near the base of the reactor were unfavorable for maintaining a bubbling bed with good heat transfer characteristics. Consequently, a porous agglomerate formed in the lower portion of the reactor. Dense coherent plating was obtained on the silicon seed particles which had remained fluidizied throughout the experiment.

A high voltage dielectrically isolated smart power technology based on silicon direct bonding

NASA Astrophysics Data System (ADS)

Macary, Veronique

1992-09-01

The feasibility of a dielectrically isolated technology based on the silicon direct bonding technique, for high voltage smart power applications in the 1000 to 1550 V/1 to 20 A range, where a vertical power switch is necessary, is investigated and demonstrated. Static and dynamic isolation of the low voltage circuitry integrated beside the vertical power transistor is the main concern of this family of circuits. The dielectric isolation offers better protection to the low voltage part than does the junction isolation, because of the elimination of the parasitic bipolar transistor inherent to the latter isolation technique. Silicon direct bonding provides a cost effective way to obtain a buried oxide isolation layer. In addition, the application requires a Si/Si bonded area in the active region of the vertical power switch. Strong influence of the prebonding cleaning in the electrical characteristics of the Si/Si interface is pointed out, and presence of crystalline defects is assumed to be at the origin of electrical failures. The main problems of silicon direct bonding process compatibility with standard processes were overcome, and a complete process flow, including the simultaneous integration of a vertical power bipolar transistor together with a bipolar control circuitry, was validated. Using a peripheral biased ring is shown to provide an easy way to optimize high voltage termination for the smart power circuit, while adding a non-additional technological step. This technique was studied by dimensional electrical simulations (BIDIM2 software), as well as analytically computed.

Semiconductor to Metal Transition Characteristics of VO2/NiO Epitaxial Heterostructures Integrated with Si(100)

NASA Astrophysics Data System (ADS)

Molaei, Roya

The novel functionalities of Vanadium dioxide (VO2), such as, several orders of magnitude transition in resistivity and IR transmittance, provide the exciting opportunity for the development of next generation memory, sensor, and field-effect based devices. A critical issue in the development of practical devices based on metal oxides is the integration of high quality epitaxial oxide thin films with the existing silicon technology which is based on silicon (100) substrates. However, silicon is not suitable for epitaxial growth of oxides owing to its tendency to readily form an amorphous oxide layer or silicide at the film-substrate interface. The oxide films deposited directly on silicon exhibit poor crystallinity and are not suitable for device applications. To overcome this challenge, appropriate substrate templates must be developed for the growth of oxide thin films on silicon substrates. The primary objective of this dissertation was to develop an integration methodology of VO2 with Si (100) substrates so they could be used in "smart" sensor type of devices along with other multifunctional devices on the same silicon chip. This was achieved by using a NiO/c- YSZ template layer deposited in situ. It will be shown that if the deposition conditions are controlled properly. This approach was used to integrate VO 2 thin films with Si (100) substrates using pulsed laser deposition (PLD) technique. The deposition methodology of integrating VO2 thin films on silicon using various other template layers will also be discussed. Detailed epitaxial relationship of NiO/c-YSZ/Si(100) heterostructures as a template to growth of VO2 as well as were studied. We also were able to create a p-n junction within a single NiO epilayer through subsequent nanosecond laser annealing, as well as established a structure-property correlation in NiO/c-YSZ/Si(100) thin film epitaxial heterostructures with especial emphasis on the stoichiometry and crystallographic characteristics. NiO/c-YSZ/Si(100) heterostructures were used as template to grow fully relaxed VO2 thin films. The detailed x-ray diffraction, transmission electron microscopy (TEM), electrical characterization results for the deposited films will be presented. In the framework on domain matching epitaxy, epitaxial growth of VO2 (tetragonal crystal structure at growth temperature) on NiO has been explained. Our detailed phi-scan X-ray diffraction measurements corroborate our understanding of the epitaxial growth and in-plane atomic arrangements at the interface. It was observed that the transition characteristics (sharpness, over which electrical property changes are completed, amplitude, transition temperature, and hysteresis) are a strong function of microstructure, strain, and stoichiometry. We have shown that by the choosing the right template layer, strain in the VO2 thin films can be fully relaxed and near-bulk VO2 transition temperatures can be achieved. Finally, I will present my research work on modification of semiconductor-to-metal transition characteristics and effect on room temperature magnetic properties of VO2 thin films upon laser annealing. While the microstructure (epitaxy, crystalline quality etc.) and phase were preserved, we envisage these changes to occur as a result of introduction of oxygen vacancies upon laser treatment.

Dielectric Spectroscopic Detection of Early Failures in 3-D Integrated Circuits.

PubMed

Obeng, Yaw; Okoro, C A; Ahn, Jung-Joon; You, Lin; Kopanski, Joseph J

The commercial introduction of three dimensional integrated circuits (3D-ICs) has been hindered by reliability challenges, such as stress related failures, resistivity changes, and unexplained early failures. In this paper, we discuss a new RF-based metrology, based on dielectric spectroscopy, for detecting and characterizing electrically active defects in fully integrated 3D devices. These defects are traceable to the chemistry of the insolation dielectrics used in the through silicon via (TSV) construction. We show that these defects may be responsible for some of the unexplained early reliability failures observed in TSV enabled 3D devices.

25-Gb/s broadband silicon modulator with 0.31-V·cm VπL based on forward-biased PIN diodes embedded with passive equalizer.

PubMed

Baba, Takeshi; Akiyama, Suguru; Imai, Masahiko; Usuki, Tatsuya

2015-12-28

We investigated the broadband operations of a silicon Mach-Zehnder modulator (MZM) based on a forward-biased-PIN diode. The phase shifter was integrated with a passive-circuit equalizer to compensate for the narrowband characteristics of the diodes, which consists of a simple resistance of doped silicon and a parallel-plate metal capacitance. The device structure was simple and fabricated using standard CMOS processes. The measured results for a 50-Ω driver indicated there was a small VπL of 0.31 V·cm and a flat frequency response for a 3-dB bandwidth (f(3dB)) of 17 GHz, which agree well with the designed values. A 25-Gb/s large-signal operation was obtained using binary signals without pre-emphasis. The modulator showed a linear modulation property to the applied voltage, due to the metal capacitance of the equalizer.

A molecular shift register based on electron transfer

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Josenelson; Beratan, David N.

1988-01-01

An electronic shift-register memory at the molecular level is described. The memory elements are based on a chain of electron-transfer molecules and the information is shifted by photoinduced electron-transfer reactions. This device integrates designed electronic molecules onto a very large scale integrated (silicon microelectronic) substrate, providing an example of a 'molecular electronic device' that could actually be made. The design requirements for such a device and possible synthetic strategies are discussed. Devices along these lines should have lower energy usage and enhanced storage density.

Integration of carbon nanotubes in slot waveguides (Conference Presentation)

NASA Astrophysics Data System (ADS)

Durán-Valdeiglesias, Elena; Zhang, Weiwei; Hoang, Thi Hong Cam; Alonso-Ramos, Carlos; Serna, Samuel; Le Roux, Xavier; Cassan, Eric; Balestrieri, Matteo; Keita, Al-Saleh; Sarti, Francesco; Biccari, Francesco; Torrini, Ughetta; Vinattieri, Anna; Yang, Hongliu; Bezugly, Viktor; Cuniberti, Gianaurelio; Filoramo, Arianna; Gurioli, Massimo; Vivien, Laurent

2016-05-01

Demanding applications such as video streaming, social networking, or web search relay on a large network of data centres, interconnected through optical links. The ever-growing data rates and power consumption inside these data centres are pushing copper links close to their fundamental limits. Optical interconnects are being extensively studied with the purpose of solving these limitations. Among the different possible technology platforms, silicon photonics, due to its compatibility with the CMOS platform, has become one of the preferred solutions for the development of the future generation photonic interconnects. However, the on-chip integration of all photonic and optoelectronic building blocks (sources, modulators and detectors…) is very complex and is not cost-effective due to the various materials involved (Ge for detection, doped Si for modulators and III-V for lasing). Carbon nanotubes (CNTs) are nanomaterials of great interest in photonics thanks to their fundamental optical properties, including near-IR room-temperature foto- and electro- luminescence, Stark effect, Kerr effect and absorption. In consequence, CNTs have the ability to emit, modulate and detect light in the telecommunications wavelength range. Furthermore, they are being extensively developed for new nano-electronics applications. In this work, we propose to use CNTs as active material integrated into silicon photonics for the development of all optoelectronic devices. Here, we report on the development of new integration schemes to couple the light emission from CNTs into optical resonators implemented on the silicon-on-insulator and silicon-nitride-on-insulator platforms. A theoretical and experimental analysis of the light interaction of CNTs with micro-ring resonators based on strip and slot waveguides and slot photonic crystal heterostructure cavities were carried out.

Optical micro-cavities on silicon

NASA Astrophysics Data System (ADS)

Dai, Daoxin; Liu, Erhu; Tan, Ying

2018-01-01

Silicon-based optical microcavities are very popular for many applications because of the ultra-compact footprint, easy scalability, and functional versatility. In this paper we give a discussion about the challenges of the optical microcavities on silicon and also give a review of our recent work, including the following parts. First, a near-"perfect" high-order MRR optical filter with a box-like filtering response is realized by introducing bent directional couplers to have sufficient coupling between the access waveguide and the microrings. Second, an efficient thermally-tunable MRR-based optical filter with graphene transparent nano-heater is realized by introducing transparent graphene nanoheaters. Thirdly, a polarization-selective microring-based optical filter is realized to work with resonances for only one of TE and TM polarizations for the first time. Finally, a on-chip reconfigurable optical add-drop multiplexer for hybrid mode- /wavelength-division-multiplexing systems is realized for the first time by monolithically integrating a mode demultiplexer, four MRR optical switches, and a mode multiplexer.

Ambipolar Barristors for Reconfigurable Logic Circuits.

PubMed

Liu, Yuan; Zhang, Guo; Zhou, Hailong; Li, Zheng; Cheng, Rui; Xu, Yang; Gambin, Vincent; Huang, Yu; Duan, Xiangfeng

2017-03-08

Vertical heterostructures based on graphene have emerged as a unique architecture for novel electronic devices with unusual characteristics. Here we report a new design of vertical ambipolar barristors based on metal-graphene-silicon-graphene sandwich structure, using the bottom graphene as a gate-tunable "active contact", the top graphene as an adaptable Ohmic contact, and the low doping thin silicon layer as the switchable channel. Importantly, with finite density of states and weak screening effect of graphene, we demonstrate, for the first time, that both the carrier concentration and majority carrier type in the sandwiched silicon can be readily modulated by gate potential penetrating through graphene. It can thus enable a new type of ambipolar barristors with an ON-OFF ratio exceeding 10 3 . Significantly, these ambipolar barristors can be flexibly configured into either p-type or n-type transistors and used to create integrated circuits with reconfigurable logic functions. This unconventional device structure and ambipolar reconfigurable characteristics can open up exciting opportunities in future electronics based on graphene or two-dimensional van der Waals heterostructures.

A way to improve dose rate laser simulation adequacy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Skorobogatov, P.K.; Nikiforov, A.Y.; Demidov, A.A.

1998-12-01

A method for improving laser simulation of dose rate radiation in silicon IC`s (Integrated Circuit) is analyzed based on the application of noncoherent laser radiation. Experimental validation was performed using test structures with up to 90% surface metallization coverage.

All silicon electrode photocapacitor for integrated energy storage and conversion.

PubMed

Cohn, Adam P; Erwin, William R; Share, Keith; Oakes, Landon; Westover, Andrew S; Carter, Rachel E; Bardhan, Rizia; Pint, Cary L

2015-04-08

We demonstrate a simple wafer-scale process by which an individual silicon wafer can be processed into a multifunctional platform where one side is adapted to replace platinum and enable triiodide reduction in a dye-sensitized solar cell and the other side provides on-board charge storage as an electrochemical supercapacitor. This builds upon electrochemical fabrication of dual-sided porous silicon and subsequent carbon surface passivation for silicon electrochemical stability. The utilization of this silicon multifunctional platform as a combined energy storage and conversion system yields a total device efficiency of 2.1%, where the high frequency discharge capability of the integrated supercapacitor gives promise for dynamic load-leveling operations to overcome current and voltage fluctuations during solar energy harvesting.

Metal-optic and Plasmonic Semiconductor-based Nanolasers

DTIC Science & Technology

2012-05-07

provides a means to integrate laser sources for silicon photonics technology. Using wafer bonding techniques, the metal- clad nanocavity can be integrated...SUPPLEMENTARY NOTES 14. ABSTRACT Over the past few decades, semiconductor lasers have relentlessly followed the path towards miniaturization...Smaller lasers are more energy e cient, are cheaper to make, and open up new applications in sensing and displays, among many other things. Yet, up until

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

PubMed Central

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

Linear and passive silicon optical isolator

PubMed Central

Wang, Chen; Zhong, Xiao-Lan; Li, Zhi-Yuan

2012-01-01

On-chip optical isolation plays a key role in optical communications and computing based on silicon integrated photonic structures and has attracted great attentions for long years. Recently there have appeared hot controversies upon whether isolation of light can be realized via linear and passive photonic structures. Here we demonstrate optical isolation of infrared light in purely linear and passive silicon photonic structures. Both numerical simulations and experimental measurements show that the round-trip transmissivity of in-plane infrared light across a silicon photonic crystal slab heterojunction diode could be two orders of magnitudes smaller than the forward transmissivity at around 1,550 nm with a bandwidth of about 50 nm, indicating good performance of optical isolation. The occurrence of in-plane light isolation is attributed to the information dissipation due to off-plane and side-way scattering and selective modal conversion in the multiple-channel structure and has no conflict with the reciprocal principle. PMID:22993699

Broadband and scalable optical coupling for silicon photonics using polymer waveguides

NASA Astrophysics Data System (ADS)

La Porta, Antonio; Weiss, Jonas; Dangel, Roger; Jubin, Daniel; Meier, Norbert; Horst, Folkert; Offrein, Bert Jan

2018-04-01

We present optical coupling schemes for silicon integrated photonics circuits that account for the challenges in large-scale data processing systems such as those used for emerging big data workloads. Our waveguide based approach allows to optimally exploit the on-chip optical feature size, and chip- and package real-estate. It further scales well to high numbers of channels and is compatible with state-of-the-art flip-chip die packaging. We demonstrate silicon waveguide to polymer waveguide coupling losses below 1.5 dB for both the O- and C-bands with a polarisation dependent loss of <1 dB. Over 100 optical silicon waveguide to polymer waveguide interfaces were assembled within a single alignment step, resulting in a physical I/O channel density of up to 13 waveguides per millimetre along the chip-edge, with an average coupling loss of below 3.4 dB measured at 1310 nm.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

PubMed

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

A low-latency optical switch architecture using integrated μm SOI-based contention resolution and switching

NASA Astrophysics Data System (ADS)

Mourgias-Alexandris, G.; Moralis-Pegios, M.; Terzenidis, N.; Cherchi, M.; Harjanne, M.; Aalto, T.; Vyrsokinos, K.; Pleros, N.

2018-02-01

The urgent need for high-bandwidth and high-port connectivity in Data Centers has boosted the deployment of optoelectronic packet switches towards bringing high data-rate optics closer to the ASIC, realizing optical transceiver functions directly at the ASIC package for high-rate, low-energy and low-latency interconnects. Even though optics can offer a broad range of low-energy integrated switch fabrics for replacing electronic switches and seamlessly interface with the optical I/Os, the use of energy- and latency-consuming electronic SerDes continues to be a necessity, mainly dictated by the absence of integrated and reliable optical buffering solutions. SerDes undertakes the role of optimally synergizing the lower-speed electronic buffers with the incoming and outgoing optical streams, suggesting that a SerDes-released chip-scale optical switch fabric can be only realized in case all necessary functions including contention resolution and switching can be implemented on a common photonic integration platform. In this paper, we demonstrate experimentally a hybrid Broadcast-and-Select (BS) / wavelength routed optical switch that performs both the optical buffering and switching functions with μm-scale Silicon-integrated building blocks. Optical buffering is carried out in a silicon-integrated variable delay line bank with a record-high on-chip delay/footprint efficiency of 2.6ns/mm2 and up to 17.2 nsec delay capability, while switching is executed via a BS design and a silicon-integrated echelle grating, assisted by SOA-MZI wavelength conversion stages and controlled by a FPGA header processing module. The switch has been experimentally validated in a 3x3 arrangement with 10Gb/s NRZ optical data packets, demonstrating error-free switching operation with a power penalty of <5dB.

The 19th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Mcdonald, R. R.

1981-01-01

The Flat-Plate Solar Array Project is described. Project analysis and integration is discussed. Technology research in silicon material, large-area silicon sheet and environmental isolation; cell and module formation; engineering sciences, and module performance and failure analysis. It includes a report on, and copies of visual presentations made at, the 19th Project Integration Meeting held at Pasadena, California, on November 11, 1981.

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

PubMed

Shen, Wen-Wei; Chen, Kuan-Neng

2017-12-01

3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

Hybrid integration of laser source on silicon photonic integrated circuit for low-cost interferometry medical device

NASA Astrophysics Data System (ADS)

Duperron, Matthieu; Carroll, Lee; Rensing, Marc; Collins, Sean; Zhao, Yan; Li, Yanlu; Baets, Roel; O'Brien, Peter

2017-02-01

The cost-effective integration of laser sources on Silicon Photonic Integrated Circuits (Si-PICs) is a key challenge to realizing the full potential of on-chip photonic solutions for telecommunication and medical applications. Hybrid integration can offer a route to high-yield solutions, using only known-good laser-chips, and simple freespace micro-optics to transport light from a discrete laser-diode to a grating-coupler on the Si-PIC. In this work, we describe a passively assembled micro-optical bench (MOB) for the hybrid integration of a 1550nm 20MHz linewidth laser-diode on a Si-PIC, developed for an on-chip interferometer based medical device. A dual-lens MOB design minimizes aberrations in the laser spot transported to the standard grating-coupler (15 μm x 12 μm) on the Si-PIC, and facilitates the inclusion of a sub-millimeter latched-garnet optical-isolator. The 20dB suppression from the isolator helps ensure the high-frequency stability of the laser-diode, while the high thermal conductivity of the AlN submount (300/W=m.°C), and the close integration of a micro-bead thermistor, ensure the stable and efficient thermo-electric cooling of the laser-diode, which helps minimise low-frequency drift during the approximately 15s of operation needed for the point-of-care measurement. The dual-lens MOB is compatible with cost-effective passively-aligned mass-production, and can be optimised for alternative PIC-based applications.

MEMS-based silicon cantilevers with integrated electrothermal heaters for airborne ultrafine particle sensing

NASA Astrophysics Data System (ADS)

Wasisto, Hutomo Suryo; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

2013-05-01

The development of low-cost and low-power MEMS-based cantilever sensors for possible application in hand-held airborne ultrafine particle monitors is described in this work. The proposed resonant sensors are realized by silicon bulk micromachining technology with electrothermal excitation, piezoresistive frequency readout, and electrostatic particle collection elements integrated and constructed in the same sensor fabrication process step of boron diffusion. Built-in heating resistor and full Wheatstone bridge are set close to the cantilever clamp end for effective excitation and sensing, respectively, of beam deflection. Meanwhile, the particle collection electrode is located at the cantilever free end. A 300 μm-thick, phosphorus-doped silicon bulk wafer is used instead of silicon-on-insulator (SOI) as the starting material for the sensors to reduce the fabrication costs. To etch and release the cantilevers from the substrate, inductively coupled plasma (ICP) cryogenic dry etching is utilized. By controlling the etching parameters (e.g., temperature, oxygen content, and duration), cantilever structures with thicknesses down to 10 - 20 μm are yielded. In the sensor characterization, the heating resistor is heated and generating thermal waves which induce thermal expansion and further cause mechanical bending strain in the out-of-plane direction. A resonant frequency of 114.08 +/- 0.04 kHz and a quality factor of 1302 +/- 267 are measured in air for a fabricated rectangular cantilever (500x100x13.5 μm3). Owing to its low power consumption of a few milliwatts, this electrothermal cantilever is suitable for replacing the current external piezoelectric stack actuator in the next generation of the miniaturized cantilever-based nanoparticle detector (CANTOR).

The Status and Outlook for the Photovoltaics Industry

NASA Astrophysics Data System (ADS)

Carlson, David

2006-03-01

The first silicon solar cell was made at Bell Labs in 1954, and over the following decades, shipments of photovoltaic (PV) modules increased at a rate of about 18% annually. In the last several years, the annual growth rate has increased to ˜ 35% due largely to government-supported programs in Japan and Germany. Silicon technology has dominated the PV industry since its inception, and in 2005 about 65% of all solar cells were made from polycrystalline (or multicrystalline) silicon, 24% from monocrystalline silicon and ˜ 4% from ribbon silicon. While conversion efficiencies as high as 24.7% have been obtained in the laboratory for silicon solar cells, the best efficiencies for commercial PV modules are in the range of 17 18% (the efficiency limit for a silicon solar cell is ˜ 29%). A number of companies are commercializing solar cells based on other materials such as amorphous silicon, microcrystalline silicon, cadmium telluride, copper-indium-gallium-diselenide (CIGS), gallium arsenide (and related compounds) and dye- sensitized titanium oxide. Thin film CIGS solar cells have been fabricated with conversion efficiencies as high as 19.5% while efficiencies as high as 39% have been demonstrated for a GaInP/Ga(In)As/Ge triple-junction cell operating at a concentration of 236 suns. Thin film solar cells are being used in consumer products and in some building-integrated applications, while PV concentrator systems are being tested in grid-connected arrays located in high solar insolation areas. Nonetheless, crystalline silicon PV technology is likely to dominate the terrestrial market for at least the next decade with module efficiencies > 20% and module prices of < 1/Wp expected by 2020, which in turn should allow significant penetration of the utility grid market. However, crystalline silicon solar cells may be challenged in the next decade or two by new low-cost, high performance devices based on organic materials and nanotechnology.

Ultra-low crosstalk, CMOS compatible waveguide crossings for densely integrated photonic interconnection networks.

PubMed

Jones, Adam M; DeRose, Christopher T; Lentine, Anthony L; Trotter, Douglas C; Starbuck, Andrew L; Norwood, Robert A

2013-05-20

We explore the design space for optimizing CMOS compatible waveguide crossings on a silicon photonics platform. This paper presents simulated and experimental excess loss and crosstalk suppression data for vertically integrated silicon nitride over silicon-on-insulator waveguide crossings. Experimental results show crosstalk suppression exceeding -49/-44 dB with simulation results as low as -65/-60 dB for the TE/TM mode in a waveguide crossing with a 410 nm vertical gap.

Mixing formula for tissue-mimicking silicone phantoms in the near infrared

NASA Astrophysics Data System (ADS)

Böcklin, C.; Baumann, D.; Stuker, F.; Fröhlich, Jürg

2015-03-01

The knowledge of accurate optical parameters of materials is paramount in biomedical optics applications and numerical simulations of such systems. Phantom materials with variable but predefined parameters are needed to optimise these systems. An optimised integrating sphere measurement setup and reconstruction algorithm are presented in this work to determine the optical properties of silicone rubber based phantoms whose absorption and scattering properties are altered with TiO2 and carbon black particles. A mixing formula for all constituents is derived and allows to create phantoms with predefined optical properties.

CMOS-compatible plenoptic detector for LED lighting applications.

PubMed

Neumann, Alexander; Ghasemi, Javad; Nezhadbadeh, Shima; Nie, Xiangyu; Zarkesh-Ha, Payman; Brueck, S R J

2015-09-07

LED lighting systems with large color gamuts, with multiple LEDs spanning the visible spectrum, offer the potential of increased lighting efficiency, improved human health and productivity, and visible light communications addressing the explosive growth in wireless communications. The control of this "smart lighting system" requires a silicon-integrated-circuit-compatible, visible, plenoptic (angle and wavelength) detector. A detector element, based on an offset-grating-coupled dielectric waveguide structure and a silicon photodetector, is demonstrated with an angular resolution of less than 1° and a wavelength resolution of less than 5 nm.

Fabrication of a Silicon Backshort Assembly for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Optical interconnects based on VCSELs and low-loss silicon photonics

NASA Astrophysics Data System (ADS)

Aalto, Timo; Harjanne, Mikko; Karppinen, Mikko; Cherchi, Matteo; Sitomaniemi, Aila; Ollila, Jyrki; Malacarne, Antonio; Neumeyr, Christian

2018-02-01

Silicon photonics with micron-scale Si waveguides offers most of the benefits of submicron SOI technology while avoiding most of its limitations. In particular, thick silicon-on-insulator (SOI) waveguides offer 0.1 dB/cm propagation loss, polarization independency, broadband single-mode (SM) operation from 1.2 to >4 µm wavelength and ability to transmit high optical powers (>1 W). Here we describe the feasibility of Thick-SOI technology for advanced optical interconnects. With 12 μm SOI waveguides we demonstrate efficient coupling between standard single-mode fibers, vertical-cavity surface-emitting lasers (VCSELs) and photodetectors (PDs), as well as wavelength multiplexing in small footprint. Discrete VCSELs and PDs already support 28 Gb/s on-off keying (OOK), which shows a path towards 50-100 Gb/s bandwidth per wavelength by using more advanced modulation formats like PAM4. Directly modulated VCSELs enable very power-efficient optical interconnects for up to 40 km distance. Furthermore, with 3 μm SOI waveguides we demonstrate extremely dense and low-loss integration of numerous optical functions, such as multiplexers, filters, switches and delay lines. Also polarization independent and athermal operation is demonstrated. The latter is achieved by using short polymer waveguides to compensate for the thermo-optic effect in silicon. New concepts for isolator integration and polarization rotation are also explained.

Ultralow-Loss CMOS Copper Plasmonic Waveguides.

PubMed

Fedyanin, Dmitry Yu; Yakubovsky, Dmitry I; Kirtaev, Roman V; Volkov, Valentyn S

2016-01-13

Surface plasmon polaritons can give a unique opportunity to manipulate light at a scale well below the diffraction limit reducing the size of optical components down to that of nanoelectronic circuits. At the same time, plasmonics is mostly based on noble metals, which are not compatible with microelectronics manufacturing technologies. This prevents plasmonic components from integration with both silicon photonics and silicon microelectronics. Here, we demonstrate ultralow-loss copper plasmonic waveguides fabricated in a simple complementary metal-oxide semiconductor (CMOS) compatible process, which can outperform gold plasmonic waveguides simultaneously providing long (>40 μm) propagation length and deep subwavelength (∼λ(2)/50, where λ is the free-space wavelength) mode confinement in the telecommunication spectral range. These results create the backbone for the development of a CMOS plasmonic platform and its integration in future electronic chips.

Telecom-Wavelength Bottom-up Nanobeam Lasers on Silicon-on-Insulator.

PubMed

Kim, Hyunseok; Lee, Wook-Jae; Farrell, Alan C; Balgarkashi, Akshay; Huffaker, Diana L

2017-09-13

Semiconductor nanowire lasers are considered promising ultracompact and energy-efficient light sources in the field of nanophotonics. Although the integration of nanowire lasers onto silicon photonic platforms is an innovative path toward chip-scale optical communications and photonic integrated circuits, operating nanowire lasers at telecom-wavelengths remains challenging. Here, we report on InGaAs nanowire array lasers on a silicon-on-insulator platform operating up to 1440 nm at room temperature. Bottom-up photonic crystal nanobeam cavities are formed by growing nanowires as ordered arrays using selective-area epitaxy, and single-mode lasing by optical pumping is demonstrated. We also show that arrays of nanobeam lasers with individually tunable wavelengths can be integrated on a single chip by the simple adjustment of the lithographically defined growth pattern. These results exemplify a practical approach toward nanowire lasers for silicon photonics.

Ultra-Thin Monocrystalline Silicon Solar Cell with 12.2% Efficiency Using Silicon-On-Insulator Substrate.

PubMed

Bian, Jian-Tao; Yu, Jian; Duan, Wei-Yuan; Qiu, Yu

2015-04-01

Single side heterojunction silicon solar cells were designed and fabricated using Silicon-On-Insulator (SOI) substrate. The TCAD software was used to simulate the effect of silicon layer thickness, doping concentration and the series resistance. A 10.5 µm thick monocrystalline silicon layer was epitaxially grown on the SOI with boron doping concentration of 2 x 10(16) cm(-3) by thermal CVD. Very high Voc of 678 mV was achieved by applying amorphous silicon heterojunction emitter on the front surface. The single cell efficiency of 12.2% was achieved without any light trapping structures. The rear surface recombination and the series resistance are the main limiting factors for the cell efficiency in addition to the c-Si thickness. By integrating an efficient light trapping scheme and further optimizing fabrication process, higher efficiency of 14.0% is expected for this type of cells. It can be applied to integrated circuits on a monolithic chip to meet the requirements of energy autonomous systems.

Through-silicon via-induced strain distribution in silicon interposer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vianne, B., E-mail: benjamin.vianne@st.com; STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles; Richard, M.-I.

2015-04-06

Strain in silicon induced by Through-Silicon Via (TSV) integration is of particular interest in the frame of the integration of active devices in silicon interposer. Nano-focused X-ray beam diffraction experiments were conducted using synchrotron radiation to investigate the thermally induced strain field in silicon around copper filled TSVs. Measurements were performed on thinned samples at room temperature and during in situ annealing at 400 °C. In order to correlate the 2D strain maps with finite elements analysis, an analytical model was developed, which takes into account beam absorption in the sample for a given diffraction geometry. The strain field along themore » [335] direction is found to be in the 10{sup −5} range at room temperature and around 10{sup −4} at 400 °C. Simulations support the expected plastification in some regions of the TSV during the annealing step.« less

Flip-chip integrated silicon Mach-Zehnder modulator with a 28nm fully depleted silicon-on-insulator CMOS driver.

PubMed

Yong, Zheng; Shopov, Stefan; Mikkelsen, Jared C; Mallard, Robert; Mak, Jason C C; Voinigescu, Sorin P; Poon, Joyce K S

2017-03-20

We present a silicon electro-optic transmitter consisting of a 28nm ultra-thin body and buried oxide fully depleted silicon-on-insulator (UTBB FD-SOI) CMOS driver flip-chip integrated onto a Mach-Zehnder modulator. The Mach-Zehnder silicon optical modulator was optimized to have a 3dB bandwidth of around 25 GHz at -1V bias and a 50 Ω impedance. The UTBB FD-SOI CMOS driver provided a large output voltage swing around 5 V_pp to enable a high dynamic extinction ratio and a low device insertion loss. At 44 Gbps, the transmitter achieved a high extinction ratio of 6.4 dB at the modulator quadrature operation point. This result shows open eye diagrams at the highest bit rates and with the largest extinction ratios for silicon electro-optic transmitter using a CMOS driver.

Silicon oxynitride-on-glass waveguide array refractometer with wide sensing range and integrated read-out (Conference Presentation)

NASA Astrophysics Data System (ADS)

Viegas, Jaime; Mayeh, Mona; Srinivasan, Pradeep; Johnson, Eric G.; Marques, Paulo V. S.; Farahi, Faramarz

2017-02-01

In this work, a silicon oxynitride-on-silica refractometer is presented, based on sub-wavelength coupled arrayed waveguide interference, and capable of low-cost, high resolution, large scale deployment. The sensor has an experimental spectral sensitivity as high as 3200 nm/RIU, covering refractive indices ranging from 1 (air) up to 1.43 (oils). The sensor readout can be performed by standard spectrometers techniques of by pattern projection onto a camera, followed by optical pattern recognition. Positive identification of the refractive index of an unknown species is obtained by pattern cross-correlation with a look-up calibration table based algorithm. Given the lower contrast between core and cladding in such devices, higher mode overlap with single mode fiber is achieved, leading to a larger coupling efficiency and more relaxed alignment requirements as compared to silicon photonics platform. Also, the optical transparency of the sensor in the visible range allows the operation with light sources and camera detectors in the visible range, of much lower capital costs for a complete sensor system. Furthermore, the choice of refractive indices of core and cladding in the sensor head with integrated readout, allows the fabrication of the same device in polymers, for mass-production replication of disposable sensors.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Rose, Klint A [Mt. View, CA; Davidson, James Courtney [Livermore, CA; Strauch, Mark S [Livermore, CA

2008-03-11

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Rose, Klint A [Mt. View, CA; Davidson, James Courtney [Livermore, CA; Strauch, Mark S [Livermore, CA

2006-04-18

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A.; Maghribi, Mariam N.; Benett, William J.; Hamilton, Julie K.; Rose, Klint A.; Davidson, James Courtney; Strauch, Mark S.

2005-04-12

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic Unit Integrated Into A Flexible Polymer Body

DOEpatents

Krulevitch, Peter A.; Maghribi, Mariam N.; Benett, William J.; Hamilton, Julie K.; Rose, Klint A.; Davidson, James Courtney; Strauch, Mark S.

2006-01-31

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Chemically Tunable 2D Materials

DTIC Science & Technology

new opto-electronic silicon based 2D materials, (ii) new material coatings that can change color from transparent to blue chemically or with heat, and...conduction and transparency . Activities are integrated with in-situ fundamental investigation to synergistically develop a complete understanding in materials research.

Test Structures For Bumpy Integrated Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Integrated optical sensors for 2D spatial chemical mapping (Conference Presentation)

NASA Astrophysics Data System (ADS)

Flores, Raquel; Janeiro, Ricardo; Viegas, Jaime

2017-02-01

Sensors based on optical waveguides for chemical sensing have attracted increasing interest over the last two decades, fueled by potential applications in commercial lab-on-a-chip devices for medical and food safety industries. Even though the early studies were oriented for single-point detection, progress in device size reduction and device yield afforded by photonics foundries have opened the opportunity for distributed dynamic chemical sensing at the microscale. This will allow researchers to follow the dynamics of chemical species in field of microbiology, and microchemistry, with a complementary method to current technologies based on microfluorescence and hyperspectral imaging. The study of the chemical dynamics at the surface of photoelectrodes in water splitting cells are a good candidate to benefit from such optochemical sensing devices that includes a photonic integrated circuit (PIC) with multiple sensors for real-time detection and spatial mapping of chemical species. In this project, we present experimental results on a prototype integrated optical system for chemical mapping based on the interaction of cascaded resonant optical devices, spatially covered with chemically sensitive polymers and plasmon-enhanced nanostructured metal/metal-oxide claddings offering chemical selectivity in a pixelated surface. In order to achieve a compact footprint, the prototype is based in a silicon photonics platform. A discussion on the relative merits of a photonic platform based on large bandgap metal oxides and nitrides which have higher chemical resistance than silicon is also presented.

GaAs photovoltaics and optoelectronics using releasable multilayer epitaxial assemblies.

PubMed

Yoon, Jongseung; Jo, Sungjin; Chun, Ik Su; Jung, Inhwa; Kim, Hoon-Sik; Meitl, Matthew; Menard, Etienne; Li, Xiuling; Coleman, James J; Paik, Ungyu; Rogers, John A

2010-05-20

Compound semiconductors like gallium arsenide (GaAs) provide advantages over silicon for many applications, owing to their direct bandgaps and high electron mobilities. Examples range from efficient photovoltaic devices to radio-frequency electronics and most forms of optoelectronics. However, growing large, high quality wafers of these materials, and intimately integrating them on silicon or amorphous substrates (such as glass or plastic) is expensive, which restricts their use. Here we describe materials and fabrication concepts that address many of these challenges, through the use of films of GaAs or AlGaAs grown in thick, multilayer epitaxial assemblies, then separated from each other and distributed on foreign substrates by printing. This method yields large quantities of high quality semiconductor material capable of device integration in large area formats, in a manner that also allows the wafer to be reused for additional growths. We demonstrate some capabilities of this approach with three different applications: GaAs-based metal semiconductor field effect transistors and logic gates on plates of glass, near-infrared imaging devices on wafers of silicon, and photovoltaic modules on sheets of plastic. These results illustrate the implementation of compound semiconductors such as GaAs in applications whose cost structures, formats, area coverages or modes of use are incompatible with conventional growth or integration strategies.

Proceedings of the 13th Project integration meeting

NASA Technical Reports Server (NTRS)

Mcdonald, R. R.

1979-01-01

Progress made by the Low Cost Solar Array Project during the period April through August 1979 is presented. Reports are given on project analysis and integration; technology development in silicon material, large area sheet silicon, and encapsulation; production process and equipment development; engineering and operations, and a discussion of the steps taken to integrate these efforts. A report on, and copies of viewgraphs presented at the Project Integration Meeting held August 22-23, 1979 are presented.

Nanoporous Silicon Ignition of JA2 Propellant

DTIC Science & Technology

2014-06-01

signals that would satisfy the hazard of electromagnetic radiation to ordnance (HERO) requirements of modern munitions. Such integrated circuits can...NUMBER (Include area code) 410-278-6098 Standard Form 298 (Rev. 8/98) Prescribed by ANSI Std. Z39.18 iii Contents List of Figures iv 1...fabricated as an integral element of a silicon chip. Integrated circuits that filter the firing command signal could remove extraneous electromagnetic

Highly efficient birefringent quarter-wave plate based on all-dielectric metasurface and graphene

NASA Astrophysics Data System (ADS)

Owiti, Edgar O.; Yang, Hanning; Liu, Peng; Ominde, Calvine F.; Sun, Xiudong

2018-07-01

All-dielectric metasurfaces offer remarkable properties including high efficiency and flexible control of the optical response. However, extreme, narrow bandwidth is a limitation that lowers applicability of these structures in photonic sensing applications. In this work, we numerically design and propose a switchable quarter-wave plate by hybridizing an all-dielectric metasurface with graphene. By using a single layer of graphene between a highly refractive index silicon and a silica substrate, the transmissive resonance is enhanced and broadened. Additionally, integrating graphene with silicon effectively modulates the Q-factor and the trapped magnetic modes in the silicon. A stable birefringence output is obtained and manipulated through the structure dimensions and the Fermi energy of graphene. A 95% polarization conversion ratio is achieved through converting linearly polarized light into circularly polarized light, and a 96% ellipticity ratio is obtained at the resonance wavelength. The structure is compact and has an ultrathin design thickness of 0 . 1 λ, in the telecommunication region. The above properties are essential for integration into photonic sensing devices and the structure has potential for compatibility with the CMOS devices.

Skin integrity and silicone: Appeel 'no-sting' medical adhesive remover.

PubMed

Stephen-Haynes, Jackie

This article offers an overview of skin and the importance of maintaining intact skin in relation to wound and stoma care. Various patients and their conditions are considered in relation to their potential for skin damage with the removal of adhesive products, including paediatrics, those with epidermolysis bullosa, haemangioma, fragile skin, elderly skin and ostomates. The importance of protecting fragile skin and protecting the peri-wound and peri-stoma area is discussed and the impact of such damage on quality of life is considered. The evidence relating to the impact that silicone-based adhesive removers can have is reviewed with a conclusion that an evidence-based approach can significantly affect patient outcomes.

Microchip Module for Blood Sample Preparation and Nucleic Acid Amplification Reactions

PubMed Central

Yuen, Po Ki; Kricka, Larry J.; Fortina, Paolo; Panaro, Nicholas J.; Sakazume, Taku; Wilding, Peter

2001-01-01

A computer numerical control-machined plexiglas-based microchip module was designed and constructed for the integration of blood sample preparation and nucleic acid amplification reactions. The microchip module is comprised of a custom-made heater-cooler for thermal cycling, a series of 254 μm × 254 μm microchannels for transporting human whole blood and reagents in and out of an 8–9 μL dual-purpose (cell isolation and PCR) glass-silicon microchip. White blood cells were first isolated from a small volume of human whole blood (<3 μL) in an integrated cell isolation–PCR microchip containing a series of 3.5-μm feature-sized “weir-type” filters, formed by an etched silicon dam spanning the flow chamber. A genomic target, a region in the human coagulation Factor V gene (226-bp), was subsequently directly amplified by microchip-based PCR on DNA released from white blood cells isolated on the filter section of the microchip mounted onto the microchip module. The microchip module provides a convenient means to simplify nucleic acid analyses by integrating two key steps in genetic testing procedures, cell isolation and PCR and promises to be adaptable for additional types of integrated assays. PMID:11230164

Integration of strained and relaxed silicon thin films on silicon wafers via engineered oxide heterostructures: Experiment and theory

NASA Astrophysics Data System (ADS)

Seifarth, O.; Dietrich, B.; Zaumseil, P.; Giussani, A.; Storck, P.; Schroeder, T.

2010-10-01

Strained and relaxed single crystalline Si on insulator systems is an important materials science approach for future Si-based nanoelectronics. Layer transfer techniques are the dominating global integration approach over the whole wafer system but are difficult to scale down for local integration purposes limited to the area of the future device. In this respect, the heteroepitaxy approach by two simple subsequent epitaxial deposition steps of the oxide and the Si thin film is a promising way. We introduce tailored (Pr2O3)1-x(Y2O3)x oxide heterostructures on Si(111) as flexible heteroepitaxy concept for the integration of either strained or fully relaxed single crystalline Si thin films. Two different buffer concepts are explored by a combined experimental and theoretical study. First, the growth of fully relaxed single crystalline Si films is achieved by the growth of mixed PrYO3 insulators on Si(111) whose lattice constant is matched to Si. Second, isomorphic oxide-on-oxide epitaxy is exploited to grow strained Si films on lattice mismatched Y2O3/Pr2O3/Si(111) support systems. A thickness dependent multilayer model, based on Matthew's approach for strain relaxation by misfit dislocations, is presented to describe the experimental data.

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

NASA Astrophysics Data System (ADS)

Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

2018-06-01

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

High-speed thin-film transistors on single-crystalline, unstrained- and strained-silicon-based nanomembranes

NASA Astrophysics Data System (ADS)

Yuan, Hao-Chih

This research focuses on developing high-performance single-crystal Si-based nanomembranes and high-frequency thin-film transistors (TFTs) using these nanomembranes on flexible plastic substrates. Unstrained Si or SiGe nanomembranes with thickness of several tens to a couple of hundred nanometers are derived from silicon-on-insulator (SOI) or silicon-germanium-on-insulator (SGOI) and are subsequently transferred and integrated with flexible plastic host substrates via a one-step dry printing technique. Biaxial tensile-strained Si membranes that utilize elastic strain-sharing between Si and additionally grown SiGe thin films are also successfully integrated with plastic host substrates and exhibit predicted strain status and negligible density of dislocations. Biaxial tensile strain enhances electron mobility and lowers Schottky contact resistance. As a result, flexible TFTs built on the strained Si-membranes demonstrate much higher electron effective mobility and higher drive current than the unstrained counterpart. The dependence of drive current and transconductance on uniaxial tensile strain introducing by mechanical bending is also discussed. A novel combined "hot-and-cold" TFT fabrication process is developed specifically for realizing a wide spectrum of micro-electronics that can exhibit RF performance and can be integrated on low-temperature plastic substrate. The "hot" process that consists of ion implant and high-temperature annealing for desired doping type, profile, and concentration is realized on the bulk SOI/SGOI substrates followed by the "cold" process that includes room-temperature silicon-monoxide (SiO) deposition as gate dielectric layer to ensure the process compatibility with low-temperature, low-cost plastics. With these developments flexible Si-membrane n-type RF TFTs for analog applications and complementary TFTs for digital applications are demonstrated for the first time. RF TFTs with 1.5-mum channel length have demonstrated record-high f T and fmax values of 2.04 and 7.8 GHz, respectively. A small-signal equivalent circuit model study on the RF TFTs reveals the physics of how device layout affects fT and f max, which paves the way for further performance optimization and realization of integrated circuit on flexible substrate in the future.

Low-cost solar array project and Proceedings of the 15th Project Integration Meeting

NASA Technical Reports Server (NTRS)

1980-01-01

Progress made by the Low-Cost Solar Array Project during the period December 1979 to April 1980 is described. Project analysis and integration, technology development in silicon material, large area silicon sheet and encapsulation, production process and equipment development, engineering, and operation are included.

Proceedings of the 24th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Tustin, D.

1984-01-01

Progress made by the Flat-Plate Solar Array Project is described. Reports on silicon sheet growth and characterization, silicon material, process development, high-efficiency cells, environmental isolation, engineering sciences, and reliability physics are presented along with copies of visual presentations made at the 24th Project Integration Meeting.

SIC mirrors polishing

NASA Astrophysics Data System (ADS)

Rodolfo, J.; Ruch, E.; Tarreau, M.; Merceron, J.-M.; Ferré, J.; Rousselet, N.; Leplan, H.; Geyl, R.; Harnisch, B.

2017-11-01

Silicon Carbide is a material of high interest in the design and manufacturing of space telescopes, thanks to its mechanical and thermal properties. Since many years, Reosc has gathered a large experience in the polishing, testing, integration and coating of large size Silicon Carbide mirrors as well as in the integration of full SiC TMAs.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1988-04-20

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissipative layer of silicon nitride between a silicon substrate and the active device. Free carriers generated in the substrate are dissipated by the layer before they can build up charge on the active device. 1 fig.

Silicon Technologies Adjust to RF Applications

NASA Technical Reports Server (NTRS)

Reinecke Taub, Susan; Alterovitz, Samuel A.

1994-01-01

Silicon (Si), although not traditionally the material of choice for RF and microwave applications, has become a serious challenger to other semiconductor technologies for high-frequency applications. Fine-line electron- beam and photolithographic techniques are now capable of fabricating silicon gate sizes as small as 0.1 micron while commonly-available high-resistivity silicon wafers support low-loss microwave transmission lines. These advances, coupled with the recent development of silicon-germanium (SiGe), arm silicon integrated circuits (ICs) with the speed required for increasingly higher-frequency applications.

Integrated wide-angle scanner based on translating a curved mirror of acylindrical shape.

PubMed

Sabry, Yasser M; Khalil, Diaa; Saadany, Bassam; Bourouina, Tarik

2013-06-17

A wide angle microscanning architecture is presented in which the angular deflection is achieved by displacing the principle axis of a curved silicon micromirror of acylindrical shape, with respect to the incident beam optical axis. The micromirror curvature is designed to overcome the possible deformation of the scanned beam spot size during scanning. In the presented architecture, the optical axis of the beam lays in-plane with respect to the substrate opening the door for a completely integrated and self-aligned miniaturized scanner. A micro-optical bench scanning device, based on translating a 200 μm focal length micromirror by an electrostatic comb-drive actuator, is implemented on a silicon chip. The microelectromechanical system has a resonance frequency of 329 Hz and a quality factor of 22. A single-mode optical fiber is used as the optical source and inserted into a micromachined groove fabricated and lithographically aligned with the microbench. Optical deflection angles up to 110 degrees are demonstrated.

Growth and Etch Rate Study of Low Temperature Anodic Silicon Dioxide Thin Films

PubMed Central

Ashok, Akarapu; Pal, Prem

2014-01-01

Silicon dioxide (SiO2) thin films are most commonly used insulating films in the fabrication of silicon-based integrated circuits (ICs) and microelectromechanical systems (MEMS). Several techniques with different processing environments have been investigated to deposit silicon dioxide films at temperatures down to room temperature. Anodic oxidation of silicon is one of the low temperature processes to grow oxide films even below room temperature. In the present work, uniform silicon dioxide thin films are grown at room temperature by using anodic oxidation technique. Oxide films are synthesized in potentiostatic and potentiodynamic regimes at large applied voltages in order to investigate the effect of voltage, mechanical stirring of electrolyte, current density and the water percentage on growth rate, and the different properties of as-grown oxide films. Ellipsometry, FTIR, and SEM are employed to investigate various properties of the oxide films. A 5.25 Å/V growth rate is achieved in potentiostatic mode. In the case of potentiodynamic mode, 160 nm thickness is attained at 300 V. The oxide films developed in both modes are slightly silicon rich, uniform, and less porous. The present study is intended to inspect various properties which are considered for applications in MEMS and Microelectronics. PMID:24672287

All-optical switching of silicon disk resonator based on photothermal effect in metal-insulator-metal absorber.

PubMed

Shi, Yuechun; Chen, Xi; Lou, Fei; Chen, Yiting; Yan, Min; Wosinski, Lech; Qiu, Min

2014-08-01

Efficient narrowband light absorption by a metal-insulator-metal (MIM) structure can lead to high-speed light-to-heat conversion at a micro- or nanoscale. Such a MIM structure can serve as a heater for achieving all-optical light control based on the thermo-optical (TO) effect. Here we experimentally fabricated and characterized a novel all-optical switch based on a silicon microdisk integrated with a MIM light absorber. Direct integration of the absorber on top of the microdisk reduces the thermal capacity of the whole device, leading to high-speed TO switching of the microdisk resonance. The measurement result exhibits a rise time of 2.0 μs and a fall time of 2.6 μs with switching power as low as 0.5 mW; the product of switching power and response time is only about 1.3  mW·μs. Since no auxiliary elements are required for the heater, the switch is structurally compact, and its fabrication is rather easy. The device potentially can be deployed for new kinds of all-optical applications.

Hybrid integration of III-V and silicon materials and devices

NASA Astrophysics Data System (ADS)

Luo, Zhongsheng

Laser liftoff (LLO) based hybrid integration techniques including the double-transfer process and the pixel-to-point transfer process have been developed to integrate III-V photonics with silicon materials and circuitry. No degradation in the device performance has been observed using the LLO based transfer techniques. On the contrary, performance improvements in both electrical characteristics and electroluminescence (EL) output have been found for the (In,Ga)N light emitting diodes (LEDs) transferred onto Si substrate. Based on computer simulation, it is found that as much as 70% enhancement in EL output could be expected by optimizing the metal layering on the backside of the transferred LEDs. In order to understand the existing experimental data and improve controllability and damage-free transfer yield of the LLO process, a novel, comprehensive LLO model based on thermal-mechanical analysis has been proposed and developed. The LLO model has been validated in the well-studied GaN/sapphire system. By employing the LLO based transfer technique, two optoelectronic systems have been designed and demonstrated. The first one is an integrated fluorescence microsystem, which involved the integration of Cd(S,Se) bandgap filters, (In,Ga)N LEDs, Poly(dimethylsiloxane) (PDMS) microfluidic channels with a pre-fabricated Si PIN photodiode chip. Prototypes with both one color (blue LED) excitation and two-color (blue and green LED) excitation have consistently demonstrated a detection capability of as low as 1 nM fluosphere beads using Molecular Probes FluoSpheresRTM dye. Furthermore, the feasibility of multi-wavelength design has been verified using the bi-wavelength prototype. To optimize signal-to-noise ratio and detection sensitivity of the microsystem via system design, an in-depth mathematic analysis has also been performed. The second application is a zero-footprint optical metrology wafer, which relies on the reflection at the optical detection window, through which important parameters such as thickness, refractive index and density of the film on top of the detecting window can be probed in a real-time and location-specific manner. A novel methodology has been developed to ensure accurate and precise measurement across the wafer. A prototype wafer with 3x3 metrology cells has been prototyped and calibrated using a SF6 plasma etching process of silicon oxide.

FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

NASA Astrophysics Data System (ADS)

Alexanian, H.; Appelquist, G.; Bailly, P.; Benetta, R.; Berglund, S.; Bezamat, J.; Blouzon, F.; Bohm, C.; Breveglieri, L.; Brigati, S.; Cattaneo, P. W.; Dadda, L.; David, J.; Engström, M.; Genat, J. F.; Givoletti, M.; Goggi, V. G.; Gong, S.; Grieco, G. M.; Hansen, M.; Hentzell, H.; Holmberg, T.; Höglund, I.; Inkinen, S. J.; Kerek, A.; Landi, C.; Ledortz, O.; Lippi, M.; Lofstedt, B.; Lund-Jensen, B.; Maloberti, F.; Mutz, S.; Nayman, P.; Piuri, V.; Polesello, G.; Sami, M.; Savoy-Navarro, A.; Schwemling, P.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Ödmark, A.; Fermi Collaboration

1995-02-01

We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed {A}/{D} converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design.

Optical biosensor technologies for molecular diagnostics at the point-of-care

NASA Astrophysics Data System (ADS)

Schotter, Joerg; Schrittwieser, Stefan; Muellner, Paul; Melnik, Eva; Hainberger, Rainer; Koppitsch, Guenther; Schrank, Franz; Soulantika, Katerina; Lentijo-Mozo, Sergio; Pelaz, Beatriz; Parak, Wolfgang; Ludwig, Frank; Dieckhoff, Jan

2015-05-01

Label-free optical schemes for molecular biosensing hold a strong promise for point-of-care applications in medical research and diagnostics. Apart from diagnostic requirements in terms of sensitivity, specificity, and multiplexing capability, also other aspects such as ease of use and manufacturability have to be considered in order to pave the way to a practical implementation. We present integrated optical waveguide as well as magnetic nanoparticle based molecular biosensor concepts that address these aspects. The integrated optical waveguide devices are based on low-loss photonic wires made of silicon nitride deposited by a CMOS compatible plasma-enhanced chemical vapor deposition (PECVD) process that allows for backend integration of waveguides on optoelectronic CMOS chips. The molecular detection principle relies on evanescent wave sensing in the 0.85 μm wavelength regime by means of Mach-Zehnder interferometers, which enables on-chip integration of silicon photodiodes and, thus, the realization of system-on-chip solutions. Our nanoparticle-based approach is based on optical observation of the dynamic response of functionalized magneticcore/ noble-metal-shell nanorods (`nanoprobes') to an externally applied time-varying magnetic field. As target molecules specifically bind to the surface of the nanoprobes, the observed dynamics of the nanoprobes changes, and the concentration of target molecules in the sample solution can be quantified. This approach is suitable for dynamic real-time measurements and only requires minimal sample preparation, thus presenting a highly promising point-of-care diagnostic system. In this paper, we present a prototype of a diagnostic device suitable for highly automated sample analysis by our nanoparticle-based approach.

Silicon photonics devices for metro applications

NASA Astrophysics Data System (ADS)

Fukuda, H.; Kikuchi, K.; Jizodo, M.; Kawamura, Y.; Takeda, K.; Honda, K.

2017-01-01

Digital coherent technology is considered an attractive way of realizing both high-speed metro links and long distance transmissions. In metro areas, there is a strong demand for a smaller, faster transceiver module. This demand is mainly driven by the rapidly increasing data center interconnection traffic, where transmission capacity per faceplane is a key feature. Therefore, optical integration technology is desired. Since compensation in digital coherent technology is performed in the electrical or digital domain, users can deal with those optics performances that are not compensated for digitally. This means using a new material that cannot provide perfect characteristics but that is suitable for miniaturization and integration is possible. Silicon photonics (SiPh) is considered an attractive technology that would enable the significant miniaturization of optical circuits and be capable of optical integration with high manufacturability. While SiPh-based devices have begun to be deployed for very short or short reach links on the basis of direct detection technology, their digital coherent applications have recently been investigated in view of their integration capability. This paper describes recent progress on SiPh-based integrated optical devices for high-speed digital coherent transceivers targeting metro links. An optical modulator and receiver with related circuits have been integrated into a single SiPh chip. TEC-free operation under non-hermetic conditions and the direct attachment of optical fibers have both been realized. Very thin and small packaging with sufficient performance has been demonstrated by using the SiPh chip co-packaged with high-speed ICs.

Direct glass bonded high specific power silicon solar cells for space applications

NASA Technical Reports Server (NTRS)

Dinetta, L. C.; Rand, J. A.; Cummings, J. R.; Lampo, S. M.; Shreve, K. P.; Barnett, Allen M.

1991-01-01

A lightweight, radiation hard, high performance, ultra-thin silicon solar cell is described that incorporates light trapping and a cover glass as an integral part of the device. The manufacturing feasibility of high specific power, radiation insensitive, thin silicon solar cells was demonstrated experimentally and with a model. Ultra-thin, light trapping structures were fabricated and the light trapping demonstrated experimentally. The design uses a micro-machined, grooved back surface to increase the optical path length by a factor of 20. This silicon solar cell will be highly tolerant to radiation because the base width is less than 25 microns making it insensitive to reduction in minority carrier lifetime. Since the silicon is bonded without silicone adhesives, this solar cell will also be insensitive to UV degradation. These solar cells are designed as a form, fit, and function replacement for existing state of the art silicon solar cells with the effect of simultaneously increasing specific power, power/area, and power supply life. Using a 3-mil thick cover glass and a 0.3 g/sq cm supporting Al honeycomb, a specific power for the solar cell plus cover glass and honeycomb of 80.2 W/Kg is projected. The development of this technology can result in a revolutionary improvement in high survivability silicon solar cell products for space with the potential to displace all existing solar cell technologies for single junction space applications.

The 17th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Mcdonald, R. R.

1981-01-01

Progress made by the Low-Cost Solar Array Project during the period September 1980 to February 1981 is described. Included are reports on project analysis and integration; technology development in silicon material, large-area silicon sheet and encapsulation; production process and equipment development; engineering, and operations. A report on and copies of visual presentations made at the Project Integration Meeting held at Pasadena, California on February 4 and 5, 1981 are also included.

Alternative process for thin layer etching: Application to nitride spacer etching stopping on silicon germanium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Posseme, N., E-mail: nicolas.posseme@cea.fr; Pollet, O.; Barnola, S.

2014-08-04

Silicon nitride spacer etching realization is considered today as one of the most challenging of the etch process for the new devices realization. For this step, the atomic etch precision to stop on silicon or silicon germanium with a perfect anisotropy (no foot formation) is required. The situation is that none of the current plasma technologies can meet all these requirements. To overcome these issues and meet the highly complex requirements imposed by device fabrication processes, we recently proposed an alternative etching process to the current plasma etch chemistries. This process is based on thin film modification by light ionsmore » implantation followed by a selective removal of the modified layer with respect to the non-modified material. In this Letter, we demonstrate the benefit of this alternative etch method in term of film damage control (silicon germanium recess obtained is less than 6 A), anisotropy (no foot formation), and its compatibility with other integration steps like epitaxial. The etch mechanisms of this approach are also addressed.« less

Performance study of double SOI image sensors

NASA Astrophysics Data System (ADS)

Miyoshi, T.; Arai, Y.; Fujita, Y.; Hamasaki, R.; Hara, K.; Ikegami, Y.; Kurachi, I.; Nishimura, R.; Ono, S.; Tauchi, K.; Tsuboyama, T.; Yamada, M.

2018-02-01

Double silicon-on-insulator (DSOI) sensors composed of two thin silicon layers and one thick silicon layer have been developed since 2011. The thick substrate consists of high resistivity silicon with p-n junctions while the thin layers are used as SOI-CMOS circuitry and as shielding to reduce the back-gate effect and crosstalk between the sensor and the circuitry. In 2014, a high-resolution integration-type pixel sensor, INTPIX8, was developed based on the DSOI concept. This device is fabricated using a Czochralski p-type (Cz-p) substrate in contrast to a single SOI (SSOI) device having a single thin silicon layer and a Float Zone p-type (FZ-p) substrate. In the present work, X-ray spectra of both DSOI and SSOI sensors were obtained using an Am-241 radiation source at four gain settings. The gain of the DSOI sensor was found to be approximately three times that of the SSOI device because the coupling capacitance is reduced by the DSOI structure. An X-ray imaging demonstration was also performed and high spatial resolution X-ray images were obtained.

High speed analog-to-digital conversion with silicon photonics

NASA Astrophysics Data System (ADS)

Holzwarth, C. W.; Amatya, R.; Araghchini, M.; Birge, J.; Byun, H.; Chen, J.; Dahlem, M.; DiLello, N. A.; Gan, F.; Hoyt, J. L.; Ippen, E. P.; Kärtner, F. X.; Khilo, A.; Kim, J.; Kim, M.; Motamedi, A.; Orcutt, J. S.; Park, M.; Perrott, M.; Popovic, M. A.; Ram, R. J.; Smith, H. I.; Zhou, G. R.; Spector, S. J.; Lyszczarz, T. M.; Geis, M. W.; Lennon, D. M.; Yoon, J. U.; Grein, M. E.; Schulein, R. T.; Frolov, S.; Hanjani, A.; Shmulovich, J.

2009-02-01

Sampling rates of high-performance electronic analog-to-digital converters (ADC) are fundamentally limited by the timing jitter of the electronic clock. This limit is overcome in photonic ADC's by taking advantage of the ultra-low timing jitter of femtosecond lasers. We have developed designs and strategies for a photonic ADC that is capable of 40 GSa/s at a resolution of 8 bits. This system requires a femtosecond laser with a repetition rate of 2 GHz and timing jitter less than 20 fs. In addition to a femtosecond laser this system calls for the integration of a number of photonic components including: a broadband modulator, optical filter banks, and photodetectors. Using silicon-on-insulator (SOI) as the platform we have fabricated these individual components. The silicon optical modulator is based on a Mach-Zehnder interferometer architecture and achieves a VπL of 2 Vcm. The filter banks comprise 40 second-order microring-resonator filters with a channel spacing of 80 GHz. For the photodetectors we are exploring ion-bombarded silicon waveguide detectors and germanium films epitaxially grown on silicon utilizing a process that minimizes the defect density.

Performance and Transient Behavior of Vertically Integrated Thin-film Silicon Sensors

PubMed Central

Wyrsch, Nicolas; Choong, Gregory; Miazza, Clément; Ballif, Christophe

2008-01-01

Vertical integration of amorphous hydrogenated silicon diodes on CMOS readout chips offers several advantages compared to standard CMOS imagers in terms of sensitivity, dynamic range and dark current while at the same time introducing some undesired transient effects leading to image lag. Performance of such sensors is here reported and their transient behaviour is analysed and compared to the one of corresponding amorphous silicon test diodes deposited on glass. The measurements are further compared to simulations for a deeper investigation. The long time constant observed in dark or photocurrent decay is found to be rather independent of the density of defects present in the intrinsic layer of the amorphous silicon diode. PMID:27873778

Chemical Interaction-Guided, Metal-Free Growth of Large-Area Hexagonal Boron Nitride on Silicon-Based Substrates.

PubMed

Behura, Sanjay; Nguyen, Phong; Debbarma, Rousan; Che, Songwei; Seacrist, Michael R; Berry, Vikas

2017-05-23

Hexagonal boron nitride (h-BN) is an ideal platform for interfacing with two-dimensional (2D) nanomaterials to reduce carrier scattering for high-quality 2D electronics. However, scalable, transfer-free growth of hexagonal boron nitride (h-BN) remains a challenge. Currently, h-BN-based 2D heterostructures require exfoliation or chemical transfer of h-BN grown on metals resulting in small areas or significant interfacial impurities. Here, we demonstrate a surface-chemistry-influenced transfer-free growth of large-area, uniform, and smooth h-BN directly on silicon (Si)-based substrates, including Si, silicon nitride (Si 3 N 4 ), and silicon dioxide (SiO 2 ), via low-pressure chemical vapor deposition. The growth rates increase with substrate electronegativity, Si < Si 3 N 4 < SiO 2 , consistent with the adsorption rates calculated for the precursor molecules via atomistic molecular dynamics simulations. Under graphene with high grain density, this h-BN film acts as a polymer-free, planar-dielectric interface increasing carrier mobility by 3.5-fold attributed to reduced surface roughness and charged impurities. This single-step, chemical interaction guided, metal-free growth mechanism of h-BN for graphene heterostructures establishes a potential pathway for the design of complex and integrated 2D-heterostructured circuitry.

Porous silicon-VO{sub 2} based hybrids as possible optical temperature sensor: Wavelength-dependent optical switching from visible to near-infrared range

DOE Office of Scientific and Technical Information (OSTI.GOV)

Antunez, E. E.; Salazar-Kuri, U.; Estevez, J. O.

Morphological properties of thermochromic VO{sub 2}—porous silicon based hybrids reveal the growth of well-crystalized nanometer-scale features of VO{sub 2} as compared with typical submicron granular structure obtained in thin films deposited on flat substrates. Structural characterization performed as a function of temperature via grazing incidence X-ray diffraction and micro-Raman demonstrate reversible semiconductor-metal transition of the hybrid, changing from a low-temperature monoclinic VO{sub 2}(M) to a high-temperature tetragonal rutile VO{sub 2}(R) crystalline structure, coupled with a decrease in phase transition temperature. Effective optical response studied in terms of red/blue shift of the reflectance spectra results in a wavelength-dependent optical switching withmore » temperature. As compared to VO{sub 2} film over crystalline silicon substrate, the hybrid structure is found to demonstrate up to 3-fold increase in the change of reflectivity with temperature, an enlarged hysteresis loop and a wider operational window for its potential application as an optical temperature sensor. Such silicon based hybrids represent an exciting class of functional materials to display thermally triggered optical switching culminated by the characteristics of each of the constituent blocks as well as device compatibility with standard integrated circuit technology.« less

Optical MEMS platform for low-cost on-chip integration of planar light circuits and optical switching

NASA Astrophysics Data System (ADS)

German, Kristine A.; Kubby, Joel; Chen, Jingkuang; Diehl, James; Feinberg, Kathleen; Gulvin, Peter; Herko, Larry; Jia, Nancy; Lin, Pinyen; Liu, Xueyuan; Ma, Jun; Meyers, John; Nystrom, Peter; Wang, Yao Rong

2004-07-01

Xerox Corporation has developed a technology platform for on-chip integration of latching MEMS optical waveguide switches and Planar Light Circuit (PLC) components using a Silicon On Insulator (SOI) based process. To illustrate the current state of this new technology platform, working prototypes of a Reconfigurable Optical Add/Drop Multiplexer (ROADM) and a l-router will be presented along with details of the integrated latching MEMS optical switches. On-chip integration of optical switches and PLCs can greatly reduce the size, manufacturing cost and operating cost of multi-component optical equipment. It is anticipated that low-cost, low-overhead optical network products will accelerate the migration of functions and services from high-cost long-haul markets to price sensitive markets, including networks for metropolitan areas and fiber to the home. Compared to the more common silica-on-silicon PLC technology, the high index of refraction of silicon waveguides created in the SOI device layer enables miniaturization of optical components, thereby increasing yield and decreasing cost projections. The latching SOI MEMS switches feature moving waveguides, and are advantaged across multiple attributes relative to alternative switching technologies, such as thermal optical switches and polymer switches. The SOI process employed was jointly developed under the auspice of the NIST APT program in partnership with Coventor, Corning IntelliSense Corp., and MicroScan Systems to enable fabrication of a broad range of free space and guided wave MicroOptoElectroMechanical Systems (MOEMS).

Analysis and design of tunable wideband microwave photonics phase shifter based on Fabry-Perot cavity and Bragg mirrors in silicon-on-insulator waveguide.

PubMed

Qu, Pengfei; Zhou, Jingran; Chen, Weiyou; Li, Fumin; Li, Haibin; Liu, Caixia; Ruan, Shengping; Dong, Wei

2010-04-20

We designed a microwave (MW) photonics phase shifter, consisting of a Fabry-Perot filter, a phase modulation region (PMR), and distributed Bragg reflectors, in a silicon-on-insulator rib waveguide. The thermo-optics effect was employed to tune the PMR. It was theoretically demonstrated that the linear MW phase shift of 0-2pi could be achieved by a refractive index variation of 0-9.68x10(-3) in an ultrawideband (about 38?GHz-1.9?THz), and the corresponding tuning resolution was about 6.92 degrees / degrees C. The device had a very compact size. It could be easily integrated in silicon optoelectronic chips and expected to be widely used in the high-frequency MW photonics field.

Frequency non-degenerate phase-sensitive optical parametric amplification based on four-wave-mixing in width-modulated silicon waveguides.

PubMed

Wang, Zhaolu; Liu, Hongjun; Sun, Qibing; Huang, Nan; Li, Xuefeng

2014-12-15

A width-modulated silicon waveguide is proposed to realize non-degenerate phase sensitive optical parametric amplification. It is found that the relative phase at the input of the phase sensitive amplifier (PSA) θIn-PSA can be tuned by tailoring the width and length of the second segment of the width-modulated silicon waveguide, which will influence the gain in the parametric amplification process. The maximum gain of PSA is larger by 9 dB compared with the phase insensitive amplifier (PIA) gain, and the gain bandwidth of PSA is larger by 35 nm compared with the gain bandwidth of PIA. Our on-chip PSA can find important potential applications in highly integrated optical circuits for optical chip-to-chip communication and computers.

First results on label-free detection of DNA and protein molecules using a novel integrated sensor technology based on gravimetric detection principles.

PubMed

Gabl, R; Feucht, H-D; Zeininger, H; Eckstein, G; Schreiter, M; Primig, R; Pitzer, D; Wersing, W

2004-01-15

A novel integrated bio-sensor technology based on thin-film bulk acoustic wave resonators on silicon is presented and the feasibility of detecting DNA and protein molecules proofed. The detection principle of these sensors is label-free and relies on a resonance frequency shift caused by mass loading of an acoustic resonator, a principle very well known from quartz crystal micro balances. Integrated ZnO bulk acoustic wave resonators with resonance frequencies around 2 GHz have been fabricated, employing an acoustic mirror for isolation from the silicon substrate. DNA oligos have been thiol-coupled to the gold electrode by on-wafer dispensing. In a further step, samples have either been hybridised or alternatively a protein has been coupled to the receptor. The measurement results show the new bio-sensor being capable of both, detecting proteins as well as the DNA hybridisation without using a label. Due to the substantially higher oscillation frequency, these sensors already show much higher sensitivity and resolution comparable to quartz crystal micro balances. The potential for these sensors and sensors arrays as well as technological challenges will be discussed in detail.

Monolithic integration of fine cylindrical glass microcapillaries on silicon for electrophoretic separation of biomolecules

PubMed Central

Cao, Zhen; Ren, Kangning; Wu, Hongkai; Yobas, Levent

2012-01-01

We demonstrate monolithic integration of fine cylindrical glass microcapillaries (diameter ∼1 μm) on silicon and evaluate their performance for electrophoretic separation of biomolecules. Such microcapillaries are achieved through thermal reflow of a glass layer on microstructured silicon whereby slender voids are moulded into cylindrical tubes. The process allows self-enclosed microcapillaries with a uniform profile. A simplified method is also described to integrate the microcapillaries with a sample-injection cross without the requirement of glass etching. The 10-mm-long microcapillaries sustain field intensities up to 90 kV/m and limit the temperature excursions due to Joule heating to a few degrees Celsius only. PMID:23874369

Review of silicon photonics: history and recent advances

NASA Astrophysics Data System (ADS)

Ye, Winnie N.; Xiong, Yule

2013-09-01

Silicon photonics has attracted tremendous attention and research effort as a promising technology in optoelectronic integration for computing, communications, sensing, and solar harvesting. Mainly due to the combination of its excellent material properties and the complementary metal-oxide semiconductor (CMOS) fabrication processing technology, silicon has becoming the material choice for photonic and optoelectronic circuits with low cost, ultra-compact device footprint, and high-density integration. This review paper provides an overview on silicon photonics, by highlighting the early work from the mid-1980s on the fundamental building blocks such as silicon platforms and waveguides, and the main milestones that have been achieved so far in the field. A summary of reported work on functional elements in both passive and active devices, as well as the applications of the technology in interconnect, sensing, and solar cells, is identified.

Silicon Integrated Optics: Fabrication and Characterization

NASA Astrophysics Data System (ADS)

Shearn, Michael Joseph, II

For decades, the microelectronics industry has sought integration and miniaturization as canonized in Moore's Law, and has continued doubling transistor density about every two years. However, further miniaturization of circuit elements is creating a bandwidth problem as chip interconnect wires shrink as well. A potential solution is the creation of an on-chip optical network with low delays that would be impossible to achieve using metal buses. However, this technology requires integrating optics with silicon microelectronics. The lack of efficient silicon optical sources has stymied efforts of an all-Si optical platform. Instead, the integration of efficient emitter materials, such as III-V semiconductors, with Si photonic structures is a low-cost, CMOS-compatible alternative platform. This thesis focuses on making and measuring on-chip photonic structures suitable for on-chip optical networking. The first part of the thesis assesses processing techniques of silicon and other semiconductor materials. Plasmas for etching and surface modification are described and used to make bonded, hybrid Si/III-V structures. Additionally, a novel masking method using gallium implantation into silicon for pattern definition is characterized. The second part of the thesis focuses on demonstrations of fabricated optical structures. A dense array of silicon devices is measured, consisting of fully-etched grating couplers, low-loss waveguides and ring resonators. Finally, recent progress in the Si/III-V hybrid system is discussed. Supermode control of devices is described, which uses changing Si waveguide width to control modal overlap with the gain material. Hybrid Si/III-V, Fabry-Perot evanescent lasers are demonstrated, utilizing a CMOS-compatible process suitable for integration on in electronics platforms. Future prospects and ultimate limits of Si devices and the hybrid Si/III-V system are also considered.

Photonic integrated Mach-Zehnder interferometer with an on-chip reference arm for optical coherence tomography

PubMed Central

Yurtsever, Günay; Považay, Boris; Alex, Aneesh; Zabihian, Behrooz; Drexler, Wolfgang; Baets, Roel

2014-01-01

Optical coherence tomography (OCT) is a noninvasive, three-dimensional imaging modality with several medical and industrial applications. Integrated photonics has the potential to enable mass production of OCT devices to significantly reduce size and cost, which can increase its use in established fields as well as enable new applications. Using silicon nitride (Si3N4) and silicon dioxide (SiO2) waveguides, we fabricated an integrated interferometer for spectrometer-based OCT. The integrated photonic circuit consists of four splitters and a 190 mm long reference arm with a foot-print of only 10 × 33 mm2. It is used as the core of a spectral domain OCT system consisting of a superluminescent diode centered at 1320 nm with 100 nm bandwidth, a spectrometer with 1024 channels, and an x-y scanner. The sensitivity of the system was measured at 0.25 mm depth to be 65 dB with 0.1 mW on the sample. Using the system, we imaged human skin in vivo. With further optimization in design and fabrication technology, Si3N4/SiO2 waveguides have a potential to serve as a platform for passive photonic integrated circuits for OCT. PMID:24761288

Ultrafast all-optical arithmetic logic based on hydrogenated amorphous silicon microring resonators

NASA Astrophysics Data System (ADS)

Gostimirovic, Dusan; Ye, Winnie N.

2016-03-01

For decades, the semiconductor industry has been steadily shrinking transistor sizes to fit more performance into a single silicon-based integrated chip. This technology has become the driving force for advances in education, transportation, and health, among others. However, transistor sizes are quickly approaching their physical limits (channel lengths are now only a few silicon atoms in length), and Moore's law will likely soon be brought to a stand-still despite many unique attempts to keep it going (FinFETs, high-k dielectrics, etc.). This technology must then be pushed further by exploring (almost) entirely new methodologies. Given the explosive growth of optical-based long-haul telecommunications, we look to apply the use of high-speed optics as a substitute to the digital model; where slow, lossy, and noisy metal interconnections act as a major bottleneck to performance. We combine the (nonlinear) optical Kerr effect with a single add-drop microring resonator to perform the fundamental AND-XOR logical operations of a half adder, by all-optical means. This process is also applied to subtraction, higher-order addition, and the realization of an all-optical arithmetic logic unit (ALU). The rings use hydrogenated amorphous silicon as a material with superior nonlinear properties to crystalline silicon, while still maintaining CMOS-compatibility and the many benefits that come with it (low cost, ease of fabrication, etc.). Our method allows for multi-gigabit-per-second data rates while maintaining simplicity and spatial minimalism in design for high-capacity manufacturing potential.

Silicon nanowires reliability and robustness investigation using AFM-based techniques

NASA Astrophysics Data System (ADS)

Bieniek, Tomasz; Janczyk, Grzegorz; Janus, Paweł; Grabiec, Piotr; Nieprzecki, Marek; Wielgoszewski, Grzegorz; Moczała, Magdalena; Gotszalk, Teodor; Buitrago, Elizabeth; Badia, Montserrat F.; Ionescu, Adrian M.

2013-07-01

Silicon nanowires (SiNWs) have undergone intensive research for their application in novel integrated systems such as field effect transistor (FET) biosensors and mass sensing resonators profiting from large surface-to-volume ratios (nano dimensions). Such devices have been shown to have the potential for outstanding performances in terms of high sensitivity, selectivity through surface modification and unprecedented structural characteristics. This paper presents the results of mechanical characterization done for various types of suspended SiNWs arranged in a 3D array. The characterization has been performed using techniques based on atomic force microscopy (AFM). This investigation is a necessary prerequisite for the reliable and robust design of any biosensing system. This paper also describes the applied investigation methodology and reports measurement results aggregated during series of AFM-based tests.

Polarization Converter with Controllable Birefringence Based on Hybrid All-Dielectric-Graphene Metasurface

NASA Astrophysics Data System (ADS)

Owiti, Edgar O.; Yang, Hanning; Liu, Peng; Ominde, Calvine F.; Sun, Xiudong

2018-02-01

Previous studies on hybrid dielectric-graphene metasurfaces have been used to implement induced transparency devices, while exhibiting high Q-factors based on trapped magnetic resonances. Typically, the transparency windows are single wavelength and less appropriate for polarization conversion structures. In this work, a quarter-wave plate based on a hybrid silicon-graphene metasurface with controllable birefringence is numerically designed. The phenomena of trapped magnetic mode resonance and high Q-factors are modulated by inserting graphene between silicon and silica. This results in a broader transmission wavelength in comparison to the all-dielectric structure without graphene. The birefringence tunability is based on the dimensions of silicon and the Fermi energy of graphene. Consequently, a linear-to-circular polarization conversion is achieved at a high degree of 96%, in the near-infrared. Moreover, the polarization state of the scattered light is switchable between right and left hand circular polarizations, based on an external gate biasing voltage. Unlike in plasmonic metasurfaces, these achievements demonstrate an efficient structure that is free from radiative and ohmic losses. Furthermore, the ultrathin thickness and the compactness of the structure are demonstrated as key components in realizing integrable and CMOS compatible photonic sensors.

Polarization Converter with Controllable Birefringence Based on Hybrid All-Dielectric-Graphene Metasurface.

PubMed

Owiti, Edgar O; Yang, Hanning; Liu, Peng; Ominde, Calvine F; Sun, Xiudong

2018-02-03

Previous studies on hybrid dielectric-graphene metasurfaces have been used to implement induced transparency devices, while exhibiting high Q-factors based on trapped magnetic resonances. Typically, the transparency windows are single wavelength and less appropriate for polarization conversion structures. In this work, a quarter-wave plate based on a hybrid silicon-graphene metasurface with controllable birefringence is numerically designed. The phenomena of trapped magnetic mode resonance and high Q-factors are modulated by inserting graphene between silicon and silica. This results in a broader transmission wavelength in comparison to the all-dielectric structure without graphene. The birefringence tunability is based on the dimensions of silicon and the Fermi energy of graphene. Consequently, a linear-to-circular polarization conversion is achieved at a high degree of 96%, in the near-infrared. Moreover, the polarization state of the scattered light is switchable between right and left hand circular polarizations, based on an external gate biasing voltage. Unlike in plasmonic metasurfaces, these achievements demonstrate an efficient structure that is free from radiative and ohmic losses. Furthermore, the ultrathin thickness and the compactness of the structure are demonstrated as key components in realizing integrable and CMOS compatible photonic sensors.

Silicon on-chip bandpass filters for the multiplexing of high sensitivity photonic crystal microcavity biosensors

PubMed Central

Chakravarty, Swapnajit; Yang, Chun-Ju; Wang, Zheng; Tang, Naimei; Fan, Donglei; Chen, Ray T.

2015-01-01

A method for the dense integration of high sensitivity photonic crystal (PC) waveguide based biosensors is proposed and experimentally demonstrated on a silicon platform. By connecting an additional PC waveguide filter to a PC microcavity sensor in series, a transmission passband is created, containing the resonances of the PC microcavity for sensing purpose. With proper engineering of the passband, multiple high sensitivity PC microcavity sensors can be integrated into microarrays and be interrogated simultaneously between a single input and a single output port. The concept was demonstrated with a 2-channel L55 PC biosensor array containing PC waveguide filters. The experiment showed that the sensors on both channels can be monitored simultaneously from a single output spectrum. Less than 3 dB extra loss for the additional PC waveguide filter is observed. PMID:25829549

Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

PubMed

Shang, Kuanping; Pathak, Shibnath; Guan, Binbin; Liu, Guangyao; Yoo, S J B

2015-08-10

We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 μm bending radius, 100 × 2 μm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

Integral bypass diodes in an amorphous silicon alloy photovoltaic module

NASA Technical Reports Server (NTRS)

Hanak, J. J.; Flaisher, H.

1991-01-01

Thin-film, tandem-junction, amorphous silicon (a-Si) photovoltaic modules were constructed in which a part of the a-Si alloy cell material is used to form bypass protection diodes. This integral design circumvents the need for incorporating external, conventional diodes, thus simplifying the manufacturing process and reducing module weight.

Flat Plate Solar Array Project: Proceedings of the 20th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Mcdonald, R. R.

1982-01-01

Progress made by the Flat-Plate Solar Array Project during the period November 1981 to April 1982 is reported. Project analysis and integration, technology research in silicon material, large-area silicon sheet and environmental isolation, cell and module formation, engineering sciences, and module performance and failure analysis are covered.

Progress Report 18 for the Period February to July 1981 and Proceeidngs of the 18th Project Integration Meeting

NASA Technical Reports Server (NTRS)

1981-01-01

Progress in the low cost solar array project during the period February to July 1981 is reported. Included are: (1) project analysis and integration; (2) technology development in silicon material, large area silicon sheer and encapsulation; (3) process development; (4) engineering, and operations.

Detector arrays for low-background space infrared astronomy

NASA Technical Reports Server (NTRS)

Mccreight, C. R.; Mckelvey, M. E.; Goebel, J. H.; Anderson, G. M.; Lee, J. H.

1986-01-01

The status of development and characterization tests of integrated infrared detector array technology for astronomy applications is described. The devices under development include intrinsic, extrinsic silicon, and extrinsic germanium detectors, with hybrid silicon multiplexers. Laboratory test results and successful astronomy imagery have established the usefulness of integrated arrays in low-background astronomy applications.

Detector arrays for low-background space infrared astronomy

NASA Technical Reports Server (NTRS)

Mccreight, C. R.; Mckelvey, M. E.; Goebel, J. H.; Anderson, G. M.; Lee, J. H.

1986-01-01

The status of development and characterization tests of integrated infrared detector array technology for astronomy applications is described. The devices under development include intrinsic, extrinsic silicon, and extrinsic germanium detectors, with hybrid silicon multiplexers. Laboratary test results and successful astronomy imagery have established the usefulness of integrated arrays in low-background astronomy applications.

Silicon Alignment Pins: An Easy Way to Realize a Wafer-to-Wafer Alignment

NASA Technical Reports Server (NTRS)

Jung-Kubiak, Cecile; Reck, Theodore J.; Lin, Robert H.; Peralta, Alejandro; Gill, John J.; Lee, Choonsup; Siles, Jose; Toda, Risaku; Chattopadhyay, Goutam; Cooper, Ken B.;

Rectangular-cladding silicon slot waveguide with improved nonlinear performance

NASA Astrophysics Data System (ADS)

Huang, Zengzhi; Huang, Qingzhong; Wang, Yi; Xia, Jinsong

2018-04-01

Silicon slot waveguides have great potential in hybrid silicon integration to realize nonlinear optical applications. We propose a rectangular-cladding hybrid silicon slot waveguide. Simulation result shows that, with a rectangular-cladding, the slot waveguide can be formed by narrower silicon strips, so the two-photon absorption (TPA) loss in silicon is decreased. When the cladding material is a nonlinear polymer, the calculated TPA figure of merit (FOMTPA) is 4.4, close to the value of bulk nonlinear polymer of 5.0. This value confirms the good nonlinear performance of rectangular-cladding silicon slot waveguides.

Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

DOEpatents

Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

1991-01-01

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

Proceedings of the 25th Project Integration Meeting

NASA Technical Reports Server (NTRS)

Phillips, M.

1985-01-01

Topics addressed include: silicon sheet growth and characterization, silicon material, process development, high-efficiency cells, environmental isolation, engineering sciences, and reliability physics.

Frequency-degenerate phase-sensitive optical parametric amplification based on four-wave mixing in graphene–silicon slot waveguide

NASA Astrophysics Data System (ADS)

Li, Zhen; Liu, Hongjun; Huang, Nan; Wang, Zhaolu; Han, Jing

2018-06-01

The phase-sensitive amplification process of a hybrid graphene–silicon (HyGS) slot waveguide with trilayers of graphene is investigated in this paper. Numerical simulation shows that a relatively high extinction ratio (42 dB) is achieved, because of the ultrahigh nonlinear coefficients, with a waveguide length of only 680 µm. In addition, the graphene layer provides the possibility of modulating the phase status and gain of the output signal. This study is expected to be highly beneficial to applications such as integrated optics and graphene-related active optical devices.

Advanced detectors and signal processing

NASA Technical Reports Server (NTRS)

Greve, D. W.; Rasky, P. H. L.; Kryder, M. H.

1986-01-01

Continued progress is reported toward development of a silicon on garnet technology which would allow fabrication of advanced detection and signal processing circuits on bubble memories. The first integrated detectors and propagation patterns have been designed and incorporated on a new mask set. In addition, annealing studies on spacer layers are performed. Based on those studies, a new double layer spacer is proposed which should reduce contamination of the silicon originating in the substrate. Finally, the magnetic sensitivity of uncontaminated detectors from the last lot of wafers is measured. The measured sensitivity is lower than anticipated but still higher than present magnetoresistive detectors.

Ultralow drive voltage silicon traveling-wave modulator.

PubMed

Baehr-Jones, Tom; Ding, Ran; Liu, Yang; Ayazi, Ali; Pinguet, Thierry; Harris, Nicholas C; Streshinsky, Matt; Lee, Poshen; Zhang, Yi; Lim, Andy Eu-Jin; Liow, Tsung-Yang; Teo, Selin Hwee-Gee; Lo, Guo-Qiang; Hochberg, Michael

2012-05-21

There has been great interest in the silicon platform as a material system for integrated photonics. A key challenge is the development of a low-power, low drive voltage, broadband modulator. Drive voltages at or below 1 Vpp are desirable for compatibility with CMOS processes. Here we demonstrate a CMOS-compatible broadband traveling-wave modulator based on a reverse-biased pn junction. We demonstrate operation with a drive voltage of 0.63 Vpp at 20 Gb/s, a significant improvement in the state of the art, with an RF energy consumption of only 200 fJ/bit.

Analysis of silicon on insulator (SOI) optical microring add-drop filter based on waveguide intersections

NASA Astrophysics Data System (ADS)

Kaźmierczak, Andrzej; Bogaerts, Wim; Van Thourhout, Dries; Drouard, Emmanuel; Rojo-Romeo, Pedro; Giannone, Domenico; Gaffiot, Frederic

2008-04-01

We present a compact passive optical add-drop filter which incorporates two microring resonators and a waveguide intersection in silicon-on-insulator (SOI) technology. Such a filter is a key element for designing simple layouts of highly integrated complex optical networks-on-chip. The filter occupies an area smaller than 10μm×10μm and exhibits relatively high quality factors (up to 4000) and efficient signal dropping capabilities. In the present work, the influence of filter parameters such as the microring-resonators radii and the coupling section shape are analyzed theoretically and experimentally

A silicon carbide array for electrocorticography and peripheral nerve recording.

PubMed

Diaz-Botia, C A; Luna, L E; Neely, R M; Chamanzar, M; Carraro, C; Carmena, J M; Sabes, P N; Maboudian, R; Maharbiz, M M

2017-10-01

Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

A silicon carbide array for electrocorticography and peripheral nerve recording

NASA Astrophysics Data System (ADS)

Diaz-Botia, C. A.; Luna, L. E.; Neely, R. M.; Chamanzar, M.; Carraro, C.; Carmena, J. M.; Sabes, P. N.; Maboudian, R.; Maharbiz, M. M.

2017-10-01

Objective. Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. Approach. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. Main results. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Significance. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

NRAM: a disruptive carbon-nanotube resistance-change memory.

PubMed

Gilmer, D C; Rueckes, T; Cleveland, L

2018-04-03

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

NRAM: a disruptive carbon-nanotube resistance-change memory

NASA Astrophysics Data System (ADS)

Gilmer, D. C.; Rueckes, T.; Cleveland, L.

2018-04-01

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

SiC JFET Transistor Circuit Model for Extreme Temperature Range

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2008-01-01

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Study on fabrication technology of silicon-based silica array waveguide grating

NASA Astrophysics Data System (ADS)

Sun, Yanjun; Dong, Lianhe; Leng, Yanbing

2009-05-01

Array waveguide grating (AWG) is an important plane optical element in dense wavelength division multiplex/demultiplex system. There are many virtue, channel quantity larger,lower loss, lower crosstalk, size smaller and high reliability etc. This article describs AWG fabrication technics utilizing IC(Integrated Circles) techniques, based on sixteen channel Silicon-Based Silica Array Waveguide Grating, put emphasis on discussing doping and deposition of waveguide core film,technics theory and interrelated parameter condition of photoetch and ion etching. Experiment result indicates that it depens on electrode structure, energy of radio-frequency electrode gas component, pressure ,flowing speed and substrate temperature by CVD depositing film .During depositing waveguide film by PE-CVD, the silicon is not reacted, When temperature becomes lower,it is reacted and it is easy to realize the control of film thickness and time with a result of film thickness uniformity reaching about 4% after optimizing deposition parameter and condition. We get the result of high etching speed rate, outline zoom, and side frame smooth by photoresist/Cr multiple mask and optimizing etching technics.

Development of slew-rate-limited time-over-threshold (ToT) ASIC for a multi-channel silicon-based ion detector

NASA Astrophysics Data System (ADS)

Uenomachi, M.; Orita, T.; Shimazoe, K.; Takahashi, H.; Ikeda, H.; Tsujita, K.; Sekiba, D.

2018-01-01

High-resolution Elastic Recoil Detection Analysis (HERDA), which consists of a 90o sector magnetic spectrometer and a position-sensitive detector (PSD), is a method of quantitative hydrogen analysis. In order to increase sensitivity, a HERDA system using a multi-channel silicon-based ion detector has been developed. Here, as a parallel and fast readout circuit from a multi-channel silicon-based ion detector, a slew-rate-limited time-over-threshold (ToT) application-specific integrated circuit (ASIC) was designed, and a new slew-rate-limited ToT method is proposed. The designed ASIC has 48 channels and each channel consists of a preamplifier, a slew-rate-limited shaping amplifier, which makes ToT response linear, and a comparator. The measured equivalent noise charges (ENCs) of the preamplifier, the shaper, and the ToT on no detector capacitance were 253±21, 343±46, and 560±56 electrons RMS, respectively. The spectra from a 241Am source measured using a slew-rate-limited ToT ASIC are also reported.

Optical modulation techniques for analog signal processing and CMOS compatible electro-optic modulation

NASA Astrophysics Data System (ADS)

Gill, Douglas M.; Rasras, Mahmoud; Tu, Kun-Yii; Chen, Young-Kai; White, Alice E.; Patel, Sanjay S.; Carothers, Daniel; Pomerene, Andrew; Kamocsai, Robert; Beattie, James; Kopa, Anthony; Apsel, Alyssa; Beals, Mark; Mitchel, Jurgen; Liu, Jifeng; Kimerling, Lionel C.

2008-02-01

Integrating electronic and photonic functions onto a single silicon-based chip using techniques compatible with mass-production CMOS electronics will enable new design paradigms for existing system architectures and open new opportunities for electro-optic applications with the potential to dramatically change the management, cost, footprint, weight, and power consumption of today's communication systems. While broadband analog system applications represent a smaller volume market than that for digital data transmission, there are significant deployments of analog electro-optic systems for commercial and military applications. Broadband linear modulation is a critical building block in optical analog signal processing and also could have significant applications in digital communication systems. Recently, broadband electro-optic modulators on a silicon platform have been demonstrated based on the plasma dispersion effect. The use of the plasma dispersion effect within a CMOS compatible waveguide creates new challenges and opportunities for analog signal processing since the index and propagation loss change within the waveguide during modulation. We will review the current status of silicon-based electrooptic modulators and also linearization techniques for optical modulation.

Multilayered photonic integration on SOI platform using waveguide-based bridge structure

NASA Astrophysics Data System (ADS)

Majumder, Saikat; Chakraborty, Rajib

2018-06-01

A waveguide based structure on silicon on insulator platform is proposed for vertical integration in photonic integrated circuits. The structure consists of two multimode interference couplers connected by a single mode (SM) section which can act as a bridge over any other underlying device. Two more SM sections acts as input and output of the first and second multimode couplers respectively. Potential application of this structure is in multilayered photonic links. It is shown that the efficiency of the structure can be improved by making some design modifications. The entire simulation is done using effective-index based matrix method. The feature size chosen are comparable to waveguides fabricated previously so as to fabricate the proposed structure easily.

The CMS High Granularity Calorimeter for the High Luminosity LHC

NASA Astrophysics Data System (ADS)

Sauvan, J.-B.

2018-02-01

The High Luminosity LHC (HL-LHC) will integrate 10 times more luminosity than the LHC, posing significant challenges for radiation tolerance and event pileup on detectors, especially for forward calorimetry, and hallmarks the issue for future colliders. As part of its HL-LHC upgrade program, the CMS collaboration is designing a High Granularity Calorimeter to replace the existing endcap calorimeters. It features unprecedented transverse and longitudinal segmentation for both electromagnetic (ECAL) and hadronic (HCAL) compartments. This will facilitate particle-flow calorimetry, where the fine structure of showers can be measured and used to enhance pileup rejection and particle identification, whilst still achieving good energy resolution. The ECAL and a large fraction of HCAL will be based on hexagonal silicon sensors of 0.5-1 cm2 cell size, with the remainder of the HCAL based on highly-segmented scintillators with silicon photomultiplier (SiPM) readout. The intrinsic high-precision timing capabilities of the silicon sensors will add an extra dimension to event reconstruction, especially in terms of pileup rejection.

Monolithic Integration of a Silicon Nanowire Field-Effect Transistors Array on a Complementary Metal-Oxide Semiconductor Chip for Biochemical Sensor Applications

PubMed Central

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2017-01-01

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I−V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs. PMID:26348408

Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

PubMed

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2015-10-06

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

A single active nanoelectromechanical tuning fork front-end radio-frequency receiver

NASA Astrophysics Data System (ADS)

Bartsch, Sebastian T.; Rusu, A.; Ionescu, Adrian M.

2012-06-01

Nanoelectromechanical systems (NEMS) offer the potential to revolutionize fundamental methods employed for signal processing in today’s telecommunication systems, owing to their spectral purity and the prospect of integration with existing technology. In this work we present a novel, front-end receiver topology based on a single device silicon nanoelectromechanical mixer-filter. The operation is demonstrated by using the signal amplification in a field effect transistor (FET) merged into a tuning fork resonator. The combination of both a transistor and a mechanical element into a hybrid unit enables on-chip functionality and performance previously unachievable in silicon. Signal mixing, filtering and demodulation are experimentally demonstrated at very high frequencies ( > 100 MHz), maintaining a high quality factor of Q = 800 and stable operation at near ambient pressure (0.1 atm) and room temperature (T = 300 K). The results show that, ultimately miniaturized, silicon NEMS can be utilized to realize multi-band, single-chip receiver systems based on NEMS mixer-filter arrays with reduced system complexity and power consumption.

Biosensor system-on-a-chip including CMOS-based signal processing circuits and 64 carbon nanotube-based sensors for the detection of a neurotransmitter.

PubMed

Lee, Byung Yang; Seo, Sung Min; Lee, Dong Joon; Lee, Minbaek; Lee, Joohyung; Cheon, Jun-Ho; Cho, Eunju; Lee, Hyunjoong; Chung, In-Young; Park, Young June; Kim, Suhwan; Hong, Seunghun

2010-04-07

We developed a carbon nanotube (CNT)-based biosensor system-on-a-chip (SoC) for the detection of a neurotransmitter. Here, 64 CNT-based sensors were integrated with silicon-based signal processing circuits in a single chip, which was made possible by combining several technological breakthroughs such as efficient signal processing, uniform CNT networks, and biocompatible functionalization of CNT-based sensors. The chip was utilized to detect glutamate, a neurotransmitter, where ammonia, a byproduct of the enzymatic reaction of glutamate and glutamate oxidase on CNT-based sensors, modulated the conductance signals to the CNT-based sensors. This is a major technological advancement in the integration of CNT-based sensors with microelectronics, and this chip can be readily integrated with larger scale lab-on-a-chip (LoC) systems for various applications such as LoC systems for neural networks.

Cost-effective method of manufacturing a 3D MEMS optical switch

NASA Astrophysics Data System (ADS)

Carr, Emily; Zhang, Ping; Keebaugh, Doug; Chau, Kelvin

2009-02-01

growth of data and video transport networks. All-optical switching eliminates the need for optical-electrical conversion offering the ability to switch optical signals transparently: independent of data rates, formats and wavelength. It also provides network operators much needed automation capabilities to create, monitor and protect optical light paths. To further accelerate the market penetration, it is necessary to identify a path to reduce the manufacturing cost significantly as well as enhance the overall system performance, uniformity and reliability. Currently, most MEMS optical switches are assembled through die level flip-chip bonding with either epoxies or solder bumps. This is due to the alignment accuracy requirements of the switch assembly, defect matching of individual die, and cost of the individual components. In this paper, a wafer level assembly approach is reported based on silicon fusion bonding which aims to reduce the packaging time, defect count and cost through volume production. This approach is successfully demonstrated by the integration of two 6-inch wafers: a mirror array wafer and a "snap-guard" wafer, which provides a mechanical structure on top of the micromirror to prevent electrostatic snap-down. The direct silicon-to-silicon bond eliminates the CTEmismatch and stress issues caused by non-silicon bonding agents. Results from a completed integrated switch assembly will be presented, which demonstrates the reliability and uniformity of some key parameters of this MEMS optical switch.

Integration of silicon-based neural probes and micro-drive arrays for chronic recording of large populations of neurons in behaving animals

NASA Astrophysics Data System (ADS)

Michon, Frédéric; Aarts, Arno; Holzhammer, Tobias; Ruther, Patrick; Borghs, Gustaaf; McNaughton, Bruce; Kloosterman, Fabian

2016-08-01

Objective. Understanding how neuronal assemblies underlie cognitive function is a fundamental question in system neuroscience. It poses the technical challenge to monitor the activity of populations of neurons, potentially widely separated, in relation to behaviour. In this paper, we present a new system which aims at simultaneously recording from a large population of neurons from multiple separated brain regions in freely behaving animals. Approach. The concept of the new device is to combine the benefits of two existing electrophysiological techniques, i.e. the flexibility and modularity of micro-drive arrays and the high sampling ability of electrode-dense silicon probes. Main results. Newly engineered long bendable silicon probes were integrated into a micro-drive array. The resulting device can carry up to 16 independently movable silicon probes, each carrying 16 recording sites. Populations of neurons were recorded simultaneously in multiple cortical and/or hippocampal sites in two freely behaving implanted rats. Significance. Current approaches to monitor neuronal activity either allow to flexibly record from multiple widely separated brain regions (micro-drive arrays) but with a limited sampling density or to provide denser sampling at the expense of a flexible placement in multiple brain regions (neural probes). By combining these two approaches and their benefits, we present an alternative solution for flexible and simultaneous recordings from widely distributed populations of neurons in freely behaving rats.

Ring-patterned plasmonic photonic crystal thermal light source for miniaturized near-infrared spectrometers

NASA Astrophysics Data System (ADS)

Labib, Shady R.; Elsayed, Ahmed A.; Sabry, Yasser M.; Khalil, Diaa

2018-02-01

There is a growing number of spectroscopy applications in the near-infrared (NIR) range including gas sensing, food analysis, pharmaceutical and industrial applications that requires highly efficient, more compact and low-cost miniaturized spectrometers. One of the key components for such systems is the wideband light source that can be fabricated using Silicon technology and hence integrated with other components on the same chip. In this work, we report a ring-patterned plasmonic photonic crystal (PC) thermal light source for miniaturized near-infrared spectrometers. The design is based on silicon and tuned to achieve wavelength selectivity in the emitted spectrum. The design is optimized by using Rigorous Coupled-Wave Analysis (RCWA) simulation, which is used to compute the power reflectance and transmittance that are used to predict the emissivity of the structure. The design consists of a PC of silicon rings coated with platinum. The period of the structure is about 2 μm and the silicon is highly-doped with n-type doping level in the order of 1019-1020 cm-3 to enhance the free-carrier absorption. The ring etching depth, diameter and shell thickness are optimized to increase its emissivity within a specific wavelength range of interest. The simulation results show an emissivity exceeding 0.9 in the NIR range up to 2.5 μm, while the emissivity is decreased significantly for longer wavelengths suppressing the emission out of the range of interest, and hence increasing the efficiency for the source. The reported results open the door for black body radiation engineering in integrated silicon sources for spectrometer miniaturization.

A Physically Transient Form of Silicon Electronics, With Integrated Sensors, Actuators and Power Supply

PubMed Central

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A.; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L.; Zakin, Mitchell R.; Slepian, Marvin J.; Huang, Yonggang; Omenetto, Fiorenzo G.; Rogers, John A.

2013-01-01

A remarkable feature of modern silicon electronics is its ability to remain functionally and physically invariant, almost indefinitely for many practical purposes. Here, we introduce a silicon-based technology that offers the opposite behavior: it gradually vanishes over time, in a well-controlled, programmed manner. Devices that are ‘transient’ in this sense create application possibilities that cannot be addressed with conventional electronics, such as active implants that exist for medically useful timeframes, but then completely dissolve and disappear via resorption by the body. We report a comprehensive set of materials, manufacturing schemes, device components and theoretical design tools for a complementary metal oxide semiconductor (CMOS) electronics of this type, together with four different classes of sensors and actuators in addressable arrays, two options for power supply and a wireless control strategy. A transient silicon device capable of delivering thermal therapy in an implantable mode and its demonstration in animal models illustrate a system-level example of this technology. PMID:23019646

Simulation and experimental verification of silicon dioxide deposition by PECVD

NASA Astrophysics Data System (ADS)

Xu, Qing; Li, Yu-Xing; Li, Xiao-Ning; Wang, Jia-Bin; Yang, Fan; Yang, Yi; Ren, Tian-Ling

2017-02-01

Deposition of silicon dioxide in high-density plasma is an important process in integrated circuit manufacturing. A software named CFD-ACE was used to simulate the mechanism of plasma in the chamber of plasma enhanced chemical vapor deposition (PECVD) system, and the evolution of the feature profile was simulated based on CFD-TOPO. Simulation and experiment of silicon dioxide that deposited in SiH4/N2O mixture by PECVD system was researched. The particle density, energy and angular distribution in the chamber were simulated and discussed. We also studied how the depth/width ratio affected the step coverage of the trench and analyzed the deposition rate of silicon dioxide on the feature scale. X-ray photoelectron spectroscopy (XPS) was used to analyze the elemental composition of thin films. Images of the feature profiles were taken by scanning electron microscope (SEM). The simulation results were in good agreement with experimental, which could guide the semiconductor device manufacture.

Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

PubMed

Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

2014-05-13

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

Silicon Photonics Transmitter with SOA and Semiconductor Mode-Locked Laser.

PubMed

Moscoso-Mártir, Alvaro; Müller, Juliana; Hauck, Johannes; Chimot, Nicolas; Setter, Rony; Badihi, Avner; Rasmussen, Daniel E; Garreau, Alexandre; Nielsen, Mads; Islamova, Elmira; Romero-García, Sebastián; Shen, Bin; Sandomirsky, Anna; Rockman, Sylvie; Li, Chao; Sharif Azadeh, Saeed; Lo, Guo-Qiang; Mentovich, Elad; Merget, Florian; Lelarge, François; Witzens, Jeremy

2017-10-24

We experimentally investigate an optical link relying on silicon photonics transmitter and receiver components as well as a single section semiconductor mode-locked laser as a light source and a semiconductor optical amplifier for signal amplification. A transmitter based on a silicon photonics resonant ring modulator, an external single section mode-locked laser and an external semiconductor optical amplifier operated together with a standard receiver reliably supports 14 Gbps on-off keying signaling with a signal quality factor better than 7 for 8 consecutive comb lines, as well as 25 Gbps signaling with a signal quality factor better than 7 for one isolated comb line, both without forward error correction. Resonant ring modulators and Germanium waveguide photodetectors are further hybridly integrated with chip scale driver and receiver electronics, and their co-operability tested. These experiments will serve as the basis for assessing the feasibility of a silicon photonics wavelength division multiplexed link relying on a single section mode-locked laser as a multi-carrier light source.

Silicon Micromachined Microlens Array for THz Antennas

NASA Technical Reports Server (NTRS)

Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, IImran; Gill, John J.; Jung-Kubiak, Cecile D.; Llombart, Nuria

2013-01-01

5 5 silicon microlens array was developed using a silicon micromachining technique for a silicon-based THz antenna array. The feature of the silicon micromachining technique enables one to microfabricate an unlimited number of microlens arrays at one time with good uniformity on a silicon wafer. This technique will resolve one of the key issues in building a THz camera, which is to integrate antennas in a detector array. The conventional approach of building single-pixel receivers and stacking them to form a multi-pixel receiver is not suited at THz because a single-pixel receiver already has difficulty fitting into mass, volume, and power budgets, especially in space applications. In this proposed technique, one has controllability on both diameter and curvature of a silicon microlens. First of all, the diameter of microlens depends on how thick photoresist one could coat and pattern. So far, the diameter of a 6- mm photoresist microlens with 400 m in height has been successfully microfabricated. Based on current researchers experiences, a diameter larger than 1-cm photoresist microlens array would be feasible. In order to control the curvature of the microlens, the following process variables could be used: 1. Amount of photoresist: It determines the curvature of the photoresist microlens. Since the photoresist lens is transferred onto the silicon substrate, it will directly control the curvature of the silicon microlens. 2. Etching selectivity between photoresist and silicon: The photoresist microlens is formed by thermal reflow. In order to transfer the exact photoresist curvature onto silicon, there needs to be etching selectivity of 1:1 between silicon and photoresist. However, by varying the etching selectivity, one could control the curvature of the silicon microlens. The figure shows the microfabricated silicon microlens 5 x5 array. The diameter of the microlens located in the center is about 2.5 mm. The measured 3-D profile of the microlens surface has a smooth curvature. The measured height of the silicon microlens is about 280 microns. In this case, the original height of the photoresist was 210 microns. The change was due to the etching selectivity of 1.33 between photoresist and silicon. The measured surface roughness of the silicon microlens shows the peak-to-peak surface roughness of less than 0.5 microns, which is adequate in THz frequency. For example, the surface roughness should be less than 7 microns at 600 GHz range. The SEM (scanning electron microscope) image of the microlens confirms the smooth surface. The beam pattern at 550 GHz shows good directivity.

Preface: phys. stat. sol. (a) 203/4

NASA Astrophysics Data System (ADS)

Kittler, Martin; Yang, Deren

2006-03-01

This issue of physica status solidi (a) contains the majority of papers presented at the 2nd Sino-German Symposium The Silicon Age which was held at the Lindner Hotel Cottbus, Germany, 19-24 September 2005. This meeting followed the 1st Symposium Progress in Silicon Materials held in June 2002 in Hangzhou, P.R. China. 8 Chinese and 14 German scientists from universities, research institutes and industry were invited to present their views about different aspects of silicon.There was a continuous progress in silicon materials development during the last 40-50 years, driven by the need of the IC industry for better and larger monocrystalline silicon wafers. Moreover, low-cost crystalline silicon now dominates the world's production of solar cells in the photovoltaics industry. Furthermore, there are intensive research activities worldwide for on-chip integration of Si-based photonics in CMOS technology. In addition, new areas being connected with silicon are starting to appear, namely Si-based biochips and nanoelectronics. Silicon, one can reasonably argue, is already the most investigated of all materials. However, there is still a need for continuation of research and development regarding numerous aspects of Si and also SiGe, including related technologies, advanced diagnostics or the role of crystal defects, which are the working fields of many laboratories all over the world. This was also shown by the presentations at the symposium and can be found in the contributions contained in this issue.The organizers would like to thank the participants for their high level contributions and discussions during the symposium. This intensive and open communication allowed the participants to create synergies between the different fields of silicon research and also to build up relationships for cooperation between Chinese and German research groups.Finally, we would like to thank the Sino-German Science Center for the financial support of the symposium.

Electron Beam "Writes" Silicon On Sapphire

NASA Technical Reports Server (NTRS)

Heinemann, Klaus

1988-01-01

Method of growing silicon on sapphire substrate uses beam of electrons to aid growth of semiconductor material. Silicon forms as epitaxial film in precisely localized areas in micron-wide lines. Promising fabrication method for fast, densely-packed integrated circuits. Silicon deposited preferentially in contaminated substrate zones and in clean zone irradiated by electron beam. Electron beam, like surface contamination, appears to stimulate decomposition of silane atmosphere.

Stacked Metal Silicide/Silicon Far-Infrared Detectors

NASA Technical Reports Server (NTRS)

Maserjian, Joseph

1988-01-01

Selective doping of silicon in proposed metal silicide/silicon Schottky-barrier infrared photodetector increases maximum detectable wavelength. Stacking layers to form multiple Schottky barriers increases quantum efficiency of detector. Detectors of new type enhance capabilities of far-infrared imaging arrays. Grows by molecular-beam epitaxy on silicon waferscontaining very-large-scale integrated circuits. Imaging arrays of detectors made in monolithic units with image-preprocessing circuitry.

III-V quantum light source and cavity-QED on silicon.

PubMed

Luxmoore, I J; Toro, R; Del Pozo-Zamudio, O; Wasley, N A; Chekhovich, E A; Sanchez, A M; Beanland, R; Fox, A M; Skolnick, M S; Liu, H Y; Tartakovskii, A I

2013-01-01

Non-classical light sources offer a myriad of possibilities in both fundamental science and commercial applications. Single photons are the most robust carriers of quantum information and can be exploited for linear optics quantum information processing. Scale-up requires miniaturisation of the waveguide circuit and multiple single photon sources. Silicon photonics, driven by the incentive of optical interconnects is a highly promising platform for the passive optical components, but integrated light sources are limited by silicon's indirect band-gap. III-V semiconductor quantum-dots, on the other hand, are proven quantum emitters. Here we demonstrate single-photon emission from quantum-dots coupled to photonic crystal nanocavities fabricated from III-V material grown directly on silicon substrates. The high quality of the III-V material and photonic structures is emphasized by observation of the strong-coupling regime. This work opens-up the advantages of silicon photonics to the integration and scale-up of solid-state quantum optical systems.

Demonstration of free space coherent optical communication using integrated silicon photonic orbital angular momentum devices.

PubMed

Su, Tiehui; Scott, Ryan P; Djordjevic, Stevan S; Fontaine, Nicolas K; Geisler, David J; Cai, Xinran; Yoo, S J B

2012-04-23

We propose and demonstrate silicon photonic integrated circuits (PICs) for free-space spatial-division-multiplexing (SDM) optical transmission with multiplexed orbital angular momentum (OAM) states over a topological charge range of -2 to +2. The silicon PIC fabricated using a CMOS-compatible process exploits tunable-phase arrayed waveguides with vertical grating couplers to achieve space division multiplexing and demultiplexing. The experimental results utilizing two silicon PICs achieve SDM mux/demux bit-error-rate performance for 1‑b/s/Hz, 10-Gb/s binary phase shifted keying (BPSK) data and 2-b/s/Hz, 20-Gb/s quadrature phase shifted keying (QPSK) data for individual and two simultaneous OAM states. © 2012 Optical Society of America

Low-power silicon-organic hybrid (SOH) modulators for advanced modulation formats.

PubMed

Lauermann, M; Palmer, R; Koeber, S; Schindler, P C; Korn, D; Wahlbrink, T; Bolten, J; Waldow, M; Elder, D L; Dalton, L R; Leuthold, J; Freude, W; Koos, C

2014-12-01

We demonstrate silicon-organic hybrid (SOH) electro-optic modulators that enable quadrature phase-shift keying (QPSK) and 16-state quadrature amplitude modulation (16QAM) with high signal quality and record-low energy consumption. SOH integration combines highly efficient electro-optic organic materials with conventional silicon-on-insulator (SOI) slot waveguides, and allows to overcome the intrinsic limitations of silicon as an optical integration platform. We demonstrate QPSK and 16QAM signaling at symbol rates of 28 GBd with peak-to-peak drive voltages of 0.6 V(pp). For the 16QAM experiment at 112 Gbit/s, we measure a bit-error ratio of 5.1 × 10⁻⁵ and a record-low energy consumption of only 19 fJ/bit.

Porous silicon based micro-opto-electro-mechanical-systems (MOEMS) components for free space optical interconnects

NASA Astrophysics Data System (ADS)

Song, Da

2008-02-01

One of the major challenges confronting the current integrated circuits (IC) industry is the metal "interconnect bottleneck". To overcome this obstacle, free space optical interconnects (FSOIs) can be used to address the demand for high speed data transmission, multi-functionality and multi-dimensional integration for the next generation IC. One of the crucial elements in FSOIs system is to develop a high performance and flexible optical network to transform the incoming optical signal into a distributed set of optical signals whose direction, alignment and power can be independently controlled. Among all the optical materials for the realization of FSOI components, porous silicon (PSi) is one of the most promising candidates because of its unique optical properties, flexible fabrication methods and integration with conventional IC material sets. PSi-based Distributed Bragg Reflector (DBR) and Fabry-Perot (F-P) structures with unique optical properties are realized by electrochemical etching of silicon. By incorporating PSi optical structures with Micro-Opto-Electro-Mechanical-Systems (MOEMS), several components required for FSOI have been developed. The first type of component is the out-of-plane freestanding optical switch. Implementing a PSi DBR structure as an optically active region, the device can realize channel selection by changing the tilting angle of the micromirror supported by the thermal bimorph actuator. All the fabricated optical switches have reached kHz working frequency and life time of millions of cycles. The second type of component is the in-plane tunable optical filter. By introducing PSi F-P structure into the in-plane PSi film, a thermally tunable optical filter with a sensitivity of 7.9nm/V has been realized for add/drop optical signal selection. Also, for the first time, a new type of PSi based reconfigurable diffractive optical element (DOE) has been developed. By using patterned photoresist as a protective mask for electrochemical etching, the freestanding PSi-based MOEMS DOE has been created as a beam splitter to redistribute the incoming optical signal with onto desired detector arrays. All the developed devices are realized in array fashion and can be addressed and controlled individually. The combination of PSi and MOEMS opens the door for a new generation of silicon compatible optical interconnects.

A cochlear implant fabricated using a bulk silicon-surface micromachining process

NASA Astrophysics Data System (ADS)

Bell, Tracy Elizabeth

1999-11-01

This dissertation presents the design and fabrication of two generations of a silicon microelectrode array for use in a cochlear implant. A cochlear implant is a device that is inserted into the inner ear and uses electrical stimulation to provide sound sensations to the profoundly deaf. The first-generation silicon cochlear implant is a passive device fabricated using silicon microprobe technology developed at the University of Michigan. It contains twenty-two iridium oxide (IrO) stimulating sites that are 250 mum in diameter and spaced at 750 mum intervals. In-vivo recordings were made in guinea pig auditory cortex in response to electrical stimulation with this device, verifying its ability to electrically evoke an auditory response. Auditory thresholds as low as 78 muA were recorded. The second-generation implant is a thirty-two site, four-channel device with on-chip CMOS site-selection circuitry and integrated position sensing. It was fabricated using a novel bulk silicon surface micromachining process which was developed as a part of this dissertation work. While the use of semiconductor technology offers many advantages in fabricating cochlear implants over the methods currently used, it was felt that even further advantages could be gained by developing a new micromachining process which would allow circuitry to be distributed along the full length of the cochlear implant substrate. The new process uses electropolishing of an n+ bulk silicon sacrificial layer to undercut and release n- epitaxial silicon structures from the wafer. An extremely abrupt etch-stop between the n+ and n- silicon is obtained, with no electropolishing taking place in the n-type silicon that is doped lower than 1 x 1017 cm-3 in concentration. Lateral electropolishing rates of up to 50 mum/min were measured using this technique, allowing one millimeter-wide structures to be fully undercut in as little as 10 minutes. The new micromachining process was integrated with a standard p-well CMOS integrated circuit process to fabricate the second-generation active silicon cochlear implants.

Improved toughness of silicon carbide

NASA Technical Reports Server (NTRS)

Palm, J. A.

1976-01-01

Impact energy absorbing layers (EALs) comprised of partially densified silicon carbide were formed in situ on fully sinterable silicon carbide substrates. After final sintering, duplex silicon carbide structures resulted which were comprised of a fully sintered, high density silicon carbide substrate or core, overlayed with an EAL of partially sintered silicon carbide integrally bonded to its core member. Thermal cycling tests proved such structures to be moderately resistant to oxidation and highly resistant to thermal shock stresses. The strength of the developed structures in some cases exceeded but essentially it remained the same as the fully sintered silicon carbide without the EAL. Ballistic impact tests indicated that substantial improvements in the toughness of sintered silicon carbide were achieved by the use of the partially densified silicon carbide EALs.

Gamma radiation effects on silicon photonic waveguides.

PubMed

Grillanda, Stefano; Singh, Vivek; Raghunathan, Vivek; Morichetti, Francesco; Melloni, Andrea; Kimerling, Lionel; Agarwal, Anuradha M

2016-07-01

To support the use of integrated photonics in harsh environments, such as outer space, the hardness threshold to high-energy radiation must be established. Here, we investigate the effects of gamma (γ) rays, with energy in the MeV-range, on silicon photonic waveguides. By irradiation of high-quality factor amorphous silicon core resonators, we measure the impact of γ rays on the materials incorporated in our waveguide system, namely amorphous silicon, silicon dioxide, and polymer. While we show the robustness of amorphous silicon and silicon dioxide up to an absorbed dose of 15 Mrad, more than 100× higher than previous reports on crystalline silicon, polymer materials exhibit changes with doses as low as 1 Mrad.

Low-cost Solar Array (LSA) project

NASA Technical Reports Server (NTRS)

1978-01-01

Progress made by the Low-Cost Silicon Solar Array Project during the period January through March 1978 is reported. It includes task reports on silicon material processing, large-area silicon sheet development, encapsulation materials testing and development, project engineering and operations, and manufacturing techniques, plus the steps taken to integrate these efforts.

Wavelength selective switch array employing silica-based waveguide frontend with integrated polarization diversity optics.

PubMed

Sakamaki, Yohei; Shikama, Kota; Ikuma, Yuichiro; Suzuki, Kenya

2017-08-21

We propose a waveguide frontend with integrated polarization diversity optics for a wavelength selective switch (WSS) array with a liquid crystal on silicon switching engine to simplify the free space optics configuration and the alignment process in optical modules. The polarization diversity function is realized by the integration of a waveguide-type polarization beam splitter and a polarization rotating half-wave plate in a beam launcher using silica-based planar lightwave circuit technology. We confirmed experimentally the feasibility of using our proposed waveguide frontend in a two-in-one 1 × 20 WSS. The experimental results show that the fabricated waveguide frontend provides a polarization diversity function without any degradation in optical performance.

Thermal ink-jet device using single-chip silicon microchannels

NASA Astrophysics Data System (ADS)

Wuu, DongSing; Cheng, Chen-Yue; Horng, RayHua; Chan, G. C.; Chiu, Sao-Ling; Wu, Yi-Yung

1998-06-01

We present a new method to fabricate silicon microfluidic channels by through-hole etching with subsequent planarization. The method is based on etching out the deep grooves through a perforated silicon carbide membrane, followed by sealing the membrane with plasma-enhanced chemical vapor deposition (PECVD). Low-pressure-chemical-vapor- deposited (LPCVD) polysilicon was used as a sacrificial layer to define the channel structure and only one etching step is required. This permits the realization of planarization after a very deep etching step in silicon and offers the possibility for film deposition, resist spinning and film patterning across deep grooves. The process technology was demonstrated on the fabrication of a monolithic silicon microchannel structure for thermal inkjet printing. The Ta-Al heater arrays are integrated on the top of each microchannel, which connect to a common on-chip front-end ink reservoir. The fabrication of this device requires six masks and no active nozzle-to-chip alignment. Moreover, the present micromachining process is compatible with the addition of on-chip circuitry for multiplexing the heater control signals. Heat transfer efficiency to the ink is enhanced by the high thermal conductivity of the silicon carbide in the channel ceiling, while the bulk silicon maintains high interchannel isolation. The fabricated inkjet devices show the droplet sizes of 20 - 50 micrometer in diameter with various channel dimensions and stable ejection of ink droplets more than 1 million.

Multimodality Imaging-based Evaluation of Single-Lumen Silicone Breast Implants for Rupture.

PubMed

Seiler, Stephen J; Sharma, Pooja B; Hayes, Jody C; Ganti, Ramapriya; Mootz, Ann R; Eads, Emily D; Teotia, Sumeet S; Evans, W Phil

2017-01-01

Breast implants are frequently encountered on breast imaging studies, and it is essential for any radiologist interpreting these studies to be able to correctly assess implant integrity. Ruptures of silicone gel-filled implants often occur without becoming clinically obvious and are incidentally detected at imaging. Early diagnosis of implant rupture is important because surgical removal of extracapsular silicone in the breast parenchyma and lymphatics is difficult. Conversely, misdiagnosis of rupture may prompt a patient to undergo unnecessary additional surgery to remove the implant. Mammography is the most common breast imaging examination performed and can readily depict extracapsular free silicone, although it is insensitive for detection of intracapsular implant rupture. Ultrasonography (US) can be used to assess the internal structure of the implant and may provide an economical method for initial implant assessment. Common US signs of intracapsular rupture include the "keyhole" or "noose" sign, subcapsular line sign, and "stepladder" sign; extracapsular silicone has a distinctive "snowstorm" or echogenic noise appearance. Magnetic resonance (MR) imaging is the most accurate and reliable means for assessment of implant rupture and is highly sensitive for detection of both intracapsular and extracapsular rupture. MR imaging findings of intracapsular rupture include the keyhole or noose sign, subcapsular line sign, and "linguine" sign, and silicone-selective MR imaging sequences are highly sensitive to small amounts of extracapsular silicone. © RSNA, 2017.

Late Quaternary to Holocene Geology, Geomorphology and Glacial History of Dawson Creek and Surrounding area, Northeast British Columbia, Canada

NASA Astrophysics Data System (ADS)

Henry, Edward Trowbridge

Semiconductor quantum dots in silicon demonstrate exceptionally long spin lifetimes as qubits and are therefore promising candidates for quantum information processing. However, control and readout techniques for these devices have thus far employed low frequency electrons, in contrast to high speed temperature readout techniques used in other qubit architectures, and coupling between multiple quantum dot qubits has not been satisfactorily addressed. This dissertation presents the design and characterization of a semiconductor charge qubit based on double quantum dot in silicon with an integrated microwave resonator for control and readout. The 6 GHz resonator is designed to achieve strong coupling with the quantum dot qubit, allowing the use of circuit QED control and readout techniques which have not previously been applicable to semiconductor qubits. To achieve this coupling, this document demonstrates successful operation of a novel silicon double quantum dot design with a single active metallic layer and a coplanar stripline resonator with a bias tee for dc excitation. Experiments presented here demonstrate quantum localization and measurement of both electrons on the quantum dot and photons in the resonator. Further, it is shown that the resonator-qubit coupling in these devices is sufficient to reach the strong coupling regime of circuit QED. The details of a measurement setup capable of performing simultaneous low noise measurements of the resonator and quantum dot structure are also presented here. The ultimate aim of this research is to integrate the long coherence times observed in electron spins in silicon with the sophisticated readout architectures available in circuit QED based quantum information systems. This would allow superconducting qubits to be coupled directly to semiconductor qubits to create hybrid quantum systems with separate quantum memory and processing components.

Silicon-photonic interferometric biosensor using active phase demodulation

NASA Astrophysics Data System (ADS)

Marin, Y.; Toccafondo, V.; Velha, P.; Scarano, S.; Tirelli, S.; Nottola, A.; Jeong, Y.; Jeon, H. P.; Minunni, M.; Di Pasquale, F.; Oton, C. J.

2018-02-01

Silicon photonics is becoming a consolidated technology, mainly in the telecom/datacom sector, but with a great potential in the chemical and biomedical sensor market too, mainly due to its CMOS compatibility, which allows massfabrication of huge numbers of miniaturized devices at a very low cost per chip. Integrated photonic sensors, typically based on resonators, interferometers, or periodic structures, are easy to multiplex as the light is confined in optical waveguides. In this work, we present a silicon-photonic sensor capable of measuring refractive index and chemical binding of biomolecules on the surface, using a low-cost phase interrogation scheme. The sensor consists of a pair of balanced Mach-Zehnder interferometers with interaction lengths of 2.5 mm and 22 mm, wound to a sensing area of only 500 μm x500 μm. The phase interrogation is performed with a fixed laser and an active phase demodulation approach based on a phase generated carrier (PGC) technique using a phase demodulator integrated within the chip. No laser tuning is required, and the technique can extract the univocal phase value with no sensitivity fading. The detection only requires a photo-receiver per interferometer, analog-to-digital conversion, and simple processing performed in real-time. We present repeatable and linear refractive index measurements, with a detection limit down to 4.7·10-7 RIU. We also present sensing results on a chemically-functionalized sample, where anti-BSA to BSA (bovine serum albumin) binding curves are clearly visible for concentrations down to 5 ppm. Considering the advantages of silicon photonics, this device has great potential over several applications in the chemical/biochemical sensing industry.

Experience from the construction and operation of the STAR PXL detector

NASA Astrophysics Data System (ADS)

Greiner, L.; Anderssen, E. C.; Contin, G.; Schambach, J.; Silber, J.; Stezelberger, T.; Sun, X.; Szelezniak, M.; Vu, C.; Wieman, H. H.; Woodmansee, S.

2015-04-01

A new silicon based vertex detector called the Heavy Flavor Tracker (HFT) was installed at the Soleniodal Tracker At RHIC (STAR) experiment for the Relativistic Heavy Ion Collider (RHIC) 2014 heavy ion run to improve the vertex resolution and extend the measurement capabilities of STAR in the heavy flavor domain. The HFT consists of four concentric cylinders around the STAR interaction point composed of three different silicon detector technologies based on strips, pads and for the first time in an accelerator experiment CMOS monolithic active pixels (MAPS) . The two innermost layers at a radius of 2.8 cm and 8 cm from the beam line are constructed with 400 high resolution MAPS sensors arranged in 10-sensor ladders mounted on 10 thin carbon fiber sectors giving a total silicon area of 0.16 m2. Each sensor consists of a pixel array of nearly 1 million pixels with a pitch of 20.7 μm with column-level discriminators, zero-suppression circuitry and output buffer memory integrated into one silicon die with a sensitive area of ~ 3.8 cm2. The pixel (PXL) detector has a low power dissipation of 170 mW/cm2, which allows air cooling. This results in a global material budget of 0.5% radiation length per layer for detector used in this run. A novel mechanical approach to detector insertion allows for the installation and integration of the pixel sub detector within a 12 hour period during an on-going STAR run. The detector specifications, experience from the construction and operation, lessons learned and initial measurements of the PXL performance in the 200 GeV Au-Au run will be presented.

Ultra-low loss fully-etched grating couplers for perfectly vertical coupling compatible with DUV lithography tools

NASA Astrophysics Data System (ADS)

Dabos, G.; Pleros, N.; Tsiokos, D.

2016-03-01

Hybrid integration of VCSELs onto silicon-on-insulator (SOI) substrates has emerged as an attractive approach for bridging the gap between cost-effective and energy-efficient directly modulated laser sources and silicon-based PICs by leveraging flip-chip (FC) bonding techniques and silicon grating couplers (GCs). In this context, silicon GCs, should comply with the process requirements imposed by the complimentary-metal-oxide-semiconductor manufacturing tools addressing in parallel the challenges originating from the perfectly vertical incidence. Firstly, fully etched GCs compatible with deep-ultraviolet lithography tools offering high coupling efficiencies are imperatively needed to maintain low fabrication cost. Secondly, GC's tolerance to VCSEL bonding misalignment errors is a prerequisite for practical deployment. Finally, a major challenge originating from the perfectly vertical coupling scheme is the minimization of the direct back-reflection to the VCSEL's outgoing facet which may destabilize its operation. Motivated from the above challenges, we used numerical simulation tools to design an ultra-low loss, bidirectional VCSEL-to-SOI optical coupling scheme for either TE or TM polarization, based on low-cost fully etched GCs with a Si-layer of 340 nm without employing bottom reflectors or optimizing the buried-oxide layer. Comprehensive 2D Finite-Difference-Time- Domain simulations have been performed. The reported GC layout remains fully compatible with the back-end-of-line (BEOL) stack associated with the 3D integration technology exploiting all the inter-metal-dielectric (IMD) layers of the CMOS fab. Simulation results predicted for the first time in fully etched structures a coupling efficiency of as low as -0.87 dB at 1548 nm and -1.47 dB at 1560 nm with a minimum direct back-reflection of -27.4 dB and -14.2 dB for TE and TM polarization, respectively.

Varifocal MOEMS fiber scanner for confocal endomicroscopy.

PubMed

Meinert, Tobias; Weber, Niklas; Zappe, Hans; Seifert, Andreas

2014-12-15

Based on an advanced silicon optical bench technology with integrated MOEMS (Micro-Opto-Electro-Mechanical-System) components, a piezo-driven fiber scanner for confocal microscopy has been developed. This highly-miniaturized technology allows integration into an endoscope with a total outer probe diameter of 2.5 mm. The system features a hydraulically-driven varifocal lens providing axial confocal scanning without any translational movement of components. The demonstrated resolutions are 1.7 μm laterally and 19 μm axially.

RFIC's challenges for third-generation wireless systems

NASA Astrophysics Data System (ADS)

Boric-Lubecke, Olga; Lin, Jenshan; Gould, Penny; Kermalli, Munawar

2001-11-01

Third generation (3G) cellular wireless systems are envisioned to offer low cost, high-capacity mobile communications with data rates of up to 2 Mbit/s, with global roaming and advanced data services. Besides adding mobility to the internet, 3G systems will provide location-based services, as well as personalized information and entertainment. Low cost, high dynamic-range radios, both for base stations (BS) and for mobile stations (MS) are required to enable worldwide deployment of such networks. A receiver's reference sensitivity, intermodulation characteristics, and blocking characteristics, set by a wireless standard, define performance requirements of individual components of a receiver front end. Since base station handles multiple signals from various distances simultaneously, its radio specifications are significantly more demanding than those for mobile devices. While high level of integration has already been achieved for second generation hand-sets using low-cost silicon technologies, the cost and size reduction of base stations still remains a challenge and necessity. While silicon RFIC technology is steadily improving, it is still difficult to achieve noise figure (NF), linearity, and phase noise requirements with presently available devices. This paper will discuss base station specification for 2G (GSM) and 3G (UMTS) systems, as well as the feasibility of implementing base station radios in low-cost silicon processes.

Three-Dimensional Integration of Black Phosphorus Photodetector with Silicon Photonics and Nanoplasmonics.

PubMed

Chen, Che; Youngblood, Nathan; Peng, Ruoming; Yoo, Daehan; Mohr, Daniel A; Johnson, Timothy W; Oh, Sang-Hyun; Li, Mo

2017-02-08

We demonstrate the integration of a black phosphorus photodetector in a hybrid, three-dimensional architecture of silicon photonics and metallic nanoplasmonics structures. This integration approach combines the advantages of the low propagation loss of silicon waveguides, high-field confinement of a plasmonic nanogap, and the narrow bandgap of black phosphorus to achieve high responsivity for detection of telecom-band, near-infrared light. Benefiting from an ultrashort channel (∼60 nm) and near-field enhancement enabled by the nanogap structure, the photodetector shows an intrinsic responsivity as high as 10 A/W afforded by internal gain mechanisms, and a 3 dB roll-off frequency of 150 MHz. This device demonstrates a promising approach for on-chip integration of three distinctive photonic systems, which, as a generic platform, may lead to future nanophotonic applications for biosensing, nonlinear optics, and optical signal processing.

Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

NASA Astrophysics Data System (ADS)

Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

Photonic Hilbert transformers based on laterally apodized integrated waveguide Bragg gratings on a SOI wafer.

PubMed

Bazargani, Hamed Pishvai; Burla, Maurizio; Chrostowski, Lukas; Azaña, José

2016-11-01

We experimentally demonstrate high-performance integer and fractional-order photonic Hilbert transformers based on laterally apodized Bragg gratings in a silicon-on-insulator technology platform. The sub-millimeter-long gratings have been fabricated using single-etch electron beam lithography, and the resulting HT devices offer operation bandwidths approaching the THz range, with time-bandwidth products between 10 and 20.

An Assessment of the Impact of the Department of Defense Very-High-Speed Integrated Circuit Program.

DTIC Science & Technology

1982-01-01

analysis, statistical inference, device physics and other such products of basic research. Examples of such information would be: analyses of properties of...TB , for a n-p-n silicon transitor with 1018 cm- 3 base-doping, TB = Wb 2/2Dw becomes 0.4 ps in this limit so that the base contributes little to delay

Extreme-Environment Silicon-Carbide (SiC) Wireless Sensor Suite

NASA Technical Reports Server (NTRS)

Yang, Jie

2015-01-01

Phase II objectives: Develop an integrated silicon-carbide wireless sensor suite capable of in situ measurements of critical characteristics of NTP engine; Compose silicon-carbide wireless sensor suite of: Extreme-environment sensors center, Dedicated high-temperature (450 deg C) silicon-carbide electronics that provide power and signal conditioning capabilities as well as radio frequency modulation and wireless data transmission capabilities center, An onboard energy harvesting system as a power source.

Organic printed photonics: From microring lasers to integrated circuits

PubMed Central

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-01-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 105, which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices. PMID:26601256

Organic printed photonics: From microring lasers to integrated circuits.

PubMed

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-09-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics

PubMed Central

Weigel, Peter O.; Savanier, Marc; DeRose, Christopher T.; Pomerene, Andrew T.; Starbuck, Andrew L.; Lentine, Anthony L.; Stenger, Vincent; Mookherjea, Shayan

2016-01-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost. PMID:26927022

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics.

PubMed

Weigel, Peter O; Savanier, Marc; DeRose, Christopher T; Pomerene, Andrew T; Starbuck, Andrew L; Lentine, Anthony L; Stenger, Vincent; Mookherjea, Shayan

2016-03-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost.