Xyce parallel electronic simulator users guide, version 6.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

NASA Astrophysics Data System (ADS)

Sharma, Vijay Kumar; Pattanaik, Manisha

2015-11-01

Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-VTH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-VTH transistors in place of high-VTH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-VTH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.

Advanced 3-V semiconductor technology assessment

NASA Technical Reports Server (NTRS)

Nowogrodzki, M.

1983-01-01

Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.

Vectorized program architectures for supercomputer-aided circuit design

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rizzoli, V.; Ferlito, M.; Neri, A.

1986-01-01

Vector processors (supercomputers) can be effectively employed in MIC or MMIC applications to solve problems of large numerical size such as broad-band nonlinear design or statistical design (yield optimization). In order to fully exploit the capabilities of a vector hardware, any program architecture must be structured accordingly. This paper presents a possible approach to the ''semantic'' vectorization of microwave circuit design software. Speed-up factors of the order of 50 can be obtained on a typical vector processor (Cray X-MP), with respect to the most powerful scaler computers (CDC 7600), with cost reductions of more than one order of magnitude. Thismore » could broaden the horizon of microwave CAD techniques to include problems that are practically out of the reach of conventional systems.« less

High-resolution mapping of bifurcations in nonlinear biochemical circuits

NASA Astrophysics Data System (ADS)

Genot, A. J.; Baccouche, A.; Sieskind, R.; Aubert-Kato, N.; Bredeche, N.; Bartolo, J. F.; Taly, V.; Fujii, T.; Rondelez, Y.

2016-08-01

Analog molecular circuits can exploit the nonlinear nature of biochemical reaction networks to compute low-precision outputs with fewer resources than digital circuits. This analog computation is similar to that employed by gene-regulation networks. Although digital systems have a tractable link between structure and function, the nonlinear and continuous nature of analog circuits yields an intricate functional landscape, which makes their design counter-intuitive, their characterization laborious and their analysis delicate. Here, using droplet-based microfluidics, we map with high resolution and dimensionality the bifurcation diagrams of two synthetic, out-of-equilibrium and nonlinear programs: a bistable DNA switch and a predator-prey DNA oscillator. The diagrams delineate where function is optimal, dynamics bifurcates and models fail. Inverse problem solving on these large-scale data sets indicates interference from enzymatic coupling. Additionally, data mining exposes the presence of rare, stochastically bursting oscillators near deterministic bifurcations.

Nonreciprocal signal routing in an active quantum network

NASA Astrophysics Data System (ADS)

Metelmann, A.; Türeci, H. E.

2018-04-01

As superconductor quantum technologies are moving towards large-scale integrated circuits, a robust and flexible approach to routing photons at the quantum level becomes a critical problem. Active circuits, which contain parametrically driven elements selectively embedded in the circuit, offer a viable solution. Here, we present a general strategy for routing nonreciprocally quantum signals between two sites of a given lattice of oscillators, implementable with existing superconducting circuit components. Our approach makes use of a dual lattice of overdamped oscillators linking the nodes of the main lattice. Solutions for spatially selective driving of the lattice elements can be found, which optimally balance coherent and dissipative hopping of microwave photons to nonreciprocally route signals between two given nodes. In certain lattices these optimal solutions are obtained at the exceptional point of the dynamical matrix of the network. We also demonstrate that signal and noise transmission characteristics can be separately optimized.

Self-amplified CMOS image sensor using a current-mode readout circuit

NASA Astrophysics Data System (ADS)

Santos, Patrick M.; de Lima Monteiro, Davies W.; Pittet, Patrick

2014-05-01

The feature size of the CMOS processes decreased during the past few years and problems such as reduced dynamic range have become more significant in voltage-mode pixels, even though the integration of more functionality inside the pixel has become easier. This work makes a contribution on both sides: the possibility of a high signal excursion range using current-mode circuits together with functionality addition by making signal amplification inside the pixel. The classic 3T pixel architecture was rebuild with small modifications to integrate a transconductance amplifier providing a current as an output. The matrix with these new pixels will operate as a whole large transistor outsourcing an amplified current that will be used for signal processing. This current is controlled by the intensity of the light received by the matrix, modulated pixel by pixel. The output current can be controlled by the biasing circuits to achieve a very large range of output signal levels. It can also be controlled with the matrix size and this permits a very high degree of freedom on the signal level, observing the current densities inside the integrated circuit. In addition, the matrix can operate at very small integration times. Its applications would be those in which fast imaging processing, high signal amplification are required and low resolution is not a major problem, such as UV image sensors. Simulation results will be presented to support: operation, control, design, signal excursion levels and linearity for a matrix of pixels that was conceived using this new concept of sensor.

Fault-tolerant, high-level quantum circuits: form, compilation and description

NASA Astrophysics Data System (ADS)

Paler, Alexandru; Polian, Ilia; Nemoto, Kae; Devitt, Simon J.

2017-06-01

Fault-tolerant quantum error correction is a necessity for any quantum architecture destined to tackle interesting, large-scale problems. Its theoretical formalism has been well founded for nearly two decades. However, we still do not have an appropriate compiler to produce a fault-tolerant, error-corrected description from a higher-level quantum circuit for state-of the-art hardware models. There are many technical hurdles, including dynamic circuit constructions that occur when constructing fault-tolerant circuits with commonly used error correcting codes. We introduce a package that converts high-level quantum circuits consisting of commonly used gates into a form employing all decompositions and ancillary protocols needed for fault-tolerant error correction. We call this form the (I)initialisation, (C)NOT, (M)measurement form (ICM) and consists of an initialisation layer of qubits into one of four distinct states, a massive, deterministic array of CNOT operations and a series of time-ordered X- or Z-basis measurements. The form allows a more flexible approach towards circuit optimisation. At the same time, the package outputs a standard circuit or a canonical geometric description which is a necessity for operating current state-of-the-art hardware architectures using topological quantum codes.

A differential memristive synapse circuit for on-line learning in neuromorphic computing systems

NASA Astrophysics Data System (ADS)

Nair, Manu V.; Muller, Lorenz K.; Indiveri, Giacomo

2017-12-01

Spike-based learning with memristive devices in neuromorphic computing architectures typically uses learning circuits that require overlapping pulses from pre- and post-synaptic nodes. This imposes severe constraints on the length of the pulses transmitted in the network, and on the network’s throughput. Furthermore, most of these circuits do not decouple the currents flowing through memristive devices from the one stimulating the target neuron. This can be a problem when using devices with high conductance values, because of the resulting large currents. In this paper, we propose a novel circuit that decouples the current produced by the memristive device from the one used to stimulate the post-synaptic neuron, by using a novel differential scheme based on the Gilbert normalizer circuit. We show how this circuit is useful for reducing the effect of variability in the memristive devices, and how it is ideally suited for spike-based learning mechanisms that do not require overlapping pre- and post-synaptic pulses. We demonstrate the features of the proposed synapse circuit with SPICE simulations, and validate its learning properties with high-level behavioral network simulations which use a stochastic gradient descent learning rule in two benchmark classification tasks.

Imbalance aware lithography hotspot detection: a deep learning approach

NASA Astrophysics Data System (ADS)

Yang, Haoyu; Luo, Luyang; Su, Jing; Lin, Chenxi; Yu, Bei

2017-07-01

With the advancement of very large scale integrated circuits (VLSI) technology nodes, lithographic hotspots become a serious problem that affects manufacture yield. Lithography hotspot detection at the post-OPC stage is imperative to check potential circuit failures when transferring designed patterns onto silicon wafers. Although conventional lithography hotspot detection methods, such as machine learning, have gained satisfactory performance, with the extreme scaling of transistor feature size and layout patterns growing in complexity, conventional methodologies may suffer from performance degradation. For example, manual or ad hoc feature extraction in a machine learning framework may lose important information when predicting potential errors in ultra-large-scale integrated circuit masks. We present a deep convolutional neural network (CNN) that targets representative feature learning in lithography hotspot detection. We carefully analyze the impact and effectiveness of different CNN hyperparameters, through which a hotspot-detection-oriented neural network model is established. Because hotspot patterns are always in the minority in VLSI mask design, the training dataset is highly imbalanced. In this situation, a neural network is no longer reliable, because a trained model with high classification accuracy may still suffer from a high number of false negative results (missing hotspots), which is fatal in hotspot detection problems. To address the imbalance problem, we further apply hotspot upsampling and random-mirror flipping before training the network. Experimental results show that our proposed neural network model achieves comparable or better performance on the ICCAD 2012 contest benchmark compared to state-of-the-art hotspot detectors based on deep or representative machine leaning.

Algorithms and architecture for multiprocessor based circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deutsch, J.T.

Accurate electrical simulation is critical to the design of high performance integrated circuits. Logic simulators can verify function and give first-order timing information. Switch level simulators are more effective at dealing with charge sharing than standard logic simulators, but cannot provide accurate timing information or discover DC problems. Delay estimation techniques and cell level simulation can be used in constrained design methods, but must be tuned for each application, and circuit simulation must still be used to generate the cell models. None of these methods has the guaranteed accuracy that many circuit designers desire, and none can provide detailed waveformmore » information. Detailed electrical-level simulation can predict circuit performance if devices and parasitics are modeled accurately. However, the computational requirements of conventional circuit simulators make it impractical to simulate current large circuits. In this dissertation, the implementation of Iterated Timing Analysis (ITA), a relaxation-based technique for accurate circuit simulation, on a special-purpose multiprocessor is presented. The ITA method is an SOR-Newton, relaxation-based method which uses event-driven analysis and selective trace to exploit the temporal sparsity of the electrical network. Because event-driven selective trace techniques are employed, this algorithm lends itself to implementation on a data-driven computer.« less

Compiling quantum circuits to realistic hardware architectures using temporal planners

NASA Astrophysics Data System (ADS)

Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

2018-04-01

To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

Xyce Parallel Electronic Simulator Users' Guide Version 6.8

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik Venkatraman; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been de- signed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel com- puting platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows onemore » to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase$-$ a message passing parallel implementation $-$ which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Separate Poles Mode for Large-Capacity HVDC System

NASA Astrophysics Data System (ADS)

Zhu, Lin; Gao, Qin

2017-05-01

This paper proposes a novel connection mode, separate poles mode (SPM), for large-capacity HVDC systems. The proposed mode focuses on the core issues of HVDC connection in interconnected power grids and principally aims at increasing effective electric distance between poles, which helps to mitigate the interaction problems between AC system and DC system. Receiving end of bipolar HVDC has been divided into different inverter stations under the mode, and thus significantly alleviates difficulties in power transmission and consumption of receiving-end AC grids. By investigating the changes of multi-feed short-circuit ratio (MISCR), finding that HVDC with SPM shows critical impacts upon itself and other HVDC systems with conventional connection mode, which demonstrates that SPM can make balance between MISCR increase and short-circuit current limit.

A Formalized Design Process for Bacterial Consortia That Perform Logic Computing

PubMed Central

Sun, Rui; Xi, Jingyi; Wen, Dingqiao; Feng, Jingchen; Chen, Yiwei; Qin, Xiao; Ma, Yanrong; Luo, Wenhan; Deng, Linna; Lin, Hanchi; Yu, Ruofan; Ouyang, Qi

2013-01-01

The concept of microbial consortia is of great attractiveness in synthetic biology. Despite of all its benefits, however, there are still problems remaining for large-scaled multicellular gene circuits, for example, how to reliably design and distribute the circuits in microbial consortia with limited number of well-behaved genetic modules and wiring quorum-sensing molecules. To manage such problem, here we propose a formalized design process: (i) determine the basic logic units (AND, OR and NOT gates) based on mathematical and biological considerations; (ii) establish rules to search and distribute simplest logic design; (iii) assemble assigned basic logic units in each logic operating cell; and (iv) fine-tune the circuiting interface between logic operators. We in silico analyzed gene circuits with inputs ranging from two to four, comparing our method with the pre-existing ones. Results showed that this formalized design process is more feasible concerning numbers of cells required. Furthermore, as a proof of principle, an Escherichia coli consortium that performs XOR function, a typical complex computing operation, was designed. The construction and characterization of logic operators is independent of “wiring” and provides predictive information for fine-tuning. This formalized design process provides guidance for the design of microbial consortia that perform distributed biological computation. PMID:23468999

Vibration properties of and power harvested by a system of electromagnetic vibration energy harvesters that have electrical dynamics

NASA Astrophysics Data System (ADS)

Cooley, Christopher G.

2017-09-01

This study investigates the vibration and dynamic response of a system of coupled electromagnetic vibration energy harvesting devices that each consist of a proof mass, elastic structure, electromagnetic generator, and energy harvesting circuit with inductance, resistance, and capacitance. The governing equations for the coupled electromechanical system are derived using Newtonian mechanics and Kirchhoff circuit laws for an arbitrary number of these subsystems. The equations are cast in matrix operator form to expose the device's vibration properties. The device's complex-valued eigenvalues and eigenvectors are related to physical characteristics of its vibration. Because the electrical circuit has dynamics, these devices have more natural frequencies than typical electromagnetic vibration energy harvesters that have purely resistive circuits. Closed-form expressions for the steady state dynamic response and average power harvested are derived for devices with a single subsystem. Example numerical results for single and double subsystem devices show that the natural frequencies and vibration modes obtained from the eigenvalue problem agree with the resonance locations and response amplitudes obtained independently from forced response calculations. This agreement demonstrates the usefulness of solving eigenvalue problems for these devices. The average power harvested by the device differs substantially at each resonance. Devices with multiple subsystems have multiple modes where large amounts of power are harvested.

Metallization failures

NASA Technical Reports Server (NTRS)

Beatty, R.

1971-01-01

Metallization-related failure mechanisms were shown to be a major cause of integrated circuit failures under accelerated stress conditions, as well as in actual use under field operation. The integrated circuit industry is aware of the problem and is attempting to solve it in one of two ways: (1) better understanding of the aluminum system, which is the most widely used metallization material for silicon integrated circuits both as a single level and multilevel metallization, or (2) evaluating alternative metal systems. Aluminum metallization offers many advantages, but also has limitations particularly at elevated temperatures and high current densities. As an alternative, multilayer systems of the general form, silicon device-metal-inorganic insulator-metal, are being considered to produce large scale integrated arrays. The merits and restrictions of metallization systems in current usage and systems under development are defined.

Problem Solvers: Problem--Light It up! and Solutions--Flags by the Numbers

ERIC Educational Resources Information Center

Hall, Shaun

2009-01-01

A simple circuit is created by the continuous flow of electricity through conductors (copper wires) from a source of electrical energy (batteries). "Completing a circuit" means that electricity flows from the energy source through the circuit and, in the case described in this month's problem, causes the light bulb tolight up. The presence of…

Improving Design Efficiency for Large-Scale Heterogeneous Circuits

NASA Astrophysics Data System (ADS)

Gregerson, Anthony

Despite increases in logic density, many Big Data applications must still be partitioned across multiple computing devices in order to meet their strict performance requirements. Among the most demanding of these applications is high-energy physics (HEP), which uses complex computing systems consisting of thousands of FPGAs and ASICs to process the sensor data created by experiments at particles accelerators such as the Large Hadron Collider (LHC). Designing such computing systems is challenging due to the scale of the systems, the exceptionally high-throughput and low-latency performance constraints that necessitate application-specific hardware implementations, the requirement that algorithms are efficiently partitioned across many devices, and the possible need to update the implemented algorithms during the lifetime of the system. In this work, we describe our research to develop flexible architectures for implementing such large-scale circuits on FPGAs. In particular, this work is motivated by (but not limited in scope to) high-energy physics algorithms for the Compact Muon Solenoid (CMS) experiment at the LHC. To make efficient use of logic resources in multi-FPGA systems, we introduce Multi-Personality Partitioning, a novel form of the graph partitioning problem, and present partitioning algorithms that can significantly improve resource utilization on heterogeneous devices while also reducing inter-chip connections. To reduce the high communication costs of Big Data applications, we also introduce Information-Aware Partitioning, a partitioning method that analyzes the data content of application-specific circuits, characterizes their entropy, and selects circuit partitions that enable efficient compression of data between chips. We employ our information-aware partitioning method to improve the performance of the hardware validation platform for evaluating new algorithms for the CMS experiment. Together, these research efforts help to improve the efficiency and decrease the cost of the developing large-scale, heterogeneous circuits needed to enable large-scale application in high-energy physics and other important areas.

Read-In Integrated Circuits for Large-Format Multi-Chip Emitter Arrays

DTIC Science & Technology

2015-03-31

chip has been designed and fabricated using ONSEMI C5N process to verify our approach. Keywords: Large scale arrays; Tiling; Mosaic; Abutment ...required. X and y addressing is not a sustainable and easily expanded addressing architecture nor will it work well with abutted RIICs. Abutment Method... Abutting RIICs into an array is challenging because of the precise positioning required to achieve a uniform image. This problem is a new design

A network flow model for load balancing in circuit-switched multicomputers

NASA Technical Reports Server (NTRS)

Bokhari, Shahid H.

1990-01-01

In multicomputers that utilize circuit switching or wormhole routing, communication overhead depends largely on link contention - the variation due to distance between nodes is negligible. This has a major impact on the load balancing problem. In this case, there are some nodes with excess load (sources) and others with deficit load (sinks) and it is required to find a matching of sources to sinks that avoids contention. The problem is made complex by the hardwired routing on currently available machines: the user can control only which nodes communicate but not how the messages are routed. Network flow models of message flow in the mesh and the hypercube were developed to solve this problem. The crucial property of these models is the correspondence between minimum cost flows and correctly routed messages. To solve a given load balancing problem, a minimum cost flow algorithm is applied to the network. This permits one to determine efficiently a maximum contention free matching of sources to sinks which, in turn, tells one how much of the given imbalance can be eliminated without contention.

A gradient system solution to Potts mean field equations and its electronic implementation.

PubMed

Urahama, K; Ueno, S

1993-03-01

A gradient system solution method is presented for solving Potts mean field equations for combinatorial optimization problems subject to winner-take-all constraints. In the proposed solution method the optimum solution is searched by using gradient descent differential equations whose trajectory is confined within the feasible solution space of optimization problems. This gradient system is proven theoretically to always produce a legal local optimum solution of combinatorial optimization problems. An elementary analog electronic circuit implementing the presented method is designed on the basis of current-mode subthreshold MOS technologies. The core constituent of the circuit is the winner-take-all circuit developed by Lazzaro et al. Correct functioning of the presented circuit is exemplified with simulations of the circuits implementing the scheme for solving the shortest path problems.

Study on Power Loss Reduction Considering Load Variation with Large Penetration of Distributed Generation in Smart Grid

NASA Astrophysics Data System (ADS)

Liu, Chang; Lv, Xiangyu; Guo, Li; Cai, Lixia; Jie, Jinxing; Su, Kuo

2017-05-01

With the increasing of penetration of distributed in the smart grid, the problems that the power loss increasing and short circuit capacity beyond the rated capicity of circuit breaker will become more serious. In this paper, a methodology (Modified BPSO) is presented for network reconfiguration which is based on hybrid approach of Tabu Search and BPSO algorithms to prevent the local convergence and to decrease the calculation time using double fitnesses to consider the constraints. Moreover, an average load simulated method (ALS method) load variation considered is proposed that the average load value is used to instead of the actual load to calculation. Finally, from a case study, the results of simulation certify the approaches will decrease drastically the losses and improve the voltage profiles obviously, at the same time, the short circuit capacity is also decreased into less the shut-off capacity of circuit breaker. The power losses won’t be increased too much even if the short circuit capacity constraint is considered; voltage profiles are better with the constraint of short circuit capacity considering. The ALS method is simple and calculated time is speed.

Solving search problems by strongly simulating quantum circuits

PubMed Central

Johnson, T. H.; Biamonte, J. D.; Clark, S. R.; Jaksch, D.

2013-01-01

Simulating quantum circuits using classical computers lets us analyse the inner workings of quantum algorithms. The most complete type of simulation, strong simulation, is believed to be generally inefficient. Nevertheless, several efficient strong simulation techniques are known for restricted families of quantum circuits and we develop an additional technique in this article. Further, we show that strong simulation algorithms perform another fundamental task: solving search problems. Efficient strong simulation techniques allow solutions to a class of search problems to be counted and found efficiently. This enhances the utility of strong simulation methods, known or yet to be discovered, and extends the class of search problems known to be efficiently simulable. Relating strong simulation to search problems also bounds the computational power of efficiently strongly simulable circuits; if they could solve all problems in P this would imply that all problems in NP and #P could be solved in polynomial time. PMID:23390585

Use of large pieces of printed circuit boards for bioleaching to avoid ‘precipitate contamination problem’ and to simplify overall metal recovery

PubMed Central

Adhapure, N.N.; Dhakephalkar, P.K.; Dhakephalkar, A.P.; Tembhurkar, V.R.; Rajgure, A.V.; Deshmukh, A.M.

2014-01-01

Very recently bioleaching has been used for removing metals from electronic waste. Most of the research has been targeted to using pulverized PCBs for bioleaching where precipitate formed during bioleaching contaminates the pulverized PCB sample and making the overall metal recovery process more complicated. In addition to that, such mixing of pulverized sample with precipitate also creates problems for the final separation of non metallic fraction of PCB sample. In the present investigation we attempted the use of large pieces of printed circuit boards instead of pulverized sample for removal of metals. Use of large pieces of PCBs for bioleaching was restricted due to the chemical coating present on PCBs, the problem has been solved by chemical treatment of PCBs prior to bioleaching. In short,•Large pieces of PCB can be used for bioleaching instead of pulverized PCB sample.•Metallic portion on PCBs can be made accessible to bacteria with prior chemical treatment of PCBs.•Complete metal removal obtained on PCB pieces of size 4 cm × 2.5 cm with the exception of solder traces. The final metal free PCBs (non metallic) can be easily recycled and in this way the overall recycling process (metallic and non metallic part) of PCBs becomes simple. PMID:26150951

Supervised Learning Using Spike-Timing-Dependent Plasticity of Memristive Synapses.

PubMed

Nishitani, Yu; Kaneko, Yukihiro; Ueda, Michihito

2015-12-01

We propose a supervised learning model that enables error backpropagation for spiking neural network hardware. The method is modeled by modifying an existing model to suit the hardware implementation. An example of a network circuit for the model is also presented. In this circuit, a three-terminal ferroelectric memristor (3T-FeMEM), which is a field-effect transistor with a gate insulator composed of ferroelectric materials, is used as an electric synapse device to store the analog synaptic weight. Our model can be implemented by reflecting the network error to the write voltage of the 3T-FeMEMs and introducing a spike-timing-dependent learning function to the device. An XOR problem was successfully demonstrated as a benchmark learning by numerical simulations using the circuit properties to estimate the learning performance. In principle, the learning time per step of this supervised learning model and the circuit is independent of the number of neurons in each layer, promising a high-speed and low-power calculation in large-scale neural networks.

Altered Neuronal and Circuit Excitability in Fragile X Syndrome.

PubMed

Contractor, Anis; Klyachko, Vitaly A; Portera-Cailliau, Carlos

2015-08-19

Fragile X syndrome (FXS) results from a genetic mutation in a single gene yet produces a phenotypically complex disorder with a range of neurological and psychiatric problems. Efforts to decipher how perturbations in signaling pathways lead to the myriad alterations in synaptic and cellular functions have provided insights into the molecular underpinnings of this disorder. From this large body of data, the theme of circuit hyperexcitability has emerged as a potential explanation for many of the neurological and psychiatric symptoms in FXS. The mechanisms for hyperexcitability range from alterations in the expression or activity of ion channels to changes in neurotransmitters and receptors. Contributions of these processes are often brain region and cell type specific, resulting in complex effects on circuit function that manifest as altered excitability. Here, we review the current state of knowledge of the molecular, synaptic, and circuit-level mechanisms underlying hyperexcitability and their contributions to the FXS phenotypes. Copyright © 2015 Elsevier Inc. All rights reserved.

Impact induced depolarization of ferroelectric materials

NASA Astrophysics Data System (ADS)

Agrawal, Vinamra; Bhattacharya, Kaushik

2018-06-01

We study the large deformation dynamic behavior and the associated nonlinear electro-thermo-mechanical coupling exhibited by ferroelectric materials in adiabatic environments. This is motivated by a ferroelectric generator which involves pulsed power generation by loading the ferroelectric material with a shock, either by impact or a blast. Upon impact, a shock wave travels through the material inducing a ferroelectric to nonpolar phase transition giving rise to a large voltage difference in an open circuit situation or a large current in a closed circuit situation. In the first part of this paper, we provide a general continuum mechanical treatment of the situation assuming a sharp phase boundary that is possibly charged. We derive the governing laws, as well as the driving force acting on the phase boundary. In the second part, we use the derived equations and a particular constitutive relation that describes the ferroelectric to nonpolar phase transition to study a uniaxial plate impact problem. We develop a numerical method where the phase boundary is tracked but other discontinuities are captured using a finite volume method. We compare our results with experimental observations to find good agreement. Specifically, our model reproduces the observed exponential rise of charge as well as the resistance dependent Hugoniot. We conclude with a parameter study that provides detailed insight into various aspects of the problem.

Some remarks on the design of transonic tunnels with low levels of flow unsteadiness

NASA Technical Reports Server (NTRS)

Mabey, D. G.

1976-01-01

The principal sources of flow unsteadiness in the circuit of a transonic wind tunnel are presented. Care must be taken to avoid flow separations, acoustic resonances and large scale turbulence. Some problems discussed are the elimination of diffuser separations, the aerodynamic design of coolers and the unsteadiness generated in ventilated working sections.

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability. For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

On the Reliability of Photovoltaic Short-Circuit Current Temperature Coefficient Measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Osterwald, Carl R.; Campanelli, Mark; Kelly, George J.

2015-06-14

The changes in short-circuit current of photovoltaic (PV) cells and modules with temperature are routinely modeled through a single parameter, the temperature coefficient (TC). This parameter is vital for the translation equations used in system sizing, yet in practice is very difficult to measure. In this paper, we discuss these inherent problems and demonstrate how they can introduce unacceptably large errors in PV ratings. A method for quantifying the spectral dependence of TCs is derived, and then used to demonstrate that databases of module parameters commonly contain values that are physically unreasonable. Possible ways to reduce measurement errors are alsomore » discussed.« less

Overcoming limitations of model-based diagnostic reasoning systems

NASA Technical Reports Server (NTRS)

Holtzblatt, Lester J.; Marcotte, Richard A.; Piazza, Richard L.

1989-01-01

The development of a model-based diagnostic system to overcome the limitations of model-based reasoning systems is discussed. It is noted that model-based reasoning techniques can be used to analyze the failure behavior and diagnosability of system and circuit designs as part of the system process itself. One goal of current research is the development of a diagnostic algorithm which can reason efficiently about large numbers of diagnostic suspects and can handle both combinational and sequential circuits. A second goal is to address the model-creation problem by developing an approach for using design models to construct the GMODS model in an automated fashion.

An Active Heater Control Concept to Meet IXO Type Mirror Module Thermal-Structural Distortion Requirement

NASA Technical Reports Server (NTRS)

Choi, Michael

2013-01-01

Flight mirror assemblies (FMAs) of large telescopes, such as the International X-ray Observatory (IXO), have very stringent thermal-structural distortion requirements. The spatial temperature gradient requirement within a FMA could be as small as 0.05 C. Con ventionally, heaters and thermistors are attached to the stray light baffle (SLB), and centralized heater controllers (i.e., heater controller boards located in a large electronics box) are used. Due to the large number of heater harnesses, accommodating and routing them is extremely difficult. The total harness length/mass is very large. This innovation uses a thermally conductive pre-collimator to accommodate heaters and a distributed heater controller approach. It minimizes the harness length and mass, and reduces the problem of routing and accommodating them. Heaters and thermistors are attached to a short (4.67 cm) aluminum portion of the pre-collimator, which is thermally coupled to the SLB. Heaters, which have a very small heater power density, and thermistors are attached to the exterior of all the mirror module walls. The major portion (23.4 cm) of the pre-collimator for the middle and outer modules is made of thin, non-conductive material. It minimizes the view factors from the FMA and heated portion of the precollimator to space. It also minimizes heat conduction from one end of the FMA to the other. Small and multi-channel heater controllers, which have adjustable set points and internal redundancy, are used. They are mounted to the mechanical support structure members adjacent to each module. The IXO FMA, which is 3.3 m in diameter, is an example of a large telescope. If the heater controller boards are centralized, routing and accommodating heater harnesses is extremely difficult. This innovation has the following advantages. It minimizes the length/mass of the heater harness between the heater controllers and heater circuits. It reduces the problem of routing and accommodating the harness on the FMA. It reduces the risk of X-ray attenuation caused by the heater harness. Its adjustable set point capability eliminates the need for survival heater circuits. The operating mode heater circuits can also be used as survival heater circuits. In the non-operating mode, a lower set point is used.

A Generalized Fast Frequency Sweep Algorithm for Coupled Circuit-EM Simulations

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rockway, J D; Champagne, N J; Sharpe, R M

2004-01-14

Frequency domain techniques are popular for analyzing electromagnetics (EM) and coupled circuit-EM problems. These techniques, such as the method of moments (MoM) and the finite element method (FEM), are used to determine the response of the EM portion of the problem at a single frequency. Since only one frequency is solved at a time, it may take a long time to calculate the parameters for wideband devices. In this paper, a fast frequency sweep based on the Asymptotic Wave Expansion (AWE) method is developed and applied to generalized mixed circuit-EM problems. The AWE method, which was originally developed for lumped-loadmore » circuit simulations, has recently been shown to be effective at quasi-static and low frequency full-wave simulations. Here it is applied to a full-wave MoM solver, capable of solving for metals, dielectrics, and coupled circuit-EM problems.« less

Xyce™ Parallel Electronic Simulator Users' Guide, Version 6.5.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik V.; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase -- a message passing parallel implementation -- which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The information herein is subject to change without notice. Copyright © 2002-2016 Sandia Corporation. All rights reserved.« less

A behavioral-level HDL description of SFQ logic circuits for quantitative performance analysis of large-scale SFQ digital systems

NASA Astrophysics Data System (ADS)

Matsuzaki, F.; Yoshikawa, N.; Tanaka, M.; Fujimaki, A.; Takai, Y.

2003-10-01

Recently many single flux quantum (SFQ) logic circuits containing several thousands of Josephson junctions have been designed successfully by using digital domain simulation based on the hard ware description language (HDL). In the present HDL-based design of SFQ circuits, a structure-level HDL description has been used, where circuits are made up of basic gate cells. However, in order to analyze large-scale SFQ digital systems, such as a microprocessor, more higher-level circuit abstraction is necessary to reduce the circuit simulation time. In this paper we have investigated the way to describe functionality of the large-scale SFQ digital circuits by a behavior-level HDL description. In this method, the functionality and the timing of the circuit block is defined directly by describing their behavior by the HDL. Using this method, we can dramatically reduce the simulation time of large-scale SFQ digital circuits.

Two-Capacitor Problem: A More Realistic View.

ERIC Educational Resources Information Center

Powell, R. A.

1979-01-01

Discusses the two-capacitor problem by considering the self-inductance of the circuit used and by determining how well the usual series RC circuit approximates the two-capacitor problem when realistic values of L, C, and R are chosen. (GA)

Quantum simulation of the spin-boson model with a microwave circuit

NASA Astrophysics Data System (ADS)

Leppäkangas, Juha; Braumüller, Jochen; Hauck, Melanie; Reiner, Jan-Michael; Schwenk, Iris; Zanker, Sebastian; Fritz, Lukas; Ustinov, Alexey V.; Weides, Martin; Marthaler, Michael

2018-05-01

We consider superconducting circuits for the purpose of simulating the spin-boson model. The spin-boson model consists of a single two-level system coupled to bosonic modes. In most cases, the model is considered in a limit where the bosonic modes are sufficiently dense to form a continuous spectral bath. A very well known case is the Ohmic bath, where the density of states grows linearly with the frequency. In the limit of weak coupling or large temperature, this problem can be solved numerically. If the coupling is strong, the bosonic modes can become sufficiently excited to make a classical simulation impossible. Here we discuss how a quantum simulation of this problem can be performed by coupling a superconducting qubit to a set of microwave resonators. We demonstrate a possible implementation of a continuous spectral bath with individual bath resonators coupling strongly to the qubit. Applying a microwave drive scheme potentially allows us to access the strong-coupling regime of the spin-boson model. We discuss how the resulting spin relaxation dynamics with different initialization conditions can be probed by standard qubit-readout techniques from circuit quantum electrodynamics.

Large-scale quantum photonic circuits in silicon

NASA Astrophysics Data System (ADS)

Harris, Nicholas C.; Bunandar, Darius; Pant, Mihir; Steinbrecher, Greg R.; Mower, Jacob; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Englund, Dirk

2016-08-01

Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today's classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.

A Corticothalamic Circuit Model for Sound Identification in Complex Scenes

PubMed Central

Otazu, Gonzalo H.; Leibold, Christian

2011-01-01

The identification of the sound sources present in the environment is essential for the survival of many animals. However, these sounds are not presented in isolation, as natural scenes consist of a superposition of sounds originating from multiple sources. The identification of a source under these circumstances is a complex computational problem that is readily solved by most animals. We present a model of the thalamocortical circuit that performs level-invariant recognition of auditory objects in complex auditory scenes. The circuit identifies the objects present from a large dictionary of possible elements and operates reliably for real sound signals with multiple concurrently active sources. The key model assumption is that the activities of some cortical neurons encode the difference between the observed signal and an internal estimate. Reanalysis of awake auditory cortex recordings revealed neurons with patterns of activity corresponding to such an error signal. PMID:21931668

Understanding efficiency limits of dielectric elastomer driver circuitry

NASA Astrophysics Data System (ADS)

Lo, Ho Cheong; Calius, Emilio; Anderson, Iain

2013-04-01

Dielectric elastomers (DEs) can theoretically operate at efficiencies greater than that of electromagnetics. This is due to their unique mode of operation which involves charging and discharging a capacitive load at a few kilovolts (typically 1kV-4kV). Efficient recovery of the electrical energy stored in the capacitance of the DE is essential in achieving favourable efficiencies as actuators or generators. This is not a trivial problem because the DE acts as a voltage source with a low capacity and a large output resistance. These properties are not ideal for a power source, and will reduce the performance of any power conditioning circuit utilizing inductors or transformers. This paper briefly explores how circuit parameters affect the performance of a simple inductor circuit used to transfer energy from a DE to another capacitor. These parameters must be taken into account when designing the driving circuitry to maximize performance.

Modeling selective attention using a neuromorphic analog VLSI device.

PubMed

Indiveri, G

2000-12-01

Attentional mechanisms are required to overcome the problem of flooding a limited processing capacity system with information. They are present in biological sensory systems and can be a useful engineering tool for artificial visual systems. In this article we present a hardware model of a selective attention mechanism implemented on a very large-scale integration (VLSI) chip, using analog neuromorphic circuits. The chip exploits a spike-based representation to receive, process, and transmit signals. It can be used as a transceiver module for building multichip neuromorphic vision systems. We describe the circuits that carry out the main processing stages of the selective attention mechanism and provide experimental data for each circuit. We demonstrate the expected behavior of the model at the system level by stimulating the chip with both artificially generated control signals and signals obtained from a saliency map, computed from an image containing several salient features.

Resonator reset in circuit QED by optimal control for large open quantum systems

NASA Astrophysics Data System (ADS)

Boutin, Samuel; Andersen, Christian Kraglund; Venkatraman, Jayameenakshi; Ferris, Andrew J.; Blais, Alexandre

2017-10-01

We study an implementation of the open GRAPE (gradient ascent pulse engineering) algorithm well suited for large open quantum systems. While typical implementations of optimal control algorithms for open quantum systems rely on explicit matrix exponential calculations, our implementation avoids these operations, leading to a polynomial speedup of the open GRAPE algorithm in cases of interest. This speedup, as well as the reduced memory requirements of our implementation, are illustrated by comparison to a standard implementation of open GRAPE. As a practical example, we apply this open-system optimization method to active reset of a readout resonator in circuit QED. In this problem, the shape of a microwave pulse is optimized such as to empty the cavity from measurement photons as fast as possible. Using our open GRAPE implementation, we obtain pulse shapes, leading to a reset time over 4 times faster than passive reset.

Concrete resource analysis of the quantum linear-system algorithm used to compute the electromagnetic scattering cross section of a 2D target

NASA Astrophysics Data System (ADS)

Scherer, Artur; Valiron, Benoît; Mau, Siun-Chuon; Alexander, Scott; van den Berg, Eric; Chapuran, Thomas E.

2017-03-01

We provide a detailed estimate for the logical resource requirements of the quantum linear-system algorithm (Harrow et al. in Phys Rev Lett 103:150502, 2009) including the recently described elaborations and application to computing the electromagnetic scattering cross section of a metallic target (Clader et al. in Phys Rev Lett 110:250504, 2013). Our resource estimates are based on the standard quantum-circuit model of quantum computation; they comprise circuit width (related to parallelism), circuit depth (total number of steps), the number of qubits and ancilla qubits employed, and the overall number of elementary quantum gate operations as well as more specific gate counts for each elementary fault-tolerant gate from the standard set { X, Y, Z, H, S, T, { CNOT } }. In order to perform these estimates, we used an approach that combines manual analysis with automated estimates generated via the Quipper quantum programming language and compiler. Our estimates pertain to the explicit example problem size N=332{,}020{,}680 beyond which, according to a crude big-O complexity comparison, the quantum linear-system algorithm is expected to run faster than the best known classical linear-system solving algorithm. For this problem size, a desired calculation accuracy ɛ =0.01 requires an approximate circuit width 340 and circuit depth of order 10^{25} if oracle costs are excluded, and a circuit width and circuit depth of order 10^8 and 10^{29}, respectively, if the resource requirements of oracles are included, indicating that the commonly ignored oracle resources are considerable. In addition to providing detailed logical resource estimates, it is also the purpose of this paper to demonstrate explicitly (using a fine-grained approach rather than relying on coarse big-O asymptotic approximations) how these impressively large numbers arise with an actual circuit implementation of a quantum algorithm. While our estimates may prove to be conservative as more efficient advanced quantum-computation techniques are developed, they nevertheless provide a valid baseline for research targeting a reduction of the algorithmic-level resource requirements, implying that a reduction by many orders of magnitude is necessary for the algorithm to become practical.

Modular thought in the circuit analysis

NASA Astrophysics Data System (ADS)

Wang, Feng

2018-04-01

Applied to solve the problem of modular thought, provides a whole for simplification's method, the complex problems have become of, and the study of circuit is similar to the above problems: the complex connection between components, make the whole circuit topic solution seems to be more complex, and actually components the connection between the have rules to follow, this article mainly tells the story of study on the application of the circuit modular thought. First of all, this paper introduces the definition of two-terminal network and the concept of two-terminal network equivalent conversion, then summarizes the common source resistance hybrid network modular approach, containing controlled source network modular processing method, lists the common module, typical examples analysis.

Digital-analog quantum simulation of generalized Dicke models with superconducting circuits

NASA Astrophysics Data System (ADS)

Lamata, Lucas

2017-03-01

We propose a digital-analog quantum simulation of generalized Dicke models with superconducting circuits, including Fermi- Bose condensates, biased and pulsed Dicke models, for all regimes of light-matter coupling. We encode these classes of problems in a set of superconducting qubits coupled with a bosonic mode implemented by a transmission line resonator. Via digital-analog techniques, an efficient quantum simulation can be performed in state-of-the-art circuit quantum electrodynamics platforms, by suitable decomposition into analog qubit-bosonic blocks and collective single-qubit pulses through digital steps. Moreover, just a single global analog block would be needed during the whole protocol in most of the cases, superimposed with fast periodic pulses to rotate and detune the qubits. Therefore, a large number of digital steps may be attained with this approach, providing a reduced digital error. Additionally, the number of gates per digital step does not grow with the number of qubits, rendering the simulation efficient. This strategy paves the way for the scalable digital-analog quantum simulation of many-body dynamics involving bosonic modes and spin degrees of freedom with superconducting circuits.

Digital-analog quantum simulation of generalized Dicke models with superconducting circuits

PubMed Central

Lamata, Lucas

2017-01-01

We propose a digital-analog quantum simulation of generalized Dicke models with superconducting circuits, including Fermi- Bose condensates, biased and pulsed Dicke models, for all regimes of light-matter coupling. We encode these classes of problems in a set of superconducting qubits coupled with a bosonic mode implemented by a transmission line resonator. Via digital-analog techniques, an efficient quantum simulation can be performed in state-of-the-art circuit quantum electrodynamics platforms, by suitable decomposition into analog qubit-bosonic blocks and collective single-qubit pulses through digital steps. Moreover, just a single global analog block would be needed during the whole protocol in most of the cases, superimposed with fast periodic pulses to rotate and detune the qubits. Therefore, a large number of digital steps may be attained with this approach, providing a reduced digital error. Additionally, the number of gates per digital step does not grow with the number of qubits, rendering the simulation efficient. This strategy paves the way for the scalable digital-analog quantum simulation of many-body dynamics involving bosonic modes and spin degrees of freedom with superconducting circuits. PMID:28256559

Genetic programs constructed from layered logic gates in single cells

PubMed Central

Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

2014-01-01

Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

The Management of Cognitive Load During Complex Cognitive Skill Acquisition by Means of Computer-Simulated Problem Solving

ERIC Educational Resources Information Center

Kester, Liesbeth; Kirschner, Paul A.; van Merrienboer, Jeroen J.G.

2005-01-01

This study compared the effects of two information presentation formats on learning to solve problems in electrical circuits. In one condition, the split-source format, information relating to procedural aspects of the functioning of an electrical circuit was not integrated in a circuit diagram, while information in the integrated format condition…

Geometry of Quantum Computation with Qudits

PubMed Central

Luo, Ming-Xing; Chen, Xiu-Bo; Yang, Yi-Xian; Wang, Xiaojun

2014-01-01

The circuit complexity of quantum qubit system evolution as a primitive problem in quantum computation has been discussed widely. We investigate this problem in terms of qudit system. Using the Riemannian geometry the optimal quantum circuits are equivalent to the geodetic evolutions in specially curved parametrization of SU(dn). And the quantum circuit complexity is explicitly dependent of controllable approximation error bound. PMID:24509710

Critical Problems in Very Large Scale Computer Systems

DTIC Science & Technology

1989-09-30

N Massachusetts Institute of Technology Cambridge, Massachusetts 02139 Anant Agarwal (617) 253-1448 William J. Dally (617) 253-6043 Srinivas Devadas ...rapidly switched between the ports. Labelling the terminal voltages ab.c. d. this attempts to enforce a constraint a - b = c - d. This is a reciprocal...Srinivas Devadas and his students have been focusing on the optimization ofcomibinational and sequen- tial circuits specified at the register

PUZZLE - A program for computer-aided design of printed circuit artwork

NASA Technical Reports Server (NTRS)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.

Comparison of modified driver circuit and capacitor-transfer circuit in longitudinally excited N2 laser.

PubMed

Uno, Kazuyuki; Akitsu, Tetsuya; Nakamura, Kenshi; Jitsuno, Takahisa

2013-04-01

We developed a modified driver circuit composed of a capacitance and a spark gap, called a direct-drive circuit, for a longitudinally excited gas laser. The direct-drive circuit uses a large discharge impedance caused by a long discharge length of the longitudinal excitation scheme and eliminates the buffer capacitance used in the traditional capacitor-transfer circuit. We compared the direct-drive circuit and the capacitor-transfer circuit in a longitudinally excited N2 laser (wavelength: 337 nm). Producing high output energy with the capacitor-transfer circuit requires a large storage capacitance and a discharge tube with optimum dimensions (an inner diameter of 4 mm and a length of 10 cm in this work); in contrast, the direct-drive circuit requires a high breakdown voltage, achieved with a small storage capacitance and a large discharge tube. Additionally, for the same input energy of 792 mJ, the maximum output energy of the capacitor-transfer circuit was 174.2 μJ, and that of the direct-drive circuit was 344.7 μJ.

Placement of clock gates in time-of-flight optoelectronic circuits

NASA Astrophysics Data System (ADS)

Feehrer, John R.; Jordan, Harry F.

1995-12-01

Time-of-flight synchronized optoelectronic circuits capitalize on the highly controllable delays of optical waveguides. Circuits have no latches; synchronization is achieved by adjustment of the lengths of waveguides that connect circuit elements. Clock gating and pulse stretching are used to restore timing and power. A functional circuit requires that every feedback loop contain at least one clock gate to prevent cumulative timing drift and power loss. A designer specifies an ideal circuit, which contains no or very few clock gates. To make the circuit functional, we must identify locations in which to place clock gates. Because clock gates are expensive, add area, and increase delay, a minimal set of locations is desired. We cast this problem in graph-theoretical form as the minimum feedback edge set problem and solve it by using an adaptation of an algorithm proposed in 1966 [IEEE Trans. Circuit Theory CT-13, 399 (1966)]. We discuss a computer-aided-design implementation of the algorithm that reduces computational complexity and demonstrate it on a set of circuits.

An approach to determination of shunt circuits parameters for damping vibrations

NASA Astrophysics Data System (ADS)

Matveenko; Iurlova; Oshmarin; Sevodina; Iurlov

2018-04-01

This paper considers the problem of natural vibrations of a deformable structure containing elements made of piezomaterials. The piezoelectric elements are connected through electrodes to an external electric circuit, which consists of resistive, inductive and capacitive elements. Based on the solution of this problem, the parameters of external electric circuits are searched for to allow optimal passive control of the structural vibrations. The solution to the problem is complex natural vibration frequencies, the real part of which corresponds to the circular eigenfrequency of vibrations and the imaginary part corresponds to its damping rate (damping ratio). The analysis of behaviour of the imaginary parts of complex eigenfrequencies in the space of external circuit parameters allows one to damp given modes of structure vibrations. The effectiveness of the proposed approach is demonstrated using a cantilever-clamped plate and a shell structure in the form of a semi-cylinder connected to series resonant ? circuits.

Selection of airgap layers for circuit timing optimization

NASA Astrophysics Data System (ADS)

Hyun, Daijoon; Shin, Youngsoo

2017-03-01

Airgap refers to a void formed in place of some inter metal dielectric (IMD). It brings about the reduction in coupling capacitance, which may contribute to improvement in circuit performance. We introduce two problems in this context. First is to choose the layers, where airgap should be applied, in such a way that total negative slack (TNS) is minimized for a given circuit. This has been motivated by the fact that best choice of airgap layers is different for different circuits. An algorithm is proposed to solve the problem, and is assessed against a naive approach in which airgap layers are simply fixed; additional 8% TNS reduction, on average of a few test circuits, is demonstrated. In the second problem, some wires of critical paths that are on non-airgap layers are reassigned to airgap layers such that TNS is further reduced; additional 3 to 14% of TNS reduction is observed.

A search for optimal parameters of resonance circuits ensuring damping of electroelastic structure vibrations based on the solution of natural vibration problem

NASA Astrophysics Data System (ADS)

Oshmarin, D.; Sevodina, N.; Iurlov, M.; Iurlova, N.

2017-06-01

In this paper, with the aim of providing passive control of structure vibrations a new approach has been proposed for selecting optimal parameters of external electric shunt circuits connected to piezoelectric elements located on the surface of the structure. The approach is based on the mathematical formulation of the natural vibration problem. The results of solution of this problem are the complex eigenfrequencies, the real part of which represents the vibration frequency and the imaginary part corresponds to the damping ratio, characterizing the rate of damping. A criterion of search for optimal parameters of the external passive shunt circuits, which can provide the system with desired dissipative properties, has been derived based on the analysis of responses of the real and imaginary parts of different complex eigenfrequencies to changes in the values of the parameters of the electric circuit. The efficiency of this approach has been verified in the context of natural vibration problem of rigidly clamped plate and semi-cylindrical shell, which is solved for series-connected and parallel -connected external resonance (consisting of resistive and inductive elements) R-L circuits. It has been shown that at lower (more energy-intensive) frequencies, a series-connected external circuit has the advantage of providing lower values of the circuit parameters, which renders it more attractive in terms of practical applications.

Magnetically Controlled Variable Transformer

NASA Technical Reports Server (NTRS)

Kleiner, Charles T.

1994-01-01

Improved variable-transformer circuit, output voltage and current of which controlled by use of relatively small current supplied at relatively low power to control windings on its magnetic cores. Transformer circuits of this type called "magnetic amplifiers" because ratio between controlled output power and power driving control current of such circuit large. This ratio - power gain - can be as large as 100 in present circuit. Variable-transformer circuit offers advantages of efficiency, safety, and controllability over some prior variable-transformer circuits.

Analog self-powered harvester achieving switching pause control to increase harvested energy

NASA Astrophysics Data System (ADS)

Makihara, Kanjuro; Asahina, Kei

2017-05-01

In this paper, we propose a self-powered analog controller circuit to increase the efficiency of electrical energy harvesting from vibrational energy using piezoelectric materials. Although the existing synchronized switch harvesting on inductor (SSHI) method is designed to produce efficient harvesting, its switching operation generates a vibration-suppression effect that reduces the harvested levels of electrical energy. To solve this problem, the authors proposed—in a previous paper—a switching method that takes this vibration-suppression effect into account. This method temporarily pauses the switching operation, allowing the recovery of the mechanical displacement and, therefore, of the piezoelectric voltage. In this paper, we propose a self-powered analog circuit to implement this switching control method. Self-powered vibration harvesting is achieved in this study by attaching a newly designed circuit to an existing analog controller for SSHI. This circuit aims to effectively implement the aforementioned new switching control strategy, where switching is paused in some vibration peaks, in order to allow motion recovery and a consequent increase in the harvested energy. Harvesting experiments performed using the proposed circuit reveal that the proposed method can increase the energy stored in the storage capacitor by a factor of 8.5 relative to the conventional SSHI circuit. This proposed technique is useful to increase the harvested energy especially for piezoelectric systems having large coupling factor.

Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

NASA Astrophysics Data System (ADS)

Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

1995-04-01

While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors complicates the use of feedback circuits. Thus feedback is generally not used in the front-end of our digital process CMOS receivers.

Research on resistance characteristics of YBCO tape under short-time DC large current impact

NASA Astrophysics Data System (ADS)

Zhang, Zhifeng; Yang, Jiabin; Qiu, Qingquan; Zhang, Guomin; Lin, Liangzhen

2017-06-01

Research of the resistance characteristics of YBCO tape under short-time DC large current impact is the foundation of the developing DC superconducting fault current limiter (SFCL) for voltage source converter-based high voltage direct current system (VSC-HVDC), which is one of the valid approaches to solve the problems of renewable energy integration. SFCL can limit DC short-circuit and enhance the interrupting capabilities of DC circuit breakers. In this paper, under short-time DC large current impacts, the resistance features of naked tape of YBCO tape are studied to find the resistance - temperature change rule and the maximum impact current. The influence of insulation for the resistance - temperature characteristics of YBCO tape is studied by comparison tests with naked tape and insulating tape in 77 K. The influence of operating temperature on the tape is also studied under subcooled liquid nitrogen condition. For the current impact security of YBCO tape, the critical current degradation and top temperature are analyzed and worked as judgment standards. The testing results is helpful for in developing SFCL in VSC-HVDC.

Sequencing the Connectome

PubMed Central

Zador, Anthony M.; Dubnau, Joshua; Oyibo, Hassana K.; Zhan, Huiqing; Cao, Gang; Peikon, Ian D.

2012-01-01

Connectivity determines the function of neural circuits. Historically, circuit mapping has usually been viewed as a problem of microscopy, but no current method can achieve high-throughput mapping of entire circuits with single neuron precision. Here we describe a novel approach to determining connectivity. We propose BOINC (“barcoding of individual neuronal connections”), a method for converting the problem of connectivity into a form that can be read out by high-throughput DNA sequencing. The appeal of using sequencing is that its scale—sequencing billions of nucleotides per day is now routine—is a natural match to the complexity of neural circuits. An inexpensive high-throughput technique for establishing circuit connectivity at single neuron resolution could transform neuroscience research. PMID:23109909

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS.

PubMed

Noack, Marko; Partzsch, Johannes; Mayr, Christian G; Hänzsche, Stefan; Scholze, Stefan; Höppner, Sebastian; Ellguth, Georg; Schüffny, Rene

2015-01-01

Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm(2) and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling.

An investigation of the effect of instruction in physics on the formation of mental models for problem-solving in the context of simple electric circuits

NASA Astrophysics Data System (ADS)

Beh, Kian Lim

2000-10-01

This study was designed to explore the effect of a typical traditional method of instruction in physics on the formation of useful mental models among college students for problem-solving using simple electric circuits as a context. The study was also aimed at providing a comprehensive description of the understanding regarding electric circuits among novices and experts. In order to achieve these objectives, the following two research approaches were employed: (1) A students survey to collect data from 268 physics students; and (2) An interview protocol to collect data from 23 physics students and 24 experts (including 10 electrical engineering graduates, 4 practicing electrical engineers, 2 secondary school physics teachers, 8 physics lecturers, and 4 electrical engineers). Among the major findings are: (1) Most students do not possess accurate models of simple electric circuits as presented implicitly in physics textbooks; (2) Most students display good procedural understanding for solving simple problems concerning electric circuits but have no in-depth conceptual understanding in terms of practical knowledge of current, voltage, resistance, and circuit connections; (3) Most students encounter difficulty in discerning parallel connections that are drawn in a non-conventional format; (4) After a year of college physics, students show significant improvement in areas, including practical knowledge of current and voltage, ability to compute effective resistance and capacitance, ability to identify circuit connections, and ability to solve problems; however, no significance was found in practical knowledge of resistance and ability to connect circuits; and (5) The differences and similarities between the physics students and the experts include: (a) Novices perceive parallel circuits more in terms of 'branch', 'current', and 'resistors with the same resistance' while experts perceive parallel circuits more in terms of 'node', 'voltage', and 'less resistance'; and (b) Both novices and experts use phrases such as 'side-by side' and 'one on top of the other' in describing parallel circuits which emphasize the geometry of the standard circuit drawing when describing parallel resistors.

Superconducting quantum circuits at the surface code threshold for fault tolerance.

PubMed

Barends, R; Kelly, J; Megrant, A; Veitia, A; Sank, D; Jeffrey, E; White, T C; Mutus, J; Fowler, A G; Campbell, B; Chen, Y; Chen, Z; Chiaro, B; Dunsworth, A; Neill, C; O'Malley, P; Roushan, P; Vainsencher, A; Wenner, J; Korotkov, A N; Cleland, A N; Martinis, John M

2014-04-24

A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

Printed circuit boards: a review on the perspective of sustainability.

PubMed

Canal Marques, André; Cabrera, José-María; Malfatti, Célia de Fraga

2013-12-15

Modern life increasingly requires newer equipments and more technology. In addition, the fact that society is highly consumerist makes the amount of discarded equipment as well as the amount of waste from the manufacture of new products increase at an alarming rate. Printed circuit boards, which form the basis of the electronics industry, are technological waste of difficult disposal whose recycling is complex and expensive due to the diversity of materials and components and their difficult separation. Currently, printed circuit boards have a fixing problem, which is migrating from traditional Pb-Sn alloys to lead-free alloys without definite choice. This replacement is an attempt to minimize the problem of Pb toxicity, but it does not change the problem of separation of the components for later reuse and/or recycling and leads to other problems, such as temperature rise, delamination, flaws, risks of mechanical shocks and the formation of "whiskers". This article presents a literature review on printed circuit boards, showing their structure and materials, the environmental problem related to the board, some the different alternatives for recycling, and some solutions that are being studied to reduce and/or replace the solder, in order to minimize the impact of solder on the printed circuit boards. Copyright © 2013 Elsevier Ltd. All rights reserved.

Scaling up digital circuit computation with DNA strand displacement cascades.

PubMed

Qian, Lulu; Winfree, Erik

2011-06-03

To construct sophisticated biochemical circuits from scratch, one needs to understand how simple the building blocks can be and how robustly such circuits can scale up. Using a simple DNA reaction mechanism based on a reversible strand displacement process, we experimentally demonstrated several digital logic circuits, culminating in a four-bit square-root circuit that comprises 130 DNA strands. These multilayer circuits include thresholding and catalysis within every logical operation to perform digital signal restoration, which enables fast and reliable function in large circuits with roughly constant switching time and linear signal propagation delays. The design naturally incorporates other crucial elements for large-scale circuitry, such as general debugging tools, parallel circuit preparation, and an abstraction hierarchy supported by an automated circuit compiler.

High voltage MOSFET switching circuit

DOEpatents

McEwan, Thomas E.

1994-01-01

The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

A novel surrogate-based approach for optimal design of electromagnetic-based circuits

NASA Astrophysics Data System (ADS)

Hassan, Abdel-Karim S. O.; Mohamed, Ahmed S. A.; Rabie, Azza A.; Etman, Ahmed S.

2016-02-01

A new geometric design centring approach for optimal design of central processing unit-intensive electromagnetic (EM)-based circuits is introduced. The approach uses norms related to the probability distribution of the circuit parameters to find distances from a point to the feasible region boundaries by solving nonlinear optimization problems. Based on these normed distances, the design centring problem is formulated as a max-min optimization problem. A convergent iterative boundary search technique is exploited to find the normed distances. To alleviate the computation cost associated with the EM-based circuits design cycle, space-mapping (SM) surrogates are used to create a sequence of iteratively updated feasible region approximations. In each SM feasible region approximation, the centring process using normed distances is implemented, leading to a better centre point. The process is repeated until a final design centre is attained. Practical examples are given to show the effectiveness of the new design centring method for EM-based circuits.

Defining biotypes for depression and anxiety based on large-scale circuit dysfunction: A theoretical review of the evidence and future directions for clinical translation

PubMed Central

Williams, Leanne M

2016-01-01

Complex emotional, cognitive and self-reflective functions rely on the activation and connectivity of large-scale neural circuits. These circuits offer a relevant scale of focus for conceptualizing a taxonomy for depression and anxiety based on specific profiles (or biotypes) of neural circuit dysfunction. Here, the theoretical review first outlined the current consensus as to what constitutes the organization of large-scale circuits in the human brain identified using parcellation and meta-analysis. The focus is on neural circuits implicated in resting reflection (“default mode”), detection of “salience”, affective processing (“threat” and “reward”), “attention” and “cognitive control”. Next, the current evidence regarding which type of dysfunctions in these circuits characterize depression and anxiety disorders was reviewed, with an emphasis on published meta-analyses and reviews of circuit dysfunctions that have been identified in at least two well-powered case:control studies. Grounded in the review of these topics, a conceptual framework is proposed for considering neural circuit-defined “biotypes”. In this framework, biotypes are defined by profiles of extent of dysfunction on each large-scale circuit. The clinical implications of a biotype approach for guiding classification and treatment of depression and anxiety is considered. Future research directions will develop the validity and clinical utility of a neural circuit biotype model that spans diagnostic categories and helps to translate neuroscience into clinical practice in the real world. PMID:27653321

Near-optimal quantum circuit for Grover's unstructured search using a transverse field

NASA Astrophysics Data System (ADS)

Jiang, Zhang; Rieffel, Eleanor G.; Wang, Zhihui

2017-06-01

Inspired by a class of algorithms proposed by Farhi et al. (arXiv:1411.4028), namely, the quantum approximate optimization algorithm (QAOA), we present a circuit-based quantum algorithm to search for a needle in a haystack, obtaining the same quadratic speedup achieved by Grover's original algorithm. In our algorithm, the problem Hamiltonian (oracle) and a transverse field are applied alternately to the system in a periodic manner. We introduce a technique, based on spin-coherent states, to analyze the composite unitary in a single period. This composite unitary drives a closed transition between two states that have high degrees of overlap with the initial state and the target state, respectively. The transition rate in our algorithm is of order Θ (1 /√{N }) , and the overlaps are of order Θ (1 ) , yielding a nearly optimal query complexity of T ≃√{N }(π /2 √{2 }) . Our algorithm is a QAOA circuit that demonstrates a quantum advantage with a large number of iterations that is not derived from Trotterization of an adiabatic quantum optimization (AQO) algorithm. It also suggests that the analysis required to understand QAOA circuits involves a very different process from estimating the energy gap of a Hamiltonian in AQO.

Nonreciprocal Signal Routing in an Active Quantum Network

NASA Astrophysics Data System (ADS)

Tureci, Hakan E.; Metelmann, Anja

As superconductor quantum technologies are moving towards large-scale integrated circuits, a robust and flexible approach to routing photons at the quantum level becomes a critical problem. Active circuits, which contain driven linear or non-linear elements judiciously embedded in the circuit offer a viable solution. We present a general strategy for routing non-reciprocally quantum signals between two sites of a given lattice of resonators, implementable with existing superconducting circuit components. Our approach makes use of a dual lattice of superconducting non-linear elements on the links connecting the nodes of the main lattice. Solutions for spatially selective driving of the link-elements can be found, which optimally balance coherent and dissipative hopping of microwave photons to non-reciprocally route signals between two given nodes. In certain lattices these optimal solutions are obtained at the exceptional point of the scattering matrix of the network. The presented strategy provides a design space that is governed by a dynamically tunable non-Hermitian generator that can be used to minimize the added quantum noise as well. This work was supported by the U.S. Army Research Office (ARO) under Grant No. W911NF-15-1-0299.

Axial-Centrifugal Compressor Program

DTIC Science & Technology

1975-10-01

chip detector, but they were not large enough to trigger the alarm circuit. These chips we-e analyzed as M50 bearing material, which was a positive...but an analysis of these particles indicated M50 bearing material and positively identified a thrust bearing problem. 50 ’ ! i VI Figure 18. Load Cel...load cell readout became erratic and the vehicle was shut down. An inspection showed that the aft bearing sump chip detector contained M50 bearing

Large Signal Modeling and Analysis of the GaAs MESFET.

DTIC Science & Technology

1986-07-09

various dimensions and physical parameters. A powerful computer aided design system can be developed by automating the circuit element and parameter...circuit model of the GaAs MESFET to aid in the designs of microwave MESFET circuits. The circuit elements of this model are obtained either directly...34. -. ’ Abstract The purpose of this work is to develop a large signal signal lumped circuit model of the GaAs MESFET to aid In the designs of microwave MESFET

Investigation of noise insensitive electronic circuits for automotive applications with particular regard to MOS circuits

NASA Astrophysics Data System (ADS)

Gorille, I.

1980-11-01

The application of MOS switching circuits of high complexity in essential automobile systems, such as ignition and injection, was investigated. A bipolar circuit technology, current hogging logic (CHL), was compared to MOS technologies for its competitiveness. The functional requirements of digital automotive systems can only be met by technologies allowing large packing densities and medium speeds. The properties of n-MOS and CMOS are promising whereas the electrical power needed by p-MOS circuits is in general prohibitively large.

High voltage MOSFET switching circuit

DOEpatents

McEwan, T.E.

1994-07-26

The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

Assessing Design Activity in Complex CMOS Circuit Design.

ERIC Educational Resources Information Center

Biswas, Gautam; And Others

This report characterizes human problem solving in digital circuit design. Protocols of 11 different designers with varying degrees of training were analyzed by identifying the designers' problem solving strategies and discussing activity patterns that differentiate the designers. These methods are proposed as a tentative basis for assessing…

Resilience of the quantum Rabi model in circuit QED

NASA Astrophysics Data System (ADS)

E Manucharyan, Vladimir; Baksic, Alexandre; Ciuti, Cristiano

2017-07-01

In circuit quantum electrodynamics (circuit QED), an artificial ‘circuit atom’ can couple to a quantized microwave radiation much stronger than its real atomic counterpart. The celebrated quantum Rabi model describes the simplest interaction of a two-level system with a single-mode boson field. When the coupling is large enough, the bare multilevel structure of a realistic circuit atom cannot be ignored even if the circuit is strongly anharmonic. We explored this situation theoretically for flux (fluxonium) and charge (Cooper pair box) type multi-level circuits tuned to their respective flux/charge degeneracy points. We identified which spectral features of the quantum Rabi model survive and which are renormalized for large coupling. Despite significant renormalization of the low-energy spectrum in the fluxonium case, the key quantum Rabi feature—nearly-degenerate vacuum consisting of an atomic state entangled with a multi-photon field—appears in both types of circuits when the coupling is sufficiently large. Like in the quantum Rabi model, for very large couplings the entanglement spectrum is dominated by only two, nearly equal eigenvalues, in spite of the fact that a large number of bare atomic states are actually involved in the atom-resonator ground state. We interpret the emergence of the two-fold degeneracy of the vacuum of both circuits as an environmental suppression of flux/charge tunneling due to their dressing by virtual low-/high-impedance photons in the resonator. For flux tunneling, the dressing is nothing else than the shunting of a Josephson atom with a large capacitance of the resonator. Suppression of charge tunneling is a manifestation of the dynamical Coulomb blockade of transport in tunnel junctions connected to resistive leads.

An Electronics Course Emphasizing Circuit Design

ERIC Educational Resources Information Center

Bergeson, Haven E.

1975-01-01

Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

A floating-point digital receiver for MRI.

PubMed

Hoenninger, John C; Crooks, Lawrence E; Arakawa, Mitsuaki

2002-07-01

A magnetic resonance imaging (MRI) system requires the highest possible signal fidelity and stability for clinical applications. Quadrature analog receivers have problems with channel matching, dc offset and analog-to-digital linearity. Fixed-point digital receivers (DRs) reduce all of these problems. We have demonstrated that a floating-point DR using large (order 124 to 512) FIR low-pass filters also overcomes these problems, automatically provides long word length and has low latency between signals. A preloaded table of finite impuls response (FIR) filter coefficients provides fast switching between one of 129 different one-stage and two-stage multrate FIR low-pass filters with bandwidths between 4 KHz and 125 KHz. This design has been implemented on a dual channel circuit board for a commercial MRI system.

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS

PubMed Central

Noack, Marko; Partzsch, Johannes; Mayr, Christian G.; Hänzsche, Stefan; Scholze, Stefan; Höppner, Sebastian; Ellguth, Georg; Schüffny, Rene

2015-01-01

Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm2 and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling. PMID:25698914

Fast time- and frequency-domain finite-element methods for electromagnetic analysis

NASA Astrophysics Data System (ADS)

Lee, Woochan

Fast electromagnetic analysis in time and frequency domain is of critical importance to the design of integrated circuits (IC) and other advanced engineering products and systems. Many IC structures constitute a very large scale problem in modeling and simulation, the size of which also continuously grows with the advancement of the processing technology. This results in numerical problems beyond the reach of existing most powerful computational resources. Different from many other engineering problems, the structure of most ICs is special in the sense that its geometry is of Manhattan type and its dielectrics are layered. Hence, it is important to develop structure-aware algorithms that take advantage of the structure specialties to speed up the computation. In addition, among existing time-domain methods, explicit methods can avoid solving a matrix equation. However, their time step is traditionally restricted by the space step for ensuring the stability of a time-domain simulation. Therefore, making explicit time-domain methods unconditionally stable is important to accelerate the computation. In addition to time-domain methods, frequency-domain methods have suffered from an indefinite system that makes an iterative solution difficult to converge fast. The first contribution of this work is a fast time-domain finite-element algorithm for the analysis and design of very large-scale on-chip circuits. The structure specialty of on-chip circuits such as Manhattan geometry and layered permittivity is preserved in the proposed algorithm. As a result, the large-scale matrix solution encountered in the 3-D circuit analysis is turned into a simple scaling of the solution of a small 1-D matrix, which can be obtained in linear (optimal) complexity with negligible cost. Furthermore, the time step size is not sacrificed, and the total number of time steps to be simulated is also significantly reduced, thus achieving a total cost reduction in CPU time. The second contribution is a new method for making an explicit time-domain finite-element method (TDFEM) unconditionally stable for general electromagnetic analysis. In this method, for a given time step, we find the unstable modes that are the root cause of instability, and deduct them directly from the system matrix resulting from a TDFEM based analysis. As a result, an explicit TDFEM simulation is made stable for an arbitrarily large time step irrespective of the space step. The third contribution is a new method for full-wave applications from low to very high frequencies in a TDFEM based on matrix exponential. In this method, we directly deduct the eigenmodes having large eigenvalues from the system matrix, thus achieving a significantly increased time step in the matrix exponential based TDFEM. The fourth contribution is a new method for transforming the indefinite system matrix of a frequency-domain FEM to a symmetric positive definite one. We deduct non-positive definite component directly from the system matrix resulting from a frequency-domain FEM-based analysis. The resulting new representation of the finite-element operator ensures an iterative solution to converge in a small number of iterations. We then add back the non-positive definite component to synthesize the original solution with negligible cost.

A method for identifying EMI critical circuits during development of a large C3

NASA Astrophysics Data System (ADS)

Barr, Douglas H.

The circuit analysis methods and process Boeing Aerospace used on a large, ground-based military command, control, and communications (C3) system are described. This analysis was designed to help identify electromagnetic interference (EMI) critical circuits. The methodology used the MIL-E-6051 equipment criticality categories as the basis for defining critical circuits, relational database technology to help sort through and account for all of the approximately 5000 system signal cables, and Macintosh Plus personal computers to predict critical circuits based on safety margin analysis. The EMI circuit analysis process systematically examined all system circuits to identify which ones were likely to be EMI critical. The process used two separate, sequential safety margin analyses to identify critical circuits (conservative safety margin analysis, and detailed safety margin analysis). These analyses used field-to-wire and wire-to-wire coupling models using both worst-case and detailed circuit parameters (physical and electrical) to predict circuit safety margins. This process identified the predicted critical circuits that could then be verified by test.

First-year university Physics students’ knowledge about direct current circuits: probing improvement in understanding as a function of teaching and learning interventions

NASA Astrophysics Data System (ADS)

Newman, Richard; van der Ventel, Brandon; Hanekom, Crischelle

2017-07-01

Probing university students’ understanding of direct-current (DC) resistive circuits is still a field of active physics education research. We report here on a study we conducted of this understanding, where the cohort consisted of students in a large-enrollment first-year physics module. This is a non-calculus based physics module for students in the life sciences stream. The study involved 366 students enrolled in the physics (bio) 154 module at Stellenbosch University in 2015. Students’ understanding of DC resistive circuits was probed by means of a standardized test instrument. The instrument comprises 29 multiple choice questions that students have to answer in ~40 min. Students were required to first complete the standardized test at the start of semester (July 2015). For ease of reference we call this test the pre-test. Students answered the pre-test having no university-level formal exposure to DC circuits in theory or practice. The pre-test therefore served to probe students’ school level knowledge of DC circuits. As the semester progressed students were exposed to a practical (E1), lectures, a prescribed textbook, a tutorial and online videos focusing on DC circuits. The E1 practical required students to solve DC circuit problems by means of physically constructing circuits, algebraically using Kirchhoff's Rules and Ohm’s Law, and by means of simulating circuits using the app iCircuit running on iPads (iOS platform). Each E1 practical involved ~50 students in a three hour session. The practical was repeated three afternoons per week over an eight week period. Twenty three iPads were distributed among students on a practical afternoon in order for them to do the circuit simulations in groups (of 4-5 students). At the end of the practical students were again required to do the standardized test on circuits and complete a survey on their experience of the use of the iPad and iCircuit app. For ease of reference we refer to this second test as the post-test. The students’ average score on the post-test was found to be ~25% higher than their pre-test score. The results of the iPad use survey show that the majority of students felt that the iCircuit app enhanced their learning of DC circuits.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

Critical Problems in Very Large Scale Computer Systems

DTIC Science & Technology

1990-03-31

Srinivas Devadas (617) 253-0454 Thomas F. Knight, Jr. (617) 253-7807 F. Thomson Leighton (617) 253-3662 Charles E. Leiserson (617) 253-5833 Jacob K...Aided Design of Integrated Circuits and Systems, pages 19-29, January 1990. [5] S. Arora, T. Leighton, and B . Maggs. On-line algorithms for path...selection in a non-blocking network. In Proceedings of the 21st Annual ACM Symposium on Theory of Computing, May 1990. To appear. [6] P. Ashar, S. Devadas

Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

NASA Astrophysics Data System (ADS)

Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

2015-03-01

This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

Electric Circuit Theory--Computer Illustrated Text.

ERIC Educational Resources Information Center

Riches, Brian

1990-01-01

Discusses the use of a computer-illustrated text (CIT) with integrated software to teach electric circuit theory to college students. Examples of software use are given, including simple animation, graphical displays, and problem-solving programs. Issues affecting electric circuit theory instruction are also addressed, including mathematical…

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

Conic section function neural network circuitry for offline signature recognition.

PubMed

Erkmen, Burcu; Kahraman, Nihan; Vural, Revna A; Yildirim, Tulay

2010-04-01

In this brief, conic section function neural network (CSFNN) circuitry was designed for offline signature recognition. CSFNN is a unified framework for multilayer perceptron (MLP) and radial basis function (RBF) networks to make simultaneous use of advantages of both. The CSFNN circuitry architecture was developed using a mixed mode circuit implementation. The designed circuit system is problem independent. Hence, the general purpose neural network circuit system could be applied to various pattern recognition problems with different network sizes on condition with the maximum network size of 16-16-8. In this brief, CSFNN circuitry system has been applied to two different signature recognition problems. CSFNN circuitry was trained with chip-in-the-loop learning technique in order to compensate typical analog process variations. CSFNN hardware achieved highly comparable computational performances with CSFNN software for nonlinear signature recognition problems.

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

A machine for haemodialysing very small infants.

PubMed

Everdell, Nicholas L; Coulthard, Malcolm G; Crosier, Jean; Keir, Michael J

2005-05-01

Babies weighing under 6 kg are difficult to dialyse, especially those as small as 1 kg. Peritoneal dialysis is easier than haemodialysis, but is not always possible, and clears molecules less efficiently. Two factors complicate haemodialysis. First, extracorporeal circuits are large relative to a baby's blood volume, necessitating priming with fresh or modified blood. Second, blood flow from infants' access vessels is disproportionately low (Poiseuille's law), causing inadequate dialysis, or clotting within the circuit. These problems are minimised by using single lumen access, a very small circuit, and a reservoir syringe to separate the sampling and dialyser blood flow rates. Its manual operation is tedious, so we developed a computer-controlled, pressure-monitored machine to run it, including adjusting the blood withdrawal rate from poorly sampling lines. We have dialysed four babies weighing 0.8-3.4 kg, with renal failure or metabolic disorders. The circuits did not require priming. Clearances of creatinine, urea, potassium, phosphate and ammonia were mean (SD) 0.54 (0.22) ml/min using one dialyser, and 0.98 (0.22) ml/min using two in parallel. Ammonia clearance in a 2.4 kg baby had a 9 h half-life. Ultrafiltration up to 45 ml/h was achieved easily. This device provided infants with immediate, effective and convenient haemodialysis, typically delivered for prolonged periods.

SF6-alternative gases for application in gas-insulated switchgear

NASA Astrophysics Data System (ADS)

Li, Xingwen; Zhao, Hu; Murphy, Anthony B.

2018-04-01

The environmental problems caused by greenhouse gases have received unprecedented attention. Sulfur hexafluoride (SF6), which is the preferred gas for use in gas-insulated switchgear (circuit breakers, disconnect switches, etc. for high-voltage electrical circuits), has a very high global warming potential, and there is a large international effort to find alternative gases. Recently, this effort has made important progress, with promising alternative gases being identified and tested. An overview, in particular the current state of the art, of the study of SF6-alternative gases is presented in the paper. The review focuses on the application of the SF6-alternative gases in gas-insulated switchgear, with detailed analysis of calculations and measurements of their basic physical properties, dielectric strengths, and arc-quenching capabilities. Finally, a discussion of and perspectives on current research and future research directions are presented.

Complexity of generic biochemical circuits: topology versus strength of interactions.

PubMed

Tikhonov, Mikhail; Bialek, William

2016-12-06

The historical focus on network topology as a determinant of biological function is still largely maintained today, illustrated by the rise of structure-only approaches to network analysis. However, biochemical circuits and genetic regulatory networks are defined both by their topology and by a multitude of continuously adjustable parameters, such as the strength of interactions between nodes, also recognized as important. Here we present a class of simple perceptron-based Boolean models within which comparing the relative importance of topology versus interaction strengths becomes a quantitatively well-posed problem. We quantify the intuition that for generic networks, optimization of interaction strengths is a crucial ingredient of achieving high complexity, defined here as the number of fixed points the network can accommodate. We propose a new methodology for characterizing the relative role of parameter optimization for topologies of a given class.

Steam cycle of the FR2 (in German)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Perinic, D.; Schmidt, T.

1973-01-01

Following a brief explanation of the requirement of the experimental circuit, the use of irradiation and the circuit are described in detail. The installed experimental equipment within the test circuit is described and the safety problems discussed. The operation of the test equipment is summarized. (GE)

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

High-level neutron coincidence counter maintenance manual

DOE Office of Scientific and Technical Information (OSTI.GOV)

Swansen, J.; Collinsworth, P.

1983-05-01

High-level neutron coincidence counter operational (field) calibration and usage is well known. This manual makes explicit basic (shop) check-out, calibration, and testing of new units and is a guide for repair of failed in-service units. Operational criteria for the major electronic functions are detailed, as are adjustments and calibration procedures, and recurrent mechanical/electromechanical problems are addressed. Some system tests are included for quality assurance. Data on nonstandard large-scale integrated (circuit) components and a schematic set are also included.

Temporal Planning for Compilation of Quantum Approximate Optimization Algorithm Circuits

NASA Technical Reports Server (NTRS)

Venturelli, Davide; Do, Minh Binh; Rieffel, Eleanor Gilbert; Frank, Jeremy David

2017-01-01

We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus our initial experiments on Quantum Approximate Optimization Algorithm (QAOA) circuits that have few ordering constraints and allow highly parallel plans. We report on experiments using several temporal planners to compile circuits of various sizes to a realistic hardware. This early empirical evaluation suggests that temporal planning is a viable approach to quantum circuit compilation.

Validation of Symbolic Expressions in Circuit Analysis E-Learning

ERIC Educational Resources Information Center

Weyten, L.; Rombouts, P.; Catteau, B.; De Bock, M.

2011-01-01

Symbolic circuit analysis is a cornerstone of electrical engineering education. Solving a suitable set of selected problems is essential to developing professional skills in the field. A new method is presented for automatic validation of circuit equations representing a student's intermediate steps in the solving process. Providing this immediate…

Technological Literacy Learning with Cumulative and Stepwise Integration of Equations into Electrical Circuit Diagrams

ERIC Educational Resources Information Center

Ozogul, G.; Johnson, A. M.; Moreno, R.; Reisslein, M.

2012-01-01

Technological literacy education involves the teaching of basic engineering principles and problem solving, including elementary electrical circuit analysis, to non-engineering students. Learning materials on circuit analysis typically rely on equations and schematic diagrams, which are often unfamiliar to non-engineering students. The goal of…

Arrays of Carbon Nanotubes as RF Filters in Waveguides

NASA Technical Reports Server (NTRS)

Hoppe, Daniel; Hunt, Brian; Hoenk, Michael; Noca, Flavio; Xu, Jimmy

2003-01-01

Brushlike arrays of carbon nanotubes embedded in microstrip waveguides provide highly efficient (high-Q) mechanical resonators that will enable ultraminiature radio-frequency (RF) integrated circuits. In its basic form, this invention is an RF filter based on a carbon nanotube array embedded in a microstrip (or coplanar) waveguide, as shown in Figure 1. In addition, arrays of these nanotube-based RF filters can be used as an RF filter bank. Applications of this new nanotube array device include a variety of communications and signal-processing technologies. High-Q resonators are essential for stable, low-noise communications, and radar applications. Mechanical oscillators can exhibit orders of magnitude higher Qs than electronic resonant circuits, which are limited by resistive losses. This has motivated the development of a variety of mechanical resonators, including bulk acoustic wave (BAW) resonators, surface acoustic wave (SAW) resonators, and Si and SiC micromachined resonators (known as microelectromechanical systems or MEMS). There is also a strong push to extend the resonant frequencies of these oscillators into the GHz regime of state-of-the-art electronics. Unfortunately, the BAW and SAW devices tend to be large and are not easily integrated into electronic circuits. MEMS structures have been integrated into circuits, but efforts to extend MEMS resonant frequencies into the GHz regime have been difficult because of scaling problems with the capacitively-coupled drive and readout. In contrast, the proposed devices would be much smaller and hence could be more readily incorporated into advanced RF (more specifically, microwave) integrated circuits.

Difference-Equation/Flow-Graph Circuit Analysis

NASA Technical Reports Server (NTRS)

Mcvey, I. M.

1988-01-01

Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.

An Improved Zero Potential Circuit for Readout of a Two-Dimensional Resistive Sensor Array

PubMed Central

Wu, Jian-Feng; Wang, Feng; Wang, Qi; Li, Jian-Qing; Song, Ai-Guo

2016-01-01

With one operational amplifier (op-amp) in negative feedback, the traditional zero potential circuit could access one element in the two-dimensional (2-D) resistive sensor array with the shared row-column fashion but it suffered from the crosstalk problem for the non-scanned elements’ bypass currents, which were injected into array’s non-scanned electrodes from zero potential. Firstly, for suppressing the crosstalk problem, we designed a novel improved zero potential circuit with one more op-amp in negative feedback to sample the total bypass current and calculate the precision resistance of the element being tested (EBT) with it. The improved setting non-scanned-electrode zero potential circuit (S-NSE-ZPC) was given as an example for analyzing and verifying the performance of the improved zero potential circuit. Secondly, in the S-NSE-ZPC and the improved S-NSE-ZPC, the effects of different parameters of the resistive sensor arrays and their readout circuits on the EBT’s measurement accuracy were simulated with the NI Multisim 12. Thirdly, part features of the improved circuit were verified with the experiments of a prototype circuit. Followed, the results were discussed and the conclusions were given. The experiment results show that the improved circuit, though it requires one more op-amp, one more resistor and one more sampling channel, can access the EBT in the 2-D resistive sensor array more accurately. PMID:27929410

An Improved Zero Potential Circuit for Readout of a Two-Dimensional Resistive Sensor Array.

PubMed

Wu, Jian-Feng; Wang, Feng; Wang, Qi; Li, Jian-Qing; Song, Ai-Guo

2016-12-06

With one operational amplifier (op-amp) in negative feedback, the traditional zero potential circuit could access one element in the two-dimensional (2-D) resistive sensor array with the shared row-column fashion but it suffered from the crosstalk problem for the non-scanned elements' bypass currents, which were injected into array's non-scanned electrodes from zero potential. Firstly, for suppressing the crosstalk problem, we designed a novel improved zero potential circuit with one more op-amp in negative feedback to sample the total bypass current and calculate the precision resistance of the element being tested (EBT) with it. The improved setting non-scanned-electrode zero potential circuit (S-NSE-ZPC) was given as an example for analyzing and verifying the performance of the improved zero potential circuit. Secondly, in the S-NSE-ZPC and the improved S-NSE-ZPC, the effects of different parameters of the resistive sensor arrays and their readout circuits on the EBT's measurement accuracy were simulated with the NI Multisim 12. Thirdly, part features of the improved circuit were verified with the experiments of a prototype circuit. Followed, the results were discussed and the conclusions were given. The experiment results show that the improved circuit, though it requires one more op-amp, one more resistor and one more sampling channel, can access the EBT in the 2-D resistive sensor array more accurately.

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

Career Opportunities for Physicists in the Micro Electronics Industry

NASA Astrophysics Data System (ADS)

Bourianoff, George

1997-10-01

The US micro electronics industry anticipates growth of 20 to 30 percent per year for the next five years. The need for engineers and scientists poses a critical problem for the industry but conversely presents great opportunities for those in closely related fields such as physics where career opportunities may be more limited. There is no shortage of important and challenging problems on the Semiconductor Institute of America (SIA) roadmap which will require solution in the next 10 years and which require expertise in the physical sciences. However, significant cultural differences exist between the physics community and the engineering oriented semiconductor community which must be understood and addressed in order for a physicist to successfully contribute in this environment. This talk will identify some of those cultural differences and describe some of the critical physics related problems which must be solved. Critical roadblocks include lithographic patterning below 0.18m. and design of Very Large Scale Integrated (VLSI) circuits in the deep submicron regime. The former will require developing radiation sources and optical elements for the EUV or XRAY part of the spectrum. The latter will require incorporating electromagnetic field equations with traditional lumped element circuit design methods. The cultural barriers alluded to earlier involve the manner in which engineering detail is approached. A physicist's basic instinct is to strip off the detail in order to make a problem mathematically tractable. This enables understanding of the underlying physical relationships but does not yield the quantitative detail necessary in semiconductor production.

CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution

NASA Astrophysics Data System (ADS)

Mallick, S.; Kar, R.; Mandal, D.; Ghoshal, S. P.

2016-07-01

This paper proposes a novel hybrid optimisation algorithm which combines the recently proposed evolutionary algorithm Backtracking Search Algorithm (BSA) with another widely accepted evolutionary algorithm, namely, Differential Evolution (DE). The proposed algorithm called BSA-DE is employed for the optimal designs of two commonly used analogue circuits, namely Complementary Metal Oxide Semiconductor (CMOS) differential amplifier circuit with current mirror load and CMOS two-stage operational amplifier (op-amp) circuit. BSA has a simple structure that is effective, fast and capable of solving multimodal problems. DE is a stochastic, population-based heuristic approach, having the capability to solve global optimisation problems. In this paper, the transistors' sizes are optimised using the proposed BSA-DE to minimise the areas occupied by the circuits and to improve the performances of the circuits. The simulation results justify the superiority of BSA-DE in global convergence properties and fine tuning ability, and prove it to be a promising candidate for the optimal design of the analogue CMOS amplifier circuits. The simulation results obtained for both the amplifier circuits prove the effectiveness of the proposed BSA-DE-based approach over DE, harmony search (HS), artificial bee colony (ABC) and PSO in terms of convergence speed, design specifications and design parameters of the optimal design of the analogue CMOS amplifier circuits. It is shown that BSA-DE-based design technique for each amplifier circuit yields the least MOS transistor area, and each designed circuit is shown to have the best performance parameters such as gain, power dissipation, etc., as compared with those of other recently reported literature.

New Logic Circuit with DC Parametric Excitation

NASA Astrophysics Data System (ADS)

Sugahara, Masanori; Kaneda, Hisayoshi

1982-12-01

It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

Xyce Parallel Electronic Simulator : users' guide, version 2.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hoekstra, Robert John; Waters, Lon J.; Rankin, Eric Lamont

2004-06-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator capable of simulating electrical circuits at a variety of abstraction levels. Primarily, Xyce has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability the current state-of-the-art in the following areas: {sm_bullet} Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers. {sm_bullet} Improved performance for allmore » numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-art algorithms and novel techniques. {sm_bullet} Device models which are specifically tailored to meet Sandia's needs, including many radiation-aware devices. {sm_bullet} A client-server or multi-tiered operating model wherein the numerical kernel can operate independently of the graphical user interface (GUI). {sm_bullet} Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing of computing platforms. These include serial, shared-memory and distributed-memory parallel implementation - which allows it to run efficiently on the widest possible number parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. One feature required by designers is the ability to add device models, many specific to the needs of Sandia, to the code. To this end, the device package in the Xyce These input formats include standard analytical models, behavioral models look-up Parallel Electronic Simulator is designed to support a variety of device model inputs. tables, and mesh-level PDE device models. Combined with this flexible interface is an architectural design that greatly simplifies the addition of circuit models. One of the most important feature of Xyce is in providing a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia now has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods) research and development can be performed. Ultimately, these capabilities are migrated to end users.« less

Photovoltaic module hot spot durability design and test methods

NASA Technical Reports Server (NTRS)

Arnett, J. C.; Gonzalez, C. C.

1981-01-01

As part of the Jet Propulsion Laboratory's Low-Cost Solar Array Project, the susceptibility of fat-plate modules to hot-spot problems is investigated. Hot-spot problems arise in modules when the cells become back-biased and operate in the negative-voltage quadrant, as a result of short-circuit current mismatch, cell cracking or shadowing. The details of a qualification test for determining the capability of modules of surviving field hot-spot problems and typical results of this test are presented. In addition, recommended circuit-design techniques for improving the module and array reliability with respect to hot-spot problems are presented.

Xyce parallel electronic simulator : users' guide.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mei, Ting; Rankin, Eric Lamont; Thornquist, Heidi K.

2011-05-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: (1) Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers; (2) Improved performance for all numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-artmore » algorithms and novel techniques. (3) Device models which are specifically tailored to meet Sandia's needs, including some radiation-aware devices (for Sandia users only); and (4) Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing parallel implementation - which allows it to run efficiently on the widest possible number of computing platforms. These include serial, shared-memory and distributed-memory parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The development of Xyce provides a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods, parallel solver algorithms) research and development can be performed. As a result, Xyce is a unique electrical simulation capability, designed to meet the unique needs of the laboratory.« less

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit.

PubMed

Bougioukos, M; Kouloumentas, Ch; Spyropoulou, M; Giannoulis, G; Kalavrouziotis, D; Maziotis, A; Bakopoulos, P; Harmon, R; Rogers, D; Harrison, J; Poustie, A; Maxwell, G; Avramopoulos, H

2011-06-06

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

Polynomial time blackbox identity testers for depth-3 circuits : the field doesn't matter.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seshadhri, Comandur; Saxena, Nitin

Let C be a depth-3 circuit with n variables, degree d and top fanin k (called {Sigma}{Pi}{Sigma}(k, d, n) circuits) over base field F. It is a major open problem to design a deterministic polynomial time blackbox algorithm that tests if C is identically zero. Klivans & Spielman (STOC 2001) observed that the problem is open even when k is a constant. This case has been subjected to a serious study over the past few years, starting from the work of Dvir & Shpilka (STOC 2005). We give the first polynomial time blackbox algorithm for this problem. Our algorithm runsmore » in time poly(n)d{sup k}, regardless of the base field. The only field for which polynomial time algorithms were previously known is F = Q (Kayal & Saraf, FOCS 2009, and Saxena & Seshadhri, FOCS 2010). This is the first blackbox algorithm for depth-3 circuits that does not use the rank based approaches of Karnin & Shpilka (CCC 2008). We prove an important tool for the study of depth-3 identities. We design a blackbox polynomial time transformation that reduces the number of variables in a {Sigma}{Pi}{Sigma}(k, d, n) circuit to k variables, but preserves the identity structure. Polynomial identity testing (PIT) is a major open problem in theoretical computer science. The input is an arithmetic circuit that computes a polynomial p(x{sub 1}, x{sub 2},..., x{sub n}) over a base field F. We wish to check if p is the zero polynomial, or in other words, is identically zero. We may be provided with an explicit circuit, or may only have blackbox access. In the latter case, we can only evaluate the polynomial p at various domain points. The main goal is to devise a deterministic blackbox polynomial time algorithm for PIT.« less

Feedforward and feedback frequency-dependent interactions in a large-scale laminar network of the primate cortex.

PubMed

Mejias, Jorge F; Murray, John D; Kennedy, Henry; Wang, Xiao-Jing

2016-11-01

Interactions between top-down and bottom-up processes in the cerebral cortex hold the key to understanding attentional processes, predictive coding, executive control, and a gamut of other brain functions. However, the underlying circuit mechanism remains poorly understood and represents a major challenge in neuroscience. We approached this problem using a large-scale computational model of the primate cortex constrained by new directed and weighted connectivity data. In our model, the interplay between feedforward and feedback signaling depends on the cortical laminar structure and involves complex dynamics across multiple (intralaminar, interlaminar, interareal, and whole cortex) scales. The model was tested by reproducing, as well as providing insights into, a wide range of neurophysiological findings about frequency-dependent interactions between visual cortical areas, including the observation that feedforward pathways are associated with enhanced gamma (30 to 70 Hz) oscillations, whereas feedback projections selectively modulate alpha/low-beta (8 to 15 Hz) oscillations. Furthermore, the model reproduces a functional hierarchy based on frequency-dependent Granger causality analysis of interareal signaling, as reported in recent monkey and human experiments, and suggests a mechanism for the observed context-dependent hierarchy dynamics. Together, this work highlights the necessity of multiscale approaches and provides a modeling platform for studies of large-scale brain circuit dynamics and functions.

Feedforward and feedback frequency-dependent interactions in a large-scale laminar network of the primate cortex

PubMed Central

Mejias, Jorge F.; Murray, John D.; Kennedy, Henry; Wang, Xiao-Jing

2016-01-01

Interactions between top-down and bottom-up processes in the cerebral cortex hold the key to understanding attentional processes, predictive coding, executive control, and a gamut of other brain functions. However, the underlying circuit mechanism remains poorly understood and represents a major challenge in neuroscience. We approached this problem using a large-scale computational model of the primate cortex constrained by new directed and weighted connectivity data. In our model, the interplay between feedforward and feedback signaling depends on the cortical laminar structure and involves complex dynamics across multiple (intralaminar, interlaminar, interareal, and whole cortex) scales. The model was tested by reproducing, as well as providing insights into, a wide range of neurophysiological findings about frequency-dependent interactions between visual cortical areas, including the observation that feedforward pathways are associated with enhanced gamma (30 to 70 Hz) oscillations, whereas feedback projections selectively modulate alpha/low-beta (8 to 15 Hz) oscillations. Furthermore, the model reproduces a functional hierarchy based on frequency-dependent Granger causality analysis of interareal signaling, as reported in recent monkey and human experiments, and suggests a mechanism for the observed context-dependent hierarchy dynamics. Together, this work highlights the necessity of multiscale approaches and provides a modeling platform for studies of large-scale brain circuit dynamics and functions. PMID:28138530

MIDAS prototype Multispectral Interactive Digital Analysis System for large area earth resources surveys. Volume 2: Charge coupled device investigation

NASA Technical Reports Server (NTRS)

Kriegler, F.; Marshall, R.; Sternberg, S.

1976-01-01

MIDAS is a third-generation, fast, low cost, multispectral recognition system able to keep pace with the large quantity and high rates of data acquisition from large regions with present and projected sensors. MIDAS, for example, can process a complete ERTS frame in forty seconds and provide a color map of sixteen constituent categories in a few minutes. A principal objective of the MIDAS Program is to provide a system well interfaced with the human operator and thus to obtain large overall reductions in turn-around time and significant gains in throughput. The need for advanced onboard spacecraft processing of remotely sensed data is stated and approaches to this problem are described which are feasible through the use of charge coupled devices. Tentative mechanizations for the required processing operations are given in large block form. These initial designs can serve as a guide to circuit/system designers.

White LED visible light communication technology research

NASA Astrophysics Data System (ADS)

Yang, Chao

2017-03-01

Visible light communication is a new type of wireless optical communication technology. White LED to the success of development, the LED lighting technology is facing a new revolution. Because the LED has high sensitivity, modulation, the advantages of good performance, large transmission power, can make it in light transmission light signal at the same time. Use white LED light-emitting characteristics, on the modulation signals to the visible light transmission, can constitute a LED visible light communication system. We built a small visible optical communication system. The system composition and structure has certain value in the field of practical application, and we also research the key technology of transmitters and receivers, the key problem has been resolved. By studying on the optical and LED the characteristics of a high speed modulation driving circuit and a high sensitive receiving circuit was designed. And information transmission through the single chip microcomputer test, a preliminary verification has realized the data transmission function.

[A young child with respiratory acidosis and hypoxia from mechanical ventilation with equipment made for adults].

PubMed

Joor, Fleur; Markhorst, Dick G; Kneyber, Martin C J; van Heerde, Marc

2011-01-01

During mechanical ventilation of young children, problems may arise due to the additional dead space of the ventilation circuit. This may lead to respiratory acidosis and even hypoxia in the child. A 3-month-old boy suffered from frequent apnoea. He was mechanically ventilated for this. Shortly after its initiation, he developed severe respiratory acidosis, hypoxemia and circulatory insufficiency. This was due to a large additional dead space caused by the use of equipment components made for adults. After he was switched to a circuit suitable for himself, he recovered rapidly. As a rule of thumb, an additional dead space of 1.5-2 ml/kg body weight is acceptable in young children. Emergency wards for young children should have specific equipment to mechanically ventilate them, and have a protocol paying explicit attention to the dead space.

All-IP-Ethernet architecture for real-time sensor-fusion processing

NASA Astrophysics Data System (ADS)

Hiraki, Kei; Inaba, Mary; Tezuka, Hiroshi; Tomari, Hisanobu; Koizumi, Kenichi; Kondo, Shuya

2016-03-01

Serendipter is a device that distinguishes and selects very rare particles and cells from huge amount of population. We are currently designing and constructing information processing system for a Serendipter. The information processing system for Serendipter is a kind of sensor-fusion system but with much more difficulties: To fulfill these requirements, we adopt All IP based architecture: All IP-Ethernet based data processing system consists of (1) sensor/detector directly output data as IP-Ethernet packet stream, (2) single Ethernet/TCP/IP streams by a L2 100Gbps Ethernet switch, (3) An FPGA board with 100Gbps Ethernet I/F connected to the switch and a Xeon based server. Circuits in the FPGA include 100Gbps Ethernet MAC, buffers and preprocessing, and real-time Deep learning circuits using multi-layer neural networks. Proposed All-IP architecture solves existing problem to construct large-scale sensor-fusion systems.

Thermal Peak Management Using Organic Phase Change Materials for Latent Heat Storage in Electronic Applications

PubMed Central

Maxa, Jacob; Novikov, Andrej; Nowottnick, Mathias

2017-01-01

Modern high power electronics devices consists of a large amount of integrated circuits for switching and supply applications. Beside the benefits, the technology exhibits the problem of an ever increasing power density. Nowadays, heat sinks that are directly mounted on a device, are used to reduce the on-chip temperature and dissipate the thermal energy to the environment. This paper presents a concept of a composite coating for electronic components on printed circuit boards or electronic assemblies that is able to buffer a certain amount of thermal energy, dissipated from a device. The idea is to suppress temperature peaks in electronic components during load peaks or electronic shorts, which otherwise could damage or destroy the device, by using a phase change material to buffer the thermal energy. The phase change material coating could be directly applied on the chip package or the PCB using different mechanical retaining jigs.

Neural net diagnostics for VLSI test

NASA Technical Reports Server (NTRS)

Lin, T.; Tseng, H.; Wu, A.; Dogan, N.; Meador, J.

1990-01-01

This paper discusses the application of neural network pattern analysis algorithms to the IC fault diagnosis problem. A fault diagnostic is a decision rule combining what is known about an ideal circuit test response with information about how it is distorted by fabrication variations and measurement noise. The rule is used to detect fault existence in fabricated circuits using real test equipment. Traditional statistical techniques may be used to achieve this goal, but they can employ unrealistic a priori assumptions about measurement data. Our approach to this problem employs an adaptive pattern analysis technique based on feedforward neural networks. During training, a feedforward network automatically captures unknown sample distributions. This is important because distributions arising from the nonlinear effects of process variation can be more complex than is typically assumed. A feedforward network is also able to extract measurement features which contribute significantly to making a correct decision. Traditional feature extraction techniques employ matrix manipulations which can be particularly costly for large measurement vectors. In this paper we discuss a software system which we are developing that uses this approach. We also provide a simple example illustrating the use of the technique for fault detection in an operational amplifier.

Evaluating waste printed circuit boards recycling: Opportunities and challenges, a mini review.

PubMed

Awasthi, Abhishek Kumar; Zlamparet, Gabriel Ionut; Zeng, Xianlai; Li, Jinhui

2017-04-01

Rapid generation of waste printed circuit boards has become a very serious issue worldwide. Numerous techniques have been developed in the last decade to resolve the pollution from waste printed circuit boards, and also recover valuable metals from the waste printed circuit boards stream on a large-scale. However, these techniques have their own certain specific drawbacks that need to be rectified properly. In this review article, these recycling technologies are evaluated based on a strength, weaknesses, opportunities and threats analysis. Furthermore, it is warranted that, the substantial research is required to improve the current technologies for waste printed circuit boards recycling in the outlook of large-scale applications.

System and method for interfacing large-area electronics with integrated circuit devices

DOEpatents

Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

2016-07-12

A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

Sensitivity and Switching Delay in Trigger Circuits; SENSIBILITA E RITARDO ENI CIRCUITI A SCATTO

DOE Office of Scientific and Technical Information (OSTI.GOV)

De Lotto, I.; Stanchi, L.

The problem of regeneration in trigger circuits is studied, particularly in relation to switching delay and switching time. The factors that affect the speed, such as the threshold as a function of the input signal duration, are examined. The sensitivity of the circuit is also discussed. The characteristics of the dipole equivalent to a trigger circuit are determined, and the switching delay and switching rise time are examined using considerable simplifications (circuits with constant parameters) and graphical methods. For the particular case of a transistor circuit, the equation of the equivalent circuit is derived taking into account the nonlinearity ofmore » the parameters. This equation is processed by means of an analog computer. Using experimental data, the circuits are classified according to their sensitivity and the switching delay. A merit figure is obtained for synthetically evaluating different circuits and optimizing circuit sensitivity and speed. (auth)« less

NASA Communications Division (NASCOM) Tracking and Data Relay Satellite System (TDRSS) shuttle multiplexer-demultiplexer data system (MDM) and supporting items

NASA Technical Reports Server (NTRS)

New, S. R.

1981-01-01

The multiplexer-demultiplexer (MDM) project included the design, documentation, manufacture, and testing of three MDM Data Systems. The equipment is contained in 59 racks, and includes more than 3,000 circuit boards and 600 microprocessors. Spares, circuit card testers, a master set of programmable integrated circuits, and a program development system were included as deliverables. All three MDM's were installed, and were operationally tested. The systems performed well with no major problems. The progress and problems analysis, addresses schedule conformance, new technology, items awaiting government approval, and project conclusions are summarized. All contract modifications are described.

NASA Communications Division (NASCOM) Tracking and Data Relay Satellite System (TDRSS) shuttle multiplexer-demultiplexer data system (MDM) and supporting items

NASA Astrophysics Data System (ADS)

New, S. R.

1981-06-01

The multiplexer-demultiplexer (MDM) project included the design, documentation, manufacture, and testing of three MDM Data Systems. The equipment is contained in 59 racks, and includes more than 3,000 circuit boards and 600 microprocessors. Spares, circuit card testers, a master set of programmable integrated circuits, and a program development system were included as deliverables. All three MDM's were installed, and were operationally tested. The systems performed well with no major problems. The progress and problems analysis, addresses schedule conformance, new technology, items awaiting government approval, and project conclusions are summarized. All contract modifications are described.

Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics.

PubMed

Yu, Lili; El-Damak, Dina; Radhakrishna, Ujwal; Ling, Xi; Zubair, Ahmad; Lin, Yuxuan; Zhang, Yuhao; Chuang, Meng-Hsi; Lee, Yi-Hsien; Antoniadis, Dimitri; Kong, Jing; Chandrakasan, Anantha; Palacios, Tomas

2016-10-12

Two-dimensional electronics based on single-layer (SL) MoS 2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS 2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS 2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.

Digital-analog quantum simulation of generalized Dicke models with superconducting circuits

NASA Astrophysics Data System (ADS)

Lamata, Lucas

We propose a digital-analog quantum simulation of generalized Dicke models with superconducting circuits, including Fermi-Bose condensates, biased and pulsed Dicke models, for all regimes of light-matter coupling. We encode these classes of problems in a set of superconducting qubits coupled with a bosonic mode implemented by a transmission line resonator. Via digital-analog techniques, an efficient quantum simulation can be performed in state-of-the-art circuit quantum electrodynamics platforms, by suitable decomposition into analog qubit-bosonic blocks and collective single-qubit pulses through digital steps. Moreover, just a single global analog block would be needed during the whole protocol in most of the cases, superimposed with fast periodic pulses to rotate and detune the qubits. Therefore, a large number of digital steps may be attained with this approach, providing a reduced digital error. Additionally, the number of gates per digital step does not grow with the number of qubits, rendering the simulation efficient. This strategy paves the way for the scalable digital-analog quantum simulation of many-body dynamics involving bosonic modes and spin degrees of freedom with superconducting circuits. The author wishes to acknowledge discussions with I. Arrazola, A. Mezzacapo, J. S. Pedernales, and E. Solano, and support from Ramon y Cajal Grant RYC-2012-11391, Spanish MINECO/FEDER FIS2015-69983-P, UPV/EHU UFI 11/55 and Project EHUA14/04.

A Physics-Based Engineering Methodology for Calculating Soft Error Rates of Bulk CMOS and SiGe Heterojunction Bipolar Transistor Integrated Circuits

NASA Astrophysics Data System (ADS)

Fulkerson, David E.

2010-02-01

This paper describes a new methodology for characterizing the electrical behavior and soft error rate (SER) of CMOS and SiGe HBT integrated circuits that are struck by ions. A typical engineering design problem is to calculate the SER of a critical path that commonly includes several circuits such as an input buffer, several logic gates, logic storage, clock tree circuitry, and an output buffer. Using multiple 3D TCAD simulations to solve this problem is too costly and time-consuming for general engineering use. The new and simple methodology handles the problem with ease by simple SPICE simulations. The methodology accurately predicts the measured threshold linear energy transfer (LET) of a bulk CMOS SRAM. It solves for circuit currents and voltage spikes that are close to those predicted by expensive 3D TCAD simulations. It accurately predicts the measured event cross-section vs. LET curve of an experimental SiGe HBT flip-flop. The experimental cross section vs. frequency behavior and other subtle effects are also accurately predicted.

Delay test generation for synchronous sequential circuits

NASA Astrophysics Data System (ADS)

Devadas, Srinivas

1989-05-01

We address the problem of generating tests for delay faults in non-scan synchronous sequential circuits. Delay test generation for sequential circuits is a considerably more difficult problem than delay testing of combinational circuits and has received much less attention. In this paper, we present a method for generating test sequences to detect delay faults in sequential circuits using the stuck-at fault sequential test generator STALLION. The method is complete in that it will generate a delay test sequence for a targeted fault given sufficient CPU time, if such a sequence exists. We term faults for which no delay test sequence exists, under out test methodology, sequentially delay redundant. We describe means of eliminating sequential delay redundancies in logic circuits. We present a partial-scan methodology for enhancing the testability of difficult-to-test of untestable sequential circuits, wherein a small number of flip-flops are selected and made controllable/observable. The selection process guarantees the elimination of all sequential delay redundancies. We show that an intimate relationship exists between state assignment and delay testability of a sequential machine. We describe a state assignment algorithm for the synthesis of sequential machines with maximal delay fault testability. Preliminary experimental results using the test generation, partial-scan and synthesis algorithm are presented.

Excitation of parasitic waves in forward-wave amplifiers with weak guiding fields.

PubMed

Nusinovich, G S; Romero-Talamás, C A; Han, Y

2012-12-01

To produce high-power coherent electromagnetic radiation at frequencies from microwaves up to terahertz, the radiation sources should have interaction circuits of large cross sections, i.e., the sources should operate in high-order modes. In such devices, the excitation of higher-order parasitic modes near cutoff where the group velocity is small and, hence, start currents are low can be a serious problem. The problem is especially severe in the sources of coherent, phase-controlled radiation, i.e., the amplifiers or phase-locked oscillators. This problem was studied earlier [Nusinovich, Sinitsyn, and Antonsen, Phys. Rev. E 82, 046404 (2010)] for the case of electron focusing by strong guiding magnetic fields. For many applications it is desirable to minimize these focusing fields. Therefore in this paper we analyze the problem of excitation of parasitic modes near cutoff in forward-wave amplifiers with weak focusing fields. First, we study the large-signal operation of such a device with a signal wave only. Then, we analyze the self-excitation conditions of parasitic waves near cutoff in the presence of the signal wave. It is shown that the main effect is the suppression of the parasitic wave in large-signal regimes. At the same time, there is a region of device parameters where the presence of signal waves can enhance excitation of parasitic modes. The role of focusing fields in such effects is studied.

Leakage current-induced effects in the silicon microstrip and gas electron multiplier readout chain and their compensation method

NASA Astrophysics Data System (ADS)

Zubrzycka, W.; Kasinski, K.

2018-04-01

Leakage current flowing into the charge sensitive amplifier (CSA) is a common issue in many radiation detection systems as it can increase overall system noise, shift a DC baseline or even lead a recording channel to instability. The commonly known leakage current contributor is a detector, however other system components like wires or an input protection circuit may become a serious problem. Compensation of the leakage current resulting from the electrostatic discharge (ESD) protection circuit by properly sizing its components is possible only for a narrow temperature range. Moreover, the leakage current from external sources can be significantly larger. Many applications, especially High Energy Physics (HEP) experiments, require a fast baseline restoration for high input hit rates by applying either a low-value feedback resistor or a high feedback resistance combined with a pulsed reset circuit. Leakage current flowing in the feedback in conjunction with a large feedback resistance supplied with a pulsed reset results in a significant voltage offset between the CSA input and output which can cause problems (e.g. fake hits or instability). This paper shows an issue referred to the leakage current of the ESD protection circuit flowing into the input amplifier. The following analysis and proposed solution is a result of the time and energy readout ASIC project realization for the Compressed Baryonic Matter (CBM) experiment at FAIR (Facility for Antiproton and Ion Research) in Darmstadt, Germany. This chip is purposed to work with microstrip and gaseous detectors, with high average input pulses frequencies (250 kHit/s per channel) and the possibility to process input charge of both polarities. We present measurements of the test structure fabricated in UMC 180 nm technology and propose a solution addressing leakage current related issues. This work combines the leakage current compensation capabilities at the CSA level with high, controllable value of the amplifier feedback resistor independent of the leakage current level and polarity. The simulation results of the double, switchable, Krummenacher circuit-based feedback application in the CSA with a pulsed reset functionality are presented.

Evolutionary Multiobjective Design Targeting a Field Programmable Transistor Array

NASA Technical Reports Server (NTRS)

Aguirre, Arturo Hernandez; Zebulum, Ricardo S.; Coello, Carlos Coello

2004-01-01

This paper introduces the ISPAES algorithm for circuit design targeting a Field Programmable Transistor Array (FPTA). The use of evolutionary algorithms is common in circuit design problems, where a single fitness function drives the evolution process. Frequently, the design problem is subject to several goals or operating constraints, thus, designing a suitable fitness function catching all requirements becomes an issue. Such a problem is amenable for multi-objective optimization, however, evolutionary algorithms lack an inherent mechanism for constraint handling. This paper introduces ISPAES, an evolutionary optimization algorithm enhanced with a constraint handling technique. Several design problems targeting a FPTA show the potential of our approach.

Magellan/Galileo solder joint failure analysis and recommendations

NASA Technical Reports Server (NTRS)

Ross, Ronald G., Jr.

1989-01-01

On or about November 10, 1988 an open circuit solder joint was discovered in the Magellan Radar digital unit (DFU) during integration testing at Kennedy Space Center (KSC). A detailed analysis of the cause of the failure was conducted at the Jet Propulsion Laboratory leading to the successful repair of many pieces of affected electronic hardware on both the Magellan and Galileo spacecraft. The problem was caused by the presence of high thermal coefficient of expansion heat sink and conformal coating materials located in the large (0.055 inch) gap between Dual Inline Packages (DIPS) and the printed wiring board. The details of the observed problems are described and recommendations are made for improved design and testing activities in the future.

Advances in two photon scanning and scanless microscopy technologies for functional neural circuit imaging.

PubMed

Schultz, Simon R; Copeland, Caroline S; Foust, Amanda J; Quicke, Peter; Schuck, Renaud

2017-01-01

Recent years have seen substantial developments in technology for imaging neural circuits, raising the prospect of large scale imaging studies of neural populations involved in information processing, with the potential to lead to step changes in our understanding of brain function and dysfunction. In this article we will review some key recent advances: improved fluorophores for single cell resolution functional neuroimaging using a two photon microscope; improved approaches to the problem of scanning active circuits; and the prospect of scanless microscopes which overcome some of the bandwidth limitations of current imaging techniques. These advances in technology for experimental neuroscience have in themselves led to technical challenges, such as the need for the development of novel signal processing and data analysis tools in order to make the most of the new experimental tools. We review recent work in some active topics, such as region of interest segmentation algorithms capable of demixing overlapping signals, and new highly accurate algorithms for calcium transient detection. These advances motivate the development of new data analysis tools capable of dealing with spatial or spatiotemporal patterns of neural activity, that scale well with pattern size.

Advances in two photon scanning and scanless microscopy technologies for functional neural circuit imaging

PubMed Central

Schultz, Simon R.; Copeland, Caroline S.; Foust, Amanda J.; Quicke, Peter; Schuck, Renaud

2017-01-01

Recent years have seen substantial developments in technology for imaging neural circuits, raising the prospect of large scale imaging studies of neural populations involved in information processing, with the potential to lead to step changes in our understanding of brain function and dysfunction. In this article we will review some key recent advances: improved fluorophores for single cell resolution functional neuroimaging using a two photon microscope; improved approaches to the problem of scanning active circuits; and the prospect of scanless microscopes which overcome some of the bandwidth limitations of current imaging techniques. These advances in technology for experimental neuroscience have in themselves led to technical challenges, such as the need for the development of novel signal processing and data analysis tools in order to make the most of the new experimental tools. We review recent work in some active topics, such as region of interest segmentation algorithms capable of demixing overlapping signals, and new highly accurate algorithms for calcium transient detection. These advances motivate the development of new data analysis tools capable of dealing with spatial or spatiotemporal patterns of neural activity, that scale well with pattern size. PMID:28757657

Influence of Gap Distance on Vacuum Arc Characteristics of Cup Type AMF Electrode in Vacuum Interrupters

NASA Astrophysics Data System (ADS)

Cheng, Shaoyong; Xiu, Shixin; Wang, Jimei; Shen, Zhengchao

2006-11-01

The greenhouse effect of SF6 is a great concern today. The development of high voltage vacuum circuit breakers becomes more important. The vacuum circuit breaker has minimum pollution to the environment. The vacuum interrupter is the key part of a vacuum circuit breaker. The interrupting characteristics in vacuum and arc-controlling technique are the main problems to be solved for a longer gap distance in developing high voltage vacuum interrupters. To understand the vacuum arc characteristics and provide effective technique to control vacuum arc in a long gap distance, the arc mode transition of a cup-type axial magnetic field electrode is observed by a high-speed charge coupled device (CCD) video camera under different gap distances while the arc voltage and arc current are recorded. The controlling ability of the axial magnetic field on vacuum arc obviously decreases when the gap distance is longer than 40 mm. The noise components and mean value of the arc voltage significantly increase. The effective method for controlling the vacuum arc characteristics is provided by long gap distances based on the test results. The test results can be used as a reference to develop high voltage and large capacity vacuum interrupters.

Readout circuit with novel background suppression for long wavelength infrared focal plane arrays

NASA Astrophysics Data System (ADS)

Xie, L.; Xia, X. J.; Zhou, Y. F.; Wen, Y.; Sun, W. F.; Shi, L. X.

2011-02-01

In this article, a novel pixel readout circuit using a switched-capacitor integrator mode background suppression technique is presented for long wavelength infrared focal plane arrays. This circuit can improve dynamic range and signal-to-noise ratio by suppressing the large background current during integration. Compared with other background suppression techniques, the new background suppression technique is less sensitive to the process mismatch and has no additional shot noise. The proposed circuit is theoretically analysed and simulated while taking into account the non-ideal characteristics. The result shows that the background suppression non-uniformity is ultra-low even for a large process mismatch. The background suppression non-uniformity of the proposed circuit can also remain very small with technology scaling.

Implementation of heaters on thermally actuated spacecraft mechanisms

NASA Technical Reports Server (NTRS)

Busch, John D.; Bokaie, Michael D.

1994-01-01

This paper presents general insight into the design and implementation of heaters as used in actuating mechanisms for spacecraft. Problems and considerations that were encountered during development of the Deep Space Probe and Science Experiment (DSPSE) solar array release mechanism are discussed. Obstacles included large expected fluctuations in ambient temperature, variations in voltage supply levels outgassing concerns, heater circuit design, materials selection, and power control options. Successful resolution of these issues helped to establish a methodology which can be applied to many of the heater design challenges found in thermally actuated mechanisms.

PCB-level Electro thermal Coupling Simulation Analysis

NASA Astrophysics Data System (ADS)

Zhou, Runjing; Shao, Xuchen

2017-10-01

Power transmission network needs to transmit more current with the increase of the power density. The problem of temperature rise and the reliability is becoming more and more serious. In order to accurately design the power supply system, we must consider the influence of the power supply system including Joule heat, air convection and other factors. Therefore, this paper analyzes the relationship between the electric circuit and the thermal circuit on the basis of the theory of electric circuit and thermal circuit.

Artificial immune system algorithm in VLSI circuit configuration

NASA Astrophysics Data System (ADS)

Mansor, Mohd. Asyraf; Sathasivam, Saratha; Kasihmuddin, Mohd Shareduwan Mohd

2017-08-01

In artificial intelligence, the artificial immune system is a robust bio-inspired heuristic method, extensively used in solving many constraint optimization problems, anomaly detection, and pattern recognition. This paper discusses the implementation and performance of artificial immune system (AIS) algorithm integrated with Hopfield neural networks for VLSI circuit configuration based on 3-Satisfiability problems. Specifically, we emphasized on the clonal selection technique in our binary artificial immune system algorithm. We restrict our logic construction to 3-Satisfiability (3-SAT) clauses in order to outfit with the transistor configuration in VLSI circuit. The core impetus of this research is to find an ideal hybrid model to assist in the VLSI circuit configuration. In this paper, we compared the artificial immune system (AIS) algorithm (HNN-3SATAIS) with the brute force algorithm incorporated with Hopfield neural network (HNN-3SATBF). Microsoft Visual C++ 2013 was used as a platform for training, simulating and validating the performances of the proposed network. The results depict that the HNN-3SATAIS outperformed HNN-3SATBF in terms of circuit accuracy and CPU time. Thus, HNN-3SATAIS can be used to detect an early error in the VLSI circuit design.

Digital logic circuits in yeast with CRISPR-dCas9 NOR gates

PubMed Central

Gander, Miles W.; Vrana, Justin D.; Voje, William E.; Carothers, James M.; Klavins, Eric

2017-01-01

Natural genetic circuits enable cells to make sophisticated digital decisions. Building equally complex synthetic circuits in eukaryotes remains difficult, however, because commonly used components leak transcriptionally, do not arbitrarily interconnect or do not have digital responses. Here, we designed dCas9-Mxi1-based NOR gates in Saccharomyces cerevisiae that allow arbitrary connectivity and large genetic circuits. Because we used the chromatin remodeller Mxi1, our gates showed minimal leak and digital responses. We built a combinatorial library of NOR gates that directly convert guide RNA (gRNA) inputs into gRNA outputs, enabling the gates to be ‘wired' together. We constructed logic circuits with up to seven gRNAs, including repression cascades with up to seven layers. Modelling predicted the NOR gates have effectively zero transcriptional leak explaining the limited signal degradation in the circuits. Our approach enabled the largest, eukaryotic gene circuits to date and will form the basis for large, synthetic, cellular decision-making systems. PMID:28541304

Mechanisms limiting the performance of large grain polycrystalline silicon solar cells

NASA Technical Reports Server (NTRS)

Culik, J. S.; Alexander, P.; Dumas, K. A.; Wohlgemuth, J. W.

1984-01-01

The open-circuit voltage and short-circuit current of large-grain (1 to 10 mm grain diameter) polycrystalline silicon solar cells is determined by the minority-carrier diffusion length within the bulk of the grains. This was demonstrated by irradiating polycrystalline and single-crystal (Czochralski) silicon solar cells with 1 MeV electrons to reduce their bulk lifetime. The variation of short-circuit current with minority-carrier diffusion length for the polycrystalline solar cells is identical to that of the single-crystal solar cells. The open-circuit voltage versus short-circuit current characteristic of the polycrystalline solar cells for reduced diffusion lengths is also identical to that of the single-crystal solar cells. The open-circuit voltage of the polycrystalline solar cells is a strong function of quasi-neutral (bulk) recombination, and is reduced only slightly, if at all, by grain-boundary recombination.

Circuit filling factor (CFF) for multiply tuned probes, revisited

NASA Astrophysics Data System (ADS)

Conradi, Mark S.; Zens, Albert P.

2018-07-01

The concept of circuit filling factor (CFF) is re-examined for multi-tuned, multi-inductor probe circuits. The CFF is the fraction of magnetic stored energy residing in the NMR coil. The CFF theorem states that the CFF sums to unity across all the resonant normal modes. It dictates that improved performance from a large CFF in one mode comes at the expense of CFF (and performance) at the other mode(s). Simple analytical calculations of two-mode circuits are used to demonstrate and confirm the CFF theorem. A triple-resonance circuit is calculated to show the large trade-offs involved there. The theorem can provide guidance for choosing the best circuit and relative inductances in multi-nuclear probes. The CFF is directly accessible from ball frequency-shift measurements. We give experimental measures of the CFF from ball shifts and compare to calculated values of the CFF, with good agreement.

A CCD experimental platform for large telescope in Antarctica based on FPGA

NASA Astrophysics Data System (ADS)

Zhu, Yuhua; Qi, Yongjun

2014-07-01

The CCD , as a detector , is one of the important components of astronomical telescopes. For a large telescope in Antarctica, a set of CCD detector system with large size, high sensitivity and low noise is indispensable. Because of the extremely low temperatures and unattended, system maintenance and software and hardware upgrade become hard problems. This paper introduces a general CCD controller experiment platform, using Field programmable gate array FPGA, which is, in fact, a large-scale field reconfigurable array. Taking the advantage of convenience to modify the system, construction of driving circuit, digital signal processing module, network communication interface, control algorithm validation, and remote reconfigurable module may realize. With the concept of integrated hardware and software, the paper discusses the key technology of building scientific CCD system suitable for the special work environment in Antarctica, focusing on the method of remote reconfiguration for controller via network and then offering a feasible hardware and software solution.

An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

PubMed

Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

2016-06-01

The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. © The Author(s) 2016.

Layout optimization with algebraic multigrid methods

NASA Technical Reports Server (NTRS)

Regler, Hans; Ruede, Ulrich

1993-01-01

Finding the optimal position for the individual cells (also called functional modules) on the chip surface is an important and difficult step in the design of integrated circuits. This paper deals with the problem of relative placement, that is the minimization of a quadratic functional with a large, sparse, positive definite system matrix. The basic optimization problem must be augmented by constraints to inhibit solutions where cells overlap. Besides classical iterative methods, based on conjugate gradients (CG), we show that algebraic multigrid methods (AMG) provide an interesting alternative. For moderately sized examples with about 10000 cells, AMG is already competitive with CG and is expected to be superior for larger problems. Besides the classical 'multiplicative' AMG algorithm where the levels are visited sequentially, we propose an 'additive' variant of AMG where levels may be treated in parallel and that is suitable as a preconditioner in the CG algorithm.

Cancellation Circuit for Transmit-Receive Isolation

DTIC Science & Technology

2010-09-01

non -ideal hardware, and the performance of the circuit is limited. One of the major problems is the leakage from the circulator. The leakage disrupts...cancellation circuit was investigated by a series of simulations using Agilent ADS (Agilent Advanced Design System), and hardware tests were conducted to...developed in the WDDPA application, allowing coherent processing of the data from all elements. There are limitations encountered due to non -ideal

How to Measure Qualitative Understanding of DC-Circuit Phenomena--Taking a Closer Look at the External Representations of 9-Year-Olds

ERIC Educational Resources Information Center

Kallunki, Veera

2013-01-01

Pupils' qualitative understanding of DC-circuit phenomena is reported to be weak. In numerous research reports lists of problems in understanding the functioning of simple DC-circuits have been presented. So-called mental model surveys have uncovered difficulties in different age groups, and in different phases of instruction. In this study, the…

Development of N+ in P pixel sensors for a high-luminosity large hadron collider

NASA Astrophysics Data System (ADS)

Kamada, Shintaro; Yamamura, Kazuhisa; Unno, Yoshinobu; Ikegami, Yoichi

2014-11-01

Hamamatsu Photonics K. K. is developing an N+ in a p planar pixel sensor with high radiation tolerance for the high-luminosity large hadron collider (HL-LHC). The N+ in the p planar pixel sensor is a candidate for the HL-LHC and offers the advantages of high radiation tolerance at a reasonable price compared with the N+ in an n planar sensor, the three-dimensional sensor, and the diamond sensor. However, the N+ in the p planar pixel sensor still presents some problems that need to be solved, such as its slim edge and the danger of sparks between the sensor and readout integrated circuit. We are now attempting to solve these problems with wafer-level processes, which is important for mass production. To date, we have obtained a 250-μm edge with an applied bias voltage of 1000 V. To protect against high-voltage sparks from the edge, we suggest some possible designs for the N+ edge.

The Tao of Microelectronics

NASA Astrophysics Data System (ADS)

Zhang, Yumin

2014-12-01

Microelectronics is a challenging course to many undergraduate students and is often described as very messy. Before taking this course, all the students have learned circuit analysis, where basically all the problems can be solved by applying Kirchhoff's laws. In addition, most engineering students have also learned engineering mechanics: statics and dynamics, where Newton's laws and related principles can be applied in solving all the problems. However, microelectronics is not as clean as these courses. There are hundreds of equations for different circuits, and it is impossible to remember which equation should be applied to which circuit. One of the common pitfalls in learning this course is over-focusing at the equation level and ignoring the ideas (Tao) behind it. Unfortunately, these ideas are not summarized and emphasized in most microelectronics textbooks, though they cover various electronic circuits comprehensively. Therefore, most undergraduate students feel at a loss when they start to learn this topic. This book tries to illustrate the major ideas and the basic analysis techniques, so that students can derive the right equations easily when facing an electronic circuit.

A New Way to Teach Introductory Electricity.

ERIC Educational Resources Information Center

Steinberg, Melvin S.

1988-01-01

Cites the misconceptions that students beginning the study of electric circuits often have about electricity. Explains the use of capacitors with circuits of batteries and light bulbs to introduce electrostatic forces and help to alleviate the problem of misconceptions. (RT)

Solution to the satisfiability problem using a complete Grover search with trapped ions

NASA Astrophysics Data System (ADS)

Yang, Wan-Li; Wei, Hua; Zhou, Fei; Chang, Weng-Long; Feng, Mang

2009-07-01

The main idea in the original Grover search (1997 Phys. Rev. Lett. 79 325) is to single out a target state containing the solution to a search problem by amplifying the amplitude of the state, following the Oracle's job, i.e., a black box giving us information about the target state. We design quantum circuits to accomplish a complete Grover search involving both the Oracle's job and the amplification of the target state, which are employed to solve satisfiability (SAT) problems. We explore how to carry out the quantum circuits with currently available ion-trap quantum computing technology.

Apollo 13 Mission: Cryogenic Oxygen Tank 2 Anomaly Report

NASA Technical Reports Server (NTRS)

1970-01-01

There were two investigative aspects associated with the loss of the cryogenic oxygen tank pressure during the Apollo 13 flight. First, what was the cause of the flight failure of cryogenic oxygen tank 2. Second, what possible contributing factors during the ground history of the tank could have led to the ultimate failure in flight. The first flight indication of a problem occurred when the quantity measurement in the tank went full scale about 9 hours before the incident. This condition in itself could not have contributed to ignition in the tank, since the energy in the circuit is restricted to about 7 milli-joules. Data from the electrical system provided the second indication of a problem when the fans in tank 2 were activated to reduce any stratification which might have been present in the supercritical oxygen in the tank. Several short-circuits were detected and have been isolated to the fan circuits of tank 2. The first short-circuit could have contained as much as 160 joules of energy, which is within the current-protection level of the fan circuits. Tests have shown that two orders of magnitude less energy than this is sufficient to ignite the polytetrafluoroethylene insulation on the fan circuits in the tank. Consequently, the evidence indicates that the insulation on the fan wiring was ignited by the energy in the short-circuit.

Functional test generation for digital circuits described with a declarative language: LUSTRE

NASA Astrophysics Data System (ADS)

Almahrous, Mazen

1990-08-01

A functional approach to the test generation problem starting from a high level description is proposed. The circuit tested is modeled, using the LUSTRE high level data flow description language. The different LUSTRE primitives are translated to a SATAN format graph in order to evaluate the testability of the circuit and to generate test sequences. Another method of testing the complex circuits comprising an operative part and a control part is defined. It consists of checking experiments for the control part observed through the operative part. It was applied to the automata generated from a LUSTRE description of the circuit.

Some Notes on Wideband Feedback Amplifiers

DOE R&D Accomplishments Database

Fitch, V.

1949-03-16

The extension of the passband of wideband amplifiers is a highly important problem to the designer of electronic circuits. Throughout the electronics industry and in many research programs in physics and allied fields where extensive use is made of video amplifiers, the foremost requirement is a passband of maximum width. This is necessary if it is desired to achieve a more faithful reproduction of transient wave forms, a better time resolution in physical measurements, or perhaps just a wider band gain-frequency response to sine wave signals. The art of electronics is continually faced with this omnipresent amplifier problem. In particular, the instrumentation techniques of nuclear physics require amplifiers with short rise times, a high degree of gain stability, and a linear response to high signal levels. While the distributed amplifier may solve the problems of those seeking only a wide passband, the requirements of stability and linearity necessitate using feedback circuits. This paper considers feedback amplifiers from the standpoint of high-frequency performance. The circuit conditions for optimum steady-state (sinusoidal) and transient response are derived and practical circuits (both interstage and output) are presented which fulfill these conditions. In general, the results obtained may be applied to the low-frequency end.

Single Event Transients in Linear Integrated Circuits

NASA Technical Reports Server (NTRS)

Buchner, Stephen; McMorrow, Dale

2005-01-01

On November 5, 2001, a processor reset occurred on board the Microwave Anisotropy Probe (MAP), a NASA mission to measure the anisotropy of the microwave radiation left over from the Big Bang. The reset caused the spacecraft to enter a safehold mode from which it took several days to recover. Were that to happen regularly, the entire mission would be compromised, so it was important to find the cause of the reset and, if possible, to mitigate it. NASA assembled a team of engineers that included experts in radiation effects to tackle the problem. The first clue was the observation that the processor reset occurred during a solar event characterized by large increases in the proton and heavy ion fluxes emitted by the sun. To the radiation effects engineers on the team, this strongly suggested that particle radiation might be the culprit, particularly when it was discovered that the reset circuit contained three voltage comparators (LM139). Previous testing revealed that large voltage transients, or glitches appeared at the output of the LM139 when it was exposed to a beam of heavy ions [NI96]. The function of the reset circuit was to monitor the supply voltage and to issue a reset command to the processor should the voltage fall below a reference of 2.5 V [PO02]. Eventually, the team of engineers concluded that ionizing particle radiation from the solar event produced a negative voltage transient on the output of one of the LM139s sufficiently large to reset the processor on MAP. Fortunately, as of the end of 2004, only two such resets have occurred. The reset on MAP was not the first malfunction on a spacecraft attributed to a transient. That occurred shortly after the launch of NASA s TOPEX/Poseidon satellite in 1992. It was suspected, and later confirmed, that an anomaly in the Earth Sensor was caused by a transient in an operational amplifier (OP-15) [KO93]. Over the next few years, problems on TDRS, CASSINI, [PR02] SOHO [HA99,HA01] and TERRA were also attributed to transients. In some cases, such events produced resets by falsely triggering circuits designed to protect against over- voltage or over-current. On at least three occasions, transients caused satellites to switch into "safe mode" in which most of the systems on board the satellites were powered down for an extended period. By the time the satellites were reconfigured and returned to full operational state, much scientific data had been lost. Fortunately, no permanent damage occurred in any of the systems and they were all successfully re-activated.

Gas-Sensing Flip-Flop Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Williams, Roger; Ryan, Margaret A.

1995-01-01

Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

Negative inductance circuits for metamaterial bandwidth enhancement

NASA Astrophysics Data System (ADS)

Avignon-Meseldzija, Emilie; Lepetit, Thomas; Ferreira, Pietro Maris; Boust, Fabrice

2017-12-01

Passive metamaterials have yet to be translated into applications on a large scale due in large part to their limited bandwidth. To overcome this limitation many authors have suggested coupling metamaterials to non-Foster circuits. However, up to now, the number of convincing demonstrations based on non-Foster metamaterials has been very limited. This paper intends to clarify why progress has been so slow, i.e., the fundamental difficulty in making a truly broadband and efficient non-Foster metamaterial. To this end, we consider two families of metamaterials, namely Artificial Magnetic Media and Artificial Magnetic Conductors. In both cases, it turns out that bandwidth enhancement requires negative inductance with almost zero resistance. To estimate bandwidth enhancement with actual non-Foster circuits, we consider two classes of such circuits, namely Linvill and gyrator. The issue of stability being critical, both metamaterial families are studied with equivalent circuits that include advanced models of these non-Foster circuits. Conclusions are different for Artificial Magnetic Media coupled to Linvill circuits and Artificial Magnetic Conductors coupled to gyrator circuits. In the first case, requirements for bandwidth enhancement and stability are very hard to meet simultaneously whereas, in the second case, an adjustment of the transistor gain does significantly increase bandwidth.

Computer-aided design of large-scale integrated circuits - A concept

NASA Technical Reports Server (NTRS)

Schansman, T. T.

1971-01-01

Circuit design and mask development sequence are improved by using general purpose computer with interactive graphics capability establishing efficient two way communications link between design engineer and system. Interactive graphics capability places design engineer in direct control of circuit development.

From Contextual Fear to a Dynamic View of Memory Systems

PubMed Central

Fanselow, Michael S

2009-01-01

The brain does not learn and remember in a unitary fashion. Rather, different circuits specialize in certain classes of problems and encode different types of information. Damage to one of these systems typically results in amnesia only for the form of memory that is the affected region's specialty. How does the brain allocate a specific category of memory to a particular circuit? This question has received little attention. The currently dominant view, Multiple Memory Systems Theory, assumes that such abilities are hard-wired. Using fear conditioning as a paradigmatic case, I propose an alternative model in which mnemonic processing is allocated to specific circuits through a dynamic process. Potential circuits compete to form memories with the most efficient circuits emerging as winners. However, alternate circuits compensate when these “primary” circuits are compromised. PMID:19939724

Reverse engineering of integrated circuits

DOEpatents

Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

2003-01-01

Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

Imbalance aware lithography hotspot detection: a deep learning approach

NASA Astrophysics Data System (ADS)

Yang, Haoyu; Luo, Luyang; Su, Jing; Lin, Chenxi; Yu, Bei

2017-03-01

With the advancement of VLSI technology nodes, light diffraction caused lithographic hotspots have become a serious problem affecting manufacture yield. Lithography hotspot detection at the post-OPC stage is imperative to check potential circuit failures when transferring designed patterns onto silicon wafers. Although conventional lithography hotspot detection methods, such as machine learning, have gained satisfactory performance, with extreme scaling of transistor feature size and more and more complicated layout patterns, conventional methodologies may suffer from performance degradation. For example, manual or ad hoc feature extraction in a machine learning framework may lose important information when predicting potential errors in ultra-large-scale integrated circuit masks. In this paper, we present a deep convolutional neural network (CNN) targeting representative feature learning in lithography hotspot detection. We carefully analyze impact and effectiveness of different CNN hyper-parameters, through which a hotspot-detection-oriented neural network model is established. Because hotspot patterns are always minorities in VLSI mask design, the training data set is highly imbalanced. In this situation, a neural network is no longer reliable, because a trained model with high classification accuracy may still suffer from high false negative results (missing hotspots), which is fatal in hotspot detection problems. To address the imbalance problem, we further apply minority upsampling and random-mirror flipping before training the network. Experimental results show that our proposed neural network model achieves highly comparable or better performance on the ICCAD 2012 contest benchmark compared to state-of-the-art hotspot detectors based on deep or representative machine leaning.

Intelligent data processing of an ultrasonic sensor system for pattern recognition improvements

NASA Astrophysics Data System (ADS)

Na, Seung You; Park, Min-Sang; Hwang, Won-Gul; Kee, Chang-Doo

1999-05-01

Though conventional time-of-flight ultrasonic sensor systems are popular due to the advantages of low cost and simplicity, the usage of the sensors is rather narrowly restricted within object detection and distance readings. There is a strong need to enlarge the amount of environmental information for mobile applications to provide intelligent autonomy. Wide sectors of such neighboring object recognition problems can be satisfactorily handled with coarse vision data such as sonar maps instead of accurate laser or optic measurements. For the usage of object pattern recognition, ultrasonic senors have inherent shortcomings of poor directionality and specularity which result in low spatial resolution and indistinctiveness of object patterns. To resolve these problems an array of increased number of sensor elements has been used for large objects. In this paper we propose a method of sensor array system with improved recognition capability using electronic circuits accompanying the sensor array and neuro-fuzzy processing of data fusion. The circuit changes transmitter output voltages of array elements in several steps. Relying upon the known sensor characteristics, a set of different return signals from neighboring senors is manipulated to provide an enhanced pattern recognition in the aspects of inclination angle, size and shift as well as distance of objects. The results show improved resolution of the measurements for smaller targets.

A Formal Algorithm for Routing Traces on a Printed Circuit Board

NASA Technical Reports Server (NTRS)

Hedgley, David R., Jr.

1996-01-01

This paper addresses the classical problem of printed circuit board routing: that is, the problem of automatic routing by a computer other than by brute force that causes the execution time to grow exponentially as a function of the complexity. Most of the present solutions are either inexpensive but not efficient and fast, or efficient and fast but very costly. Many solutions are proprietary, so not much is written or known about the actual algorithms upon which these solutions are based. This paper presents a formal algorithm for routing traces on a print- ed circuit board. The solution presented is very fast and efficient and for the first time speaks to the question eloquently by way of symbolic statements.

Resistence seam welding thin copper foils

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hollar, D.L. Jr.

1991-02-01

Use of flat flexible circuits in the electronics industry is expanding. The term flexible circuits'' is defined here as copper foil which has been bonded to an insulating film such as Kapton film. The foil is photo processed to produce individual circuit paths similar to printed circuit boards. Another insulating film is laminated over the conductors to complete the flexible circuit. Flexible circuits, like multiwire cables, are susceptible to electromagnetic radiation (EMR) interference. On multiwire cables the interference problem is mitigated by adding a woven wire braid shielding over the conductors. Shielding on flexible circuits is accomplished by enclosing themore » circuits in a copper foil envelope. However, the copper foil must be electrically sealed around the flexcircuit to be effective. Ultimately, a resistance seam welding process and appropriate equipment were developed which would provide the required electrical seal between two layers of 2-oz (0.0028-inch thick) copper foil on a 1.1-inch wide, 30-inch long, 0.040-inch thick flexible circuit. 4 refs., 19 figs.« less

Architecture Framework for Trapped-Ion Quantum Computer based on Performance Simulation Tool

NASA Astrophysics Data System (ADS)

Ahsan, Muhammad

The challenge of building scalable quantum computer lies in striking appropriate balance between designing a reliable system architecture from large number of faulty computational resources and improving the physical quality of system components. The detailed investigation of performance variation with physics of the components and the system architecture requires adequate performance simulation tool. In this thesis we demonstrate a software tool capable of (1) mapping and scheduling the quantum circuit on a realistic quantum hardware architecture with physical resource constraints, (2) evaluating the performance metrics such as the execution time and the success probability of the algorithm execution, and (3) analyzing the constituents of these metrics and visualizing resource utilization to identify system components which crucially define the overall performance. Using this versatile tool, we explore vast design space for modular quantum computer architecture based on trapped ions. We find that while success probability is uniformly determined by the fidelity of physical quantum operation, the execution time is a function of system resources invested at various layers of design hierarchy. At physical level, the number of lasers performing quantum gates, impact the latency of the fault-tolerant circuit blocks execution. When these blocks are used to construct meaningful arithmetic circuit such as quantum adders, the number of ancilla qubits for complicated non-clifford gates and entanglement resources to establish long-distance communication channels, become major performance limiting factors. Next, in order to factorize large integers, these adders are assembled into modular exponentiation circuit comprising bulk of Shor's algorithm. At this stage, the overall scaling of resource-constraint performance with the size of problem, describes the effectiveness of chosen design. By matching the resource investment with the pace of advancement in hardware technology, we find optimal designs for different types of quantum adders. Conclusively, we show that 2,048-bit Shor's algorithm can be reliably executed within the resource budget of 1.5 million qubits.

Exercises in molecular computing.

PubMed

Stojanovic, Milan N; Stefanovic, Darko; Rudchenko, Sergei

2014-06-17

CONSPECTUS: The successes of electronic digital logic have transformed every aspect of human life over the last half-century. The word "computer" now signifies a ubiquitous electronic device, rather than a human occupation. Yet evidently humans, large assemblies of molecules, can compute, and it has been a thrilling challenge to develop smaller, simpler, synthetic assemblies of molecules that can do useful computation. When we say that molecules compute, what we usually mean is that such molecules respond to certain inputs, for example, the presence or absence of other molecules, in a precisely defined but potentially complex fashion. The simplest way for a chemist to think about computing molecules is as sensors that can integrate the presence or absence of multiple analytes into a change in a single reporting property. Here we review several forms of molecular computing developed in our laboratories. When we began our work, combinatorial approaches to using DNA for computing were used to search for solutions to constraint satisfaction problems. We chose to work instead on logic circuits, building bottom-up from units based on catalytic nucleic acids, focusing on DNA secondary structures in the design of individual circuit elements, and reserving the combinatorial opportunities of DNA for the representation of multiple signals propagating in a large circuit. Such circuit design directly corresponds to the intuition about sensors transforming the detection of analytes into reporting properties. While this approach was unusual at the time, it has been adopted since by other groups working on biomolecular computing with different nucleic acid chemistries. We created logic gates by modularly combining deoxyribozymes (DNA-based enzymes cleaving or combining other oligonucleotides), in the role of reporting elements, with stem-loops as input detection elements. For instance, a deoxyribozyme that normally exhibits an oligonucleotide substrate recognition region is modified such that a stem-loop closes onto the substrate recognition region, making it unavailable for the substrate and thus rendering the deoxyribozyme inactive. But a conformational change can then be induced by an input oligonucleotide, complementary to the loop, to open the stem, allow the substrate to bind, and allow its cleavage to proceed, which is eventually reported via fluorescence. In this Account, several designs of this form are reviewed, along with their application in the construction of large circuits that exhibited complex logical and temporal relationships between the inputs and the outputs. Intelligent (in the sense of being capable of nontrivial information processing) theranostic (therapy + diagnostic) applications have always been the ultimate motivation for developing computing (i.e., decision-making) circuits, and we review our experiments with logic-gate elements bound to cell surfaces that evaluate the proximal presence of multiple markers on lymphocytes.

Exercises in Molecular Computing

PubMed Central

2014-01-01

Conspectus The successes of electronic digital logic have transformed every aspect of human life over the last half-century. The word “computer” now signifies a ubiquitous electronic device, rather than a human occupation. Yet evidently humans, large assemblies of molecules, can compute, and it has been a thrilling challenge to develop smaller, simpler, synthetic assemblies of molecules that can do useful computation. When we say that molecules compute, what we usually mean is that such molecules respond to certain inputs, for example, the presence or absence of other molecules, in a precisely defined but potentially complex fashion. The simplest way for a chemist to think about computing molecules is as sensors that can integrate the presence or absence of multiple analytes into a change in a single reporting property. Here we review several forms of molecular computing developed in our laboratories. When we began our work, combinatorial approaches to using DNA for computing were used to search for solutions to constraint satisfaction problems. We chose to work instead on logic circuits, building bottom-up from units based on catalytic nucleic acids, focusing on DNA secondary structures in the design of individual circuit elements, and reserving the combinatorial opportunities of DNA for the representation of multiple signals propagating in a large circuit. Such circuit design directly corresponds to the intuition about sensors transforming the detection of analytes into reporting properties. While this approach was unusual at the time, it has been adopted since by other groups working on biomolecular computing with different nucleic acid chemistries. We created logic gates by modularly combining deoxyribozymes (DNA-based enzymes cleaving or combining other oligonucleotides), in the role of reporting elements, with stem–loops as input detection elements. For instance, a deoxyribozyme that normally exhibits an oligonucleotide substrate recognition region is modified such that a stem–loop closes onto the substrate recognition region, making it unavailable for the substrate and thus rendering the deoxyribozyme inactive. But a conformational change can then be induced by an input oligonucleotide, complementary to the loop, to open the stem, allow the substrate to bind, and allow its cleavage to proceed, which is eventually reported via fluorescence. In this Account, several designs of this form are reviewed, along with their application in the construction of large circuits that exhibited complex logical and temporal relationships between the inputs and the outputs. Intelligent (in the sense of being capable of nontrivial information processing) theranostic (therapy + diagnostic) applications have always been the ultimate motivation for developing computing (i.e., decision-making) circuits, and we review our experiments with logic-gate elements bound to cell surfaces that evaluate the proximal presence of multiple markers on lymphocytes. PMID:24873234

Configurable analog-digital conversion using the neural engineering framework

PubMed Central

Mayr, Christian G.; Partzsch, Johannes; Noack, Marko; Schüffny, Rene

2014-01-01

Efficient Analog-Digital Converters (ADC) are one of the mainstays of mixed-signal integrated circuit design. Besides the conventional ADCs used in mainstream ICs, there have been various attempts in the past to utilize neuromorphic networks to accomplish an efficient crossing between analog and digital domains, i.e., to build neurally inspired ADCs. Generally, these have suffered from the same problems as conventional ADCs, that is they require high-precision, handcrafted analog circuits and are thus not technology portable. In this paper, we present an ADC based on the Neural Engineering Framework (NEF). It carries out a large fraction of the overall ADC process in the digital domain, i.e., it is easily portable across technologies. The analog-digital conversion takes full advantage of the high degree of parallelism inherent in neuromorphic networks, making for a very scalable ADC. In addition, it has a number of features not commonly found in conventional ADCs, such as a runtime reconfigurability of the ADC sampling rate, resolution and transfer characteristic. PMID:25100933

Internet of "printed" Things: low-cost fabrication of autonomous sensing nodes by inkjet printing

NASA Astrophysics Data System (ADS)

Kawahara, Yoshihiro

2014-11-01

"What if electronics devices are printed using an inkjet printer even at home?" "What if those devices no longer need a battery?" I will introduce two enabling technologies for the Internet of Things concept. 1. Instant Inkjet Circuits: A low cost, fast and accessible technology to support the rapid prototyping of electronic devices. We demonstrated that "sintering-free" silver nano particle ink with a commodity inkjet printer can be used to fabricate printed circuit board and high-frequency applications such as antennas and sensors. The technology is now commercialized by AgIC, Inc. 2. Wireless Power: Although large amounts of data can be exchanged over a wireless communication link, mobile devices are still tethered by power cables. We are trying to solve this problem by two different approaches: energy harvesting. A simple circuitry comprised of diodes and capacitor can convert ambient radio signals into DC current. Our research revealed the signals from TV tower located 6.5km apart could be used to feed 100 microwatts to power microcontrollers.

Reducing DNA context dependence in bacterial promoters

PubMed Central

Carr, Swati B.; Densmore, Douglas M.

2017-01-01

Variation in the DNA sequence upstream of bacterial promoters is known to affect the expression levels of the products they regulate, sometimes dramatically. While neutral synthetic insulator sequences have been found to buffer promoters from upstream DNA context, there are no established methods for designing effective insulator sequences with predictable effects on expression levels. We address this problem with Degenerate Insulation Screening (DIS), a novel method based on a randomized 36-nucleotide insulator library and a simple, high-throughput, flow-cytometry-based screen that randomly samples from a library of 436 potential insulated promoters. The results of this screen can then be compared against a reference uninsulated device to select a set of insulated promoters providing a precise level of expression. We verify this method by insulating the constitutive, inducible, and repressible promotors of a four transcriptional-unit inverter (NOT-gate) circuit, finding both that order dependence is largely eliminated by insulation and that circuit performance is also significantly improved, with a 5.8-fold mean improvement in on/off ratio. PMID:28422998

RADC SCAT automated sneak circuit analysis tool

NASA Astrophysics Data System (ADS)

Depalma, Edward L.

The sneak circuit analysis tool (SCAT) provides a PC-based system for real-time identification (during the design phase) of sneak paths and design concerns. The tool utilizes an expert system shell to assist the analyst so that prior experience with sneak analysis is not necessary for performance. Both sneak circuits and design concerns are targeted by this tool, with both digital and analog circuits being examined. SCAT focuses the analysis at the assembly level, rather than the entire system, so that most sneak problems can be identified and corrected by the responsible design engineer in a timely manner. The SCAT program identifies the sneak circuits to the designer, who then decides what course of action is necessary.

Design, development and evaluation of a resistor-based multiplexing circuit for a 20×20 SiPM array

NASA Astrophysics Data System (ADS)

Wang, Zhonghai; Sun, Xishan; Lou, Kai; Meier, Joseph; Zhou, Rong; Yang, Chaowen; Zhu, Xiaorong; Shao, Yiping

2016-04-01

One technical challenge in developing a large-size scintillator detector with multiple Silicon Photomultiplier (SiPM) arrays is to read out a large number of detector output channels. To achieve this, different signal multiplexing circuits have been studied and applied with different performances and cost-effective tradeoffs. Resistor-based multiplexing circuits exhibit simplicity and signal integrity, but also present the disadvantage of timing shift among different channels. In this study, a resistor-based multiplexing circuit for a large-sized SiPM array readout was developed and evaluated by simulation and experimental studies. Similarly to a multiplexing circuit used for multi-anode PMT, grounding and branching resistors were connected to each SiPM output channel. The grounding resistor was used to simultaneously reduce the signal crosstalk among different channels and to improve timing performance. Both grounding and branching resistor values were optimized to maintain a balanced performance of the event energy, timing, and positioning. A multiplexing circuit was implemented on a compact PCB and applied for a flat-panel detector which consisted of a 32×32 LYSO scintillator crystals optically coupled to 5×5 SiPM arrays for a total 20×20 output channels. Test results showed excellent crystal identification for all 1024 LYSO crystals (each with 2×2×30 mm3 size) with 22Na flood-source irradiation. The measured peak-to-valley ratio from typical crystal map profile is around 3:1 to 6.6:1, an average single crystal energy resolution of about 17.3%, and an average single crystal timing resolution of about 2 ns. Timing shift among different crystals, as reported in some other resistor-based multiplexing circuit designs, was not observed. In summary, we have designed and implemented a practical resistor-based multiplexing circuit that can be readily applied for reading out a large SiPM array with good detector performance.

Hardware synthesis from DDL description. [simulating a digital system for computerized design of large scale integrated circuits

NASA Technical Reports Server (NTRS)

Shiva, S. G.; Shah, A. M.

1980-01-01

The details of digital systems can be conveniently input into the design automation system by means of hardware description language (HDL). The computer aided design and test (CADAT) system at NASA MSFC is used for the LSI design. The digital design language (DDL) was selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. Problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system are addressed.

Content addressable memory project

NASA Technical Reports Server (NTRS)

Hall, J. Storrs; Levy, Saul; Smith, Donald E.; Miyake, Keith M.

1992-01-01

A parameterized version of the tree processor was designed and tested (by simulation). The leaf processor design is 90 percent complete. We expect to complete and test a combination of tree and leaf cell designs in the next period. Work is proceeding on algorithms for the computer aided manufacturing (CAM), and once the design is complete we will begin simulating algorithms for large problems. The following topics are covered: (1) the practical implementation of content addressable memory; (2) design of a LEAF cell for the Rutgers CAM architecture; (3) a circuit design tool user's manual; and (4) design and analysis of efficient hierarchical interconnection networks.

Some Aspects of an Air-Core Single-Coil Magnetic Suspension System

NASA Technical Reports Server (NTRS)

Hamlet, Irvin L.; Kilgore, Robert A.

1966-01-01

This paper presents some of the technical aspects in the development at the Langley Research Center of an air-cove, dual-wound, single-coil, magnetic-suspension system with one-dimensional control. Overall electrical system design features and techniques are discussed in addition to the problems of control and stability. Special treatment is given to the operation of a dual-wound, high-current support coil which provides the bias fields and superimposed modulated field. Other designs features include a six-phase, solid-state power stage for modulation of the relatively large magnitude control current, and an associated six-phase trigger circuit.

Processor Would Find Best Paths On Map

NASA Technical Reports Server (NTRS)

Eberhardt, Silvio P.

1990-01-01

Proposed very-large-scale integrated (VLSI) circuit image-data processor finds path of least cost from specified origin to any destination on map. Cost of traversal assigned to each picture element of map. Path of least cost from originating picture element to every other picture element computed as path that preserves as much as possible of signal transmitted by originating picture element. Dedicated microprocessor at each picture element stores cost of traversal and performs its share of computations of paths of least cost. Least-cost-path problem occurs in research, military maneuvers, and in planning routes of vehicles.

Space shuttle main engine controller assembly, phase C-D. [with lagging system design and analysis

NASA Technical Reports Server (NTRS)

1973-01-01

System design and system analysis and simulation are slightly behind schedule, while design verification testing has improved. Input/output circuit design has improved, but digital computer unit (DCU) and mechanical design continue to lag. Part procurement was impacted by delays in printed circuit board, assembly drawing releases. These are the result of problems in generating suitable printed circuit artwork for the very complex and high density multilayer boards.

CMOS output buffer wave shaper

NASA Technical Reports Server (NTRS)

Albertson, L.; Whitaker, S.; Merrell, R.

1990-01-01

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

Voltage versus Current, or the Problem of the Chicken and the Egg

ERIC Educational Resources Information Center

Silva, Antonio Alberto; Soares, Rolando

2007-01-01

In an electric circuit, is it the current that causes the voltage, or the inverse? This is a false dilemma, as shown by an introductory and qualitative approach to a circuit as a system. (Contains 9 figures and 7 footnotes.)

Xyce Parallel Electronic Simulator Users' Guide Version 6.7.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik Venkatraman; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel com- puting platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one tomore » develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase -- a message passing parallel implementation -- which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The information herein is subject to change without notice. Copyright c 2002-2017 Sandia Corporation. All rights reserved. Trademarks Xyce TM Electronic Simulator and Xyce TM are trademarks of Sandia Corporation. Orcad, Orcad Capture, PSpice and Probe are registered trademarks of Cadence Design Systems, Inc. Microsoft, Windows and Windows 7 are registered trademarks of Microsoft Corporation. Medici, DaVinci and Taurus are registered trademarks of Synopsys Corporation. Amtec and TecPlot are trademarks of Amtec Engineering, Inc. All other trademarks are property of their respective owners. Contacts World Wide Web http://xyce.sandia.gov https://info.sandia.gov/xyce (Sandia only) Email xyce@sandia.gov (outside Sandia) xyce-sandia@sandia.gov (Sandia only) Bug Reports (Sandia only) http://joseki-vm.sandia.gov/bugzilla http://morannon.sandia.gov/bugzilla« less

Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

PubMed Central

Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

2016-01-01

Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V−1 sec−1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process. PMID:27184121

Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

NASA Astrophysics Data System (ADS)

Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

2016-05-01

Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V-1 sec-1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

A single-layer platform for Boolean logic and arithmetic through DNA excision in mammalian cells

PubMed Central

Weinberg, Benjamin H.; Hang Pham, N. T.; Caraballo, Leidy D.; Lozanoski, Thomas; Engel, Adrien; Bhatia, Swapnil; Wong, Wilson W.

2017-01-01

Genetic circuits engineered for mammalian cells often require extensive fine-tuning to perform their intended functions. To overcome this problem, we present a generalizable biocomputing platform that can engineer genetic circuits which function in human cells with minimal optimization. We used our Boolean Logic and Arithmetic through DNA Excision (BLADE) platform to build more than 100 multi-input-multi-output circuits. We devised a quantitative metric to evaluate the performance of the circuits in human embryonic kidney and Jurkat T cells. Of 113 circuits analysed, 109 functioned (96.5%) with the correct specified behavior without any optimization. We used our platform to build a three-input, two-output Full Adder and six-input, one-output Boolean Logic Look Up Table. We also used BLADE to design circuits with temporal small molecule-mediated inducible control and circuits that incorporate CRISPR/Cas9 to regulate endogenous mammalian genes. PMID:28346402

Automated Design of Quantum Circuits

NASA Technical Reports Server (NTRS)

Williams, Colin P.; Gray, Alexander G.

2000-01-01

In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

A procedural method for the efficient implementation of full-custom VLSI designs

NASA Technical Reports Server (NTRS)

Belk, P.; Hickey, N.

1987-01-01

An imbedded language system for the layout of very large scale integration (VLSI) circuits is examined. It is shown that through the judicious use of this system, a large variety of circuits can be designed with circuit density and performance comparable to traditional full-custom design methods, but with design costs more comparable to semi-custom design methods. The high performance of this methodology is attributable to the flexibility of procedural descriptions of VLSI layouts and to a number of automatic and semi-automatic tools within the system.

PDF cells are a GABA-responsive wake-promoting component of the Drosophila sleep circuit.

PubMed

Parisky, Katherine M; Agosto, Jose; Pulver, Stefan R; Shang, Yuhua; Kuklin, Elena; Hodge, James J L; Kang, Kyeongjin; Kang, Keongjin; Liu, Xu; Garrity, Paul A; Rosbash, Michael; Griffith, Leslie C

2008-11-26

Daily sleep cycles in humans are driven by a complex circuit within which GABAergic sleep-promoting neurons oppose arousal. Drosophila sleep has recently been shown to be controlled by GABA, which acts on unknown cells expressing the Rdl GABAA receptor. We identify here the relevant Rdl-containing cells as PDF-expressing small and large ventral lateral neurons (LNvs) of the circadian clock. LNv activity regulates total sleep as well as the rate of sleep onset; both large and small LNvs are part of the sleep circuit. Flies mutant for pdf or its receptor are hypersomnolent, and PDF acts on the LNvs themselves to control sleep. These features of the Drosophila sleep circuit, GABAergic control of onset and maintenance as well as peptidergic control of arousal, support the idea that features of sleep-circuit architecture as well as the mechanisms governing the behavioral transitions between sleep and wake are conserved between mammals and insects.

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

LEC GaAs for integrated circuit applications

NASA Technical Reports Server (NTRS)

Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

1984-01-01

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

Field Effect Transistor /FET/ circuit for variable gin amplifiers

NASA Technical Reports Server (NTRS)

Spaid, G. H.

1969-01-01

Amplifier circuit using two FETs combines improved input and output impedances with relatively large signal handling capability and an immunity from adverse effects of automatic gain control. Circuit has sources and drains in parallel plus a resistive divider for signal and bias to either of the gate terminals.

Neural data science: accelerating the experiment-analysis-theory cycle in large-scale neuroscience.

PubMed

Paninski, L; Cunningham, J P

2018-06-01

Modern large-scale multineuronal recording methodologies, including multielectrode arrays, calcium imaging, and optogenetic techniques, produce single-neuron resolution data of a magnitude and precision that were the realm of science fiction twenty years ago. The major bottlenecks in systems and circuit neuroscience no longer lie in simply collecting data from large neural populations, but also in understanding this data: developing novel scientific questions, with corresponding analysis techniques and experimental designs to fully harness these new capabilities and meaningfully interrogate these questions. Advances in methods for signal processing, network analysis, dimensionality reduction, and optimal control-developed in lockstep with advances in experimental neurotechnology-promise major breakthroughs in multiple fundamental neuroscience problems. These trends are clear in a broad array of subfields of modern neuroscience; this review focuses on recent advances in methods for analyzing neural time-series data with single-neuronal precision. Copyright © 2018 Elsevier Ltd. All rights reserved.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Educational-research laboratory "electric circuits" on the base of digital technologies

NASA Astrophysics Data System (ADS)

Koroteyev, V. I.; Florentsev, V. V.; Florentseva, N. I.

2017-01-01

The problem of research activity of trainees' activation in the educational-research laboratory "Electric Circuits" using innovative methodological solutions and digital technologies is considered. The main task is in creation of the unified experimental research information-educational environment "Electrical Engineering". The problems arising during the developing and application of the modern software and hardware, experimental and research stands and digital control and measuring systems are presented. This paper presents the main stages of development and creation of educational-research laboratory "Electrical Circuits" at the Department of Electrical Engineering of NRNU MEPhI. The authors also consider the analogues of the described research complex offered by various educational institutions and companies. The analysis of their strengths and weaknesses, on which the advantages of the proposed solution are based, is held.

Design of MSR primary circuit with minimum pressure losses

NASA Astrophysics Data System (ADS)

Noga, Tomáš; Žitek, Pavel; Valenta, Václav

This article describes a design of a MSR primary circuit with minimum pressure losses. It includes a brief description of this type of a reactor and its integral layout, properties, purpose, etc. The objective of this paper is to define problems of pressure losses calculation and to design a proper device for a primary circuit of MSR reactor, including its basic dimensions. Thanks to this, it can become an initial project for a construction of a real piece of work. This is the main contribution of the carried out study. Of course, this article is not a detailed solution, but it points out facts and problems, which future designers may have to face. The further step of our work will be a reconstruction of the current experiment for a two-stage flowing.

The misnomer of attention-deficit hyperactivity disorder.

PubMed

Wasserman, Theodore; Wasserman, Lori Drucker

2015-01-01

We propose that attention-deficit disorder represents an inefficiency of an integrated system designed to allocate working memory to designated tasks rather than the absence or dysfunction of a particular form of attention. A significant portion of this inefficiency in the allocation of working memory represents poor engagement of the reward circuit with distinct circuits of learning and performance that control instrumental conditioning (learning). Efficient attention requires the interaction of these circuits. For a significant percentage of individuals who present with attention-deficit disorder, their problems represent the engagement, or lack thereof, of the motivational and reward circuit as opposed to problems, or disorders of attention traditionally defined as problems with orienting, focusing, and sustaining. We demonstrate that there is an integrated system of working-memory allocation that responds by recruiting relevant aspects of both cortex and subcortex to the demands of the task being encountered. In this model, attention is viewed as a gating function determined by novelty, flight-or-fight response, and reward history/valence affecting motivation. We view the traditional models of attention, rather than describe specific types of attention per se, as representing the description of the behavioral output of this integrated orienting and engagement system designed to allocate working memory to task-specific stimuli.

Battery-powered, electrocuting trap for stable flies (Diptera: Muscidae).

PubMed

Pickens, L G

1991-11-01

A solar-charged, battery-powered, electrocuting grid was combined with a white plywood base to make a portable, pulsed-current, pest-electrocuting device that attracted and killed stable flies, Stomoxys calcitrans (L.), outdoors. The grid was powered once every 1-2 s by a 0.016-s pulse of 60-Hz alternating current of 4 mA and 9,500 V. Power was turned off at night by a photoresistor. The trap functioned continuously for 14 d with an unrecharged 12-V, 18A/h lawn-tractor battery and killed as many as 4,000 flies per day. Solar cells were used to charge a single 12-V battery continuously that operated 12 grids for a period of 90 d. The grid did not short circuit for any length of time even during heavy rainstorms or when large insects were killed. The incorporation of moiré patterns and the utilization of the correct size, orientation, and placement of wires made the electrocuting grid itself attractive to stable flies. The traps were spaced at distances of up to 120 m from the battery and pulse circuit. The electrocuting traps were more effective than sticky traps and avoided the problems associated with chemicals. They are well suited for use around calf pens, dog kennels, or large animal shelters.

Critical period inhibition of NKCC1 rectifies synapse plasticity in the somatosensory cortex and restores adult tactile response maps in fragile X mice.

PubMed

He, Qionger; Arroyo, Erica D; Smukowski, Samuel N; Xu, Jian; Piochon, Claire; Savas, Jeffrey N; Portera-Cailliau, Carlos; Contractor, Anis

2018-04-27

Sensory perturbations in visual, auditory and tactile perception are core problems in fragile X syndrome (FXS). In the Fmr1 knockout mouse model of FXS, the maturation of synapses and circuits during critical period (CP) development in the somatosensory cortex is delayed, but it is unclear how this contributes to altered tactile sensory processing in the mature CNS. Here we demonstrate that inhibiting the juvenile chloride co-transporter NKCC1, which contributes to altered chloride homeostasis in developing cortical neurons of FXS mice, rectifies the chloride imbalance in layer IV somatosensory cortex neurons and corrects the development of thalamocortical excitatory synapses during the CP. Comparison of protein abundances demonstrated that NKCC1 inhibition during early development caused a broad remodeling of the proteome in the barrel cortex. In addition, the abnormally large size of whisker-evoked cortical maps in adult Fmr1 knockout mice was corrected by rectifying the chloride imbalance during the early CP. These data demonstrate that correcting the disrupted driving force through GABA A receptors during the CP in cortical neurons restores their synaptic development, has an unexpectedly large effect on differentially expressed proteins, and produces a long-lasting correction of somatosensory circuit function in FXS mice.

NeuroTessMesh: A Tool for the Generation and Visualization of Neuron Meshes and Adaptive On-the-Fly Refinement.

PubMed

Garcia-Cantero, Juan J; Brito, Juan P; Mata, Susana; Bayona, Sofia; Pastor, Luis

2017-01-01

Gaining a better understanding of the human brain continues to be one of the greatest challenges for science, largely because of the overwhelming complexity of the brain and the difficulty of analyzing the features and behavior of dense neural networks. Regarding analysis, 3D visualization has proven to be a useful tool for the evaluation of complex systems. However, the large number of neurons in non-trivial circuits, together with their intricate geometry, makes the visualization of a neuronal scenario an extremely challenging computational problem. Previous work in this area dealt with the generation of 3D polygonal meshes that approximated the cells' overall anatomy but did not attempt to deal with the extremely high storage and computational cost required to manage a complex scene. This paper presents NeuroTessMesh, a tool specifically designed to cope with many of the problems associated with the visualization of neural circuits that are comprised of large numbers of cells. In addition, this method facilitates the recovery and visualization of the 3D geometry of cells included in databases, such as NeuroMorpho, and provides the tools needed to approximate missing information such as the soma's morphology. This method takes as its only input the available compact, yet incomplete, morphological tracings of the cells as acquired by neuroscientists. It uses a multiresolution approach that combines an initial, coarse mesh generation with subsequent on-the-fly adaptive mesh refinement stages using tessellation shaders. For the coarse mesh generation, a novel approach, based on the Finite Element Method, allows approximation of the 3D shape of the soma from its incomplete description. Subsequently, the adaptive refinement process performed in the graphic card generates meshes that provide good visual quality geometries at a reasonable computational cost, both in terms of memory and rendering time. All the described techniques have been integrated into NeuroTessMesh, available to the scientific community, to generate, visualize, and save the adaptive resolution meshes.

The Simulation Computer Based Learning (SCBL) for Short Circuit Multi Machine Power System Analysis

NASA Astrophysics Data System (ADS)

Rahmaniar; Putri, Maharani

2018-03-01

Strengthening Competitiveness of human resources become the reply of college as a conductor of high fomal education. Electrical Engineering Program UNPAB (Prodi TE UNPAB) as one of the department of electrical engineering that manages the field of electrical engineering expertise has a very important part in preparing human resources (HR), Which is required by where graduates are produced by DE UNPAB, Is expected to be able to compete globally, especially related to the implementation of Asean Economic Community (AEC) which requires the active participation of graduates with competence and quality of human resource competitiveness. Preparation of HR formation Competitive is done with the various strategies contained in the Seven (7) Higher Education Standard, one part of which is the implementation of teaching and learning process in Electrical system analysis with short circuit analysis (SCA) This course is a course The core of which is the basis for the competencies of other subjects in the advanced semester at Development of Computer Based Learning model (CBL) is done in the learning of interference analysis of multi-machine short circuit which includes: (a) Short-circuit One phase, (B) Two-phase Short Circuit Disruption, (c) Ground Short Circuit Disruption, (d) Short Circuit Disruption One Ground Floor Development of CBL learning model for Electrical System Analysis course provides space for students to be more active In learning in solving complex (complicated) problems, so it is thrilling Ilkan flexibility of student learning how to actively solve the problem of short-circuit analysis and to form the active participation of students in learning (Student Center Learning, in the course of electrical power system analysis.

Hybrid stretchable circuits on silicone substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk; Liu, Q.

When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Low-Loss Materials for Josephson Qubits

DTIC Science & Technology

2014-10-09

quantum circuit. It also intuitively explains how for a linear circuit the standard results for electrical circuits are obtained, justifying the use of... linear concepts for a weakly non- linear device such as the transmon. It has also become common to use a double sided noise spectrum to represent...loss tangent of large area pad junction. (c) Effective linearized circuit for the double junction, which makes up the admittance $Y$. $L_j$ is the

Monolithic microwave integrated circuit devices for active array antennas

NASA Technical Reports Server (NTRS)

Mittra, R.

1984-01-01

Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

Must "Hard Problems" Be Hard?

ERIC Educational Resources Information Center

Kolata, Gina

1985-01-01

To determine how hard it is for computers to solve problems, researchers have classified groups of problems (polynomial hierarchy) according to how much time they seem to require for their solutions. A difficult and complex proof is offered which shows that a combinatorial approach (using Boolean circuits) may resolve the problem. (JN)

Research of vibration control based on current mode piezoelectric shunt damping circuit

NASA Astrophysics Data System (ADS)

Liu, Weiwei; Mao, Qibo

2017-12-01

The piezoelectric shunt damping circuit using current mode approach is imposed to control the vibration of a cantilever beam. Firstly, the simulated inductance with large values are designed for the corresponding RL series shunt circuits. Moreover, with an example of cantilever beam, the second natural frequency of the beam is targeted to control for experiment. By adjusting the values of the equivalent inductance and equivalent resistance of the shunt circuit, the optimal damping of the shunt circuit is obtained. Meanwhile, the designed piezoelectric shunt damping circuit stability is experimental verified. Experimental results show that the proposed piezoelectric shunt damping circuit based on current mode circuit has good vibration control performance. However, the control performance will be reduced if equivalent inductance and equivalent resistance values deviate from optimal values.

Genetic Parallel Programming: design and implementation.

PubMed

Cheang, Sin Man; Leung, Kwong Sak; Lee, Kin Hong

2006-01-01

This paper presents a novel Genetic Parallel Programming (GPP) paradigm for evolving parallel programs running on a Multi-Arithmetic-Logic-Unit (Multi-ALU) Processor (MAP). The MAP is a Multiple Instruction-streams, Multiple Data-streams (MIMD), general-purpose register machine that can be implemented on modern Very Large-Scale Integrated Circuits (VLSIs) in order to evaluate genetic programs at high speed. For human programmers, writing parallel programs is more difficult than writing sequential programs. However, experimental results show that GPP evolves parallel programs with less computational effort than that of their sequential counterparts. It creates a new approach to evolving a feasible problem solution in parallel program form and then serializes it into a sequential program if required. The effectiveness and efficiency of GPP are investigated using a suite of 14 well-studied benchmark problems. Experimental results show that GPP speeds up evolution substantially.

Determination of hot-spot susceptibility of multistring photovoltaic modules in a central-station application

NASA Technical Reports Server (NTRS)

Gonzalez, C. C.; Weaver, R. W.; Ross, R. G., Jr.; Spencer, R.; Arnett, J. C.

1984-01-01

Part of the effort of the Jet Propulsion Laboratory (JPL) Flat-Plate Solar Array Project (FSA) includes a program to improve module and array reliability. A collaborative activity with industry dealing with the problem of hot-spot heating due to the shadowing of photovoltaic cells in modules and arrays containing several paralleled cell strings is described. The use of multiparallel strings in large central-station arrays introduces the likelihood of unequal current sharing and increased heating levels. Test results that relate power dissipated, current imbalance, cross-strapping frequency, and shadow configuration to hot-spot heating levels are presented. Recommendations for circuit design configurations appropriate to central-station applications that reduce the risk of hot-spot problems are offered. Guidelines are provided for developing hot-spot tests for arrays when current imbalance is a threat.

Process Research On Polycrystalline Silicon Material (PROPSM)

NASA Technical Reports Server (NTRS)

Culik, J. S.; Wohlgemuth, J. H.

1982-01-01

Performance limiting mechanisms in polycrystalline silicon are investigated by fabricating a matrix of solar cells of various thicknesses from polycrystalline silicon wafers of several bulk resistivities. The analysis of the results for the entire matrix indicates that bulk recombination is the dominant factor limiting the short circuit current in large grain (greater than 1 to 2 mm diameter) polycrystalline silicon, the same mechanism that limits the short circuit current in single crystal silicon. An experiment to investigate the limiting mechanisms of open circuit voltage and fill factor for large grain polycrystalline silicon is designed. Two process sequences to fabricate small cells are investigated.

Low temperature probe for dynamic nuclear polarization and multiple-pulse solid-state NMR.

PubMed

Cho, HyungJoon; Baugh, Jonathan; Ryan, Colm A; Cory, David G; Ramanathan, Chandrasekhar

2007-08-01

Here, we describe the design and performance characteristics of a low temperature probe for dynamic nuclear polarization (DNP) experiments, which is compatible with demanding multiple-pulse experiments. The competing goals of a high-Q microwave cavity to achieve large DNP enhancements and a high efficiency NMR circuit for multiple-pulse control lead to inevitable engineering tradeoffs. We have designed two probes-one with a single-resonance RF circuit and a horn-mirror cavity configuration for the microwaves and a second with a double-resonance RF circuit and a double-horn cavity configuration. The advantage of the design is that the sample is in vacuum, the RF circuits are locally tuned, and the microwave resonator has a large internal volume that is compatible with the use of RF and gradient coils.

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1980-01-01

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.

Mems: Platform for Large-Scale Integrated Vacuum Electronic Circuits

DTIC Science & Technology

2017-03-20

SECURITY CLASSIFICATION OF: The objective of the LIVEC advanced study project was to develop a platform for large-scale integrated vacuum electronic ...Distribution Unlimited UU UU UU UU 20-03-2017 1-Jul-2014 30-Jun-2015 Final Report: MEMS Platform for Large-Scale Integrated Vacuum Electronic ... Electronic Circuits (LIVEC) Contract No: W911NF-14-C-0093 COR Dr. James Harvey U.S. ARO RTP, NC 27709-2211 Phone: 702-696-2533 e-mail

Organic field effect transistor with ultra high amplification

NASA Astrophysics Data System (ADS)

Torricelli, Fabrizio

2016-09-01

High-gain transistors are essential for the large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show organic transistors fabricated on plastic foils enabling unipolar amplifiers with ultra-gain. The proposed approach is general and opens up new opportunities for ultra-large signal amplification in organic circuits and sensors.

Development and application of an information-analytic system on the problem of flow accelerated corrosion of pipeline elements in the secondary coolant circuit of VVER-440-based power units at the Novovoronezh nuclear power plant

NASA Astrophysics Data System (ADS)

Tomarov, G. V.; Povarov, V. P.; Shipkov, A. A.; Gromov, A. F.; Kiselev, A. N.; Shepelev, S. V.; Galanin, A. V.

2015-02-01

Specific features relating to development of the information-analytical system on the problem of flow-accelerated corrosion of pipeline elements in the secondary coolant circuit of the VVER-440-based power units at the Novovoronezh nuclear power plant are considered. The results from a statistical analysis of data on the quantity, location, and operating conditions of the elements and preinserted segments of pipelines used in the condensate-feedwater and wet steam paths are presented. The principles of preparing and using the information-analytical system for determining the lifetime to reaching inadmissible wall thinning in elements of pipelines used in the secondary coolant circuit of the VVER-440-based power units at the Novovoronezh NPP are considered.

Teaching with Concrete and Abstract Visual Representations: Effects on Students' Problem Solving, Problem Representations, and Learning Perceptions

ERIC Educational Resources Information Center

Moreno, Roxana; Ozogul, Gamze; Reisslein, Martin

2011-01-01

In 3 experiments, we examined the effects of using concrete and/or abstract visual problem representations during instruction on students' problem-solving practice, near transfer, problem representations, and learning perceptions. In Experiments 1 and 2, novice students learned about electrical circuit analysis with an instructional program that…

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

NASA Technical Reports Server (NTRS)

Eldin, A. G.

1991-01-01

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

Synchronous Half-Wave Rectifier

NASA Technical Reports Server (NTRS)

Rippel, Wally E.

1989-01-01

Synchronous rectifying circuit behaves like diode having unusually low voltage drop during forward-voltage half cycles. Circuit particularly useful in power supplies with potentials of 5 Vdc or less, where normal forward-voltage drops in ordinary diodes unacceptably large. Fabricated as monolithic assembly or as hybrid. Synchronous half-wave rectifier includes active circuits to attain low forward voltage drop and high rectification efficiency.

An Integer Programming-Based Generalized Vehicle Routing Approach for Printed Circuit Board Assembly Optimization

ERIC Educational Resources Information Center

Seth, Anupam

2009-01-01

Production planning and scheduling for printed circuit, board assembly has so far defied standard operations research approaches due to the size and complexity of the underlying problems, resulting in unexploited automation flexibility. In this thesis, the increasingly popular collect-and-place machine configuration is studied and the assembly…

Perspective on Flipping Circuits I

ERIC Educational Resources Information Center

Kim, Gloria J.; Patrick, Erin E.; Srivastava, Ramakant; Law, Mark E.

2014-01-01

A flipped-classroom approach was implemented in a Circuits I class for electrical and computer engineering majors to lower its high attrition and failure rate. Students were asked to watch online lectures and then come to class prepared to work problems in small groups of four. The attitude, retention, and performance of students in the flipped…

Parallel Computations in Insect and Mammalian Visual Motion Processing

PubMed Central

Clark, Damon A.; Demb, Jonathan B.

2016-01-01

Sensory systems use receptors to extract information from the environment and neural circuits to perform subsequent computations. These computations may be described as algorithms composed of sequential mathematical operations. Comparing these operations across taxa reveals how different neural circuits have evolved to solve the same problem, even when using different mechanisms to implement the underlying math. In this review, we compare how insect and mammalian neural circuits have solved the problem of motion estimation, focusing on the fruit fly Drosophila and the mouse retina. Although the two systems implement computations with grossly different anatomy and molecular mechanisms, the underlying circuits transform light into motion signals with strikingly similar processing steps. These similarities run from photoreceptor gain control and spatiotemporal tuning to ON and OFF pathway structures, motion detection, and computed motion signals. The parallels between the two systems suggest that a limited set of algorithms for estimating motion satisfies both the needs of sighted creatures and the constraints imposed on them by metabolism, anatomy, and the structure and regularities of the visual world. PMID:27780048

Parallel Computations in Insect and Mammalian Visual Motion Processing.

PubMed

Clark, Damon A; Demb, Jonathan B

2016-10-24

Sensory systems use receptors to extract information from the environment and neural circuits to perform subsequent computations. These computations may be described as algorithms composed of sequential mathematical operations. Comparing these operations across taxa reveals how different neural circuits have evolved to solve the same problem, even when using different mechanisms to implement the underlying math. In this review, we compare how insect and mammalian neural circuits have solved the problem of motion estimation, focusing on the fruit fly Drosophila and the mouse retina. Although the two systems implement computations with grossly different anatomy and molecular mechanisms, the underlying circuits transform light into motion signals with strikingly similar processing steps. These similarities run from photoreceptor gain control and spatiotemporal tuning to ON and OFF pathway structures, motion detection, and computed motion signals. The parallels between the two systems suggest that a limited set of algorithms for estimating motion satisfies both the needs of sighted creatures and the constraints imposed on them by metabolism, anatomy, and the structure and regularities of the visual world. Copyright © 2016 Elsevier Ltd. All rights reserved.

Packaging system with cleaning channel and method of making the same

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fang, Lu

A packaging structure and method for surface mount integrated circuits reduces electrochemical migration (ECM) problems by including one or more cleaning channels to effectively and efficiently remove flux residue that may otherwise remain lodged in gaps between the surface mount package and the printed circuit board. A cleaning channel may be formed along a bottom surface of the surface mount package (i.e., the surface facing the printed circuit board), or along a portion of a top surface of the printed circuit board. In either case, the inclusion of a cleaning channel enlarges the gap between the bottom surface of themore » surface mount package and the printed circuit board and creates a path for contaminants to be flushed out during a cleaning process.« less

A power management circuit with 50% efficiency and large load capacity for triboelectric nanogenerator

NASA Astrophysics Data System (ADS)

Bao, Dechun; Luo, Lichuan; Zhang, Zhaohua; Ren, Tianling

2017-09-01

Recently, triboelectric nanogenerators (TENGs), as a collection technology with characteristics of high reliability, high energy density and low cost, has attracted more and more attention. However, the energy coming from TENGs needs to be stored in a storage unit effectively due to its unstable ac output. The traditional energy storage circuit has an extremely low energy storage efficiency for TENGs because of their high internal impedance. This paper presents a new power management circuit used to optimize the energy using efficiency of TENGs, and realize large load capacity. The power management circuit mainly includes rectification storage circuit and DC-DC management circuit. A rotating TENG with maximal energy output of 106 mW at 170 rpm based on PCB is used for the experimental verification. Experimental results show that the power energy transforming to the storage capacitor reach up to 53 mW and the energy using efficiency is calculated as 50%. When different loading resistances range from 0.82 to 34.5 k {{Ω }} are connected to the storage capacitor in parallel, the power energy stored in the storage capacitor is all about 52.5 mW. Getting through the circuit, the power energy coming from the TENGs can be used to drive numerous conventional electronics, such as wearable watches.

Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Application de la methode de la reponse frequentielle a l'arret "SSFR", sur une machine synchrone a poles saillants de grande puissance

NASA Astrophysics Data System (ADS)

Belqorchi, Abdelghafour

Forty years after Watson and Manchur conducted the Stand-Still Frequency Response (SSFR) test on a large turbogenerator, the applicability of this technic on a powerful salient pole synchronous generator has yet to be confirmed. The scientific literature on the subject is rare and very few have attempted to compare SSFR parameter results with those deduced by classical tests. The validity of SSFR on large salient pole machines has still to be proven. The present work aims in participating to fill this knowledge gap. It can be used to build a database of measurements highly needed to draw the validity of the technic. Also, the author hopes to demonstrate the potential of SSFR model to represent the machine, not only in cases of weak disturbances but also strong ones such as instantaneous three-phase short-circuit faults. The difficulties raised by previous searchers are: The lack of accuracy in very low frequency measurements; The difficulty in rotor positioning, according to d and q axes, in case of salient pole machines; The measurement current level influence on magnetizing inductances, in axes-d and; The rotation impact on damper circuits for some rotors design. Aware of the above difficulties, the author conducted an SSFR test on a large salient pole machine (285 MVA). The generator under test has laminated non isolated rotor and an integral slot number. The damper windings in adjacent poles are connected together, via the polar core and the rotor rim. Finally, the damping circuit is unaffected by rotation. To improve the measurement accuracy, in very low frequencies, the most precise frequency response analyser available on the market was used. Besides, the frequency responses of the signals conditioning modules (i.e., isolation, amplification...) were accounted for to correct the four measured SSFR transfer functions. Immunization against noise and use of instrumentation in their optimum range, were other technics rigorously applied. Magnetizing inductances, being influenced by the measurement current magnitude, the latter was maintained constant in the range 1mHz-20Hz. Other problems such as the rotation impact on damper circuits or the difficulty of rotor positioning are eliminated or attenuated by the intrinsic characteristics of the machine. Regarding the data analysis, the Maximum Likelihood Estimation (MLE) method was used to determine the third and second order equivalent circuit from SSFR measurements. In d-axis, the approaches of adjustment to two and three transfer functions (Ld(s), sG(s) and Lafo(s)) were explored. The second order model, derived from (Ld( s) and G(s)), was used to deduce the machine standard parameters. The latter were compared with the values given by the manufacturer and by conventional on-site tests: Instantaneous three-phase short-circuit, Dalton-Cameron and the d-axis transient time constant at open stator (T'do). The comparison showed the good accuracy of SSFR values. Subsequently, a machine model was built in EMTP-RV based on SSFR standard parameters. The model was able to reproduce stator and rotor currents measured during instantaneous three-phase short-circuit test. Some adjustments, to SSFR parameters, were needed to reproduce stator voltage and rotor current acquired during load rejection d-axis test. It is worthwhile noting that the load rejection d-axis test, recently added to IEEE 115-2009 annex, must be modified to take into account the saturation and excitation impedance impact on deduced parameters. Regarding this issue, some suggestions are proposed by the author. The obtained SSFR results, contribute to raise confidence on SSFR application on large salient pole machines. In addition, it shows the aptitude of the SSFR model to represent the machine in both cases of weak and strong disturbances, at least on machines similar the one studied. Index Terms: Salient pole, frequency response, SSFR, equivalent circuit, operational inductance.

Ergonomics improvements of the visual inspection process in a printed circuit assembly factory.

PubMed

Yeow, Paul H P; Sen, Rabindra Nath

2004-01-01

An ergonomics improvement study was conducted on the visual inspection process of a printed circuit assembly (PCA) factory. The process was studied through subjective assessment and direct observation. Three problems were identified: operators' eye problems, insufficient time for inspection and ineffective visual inspection. These problems caused a huge yearly rejection cost of US 298,240 dollars, poor quality, customer dissatisfaction and poor occupational health and safety. Ergonomics interventions were made to rectify the problems: reduced usage of a magnifying glass, the use of less glaring inspection templates, inspection of only electrically non-tested components and introduction of a visual inspection sequence. The interventions produced savings in rejection cost, reduced operators' eye strain, headaches and watery eyes, lowered the defect percentage at customers' sites and increased the factory's productivity and customer satisfaction.

The scientific data acquisition system of the GAMMA-400 space project

NASA Astrophysics Data System (ADS)

Bobkov, S. G.; Serdin, O. V.; Gorbunov, M. S.; Arkhangelskiy, A. I.; Topchiev, N. P.

2016-02-01

The description of scientific data acquisition system (SDAS) designed by SRISA for the GAMMA-400 space project is presented. We consider the problem of different level electronics unification: the set of reliable fault-tolerant integrated circuits fabricated on Silicon-on-Insulator 0.25 mkm CMOS technology and the high-speed interfaces and reliable modules used in the space instruments. The characteristics of reliable fault-tolerant very large scale integration (VLSI) technology designed by SRISA for the developing of computation systems for space applications are considered. The scalable net structure of SDAS based on Serial RapidIO interface including real-time operating system BAGET is described too.

Development of a switched integrator amplifier for high-accuracy optical measurements.

PubMed

Mountford, John; Porrovecchio, Geiland; Smid, Marek; Smid, Radislav

2008-11-01

In the field of low flux optical measurements, the development and use of large area silicon detectors is becoming more frequent. The current/voltage conversion of their photocurrent presents a set of problems for traditional transimpedance amplifiers. The switched integration principle overcomes these limitations. We describe the development of a fully characterized current-voltage amplifier using the switched integrator technique. Two distinct systems have been developed in parallel at the United Kingdom's National Physical Laboratory (NPL) and Czech Metrology Institute (CMI) laboratories. We present the circuit theory and best practice in the design and construction of switched integrators. In conclusion the results achieved and future developments are discussed.

Starting Circuit For Erasable Programmable Logic Device

NASA Technical Reports Server (NTRS)

Cole, Steven W.

1990-01-01

Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.

VLSI (Very Large Scale Integrated Circuits) Device Reliability Models.

DTIC Science & Technology

1984-12-01

CIRCUIT COMPLEXITY FAILURE RATES FOR... A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: C1 AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR...A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: Cl AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR... A-41 LINEAR DEVICES IN...19 National Semiconductor 20 Nitron 21 Raytheon 22 Sprague 23 Synertek 24 Teledyne Crystalonics 25 TRW Semiconductor 26 Zilog The following companies

A novel prediction method about single components of analog circuits based on complex field modeling.

PubMed

Zhou, Jingyu; Tian, Shulin; Yang, Chenglin

2014-01-01

Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments.

Design and analysis of APD photoelectric detecting circuit

NASA Astrophysics Data System (ADS)

Fang, R.; Wang, C.

2015-11-01

In LADAR system, photoelectric detecting circuit is the key part in photoelectric conversion, which determines speed of respond, sensitivity and fidelity of the system. This paper presents the design of a matched APD Photoelectric detecting circuit. The circuit accomplishes low-noise readout and high-gain amplification of the weak photoelectric signal. The main performances, especially noise and transient response of the circuit are analyzed. In order to obtain large bandwidth, decompensated operational amplifiers are applied. Circuit simulations allow the architecture validation and the global performances to be predicted. The simulation results show that the gain of the detecting circuit is 630kΩ while the bandwidth is 100MHz, and 28dB dynamic range is achieved. Furthermore, the variation of the output pulse width is less than 0.9ns.

A scalable multi-photon coincidence detector based on superconducting nanowires.

PubMed

Zhu, Di; Zhao, Qing-Yuan; Choi, Hyeongrak; Lu, Tsung-Ju; Dane, Andrew E; Englund, Dirk; Berggren, Karl K

2018-06-04

Coincidence detection of single photons is crucial in numerous quantum technologies and usually requires multiple time-resolved single-photon detectors. However, the electronic readout becomes a major challenge when the measurement basis scales to large numbers of spatial modes. Here, we address this problem by introducing a two-terminal coincidence detector that enables scalable readout of an array of detector segments based on superconducting nanowire microstrip transmission line. Exploiting timing logic, we demonstrate a sixteen-element detector that resolves all 136 possible single-photon and two-photon coincidence events. We further explore the pulse shapes of the detector output and resolve up to four-photon events in a four-element device, giving the detector photon-number-resolving capability. This new detector architecture and operating scheme will be particularly useful for multi-photon coincidence detection in large-scale photonic integrated circuits.

Electro-thermal battery model identification for automotive applications

NASA Astrophysics Data System (ADS)

Hu, Y.; Yurkovich, S.; Guezennec, Y.; Yurkovich, B. J.

This paper describes a model identification procedure for identifying an electro-thermal model of lithium ion batteries used in automotive applications. The dynamic model structure adopted is based on an equivalent circuit model whose parameters are scheduled on the state-of-charge, temperature, and current direction. Linear spline functions are used as the functional form for the parametric dependence. The model identified in this way is valid inside a large range of temperatures and state-of-charge, so that the resulting model can be used for automotive applications such as on-board estimation of the state-of-charge and state-of-health. The model coefficients are identified using a multiple step genetic algorithm based optimization procedure designed for large scale optimization problems. The validity of the procedure is demonstrated experimentally for an A123 lithium ion iron-phosphate battery.

Recycling of metal bearing electronic scrap in a plasma furnace

NASA Astrophysics Data System (ADS)

Jarosz, Piotr; Małecki, Stanisław; Gargul, Krzysztof

2011-12-01

The recycling of electronic waste and the recovery of valuable components are large problems in the modern world economy. This paper presents the effects of melting sorted electronic scrap in a plasma furnace. Printed circuit boards, cables, and windings were processed separately. The characteristics of the obtained products (i.e., alloy metal, slag, dust, and gases) are presented. A method of their further processing in order to obtain commercial products is proposed. Because of the chemical composition and physical properties, the waste slag is environmentally inert and can be used for the production of abrasives. Process dusts containing large amounts of carbon and its compounds have a high calorific value. That makes it possible to use them for energy generation. The gas has a high calorific value, and its afterburning combined with energy recovery is necessary.

Formal semantics for a subset of VHDL and its use in analysis of the FTPP scoreboard circuit

NASA Technical Reports Server (NTRS)

Bickford, Mark

1994-01-01

In the first part of the report, we give a detailed description of an operational semantics for a large subset of VHDL, the VHSIC Hardware Description Language. The semantics is written in the functional language Caliban, similar to Haskell, used by the theorem prover Clio. We also describe a translator from VHDL into Caliban semantics and give some examples of its use. In the second part of the report, we describe our experience in using the VHDL semantics to try to verify a large VHDL design. We were not able to complete the verification due to certain complexities of VHDL which we discuss. We propose a VHDL verification method that addresses the problems we encountered but which builds on the operational semantics described in the first part of the report.

Calculating Second-Order Effects in MOSFET's

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

1990-01-01

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Magnetically coupled resonance wireless charging technology principles and transfer mechanisms

NASA Astrophysics Data System (ADS)

Zhou, Jiehua; Wan, Jian; Ma, Yinping

2017-05-01

With the tenure of Electric-Vehicle rising around the world, the charging methods have been paid more and more attention, the current charging mode mainly has the charging posts and battery swapping station. The construction of the charging pile or battery swapping station not only require lots of manpower, material costs but the bare conductor is also easy to generate electric spark hidden safety problems, still occupies large space. Compared with the wired charging, wireless charging mode is flexible, unlimited space and location factors and charging for vehicle safety and quickly. It complements the traditional charging methods in adaptability and the independent charge deficiencies. So the researching the wireless charging system have an important practical significance and application value. In this paper, wireless charging system designed is divided into three parts: the primary side, secondary side and resonant coupling. The main function of the primary side is to generate high-frequency alternating current, so selecting CLASS-E amplifier inverter structure through the research on full bridge, half-bridge and power amplification circuit. Addition, the wireless charging system is susceptible to outside interference, frequency drift phenomenon. Combined with the wireless energy transmission characteristics, resonant parts adopt resonant coupling energy transmission scheme and the Series-Series coupling compensation structure. For the electric vehicle charging power and voltage requirements, the main circuit is a full bridge inverter and Boost circuit used as the secondary side.

Body Bias usage in UTBB FDSOI designs: A parametric exploration approach

NASA Astrophysics Data System (ADS)

Puschini, Diego; Rodas, Jorge; Beigne, Edith; Altieri, Mauricio; Lesecq, Suzanne

2016-03-01

Some years ago, UTBB FDSOI has appeared in the horizon of low-power circuit designers. With the 14 nm and 10 nm nodes in the road-map, the industrialized 28 nm platform promises highly efficient designs with Ultra-Wide Voltage Range (UWVR) thanks to extended Body Bias properties. From the power management perspective, this new opportunity is considered as a new degree of freedom in addition to the classic Dynamic Voltage Scaling (DVS), increasing the complexity of the power optimization problem at design time. However, so far no formal or empiric tool allows to early evaluate the real need for a Dynamic Body Bias (DBB) mechanism on future designs. This paper presents a parametric exploration approach that analyzes the benefits of using Body Bias in 28 nm UTBB FDSOI circuits. The exploration is based on electrical simulations of a ring-oscillator structure. These experiences show that a Body Bias strategy is not always required but, they underline the large power reduction that can be achieved when mandatory. Results are summarized in order to help designers to analyze how to choose the best dynamic power management strategy for a given set of operating conditions in terms of temperature, circuit activity and process choice. This exploration contributes to the identification of conditions that make DBB more efficient than DVS, and vice versa, and when both methods are mandatory to optimize power consumption.

Basal Ganglia Circuits as Targets for Neuromodulation in Parkinson Disease.

PubMed

DeLong, Mahlon R; Wichmann, Thomas

2015-11-01

The revival of stereotactic surgery for Parkinson disease (PD) in the 1990s, with pallidotomy and then with high-frequency deep brain stimulation (DBS), has led to a renaissance in functional surgery for movement and other neuropsychiatric disorders. To examine the scientific foundations and rationale for the use of ablation and DBS for treatment of neurologic and psychiatric diseases, using PD as the primary example. A summary of the large body of relevant literature is presented on anatomy, physiology, pathophysiology, and functional surgery for PD and other basal ganglia disorders. The signs and symptoms of movement disorders appear to result largely from signature abnormalities in one of several parallel and largely segregated basal ganglia thalamocortical circuits (ie, the motor circuit). The available evidence suggests that the varied movement disorders resulting from dysfunction of this circuit result from propagated disruption of downstream network activity in the thalamus, cortex, and brainstem. Ablation and DBS act to free downstream networks to function more normally. The basal ganglia thalamocortical circuit may play a key role in the expression of disordered movement, and the basal ganglia-brainstem projections may play roles in akinesia and disturbances of gait. Efforts are under way to target circuit dysfunction in brain areas outside of the traditionally implicated basal ganglia thalamocortical system, in particular, the pedunculopontine nucleus, to address gait disorders that respond poorly to levodopa and conventional DBS targets. Deep brain stimulation is now the treatment of choice for many patients with advanced PD and other movement disorders. The success of DBS and other forms of neuromodulation for neuropsychiatric disorders is the result of the ability to modulate circuit activity in discrete functional domains within the basal ganglia circuitry with highly focused interventions, which spare uninvolved areas that are often disrupted with drugs.

A Hybrid Circuit for Spoof Surface Plasmons and Spatial Waveguide Modes to Reach Controllable Band-Pass Filters

PubMed Central

Zhang, Qian; Zhang, Hao Chi; Wu, Han; Cui, Tie Jun

2015-01-01

We propose a hybrid circuit for spoof surface plasmon polaritons (SPPs) and spatial waveguide modes to develop new microwave devices. The hybrid circuit includes a spoof SPP waveguide made of two anti-symmetric corrugated metallic strips and a traditional substrate integrated waveguide (SIW). From dispersion relations, we show that the electromagnetic waves only can propagate through the hybrid circuit when the operating frequency is less than the cut-off frequency of the SPP waveguide and greater than the cut-off frequency of SIW, generating efficient band-pass filters. We demonstrate that the pass band is controllable in a large range by designing the geometrical parameters of SPP waveguide and SIW. Full-wave simulations are provided to show the large adjustability of filters, including ultra wideband and narrowband filters. We fabricate a sample of the new hybrid device in the microwave frequencies, and measurement results have excellent agreements to numerical simulations, demonstrating excellent filtering characteristics such as low loss, high efficiency, and good square ratio. The proposed hybrid circuit gives important potential to accelerate the development of plasmonic integrated functional devices and circuits in both microwave and terahertz frequencies. PMID:26552584

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

A Hybrid Circuit for Spoof Surface Plasmons and Spatial Waveguide Modes to Reach Controllable Band-Pass Filters.

PubMed

Zhang, Qian; Zhang, Hao Chi; Wu, Han; Cui, Tie Jun

2015-11-10

We propose a hybrid circuit for spoof surface plasmon polaritons (SPPs) and spatial waveguide modes to develop new microwave devices. The hybrid circuit includes a spoof SPP waveguide made of two anti-symmetric corrugated metallic strips and a traditional substrate integrated waveguide (SIW). From dispersion relations, we show that the electromagnetic waves only can propagate through the hybrid circuit when the operating frequency is less than the cut-off frequency of the SPP waveguide and greater than the cut-off frequency of SIW, generating efficient band-pass filters. We demonstrate that the pass band is controllable in a large range by designing the geometrical parameters of SPP waveguide and SIW. Full-wave simulations are provided to show the large adjustability of filters, including ultra wideband and narrowband filters. We fabricate a sample of the new hybrid device in the microwave frequencies, and measurement results have excellent agreements to numerical simulations, demonstrating excellent filtering characteristics such as low loss, high efficiency, and good square ratio. The proposed hybrid circuit gives important potential to accelerate the development of plasmonic integrated functional devices and circuits in both microwave and terahertz frequencies.

Communications processor for C3 analysis and wargaming

NASA Astrophysics Data System (ADS)

Clark, L. N.; Pless, L. D.; Rapp, R. L.

1982-03-01

This thesis developed the software capability to allow the investigation of c3 problems, procedures and methodologies. The resultant communications model, that while independent of a specific wargame, is currently implemented in conjunction with the McClintic Theater Model. It provides a computerized message handling system (C3 Model) which allows simulation of communication links (circuits) with user-definable delays; garble and loss rates; and multiple circuit types, addresses, and levels of command. It is designed to be used for test and evaluation of command and control problems in the areas of organizational relationships, communication networks and procedures, and combat doctrine or tactics.

Coupling apparatus for a metal vapor laser

DOEpatents

Ball, D.G.; Miller, J.L.

1993-02-23

Coupling apparatus for a large bore metal vapor laser is disclosed. The coupling apparatus provides for coupling high voltage pulses (approximately 40 KV) to a metal vapor laser with a high repetition rate (approximately 5 KHz). The coupling apparatus utilizes existing thyratron circuits and provides suitable power input to a large bore metal vapor laser while maintaining satisfactory operating lifetimes for the existing thyratron circuits.

Coupling apparatus for a metal vapor laser

DOEpatents

Ball, Don G.; Miller, John L.

1993-01-01

Coupling apparatus for a large bore metal vapor laser is disclosed. The coupling apparatus provides for coupling high voltage pulses (approximately 40 KV) to a metal vapor laser with a high repetition rate (approximately 5 KHz). The coupling apparatus utilizes existing thyratron circuits and provides suitable power input to a large bore metal vapor laser while maintaining satisfactory operating lifetimes for the existing thyratron circuits.

Engineering a robust DNA split proximity circuit with minimized circuit leakage

PubMed Central

Ang, Yan Shan; Tong, Rachel; Yung, Lin-Yue Lanry

2016-01-01

DNA circuit is a versatile and highly-programmable toolbox which can potentially be used for the autonomous sensing of dynamic events, such as biomolecular interactions. However, the experimental implementation of in silico circuit designs has been hindered by the problem of circuit leakage. Here, we systematically analyzed the sources and characteristics of various types of leakage in a split proximity circuit which was engineered to spatially probe for target sites held within close proximity. Direct evidence that 3′-truncated oligonucleotides were the major impurity contributing to circuit leakage was presented. More importantly, a unique strategy of translocating a single nucleotide between domains, termed ‘inter-domain bridging’, was introduced to eliminate toehold-independent leakages while enhancing the strand displacement kinetics across a three-way junction. We also analyzed the dynamics of intermediate complexes involved in the circuit computation in order to define the working range of domain lengths for the reporter toehold and association region respectively. The final circuit design was successfully implemented on a model streptavidin-biotin system and demonstrated to be robust against both circuit leakage and biological interferences. We anticipate that this simple signal transduction strategy can be used to probe for diverse biomolecular interactions when used in conjunction with specific target recognition moieties. PMID:27207880

Fundamentals of Physics, Part 3 (Chapters 22-33)

NASA Astrophysics Data System (ADS)

Halliday, David; Resnick, Robert; Walker, Jearl

2004-03-01

Chapter 21. Electric Charge. Why do video monitors in surgical rooms increase the risk of bacterial contamination? 21-1 What Is Physics? 21-2 Electric Charge. 21-3 Conductors and Insulators. 21-4 Coulomb's Law. 21-5 Charge Is Quantized. 21-6 Charge Is Conserved. Review & Summary. Questions. Problems. Chapter 22. Electric Fields. What causes sprites, those brief .ashes of light high above lightning storms? 22-1 What Is Physics? 22-2 The Electric Field. 22-3 Electric Field Lines. 22-4 The Electric Field Due to a Point Charge. 22-5 The Electric Field Due to an Electric Dipole. 22-6 The Electric Field Due to a Line of Charge. 22-7 The Electric Field Due to a Charged Disk. 22-8 A Point Charge in an Electric Field. 22-9 A Dipole in an Electric Field. Review & Summary. Questions. Problems. Chapter 23. Gauss' Law. How can lightning harm you even if it do es not strike you? 23-1 What Is Physics? 23-2 Flux. 23-3 Flux of an Electric Field. 23-4 Gauss' Law. 23-5 Gauss' Law and Coulomb's Law. 23-6 A Charged Isolated Conductor. 23-7 Applying Gauss' Law: Cylindrical Symmetry. 23-8 Applying Gauss' Law: Planar Symmetry. 23-9 Applying Gauss' Law: Spherical Symmetry. Review & Summary. Questions. Problems. Chapter 24. Electric Potential. What danger does a sweater pose to a computer? 24-1 What Is Physics? 24-2 Electric Potential Energy. 24-3 Electric Potential. 24-4 Equipotential Surfaces. 24-5 Calculating the Potential from the Field. 24-6 Potential Due to a Point Charge. 24-7 Potential Due to a Group of Point Charges. 24-8 Potential Due to an Electric Dipole. 24-9 Potential Due to a Continuous Charge Distribution. 24-10 Calculating the Field from the Potential. 24-11 Electric Potential Energy of a System of Point Charges. 24-12 Potential of a Charged Isolated Conductor. Review & Summary. Questions. Problems. Chapter 25. Capacitance. How did a fire start in a stretcher being withdrawn from an oxygen chamber? 25-1 What Is Physics? 25-2 Capacitance. 25-3 Calculating the Capacitance. 25-4 Capacitors in Parallel and in Series. 25-5 Energy Stored in an Electric Field. 25-6 Capacitor with a Dielectric. 25-7 Dielectrics: An Atomic View. 25-8 Dielectrics and Gauss' Law. Review & Summary. Questions. Problems. Chapter 26. Current and Resistance. What precaution should you take if caught outdoors during a lightning storm? 26-1 What Is Physics? 26-2 Electric Current. 26-3 Current Density. 26-4 Resistance and Resistivity. 26-5 Ohm's Law. 26-6 A Microscopic View of Ohm's Law. 26-7 Power in Electric Circuits. 26-8 Semiconductors. 26-9 Superconductors. Review & Summary. Questions. Problems. Chapter 27. Circuits. How can a pit crew avoid a fire while fueling a charged race car? 27-1 What Is Physics? 27-2 "Pumping" Charges. 27-3 Work, Energy, and Emf. 27-4 Calculating the Current in a Single-Loop Circuit. 27-5 Other Single-Loop Circuits. 27-6 Potential Difference Between Two Points. 27-7 Multiloop Circuits. 27-8 The Ammeter and the Voltmeter. 27-9 RC Circuits. Review & Summary. Questions. Problems. Chapter 28. Magnetic Fields. How can a beam of fast neutrons, which are electrically neutral, be produced in a hospital to treat cancer patients? 28-1 What Is Physics? 28-2 What Produces a Magnetic Field? 28-3 The Definition of 736 :B. 28-4 Crossed Fields: Discovery of the Electron . 28-5 Crossed Fields: The Hall Effect. 28-6 A Circulating Charged Particle. 28-7 Cyclotrons and Synchrotrons. 28-8 Magnetic Force on a Current-Carrying Wire. 28-9 Torque on a Current Loop. 28-10 The Magnetic Dipole Moment. Review & Summary. Questions. Problems. Chapter 29. Magnetic Fields Due to Currents. How can the human brain produce a detectable magnetic field without any magnetic material? 29-1 What Is Physics? 29-2 Calculating the Magnetic Field Due to a Current. 29-3 Force Between Two Parallel Currents. 29-4 Ampere's Law. 29-5 Solenoids and Toroids. 29-6 A Current-Carrying Coil as a Magnetic Dipole. Review & Summary. Questions. Problems. Chapter 30. Induction and Inductance. How can the magnetic .eld used in an MRI scan cause a patient to be burned? 30-1 What Is Physics? 30-2 Two Experiments. 30-3 Faraday's Law of Induction. 30-4 Lenz's Law. 30-5 Induction and Energy Transfers. 30-6 Induced Electric Fields. 30-7 Inductors and Inductance. 30-8 Self-Induction. 30-9 RL Circuits. 30-10 Energy Stored in a Magnetic Field. 30-11 Energy Density of a Magnetic Field. 30-12 Mutual Induction. Review & Summary. Questions. Problems. Chapter 31. Electromagnetic Oscillations and Alternating Current. How did a solar eruption knock out the power-grid system of Quebec? 31-1 What Is Physics? 31-2 LC Oscillations, Qualitatively. 31-3 The Electrical-Mechanical Analogy. 31-4 LC Oscillations, Quantitatively. 31-5 Damped Oscillations in an RLC Circuit. 31-6 Alternating Current. 31-7 Forced Oscillations. 31-8 Three Simple Circuits. 31-9 The Series RLC Circuit. 31-10 Power in Alternating-Current Circuits. 31-11 Transformers. Review & Summary. Questions. Problems. Chapter 32. Maxwell's Equations; Magnetism of Matter. How can a mural painting record the direction of Earth's magnetic field? 32-1 What Is Physics? 32-2 Gauss' Law for Magnetic Fields. 32-3 Induced Magnetic Fields. 32-4 Displacement Current. 32-5 Maxwell's Equations. 32-6 Magnets. 32-7 Magnetism and Electrons. 32-8 Magnetic Materials. 32-9 Diamagnetism. 32-10 Paramagnetism. 32-11 Ferromagnetism. Review & Summary. Questions. Problems. Appendices. A. The International System of Units (SI). B. Some Fundamental Constants of Physics. C. Some Astronomical Data. D. Conversion Factors. E. Mathematical Formulas. F. Properties of the Elements. G. Periodic Table of the Elements. Answers to Checkpoints and Odd-Numbered Questions and Problems. Index.

Discontinuous Mode Power Supply

NASA Technical Reports Server (NTRS)

Lagadinos, John; Poulos, Ethel

2012-01-01

A document discusses the changes made to a standard push-pull inverter circuit to avoid saturation effects in the main inverter power supply. Typically, in a standard push-pull arrangement, the unsymmetrical primary excitation causes variations in the volt second integral of each half of the excitation cycle that could lead to the establishment of DC flux density in the magnetic core, which could eventually cause saturation of the main inverter transformer. The relocation of the filter reactor normally placed across the output of the power supply solves this problem. The filter reactor was placed in series with the primary circuit of the main inverter transformer, and is presented as impedance against the sudden changes on the input current. The reactor averaged the input current in the primary circuit, avoiding saturation of the main inverter transformer. Since the implementation of the described change, the above problem has not reoccurred, and failures in the main power transistors have been avoided.

A visually guided collision warning system with a neuromorphic architecture.

PubMed

Okuno, Hirotsugu; Yagi, Tetsuya

2008-12-01

We have designed a visually guided collision warning system with a neuromorphic architecture, employing an algorithm inspired by the visual nervous system of locusts. The system was implemented with mixed analog-digital integrated circuits consisting of an analog resistive network and field-programmable gate array (FPGA) circuits. The resistive network processes the interaction between the laterally spreading excitatory and inhibitory signals instantaneously, which is essential for real-time computation of collision avoidance with a low power consumption and a compact hardware. The system responded selectively to approaching objects of simulated movie images at close range. The system was, however, confronted with serious noise problems due to the vibratory ego-motion, when it was installed in a mobile miniature car. To overcome this problem, we developed the algorithm, which is also installable in FPGA circuits, in order for the system to respond robustly during the ego-motion.

Cleaning of printed circuit assemblies with surface-mounted components

NASA Astrophysics Data System (ADS)

Arzigian, J. S.

The need for ever-increasing miniaturization of airborne instrumentation through the use of surface mounted components closely placed on printed circuit boards highlights problems with traditional board cleaning methods. The reliability of assemblies which have been cleaned with vapor degreasing and spray cleaning can be seriously compromised by residual contaminants leading to solder joint failure, board corrosion, and even electrical failure of the mounted parts. In addition, recent government actions to eliminate fully halogenated chlorofluorocarbons (CFC) and chlorinated hydrocarbons from the industrial environment require the development of new cleaning materials and techniques. This paper discusses alternative cleaning materials and techniques and results that can be expected with them. Particular emphasis is placed on problems related to surface-mounted parts. These new techniques may lead to improved circuit reliability and, at the same time, be less expensive and less environmentally hazardous than the traditional systems.

An Exploratory Study Examining the Feasibility of Using Bayesian Networks to Predict Circuit Analysis Understanding

ERIC Educational Resources Information Center

Chung, Gregory K. W. K.; Dionne, Gary B.; Kaiser, William J.

2006-01-01

Our research question was whether we could develop a feasible technique, using Bayesian networks, to diagnose gaps in student knowledge. Thirty-four college-age participants completed tasks designed to measure conceptual knowledge, procedural knowledge, and problem-solving skills related to circuit analysis. A Bayesian network was used to model…

A Multiple-Sessions Interactive Computer-Based Learning Tool for Ability Cultivation in Circuit Simulation

ERIC Educational Resources Information Center

Xu, Q.; Lai, L. L.; Tse, N. C. F.; Ichiyanagi, K.

2011-01-01

An interactive computer-based learning tool with multiple sessions is proposed in this paper, which teaches students to think and helps them recognize the merits and limitations of simulation tools so as to improve their practical abilities in electrical circuit simulation based on the case of a power converter with progressive problems. The…

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Reflection on solutions in the form of refutation texts versus problem solving: the case of 8th graders studying simple electric circuits

NASA Astrophysics Data System (ADS)

Safadi, Rafi'; Safadi, Ekhlass; Meidav, Meir

2017-01-01

This study compared students’ learning in troubleshooting and problem solving activities. The troubleshooting activities provided students with solutions to conceptual problems in the form of refutation texts; namely, solutions that portray common misconceptions, refute them, and then present the accepted scientific ideas. They required students to individually diagnose these solutions; that is, to identify the erroneous and correct parts of the solutions and explain in what sense they differed, and later share their work in whole class discussions. The problem solving activities required the students to individually solve these same problems, and later share their work in whole class discussions. We compared the impact of the individual work stage in the troubleshooting and problem solving activities on promoting argumentation in the subsequent class discussions, and the effects of these activities on students’ engagement in self-repair processes; namely, in learning processes that allowed the students to self-repair their misconceptions, and by extension on advancing their conceptual knowledge. Two 8th grade classes studying simple electric circuits with the same teacher took part. One class (28 students) carried out four troubleshooting activities and the other (31 students) four problem solving activities. These activities were interwoven into a twelve lesson unit on simple electric circuits that was spread over a period of 2 months. The impact of the troubleshooting activities on students’ conceptual knowledge was significantly higher than that of the problem solving activities. This result is consistent with the finding that the troubleshooting activities engaged students in self-repair processes whereas the problem solving activities did not. The results also indicated that diagnosing solutions to conceptual problems in the form of refutation texts, as opposed to solving these same problems, apparently triggered argumentation in subsequent class discussions, even though the teacher was unfamiliar with the best ways to conduct argumentative classroom discussions. We account for these results and suggest possible directions for future research.

A neuromorphic VLSI device for implementing 2-D selective attention systems.

PubMed

Indiveri, G

2001-01-01

Selective attention is a mechanism used to sequentially select and process salient subregions of the input space, while suppressing inputs arriving from nonsalient regions. By processing small amounts of sensory information in a serial fashion, rather than attempting to process all the sensory data in parallel, this mechanism overcomes the problem of flooding limited processing capacity systems with sensory inputs. It is found in many biological systems and can be a useful engineering tool for developing artificial systems that need to process in real-time sensory data. In this paper we present a neuromorphic hardware model of a selective attention mechanism implemented on a very large scale integration (VLSI) chip, using analog circuits. The chip makes use of a spike-based representation for receiving input signals, transmitting output signals and for shifting the selection of the attended input stimulus over time. It can be interfaced to neuromorphic sensors and actuators, for implementing multichip selective attention systems. We describe the characteristics of the circuits used in the architecture and present experimental data measured from the system.

Quantum annealing with all-to-all connected nonlinear oscillators

PubMed Central

Puri, Shruti; Andersen, Christian Kraglund; Grimsmo, Arne L.; Blais, Alexandre

2017-01-01

Quantum annealing aims at solving combinatorial optimization problems mapped to Ising interactions between quantum spins. Here, with the objective of developing a noise-resilient annealer, we propose a paradigm for quantum annealing with a scalable network of two-photon-driven Kerr-nonlinear resonators. Each resonator encodes an Ising spin in a robust degenerate subspace formed by two coherent states of opposite phases. A fully connected optimization problem is mapped to local fields driving the resonators, which are connected with only local four-body interactions. We describe an adiabatic annealing protocol in this system and analyse its performance in the presence of photon loss. Numerical simulations indicate substantial resilience to this noise channel, leading to a high success probability for quantum annealing. Finally, we propose a realistic circuit QED implementation of this promising platform for implementing a large-scale quantum Ising machine. PMID:28593952

High-Throughput Mapping of Single-Neuron Projections by Sequencing of Barcoded RNA.

PubMed

Kebschull, Justus M; Garcia da Silva, Pedro; Reid, Ashlan P; Peikon, Ian D; Albeanu, Dinu F; Zador, Anthony M

2016-09-07

Neurons transmit information to distant brain regions via long-range axonal projections. In the mouse, area-to-area connections have only been systematically mapped using bulk labeling techniques, which obscure the diverse projections of intermingled single neurons. Here we describe MAPseq (Multiplexed Analysis of Projections by Sequencing), a technique that can map the projections of thousands or even millions of single neurons by labeling large sets of neurons with random RNA sequences ("barcodes"). Axons are filled with barcode mRNA, each putative projection area is dissected, and the barcode mRNA is extracted and sequenced. Applying MAPseq to the locus coeruleus (LC), we find that individual LC neurons have preferred cortical targets. By recasting neuroanatomy, which is traditionally viewed as a problem of microscopy, as a problem of sequencing, MAPseq harnesses advances in sequencing technology to permit high-throughput interrogation of brain circuits. Copyright © 2016 Elsevier Inc. All rights reserved.

Neuromorphic walking gait control.

PubMed

Still, Susanne; Hepp, Klaus; Douglas, Rodney J

2006-03-01

We present a neuromorphic pattern generator for controlling the walking gaits of four-legged robots which is inspired by central pattern generators found in the nervous system and which is implemented as a very large scale integrated (VLSI) chip. The chip contains oscillator circuits that mimic the output of motor neurons in a strongly simplified way. We show that four coupled oscillators can produce rhythmic patterns with phase relationships that are appropriate to generate all four-legged animal walking gaits. These phase relationships together with frequency and duty cycle of the oscillators determine the walking behavior of a robot driven by the chip, and they depend on a small set of stationary bias voltages. We give analytic expressions for these dependencies. This chip reduces the complex, dynamic inter-leg control problem associated with walking gait generation to the problem of setting a few stationary parameters. It provides a compact and low power solution for walking gait control in robots.

Luneburg lens and optical matrix algebra research

NASA Technical Reports Server (NTRS)

Wood, V. E.; Busch, J. R.; Verber, C. M.; Caulfield, H. J.

1984-01-01

Planar, as opposed to channelized, integrated optical circuits (IOCs) were stressed as the basis for computational devices. Both fully-parallel and systolic architectures are considered and the tradeoffs between the two device types are discussed. The Kalman filter approach is a most important computational method for many NASA problems. This approach to deriving a best-fit estimate for the state vector describing a large system leads to matrix sizes which are beyond the predicted capacities of planar IOCs. This problem is overcome by matrix partitioning, and several architectures for accomplishing this are described. The Luneburg lens work has involved development of lens design techniques, design of mask arrangements for producing lenses of desired shape, investigation of optical and chemical properties of arsenic trisulfide films, deposition of lenses both by thermal evaporation and by RF sputtering, optical testing of these lenses, modification of lens properties through ultraviolet irradiation, and comparison of measured lens properties with those expected from ray trace analyses.

Parallelizing quantum circuit synthesis

NASA Astrophysics Data System (ADS)

Di Matteo, Olivia; Mosca, Michele

2016-03-01

Quantum circuit synthesis is the process in which an arbitrary unitary operation is decomposed into a sequence of gates from a universal set, typically one which a quantum computer can implement both efficiently and fault-tolerantly. As physical implementations of quantum computers improve, the need is growing for tools that can effectively synthesize components of the circuits and algorithms they will run. Existing algorithms for exact, multi-qubit circuit synthesis scale exponentially in the number of qubits and circuit depth, leaving synthesis intractable for circuits on more than a handful of qubits. Even modest improvements in circuit synthesis procedures may lead to significant advances, pushing forward the boundaries of not only the size of solvable circuit synthesis problems, but also in what can be realized physically as a result of having more efficient circuits. We present a method for quantum circuit synthesis using deterministic walks. Also termed pseudorandom walks, these are walks in which once a starting point is chosen, its path is completely determined. We apply our method to construct a parallel framework for circuit synthesis, and implement one such version performing optimal T-count synthesis over the Clifford+T gate set. We use our software to present examples where parallelization offers a significant speedup on the runtime, as well as directly confirm that the 4-qubit 1-bit full adder has optimal T-count 7 and T-depth 3.

TSCA Work Plan Chemical Problem Formulation and Initial Assessment Tetrabromobisphenol A and Related Chemicals Cluster Flame Retardants

EPA Pesticide Factsheets

EPA released a problem formulation for TBBPA and related chemicals used as a flame retardants in plastics/printed circuit boards for electronics. The goal of this problem formulation was to identify scenarios where further risk analysis may be necessary.

Multi-strategy based quantum cost reduction of linear nearest-neighbor quantum circuit

NASA Astrophysics Data System (ADS)

Tan, Ying-ying; Cheng, Xue-yun; Guan, Zhi-jin; Liu, Yang; Ma, Haiying

2018-03-01

With the development of reversible and quantum computing, study of reversible and quantum circuits has also developed rapidly. Due to physical constraints, most quantum circuits require quantum gates to interact on adjacent quantum bits. However, many existing quantum circuits nearest-neighbor have large quantum cost. Therefore, how to effectively reduce quantum cost is becoming a popular research topic. In this paper, we proposed multiple optimization strategies to reduce the quantum cost of the circuit, that is, we reduce quantum cost from MCT gates decomposition, nearest neighbor and circuit simplification, respectively. The experimental results show that the proposed strategies can effectively reduce the quantum cost, and the maximum optimization rate is 30.61% compared to the corresponding results.

Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

NASA Astrophysics Data System (ADS)

Geier, Michael

Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and symmetric threshold voltages. Additionally, a novel n-type doping procedure for SWCNT TFTs was also developed utilizing a solution-processed organometallic small molecule to demonstrate the first network top-gated n-type SWCNT TFTs. Lastly, new doping and encapsulation layers were incorporated to stabilize both p-type and n-type SWCNT TFT electronic properties, which enabled the fabrication of large-scale memory circuits. Employing these materials and processing advances has addressed many application specific barriers to commercialization. For instance, the first thin-film SWCNT complementary metal-oxide-semi-conductor (CMOS) logic devices are demonstrated with sub-nanowatt static power consumption and full rail-to-rail voltage transfer characteristics. With the introduction of a new n-type Rh-based molecular dopant, the first SWCNT TFTs are fabricated in top-gate geometries over large areas with high yield. Then by utilizing robust encapsulation methods, stable and uniform electronic performance of both p-type and n-type SWCNT TFTs has been achieved. Based on these complementary SWCNT TFTs, it is possible to simulate, design, and fabricate arrays of low-power static random access memory (SRAM) circuits, achieving large-scale integration for the first time based on solution-processed semiconductors. Together, this work provides a direct pathway for solution processable, large scale, power-efficient advanced integrated logic circuits and systems.

Learning and optimization with cascaded VLSI neural network building-block chips

NASA Technical Reports Server (NTRS)

Duong, T.; Eberhardt, S. P.; Tran, M.; Daud, T.; Thakoor, A. P.

1992-01-01

To demonstrate the versatility of the building-block approach, two neural network applications were implemented on cascaded analog VLSI chips. Weights were implemented using 7-b multiplying digital-to-analog converter (MDAC) synapse circuits, with 31 x 32 and 32 x 32 synapses per chip. A novel learning algorithm compatible with analog VLSI was applied to the two-input parity problem. The algorithm combines dynamically evolving architecture with limited gradient-descent backpropagation for efficient and versatile supervised learning. To implement the learning algorithm in hardware, synapse circuits were paralleled for additional quantization levels. The hardware-in-the-loop learning system allocated 2-5 hidden neurons for parity problems. Also, a 7 x 7 assignment problem was mapped onto a cascaded 64-neuron fully connected feedback network. In 100 randomly selected problems, the network found optimal or good solutions in most cases, with settling times in the range of 7-100 microseconds.

Machine learning for fab automated diagnostics

NASA Astrophysics Data System (ADS)

Giollo, Manuel; Lam, Auguste; Gkorou, Dimitra; Liu, Xing Lan; van Haren, Richard

2017-06-01

Process optimization depends largely on field engineer's knowledge and expertise. However, this practice turns out to be less sustainable due to the fab complexity which is continuously increasing in order to support the extreme miniaturization of Integrated Circuits. On the one hand, process optimization and root cause analysis of tools is necessary for a smooth fab operation. On the other hand, the growth in number of wafer processing steps is adding a considerable new source of noise which may have a significant impact at the nanometer scale. This paper explores the ability of historical process data and Machine Learning to support field engineers in production analysis and monitoring. We implement an automated workflow in order to analyze a large volume of information, and build a predictive model of overlay variation. The proposed workflow addresses significant problems that are typical in fab production, like missing measurements, small number of samples, confounding effects due to heterogeneity of data, and subpopulation effects. We evaluate the proposed workflow on a real usecase and we show that it is able to predict overlay excursions observed in Integrated Circuits manufacturing. The chosen design focuses on linear and interpretable models of the wafer history, which highlight the process steps that are causing defective products. This is a fundamental feature for diagnostics, as it supports process engineers in the continuous improvement of the production line.

Theoretical analysis of shock induced depolarization and current generation in ferroelectrics

NASA Astrophysics Data System (ADS)

Agrawal, Vinamra; Bhattacharya, Kaushik

Ferroelectric generators are used to generate large magnitude current pulse by impacting a polarized ferroelectric material. The impact causes depolarization of the material and at high impact speeds, dielectric breakdown. Depending on the loading conditions and the electromechanical boundary conditions, the current or voltage profiles obtained vary. In this study, we explore the large deformation dynamic response of a ferroelectric material. Using the Maxwell's equations, conservation laws and the second law of thermodynamics, we derive the governing equations for the phase boundary propagation as well as the driving force acting on it. We allow for the phase boundary to contain surface charges which introduces the contribution of curvature of phase boundary in the governing equations and the driving force. This type of analysis accounts for the dielectric breakdown and resulting conduction in the material. Next, we implement the equations derived to solve a one dimensional impact problem on a ferroelectric material under different electrical boundary conditions. The constitutive law is chosen to be piecewise quadratic in polarization and quadratic in the strain. We solve for the current profile generated in short circuit case and for voltage profile in open circuited case. This work was made possible by the financial support of the US Air Force Office of Scientific Research through the Center of Excellence in High Rate Deformation Physics of Heterogeneous Materials (Grant: FA 9550-12-1-0091).

Large-scale, high-density (up to 512 channels) recording of local circuits in behaving animals

PubMed Central

Berényi, Antal; Somogyvári, Zoltán; Nagy, Anett J.; Roux, Lisa; Long, John D.; Fujisawa, Shigeyoshi; Stark, Eran; Leonardo, Anthony; Harris, Timothy D.

2013-01-01

Monitoring representative fractions of neurons from multiple brain circuits in behaving animals is necessary for understanding neuronal computation. Here, we describe a system that allows high-channel-count recordings from a small volume of neuronal tissue using a lightweight signal multiplexing headstage that permits free behavior of small rodents. The system integrates multishank, high-density recording silicon probes, ultraflexible interconnects, and a miniaturized microdrive. These improvements allowed for simultaneous recordings of local field potentials and unit activity from hundreds of sites without confining free movements of the animal. The advantages of large-scale recordings are illustrated by determining the electroanatomic boundaries of layers and regions in the hippocampus and neocortex and constructing a circuit diagram of functional connections among neurons in real anatomic space. These methods will allow the investigation of circuit operations and behavior-dependent interregional interactions for testing hypotheses of neural networks and brain function. PMID:24353300

Report on phase 1 of the Microprocessor Seminar. [and associated large scale integration

NASA Technical Reports Server (NTRS)

1977-01-01

Proceedings of a seminar on microprocessors and associated large scale integrated (LSI) circuits are presented. The potential for commonality of device requirements, candidate processes and mechanisms for qualifying candidate LSI technologies for high reliability applications, and specifications for testing and testability were among the topics discussed. Various programs and tentative plans of the participating organizations in the development of high reliability LSI circuits are given.

A proposal to encourage intuitive learning in a senior-level analogue electronics course

NASA Astrophysics Data System (ADS)

Berjano, E.; Lozano-Nieto, A.

2011-05-01

One of the most important issues in the reorganisation of engineering education is to consider new pedagogical techniques to help students develop skills and an adaptive expertise. This expertise consists of being able to recognise the nature of a problem intuitively, and also recognising recurring patterns in different types of problems. In the particular case of analogue electronics, an additional difficulty seems to be that understanding involves both analytic skills and an intuitive grasp of circuit characteristics. This paper presents a proposal to help senior students to think intuitively in order to identify the common issue involved in a group of problems of analogue electronics and build an abstract concept based on, for example, a theory or a mathematical model in order to use it to solve future problems. The preliminary results suggest that this proposal could be useful to promote intuitive reasoning in analogue electronics courses. The experience would later be useful to graduates in analytically solving new types of problems or in designing new electronic circuits.

A Network Thermodynamic Approach to Compartmental Analysis

PubMed Central

Mikulecky, D. C.; Huf, E. G.; Thomas, S. R.

1979-01-01

We introduce a general network thermodynamic method for compartmental analysis which uses a compartmental model of sodium flows through frog skin as an illustrative example (Huf and Howell, 1974a). We use network thermodynamics (Mikulecky et al., 1977b) to formulate the problem, and a circuit simulation program (ASTEC 2, SPICE2, or PCAP) for computation. In this way, the compartment concentrations and net fluxes between compartments are readily obtained for a set of experimental conditions involving a square-wave pulse of labeled sodium at the outer surface of the skin. Qualitative features of the influx at the outer surface correlate very well with those observed for the short circuit current under another similar set of conditions by Morel and LeBlanc (1975). In related work, the compartmental model is used as a basis for simulation of the short circuit current and sodium flows simultaneously using a two-port network (Mikulecky et al., 1977a, and Mikulecky et al., A network thermodynamic model for short circuit current transients in frog skin. Manuscript in preparation; Gary-Bobo et al., 1978). The network approach lends itself to computation of classic compartmental problems in a simple manner using circuit simulation programs (Chua and Lin, 1975), and it further extends the compartmental models to more complicated situations involving coupled flows and non-linearities such as concentration dependencies, chemical reaction kinetics, etc. PMID:262387

Network thermodynamic approach compartmental analysis. Na+ transients in frog skin.

PubMed

Mikulecky, D C; Huf, E G; Thomas, S R

1979-01-01

We introduce a general network thermodynamic method for compartmental analysis which uses a compartmental model of sodium flows through frog skin as an illustrative example (Huf and Howell, 1974a). We use network thermodynamics (Mikulecky et al., 1977b) to formulate the problem, and a circuit simulation program (ASTEC 2, SPICE2, or PCAP) for computation. In this way, the compartment concentrations and net fluxes between compartments are readily obtained for a set of experimental conditions involving a square-wave pulse of labeled sodium at the outer surface of the skin. Qualitative features of the influx at the outer surface correlate very well with those observed for the short circuit current under another similar set of conditions by Morel and LeBlanc (1975). In related work, the compartmental model is used as a basis for simulation of the short circuit current and sodium flows simultaneously using a two-port network (Mikulecky et al., 1977a, and Mikulecky et al., A network thermodynamic model for short circuit current transients in frog skin. Manuscript in preparation; Gary-Bobo et al., 1978). The network approach lends itself to computation of classic compartmental problems in a simple manner using circuit simulation programs (Chua and Lin, 1975), and it further extends the compartmental models to more complicated situations involving coupled flows and non-linearities such as concentration dependencies, chemical reaction kinetics, etc.

Gallium Arsenide Domino Circuit

NASA Technical Reports Server (NTRS)

Yang, Long; Long, Stephen I.

1990-01-01

Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

NASA Astrophysics Data System (ADS)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Parameter estimation methods for gene circuit modeling from time-series mRNA data: a comparative study.

PubMed

Fan, Ming; Kuwahara, Hiroyuki; Wang, Xiaolei; Wang, Suojin; Gao, Xin

2015-11-01

Parameter estimation is a challenging computational problem in the reverse engineering of biological systems. Because advances in biotechnology have facilitated wide availability of time-series gene expression data, systematic parameter estimation of gene circuit models from such time-series mRNA data has become an important method for quantitatively dissecting the regulation of gene expression. By focusing on the modeling of gene circuits, we examine here the performance of three types of state-of-the-art parameter estimation methods: population-based methods, online methods and model-decomposition-based methods. Our results show that certain population-based methods are able to generate high-quality parameter solutions. The performance of these methods, however, is heavily dependent on the size of the parameter search space, and their computational requirements substantially increase as the size of the search space increases. In comparison, online methods and model decomposition-based methods are computationally faster alternatives and are less dependent on the size of the search space. Among other things, our results show that a hybrid approach that augments computationally fast methods with local search as a subsequent refinement procedure can substantially increase the quality of their parameter estimates to the level on par with the best solution obtained from the population-based methods while maintaining high computational speed. These suggest that such hybrid methods can be a promising alternative to the more commonly used population-based methods for parameter estimation of gene circuit models when limited prior knowledge about the underlying regulatory mechanisms makes the size of the parameter search space vastly large. © The Author 2015. Published by Oxford University Press. For Permissions, please email: journals.permissions@oup.com.

Variability-aware double-patterning layout optimization for analog circuits

NASA Astrophysics Data System (ADS)

Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Lee, Zhao Chuan; Tseng, I.-Lun; Ong, Jonathan Yoong Seang

2018-03-01

The semiconductor industry has adopted multi-patterning techniques to manage the delay in the extreme ultraviolet lithography technology. During the design process of double-patterning lithography layout masks, two polygons are assigned to different masks if their spacing is less than the minimum printable spacing. With these additional design constraints, it is very difficult to find experienced layout-design engineers who have a good understanding of the circuit to manually optimize the mask layers in order to minimize color-induced circuit variations. In this work, we investigate the impact of double-patterning lithography on analog circuits and provide quantitative analysis for our designers to select the optimal mask to minimize the circuit's mismatch. To overcome the problem and improve the turn-around time, we proposed our smart "anchoring" placement technique to optimize mask decomposition for analog circuits. We have developed a software prototype that is capable of providing anchoring markers in the layout, allowing industry standard tools to perform automated color decomposition process.

Microfluidic Serial Dilution Circuit

PubMed Central

Paegel, Brian M.; Grover, William H.; Skelley, Alison M.; Mathies, Richard A.; Joyce, Gerald F.

2008-01-01

In vitro evolution of RNA molecules requires a method for executing many consecutive serial dilutions. To solve this problem, a microfluidic circuit has been fabricated in a three-layer glass-PDMS-glass device. The 400-nL serial dilution circuit contains five integrated membrane valves: three two-way valves arranged in a loop to drive cyclic mixing of the diluent and carryover, and two bus valves to control fluidic access to the circuit through input and output channels. By varying the valve placement in the circuit, carryover fractions from 0.04 to 0.2 were obtained. Each dilution process, which is comprised of a diluent flush cycle followed by a mixing cycle, is carried out with no pipeting, and a sample volume of 400 nL is sufficient for conducting an arbitrary number of serial dilutions. Mixing is precisely controlled by changing the cyclic pumping rate, with a minimum mixing time of 22 s. This microfluidic circuit is generally applicable for integrating automated serial dilution and sample preparation in almost any microfluidic architecture. PMID:17073422

Monolithically mode division multiplexing photonic integrated circuit for large-capacity optical interconnection.

PubMed

Chen, Guanyu; Yu, Yu; Zhang, Xinliang

2016-08-01

We propose and fabricate an on-chip mode division multiplexed (MDM) photonic interconnection system. Such a monolithically photonic integrated circuit (PIC) is composed of a grating coupler, two micro-ring modulators, mode multiplexer/demultiplexer, and two germanium photodetectors. The signals' generation, multiplexing, transmission, demultiplexing, and detection are successfully demonstrated on the same chip. Twenty Gb/s MDM signals are successfully processed with clear and open eye diagrams, validating the feasibility of the proposed circuit. The measured power penalties show a good performance of the MDM link. The proposed on-chip MDM system can be potentially used for large-capacity optical interconnection in future high-performance computers and big data centers.

A Novel Prediction Method about Single Components of Analog Circuits Based on Complex Field Modeling

PubMed Central

Tian, Shulin; Yang, Chenglin

2014-01-01

Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments. PMID:25147853

Development of 3-D Mechanical Models of Electric Circuits and Their Effect on Students' Understanding of Electric Potential Difference

ERIC Educational Resources Information Center

Balta, Nuri

2015-01-01

Visualizing physical concepts through models is an essential method in many sciences. While students are mostly proficient in handling mathematical aspects of problems, they frequently lack the ability to visualize and interpret abstract physical concepts in a meaningful way. In this paper, initially the electric circuits and related concepts were…

A Sharp methodology for VLSI layout

NASA Astrophysics Data System (ADS)

Bapat, Shekhar

1993-01-01

The layout problem for VLSI circuits is recognized as a very difficult problem and has been traditionally decomposed into the several seemingly independent sub-problems of placement, global routing, and detailed routing. Although this structure achieves a reduction in programming complexity, it is also typically accompanied by a reduction in solution quality. Most current placement research recognizes that the separation is artificial, and that the placement and routing problems should be solved ideally in tandem. We propose a new interconnection model, Sharp and an associated partitioning algorithm. The Sharp interconnection model uses a partitioning shape that roughly resembles the musical sharp 'number sign' and makes extensive use of pre-computed rectilinear Steiner trees. The model is designed to generate strategic routing information along with the partitioning results. Additionally, the Sharp model also generates estimates of the routing congestion. We also propose the Sharp layout heuristic that solves the layout problem in its entirety. The Sharp layout heuristic makes extensive use of the Sharp partitioning model. The use of precomputed Steiner tree forms enables the method to model accurately net characteristics. For example, the Steiner tree forms can model both the length of the net and more importantly its route. In fact, the tree forms are also appropriate for modeling the timing delays of nets. The Sharp heuristic works to minimize both the total layout area by minimizing total net length (thus reducing the total wiring area), and the congestion imbalances in the various channels (thus reducing the unused or wasted channel area). Our heuristic uses circuit element movements amongst the different partitioning blocks and selection of alternate minimal Steiner tree forms to achieve this goal. The objective function for the algorithm can be modified readily to include other important circuit constraints like propagation delays. The layout technique first computes a very high-level approximation of the layout solution (i.e., the positions of the circuit elements and the associated net routes). The approximate solution is alternately refined, objective function. The technique creates well defined sub-problems and offers intermediary steps that can be solved in parallel, as well as a parallel mechanism to merge the sub-problem solutions.

Constraint and Contingency in Multifunctional Gene Regulatory Circuits

PubMed Central

Payne, Joshua L.; Wagner, Andreas

2013-01-01

Gene regulatory circuits drive the development, physiology, and behavior of organisms from bacteria to humans. The phenotypes or functions of such circuits are embodied in the gene expression patterns they form. Regulatory circuits are typically multifunctional, forming distinct gene expression patterns in different embryonic stages, tissues, or physiological states. Any one circuit with a single function can be realized by many different regulatory genotypes. Multifunctionality presumably constrains this number, but we do not know to what extent. We here exhaustively characterize a genotype space harboring millions of model regulatory circuits and all their possible functions. As a circuit's number of functions increases, the number of genotypes with a given number of functions decreases exponentially but can remain very large for a modest number of functions. However, the sets of circuits that can form any one set of functions becomes increasingly fragmented. As a result, historical contingency becomes widespread in circuits with many functions. Whether a circuit can acquire an additional function in the course of its evolution becomes increasingly dependent on the function it already has. Circuits with many functions also become increasingly brittle and sensitive to mutation. These observations are generic properties of a broad class of circuits and independent of any one circuit genotype or phenotype. PMID:23762020

Electromagnetic Compatibility Design of the Computer Circuits

NASA Astrophysics Data System (ADS)

Zitai, Hong

2018-02-01

Computers and the Internet have gradually penetrated into every aspect of people’s daily work. But with the improvement of electronic equipment as well as electrical system, the electromagnetic environment becomes much more complex. Electromagnetic interference has become an important factor to hinder the normal operation of electronic equipment. In order to analyse the computer circuit compatible with the electromagnetic compatibility, this paper starts from the computer electromagnetic and the conception of electromagnetic compatibility. And then, through the analysis of the main circuit and system of computer electromagnetic compatibility problems, we can design the computer circuits in term of electromagnetic compatibility. Finally, the basic contents and methods of EMC test are expounded in order to ensure the electromagnetic compatibility of equipment.

Simplified OMEGA receivers

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1974-01-01

The details are presented of methods for providing OMEGA navigational information including the receiver problem at the antenna and informational display and housekeeping systems based on some 4 bit data processing concepts. Topics discussed include the problem of limiters, zero crossing detectors, signal envelopes, internal timing circuits, phase counters, lane position displays, signal integrators, and software mapping problems.

Effect of a "Look-Ahead" Problem on Undergraduate Engineering Students' Concept Comprehension

ERIC Educational Resources Information Center

Goodman, Kevin; Davis, Julian; McDonald, Thomas

2016-01-01

In an effort to motivate undergraduate engineering students to prepare for class by reviewing material before lectures, a "Look-Ahead" problem was utilized. Students from two undergraduate engineering courses; Statics and Electronic Circuits, were assigned problems from course material that had not yet been covered in class. These…

Practical applications of current loop signal conditioning

NASA Astrophysics Data System (ADS)

Anderson, Karl F.

1994-10-01

This paper describes a variety of practical application circuits based on the current loop signal conditioning paradigm. Equations defining the circuit response are also provided. The constant current loop is a fundamental signal conditioning circuit concept that can be implemented in a variety of configurations for resistance-based transducers, such as strain gages and resistance temperature devices. The circuit features signal conditioning outputs which are unaffected by extremely large variations in lead wire resistance, direct current frequency response, and inherent linearity with respect to resistance change. Sensitivity of this circuit is double that of a Wheatstone bridge circuit. Electrical output is zero for resistance change equals zero. The same excitation and output sense wires can serve multiple transducers. More application arrangements are possible with constant current loop signal conditioning than with the Wheatstone bridge.

Current loop signal conditioning: Practical applications

NASA Technical Reports Server (NTRS)

Anderson, Karl F.

1995-01-01

This paper describes a variety of practical application circuits based on the current loop signal conditioning paradigm. Equations defining the circuit response are also provided. The constant current loop is a fundamental signal conditioning circuit concept that can be implemented in a variety of configurations for resistance-based transducers, such as strain gages and resistance temperature detectors. The circuit features signal conditioning outputs which are unaffected by extremely large variations in lead wire resistance, direct current frequency response, and inherent linearity with respect to resistance change. Sensitivity of this circuit is double that of a Wheatstone bridge circuit. Electrical output is zero for resistance change equals zero. The same excitation and output sense wires can serve multiple transducers. More application arrangements are possible with constant current loop signal conditioning than with the Wheatstone bridge.

Servo Platform Circuit Design of Pendulous Gyroscope Based on DSP

NASA Astrophysics Data System (ADS)

Tan, Lilong; Wang, Pengcheng; Zhong, Qiyuan; Zhang, Cui; Liu, Yunfei

2018-03-01

In order to solve the problem when a certain type of pendulous gyroscope in the initial installation deviation more than 40 degrees, that the servo platform can not be up to the speed of the gyroscope in the rough north seeking phase. This paper takes the digital signal processor TMS320F28027 as the core, uses incremental digital PID algorithm, carries out the circuit design of the servo platform. Firstly, the hardware circuit is divided into three parts: DSP minimum system, motor driving circuit and signal processing circuit, then the mathematical model of incremental digital PID algorithm is established, based on the model, writes the PID control program in CCS3.3, finally, the servo motor tracking control experiment is carried out, it shows that the design can significantly improve the tracking ability of the servo platform, and the design has good engineering practice.

Design of synthetic biological logic circuits based on evolutionary algorithm.

PubMed

Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

2013-08-01

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

Some didactical suggestions for a deeper embedding of DC circuits into electromagnetism

NASA Astrophysics Data System (ADS)

Cavinato, M.; Giliberti, M.; Barbieri, S. R.

2017-09-01

Undergraduate students often encounter great difficulties in understanding Ohm’s law and electrical circuits. Considering the widespread students’ beliefs and their common mistakes, as they come out from the literature and our teaching experience, we think that a relevant source of these problems comes from the fact that electrical circuits are generally treated separately from the other topics of electromagnetism, with poor reference to the circulation of the electric field. We present here a way to deal with electrical circuits that could help students to overcome their difficulties. In our approach, the electric field is the protagonist and the mathematical tool the students are asked to use is its circulation. In the light of the circulation of the electric field, the experimental Ohm’s law is revisited, the concept of electromotive force is discussed and some suggestions to eliminate common misconceptions about the role of a battery in a circuit are presented.

Cables and crosstalk

NASA Astrophysics Data System (ADS)

Paul, Clayton R.

1991-06-01

Crosstalk is the unintentional electromagnetic coupling between circuits which are connected by parallel conductors that lie in close proximity to each other. Some examples are wires in cable harnesses or metallic lands on printed-circuit boards (PCB's). This unintended interaction between two or more circuits via their electromagnetic fields can cause interference problems. Signals from one circuit that couple to another circuit appear at the terminals of the devices that are interconnected by the wires. If these signals are of sufficient magnitude or spectral content, they may cause unintended operation of the device or a degradation in its performance. A summary of the standard models used for predicting crosstalk in various types of configurations is presented. The discussion focusses on the relative accuracies, regions of applicability, and computational complexity of the models. A simple explanation of the ability (or inability) of shielded wires and twisted pairs of wires to reduce the crosstalk is also given.

A multi-channel isolated power supply in non-equipotential circuit

NASA Astrophysics Data System (ADS)

Li, Xiang; Zhao, Bo-Wen; Zhang, Yan-Chi; Xie, Da

2018-04-01

A multi-channel isolation power supply is designed for the problems of different MOSFET or IGBT in the non-equipotential circuit in this paper. It mainly includes the square wave generation circuit, the high-frequency transformer and the three-terminal stabilized circuit. The first part is used to generate the 24V square wave, and as the input of the magnetic ring transformer. In the second part, the magnetic ring transformer consists of one input and three outputs to realize multi-channel isolation output. The third part can output different potential and realize non-equal potential function through the three-terminal stabilized chip. In addition, the multi-channel isolation power source proposed in this paper is Small size, high reliability and low price, and it is convenient for power electronic switches that operate on multiple different potentials. Therefore, the research on power supply of power electronic circuit has practical significance.

Effect of Bypass Capacitor in Common-mode Noise Reduction Technique for Automobile PCB

NASA Astrophysics Data System (ADS)

Uno, Takanori; Ichikawa, Kouji; Mabuchi, Yuichi; Nakamura, Atushi

In this letter, we studied the use of common mode noise reduction technique for in-vehicle electronic equipment, each comprising large-scale integrated circuit (LSI), printed circuit board (PCB), wiring harnesses, and ground plane. We have improved the model circuit of the common mode noise that flows to the wire harness to add the effect of by-pass capacitors located near an LSI.

Searching for memories, Sudoku, implicit check bits, and the iterative use of not-always-correct rapid neural computation.

PubMed

Hopfield, J J

2008-05-01

The algorithms that simple feedback neural circuits representing a brain area can rapidly carry out are often adequate to solve easy problems but for more difficult problems can return incorrect answers. A new excitatory-inhibitory circuit model of associative memory displays the common human problem of failing to rapidly find a memory when only a small clue is present. The memory model and a related computational network for solving Sudoku puzzles produce answers that contain implicit check bits in the representation of information across neurons, allowing a rapid evaluation of whether the putative answer is correct or incorrect through a computation related to visual pop-out. This fact may account for our strong psychological feeling of right or wrong when we retrieve a nominal memory from a minimal clue. This information allows more difficult computations or memory retrievals to be done in a serial fashion by using the fast but limited capabilities of a computational module multiple times. The mathematics of the excitatory-inhibitory circuits for associative memory and for Sudoku, both of which are understood in terms of energy or Lyapunov functions, is described in detail.

Superconducting flux flow digital circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Martens, J.S.; Zipperian, T.E.; Hietala, V.M.

1993-03-01

The authors have developed a family of digital logic circuits based on superconducting flux flow transistors that show high speed, reasonable signal levels, large fan-out, and large noise margins. The circuits are made from high-temperature superconductors (HTS) and have been shown to operate at over 90 K. NOR gates have been demonstrated with fan-outs of more than 5 and fully loaded switching times less than a fixture-limited 50 ps. Ring-oscillator data suggest inverter delay times of about 40ps when using a 3-[mu]m linewidths. Simple flip-flops have also been demonstrated showing large noise margins, response times of less than 30 ps,more » and static power dissipation on the order of 30 nW. Among other uses, this logic family is appropriate as an interface between logic families such as single flux quantum and conventional semiconductor logic.« less

Focal plane infrared readout circuit

NASA Technical Reports Server (NTRS)

Pain, Bedabrata (Inventor)

2002-01-01

An infrared imager, such as a spectrometer, includes multiple infrared photodetectors and readout circuits for reading out signals from the photodetectors. Each readout circuit includes a buffered direct injection input circuit including a differential amplifier with active feedback provided through an injection transistor. The differential amplifier includes a pair of input transistors, a pair of cascode transistors and a current mirror load. Photocurrent from a photodetector can be injected onto an integration capacitor in the readout circuit with high injection efficiency at high speed. A high speed, low noise, wide dynamic range linear infrared multiplexer array for reading out infrared detectors with large capacitances can be achieved even when short exposure times are used. The effect of image lag can be reduced.

Addiction: decreased reward sensitivity and increased expectation sensitivity conspire to overwhelm the brain's control circuit.

PubMed

Volkow, Nora D; Wang, Gene-Jack; Fowler, Joanna S; Tomasi, Dardo; Telang, Frank; Baler, Ruben

2010-09-01

Based on brain imaging findings, we present a model according to which addiction emerges as an imbalance in the information processing and integration among various brain circuits and functions. The dysfunctions reflect (a) decreased sensitivity of reward circuits, (b) enhanced sensitivity of memory circuits to conditioned expectations to drugs and drug cues, stress reactivity, and (c) negative mood, and a weakened control circuit. Although initial experimentation with a drug of abuse is largely a voluntary behavior, continued drug use can eventually impair neuronal circuits in the brain that are involved in free will, turning drug use into an automatic compulsive behavior. The ability of addictive drugs to co-opt neurotransmitter signals between neurons (including dopamine, glutamate, and GABA) modifies the function of different neuronal circuits, which begin to falter at different stages of an addiction trajectory. Upon exposure to the drug, drug cues or stress this results in unrestrained hyperactivation of the motivation/drive circuit that results in the compulsive drug intake that characterizes addiction.

All-semiconductor metamaterial-based optical circuit board at the microscale

DOE Office of Scientific and Technical Information (OSTI.GOV)

Min, Li; Huang, Lirong, E-mail: lrhuang@hust.edu.cn

2015-07-07

The newly introduced metamaterial-based optical circuit, an analogue of electronic circuit, is becoming a forefront topic in the fields of electronics, optics, plasmonics, and metamaterials. However, metals, as the commonly used plasmonic elements in an optical circuit, suffer from large losses at the visible and infrared wavelengths. We propose here a low-loss, all-semiconductor metamaterial-based optical circuit board at the microscale by using interleaved intrinsic GaAs and doped GaAs, and present the detailed design process for various lumped optical circuit elements, including lumped optical inductors, optical capacitors, optical conductors, and optical insulators. By properly combining these optical circuit elements and arrangingmore » anisotropic optical connectors, we obtain a subwavelength optical filter, which can always hold band-stop filtering function for various polarization states of the incident electromagnetic wave. All-semiconductor optical circuits may provide a new opportunity in developing low-power and ultrafast components and devices for optical information processing.« less

A Resonant Damping Study Using Piezoelectric Materials

NASA Technical Reports Server (NTRS)

Min, J. B.; Duffy, K. P.; Choi, B. B.; Morrison, C. R.; Jansen, R. H.; Provenza, A. J.

2008-01-01

Excessive vibration of turbomachinery blades causes high cycle fatigue (HCF) problems requiring damping treatments to mitigate vibration levels. Based on the technical challenges and requirements learned from previous turbomachinery blade research, a feasibility study of resonant damping control using shunted piezoelectric patches with passive and active control techniques has been conducted on cantilever beam specimens. Test results for the passive damping circuit show that the optimum resistive shunt circuit reduces the third bending resonant vibration by almost 50%, and the optimum inductive circuit reduces the vibration by 90%. In a separate test, active control reduced vibration by approximately 98%.

Logic Design Pathology and Space Flight Electronics

NASA Technical Reports Server (NTRS)

Katz, Richard; Barto, Rod L.; Erickson, K.

1997-01-01

Logic design errors have been observed in space flight missions and the final stages of ground test. The technologies used by designers and their design/analysis methodologies will be analyzed. This will give insight to the root causes of the failures. These technologies include discrete integrated circuit based systems, systems based on field and mask programmable logic, and the use computer aided engineering (CAE) systems. State-of-the-art (SOTA) design tools and methodologies will be analyzed with respect to high-reliability spacecraft design and potential pitfalls are discussed. Case studies of faults from large expensive programs to "smaller, faster, cheaper" missions will be used to explore the fundamental reasons for logic design problems.

Itinerant Microwave Photon Detector

NASA Astrophysics Data System (ADS)

Royer, Baptiste; Grimsmo, Arne L.; Choquette-Poitevin, Alexandre; Blais, Alexandre

2018-05-01

The realization of a high-efficiency microwave single photon detector is a long-standing problem in the field of microwave quantum optics. Here, we propose a quantum nondemolition, high-efficiency photon detector that can readily be implemented in present state-of-the-art circuit quantum electrodynamics. This scheme works in a continuous fashion, gaining information about the photon arrival time as well as about its presence. The key insight that allows us to circumvent the usual limitations imposed by measurement backaction is the use of long-lived dark states in a small ensemble of inhomogeneous artificial atoms to increase the interaction time between the photon and the measurement device. Using realistic system parameters, we show that large detection fidelities are possible.

Electric Propulsion Laboratory Vacuum Chamber

NASA Image and Video Library

1964-06-21

Engineer Paul Reader and his colleagues take environmental measurements during testing of a 20-inch diameter ion engine in a vacuum tank at the Electric Propulsion Laboratory (EPL). Researchers at the Lewis Research Center were investigating the use of a permanent-magnet circuit to create the magnetic field required power electron bombardment ion engines. Typical ion engines use a solenoid coil to create this magnetic field. It was thought that the substitution of a permanent magnet would create a comparable magnetic field with a lower weight. Testing of the magnet system in the EPL vacuum tanks revealed no significant operational problems. Reader found the weight of the two systems was similar, but that the thruster’s efficiency increased with the magnet. The EPL contained a series of large vacuum tanks that could be used to simulate conditions in space. Large vacuum pumps reduced the internal air pressure, and a refrigeration system created the cryogenic temperatures found in space.

Effect of drain current on appearance probability and amplitude of random telegraph noise in low-noise CMOS image sensors

NASA Astrophysics Data System (ADS)

Ichino, Shinya; Mawaki, Takezo; Teramoto, Akinobu; Kuroda, Rihito; Park, Hyeonwoo; Wakashima, Shunichi; Goto, Tetsuya; Suwa, Tomoyuki; Sugawa, Shigetoshi

2018-04-01

Random telegraph noise (RTN), which occurs in in-pixel source follower (SF) transistors, has become one of the most critical problems in high-sensitivity CMOS image sensors (CIS) because it is a limiting factor of dark random noise. In this paper, the behaviors of RTN toward changes in SF drain current conditions were analyzed using a low-noise array test circuit measurement system with a floor noise of 35 µV rms. In addition to statistical analysis by measuring a large number of transistors (18048 transistors), we also analyzed the behaviors of RTN parameters such as amplitude and time constants in the individual transistors. It is demonstrated that the appearance probability of RTN becomes small under a small drain current condition, although large-amplitude RTN tends to appear in a very small number of cells.

Robust holographic storage system design.

PubMed

Watanabe, Takahiro; Watanabe, Minoru

2011-11-21

Demand is increasing daily for large data storage systems that are useful for applications in spacecraft, space satellites, and space robots, which are all exposed to radiation-rich space environment. As candidates for use in space embedded systems, holographic storage systems are promising because they can easily provided the demanded large-storage capability. Particularly, holographic storage systems, which have no rotation mechanism, are demanded because they are virtually maintenance-free. Although a holographic memory itself is an extremely robust device even in a space radiation environment, its associated lasers and drive circuit devices are vulnerable. Such vulnerabilities sometimes engendered severe problems that prevent reading of all contents of the holographic memory, which is a turn-off failure mode of a laser array. This paper therefore presents a proposal for a recovery method for the turn-off failure mode of a laser array on a holographic storage system, and describes results of an experimental demonstration. © 2011 Optical Society of America

Investigation of a hydrostatic azimuth thrust bearing for a large steerable antenna

NASA Technical Reports Server (NTRS)

Rumbarger, J.; Castelli, V.; Rippel, H.

1972-01-01

The problems inherent in the design and construction of a hydrostatic azimuth thrust bearing for a tracking antenna of very large size were studied. For a load of 48,000,000 lbs., it is concluded that the hydrostatic bearing concept is feasible, provided that a particular multiple pad arrangement, high oil viscosity, and a particular load spreading arrangement are used. Presently available computer programs and techniques are deemed to be adequate for a good portion of the design job but new integrated programs will have to be developed in the area of the computation of the deflections of the supporting bearing structure. Experimental studies might also be indicated to ascertain the life characteristics of grouting under cyclic loading, and the optimization of hydraulic circuits and pipe sizes to insure the long life operation of pumps with high viscosity oil while avoiding cavitation.

Method and apparatus for controlling current in inductive loads such as large diameter coils

DOEpatents

Riveros, Carlos A.

1981-01-01

A method and apparatus for controlling electric current in loads that are essentially inductive, such that sparking and "ringing" current problems are reduced or eliminated. The circuit apparatus employs a pair of solid state switches (each of which switch may be an array of connected or parallel solid state switching devices such as transistors) and means for controlling those switches such that a power supply supplying two d.c. voltages (e.g. positive 150 volts d.c. and negative 150 volts d.c.) at low resistance may be connected across an essentially inductive load (e.g. a 6 gauge wire loop one hundred meters in diameter) alternatively and such that the first solid state switch is turned off and the second is turned on such that both are not on at the same time but the first turned on and the other on in less time than the inductive time constant (L/R) so that the load is essentially always presented with a low resistance path across its input. In this manner a steady AC current may be delivered to the load at a frequency desired. Shut-off problems are avoided by gradually shortening the period of switching to less than the time constant so that the maximum energy contained in the inductive load is reduced to approximately zero and dissipated in the inherent resistance. The invention circuit may be employed by adjusting the timing of switching to deliver a desired waveform (such as sinusoidal) to the load.

Substrate noise coupling: a pain for mixed-signal systems (Keynote Address)

NASA Astrophysics Data System (ADS)

Wambacq, Piet; Van der Plas, Geert; Donnay, Stephane; Badaroglu, Mustafa; Soens, Charlotte

2005-06-01

Crosstalk from digital to analog in mixed-signal ICs is recognized as one of the major roadblocks for systems-on-chip (SoC) in future CMOS technologies. This crosstalk mainly happens via the semiconducting silicon substrate, which is usually treated as a ground node by analog and RF designers. The substrate noise coupling problem leads more and more to malfunctioning or extra design iterations. One of the reasons is that the phenomenon of substrate noise coupling is difficult to model and hence difficult to understand. It can be caused by the switching of thousands or millions of gates and depends on layout details. From the generation side (the digital domain), coping with the large amount of noise generators can be solved by macromodeling. On the other hand, the impact of substrate noise on the analog circuits requires careful modeling at the level of transistors and parasitics of layout, power supply, package, PCB, Comparison to measurements of macromodeling at the digital side and careful modeling at the analog side, shows that both the generation and the impact of substrate noise can be predicted with an accuracy of a few dB. In addition, this combination of macromodeling at the digital side and careful modeling at the analog side leads to an understanding of the problem, which can be used for digital low-noise design techniques to minimize the generation of noise, and substrate noise immune design of analog/RF circuits.

Switching of High-Voltage Cable Lines with Shunt Reactors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sheskin, E. B., E-mail: evgeniy.sheskin@gmail.com; Evdokunin, G. A.

2016-05-15

The problem of disconnecting high-voltage cable lines with shunt reactors by SF{sub 6} circuit breakers is discussed. In these schemes it is possible to have a significant aperiodic component of the circuit breaker current that can prevent opening of the breaker. The authors propose methods for application to cable transmission lines which they believe will be optimal for ensuring normal disconnects.

Test Generation for Highly Sequential Circuits

DTIC Science & Technology

1989-08-01

Sequential CircuitsI Abhijit Ghosh, Srinivas Devadas , and A. Richard Newton Abstract We address the problem of generating test sequences for stuck-at...Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720. Devadas : Department of Electrical Engineering and Computer...attn1 b ~een propagatedl to ltne nnext state lites aloine. then we obtain tine fnalty Is as bit. valunes is called A miniteri state. Iti genecral. a

Circuit-switch architecture for a 30/20-GHz FDMA/TDM geostationary satellite communications network

NASA Technical Reports Server (NTRS)

Ivancic, William D.

1992-01-01

A circuit switching architecture is described for a 30/20 GHz frequency division, multiple access uplink/time division multiplexed downlink (FDMA/TDM) geostationary satellite communications network. Critical subsystems and problem areas are identified and addressed. Work was concentrated primarily on the space segment; however, the ground segment was considered concurrently to ensure cost efficiency and realistic operational constraints.

To Compare the Effects of Computer Based Learning and the Laboratory Based Learning on Students' Achievement Regarding Electric Circuits

ERIC Educational Resources Information Center

Bayrak, Bekir; Kanli, Uygar; Kandil Ingeç, Sebnem

2007-01-01

In this study, the research problem was: "Is the computer based physics instruction as effective as laboratory intensive physics instruction with regards to academic success on electric circuits 9th grade students?" For this research of experimental quality the design of pre-test and post-test are applied with an experiment and a control…

NeuroTessMesh: A Tool for the Generation and Visualization of Neuron Meshes and Adaptive On-the-Fly Refinement

PubMed Central

Garcia-Cantero, Juan J.; Brito, Juan P.; Mata, Susana; Bayona, Sofia; Pastor, Luis

2017-01-01

Gaining a better understanding of the human brain continues to be one of the greatest challenges for science, largely because of the overwhelming complexity of the brain and the difficulty of analyzing the features and behavior of dense neural networks. Regarding analysis, 3D visualization has proven to be a useful tool for the evaluation of complex systems. However, the large number of neurons in non-trivial circuits, together with their intricate geometry, makes the visualization of a neuronal scenario an extremely challenging computational problem. Previous work in this area dealt with the generation of 3D polygonal meshes that approximated the cells’ overall anatomy but did not attempt to deal with the extremely high storage and computational cost required to manage a complex scene. This paper presents NeuroTessMesh, a tool specifically designed to cope with many of the problems associated with the visualization of neural circuits that are comprised of large numbers of cells. In addition, this method facilitates the recovery and visualization of the 3D geometry of cells included in databases, such as NeuroMorpho, and provides the tools needed to approximate missing information such as the soma’s morphology. This method takes as its only input the available compact, yet incomplete, morphological tracings of the cells as acquired by neuroscientists. It uses a multiresolution approach that combines an initial, coarse mesh generation with subsequent on-the-fly adaptive mesh refinement stages using tessellation shaders. For the coarse mesh generation, a novel approach, based on the Finite Element Method, allows approximation of the 3D shape of the soma from its incomplete description. Subsequently, the adaptive refinement process performed in the graphic card generates meshes that provide good visual quality geometries at a reasonable computational cost, both in terms of memory and rendering time. All the described techniques have been integrated into NeuroTessMesh, available to the scientific community, to generate, visualize, and save the adaptive resolution meshes. PMID:28690511

Analysis of a Distributed Pulse Power System Using a Circuit Analysis Code

DTIC Science & Technology

1979-06-01

dose rate was then integrated to give a number that could be compared with measure- ments made using thermal luminescent dosimeters ( TLD ’ s). Since...NM 8 7117 AND THE BDM CORPORATION, ALBUQUERQUE, NM 87106 Abstract A sophisticated computer code (SCEPTRE), used to analyze electronic circuits...computer code (SCEPTRE), used to analyze electronic circuits, was used to evaluate the performance of a large flash X-ray machine. This device was

Electromagnetic inhibition of high frequency thermal bonding machine

NASA Astrophysics Data System (ADS)

He, Hong; Zhang, Qing-qing; Li, Hang; Zhang, Da-jian; Hou, Ming-feng; Zhu, Xian-wei

2011-12-01

The traditional high frequency thermal bonding machine had serious radiation problems at dominant frequency, two times frequency and three times frequency. Combining with its working principle, the problems of electromagnetic compatibility were studied, three following measures were adopted: 1.At the head part of the high frequency thermal bonding machine, resonant circuit attenuator was designed. The notch groove and reaction field can make the radiation being undermined or absorbed; 2.The electromagnetic radiation shielding was made for the high frequency copper power feeder; 3.Redesigned the high-frequency oscillator circuit to reduce the output of harmonic oscillator. The test results showed that these measures can make the output according with the national standard of electromagnetic compatibility (GB4824-2004-2A), the problems of electromagnetic radiation leakage can be solved, and good social, environmental and economic benefits would be brought.

Large scale in vivo recordings to study neuronal biophysics.

PubMed

Giocomo, Lisa M

2015-06-01

Over the last several years, technological advances have enabled researchers to more readily observe single-cell membrane biophysics in awake, behaving animals. Studies utilizing these technologies have provided important insights into the mechanisms generating functional neural codes in both sensory and non-sensory cortical circuits. Crucial for a deeper understanding of how membrane biophysics control circuit dynamics however, is a continued effort to move toward large scale studies of membrane biophysics, in terms of the numbers of neurons and ion channels examined. Future work faces a number of theoretical and technical challenges on this front but recent technological developments hold great promise for a larger scale understanding of how membrane biophysics contribute to circuit coding and computation. Copyright © 2014 Elsevier Ltd. All rights reserved.

Out Flying the Eagle: China’s Drive for Domestic Economic Innovation and Its Impact on U.S.-China Relations

DTIC Science & Technology

2014-03-01

wind turbines from General Electric. China recognizes the issues with IPR but it is something that will take time to fix. It will be a significant...Large aircraft  Large-scale oil and gas exploration  Manned space, including lunar exploration  Next-generation broadband wireless ...circuits, and building an innovation system for China’s integrated circuit (IC) manufacturing industry. 3. New generation broadband wireless mobile

Magnetic-Flux-Compensated Voltage Divider

NASA Technical Reports Server (NTRS)

Mata, Carlos T.

2005-01-01

A magnetic-flux-compensated voltage-divider circuit has been proposed for use in measuring the true potential across a component that is exposed to large, rapidly varying electric currents like those produced by lightning strikes. An example of such a component is a lightning arrester, which is typically exposed to currents of the order of tens of kiloamperes, having rise times of the order of hundreds of nanoseconds. Traditional voltage-divider circuits are not designed for magnetic-flux-compensation: They contain uncompensated loops having areas large enough that the transient magnetic fluxes associated with large transient currents induce spurious voltages large enough to distort voltage-divider outputs significantly. A drawing of the proposed circuit was not available at the time of receipt of information for this article. What is known from a summary textual description is that the proposed circuit would contain a total of four voltage dividers: There would be two mixed dividers in parallel with each other and with the component of interest (e.g., a lightning arrester), plus two mixed dividers in parallel with each other and in series with the component of interest in the same plane. The electrical and geometric configuration would provide compensation for induced voltages, including those attributable to asymmetry in the volumetric density of the lightning or other transient current, canceling out the spurious voltages and measuring the true voltage across the component.

Optical correlator using very-large-scale integrated circuit/ferroelectric-liquid-crystal electrically addressed spatial light modulators

NASA Technical Reports Server (NTRS)

Turner, Richard M.; Jared, David A.; Sharp, Gary D.; Johnson, Kristina M.

1993-01-01

The use of 2-kHz 64 x 64 very-large-scale integrated circuit/ferroelectric-liquid-crystal electrically addressed spatial light modulators as the input and filter planes of a VanderLugt-type optical correlator is discussed. Liquid-crystal layer thickness variations that are present in the devices are analyzed, and the effects on correlator performance are investigated through computer simulations. Experimental results from the very-large-scale-integrated / ferroelectric-liquid-crystal optical-correlator system are presented and are consistent with the level of performance predicted by the simulations.

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G. (Inventor)

1985-01-01

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

Problem Solving Method Based on E-Learning System for Engineering Education

ERIC Educational Resources Information Center

Khazaal, Hasan F.

2015-01-01

Encouraging engineering students to handle advanced technology with multimedia, as well as motivate them to have the skills of solving the problem, are the missions of the teacher in preparing students for a modern professional career. This research proposes a scenario of problem solving in basic electrical circuits based on an e-learning system…

Reflection on Solutions in the Form of Refutation Texts versus Problem Solving: The Case of 8th Graders Studying Simple Electric Circuits

ERIC Educational Resources Information Center

Safadi, Rafi; Safadi, Ekhlass; Meidav, Meir

2017-01-01

This study compared students' learning in troubleshooting and problem solving activities. The troubleshooting activities provided students with solutions to conceptual problems in the form of refutation texts; namely, solutions that portray common misconceptions, refute them, and then present the accepted scientific ideas. They required students…

Modeling and stress analysis of large format InSb focal plane arrays detector under thermal shock

NASA Astrophysics Data System (ADS)

Zhang, Li-Wen; Meng, Qing-Duan; Zhang, Xiao-Ling; Yu, Qian; Lv, Yan-Qiu; Si, Jun-Jie

2013-09-01

Higher fracture probability, appearing in large format InSb infrared focal plane arrays detector under thermal shock loadings, limits its applicability and suitability for large format equipment, and has been an urgent problem to be solved. In order to understand the fracture mechanism and improve the reliability, three dimensional modeling and stress analysis of large format InSb detector is necessary. However, there are few reports on three dimensional modeling and simulation of large format InSb detector, due to huge meshing numbers and time-consuming operation to solve. To solve the problems, basing on the thermal mismatch displacement formula, an equivalent modeling method is proposed in this paper. With the proposed equivalent modeling method, employing the ANSYS software, three dimensional large format InSb detector is modeled, and the maximum Von Mises stress appearing in InSb chip dependent on array format is researched. According to the maximum Von Mises stress location shift and stress increasing tendency, the adaptability range of the proposed equivalent method is also derived, that is, for 16 × 16, 32 × 32 and 64 × 64 format, its adaptability ranges are not larger than 64 × 64, 256 × 256 and 1024 × 1024 format, respectively. Taking 1024 × 1024 InSb detector as an example, the Von Mises stress distribution appearing in InSb chip, Si readout integrated circuits and indium bump arrays are described, and the causes are discussed in detail. All these will provide a feasible research plan to identify the fracture origins of InSb chip and reduce fracture probability for large format InSb detector.

The weight and angle of depression detection and control system of a large portal crane

NASA Astrophysics Data System (ADS)

Shi, Lian-Wen; Xie, Hongxia; Wang, Meijing; Guan, Yankui; Leng, Gengxin

2008-12-01

In order to prevent overturning accidents, the lifted weight and the angle of depression should be detected when a large portal crane is working in a shipyard. However, the locations of the weight sensor and the angle of depression detection part are far away from the central control room. The long signal transmitting distance is so long that it results in a lot of interferences, even the breaking down of the system. In order to solve the above mentioned problems, a high precision analog signal amplifier and a voltage / current (V / I) transforming circuit is set at the place of the sensor to detect the weight. After the sensor signals have been amplified, they will be transformed into 4 to 20 mA current signals for transmission. Thus the interferences in the long transmitting process can be overcome. A WXJ-3 potentiometer is applied to detect the angle of depression. This device has the advantages of a high accuracy of repeated positions, a good stability and a strong anti-fatigue property. After processed by the current-strengthened circuit, the transmitted signals representing voltage value can have the characteristics of transmitting currents because of the large current value. Then the anti-jamming capability is stronger. Send the weight and the angle of depression detection signals to A/D converter, then the signals turn into digital representation and are sent to the control system composed of a PLC. The PLC calculates the current rated lifting weight depending on the different angles of depression, and when the weight is greater than the rated one, the PLC sends control signals to stop the lifting; hence the crane can only put down the weights. So the safety of the large portal crane is effectively guaranteed. At present ,the system has been applied to the 70-ton large portal cranes of the Tianjin Xingang Shipyard with a safe operation of 10 years.

High-Threshold Low-Overhead Fault-Tolerant Classical Computation and the Replacement of Measurements with Unitary Quantum Gates.

PubMed

Cruikshank, Benjamin; Jacobs, Kurt

2017-07-21

von Neumann's classic "multiplexing" method is unique in achieving high-threshold fault-tolerant classical computation (FTCC), but has several significant barriers to implementation: (i) the extremely complex circuits required by randomized connections, (ii) the difficulty of calculating its performance in practical regimes of both code size and logical error rate, and (iii) the (perceived) need for large code sizes. Here we present numerical results indicating that the third assertion is false, and introduce a novel scheme that eliminates the two remaining problems while retaining a threshold very close to von Neumann's ideal of 1/6. We present a simple, highly ordered wiring structure that vastly reduces the circuit complexity, demonstrates that randomization is unnecessary, and provides a feasible method to calculate the performance. This in turn allows us to show that the scheme requires only moderate code sizes, vastly outperforms concatenation schemes, and under a standard error model a unitary implementation realizes universal FTCC with an accuracy threshold of p<5.5%, in which p is the error probability for 3-qubit gates. FTCC is a key component in realizing measurement-free protocols for quantum information processing. In view of this, we use our scheme to show that all-unitary quantum circuits can reproduce any measurement-based feedback process in which the asymptotic error probabilities for the measurement and feedback are (32/63)p≈0.51p and 1.51p, respectively.

A New Test Method of Circuit Breaker Spring Telescopic Characteristics Based Image Processing

NASA Astrophysics Data System (ADS)

Huang, Huimin; Wang, Feifeng; Lu, Yufeng; Xia, Xiaofei; Su, Yi

2018-06-01

This paper applied computer vision technology to the fatigue condition monitoring of springs, and a new telescopic characteristics test method is proposed for circuit breaker operating mechanism spring based on image processing technology. High-speed camera is utilized to capture spring movement image sequences when high voltage circuit breaker operated. Then the image-matching method is used to obtain the deformation-time curve and speed-time curve, and the spring expansion and deformation parameters are extracted from it, which will lay a foundation for subsequent spring force analysis and matching state evaluation. After performing simulation tests at the experimental site, this image analyzing method could solve the complex problems of traditional mechanical sensor installation and monitoring online, status assessment of the circuit breaker spring.

Finite Ground Coplanar (FGC) Waveguide: Characteristics and Advantages Evaluated for Radiofrequency and Wireless Communication Circuits

NASA Technical Reports Server (NTRS)

Ponchak, George E.

1999-01-01

Researchers in NASA Lewis Research Center s Electron Device Technology Branch are developing transmission lines for radiofrequency and wireless circuits that are more efficient, smaller, and make lower cost circuits possible. Traditionally, radiofrequency and wireless circuits have employed a microstrip or coplanar waveguide to interconnect the various electrical elements that comprise a circuit. Although a coplanar waveguide (CPW) is widely viewed as better than a microstrip for most applications, it too has problems. To solve these problems, NASA Lewis and the University of Michigan developed a new version of a coplanar waveguide with electrically narrow ground planes. Through extensive numerical modeling and experimental measurements, we have characterized the propagation constant of the FGC waveguide, the lumped and distributed circuit elements integrated in the FGC waveguide, and the coupling between parallel transmission lines. Although the attenuation per unit length is higher for the FGC waveguide because of higher conductor loss, the attenuation is comparable when the ground plane width is twice the center conductor width as shown in the following graph. An upper limit to the line width is derived from observations that when the total line width is greater than ld/2, spurious resonances due to the parallel plate waveguide mode are established. Thus, the ground plane width must be less than ld/4 where ld is the wavelength in the dielectric. Since the center conductor width S is typically less than l/10 to maintain good transverse electromagnetic mode characteristics, it follows that a ground plane width of B = 2S would also be electrically narrow. Thus, we can now treat the ground strips of the FGC waveguide the same way that the center conductor is treated.

Demonstration of quantum advantage in machine learning

NASA Astrophysics Data System (ADS)

Ristè, Diego; da Silva, Marcus P.; Ryan, Colm A.; Cross, Andrew W.; Córcoles, Antonio D.; Smolin, John A.; Gambetta, Jay M.; Chow, Jerry M.; Johnson, Blake R.

2017-04-01

The main promise of quantum computing is to efficiently solve certain problems that are prohibitively expensive for a classical computer. Most problems with a proven quantum advantage involve the repeated use of a black box, or oracle, whose structure encodes the solution. One measure of the algorithmic performance is the query complexity, i.e., the scaling of the number of oracle calls needed to find the solution with a given probability. Few-qubit demonstrations of quantum algorithms, such as Deutsch-Jozsa and Grover, have been implemented across diverse physical systems such as nuclear magnetic resonance, trapped ions, optical systems, and superconducting circuits. However, at the small scale, these problems can already be solved classically with a few oracle queries, limiting the obtained advantage. Here we solve an oracle-based problem, known as learning parity with noise, on a five-qubit superconducting processor. Executing classical and quantum algorithms using the same oracle, we observe a large gap in query count in favor of quantum processing. We find that this gap grows by orders of magnitude as a function of the error rates and the problem size. This result demonstrates that, while complex fault-tolerant architectures will be required for universal quantum computing, a significant quantum advantage already emerges in existing noisy systems.

Polynomial-time solution of prime factorization and NP-complete problems with digital memcomputing machines

NASA Astrophysics Data System (ADS)

Traversa, Fabio L.; Di Ventra, Massimiliano

2017-02-01

We introduce a class of digital machines, we name Digital Memcomputing Machines, (DMMs) able to solve a wide range of problems including Non-deterministic Polynomial (NP) ones with polynomial resources (in time, space, and energy). An abstract DMM with this power must satisfy a set of compatible mathematical constraints underlying its practical realization. We prove this by making a connection with the dynamical systems theory. This leads us to a set of physical constraints for poly-resource resolvability. Once the mathematical requirements have been assessed, we propose a practical scheme to solve the above class of problems based on the novel concept of self-organizing logic gates and circuits (SOLCs). These are logic gates and circuits able to accept input signals from any terminal, without distinction between conventional input and output terminals. They can solve boolean problems by self-organizing into their solution. They can be fabricated either with circuit elements with memory (such as memristors) and/or standard MOS technology. Using tools of functional analysis, we prove mathematically the following constraints for the poly-resource resolvability: (i) SOLCs possess a global attractor; (ii) their only equilibrium points are the solutions of the problems to solve; (iii) the system converges exponentially fast to the solutions; (iv) the equilibrium convergence rate scales at most polynomially with input size. We finally provide arguments that periodic orbits and strange attractors cannot coexist with equilibria. As examples, we show how to solve the prime factorization and the search version of the NP-complete subset-sum problem. Since DMMs map integers into integers, they are robust against noise and hence scalable. We finally discuss the implications of the DMM realization through SOLCs to the NP = P question related to constraints of poly-resources resolvability.

What is this chocolate milk in my circuit? A cause of acute clotting of a continuous renal replacement circuit: Questions.

PubMed

Kakajiwala, Aadil; Chiotos, Kathleen; Brothers, Julie; Lederman, April; Amaral, Sandra

2016-12-01

One of the greatest problems associated with continuous renal replacement therapy (CRRT) is the early clotting of filters. A literature search revealed three case reports of lipemic blood causing recurrent clotting and reduced CRRT circuit survival time in adult patients, but no reports of cases in children. A 23-month-old male infant with Martinez-Frias syndrome and multivisceral transplant was admitted to the hospital with severe sepsis and hemolytic anemia. He developed acute kidney injury, fluid overload and electrolyte imbalances requiring CRRT and was also administered total parenteral nutrition (TPN) and fat emulsion. The first circuit lasted 60 h before routine change was required. The second circuit showed acute clotting after only 18 h, and brownish-milky fluid was found in the circuit tubing layered between the clotted blood. The patient's serum triglyceride levels were elevated at 988 mg/dL. The lipid infusion was stopped and CRRT restarted. Serum triglyceride levels improved to 363 mg/dL. The new circuit lasted 63 h before routine change was required. Clotting of CRRT circuits due to elevated triglyceride levels is rare and has not been reported in the pediatric population. Physicians should be mindful of this risk in patients receiving TPN who have unexpected clotting of CRRT circuits.

PULSE AMPLIFIER

DOEpatents

Johnstone, C.W.

1958-06-17

The improvement of pulse amplifiers used with scintillation detectors is described. The pulse amplifier circuit has the advantage of reducing the harmful effects of overloading cause by large signal inputs. In general the pulse amplifier circuit comprises two amplifier tubes with the input pulses applied to one amplifier grid and coupled to the second amplifier tube through a common cathode load. The output of the second amplifier is coupled from the plate circuit to a cathode follower tube grid and a diode tube in connected from grid to cathode of the cathode follower tube. Degenerative feedback is provided in the second amplifier by coupling a signal from the cathode follower cathode to the second amplifier grid. The circuit proqides moderate gain stability, and overload protection for subsequent pulse circuits.

Manipulating parallel circuits: the perioperative management of patients with complex congenital cardiac disease.

PubMed

Lawrenson, John; Eyskens, Benedicte; Vlasselaers, Dirk; Gewillig, Marc

2003-08-01

In all patients undergoing cardiac surgery, the effective delivery of oxygen to the tissues is of paramount importance. In the patient with relatively normal cardiac structures, the pulmonary and systemic circulations are relatively independent of each other. In the patient with a functional single ventricle, the pulmonary and systemic circulations are dependent on the same pump. As a consequence of this interdependency, the haemodynamic changes following complex palliative procedures, such as the Norwood operation, can be difficult to understand. Comparison of the newly created surgical connections to a simple set of direct current electrical circuits may help the practitioner to successfully care for the patient. In patients undergoing complex palliations, the pulmonary and systemic circulations can be compared to two circuits in parallel. Manipulations of variables, such as resistance or flow, in one circuit, can profoundly affect the performance of the other circuit. A large pulmonary flow might result in a large increase in the saturation of haemoglobin with oxygen returning to the heart via the pulmonary veins at the expense of a decreased systemic flow. Accurate balancing of these parallel circulations requires an appreciation of all interventions that can affect individual components of both circulations.

Self-healing fuse

NASA Technical Reports Server (NTRS)

Jones, N. D.; Kinsinger, R. E.; Harris, L. P.

1974-01-01

Fast-acting current limiting device provides current overload protection for vulnerable circuit elements and then re-establishes conduction path within milliseconds. Fuse can also perform as fast-acting switch to clear transient circuit overloads. Fuse takes advantage of large increase in electrical resistivity that occurs when liquid metal vaporizes.

An Apparatus for the Determination of Curie Temperature.

ERIC Educational Resources Information Center

Bates, P. A.; Kent, A. M.

1980-01-01

Described is an apparatus for determining the Curie temperature of a Ferromagnetic material which enables large specimens to be heated up to a maximum of 1100K in 20 minutes. Included is the theory, magnetic circuit apparatus, electrical circuit, and results using this apparatus. (DS)

Aerosol-jet-printed, 1 volt H-bridge drive circuit on plastic with integrated electrochromic pixel.

PubMed

Ha, Mingjing; Zhang, Wei; Braga, Daniele; Renn, Michael J; Kim, Chris H; Frisbie, C Daniel

2013-12-26

In this report, we demonstrate a printed, flexible, and low-voltage circuit that successfully drives a polymer electrochromic (EC) pixel as large as 4 mm(2) that is printed on the same substrate. All of the key components of the drive circuitry, namely, resistors, capacitors, and transistors, were aerosol-jet-printed onto a plastic foil; metallic electrodes and interconnects were the only components prepatterned on the plastic by conventional photolithography. The large milliampere drive currents necessary to switch a 4 mm(2) EC pixel were controlled by printed electrolyte-gated transistors (EGTs) that incorporate printable ion gels for the gate insulator layers and poly(3-hexylthiophene) for the semiconductor channels. Upon application of a 1 V input pulse, the circuit switches the printed EC pixel ON (red) and OFF (blue) two times in approximately 4 s. The performance of the circuit and the behavior of the individual resistors, capacitors, EGTs, and the EC pixel are analyzed as functions of the printing parameters and operating conditions.

Effect of dislocations on the open-circuit voltage, short-circuit current and efficiency of heteroepitaxial indium phosphide solar cells

NASA Technical Reports Server (NTRS)

Jain, Raj K.; Flood, Dennis J.

1990-01-01

Excellent radiation resistance of indium phosphide solar cells makes them a promising candidate for space power applications, but the present high cost of starting substrates may inhibit their large scale use. Thin film indium phosphide cells grown on Si or GaAs substrates have exhibited low efficiencies, because of the generation and propagation of large number of dislocations. Dislocation densities were calculated and its influence on the open circuit voltage, short circuit current, and efficiency of heteroepitaxial indium phosphide cells was studied using the PC-1D. Dislocations act as predominant recombination centers and are required to be controlled by proper transition layers and improved growth techniques. It is shown that heteroepitaxial grown cells could achieve efficiencies in excess of 18 percent AMO by controlling the number of dislocations. The effect of emitter thickness and surface recombination velocity on the cell performance parameters vs. dislocation density is also studied.

Equivalent circuit-based analysis of CMUT cell dynamics in arrays.

PubMed

Oguz, H K; Atalar, Abdullah; Köymen, Hayrettin

2013-05-01

Capacitive micromachined ultrasonic transducers (CMUTs) are usually composed of large arrays of closely packed cells. In this work, we use an equivalent circuit model to analyze CMUT arrays with multiple cells. We study the effects of mutual acoustic interactions through the immersion medium caused by the pressure field generated by each cell acting upon the others. To do this, all the cells in the array are coupled through a radiation impedance matrix at their acoustic terminals. An accurate approximation for the mutual radiation impedance is defined between two circular cells, which can be used in large arrays to reduce computational complexity. Hence, a performance analysis of CMUT arrays can be accurately done with a circuit simulator. By using the proposed model, one can very rapidly obtain the linear frequency and nonlinear transient responses of arrays with an arbitrary number of CMUT cells. We performed several finite element method (FEM) simulations for arrays with small numbers of cells and showed that the results are very similar to those obtained by the equivalent circuit model.

Logic circuits from zero forcing.

PubMed

Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael

We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

HDL to verification logic translator

NASA Technical Reports Server (NTRS)

Gambles, J. W.; Windley, P. J.

1992-01-01

The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

Electrostatic separation for recycling waste printed circuit board: a study on external factor and a robust design for optimization.

PubMed

Hou, Shibing; Wu, Jiang; Qin, Yufei; Xu, Zhenming

2010-07-01

Electrostatic separation is an effective and environmentally friendly method for recycling waste printed circuit board (PCB) by several kinds of electrostatic separators. However, some notable problems have been detected in its applications and cannot be efficiently resolved by optimizing the separation process. Instead of the separator itself, these problems are mainly caused by some external factors such as the nonconductive powder (NP) and the superficial moisture of feeding granule mixture. These problems finally lead to an inefficient separation. In the present research, the impacts of these external factors were investigated and a robust design was built to optimize the process and to weaken the adverse impact. A most robust parameter setting (25 kv, 80 rpm) was concluded from the experimental design. In addition, some theoretical methods, including cyclone separation, were presented to eliminate these problems substantially. This will contribute to efficient electrostatic separation of waste PCB and make remarkable progress for industrial applications.

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

NASA Astrophysics Data System (ADS)

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-03-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

PubMed Central

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-01-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration. PMID:24599023

Implementation of a three-qubit refined Deutsch Jozsa algorithm using SFG quantum logic gates

NASA Astrophysics Data System (ADS)

DelDuce, A.; Savory, S.; Bayvel, P.

2006-05-01

In this paper we present a quantum logic circuit which can be used for the experimental demonstration of a three-qubit solid state quantum computer based on a recent proposal of optically driven quantum logic gates. In these gates, the entanglement of randomly placed electron spin qubits is manipulated by optical excitation of control electrons. The circuit we describe solves the Deutsch problem with an improved algorithm called the refined Deutsch-Jozsa algorithm. We show that it is possible to select optical pulses that solve the Deutsch problem correctly, and do so without losing quantum information to the control electrons, even though the gate parameters vary substantially from one gate to another.

Information Switching Processor (ISP) contention analysis and control

NASA Technical Reports Server (NTRS)

Inukai, Thomas

1995-01-01

In designing a satellite system with on-board processing, the selection of a switching architecture is often critical. The on-board switching function can be implemented by circuit switching or packet switching. Destination-directed packet switching has several attractive features, such as self-routing without on-board switch reconfiguration, no switch control memory requirement, efficient bandwidth utilization for packet switched traffic, and accommodation of circuit switched traffic. Destination-directed packet switching, however, has two potential concerns: (1) contention and (2) congestion. And this report specifically deals with the first problem. It includes a description and analysis of various self-routing switch structures, the nature of contention problems, and contention and resolution techniques.

Speed-Up Techniques for Complementary Metal Oxide Semiconductor Very Large Scale Integration.

DTIC Science & Technology

1984-12-14

The input voltage at which the two transistors are in the constant current region at the same time marks the active operating region of the inverter...decoder precharge configurations. One circuit displayed a marked enhancement in operation while the other precharged circuit displyed degraded operation due...34 IEEE Journal of Solid State Circuits, SC-18: 457-462 (October 1983). 19. Cobbold , R. Theory and Applications of Field Effect Transistors, New York: John

Circuit breaker lock out assembly

DOEpatents

Gordy, W.T.

1983-05-18

A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly S shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

Circuit breaker lock out assembly

DOEpatents

Gordy, Wade T.

1984-01-01

A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly "S" shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

Computational Analysis of Static and Dynamic Behaviour of Magnetic Suspensions and Magnetic Bearings

NASA Technical Reports Server (NTRS)

Britcher, Colin P. (Editor); Groom, Nelson J.

1996-01-01

Static modelling of magnetic bearings is often carried out using magnetic circuit theory. This theory cannot easily include nonlinear effects such as magnetic saturation or the fringing of flux in air-gaps. Modern computational tools are able to accurately model complex magnetic bearing geometries, provided some care is exercised. In magnetic suspension applications, the magnetic fields are highly three-dimensional and require computational tools for the solution of most problems of interest. The dynamics of a magnetic bearing or magnetic suspension system can be strongly affected by eddy currents. Eddy currents are present whenever a time-varying magnetic flux penetrates a conducting medium. The direction of flow of the eddy current is such as to reduce the rate-of-change of flux. Analytic solutions for eddy currents are available for some simplified geometries, but complex geometries must be solved by computation. It is only in recent years that such computations have been considered truly practical. At NASA Langley Research Center, state-of-the-art finite-element computer codes, 'OPERA', 'TOSCA' and 'ELEKTRA' have recently been installed and applied to the magnetostatic and eddy current problems. This paper reviews results of theoretical analyses which suggest general forms of mathematical models for eddy currents, together with computational results. A simplified circuit-based eddy current model proposed appears to predict the observed trends in the case of large eddy current circuits in conducting non-magnetic material. A much more difficult case is seen to be that of eddy currents in magnetic material, or in non-magnetic material at higher frequencies, due to the lower skin depths. Even here, the dissipative behavior has been shown to yield at least somewhat to linear modelling. Magnetostatic and eddy current computations have been carried out relating to the Annular Suspension and Pointing System, a prototype for a space payload pointing and vibration isolation system, where the magnetic actuator geometry resembles a conventional magnetic bearing. Magnetostatic computations provide estimates of flux density within airgaps and the iron core material, fringing at the pole faces and the net force generated. Eddy current computations provide coil inductance, power dissipation and the phase lag in the magnetic field, all as functions of excitation frequency. Here, the dynamics of the magnetic bearings, notably the rise time of forces with changing currents, are found to be very strongly affected by eddy currents, even at quite low frequencies. Results are also compared to experimental measurements of the performance of a large-gap magnetic suspension system, the Large Angle Magnetic Suspension Test Fixture (LAMSTF). Eddy current effects are again shown to significantly affect the dynamics of the system. Some consideration is given to the ease and accuracy of computation, specifically relating to OPERA/TOSCA/ELEKTRA.

Integrated optical circuit engineering V; Proceedings of the Meeting, San Diego, CA, Aug. 17-20, 1987

NASA Astrophysics Data System (ADS)

Mentzer, Mark A.

Recent advances in the theoretical and practical design and applications of optoelectronic devices and optical circuits are examined in reviews and reports. Topics discussed include system and market considerations, guided-wave phenomena, waveguide devices, processing technology, lithium niobate devices, and coupling problems. Consideration is given to testing and measurement, integrated optics for fiber-optic systems, optical interconnect technology, and optical computing.

Design and development of a low-cost biphasic charge-balanced functional electric stimulator and its clinical validation.

PubMed

Shendkar, Chandrashekhar; Lenka, Prasanna K; Biswas, Abhishek; Kumar, Ratnesh; Mahadevappa, Manjunatha

2015-10-01

Functional electric stimulators that produce near-ideal, charge-balanced biphasic stimulation waveforms with interphase delay are considered safer and more efficacious than conventional stimulators. An indigenously designed, low-cost, portable FES device named InStim is developed. It features a charge-balanced biphasic single channel. The authors present the complete design, mathematical analysis of the circuit and the clinical evaluation of the device. The developed circuit was tested on stroke patients affected by foot drop problems. It was tested both under laboratory conditions and in clinical settings. The key building blocks of this circuit are low dropout regulators, a DC-DC voltage booster and a single high-power current source OP-Amp with current-limiting capabilities. This allows the device to deliver high-voltage, constant current, biphasic pulses without the use of a bulky step-up transformer. The advantages of the proposed design over the currently existing devices include improved safety features (zero DC current, current-limiting mechanism and safe pulses), waveform morphology that causes less muscle fatigue, cost-effectiveness and compact power-efficient circuit design with minimal components. The device is also capable of producing appropriate ankle dorsiflexion in patients having foot drop problems of various Medical Research Council scale grades.

Double sided circuit board and a method for its manufacture

DOEpatents

Lindenmeyer, Carl W.

1989-01-01

Conductance between the sides of a large double sided printed circuit board is provided using a method which eliminates the need for chemical immersion or photographic exposure of the entire large board. A plurality of through-holes are drilled or punched in a substratum according to the desired pattern, conductive laminae are made to adhere to both sides of the substratum covering the holes and the laminae are pressed together and permanently joined within the holes, providing conductive paths.

Double sided circuit board and a method for its manufacture

DOEpatents

Lindenmeyer, C.W.

1988-04-14

Conductance between the sides of a large double sided printed circuit board is provided using a method which eliminates the need for chemical immersion or photographic exposure of the entire large board. A plurality of through-holes are drilled or punched in a substratum according to the desired pattern, conductive laminae are made to adhere to both sides of the substratum covering the holes and the laminae are pressed together and permanently joined within the holes, providing conductive paths. 4 figs.

Double sided circuit board and a method for its manufacture

DOEpatents

Lindenmeyer, Carl W.

1989-07-04

Conductance between the sides of a large double sided printed circuit board is provided using a method which eliminates the need for chemical immersion or photographic exposure of the entire large board. A plurality of through-holes are drilled or punched in a substratum according to the desired pattern, conductive laminae are made to adhere to both sides of the substratum covering the holes and the laminae are pressed together and permanently joined within the holes, providing conductive paths.

Two-Stage Series-Resonant Inverter

NASA Technical Reports Server (NTRS)

Stuart, Thomas A.

1994-01-01

Two-stage inverter includes variable-frequency, voltage-regulating first stage and fixed-frequency second stage. Lightweight circuit provides regulated power and is invulnerable to output short circuits. Does not require large capacitor across ac bus, like parallel resonant designs. Particularly suitable for use in ac-power-distribution system of aircraft.

Application of the superposition principle to solar-cell analysis

NASA Technical Reports Server (NTRS)

Lindholm, F. A.; Fossum, J. G.; Burgess, E. L.

1979-01-01

The superposition principle of differential-equation theory - which applies if and only if the relevant boundary-value problems are linear - is used to derive the widely used shifting approximation that the current-voltage characteristic of an illuminated solar cell is the dark current-voltage characteristic shifted by the short-circuit photocurrent. Analytical methods are presented to treat cases where shifting is not strictly valid. Well-defined conditions necessary for superposition to apply are established. For high injection in the base region, the method of analysis accurately yields the dependence of the open-circuit voltage on the short-circuit current (or the illumination level).

Variable-pulse-shape pulsed-power accelerator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stoltzfus, Brian S.; Austin, Kevin; Hutsel, Brian Thomas

A variable-pulse-shape pulsed-power accelerator is driven by a large number of independent LC drive circuits. Each LC circuit drives one or more coaxial transmission lines that deliver the circuit's output power to several water-insulated radial transmission lines that are connected in parallel at small radius by a water-insulated post-hole convolute. The accelerator can be impedance matched throughout. The coaxial transmission lines are sufficiently long to transit-time isolate the LC drive circuits from the water-insulated transmission lines, which allows each LC drive circuit to be operated without being affected by the other circuits. This enables the creation of any power pulsemore » that can be mathematically described as a time-shifted linear combination of the pulses of the individual LC drive circuits. Therefore, the output power of the convolute can provide a variable pulse shape to a load that can be used for magnetically driven, quasi-isentropic compression experiments and other applications.« less

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

The circuit of polychromator for Experimental Advanced Superconducting Tokamak edge Thomson scattering diagnostic.

PubMed

Zang, Qing; Hsieh, C L; Zhao, Junyu; Chen, Hui; Li, Fengjuan

2013-09-01

The detector circuit is the core component of filter polychromator which is used for scattering light analysis in Thomson scattering diagnostic, and is responsible for the precision and stability of a system. High signal-to-noise and stability are primary requirements for the diagnostic. Recently, an upgraded detector circuit for weak light detecting in Experimental Advanced Superconducting Tokamak (EAST) edge Thomson scattering system has been designed, which can be used for the measurement of large electron temperature (T(e)) gradient and low electron density (n(e)). In this new circuit, a thermoelectric-cooled avalanche photodiode with the aid circuit is involved for increasing stability and enhancing signal-to-noise ratio (SNR), especially the circuit will never be influenced by ambient temperature. These features are expected to improve the accuracy of EAST Thomson diagnostic dramatically. Related mechanical construction of the circuit is redesigned as well for heat-sinking and installation. All parameters are optimized, and SNR is dramatically improved. The number of minimum detectable photons is only 10.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Volkow, N.D.; Wang, G.; Volkow, N.D.

Based on brain imaging findings, we present a model according to which addiction emerges as an imbalance in the information processing and integration among various brain circuits and functions. The dysfunctions reflect (a) decreased sensitivity of reward circuits, (b) enhanced sensitivity of memory circuits to conditioned expectations to drugs and drug cues, stress reactivity, and (c) negative mood, and a weakened control circuit. Although initial experimentation with a drug of abuse is largely a voluntary behavior, continued drug use can eventually impair neuronal circuits in the brain that are involved in free will, turning drug use into an automatic compulsivemore » behavior. The ability of addictive drugs to co-opt neurotransmitter signals between neurons (including dopamine, glutamate, and GABA) modifies the function of different neuronal circuits, which begin to falter at different stages of an addiction trajectory. Upon exposure to the drug, drug cues or stress this results in unrestrained hyperactivation of the motivation/drive circuit that results in the compulsive drug intake that characterizes addiction.« less

A programming language for composable DNA circuits

PubMed Central

Phillips, Andrew; Cardelli, Luca

2009-01-01

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing. PMID:19535415

Architecture-Dependent Robustness and Bistability in a Class of Genetic Circuits

PubMed Central

Zhang, Jiajun; Yuan, Zhanjiang; Li, Han-Xiong; Zhou, Tianshou

2010-01-01

Understanding the relationship between genotype and phenotype is a challenge in systems biology. An interesting yet related issue is why a particular circuit topology is present in a cell when the same function can supposedly be obtained from an alternative architecture. Here we analyzed two topologically equivalent genetic circuits of coupled positive and negative feedback loops, named NAT and ALT circuits, respectively. The computational search for the oscillation volume of the entire biologically reasonable parameter region through large-scale random samplings shows that the NAT circuit exhibits a distinctly larger fraction of the oscillatory region than the ALT circuit. Such a global robustness difference between two circuits is supplemented by analyzing local robustness, including robustness to parameter perturbations and to molecular noise. In addition, detailed dynamical analysis shows that the molecular noise of both circuits can induce transient switching of the different mechanism between a stable steady state and a stable limit cycle. Our investigation on robustness and dynamics through examples provides insights into the relationship between network architecture and its function. PMID:20712986

A programming language for composable DNA circuits.

PubMed

Phillips, Andrew; Cardelli, Luca

2009-08-06

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

PubMed

Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

2014-03-01

Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.

Visual Circuit Development Requires Patterned Activity Mediated by Retinal Acetylcholine Receptors

PubMed Central

Burbridge, Timothy J.; Xu, Hong-Ping; Ackman, James B.; Ge, Xinxin; Zhang, Yueyi; Ye, Mei-Jun; Zhou, Z. Jimmy; Xu, Jian; Contractor, Anis; Crair, Michael C.

2014-01-01

SUMMARY The elaboration of nascent synaptic connections into highly ordered neural circuits is an integral feature of the developing vertebrate nervous system. In sensory systems, patterned spontaneous activity before the onset of sensation is thought to influence this process, but this conclusion remains controversial largely due to the inherent difficulty recording neural activity in early development. Here, we describe novel genetic and pharmacological manipulations of spontaneous retinal activity, assayed in vivo, that demonstrate a causal link between retinal waves and visual circuit refinement. We also report a de-coupling of downstream activity in retinorecipient regions of the developing brain after retinal wave disruption. Significantly, we show that the spatiotemporal characteristics of retinal waves affect the development of specific visual circuits. These results conclusively establish retinal waves as necessary and instructive for circuit refinement in the developing nervous system and reveal how neural circuits adjust to altered patterns of activity prior to experience. PMID:25466916

The Complexity of Dynamics in Small Neural Circuits

PubMed Central

Panzeri, Stefano

2016-01-01

Mean-field approximations are a powerful tool for studying large neural networks. However, they do not describe well the behavior of networks composed of a small number of neurons. In this case, major differences between the mean-field approximation and the real behavior of the network can arise. Yet, many interesting problems in neuroscience involve the study of mesoscopic networks composed of a few tens of neurons. Nonetheless, mathematical methods that correctly describe networks of small size are still rare, and this prevents us to make progress in understanding neural dynamics at these intermediate scales. Here we develop a novel systematic analysis of the dynamics of arbitrarily small networks composed of homogeneous populations of excitatory and inhibitory firing-rate neurons. We study the local bifurcations of their neural activity with an approach that is largely analytically tractable, and we numerically determine the global bifurcations. We find that for strong inhibition these networks give rise to very complex dynamics, caused by the formation of multiple branching solutions of the neural dynamics equations that emerge through spontaneous symmetry-breaking. This qualitative change of the neural dynamics is a finite-size effect of the network, that reveals qualitative and previously unexplored differences between mesoscopic cortical circuits and their mean-field approximation. The most important consequence of spontaneous symmetry-breaking is the ability of mesoscopic networks to regulate their degree of functional heterogeneity, which is thought to help reducing the detrimental effect of noise correlations on cortical information processing. PMID:27494737

The Implementation and Evaluation of a Project-Oriented Problem-Based Learning Module in a First Year Engineering Programme

ERIC Educational Resources Information Center

McLoone, Seamus C.; Lawlor, Bob J.; Meehan, Andrew R.

2016-01-01

This paper describes how a circuits-based project-oriented problem-based learning educational model was integrated into the first year of a Bachelor of Engineering in Electronic Engineering programme at Maynooth University, Ireland. While many variations of problem based learning exist, the presented model is closely aligned with the model used in…

DC isolation and protection system and circuit

NASA Technical Reports Server (NTRS)

Wagner, Charles A. (Inventor); Kellogg, Gary V. (Inventor)

1991-01-01

A precision analog electronic circuit that is capable of sending accurate signals to an external device that has hostile electric characteristics, including the presence of very large common mode voltages. The circuit is also capable of surviving applications of normal mode overvoltages of up to 120 VAC/VDC for unlimited periods of time without damage or degradation. First, the circuit isolates the DC signal output from the computer. Means are then provided for amplifying the isolated DC signal. Further means are provided for stabilizing and protecting the isolating and amplifying means, and the isolated and amplified DC signal which is output to the external device, against overvoltages and overcurrents.

NbN A/D Conversion of IR Focal Plane Sensor Signal at 10 K

NASA Technical Reports Server (NTRS)

Eaton, L.; Durand, D.; Sandell, R.; Spargo, J.; Krabach, T.

1994-01-01

We are implementing a 12 bit SFQ counting ADC with parallel-to-serial readout using our established 10 K NbN capability. This circuit provides a key element of the analog signal processor (ASP) used in large infrared focal plane arrays. The circuit processes the signal data stream from a Si:As BIB detector array. A 10 mega samples per second (MSPS) pixel data stream flows from the chip at a 120 megabit bit rate in a format that is compatible with other superconductive time dependent processor (TDP) circuits being developed. We will discuss our planned ASP demonstration, the circuit design, and test results.

Automated Visual Inspection Of Integrated Circuits

NASA Astrophysics Data System (ADS)

Noppen, G.; Oosterlinck, Andre J.

1989-07-01

One of the major application fields of image processing techniques is the 'visual inspection'. For a number of rea-sons, the automated visual inspection of Integrated Circuits (IC's) has drawn a lot of attention. : Their very strict design makes them very suitable for an automated inspection. : There is already a lot of experience in the comparable Printed Circuit Board (PCB) and mask inspection. : The mechanical handling of wafers and dice is already an established technology. : Military and medical IC's should be a 100 % failproof. : IC inspection gives a high and allinost immediate payback. In this paper we wil try to give an outline of the problems involved in IC inspection, and the algorithms and methods used to overcome these problems. We will not go into de-tail, but we will try to give a general understanding. Our attention will go to the following topics. : An overview of the inspection process, with an emphasis on the second visual inspection. : The problems encountered in IC inspection, as opposed to the comparable PCB and mask inspection. : The image acquisition devices that can be used to obtain 'inspectable' images. : A general overview of the algorithms that can be used. : A short description of the algorithms developed at the ESAT-MI2 division of the katholieke Universiteit Leuven.

Uncovering the Problem-Solving Process: Cued Retrospective Reporting Versus Concurrent and Retrospective Reporting

ERIC Educational Resources Information Center

van Gog, Tamara; Paas, Fred; Merrienboer, Jeroen J. G.; Witte, Puk

2005-01-01

This study investigated the amounts of problem-solving process information ("action," "why," "how," and "metacognitive") elicited by means of concurrent, retrospective, and cued retrospective reporting. In a within-participants design, 26 participants completed electrical circuit troubleshooting tasks under different reporting conditions. The…

Phosphodiesterase inhibition and modulation of corticostriatal and hippocampal circuits: Clinical overview and translational considerations.

PubMed

Heckman, P R A; Blokland, A; Bollen, E P P; Prickaerts, J

2018-04-01

The corticostriatal and hippocampal circuits contribute to the neurobiological underpinnings of several neuropsychiatric disorders, including Alzheimer's disease, Parkinson's disease and schizophrenia. Based on biological function, these circuits can be clustered into motor circuits, associative/cognitive circuits and limbic circuits. Together, dysfunctions in these circuits produce the wide range of symptoms observed in related neuropsychiatric disorders. Intracellular signaling in these circuits is largely mediated through the cyclic adenosine monophosphate (cAMP)/protein kinase A (PKA) pathway with an additional role for the cyclic guanosine monophosphate (cGMP)/ protein kinase G (PKG) pathway, both of which can be regulated by phosphodiesterase inhibitors (PDE inhibitors). Through their effects on cAMP response element-binding protein (CREB) and Dopamine- and cAMP-Regulated PhosphoProtein MR 32 kDa (DARPP-32), cyclic nucleotide pathways are involved in synaptic transmission, neuron excitability, neuroplasticity and neuroprotection. In this clinical review, we provide an overview of the current clinical status, discuss the general mechanism of action of PDE inhibitors in relation to the corticostriatal and hippocampal circuits and consider several translational challenges. Copyright © 2018 The Authors. Published by Elsevier Ltd.. All rights reserved.

Modelling Fine Scale Movement Corridors for the Tricarinate Hill Turtle

NASA Astrophysics Data System (ADS)

Mondal, I.; Kumar, R. S.; Habib, B.; Talukdar, G.

2016-06-01

Habitat loss and the destruction of habitat connectivity can lead to species extinction by isolation of population. Identifying important habitat corridors to enhance habitat connectivity is imperative for species conservation by preserving dispersal pattern to maintain genetic diversity. Circuit theory is a novel tool to model habitat connectivity as it considers habitat as an electronic circuit board and species movement as a certain amount of current moving around through different resistors in the circuit. Most studies involving circuit theory have been carried out at small scales on large ranging animals like wolves or pumas, and more recently on tigers. This calls for a study that tests circuit theory at a large scale to model micro-scale habitat connectivity. The present study on a small South-Asian geoemydid, the Tricarinate Hill-turtle (Melanochelys tricarinata), focuses on habitat connectivity at a very fine scale. The Tricarinate has a small body size (carapace length: 127-175 mm) and home range (8000-15000 m2), with very specific habitat requirements and movement patterns. We used very high resolution Worldview satellite data and extensive field observations to derive a model of landscape permeability at 1 : 2,000 scale to suit the target species. Circuit theory was applied to model potential corridors between core habitat patches for the Tricarinate Hill-turtle. The modelled corridors were validated by extensive ground tracking data collected using thread spool technique and found to be functional. Therefore, circuit theory is a promising tool for accurately identifying corridors, to aid in habitat studies of small species.

Design and simulation of optoelectronic complementary dual neural elements for realizing a family of normalized vector 'equivalence-nonequivalence' operations

NASA Astrophysics Data System (ADS)

Krasilenko, Vladimir G.; Nikolsky, Aleksandr I.; Lazarev, Alexander A.; Magas, Taras E.

2010-04-01

Equivalence models (EM) advantages of neural networks (NN) are shown in paper. EMs are based on vectormatrix procedures with basic operations of continuous neurologic: normalized vector operations "equivalence", "nonequivalence", "autoequivalence", "autononequivalence". The capacity of NN on the basis of EM and of its modifications, including auto-and heteroassociative memories for 2D images, exceeds in several times quantity of neurons. Such neuroparadigms are very perspective for processing, recognition, storing large size and strongly correlated images. A family of "normalized equivalence-nonequivalence" neuro-fuzzy logic operations on the based of generalized operations fuzzy-negation, t-norm and s-norm is elaborated. A biologically motivated concept and time pulse encoding principles of continuous logic photocurrent reflexions and sample-storage devices with pulse-width photoconverters have allowed us to design generalized structures for realization of the family of normalized linear vector operations "equivalence"-"nonequivalence". Simulation results show, that processing time in such circuits does not exceed units of micro seconds. Circuits are simple, have low supply voltage (1-3 V), low power consumption (milliwatts), low levels of input signals (microwatts), integrated construction, satisfy the problem of interconnections and cascading.

System theoretic models for high density VLSI structures

NASA Astrophysics Data System (ADS)

Dickinson, Bradley W.; Hopkins, William E., Jr.

This research project involved the development of mathematical models for analysis, synthesis, and simulation of large systems of interacting devices. The work was motivated by problems that may become important in high density VLSI chips with characteristic feature sizes less than 1 micron: it is anticipated that interactions of neighboring devices will play an important role in the determination of circuit properties. It is hoped that the combination of high device densities and such local interactions can somehow be exploited to increase circuit speed and to reduce power consumption. To address these issues from the point of view of system theory, research was pursued in the areas of nonlinear and stochastic systems and into neural network models. Statistical models were developed to characterize various features of the dynamic behavior of interacting systems. Random process models for studying the resulting asynchronous modes of operation were investigated. The local interactions themselves may be modeled as stochastic effects. The resulting behavior was investigated through the use of various scaling limits, and by a combination of other analytical and simulation techniques. Techniques arising in a variety of disciplines where models of interaction were formulated and explored were considered and adapted for use.

Brain-state invariant thalamo-cortical coordination revealed by non-linear encoders.

PubMed

Viejo, Guillaume; Cortier, Thomas; Peyrache, Adrien

2018-03-01

Understanding how neurons cooperate to integrate sensory inputs and guide behavior is a fundamental problem in neuroscience. A large body of methods have been developed to study neuronal firing at the single cell and population levels, generally seeking interpretability as well as predictivity. However, these methods are usually confronted with the lack of ground-truth necessary to validate the approach. Here, using neuronal data from the head-direction (HD) system, we present evidence demonstrating how gradient boosted trees, a non-linear and supervised Machine Learning tool, can learn the relationship between behavioral parameters and neuronal responses with high accuracy by optimizing the information rate. Interestingly, and unlike other classes of Machine Learning methods, the intrinsic structure of the trees can be interpreted in relation to behavior (e.g. to recover the tuning curves) or to study how neurons cooperate with their peers in the network. We show how the method, unlike linear analysis, reveals that the coordination in thalamo-cortical circuits is qualitatively the same during wakefulness and sleep, indicating a brain-state independent feed-forward circuit. Machine Learning tools thus open new avenues for benchmarking model-based characterization of spike trains.

Brain-state invariant thalamo-cortical coordination revealed by non-linear encoders

PubMed Central

Cortier, Thomas; Peyrache, Adrien

2018-01-01

Understanding how neurons cooperate to integrate sensory inputs and guide behavior is a fundamental problem in neuroscience. A large body of methods have been developed to study neuronal firing at the single cell and population levels, generally seeking interpretability as well as predictivity. However, these methods are usually confronted with the lack of ground-truth necessary to validate the approach. Here, using neuronal data from the head-direction (HD) system, we present evidence demonstrating how gradient boosted trees, a non-linear and supervised Machine Learning tool, can learn the relationship between behavioral parameters and neuronal responses with high accuracy by optimizing the information rate. Interestingly, and unlike other classes of Machine Learning methods, the intrinsic structure of the trees can be interpreted in relation to behavior (e.g. to recover the tuning curves) or to study how neurons cooperate with their peers in the network. We show how the method, unlike linear analysis, reveals that the coordination in thalamo-cortical circuits is qualitatively the same during wakefulness and sleep, indicating a brain-state independent feed-forward circuit. Machine Learning tools thus open new avenues for benchmarking model-based characterization of spike trains. PMID:29565979

Multi-100 kW: Planar low cost solar array development

NASA Technical Reports Server (NTRS)

1982-01-01

The applicability of selected low cost options to solar array blanket design was studied by fabricating representative modules and submitting them to thermal cycle environment. Large area (5.9 x 5.9 cm) solar cells of 3 varieties were purchased: (1) Standard wraparound, (2) Copper contacts substituted for the conventional Titanium-Palladium-Silver, and (3) Standard wraparound except with gridded back contact instead of continuous metallization. The baseline cell was purchased to compare fabrication cost and to serve as a control cell during test evaluation of the other two cells. All cells were assembled into either substrate modules where the cell is individually filtered and welded to an integrated Kapton-copper circuit or into a superstrate configuration with 4 cells jointly adhered to a single sheet of microsheet and then welded to the integrated Kapton-copper circuit. Cell quality, particularly in the metallization of contacts, was less than desired. Problems were encountered with copper metallization in laying down a barrier metal which would ohmically bond to the silicon. The cells received were shunted (sintered) or with low contact pull strength (non-sintered), thus leading to the decision to solder rather than weld the copper cells to the Kapton substrate.

Neuromorphic Silicon Neuron Circuits

PubMed Central

Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

2011-01-01

Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

A clocking discipline for two-phase digital integrated circuits

NASA Astrophysics Data System (ADS)

Noice, D. C.

1983-09-01

Sooner or later a designer of digital circuits must face the problem of timing verification so he can avoid errors caused by clock skew, critical races, and hazards. Unlike previous verification methods, such as timing simulation and timing analysis, the approach presented here guarantees correct operation despite uncertainty about delays in the circuit. The result is a clocking discipline that deals with timing abstractions only. It is not based on delay calculations; it is only concerned with the correct, synchronous operation at some clock rate. Accordingly, it may be used earlier in the design cycle, which is particularly important to integrated circuit designs. The clocking discipline consists of a notation of clocking types, and composition rules for using the types. Together, the notation and rules define a formal theory of two phase clocking. The notation defines the names and exact characteristics for different signals that are used in a two phase digital system. The notation makes it possible to develop rules for propagating the clocking types through particular circuits.

Accurate reliability analysis method for quantum-dot cellular automata circuits

NASA Astrophysics Data System (ADS)

Cui, Huanqing; Cai, Li; Wang, Sen; Liu, Xiaoqiang; Yang, Xiaokuo

2015-10-01

Probabilistic transfer matrix (PTM) is a widely used model in the reliability research of circuits. However, PTM model cannot reflect the impact of input signals on reliability, so it does not completely conform to the mechanism of the novel field-coupled nanoelectronic device which is called quantum-dot cellular automata (QCA). It is difficult to get accurate results when PTM model is used to analyze the reliability of QCA circuits. To solve this problem, we present the fault tree models of QCA fundamental devices according to different input signals. After that, the binary decision diagram (BDD) is used to quantitatively investigate the reliability of two QCA XOR gates depending on the presented models. By employing the fault tree models, the impact of input signals on reliability can be identified clearly and the crucial components of a circuit can be found out precisely based on the importance values (IVs) of components. So this method is contributive to the construction of reliable QCA circuits.

Dual Transformer Model based on Standard Circuit Elements for the Study of Low- and Mid-frequency Transients

NASA Astrophysics Data System (ADS)

Jazebi, Saeed

This thesis is a step forward toward achieving the final objective of creating a fully dual model for transformers including eddy currents and nonlinearities of the iron core using the fundamental electrical components already available in the EMTP-type programs. The model is effective for the study of the performance of transformers during power system transients. This is very important for transformer designers, because the insulation of transformers is determined with the overvoltages caused by lightning or switching operations. There are also internally induced transients that occur when a switch is actuated. For example switching actions for reconfiguration of distribution systems that offers economic advantages, or protective actions to clear faults and large short-circuit currents. Many of the smart grid concepts currently under development by many utilities rely heavily on switching to optimize resources that produce transients in the system. On the other hand, inrush currents produce mechanical forces which deform transformer windings and cause malfunction of the differential protection. Also, transformer performance under ferroresonance and geomagnetic induced currents are necessary to study. In this thesis, a physically consistent dual model applicable to single-phase two-winding transformers is proposed. First, the topology of a dual electrical equivalent circuit is obtained from the direct application of the principle of duality. Then, the model parameters are computed considering the variations of the transformer electromagnetic behavior under various operating conditions. Current modeling techniques use different topological models to represent diverse transient situations. The reversible model proposed in this thesis unifies the terminal and topological equivalent circuits. The model remains invariable for all low-frequency transients including deep saturation conditions driven from any of the two windings. The very high saturation region of the iron core magnetizing characteristic is modified with the accurate measurement of the air-core inductance. The air-core inductance is measured using a non-ideal low-power rectifier. Its dc output serves to drive the transformer into deep saturation, and its ripple provides low-amplitude variable excitation. The principal advantage of this method is its simplicity. To model the eddy current effects in the windings, a novel equivalent circuit is proposed. The circuit is derived from the principle of duality and therefore, matches the electromagnetic physical behavior of the transformer windings. It properly models the flux paths and current distribution from dc to MHz. The model is synthesized from a non-uniform concentric discretization of the windings. Concise guidelines are given to optimally calculate the width of the sub-divisions for various transient simulations. To compute the circuit parameters only information about the geometry of the windings and about their material properties is needed. The calculation of the circuit parameters does not require an iterative process. Therefore, the parameters are always real, positive, and free from convergence problems. The proposed model is tested with single-phase transformers for the calculation of magnetizing inrush currents, series ferroresonance, and Geomagnetic Induced Currents (GIC). The electromagnetic transient response of the model is compared to laboratory measurements for validation. Also, 3D finite element simulations are used to validate the electromagnetic behavior of the transformer model. Large manufacturer of transformers, power system designers, and electrical utility companies can benefit from the new model. It simplifies the design and optimization of the transformers' insulation, thereby reducing cost, and enhancing reliability of the system. The model could also be used for inrush current and differential protection studies, geomagnetic induced current studies, harmonic penetration studies, and switching transient studies.

A large-scale circuit mechanism for hierarchical dynamical processing in the primate cortex

PubMed Central

Chaudhuri, Rishidev; Knoblauch, Kenneth; Gariel, Marie-Alice; Kennedy, Henry; Wang, Xiao-Jing

2015-01-01

We developed a large-scale dynamical model of the macaque neocortex, which is based on recently acquired directed- and weighted-connectivity data from tract-tracing experiments, and which incorporates heterogeneity across areas. A hierarchy of timescales naturally emerges from this system: sensory areas show brief, transient responses to input (appropriate for sensory processing), whereas association areas integrate inputs over time and exhibit persistent activity (suitable for decision-making and working memory). The model displays multiple temporal hierarchies, as evidenced by contrasting responses to visual versus somatosensory stimulation. Moreover, slower prefrontal and temporal areas have a disproportionate impact on global brain dynamics. These findings establish a circuit mechanism for “temporal receptive windows” that are progressively enlarged along the cortical hierarchy, suggest an extension of time integration in decision-making from local to large circuits, and should prompt a re-evaluation of the analysis of functional connectivity (measured by fMRI or EEG/MEG) by taking into account inter-areal heterogeneity. PMID:26439530

STICAP: A linear circuit analysis program with stiff systems capability. Volume 1: Theory manual. [network analysis

NASA Technical Reports Server (NTRS)

Cooke, C. H.

1975-01-01

STICAP (Stiff Circuit Analysis Program) is a FORTRAN 4 computer program written for the CDC-6400-6600 computer series and SCOPE 3.0 operating system. It provides the circuit analyst a tool for automatically computing the transient responses and frequency responses of large linear time invariant networks, both stiff and nonstiff (algorithms and numerical integration techniques are described). The circuit description and user's program input language is engineer-oriented, making simple the task of using the program. Engineering theories underlying STICAP are examined. A user's manual is included which explains user interaction with the program and gives results of typical circuit design applications. Also, the program structure from a systems programmer's viewpoint is depicted and flow charts and other software documentation are given.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.

The Modification of HOMER Software Application to Provide the United States Marine Corps with an Energy Planning Tool

DTIC Science & Technology

2012-12-01

circuit used to discharge LiFePO4 batteries. .................84  Figure 33.  The PSPICE model of our constant current circuit...Ion Battery LiFePO4 Lithium Iron Phosphate xviii MEP Mobile Electric Power MP Maximum Power MPPT Maximum Power Point Tracker NASA National...GREENS). GREENS has eight large 200-W solar panels, four Lithium Iron Phosphate ( LiFePO4 ) batteries, and an integrated controller. GREENS is not

Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

PubMed

Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

2015-10-14

We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

Combining Flux Balance and Energy Balance Analysis for Large-Scale Metabolic Network: Biochemical Circuit Theory for Analysis of Large-Scale Metabolic Networks

NASA Technical Reports Server (NTRS)

Beard, Daniel A.; Liang, Shou-Dan; Qian, Hong; Biegel, Bryan (Technical Monitor)

2001-01-01

Predicting behavior of large-scale biochemical metabolic networks represents one of the greatest challenges of bioinformatics and computational biology. Approaches, such as flux balance analysis (FBA), that account for the known stoichiometry of the reaction network while avoiding implementation of detailed reaction kinetics are perhaps the most promising tools for the analysis of large complex networks. As a step towards building a complete theory of biochemical circuit analysis, we introduce energy balance analysis (EBA), which compliments the FBA approach by introducing fundamental constraints based on the first and second laws of thermodynamics. Fluxes obtained with EBA are thermodynamically feasible and provide valuable insight into the activation and suppression of biochemical pathways.

How to Measure Qualitative Understanding of DC-Circuit Phenomena - Taking a Closer Look at the External Representations of 9-Year-Olds

NASA Astrophysics Data System (ADS)

Kallunki, Veera

2013-04-01

Pupils' qualitative understanding of DC-circuit phenomena is reported to be weak. In numerous research reports lists of problems in understanding the functioning of simple DC-circuits have been presented. So-called mental model surveys have uncovered difficulties in different age groups, and in different phases of instruction. In this study, the concept of qualitative understanding, and the content or position of reported mental models of DC-circuit phenomena are discussed. On the grounds of this review, new tools for investigating qualitative understanding and analysing external representations of DC-circuit phenomena are presented. According to this approach, the external representations of DC-circuit phenomena that describe pupils' expressed conceptions of the topic should include both empirical-based models and theoretical explanations. In the empirical part of this study , third-graders (9-year-olds) learning DC-circuit phenomena in a comprehensive school in a small group were scrutinised. The focus of the study is the external representations manifested in the talk of the small group. The study challenges earlier studies, which claim that children exhibit a wide range of qualitative difficulties when learning DC-circuit phenomena. In this study it will be shown that even in the case of abstract subject matter like DC-circuit phenomena, small groups that highlight empirical-based modelling and activate talk can be a fruitful learning environment, where pupils' qualitative understanding really develops. Thus, the study proposes taking a closer look at pupils' external representations concerning DC-circuit phenomena.

A Simple Model of Circuit Design.

DTIC Science & Technology

1980-05-01

mathematicians who discover mathematical ideas (i.cnat>, programmers who write code <Manna> <Barstow>, physicists who solve mechanics problems <de Kiecr-l...rules and shows how - they result in the design of circuits. ’l’he design rules must not only capture the purely mathematical constralints given by VICs...K VI.. *? and KCI, but also how those constraints can implement mechanism. Mathematical constraints tell us an amplifier’s input and output voltages

DTO-675: Voice Control of the Closed Circuit Television System

NASA Technical Reports Server (NTRS)

Salazar, George; Gaston, Darilyn M.; Haynes, Dena S.

1996-01-01

This report presents the results of the Detail Test Object (DTO)-675 "Voice Control of the Closed Circuit Television (CCTV)" system. The DTO is a follow-on flight of the Voice Command System (VCS) that flew as a secondary payload on STS-41. Several design changes were made to the VCS for the STS-78 mission. This report discusses those design changes, the data collected during the mission, recognition problems encountered, and findings.

A Laboratory Exercise with Related Rates.

ERIC Educational Resources Information Center

Sworder, Steven C.

A laboratory experiment, based on a simple electric circuit that can be used to demonstrate the existence of real-world "related rates" problems, is outlined and an equation for voltage across the capacitor terminals during discharge is derived. The necessary materials, setup methods, and experimental problems are described. A student laboratory…

Distributed computation: the new wave of synthetic biology devices.

PubMed

Macía, Javier; Posas, Francesc; Solé, Ricard V

2012-06-01

Synthetic biology (SB) offers a unique opportunity for designing complex molecular circuits able to perform predefined functions. But the goal of achieving a flexible toolbox of reusable molecular components has been shown to be limited due to circuit unpredictability, incompatible parts or random fluctuations. Many of these problems arise from the challenges posed by engineering the molecular circuitry: multiple wires are usually difficult to implement reliably within one cell and the resulting systems cannot be reused in other modules. These problems are solved by means of a nonstandard approach to single cell devices, using cell consortia and allowing the output signal to be distributed among different cell types, which can be combined in multiple, reusable and scalable ways. Copyright © 2012 Elsevier Ltd. All rights reserved.

On-chip continuous-variable quantum entanglement

NASA Astrophysics Data System (ADS)

Masada, Genta; Furusawa, Akira

2016-09-01

Entanglement is an essential feature of quantum theory and the core of the majority of quantum information science and technologies. Quantum computing is one of the most important fruits of quantum entanglement and requires not only a bipartite entangled state but also more complicated multipartite entanglement. In previous experimental works to demonstrate various entanglement-based quantum information processing, light has been extensively used. Experiments utilizing such a complicated state need highly complex optical circuits to propagate optical beams and a high level of spatial interference between different light beams to generate quantum entanglement or to efficiently perform balanced homodyne measurement. Current experiments have been performed in conventional free-space optics with large numbers of optical components and a relatively large-sized optical setup. Therefore, they are limited in stability and scalability. Integrated photonics offer new tools and additional capabilities for manipulating light in quantum information technology. Owing to integrated waveguide circuits, it is possible to stabilize and miniaturize complex optical circuits and achieve high interference of light beams. The integrated circuits have been firstly developed for discrete-variable systems and then applied to continuous-variable systems. In this article, we review the currently developed scheme for generation and verification of continuous-variable quantum entanglement such as Einstein-Podolsky-Rosen beams using a photonic chip where waveguide circuits are integrated. This includes balanced homodyne measurement of a squeezed state of light. As a simple example, we also review an experiment for generating discrete-variable quantum entanglement using integrated waveguide circuits.

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

NASA Technical Reports Server (NTRS)

Simons, Rainee N.; Goverdhanam, Kavita; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

2001-01-01

In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Tuition and Memory: mental models and cognitive processing in Japanese children's work on d.c. electrical circuits

NASA Astrophysics Data System (ADS)

Asami, Noriaki; King, Julien; Monk, Martin

2000-02-01

This paper looks at the familiar problem of students' understanding of elementary electrical circuits from a much neglected point of view. It is conjectured that the patterning commonly found in students' ideas might have its roots in the cognitive processing with which students operate their mental models of d.c. electrical circuits. The data are new and come from Japanese 10-11 year olds living in the UK. Progressive analysis of these students' answers to a six item test shows that the percentage of students operating particular mental models, following tuition, matches the percentages one might expect from a knowledge of their cognitive processing.

A power-efficient analog integrated circuit for amplification and detection of neural signals.

PubMed

Borghi, T; Bonfanti, A; Gusmeroli, R; Zambra, G; Spinelli, A S

2008-01-01

We present a neural amplifier that optimizes the trade-off between power consumption and noise performance down to the best so far reported. In the perspective of realizing a fully autonomous implantable system we also address the problem of spike detection by using a new simple algorithm and we discuss the implementation with analog integrated circuits. Implemented in 0.35-microm CMOS technology and with total current consumption of about 20 microA, the whole circuit occupies an area of 0.18 mm(2). Reduced power consumption and small area make it suited to be used in chronic multichannel recording systems for neural prosthetics and neuroscience experiments.

Optimal ancilla-free Pauli+V circuits for axial rotations

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blass, Andreas; Bocharov, Alex; Gurevich, Yuri

We address the problem of optimal representation of single-qubit rotations in a certain unitary basis consisting of the so-called V gates and Pauli matrices. The V matrices were proposed by Lubotsky, Philips, and Sarnak [Commun. Pure Appl. Math. 40, 401–420 (1987)] as a purely geometric construct in 1987 and recently found applications in quantum computation. They allow for exceptionally simple quantum circuit synthesis algorithms based on quaternionic factorization. We adapt the deterministic-search technique initially proposed by Ross and Selinger to synthesize approximating Pauli+V circuits of optimal depth for single-qubit axial rotations. Our synthesis procedure based on simple SL{sub 2}(ℤ) geometrymore » is almost elementary.« less

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Integrating anatomy and function for zebrafish circuit analysis.

PubMed

Arrenberg, Aristides B; Driever, Wolfgang

2013-01-01

Due to its transparency, virtually every brain structure of the larval zebrafish is accessible to light-based interrogation of circuit function. Advanced stimulation techniques allow the activation of optogenetic actuators at different resolution levels, and genetically encoded calcium indicators report the activity of a large proportion of neurons in the CNS. Large datasets result and need to be analyzed to identify cells that have specific properties-e.g., activity correlation to sensory stimulation or behavior. Advances in three-dimensional (3D) functional mapping in zebrafish are promising; however, the mere coordinates of implicated neurons are not sufficient. To comprehensively understand circuit function, these functional maps need to be placed into the proper context of morphological features and projection patterns, neurotransmitter phenotypes, and key anatomical landmarks. We discuss the prospect of merging functional and anatomical data in an integrated atlas from the perspective of our work on long-range dopaminergic neuromodulation and the oculomotor system. We propose that such a resource would help researchers to surpass current hurdles in circuit analysis to achieve an integrated understanding of anatomy and function.

Organization of Functional Long-Range Circuits Controlling the Activity of Serotonergic Neurons in the Dorsal Raphe Nucleus.

PubMed

Zhou, Li; Liu, Ming-Zhe; Li, Qing; Deng, Juan; Mu, Di; Sun, Yan-Gang

2017-03-21

Serotonergic neurons play key roles in various biological processes. However, circuit mechanisms underlying tight control of serotonergic neurons remain largely unknown. Here, we systematically investigated the organization of long-range synaptic inputs to serotonergic neurons and GABAergic neurons in the dorsal raphe nucleus (DRN) of mice with a combination of viral tracing, slice electrophysiological, and optogenetic techniques. We found that DRN serotonergic neurons and GABAergic neurons receive largely comparable synaptic inputs from six major upstream brain areas. Upon further analysis of the fine functional circuit structures, we found both bilateral and ipsilateral patterns of topographic connectivity in the DRN for the axons from different inputs. Moreover, the upstream brain areas were found to bidirectionally control the activity of DRN serotonergic neurons by recruiting feedforward inhibition or via a push-pull mechanism. Our study provides a framework for further deciphering the functional roles of long-range circuits controlling the activity of serotonergic neurons in the DRN. Copyright © 2017 The Author(s). Published by Elsevier Inc. All rights reserved.

Gain-Compensating Circuit For NDE and Ultrasonics

NASA Technical Reports Server (NTRS)

Kushnick, Peter W.

1987-01-01

High-frequency gain-compensating circuit designed for general use in nondestructive evaluation and ultrasonic measurements. Controls gain of ultrasonic receiver as function of time to aid in measuring attenuation of samples with high losses; for example, human skin and graphite/epoxy composites. Features high signal-to-noise ratio, large signal bandwidth and large dynamic range. Control bandwidth of 5 MHz ensures accuracy of control signal. Currently being used for retrieval of more information from ultrasonic signals sent through composite materials that have high losses, and to measure skin-burn depth in humans.

High-frequency output characteristics of AlGaAs/GaAs heterojunction bipolar transistors for large-signal applications

NASA Astrophysics Data System (ADS)

Chen, J.; Gao, G. B.; Ünlü, M. S.; Morkoç, H.

1991-11-01

High-frequency ic- vce output characteristics of bipolar transistors, derived from calculated device cutoff frequencies, are reported. The generation of high-frequency output characteristics from device design specifications represents a novel bridge between microwave circuit design and device design: the microwave performance of simulated device structures can be analyzed, or tailored transistor device structures can be designed to fit specific circuit applications. The details of our compact transistor model are presented, highlighting the high-current base-widening (Kirk) effect. The derivation of the output characteristics from the modeled cutoff frequencies are then presented, and the computed characteristics of an AlGaAs/GaAs heterojunction bipolar transistor operating at 10 GHz are analyzed. Applying the derived output characteristics to microwave circuit design, we examine large-signal class A and class B amplification.

Multi-mode ultra-strong coupling (I): spectroscopic experiments using a vacuum-gap transmon circuit architecture

NASA Astrophysics Data System (ADS)

Bosman, Sal J.; Gely, Mario F.; Singh, Vibhor; Bruno, Alessandro; Bothner, Daniel; Steele, Gary A.

In circuit QED, multi-mode extensions of the quantum Rabi model suffer from divergence problems. Here, we spectroscopically study multi-mode ultra-strong coupling using a transmon circuit architecture, which provides no clear guidelines on how many modes play a role in the dynamics of the system. As our transmon qubit, we employ a suspended island above the voltage anti-node of a λ / 4 coplanar microwave resonator, thereby realising a circuit where 88% of the qubit capacitance is formed by a vacuum-gap capacitor with the center conductor of the resonator. We measure vacuum Rabi splitting over multiple modes up to 2 GHz, reaching coupling ratios of g / ω = 0 . 18 , well within the ultra-strong coupling regime. We observe a qubit-mediated mode coupling, measurable up to the fifth mode at 38 GHz. Using a novel analytical quantum circuit model of this architecture, which includes all modes without introducing divergencies, we are able to fit the full spectrum and extract a vacuum fluctuations induced Bloch-Siegert shift of up to 62 MHz. This circuit architecture expands the versatility of the transmon technology platform and opens many possibilities in multi-mode physics in the ultra-strong coupling regime.

Mechanisms of interactive specialization and emergence of functional brain circuits supporting cognitive development in children

NASA Astrophysics Data System (ADS)

Battista, Christian; Evans, Tanya M.; Ngoon, Tricia J.; Chen, Tianwen; Chen, Lang; Kochalka, John; Menon, Vinod

2018-01-01

Cognitive development is thought to depend on the refinement and specialization of functional circuits over time, yet little is known about how this process unfolds over the course of childhood. Here we investigated growth trajectories of functional brain circuits and tested an interactive specialization model of neurocognitive development which posits that the refinement of task-related functional networks is driven by a shared history of co-activation between cortical regions. We tested this model in a longitudinal cohort of 30 children with behavioral and task-related functional brain imaging data at multiple time points spanning childhood and adolescence, focusing on the maturation of parietal circuits associated with numerical problem solving and learning. Hierarchical linear modeling revealed selective strengthening as well as weakening of functional brain circuits. Connectivity between parietal and prefrontal cortex decreased over time, while connectivity within posterior brain regions, including intra-hemispheric and inter-hemispheric parietal connectivity, as well as parietal connectivity with ventral temporal occipital cortex regions implicated in quantity manipulation and numerical symbol recognition, increased over time. Our study provides insights into the longitudinal maturation of functional circuits in the human brain and the mechanisms by which interactive specialization shapes children's cognitive development and learning.

Signal transduction in Mimosa pudica: biologically closed electrical circuits.

PubMed

Volkov, Alexander G; Foster, Justin C; Markin, Vladislav S

2010-05-01

Biologically closed electrical circuits operate over large distances in biological tissues. The activation of such circuits can lead to various physiological and biophysical responses. Here, we analyse the biologically closed electrical circuits of the sensitive plant Mimosa pudica Linn. using electrostimulation of a petiole or pulvinus by the charged capacitor method, and evaluate the equivalent electrical scheme of electrical signal transduction inside the plant. The discharge of a 100 microF capacitor in the pulvinus resulted in the downward fall of the petiole in a few seconds, if the capacitor was charged beforehand by a 1.5 V power supply. Upon disconnection of the capacitor from Ag/AgCl electrodes, the petiole slowly relaxed to the initial position. The electrical properties of the M. pudica were investigated, and an equivalent electrical circuit was proposed that explains the experimental data.

Engineering entropy-driven reactions and networks catalyzed by DNA.

PubMed

Zhang, David Yu; Turberfield, Andrew J; Yurke, Bernard; Winfree, Erik

2007-11-16

Artificial biochemical circuits are likely to play as large a role in biological engineering as electrical circuits have played in the engineering of electromechanical devices. Toward that end, nucleic acids provide a designable substrate for the regulation of biochemical reactions. However, it has been difficult to incorporate signal amplification components. We introduce a design strategy that allows a specified input oligonucleotide to catalyze the release of a specified output oligonucleotide, which in turn can serve as a catalyst for other reactions. This reaction, which is driven forward by the configurational entropy of the released molecule, provides an amplifying circuit element that is simple, fast, modular, composable, and robust. We have constructed and characterized several circuits that amplify nucleic acid signals, including a feedforward cascade with quadratic kinetics and a positive feedback circuit with exponential growth kinetics.

Effective algorithm for routing integral structures with twolayer switching

NASA Astrophysics Data System (ADS)

Nazarov, A. V.; Shakhnov, V. A.; Vlasov, A. I.; Novikov, A. N.

2018-05-01

The paper presents an algorithm for routing switching objects such as large-scale integrated circuits (LSICs) with two layers of metallization, embossed printed circuit boards, microboards with pairs of wiring layers on each side, and other similar constructs. The algorithm allows eliminating the effect of mutual blocking of routes in the classical wave algorithm by implementing a special circuit of digital wave motion in two layers of metallization, allowing direct intersections of all circuit conductors in a combined layer. However, information about the belonging of the topology elements to the circuits is sufficient for layering and minimizing the number of contact holes. In addition, the paper presents a specific example which shows that, in contrast to the known routing algorithms using a wave model, just one byte of memory per discrete of the work field is sufficient to implement the proposed algorithm.

Paper-like electronic displays: Large-area rubber-stamped plastic sheets of electronics and microencapsulated electrophoretic inks

PubMed Central

Rogers, John A.; Bao, Zhenan; Baldwin, Kirk; Dodabalapur, Ananth; Crone, Brian; Raju, V. R.; Kuck, Valerie; Katz, Howard; Amundson, Karl; Ewing, Jay; Drzaic, Paul

2001-01-01

Electronic systems that use rugged lightweight plastics potentially offer attractive characteristics (low-cost processing, mechanical flexibility, large area coverage, etc.) that are not easily achieved with established silicon technologies. This paper summarizes work that demonstrates many of these characteristics in a realistic system: organic active matrix backplane circuits (256 transistors) for large (≈5 × 5-inch) mechanically flexible sheets of electronic paper, an emerging type of display. The success of this effort relies on new or improved processing techniques and materials for plastic electronics, including methods for (i) rubber stamping (microcontact printing) high-resolution (≈1 μm) circuits with low levels of defects and good registration over large areas, (ii) achieving low leakage with thin dielectrics deposited onto surfaces with relief, (iii) constructing high-performance organic transistors with bottom contact geometries, (iv) encapsulating these transistors, (v) depositing, in a repeatable way, organic semiconductors with uniform electrical characteristics over large areas, and (vi) low-temperature (≈100°C) annealing to increase the on/off ratios of the transistors and to improve the uniformity of their characteristics. The sophistication and flexibility of the patterning procedures, high level of integration on plastic substrates, large area coverage, and good performance of the transistors are all important features of this work. We successfully integrate these circuits with microencapsulated electrophoretic “inks” to form sheets of electronic paper. PMID:11320233

Analog Binaural Circuits for Detecting and Locating Leaks

NASA Technical Reports Server (NTRS)

Hartley, Frank T.

2003-01-01

Very-large-scale integrated (VLSI) analog binaural signal-processing circuits have been proposed for use in detecting and locating leaks that emit noise in the ultrasonic frequency range. These circuits would be designed to function even in the presence of intense lower-frequency background noise that could include sounds associated with flow and pumping. Each of the proposed circuits would include the approximate electronic equivalent of a right and a left cochlea plus correlator circuits. A pair of transducers (microphones or accelerometers), corresponding to right and left ears, would provide the inputs to their respective cochleas from different locations (e.g., from different positions along a pipe). The correlation circuits plus some additional external circuits would determine the difference between the times of arrival of a common leak sound at the two transducers. Then the distance along the pipe from either transducer to the leak could be estimated from the time difference and the speed of sound along the pipe. If three or more pairs of transducers and cochlear/correlator circuits were available and could suitably be positioned, it should be possible to locate a leak in three dimensions by use of sound propagating through air.

Information Flow through a Model of the C. elegans Klinotaxis Circuit.

PubMed

Izquierdo, Eduardo J; Williams, Paul L; Beer, Randall D

2015-01-01

Understanding how information about external stimuli is transformed into behavior is one of the central goals of neuroscience. Here we characterize the information flow through a complete sensorimotor circuit: from stimulus, to sensory neurons, to interneurons, to motor neurons, to muscles, to motion. Specifically, we apply a recently developed framework for quantifying information flow to a previously published ensemble of models of salt klinotaxis in the nematode worm Caenorhabditis elegans. Despite large variations in the neural parameters of individual circuits, we found that the overall information flow architecture circuit is remarkably consistent across the ensemble. This suggests structural connectivity is not necessarily predictive of effective connectivity. It also suggests information flow analysis captures general principles of operation for the klinotaxis circuit. In addition, information flow analysis reveals several key principles underlying how the models operate: (1) Interneuron class AIY is responsible for integrating information about positive and negative changes in concentration, and exhibits a strong left/right information asymmetry. (2) Gap junctions play a crucial role in the transfer of information responsible for the information symmetry observed in interneuron class AIZ. (3) Neck motor neuron class SMB implements an information gating mechanism that underlies the circuit's state-dependent response. (4) The neck carries more information about small changes in concentration than about large ones, and more information about positive changes in concentration than about negative ones. Thus, not all directions of movement are equally informative for the worm. Each of these findings corresponds to hypotheses that could potentially be tested in the worm. Knowing the results of these experiments would greatly refine our understanding of the neural circuit underlying klinotaxis.

Finite Ground Coplanar (FGC) Waveguide: It's Characteristics and Advantages for Use in RF and Wireless Communication Circuits

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Katehi, Linda P. B.; Tentzeris, Emmanouil M.

1998-01-01

To solve many of the problems encountered when using conventional coplanar waveguide (CPW) with its semi-infinite ground planes, a new version of coplanar waveguide with electrically narrow ground planes has been developed. This new transmission line which we call Finite Ground Coplanar (FGC) waveguide has several advantages which make it a better transmission line for RF and wireless circuits. Since the ground planes are electrically narrow, spurious resonances created by the CPW ground planes and the metal carrier or package base are eliminated. In addition, lumped and distributed circuit elements may now be integrated into the ground strips in the same way as they traditionally have been integrated into the center conductor to realize novel circuit layouts that are smaller and have less parasitic reactance. Lastly, FGC is shown to have lower coupling between adjacent transmission lines than conventional CPW.

Efficient quantum walk on a quantum processor

PubMed Central

Qiang, Xiaogang; Loke, Thomas; Montanaro, Ashley; Aungskunsiri, Kanin; Zhou, Xiaoqi; O'Brien, Jeremy L.; Wang, Jingbo B.; Matthews, Jonathan C. F.

2016-01-01

The random walk formalism is used across a wide range of applications, from modelling share prices to predicting population genetics. Likewise, quantum walks have shown much potential as a framework for developing new quantum algorithms. Here we present explicit efficient quantum circuits for implementing continuous-time quantum walks on the circulant class of graphs. These circuits allow us to sample from the output probability distributions of quantum walks on circulant graphs efficiently. We also show that solving the same sampling problem for arbitrary circulant quantum circuits is intractable for a classical computer, assuming conjectures from computational complexity theory. This is a new link between continuous-time quantum walks and computational complexity theory and it indicates a family of tasks that could ultimately demonstrate quantum supremacy over classical computers. As a proof of principle, we experimentally implement the proposed quantum circuit on an example circulant graph using a two-qubit photonics quantum processor. PMID:27146471

Equivalent circuit and characteristic simulation of a brushless electrically excited synchronous wind power generator

NASA Astrophysics Data System (ADS)

Wang, Hao; Zhang, Fengge; Guan, Tao; Yu, Siyang

2017-09-01

A brushless electrically excited synchronous generator (BEESG) with a hybrid rotor is a novel electrically excited synchronous generator. The BEESG proposed in this paper is composed of a conventional stator with two different sets of windings with different pole numbers, and a hybrid rotor with powerful coupling capacity. The pole number of the rotor is different from those of the stator windings. Thus, an analysis method different from that applied to conventional generators should be applied to the BEESG. In view of this problem, the equivalent circuit and electromagnetic torque expression of the BEESG are derived on the basis of electromagnetic relation of the proposed generator. The generator is simulated and tested experimentally using the established equivalent circuit model. The experimental and simulation data are then analyzed and compared. Results show the validity of the equivalent circuit model.

Static DC to DC Power Conditioning-Active Ripple Filter, 1 MHZ DC to DC Conversion, and Nonlinear Analysis. Ph.D. Thesis; [voltage regulation and conversion circuitry for spacecraft power supplies

NASA Technical Reports Server (NTRS)

Sander, W. A., III

1973-01-01

Dc to dc static power conditioning systems on unmanned spacecraft have as their inputs highly fluctuating dc voltages which they condition to regulated dc voltages. These input voltages may be less than or greater than the desired regulated voltages. The design of two circuits which address specific problems in the design of these power conditioning systems and a nonlinear analysis of one of the circuits are discussed. The first circuit design is for a nondissipative active ripple filter which uses an operational amplifier to amplify and cancel the sensed ripple voltage. A dc to dc converter operating at a switching frequency of 1 MHz is the second circuit discussed. A nonlinear analysis of the type of dc to dc converter utilized in designing the 1 MHz converter is included.

Synchronisation and Circuit Realisation of Chaotic Hartley System

NASA Astrophysics Data System (ADS)

Varan, Metin; Akgül, Akif; Güleryüz, Emre; Serbest, Kasım

2018-06-01

Hartley chaotic system is topologically the simplest, but its dynamical behaviours are very rich and its synchronisation has not been seen in literature. This paper aims to introduce a simple chaotic system which can be used as alternative to classical chaotic systems in synchronisation fields. Time series, phase portraits, and bifurcation diagrams reveal the dynamics of the mentioned system. Chaotic Hartley model is also supported with electronic circuit model simulations. Its exponential dynamics are hard to realise on circuit model; this paper is the first in literature that handles such a complex modelling problem. Modelling, synchronisation, and circuit realisation of the Hartley system are implemented respectively in MATLAB-Simulink and ORCAD environments. The effectiveness of the applied synchronisation method is revealed via numerical methods, and the results are discussed. Retrieved results show that this complex chaotic system can be used in secure communication fields.

Low power, scalable multichannel high voltage controller

DOEpatents

Stamps, James Frederick [Livermore, CA; Crocker, Robert Ward [Fremont, CA; Yee, Daniel Dadwa [Dublin, CA; Dils, David Wright [Fort Worth, TX

2006-03-14

A low voltage control circuit is provided for individually controlling high voltage power provided over bus lines to a multitude of interconnected loads. An example of a load is a drive for capillary channels in a microfluidic system. Control is distributed from a central high voltage circuit, rather than using a number of large expensive central high voltage circuits to enable reducing circuit size and cost. Voltage is distributed to each individual load and controlled using a number of high voltage controller channel switches connected to high voltage bus lines. The channel switches each include complementary pull up and pull down photo isolator relays with photo isolator switching controlled from the central high voltage circuit to provide a desired bus line voltage. Switching of the photo isolator relays is further controlled in each channel switch using feedback from a resistor divider circuit to maintain the bus voltage swing within desired limits. Current sensing is provided using a switched resistive load in each channel switch, with switching of the resistive loads controlled from the central high voltage circuit.

Low power, scalable multichannel high voltage controller

DOEpatents

Stamps, James Frederick [Livermore, CA; Crocker, Robert Ward [Fremont, CA; Yee, Daniel Dadwa [Dublin, CA; Dils, David Wright [Fort Worth, TX

2008-03-25

A low voltage control circuit is provided for individually controlling high voltage power provided over bus lines to a multitude of interconnected loads. An example of a load is a drive for capillary channels in a microfluidic system. Control is distributed from a central high voltage circuit, rather than using a number of large expensive central high voltage circuits to enable reducing circuit size and cost. Voltage is distributed to each individual load and controlled using a number of high voltage controller channel switches connected to high voltage bus lines. The channel switches each include complementary pull up and pull down photo isolator relays with photo isolator switching controlled from the central high voltage circuit to provide a desired bus line voltage. Switching of the photo isolator relays is further controlled in each channel switch using feedback from a resistor divider circuit to maintain the bus voltage swing within desired limits. Current sensing is provided using a switched resistive load in each channel switch, with switching of the resistive loads controlled from the central high voltage circuit.

The circuit of polychromator for Experimental Advanced Superconducting Tokamak edge Thomson scattering diagnostic

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zang, Qing; Zhao, Junyu; Chen, Hui

2013-09-15

The detector circuit is the core component of filter polychromator which is used for scattering light analysis in Thomson scattering diagnostic, and is responsible for the precision and stability of a system. High signal-to-noise and stability are primary requirements for the diagnostic. Recently, an upgraded detector circuit for weak light detecting in Experimental Advanced Superconducting Tokamak (EAST) edge Thomson scattering system has been designed, which can be used for the measurement of large electron temperature (T{sub e}) gradient and low electron density (n{sub e}). In this new circuit, a thermoelectric-cooled avalanche photodiode with the aid circuit is involved for increasingmore » stability and enhancing signal-to-noise ratio (SNR), especially the circuit will never be influenced by ambient temperature. These features are expected to improve the accuracy of EAST Thomson diagnostic dramatically. Related mechanical construction of the circuit is redesigned as well for heat-sinking and installation. All parameters are optimized, and SNR is dramatically improved. The number of minimum detectable photons is only 10.« less

Genetically Encoded Catalytic Hairpin Assembly for Sensitive RNA Imaging in Live Cells.

PubMed

Mudiyanselage, Aruni P K K Karunanayake; Yu, Qikun; Leon-Duque, Mark A; Zhao, Bin; Wu, Rigumula; You, Mingxu

2018-06-26

DNA and RNA nanotechnology has been used for the development of dynamic molecular devices. In particular, programmable enzyme-free nucleic acid circuits, such as catalytic hairpin assembly, have been demonstrated as useful tools for bioanalysis and to scale up system complexity to an extent beyond current cellular genetic circuits. However, the intracellular functions of most synthetic nucleic acid circuits have been hindered by challenges in the biological delivery and degradation. On the other hand, genetically encoded and transcribed RNA circuits emerge as alternative powerful tools for long-term embedded cellular analysis and regulation. Herein, we reported a genetically encoded RNA-based catalytic hairpin assembly circuit for sensitive RNA imaging inside living cells. The split version of Broccoli, a fluorogenic RNA aptamer, was used as the reporter. One target RNA can catalytically trigger the fluorescence from tens-to-hundreds of Broccoli. As a result, target RNAs can be sensitively detected. We have further engineered our circuit to allow easy programming to image various target RNA sequences. This design principle opens the arena for developing a large variety of genetically encoded RNA circuits for cellular applications.

Segregated Fronto-Cerebellar Circuits Revealed by Intrinsic Functional Connectivity

PubMed Central

Buckner, Randy L.

2009-01-01

Multiple, segregated fronto-cerebellar circuits have been characterized in nonhuman primates using transneuronal tracing techniques including those that target prefrontal areas. Here, we used functional connectivity MRI (fcMRI) in humans (n = 40) to identify 4 topographically distinct fronto-cerebellar circuits that target 1) motor cortex, 2) dorsolateral prefrontal cortex, 3) medial prefrontal cortex, and 4) anterior prefrontal cortex. All 4 circuits were replicated and dissociated in an independent data set (n = 40). Direct comparison of right- and left-seeded frontal regions revealed contralateral lateralization in the cerebellum for each of the segregated circuits. The presence of circuits that involve prefrontal regions confirms that the cerebellum participates in networks important to cognition including a specific fronto-cerebellar circuit that interacts with the default network. Overall, the extent of the cerebellum associated with prefrontal cortex included a large portion of the posterior hemispheres consistent with a prominent role of the cerebellum in nonmotor functions. We conclude by providing a provisional map of the topography of the cerebellum based on functional correlations with the frontal cortex. PMID:19592571

Ensembles of physical states and random quantum circuits on graphs

NASA Astrophysics Data System (ADS)

Hamma, Alioscia; Santra, Siddhartha; Zanardi, Paolo

2012-11-01

In this paper we continue and extend the investigations of the ensembles of random physical states introduced in Hamma [Phys. Rev. Lett.PRLTAO0031-900710.1103/PhysRevLett.109.040502 109, 040502 (2012)]. These ensembles are constructed by finite-length random quantum circuits (RQC) acting on the (hyper)edges of an underlying (hyper)graph structure. The latter encodes for the locality structure associated with finite-time quantum evolutions generated by physical, i.e., local, Hamiltonians. Our goal is to analyze physical properties of typical states in these ensembles; in particular here we focus on proxies of quantum entanglement as purity and α-Renyi entropies. The problem is formulated in terms of matrix elements of superoperators which depend on the graph structure, choice of probability measure over the local unitaries, and circuit length. In the α=2 case these superoperators act on a restricted multiqubit space generated by permutation operators associated to the subsets of vertices of the graph. For permutationally invariant interactions the dynamics can be further restricted to an exponentially smaller subspace. We consider different families of RQCs and study their typical entanglement properties for finite time as well as their asymptotic behavior. We find that area law holds in average and that the volume law is a typical property (that is, it holds in average and the fluctuations around the average are vanishing for the large system) of physical states. The area law arises when the evolution time is O(1) with respect to the size L of the system, while the volume law arises as is typical when the evolution time scales like O(L).

Nonlinear computations shaping temporal processing of precortical vision.

PubMed

Butts, Daniel A; Cui, Yuwei; Casti, Alexander R R

2016-09-01

Computations performed by the visual pathway are constructed by neural circuits distributed over multiple stages of processing, and thus it is challenging to determine how different stages contribute on the basis of recordings from single areas. In the current article, we address this problem in the lateral geniculate nucleus (LGN), using experiments combined with nonlinear modeling capable of isolating various circuit contributions. We recorded cat LGN neurons presented with temporally modulated spots of various sizes, which drove temporally precise LGN responses. We utilized simultaneously recorded S-potentials, corresponding to the primary retinal ganglion cell (RGC) input to each LGN cell, to distinguish the computations underlying temporal precision in the retina from those in the LGN. Nonlinear models with excitatory and delayed suppressive terms were sufficient to explain temporal precision in the LGN, and we found that models of the S-potentials were nearly identical, although with a lower threshold. To determine whether additional influences shaped the response at the level of the LGN, we extended this model to use the S-potential input in combination with stimulus-driven terms to predict the LGN response. We found that the S-potential input "explained away" the major excitatory and delayed suppressive terms responsible for temporal patterning of LGN spike trains but revealed additional contributions, largely PULL suppression, to the LGN response. Using this novel combination of recordings and modeling, we were thus able to dissect multiple circuit contributions to LGN temporal responses across retina and LGN, and set the foundation for targeted study of each stage. Copyright © 2016 the American Physiological Society.

Driving CZTS to the SQ Limit: Solving the Open Circuit Voltage Problem

DOE Office of Scientific and Technical Information (OSTI.GOV)

Haight, Richard A.; McCandless, Brian E.; Kummel, Andrew C.

2016-12-15

A key objective of this 3 year research effort was to reduce the open circuit voltage (Voc) deficit, defined as the difference between the absorber band gap and the measured Voc to below 475mV from values at the beginning of this work of 630-730mV. To achieve this reduction, along with the attendant goals of higher Voc and efficiency, detailed studies into the fundamental understanding of existing limitations were undertaken.

Study of LED modulation effect on the photometric quantities and beam homogeneity of automotive lighting

NASA Astrophysics Data System (ADS)

Koudelka, Petr; Hanulak, Patrik; Jaros, Jakub; Papes, Martin; Latal, Jan; Siska, Petr; Vasinek, Vladimir

2015-07-01

This paper discusses the implementation of a light emitting diode based visible light communication system for optical vehicle-to-vehicle (V2V) communications in road safety applications. The widespread use of LEDs as light sources has reached into automotive fields. For example, LEDs are used for taillights, daytime running lights, brake lights, headlights, and traffic signals. Future in the optical vehicle-to-vehicle (V2V) communications will be based on an optical wireless communication technology that using LED transmitter and a camera receiver (OCI; optical communication image sensor). Utilization of optical V2V communication systems in automotive industry naturally brings a lot of problems. Among them belongs necessity of circuit implementation into the current concepts of electronic LED lights control that allows LED modulation. These circuits are quite complicated especially in case of luxury cars. Other problem is correct design of modulation circuits so that final vehicle lightning using optical vehicle-to-vehicle (V2V) communication meets standard requirements on Photometric Quantities and Beam Homogeneity. Authors of this article performed research on optical vehicle-to-vehicle (V2V) communication possibilities of headlight (Jaguar) and taillight (Skoda) in terms of modulation circuits (M-PSK, M-QAM) implementation into the lamp concepts and final fulfilment of mandatory standards on Photometric Quantities and Beam Homogeneity.

Steric effects in the dynamics of electrolytes at large applied voltages. II. Modified Poisson-Nernst-Planck equations.

PubMed

Kilic, Mustafa Sabri; Bazant, Martin Z; Ajdari, Armand

2007-02-01

In situations involving large potentials or surface charges, the Poisson-Boltzman (PB) equation has shortcomings because it neglects ion-ion interactions and steric effects. This has been widely recognized by the electrochemistry community, leading to the development of various alternative models resulting in different sets "modified PB equations," which have had at least qualitative success in predicting equilibrium ion distributions. On the other hand, the literature is scarce in terms of descriptions of concentration dynamics in these regimes. Here, adapting strategies developed to modify the PB equation, we propose a simple modification of the widely used Poisson-Nernst-Planck (PNP) equations for ionic transport, which at least qualitatively accounts for steric effects. We analyze numerical solutions of these modified PNP equations on the model problem of the charging of a simple electrolyte cell, and compare the outcome to that of the standard PNP equations. Finally, we repeat the asymptotic analysis of Bazant, Thornton, and Ajdari [Phys. Rev. E 70, 021506 (2004)] for this new system of equations to further document the interest and limits of validity of the simpler equivalent electrical circuit models introduced in Part I [Kilic, Bazant, and Ajdari, Phys. Rev. E 75, 021502 (2007)] for such problems.

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

NASA Astrophysics Data System (ADS)

Castro-Lopez, Rafael; Fernandez, Francisco V.; Rodriguez Vazquez, Angel

2005-06-01

Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints. It is a well-known fact in the semiconductor industry that such goal can only be attained by means of adequate CAD methodologies, techniques, and accompanying tools. This is particularly important in analog physical synthesis (a.k.a. layout generation), where large sensitivities of the circuit performances to the many subtle details of layout implementation (device matching, loading and coupling effects, reliability, and area features are of utmost importance to analog designers), render complete automation a truly challenging task. To approach the problem, two directions have been traditionally considered, knowledge-based and optimization-based, both with their own pros and cons. Besides, recently reported solutions oriented to speed up the overall design flow by means of reuse-based practices or by cutting off time-consuming, error-prone spins between electrical and layout synthesis (a technique known as layout-aware synthesis), rely on a outstandingly rapid yet efficient layout generation method. This paper analyses the suitability of procedural layout generation based on templates (a knowledge-based approach) by examining the requirements that both layout reuse and layout-aware solutions impose, and how layout templates face them. The ability to capture the know-how of experienced layout designers and the turnaround times for layout instancing are considered main comparative aspects in relation to other layout generation approaches. A discussion on the benefit-cost trade-off of using layout templates is also included. In addition to this analysis, the paper delves deeper into systematic techniques to develop fully reusable layout templates for analog circuits, either for a change of the circuit sizing (i.e., layout retargeting) or a change of the fabrication process (i.e., layout migration). Several examples implemented with the Cadence's Virtuoso tool suite are provided as demonstration of the paper's contributions.

Information Transfer Problems of the Partially Sighted: Recent Results and Project Summary.

ERIC Educational Resources Information Center

Genensky, S. M.; And Others

The fourth in a series of Rand reports on information transfer problems of the partially sighted reviews earlier reports and describes an experimental secretarial closed circuit TV (CCTV) system which enables the partially sighted to type from a printed or handwritten manuscript. Discussed are experiments using a pseudocolor system to determine…

Multidimensional spectral load balancing

DOEpatents

Hendrickson, Bruce A.; Leland, Robert W.

1996-12-24

A method of and apparatus for graph partitioning involving the use of a plurality of eigenvectors of the Laplacian matrix of the graph of the problem for which load balancing is desired. The invention is particularly useful for optimizing parallel computer processing of a problem and for minimizing total pathway lengths of integrated circuits in the design stage.

Simulation of 100-300 GHz solid-state harmonic sources

NASA Technical Reports Server (NTRS)

Zybura, Michael F.; Jones, J. Robert; Jones, Stephen H.; Tait, Gregory B.

1995-01-01

Accurate and efficient simulations of the large-signal time-dependent characteristics of second-harmonic Transferred Electron Oscillators (TEO's) and Heterostructure Barrier Varactor (HBV) frequency triplers have been obtained. This is accomplished by using a novel and efficient harmonic-balance circuit analysis technique which facilitates the integration of physics-based hydrodynamic device simulators. The integrated hydrodynamic device/harmonic-balance circuit simulators allow TEO and HBV circuits to be co-designed from both a device and a circuit point of view. Comparisons have been made with published experimental data for both TEO's and HBV's. For TEO's, excellent correlation has been obtained at 140 GHz and 188 GHz in second-harmonic operation. Excellent correlation has also been obtained for HBV frequency triplers operating near 200 GHz. For HBV's, both a lumped quasi-static equivalent circuit model and the hydrodynamic device simulator have been linked to the harmonic-balance circuit simulator. This comparison illustrates the importance of representing active devices with physics-based numerical device models rather than analytical device models.

Fate-Regulating Circuits in Viruses: From Discovery to New Therapy Targets

PubMed Central

Pai, Anand; Weinberger, Leor S.

2018-01-01

Current antivirals effectively target diverse viruses at various stages of their viral lifecycles. Nevertheless, curative therapy has remained elusive for important pathogens (e.g., HIV-1 and herpesviruses), in large part due to viral latency and the evolution of resistance to existing therapies. Here, we review the discovery of viral ‘master’ circuits: virus-encoded auto-regulatory gene networks that can autonomously control viral expression programs (i.e., between active, latent, and abortive fates). These circuits offer a potential new class of antivirals that could lead to intrinsic combination-antiviral therapies within a single molecule—evolutionary escape from such circuit ‘disruptors’ would require simultaneous evolution of both the cis regulatory element (e.g., the DNA-binding site) and the trans element (e.g., the transcription factor) for the circuit’s function to be recapitulated. We review the architectures of these fate-regulating master circuits in HIV-1 and the human herpesvirus cytomegalovirus (CMV) along with potential circuit-disruption strategies that may ultimately enable escape-resistant antiviral therapies. PMID:28800289

Programmable electronic synthesized capacitance

NASA Technical Reports Server (NTRS)

Kleinberg, Leonard L. (Inventor)

1987-01-01

A predetermined and variable synthesized capacitance which may be incorporated into the resonant portion of an electronic oscillator for the purpose of tuning the oscillator comprises a programmable operational amplifier circuit. The operational amplifier circuit has its output connected to its inverting input, in a follower configuration, by a network which is low impedance at the operational frequency of the circuit. The output of the operational amplifier is also connected to the noninverting input by a capacitor. The noninverting input appears as a synthesized capacitance which may be varied with a variation in gain-bandwidth product of the operational amplifier circuit. The gain-bandwidth product may, in turn, be varied with a variation in input set current with a digital to analog converter whose output is varied with a command word. The output impedance of the circuit may also be varied by the output set current. This circuit may provide very small ranges in oscillator frequency with relatively large control voltages unaffected by noise.

Reconfiguration of parietal circuits with cognitive tutoring in elementary school children

PubMed Central

Jolles, Dietsje; Supekar, Kaustubh; Richardson, Jennifer; Tenison, Caitlin; Ashkenazi, Sarit; Rosenberg-Lee, Miriam; Fuchs, Lynn; Menon, Vinod

2016-01-01

Cognitive development is shaped by brain plasticity during childhood, yet little is known about changes in large-scale functional circuits associated with learning in academically relevant cognitive domains such as mathematics. Here, we investigate plasticity of intrinsic brain circuits associated with one-on-one math tutoring and its relation to individual differences in children’s learning. We focused on functional circuits associated with the intraparietal sulcus (IPS) and angular gyrus (AG), cytoarchitectonically distinct subdivisions of the human parietal cortex with different roles in numerical cognition. Tutoring improved performance and strengthened IPS connectivity with the lateral prefrontal cortex, ventral temporal-occipital cortex, and hippocampus. Crucially, increased IPS connectivity was associated with individual performance gains, highlighting the behavioral significance of plasticity in IPS circuits. Tutoring-related changes in IPS connectivity were distinct from those of the adjacent AG, which did not predict performance gains. Our findings provide new insights into plasticity of functional brain circuits associated with the development of specialized cognitive skills in children. PMID:27618765

Reconfiguration of parietal circuits with cognitive tutoring in elementary school children.

PubMed

Jolles, Dietsje; Supekar, Kaustubh; Richardson, Jennifer; Tenison, Caitlin; Ashkenazi, Sarit; Rosenberg-Lee, Miriam; Fuchs, Lynn; Menon, Vinod

2016-10-01

Cognitive development is shaped by brain plasticity during childhood, yet little is known about changes in large-scale functional circuits associated with learning in academically relevant cognitive domains such as mathematics. Here, we investigate plasticity of intrinsic brain circuits associated with one-on-one math tutoring and its relation to individual differences in children's learning. We focused on functional circuits associated with the intraparietal sulcus (IPS) and angular gyrus (AG), cytoarchitectonically distinct subdivisions of the human parietal cortex with different roles in numerical cognition. Tutoring improved performance and strengthened IPS connectivity with the lateral prefrontal cortex, ventral temporal-occipital cortex, and hippocampus. Crucially, increased IPS connectivity was associated with individual performance gains, highlighting the behavioral significance of plasticity in IPS circuits. Tutoring-related changes in IPS connectivity were distinct from those of the adjacent AG, which did not predict performance gains. Our findings provide new insights into plasticity of functional brain circuits associated with the development of specialized cognitive skills in children. Copyright © 2016 Elsevier Ltd. All rights reserved.

Transient-Switch-Signal Suppressor

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1995-01-01

Circuit delays transmission of switch-opening or switch-closing signal until after preset suppression time. Used to prevent transmission of undesired momentary switch signal. Basic mode of operation simple. Beginning of switch signal initiates timing sequence. If switch signal persists after preset suppression time, circuit transmits switch signal to external circuitry. If switch signal no longer present after suppression time, switch signal deemed transient, and circuit does not pass signal on to external circuitry, as though no transient switch signal. Suppression time preset at value large enough to allow for damping of underlying pressure wave or other mechanical transient.

Implantable neurotechnologies: bidirectional neural interfaces--applications and VLSI circuit implementations.

PubMed

Greenwald, Elliot; Masters, Matthew R; Thakor, Nitish V

2016-01-01

A bidirectional neural interface is a device that transfers information into and out of the nervous system. This class of devices has potential to improve treatment and therapy in several patient populations. Progress in very large-scale integration has advanced the design of complex integrated circuits. System-on-chip devices are capable of recording neural electrical activity and altering natural activity with electrical stimulation. Often, these devices include wireless powering and telemetry functions. This review presents the state of the art of bidirectional circuits as applied to neuroprosthetic, neurorepair, and neurotherapeutic systems.

High-voltage crowbar circuit with cascade-triggered series ignitrons

DOEpatents

Baker, William R. [Orinda, CA

1980-11-04

A series string of ignitrons for switching a large current at high voltage to ground. Switching is initiated by means of a negative trigger pulse applied to the cathode of the lowest voltage level ignitron next to ground to draw ground current through diodes in the ignitor circuit. The trigger pulse is applied thereby to the next higher ignitron cathode and sequentially to the remainder of the ignitrons in the string through diodes in respective ignitor circuits. Full line voltage is held off of nonconducting diodes and ignitrons by means of varistors.

High-voltage crowbar circuit with cascade-triggered series ignitrons

DOEpatents

Baker, W.R.

A series string of ignitrons for switching a large current at high voltage to ground is discussed. Switching is initiated by means of a negative trigger pulse applied to the cathode of the lowest voltage level ignitron next to ground to draw ground current through diodes in the ignitor circuit. The trigger pulse is applied thereby to the next higher ignitron cathode and sequentially to the remainder of the ignitrons in the string through diodes in respective ignitor circuits. Full line voltage is held off of nonconducting diodes and ignitrons by means of varistors.

High-voltage crowbar circuit with cascade-triggered series ignitrons

DOEpatents

Baker, W.R.

1980-11-04

A series string of ignitrons for switching a large current at high voltage to ground. Switching is initiated by means of a negative trigger pulse applied to the cathode of the lowest voltage level ignitron next to ground to draw ground current through diodes in the ignitor circuit. The trigger pulse is applied thereby to the next higher ignitron cathode and sequentially to the remainder of the ignitrons in the string through diodes in respective ignitor circuits. Full line voltage is held off of nonconducting diodes and ignitrons by means of varistors. 1 fig.

Quantum algorithm for solving some discrete mathematical problems by probing their energy spectra

NASA Astrophysics Data System (ADS)

Wang, Hefeng; Fan, Heng; Li, Fuli

2014-01-01

When a probe qubit is coupled to a quantum register that represents a physical system, the probe qubit will exhibit a dynamical response only when it is resonant with a transition in the system. Using this principle, we propose a quantum algorithm for solving discrete mathematical problems based on the circuit model. Our algorithm has favorable scaling properties in solving some discrete mathematical problems.

Efficient G(sup 4)FET-Based Logic Circuits

NASA Technical Reports Server (NTRS)

Vatan, Farrokh

2008-01-01

A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

A Modular PV System Using Chain-Link-Type Multilevel Converter

NASA Astrophysics Data System (ADS)

Hatano, Nobuhiko; Ise, Toshifumi

This paper presents a modular photovoltaic system (MPVS) that uses a chain-link-type multilevel converter (CLMC). In large-scale PV generating systems, the DC power supply is generally composed of a large number of PV panels. Hence, losses are caused by differences in the maximum power point at each PV panel. An MPVS has been proposed to address the above mentioned problem. It helps improve the photoelectric conversion efficiency by applying maximum power point tracking (MPPT) control to each group of PV panels. In addition, if a CLMC is used in an MPVS, a high voltage can be output from the AC side and transmission losses can be decreased. However, with this circuit configuration, the current output from the AC side may be unbalanced. Therefore, we propose a method to output balanced current from the AC side, even if the output of the DC power supply is unbalanced. The validity of the proposed method is examined by digital simulation.

Tunable, Highly Stable Lasers for Coherent Lidar

NASA Technical Reports Server (NTRS)

Henderson, Sammy W.; Hale, Charley P.; EEpagnier, David M.

2006-01-01

Practical space-based coherent laser radar systems envisioned for global winds measurement must be very efficient and must contend with unique problems associated with the large platform velocities that the instruments experience in orbit. To compensate for these large platform-induced Doppler shifts in space-based applications, agile-frequency offset-locking of two single-frequency Doppler reference lasers was thoroughly investigated. Such techniques involve actively locking a frequency-agile master oscillator (MO) source to a comparatively static local oscillator (LO) laser, and effectively producing an offset between MO (the lidar slave oscillator seed source, typically) and heterodyne signal receiver LO that lowers the bandwidth of the receiver data-collection system and permits use of very high-quantum-efficiency, reasonably- low-bandwidth heterodyne photoreceiver detectors and circuits. Recent work on MO/LO offset locking has focused on increasing the offset locking range, improving the graded-InGaAs photoreceiver performance, and advancing the maturity of the offset locking electronics. A figure provides a schematic diagram of the offset-locking system.

On the impact of approximate computation in an analog DeSTIN architecture.

PubMed

Young, Steven; Lu, Junjie; Holleman, Jeremy; Arel, Itamar

2014-05-01

Deep machine learning (DML) holds the potential to revolutionize machine learning by automating rich feature extraction, which has become the primary bottleneck of human engineering in pattern recognition systems. However, the heavy computational burden renders DML systems implemented on conventional digital processors impractical for large-scale problems. The highly parallel computations required to implement large-scale deep learning systems are well suited to custom hardware. Analog computation has demonstrated power efficiency advantages of multiple orders of magnitude relative to digital systems while performing nonideal computations. In this paper, we investigate typical error sources introduced by analog computational elements and their impact on system-level performance in DeSTIN--a compositional deep learning architecture. These inaccuracies are evaluated on a pattern classification benchmark, clearly demonstrating the robustness of the underlying algorithm to the errors introduced by analog computational elements. A clear understanding of the impacts of nonideal computations is necessary to fully exploit the efficiency of analog circuits.

Soft switching resonant converter with duty-cycle control in DC micro-grid system

NASA Astrophysics Data System (ADS)

Lin, Bor-Ren

2018-01-01

Resonant converter has been widely used for the benefits of low switching losses and high circuit efficiency. However, the wide frequency variation is the main drawback of resonant converter. This paper studies a new modular resonant converter with duty-cycle control to overcome this problem and realise the advantages of low switching losses, no reverse recovery current loss, balance input split voltages and constant frequency operation for medium voltage direct currentgrid or system network. Series full-bridge (FB) converters are used in the studied circuit in order to reduce the voltage stresses and power rating on power semiconductors. Flying capacitor is used between two FB converters to balance input split voltages. Two circuit modules are paralleled on the secondary side to lessen the current rating of rectifier diodes and the size of magnetic components. The resonant tank is operated at inductive load circuit to help power switches to be turned on at zero voltage with wide load range. The pulse-width modulation scheme is used to regulate output voltage. Experimental verifications are provided to show the performance of the proposed circuit.

Questions about Answers: Probing Teachers' Awareness and Planned Remediation of Learners' Misconceptions about Electric Circuits

ERIC Educational Resources Information Center

Gaigher, Estelle

2014-01-01

This article reports an exploratory multi-case study on how science teachers understand and envisage addressing learners' misconceptions about electric circuits. Four teachers from schools in and around a large South African city participated in the study. An open-ended questionnaire was designed in a novel way, questioning teachers about wrong…

AN EXPERIMENTAL STUDY UTILIZING CLOSED-CIRCUIT TELEVISION IN THE TEACHING OF DENTAL TECHNIQUES.

ERIC Educational Resources Information Center

MORRISON, ARTHUR H.

CLOSED CIRCUIT TELEVISION WAS WELL RECEIVED BY DENTISTRY STUDENTS AT NEW YORK UNIVERSITY BUT FAILED TO YIELD SIGNIFICANT GAINS IN ACHIEVEMENT OVER CONVENTIONAL INSTRUCTION. TWENTY-ONE NULL HYPOTHESES WERE TESTED ON 154 MALE SOPHOMORE STUDENTS, WHO WERE DIVIDED INTO GWO GROUPS, HALF BEING INSTRUCTED TO A LARGE EXTENT VIA CCTV, TV CLASS, AND HALF…

Multiplier Architecture for Coding Circuits

NASA Technical Reports Server (NTRS)

Wang, C. C.; Truong, T. K.; Shao, H. M.; Deutsch, L. J.

1986-01-01

Multipliers based on new algorithm for Galois-field (GF) arithmetic regular and expandable. Pipeline structures used for computing both multiplications and inverses. Designs suitable for implementation in very-large-scale integrated (VLSI) circuits. This general type of inverter and multiplier architecture especially useful in performing finite-field arithmetic of Reed-Solomon error-correcting codes and of some cryptographic algorithms.

75 FR 51843 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-08-23

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of Commission Decision Not To... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos. 5,933,364 and 6,834,336. The complaint further alleges the existence of a domestic industry. The...

LSI logic for phase-control rectifiers

NASA Technical Reports Server (NTRS)

Dolland, C.

1980-01-01

Signals for controlling phase-controlled rectifier circuit are generated by combinatorial logic than can be implemented in large-scale integration (LSI). LSI circuit saves space, weight, and assembly time compared to previous controls that employ one-shot multivibrators, latches, and capacitors. LSI logic functions by sensing three phases of ac power source and by comparing actual currents with intended currents.

Discrete-State Simulated Annealing For Traveling-Wave Tube Slow-Wave Circuit Optimization

NASA Technical Reports Server (NTRS)

Wilson, Jeffrey D.; Bulson, Brian A.; Kory, Carol L.; Williams, W. Dan (Technical Monitor)

2001-01-01

Algorithms based on the global optimization technique of simulated annealing (SA) have proven useful in designing traveling-wave tube (TWT) slow-wave circuits for high RF power efficiency. The characteristic of SA that enables it to determine a globally optimized solution is its ability to accept non-improving moves in a controlled manner. In the initial stages of the optimization, the algorithm moves freely through configuration space, accepting most of the proposed designs. This freedom of movement allows non-intuitive designs to be explored rather than restricting the optimization to local improvement upon the initial configuration. As the optimization proceeds, the rate of acceptance of non-improving moves is gradually reduced until the algorithm converges to the optimized solution. The rate at which the freedom of movement is decreased is known as the annealing or cooling schedule of the SA algorithm. The main disadvantage of SA is that there is not a rigorous theoretical foundation for determining the parameters of the cooling schedule. The choice of these parameters is highly problem dependent and the designer needs to experiment in order to determine values that will provide a good optimization in a reasonable amount of computational time. This experimentation can absorb a large amount of time especially when the algorithm is being applied to a new type of design. In order to eliminate this disadvantage, a variation of SA known as discrete-state simulated annealing (DSSA), was recently developed. DSSA provides the theoretical foundation for a generic cooling schedule which is problem independent, Results of similar quality to SA can be obtained, but without the extra computational time required to tune the cooling parameters. Two algorithm variations based on DSSA were developed and programmed into a Microsoft Excel spreadsheet graphical user interface (GUI) to the two-dimensional nonlinear multisignal helix traveling-wave amplifier analysis program TWA3. The algorithms were used to optimize the computed RF efficiency of a TWT by determining the phase velocity profile of the slow-wave circuit. The mathematical theory and computational details of the DSSA algorithms will be presented and results will be compared to those obtained with a SA algorithm.

Delineation of separate brain regions used for scientific versus engineering modes of thinking

NASA Astrophysics Data System (ADS)

Patterson, Clair C.

1994-08-01

Powerful, latent abilities for extreme sophistication in abstract rationalization as potential biological adaptive behavioral responses were installed entirely through accident and inadvertence by biological evolution in the Homo sapiens sapiens species of brain. These potentials were never used, either in precursor species as factors in evolutionary increase in hominid brain mass, nor in less sophisticated forms within social environments characterized by Hss tribal brain population densities. Those latent abilities for unnatural biological adaptive behavior were forced to become manifest in various ways by growths in sophistication of communication interactions engendered by large growths in brain population densities brought on by developments in agriculture at the onset of the Holocene. It is proposed that differences probably exist between regions of the Hss brain involved in utilitarian, engineering types of problem conceptualization-solving versus regions of the brain involved in nonutilitarian, artistic-scientific types of problem conceptualization-solving. Populations isolated on separate continents from diffusive contact and influence on cultural developments, and selected for comparison of developments during equivalent stages of technological and social sophistication in matching 4000 year periods, show, at the ends of those periods, marked differences in aesthetic attributes expressed in cosmogonies, music, and writing (nonutilitarian thinking related to science and art). On the other hand the two cultures show virtually identical developments in three major stages of metallurgical technologies (utilitarian thinking related to engineering). Such archaeological data suggest that utilitarian modes of thought may utilize combinations of neuronal circuits in brain regions that are conserved among tribal populations territorially separated from each other for tens of thousands of years. Such conservation may not be true for neuronal circuits involved in nonutilitarian modes of thought. It is postulated that neuronal circuits involved in nonutilitarian modes of thought are located in specific regions of the brain that are divergent features between populations that have been territorially separated for tens of thousands of years. Anatomical PET and NMRI studies of brains of modern descendants of these cultures are proposed that would seek to define these inferred differences through proper protocols of stimulation devised by those investigators.

Novel high-gain, improved-bandwidth, finned-ladder V-band Traveling-Wave Tube slow-wave circuit design

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Wilson, Jeffrey D.

1994-01-01

The V-band frequency range of 59-64 GHz is a region of the millimeter-wave spectrum that has been designated for inter-satellite communications. As a first effort to develop a high-efficiency V-band Traveling-Wave Tube (TWT), variations on a ring-plane slow-wave circuit were computationally investigated to develop an alternative to the more conventional ferruled coupled-cavity circuit. The ring-plane circuit was chosen because of its high interaction impedance, large beam aperture, and excellent thermal dissipation properties. Despite these advantages, however, low bandwidth and high voltage requirements have, until now, prevented its acceptance outside the laboratory. In this paper, the three-dimensional electrodynamic simulation code MAFIA (solution of MAxwell's Equation by the Finite-Integration-Algorithm) is used to investigate methods of increasing the bandwidth and lowering the operating voltage of the ring-plane circuit. Calculations of frequency-phase dispersion, beam on-axis interaction impedance, attenuation and small-signal gain per wavelength were performed for various geometric variations and loading distributions of the ring-plane TWT slow-wave circuit. Based on the results of the variations, a circuit termed the finned-ladder TWT slow-wave circuit was designed and is compared here to the scaled prototype ring-plane and a conventional ferruled coupled-cavity TWT circuit over the V-band frequency range. The simulation results indicate that this circuit has a much higher gain, significantly wider bandwidth, and a much lower voltage requirement than the scaled ring-plane prototype circuit, while retaining its excellent thermal dissipation properties. The finned-ladder circuit has a much larger small-signal gain per wavelength than the ferruled coupled-cavity circuit, but with a moderate sacrifice in bandwidth.

Coupling an Ensemble of Electrons on Superfluid Helium to a Superconducting Circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Ge; Fragner, A.; Koolstra, G.

2016-03-01

The quantized lateral motional states and the spin states of electrons trapped on the surface of superfluid helium have been proposed as basic building blocks of a scalable quantum computer. Circuit quantum electrodynamics allows strong dipole coupling between electrons and a high-Q superconducting microwave resonator, enabling such sensitive detection and manipulation of electron degrees of freedom. Here, we present the first realization of a hybrid circuit in which a large number of electrons are trapped on the surface of superfluid helium inside a coplanar waveguide resonator. The high finesse of the resonator allows us to observe large dispersive shifts thatmore » are many times the linewidth and make fast and sensitive measurements on the collective vibrational modes of the electron ensemble, as well as the superfluid helium film underneath. Furthermore, a large ensemble coupling is observed in the dispersive regime during experiment, and it shows excellent agreement with our numeric model. The coupling strength of the ensemble to the cavity is found to be approximate to 1 MHz per electron, indicating the feasibility of achieving single electron strong coupling.« less

EHW Approach to Temperature Compensation of Electronics

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range. The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; Evolutionary Automated Synthesis of Electronic Circuits (NPO- 20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "Morphing in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31; "Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38. To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field-programmable transistor arrays (FPTAs). The evolution is guided by a search-andoptimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

Heuristic algorithms for solving of the tool routing problem for CNC cutting machines

NASA Astrophysics Data System (ADS)

Chentsov, P. A.; Petunin, A. A.; Sesekin, A. N.; Shipacheva, E. N.; Sholohov, A. E.

2015-11-01

The article is devoted to the problem of minimizing the path of the cutting tool to shape cutting machines began. This problem can be interpreted as a generalized traveling salesman problem. Earlier version of the dynamic programming method to solve this problem was developed. Unfortunately, this method allows to process an amount not exceeding thirty circuits. In this regard, the task of constructing quasi-optimal route becomes relevant. In this paper we propose options for quasi-optimal greedy algorithms. Comparison of the results of exact and approximate algorithms is given.

Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components

NASA Astrophysics Data System (ADS)

Thubagere, Anupama J.; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F.; Ardelean, Diana A.; Cherry, Kevin M.; Qian, Lulu

2017-02-01

Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.

Creating single-copy genetic circuits

PubMed Central

Lee, Jeong Wook; Gyorgy, Andras; Cameron, D. Ewen; Pyenson, Nora; Choi, Kyeong Rok; Way, Jeffrey C.; Silver, Pamela A.; Del Vecchio, Domitilla; Collins, James J.

2017-01-01

SUMMARY Synthetic biology is increasingly used to develop sophisticated living devices for basic and applied research. Many of these genetic devices are engineered using multi-copy plasmids, but as the field progresses from proof-of-principle demonstrations to practical applications, it is important to develop single-copy synthetic modules that minimize consumption of cellular resources and can be stably maintained as genomic integrants. Here we use empirical design, mathematical modeling and iterative construction and testing to build single-copy, bistable toggle switches with improved performance and reduced metabolic load that can be stably integrated into the host genome. Deterministic and stochastic models led us to focus on basal transcription to optimize circuit performance and helped to explain the resulting circuit robustness across a large range of component expression levels. The design parameters developed here provide important guidance for future efforts to convert functional multi-copy gene circuits into optimized single-copy circuits for practical, real-world use. PMID:27425413

A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit

PubMed Central

Peng, Sheng-Yu; Qureshi, Muhammad S.; Hasler, Paul E.; Basu, Arindam; Degertekin, F. L.

2008-01-01

This paper describes a low-power approach to capacitive sensing that achieves a high signal-to-noise ratio. The circuit is composed of a capacitive feedback charge amplifier and a charge adaptation circuit. Without the adaptation circuit, the charge amplifier only consumes 1 μW to achieve the audio band SNR of 69.34dB. An adaptation scheme using Fowler-Nordheim tunneling and channel hot electron injection mechanisms to stabilize the DC output voltage is demonstrated. This scheme provides a very low frequency pole at 0.2Hz. The measured noise spectrums show that this slow-time scale adaptation does not degrade the circuit performance. The DC path can also be provided by a large feedback resistance without causing extra power consumption. A charge amplifier with a MOS-bipolar pseudo-resistor feedback scheme is interfaced with a capacitive micromachined ultrasonic transducer to demonstrate the feasibility of this approach for ultrasound applications. PMID:18787650

Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors

PubMed Central

Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C. P.; Gelinck, Gerwin H.; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

2016-01-01

Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics. PMID:27762321

Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors.

PubMed

Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C P; Gelinck, Gerwin H; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

2016-10-20

Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics.

Efficient Power Network Analysis with Modeling of Inductive Effects

NASA Astrophysics Data System (ADS)

Zeng, Shan; Yu, Wenjian; Hong, Xianlong; Cheng, Chung-Kuan

In this paper, an efficient method is proposed to accurately analyze large-scale power/ground (P/G) networks, where inductive parasitics are modeled with the partial reluctance. The method is based on frequency-domain circuit analysis and the technique of vector fitting [14], and obtains the time-domain voltage response at given P/G nodes. The frequency-domain circuit equation including partial reluctances is derived, and then solved with the GMRES algorithm with rescaling, preconditioning and recycling techniques. With the merit of sparsified reluctance matrix and iterative solving techniques for the frequency-domain circuit equations, the proposed method is able to handle large-scale P/G networks with complete inductive modeling. Numerical results show that the proposed method is orders of magnitude faster than HSPICE, several times faster than INDUCTWISE [4], and capable of handling the inductive P/G structures with more than 100, 000 wire segments.

Cortical activity in the null space: permitting preparation without movement

PubMed Central

Kaufman, Matthew T.; Churchland, Mark M.; Ryu, Stephen I.; Shenoy, Krishna V.

2014-01-01

Neural circuits must perform computations and then selectively output the results to other circuits. Yet synapses do not change radically at millisecond timescales. A key question then is: how is communication between neural circuits controlled? In motor control, brain areas directly involved in driving movement are active well before movement begins. Muscle activity is some readout of neural activity, yet remains largely unchanged during preparation. Here we find that during preparation, while the monkey holds still, changes in motor cortical activity cancel out at the level of these population readouts. Motor cortex can thereby prepare the movement without prematurely causing it. Further, we found evidence that this mechanism also operates in dorsal premotor cortex (PMd), largely accounting for how preparatory activity is attenuated in primary motor cortex (M1). Selective use of “output-null” vs. “output-potent” patterns of activity may thus help control communication to the muscles and between these brain areas. PMID:24487233

Solution-based circuits enable rapid and multiplexed pathogen detection.

PubMed

Lam, Brian; Das, Jagotamoy; Holmes, Richard D; Live, Ludovic; Sage, Andrew; Sargent, Edward H; Kelley, Shana O

2013-01-01

Electronic readout of markers of disease provides compelling simplicity, sensitivity and specificity in the detection of small panels of biomarkers in clinical samples; however, the most important emerging tests for disease, such as infectious disease speciation and antibiotic-resistance profiling, will need to interrogate samples for many dozens of biomarkers. Electronic readout of large panels of markers has been hampered by the difficulty of addressing large arrays of electrode-based sensors on inexpensive platforms. Here we report a new concept--solution-based circuits formed on chip--that makes highly multiplexed electrochemical sensing feasible on passive chips. The solution-based circuits switch the information-carrying signal readout channels and eliminate all measurable crosstalk from adjacent, biomolecule-specific microsensors. We build chips that feature this advance and prove that they analyse unpurified samples successfully, and accurately classify pathogens at clinically relevant concentrations. We also show that signature molecules can be accurately read 2  minutes after sample introduction.

Estimation of Faults in DC Electrical Power System

NASA Technical Reports Server (NTRS)

Gorinevsky, Dimitry; Boyd, Stephen; Poll, Scott

2009-01-01

This paper demonstrates a novel optimization-based approach to estimating fault states in a DC power system. Potential faults changing the circuit topology are included along with faulty measurements. Our approach can be considered as a relaxation of the mixed estimation problem. We develop a linear model of the circuit and pose a convex problem for estimating the faults and other hidden states. A sparse fault vector solution is computed by using 11 regularization. The solution is computed reliably and efficiently, and gives accurate diagnostics on the faults. We demonstrate a real-time implementation of the approach for an instrumented electrical power system testbed, the ADAPT testbed at NASA ARC. The estimates are computed in milliseconds on a PC. The approach performs well despite unmodeled transients and other modeling uncertainties present in the system.

Flexible programmable logic module

DOEpatents

Robertson, Perry J.; Hutchinson, Robert L.; Pierson, Lyndon G.

2001-01-01

The circuit module of this invention is a VME board containing a plurality of programmable logic devices (PLDs), a controlled impedance clock tree, and interconnecting buses. The PLDs are arranged to permit systolic processing of a problem by offering wide data buses and a plurality of processing nodes. The board contains a clock reference and clock distribution tree that can drive each of the PLDs with two critically timed clock references. External clock references can be used to drive additional circuit modules all operating from the same synchronous clock reference.

Graphical approach for multiple values logic minimization

NASA Astrophysics Data System (ADS)

Awwal, Abdul Ahad S.; Iftekharuddin, Khan M.

1999-03-01

Multiple valued logic (MVL) is sought for designing high complexity, highly compact, parallel digital circuits. However, the practical realization of an MVL-based system is dependent on optimization of cost, which directly affects the optical setup. We propose a minimization technique for MVL logic optimization based on graphical visualization, such as a Karnaugh map. The proposed method is utilized to solve signed-digit binary and trinary logic minimization problems. The usefulness of the minimization technique is demonstrated for the optical implementation of MVL circuits.

Materials-Process Interactions in Ternary Alloy Semiconductors.

DTIC Science & Technology

1984-08-01

high, the surface potential can be * modulated . PECVD SiO. appears to be a viable candidate as a gate dielectric for * Irf ,fO-4A)s MISFETs...it is desirable to integrate the detectors with circuits capable of performing signal processing functions. These circuits can either be fabricated in...to be a major problem in In0. 5 3Ga 0.* 47 s. 25 S. . . . . 13821 -1 R I (a) CROSS SECTION KEYBOARD 210M ANNEALING CHAMBER GATE TRIGG TRIAC

On the modulation of the Jovian decametric radiation by Io. I - Acceleration of charged particles

NASA Technical Reports Server (NTRS)

Smith, R. A.; Goertz, C. K.

1978-01-01

A steady-state analysis of the current circuit between Io and the Jovian ionosphere is performed, assuming that the current is carried by electrons accelerated through potential double layers in the Io flux tube. The circuit analysis indicates that electrons may be accelerated up to energies of several hundred keV. Several problems associated with the formation of double layers are also discussed. The parallel potential drops decouple the flux tube from the satellite's orbital motion.

ESSDERC (European Solid State Device Research Conference) 17th Held in Bologna, Italy on 14-17 September 1987

DTIC Science & Technology

1987-09-17

T. J. Watson Research Center, Yorktown Heights, N.Y. 10598 Processing, design , and characterization issues are discussed for advanced field-effect...Graded-gate FET (GFET) Jan. 1969. designed to overcome these problems, was presented. The differential gate bias allows control [3] D. Misra, T.R...structure, the degree of freedom in zation [7) of the partially restricted active circuit or system design circuit layout, and area is to control the

Finite element modelling of non-linear magnetic circuits using Cosmic NASTRAN

NASA Technical Reports Server (NTRS)

Sheerer, T. J.

1986-01-01

The general purpose Finite Element Program COSMIC NASTRAN currently has the ability to model magnetic circuits with constant permeablilities. An approach was developed which, through small modifications to the program, allows modelling of non-linear magnetic devices including soft magnetic materials, permanent magnets and coils. Use of the NASTRAN code resulted in output which can be used for subsequent mechanical analysis using a variation of the same computer model. Test problems were found to produce theoretically verifiable results.

Digitized adiabatic quantum computing with a superconducting circuit.

PubMed

Barends, R; Shabani, A; Lamata, L; Kelly, J; Mezzacapo, A; Las Heras, U; Babbush, R; Fowler, A G; Campbell, B; Chen, Yu; Chen, Z; Chiaro, B; Dunsworth, A; Jeffrey, E; Lucero, E; Megrant, A; Mutus, J Y; Neeley, M; Neill, C; O'Malley, P J J; Quintana, C; Roushan, P; Sank, D; Vainsencher, A; Wenner, J; White, T C; Solano, E; Neven, H; Martinis, John M

2016-06-09

Quantum mechanics can help to solve complex problems in physics and chemistry, provided they can be programmed in a physical device. In adiabatic quantum computing, a system is slowly evolved from the ground state of a simple initial Hamiltonian to a final Hamiltonian that encodes a computational problem. The appeal of this approach lies in the combination of simplicity and generality; in principle, any problem can be encoded. In practice, applications are restricted by limited connectivity, available interactions and noise. A complementary approach is digital quantum computing, which enables the construction of arbitrary interactions and is compatible with error correction, but uses quantum circuit algorithms that are problem-specific. Here we combine the advantages of both approaches by implementing digitized adiabatic quantum computing in a superconducting system. We tomographically probe the system during the digitized evolution and explore the scaling of errors with system size. We then let the full system find the solution to random instances of the one-dimensional Ising problem as well as problem Hamiltonians that involve more complex interactions. This digital quantum simulation of the adiabatic algorithm consists of up to nine qubits and up to 1,000 quantum logic gates. The demonstration of digitized adiabatic quantum computing in the solid state opens a path to synthesizing long-range correlations and solving complex computational problems. When combined with fault-tolerance, our approach becomes a general-purpose algorithm that is scalable.

Bidirectional global spontaneous network activity precedes the canonical unidirectional circuit organization in the developing hippocampus.

PubMed

Shi, Yulin; Ikrar, Taruna; Olivas, Nicholas D; Xu, Xiangmin

2014-06-15

Spontaneous network activity is believed to sculpt developing neural circuits. Spontaneous giant depolarizing potentials (GDPs) were first identified with single-cell recordings from rat CA3 pyramidal neurons, but here we identify and characterize a large-scale spontaneous network activity we term global network activation (GNA) in the developing mouse hippocampal slices, which is measured macroscopically by fast voltage-sensitive dye imaging. The initiation and propagation of GNA in the mouse is largely GABA-independent and dominated by glutamatergic transmission via AMPA receptors. Despite the fact that signal propagation in the adult hippocampus is strongly unidirectional through the canonical trisynaptic circuit (dentate gyrus [DG] to CA3 to CA1), spontaneous GNA in the developing hippocampus originates in distal CA3 and propagates both forward to CA1 and backward to DG. Photostimulation-evoked GNA also shows prominent backward propagation in the developing hippocampus from CA3 to DG. Mouse GNA is strongly correlated to electrophysiological recordings of highly localized single-cell and local field potential events. Photostimulation mapping of neural circuitry demonstrates that the enhancement of local circuit connections to excitatory pyramidal neurons occurs over the same time course as GNA and reveals the underlying pathways accounting for GNA backward propagation from CA3 to DG. The disappearance of GNA coincides with a transition to the adult-like unidirectional circuit organization at about 2 weeks of age. Taken together, our findings strongly suggest a critical link between GNA activity and maturation of functional circuit connections in the developing hippocampus. Copyright © 2013 Wiley Periodicals, Inc.

A Role of Phase-Resetting in Coordinating Large Scale Neural Networks During Attention and Goal-Directed Behavior

PubMed Central

Voloh, Benjamin; Womelsdorf, Thilo

2016-01-01

Short periods of oscillatory activation are ubiquitous signatures of neural circuits. A broad range of studies documents not only their circuit origins, but also a fundamental role for oscillatory activity in coordinating information transfer during goal directed behavior. Recent studies suggest that resetting the phase of ongoing oscillatory activity to endogenous or exogenous cues facilitates coordinated information transfer within circuits and between distributed brain areas. Here, we review evidence that pinpoints phase resetting as a critical marker of dynamic state changes of functional networks. Phase resets: (1) set a “neural context” in terms of narrow band frequencies that uniquely characterizes the activated circuits; (2) impose coherent low frequency phases to which high frequency activations can synchronize, identifiable as cross-frequency correlations across large anatomical distances; (3) are critical for neural coding models that depend on phase, increasing the informational content of neural representations; and (4) likely originate from the dynamics of canonical E-I circuits that are anatomically ubiquitous. These multiple signatures of phase resets are directly linked to enhanced information transfer and behavioral success. We survey how phase resets re-organize oscillations in diverse task contexts, including sensory perception, attentional stimulus selection, cross-modal integration, Pavlovian conditioning, and spatial navigation. The evidence we consider suggests that phase-resets can drive changes in neural excitability, ensemble organization, functional networks, and ultimately, overt behavior. PMID:27013986

Electrostatic separation for recovering metals and nonmetals from waste printed circuit board: problems and improvements.

PubMed

Wu, Jiang; Li, Jia; Xu, Zhenming

2008-07-15

Electrostatic separation is an effective and environmentally friendly method for recycling comminuted waste printed circuit boards (PCB). As a classical separator, the roll-type corona-electrostatic separator (RTS) has some advantages in this field. However, there are still some notable problems, such as the middling products and their further treatment, impurity of nonconductive products because of the aggregation of fine particles, and stability of the separation process and balance between the production capacity and the separation quality. To overcome these problems, a conception of two-step separation is presented, and a new two-roll type corona-electrostatic separator (T-RTS) was built As compared to RTS, the conductive products increase by 8.9%, the middling products decrease by 45%, and the production capacity increases by 50% in treating comminuted PCB wastes by T-RTS. In addition, the separation process in T-RTS is more stable. Therefore, T-RTS is a promising separator for recycling comminuted PCB.

Methodology of problem-based learning engineering and technology and of its implementation with modern computer resources

NASA Astrophysics Data System (ADS)

Lebedev, A. A.; Ivanova, E. G.; Komleva, V. A.; Klokov, N. M.; Komlev, A. A.

2017-01-01

The considered method of learning the basics of microelectronic circuits and systems amplifier enables one to understand electrical processes deeper, to understand the relationship between static and dynamic characteristics and, finally, bring the learning process to the cognitive process. The scheme of problem-based learning can be represented by the following sequence of procedures: the contradiction is perceived and revealed; the cognitive motivation is provided by creating a problematic situation (the mental state of the student), moving the desire to solve the problem, to raise the question "why?", the hypothesis is made; searches for solutions are implemented; the answer is looked for. Due to the complexity of architectural schemes in the work the modern methods of computer analysis and synthesis are considered in the work. Examples of engineering by students in the framework of students' scientific and research work of analog circuits with improved performance based on standard software and software developed at the Department of Microelectronics MEPhI.