Flash memory management system and method utilizing multiple block list windows

NASA Technical Reports Server (NTRS)

Chow, James (Inventor); Gender, Thomas K. (Inventor)

2005-01-01

The present invention provides a flash memory management system and method with increased performance. The flash memory management system provides the ability to efficiently manage and allocate flash memory use in a way that improves reliability and longevity, while maintaining good performance levels. The flash memory management system includes a free block mechanism, a disk maintenance mechanism, and a bad block detection mechanism. The free block mechanism provides efficient sorting of free blocks to facilitate selecting low use blocks for writing. The disk maintenance mechanism provides for the ability to efficiently clean flash memory blocks during processor idle times. The bad block detection mechanism provides the ability to better detect when a block of flash memory is likely to go bad. The flash status mechanism stores information in fast access memory that describes the content and status of the data in the flash disk. The new bank detection mechanism provides the ability to automatically detect when new banks of flash memory are added to the system. Together, these mechanisms provide a flash memory management system that can improve the operational efficiency of systems that utilize flash memory.

A hot hole-programmed and low-temperature-formed SONOS flash memory

PubMed Central

2013-01-01

In this study, a high-performance TixZrySizO flash memory is demonstrated using a sol–gel spin-coating method and formed under a low annealing temperature. The high-efficiency charge storage layer is formed by depositing a well-mixed solution of titanium tetrachloride, silicon tetrachloride, and zirconium tetrachloride, followed by 60 s of annealing at 600°C. The flash memory exhibits a noteworthy hot hole trapping characteristic and excellent electrical properties regarding memory window, program/erase speeds, and charge retention. At only 6-V operation, the program/erase speeds can be as fast as 120:5.2 μs with a 2-V shift, and the memory window can be up to 8 V. The retention times are extrapolated to 106 s with only 5% (at 85°C) and 10% (at 125°C) charge loss. The barrier height of the TixZrySizO film is demonstrated to be 1.15 eV for hole trapping, through the extraction of the Poole-Frenkel current. The excellent performance of the memory is attributed to high trapping sites of the low-temperature-annealed, high-κ sol–gel film. PMID:23899050

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory

NASA Astrophysics Data System (ADS)

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-01

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory.

PubMed

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-23

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

NASA Astrophysics Data System (ADS)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

Hold-up power supply for flash memory

NASA Technical Reports Server (NTRS)

Ott, William E. (Inventor)

2004-01-01

A hold-up power supply for flash memory systems is provided. The hold-up power supply provides the flash memory with the power needed to temporarily operate when a power loss exists. This allows the flash memory system to complete any erasures and writes, and thus allows it to shut down gracefully. The hold-up power supply detects when a power loss on a power supply bus is occurring and supplies the power needed for the flash memory system to temporally operate. The hold-up power supply stores power in at least one capacitor. During normal operation, power from a high voltage supply bus is used to charge the storage capacitors. When a power supply loss is detected, the power supply bus is disconnected from the flash memory system. A hold-up controller controls the power flow from the storage capacitors to the flash memory system. The hold-up controller uses feedback to assure that the proper voltage is provided from the storage capacitors to the flash memory system. This power supplied by the storage capacitors allows the flash memory system to complete any erasures and writes, and thus allows the flash memory system to shut down gracefully.

Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

NASA Astrophysics Data System (ADS)

Briggs, Benjamin D.

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

NAND FLASH Radiation Tolerant Intelligent Memory Stack (RTIMS FLASH)

NASA Astrophysics Data System (ADS)

Sellier, Charles; Wang, Pierre

2014-08-01

The NAND Flash Radiation Tolerant and Intelligent Memory Stack (RTIMS FLASH) is a User's Friendly, Plug-and- Play and Radiation Protected high density NAND Flash Memory. It provides a very high density, radiation hardened by design and non-volatile memory module suitable for all space applications such as commercial or scientific geo-stationary missions, earth observation, navigation, manned space vehicles and deep space scientific exploration. The Intelligent Memory Module embeds a very high density of non-volatile NAND Flash memory and one Intelligent Flash Memory Controller (FMC). The FMC provides the module with a full protection against the radiation effects such as SEL, SEFI and SEU. It's also granting the module with bad block immunity as well as high level service functions that will benefit to the user's applications.

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

78 FR 48188 - Certain Flash Memory Chips and Products Containing the Same Notice of Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-07

... INTERNATIONAL TRADE COMMISSION [Docket No. 2971] Certain Flash Memory Chips and Products.... International Trade Commission has received a complaint entitled Certain Flash Memory Chips and Products... sale within the United States after importation of certain flash memory chips and products containing...

78 FR 55095 - Certain Flash Memory Chips and Products Containing Same; Institution of Investigation

Federal Register 2010, 2011, 2012, 2013, 2014

2013-09-09

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-893] Certain Flash Memory Chips and... States after importation of certain flash memory chips and products containing the same by reason of... sale within the United States after importation of certain flash memory chips and products containing...

Optimal proximity correction: application for flash memory design

NASA Astrophysics Data System (ADS)

Chen, Y. O.; Huang, D. L.; Sung, K. T.; Chiang, J. J.; Yu, M.; Teng, F.; Chu, Lung; Rey, Juan C.; Bernard, Douglas A.; Li, Jiangwei; Li, Junling; Moroz, V.; Boksha, Victor V.

1998-06-01

Proximity Correction is the technology for which the most of IC manufacturers are committed already. The final intended result of correction is affected by many factors other than the optical characteristics of the mask-stepper system, such as photoresist exposure, post-exposure bake and development parameters, etch selectivity and anisotropy, and underlying topography. The most advanced industry and research groups already reported immediate need to consider wafer topography as one of the major components during a Proximity Correction procedure. In the present work we are discussing the corners rounding effect (which eventually cause electrical leakage) observed for the elements of Poly2 layer for a Flash Memory Design. It was found that the rounding originated by three- dimensional effects due to variation of photoresist thickness resulting from the non-planar substrate. Our major goal was to understand the reasons and correct corner rounding. As a result of this work highly effective layout correction methodology was demonstrated and manufacturable Depth Of Focus was achieved. Another purpose of the work was to demonstrate complete integration flow for a Flash Memory Design based on photolithography; deposition/etch; ion implantation/oxidation/diffusion; and device simulators.

75 FR 55604 - In the Matter of Certain Flash Memory Chips and Products Containing the Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-09-13

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-735] In the Matter of Certain Flash Memory Chips... the sale within the United States after importation of certain flash memory chips and products... importation of certain flash memory chips and products containing the same that infringe one or more of claims...

Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response

NASA Astrophysics Data System (ADS)

Clark, Lawrence T.; Holbert, Keith E.; Adams, James W.; Navale, Harshad; Anderson, Blake C.

2015-12-01

Flash memory is an essential part of systems used in harsh environments, experienced by both terrestrial and aerospace TID applications. This paper presents studies of COTS flash memory TID hardness. While there is substantial literature on flash memory TID response, this work focuses for the first time on 1.5 transistor per cell flash memory. The experimental results show hardness varying from about 100 krad(Si) to over 250 krad(Si) depending on the usage model. We explore the circuit and device aspects of the results, based on the extensive reliability literature for this flash memory type. Failure modes indicate both device damage and circuit marginalities. Sector erase failure limits, but read only operation allows TID exceeding 200 krad(Si). The failures are analyzed by type.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

CD uniformity control for thick resist process

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Liu, Yu-Lin; Wang, Weihung; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

2017-03-01

In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked flash cell array has been proposed. In constructing 3D NAND flash memories, the higher bit number per area is achieved by increasing the number of stacked layers. Thus the so-called "staircase" patterning to form electrical connection between memory cells and word lines has become one of the primarily critical processes in 3D memory manufacture. To provide controllable critical dimension (CD) with good uniformity involving thick photo-resist has also been of particular concern for staircase patterning. The CD uniformity control has been widely investigated with relatively thinner resist associated with resolution limit dimension but thick resist coupling with wider dimension. This study explores CD uniformity control associated with thick photo-resist processing. Several critical parameters including exposure focus, exposure dose, baking condition, pattern size and development recipe, were found to strongly correlate with the thick photo-resist profile accordingly affecting the CD uniformity control. To minimize the within-wafer CD variation, the slightly tapered resist profile is proposed through well tailoring the exposure focus and dose together with optimal development recipe. Great improvements on DCD (ADI CD) and ECD (AEI CD) uniformity as well as line edge roughness were achieved through the optimization of photo resist profile.

Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory

NASA Astrophysics Data System (ADS)

Wang, Chenjie; Huo, Zongliang; Liu, Ziyu; Liu, Yu; Cui, Yanxiang; Wang, Yumei; Li, Fanghua; Liu, Ming

2013-07-01

The effects of interfacial fluorination on the metal/Al2O3/HfO2/SiO2/Si (MAHOS) memory structure have been investigated. By comparing MAHOS memories with and without interfacial fluorination, it was identified that the deterioration of the performance and reliability of MAHOS memories is mainly due to the formation of an interfacial layer that generates excess oxygen vacancies at the interface. Interfacial fluorination suppresses the growth of the interfacial layer, which is confirmed by X-ray photoelectron spectroscopy depth profile analysis, increases enhanced program/erase efficiency, and improves data retention characteristics. Moreover, it was observed that fluorination at the SiO-HfO interface achieves a more effective performance enhancement than that at the HfO-AlO interface.

The Forensic Potential of Flash Memory

DTIC Science & Technology

2009-09-01

limit range of 10 to 100 years before data is lost [12]. 5. Flash Memory Logical Structure The logical structure of flash memory from least to...area is not standardized and is manufacturer specific. This information will be used by the wear leveling algorithms and as such will be proprietary...memory cells, the manufacturers of the flash implement a wear leveling algorithm . In contrast, a magnetic disk in an overwrite operation will reuse the

An upconverted photonic nonvolatile memory.

PubMed

Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L

2014-08-21

Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

Overview of emerging nonvolatile memory technologies

PubMed Central

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

Overview of emerging nonvolatile memory technologies.

PubMed

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

Non Volatile Flash Memory Radiation Tests

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.; Allen, Greg

2012-01-01

Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

Investigation of multilayer WS2 flakes as charge trapping stack layers in non-volatile memories

NASA Astrophysics Data System (ADS)

Wang, Hong; Ren, Deliang; Lu, Chao; Yan, Xiaobing

2018-06-01

In this study, the non-volatile flash memory devices utilize tungsten sulfide flakes as the charge trapping stack layers were fabricated. The sandwiched structure of Pd/ZHO/WS2/ZHO/WS2/SiO2/Si manifests a memory window of 2.26 V and a high density of trapped charges 4.88 × 1012/cm2 under a ±5 V gate sweeping voltage. Moreover, the data retention results of as-fabricated non-volatile memories demonstrate that the high and low capacitance states are enhanced by 3.81% and 3.11%, respectively, after a measurement duration of 1.20 × 104 s. These remarkable achievements are probably attributed to the defects and band gap of WS2 flakes. Besides, the proposed memory fabrication is not only compatible with CMOS manufacturing processes but also gets rid of the high-temperature annealing process. Overall, this proposed non-volatile memory is highly attractive for low voltage, long data retention applications.

Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2010

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.

2010-01-01

High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) and multi-level cell (MLC) NAND flash memories manufactured by Micron Technology.

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

76 FR 41824 - In the Matter of Certain Flash Memory Chips And Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-15

... Memory Chips And Products Containing Same; Notice of Commission Determination Not To Review an Initial... unopposed motion to terminate in its entirety Inv. No. 337-TA-735, Certain Flash Memory Chips and Products... flash memory chips and products containing same by reason of infringement of certain claims of U.S...

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

NASA Astrophysics Data System (ADS)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

Radiation Tests of Highly scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories--Update 2011

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.

2011-01-01

High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) 32Gb and multi-level cell (MLC) 64Gb NAND flash memories manufactured by Micron Technology.

Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

NASA Astrophysics Data System (ADS)

Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir

2013-11-01

This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.

Resistive Switching of Ta2O5-Based Self-Rectifying Vertical-Type Resistive Switching Memory

NASA Astrophysics Data System (ADS)

Ryu, Sungyeon; Kim, Seong Keun; Choi, Byung Joon

2018-01-01

To efficiently increase the capacity of resistive switching random-access memory (RRAM) while maintaining the same area, a vertical structure similar to a vertical NAND flash structure is needed. In addition, the sneak-path current through the half-selected neighboring memory cell should be mitigated by integrating a selector device with each RRAM cell. In this study, an integrated vertical-type RRAM cell and selector device was fabricated and characterized. Ta2O5 as the switching layer and TaOxNy as the selector layer were used to preliminarily study the feasibility of such an integrated device. To make the side contact of the bottom electrode with active layers, a thick Al2O3 insulating layer was placed between the Pt bottom electrode and the Ta2O5/TaOxNy stacks. Resistive switching phenomena were observed under relatively low currents (below 10 μA) in this vertical-type RRAM device. The TaOxNy layer acted as a nonlinear resistor with moderate nonlinearity. Its low-resistance-state and high-resistance-state were well retained up to 1000 s.

76 FR 4375 - In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-25

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-683] In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... the United States after importation of certain MLC flash memory devices and products containing same...

78 FR 49287 - Certain Flash Memory Chips and Products Containing the Same Correction to Notice of Receipt of...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-13

... INTERNATIONAL TRADE COMMISSION [Docket No 2971] Certain Flash Memory Chips and Products Containing the Same Correction to Notice of Receipt of Complaint; Solicitation of Comments Relating to the Public..., Certain Flash Memory Chips and Products Containing the Same, DN 2971; the Commission solicited comments on...

A Fault-Tolerant Radiation-Robust Mass Storage Concept for Highly Scaled Flash Memory

NASA Astrophysics Data System (ADS)

Fuchs, Cristian M.; Trinitis, Carsten; Appel, Nicolas; Langer, Martin

2015-09-01

Future spacemissions will require vast amounts of data to be stored and processed aboard spacecraft. While satisfying operational mission requirements, storage systems must guarantee data integrity and recover damaged data throughout the mission. NAND-flash memories have become popular for space-borne high performance mass memory scenarios, though future storage concepts will rely upon highly scaled flash or other memory technologies. With modern flash memory, single bit erasure coding and RAID based concepts are insufficient. Thus, a fully run-time configurable, high performance, dependable storage concept, requiring a minimal set of logic or software. The solution is based on composite erasure coding and can be adjusted for altered mission duration or changing environmental conditions.

Novel conformal organic antireflective coatings for advanced I-line lithography

NASA Astrophysics Data System (ADS)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer

NASA Astrophysics Data System (ADS)

Shen, Yung-Shao; Chen, Kuen-Yi; Chen, Po-Chun; Chen, Teng-Chuan; Wu, Yung-Hsien

2017-03-01

Crystalline ZrTiO4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N2O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 105 program/erase cycles and 81.8% charge retention after 104 sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer.

PubMed

Shen, Yung-Shao; Chen, Kuen-Yi; Chen, Po-Chun; Chen, Teng-Chuan; Wu, Yung-Hsien

2017-03-08

Crystalline ZrTiO 4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF 4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N 2 O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 10 5 program/erase cycles and 81.8% charge retention after 10 4  sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Dynamic Forest: An Efficient Index Structure for NAND Flash Memory

NASA Astrophysics Data System (ADS)

Yang, Chul-Woong; Yong Lee, Ki; Ho Kim, Myoung; Lee, Yoon-Joon

In this paper, we present an efficient index structure for NAND flash memory, called the Dynamic Forest (D-Forest). Since write operations incur high overhead on NAND flash memory, D-Forest is designed to minimize write operations for index updates. The experimental results show that D-Forest significantly reduces write operations compared to the conventional B+-tree.

76 FR 40931 - In the Matter of Certain Flash Memory and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-12

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-685] In the Matter of Certain Flash Memory and... for importation, and the sale within the United States after importation of certain flash memory and... other agreements, written or oral, express or implied, between the parties concerning the subject matter...

75 FR 82071 - In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-29

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission Decision Not To Review the ALJ'S Final... States after importation of certain flash memory chips and products containing the same by reason of...

75 FR 82071 - In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-29

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission Decision Not To Review the ALJ's Final... flash memory chips and products containing the same by reason of infringement of various claims of...

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

Some Improvements in Utilization of Flash Memory Devices

NASA Technical Reports Server (NTRS)

Gender, Thomas K.; Chow, James; Ott, William E.

2009-01-01

Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

Models for Total-Dose Radiation Effects in Non-Volatile Memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Campbell, Philip Montgomery; Wix, Steven D.

The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models andmore » compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.« less

Performance analysis of three-dimensional-triple-level cell and two-dimensional-multi-level cell NAND flash hybrid solid-state drives

NASA Astrophysics Data System (ADS)

Sakaki, Yukiya; Yamada, Tomoaki; Matsui, Chihiro; Yamaga, Yusuke; Takeuchi, Ken

2018-04-01

In order to improve performance of solid-state drives (SSDs), hybrid SSDs have been proposed. Hybrid SSDs consist of more than two types of NAND flash memories or NAND flash memories and storage-class memories (SCMs). However, the cost of hybrid SSDs adopting SCMs is more expensive than that of NAND flash only SSDs because of the high bit cost of SCMs. This paper proposes unique hybrid SSDs with two-dimensional (2D) horizontal multi-level cell (MLC)/three-dimensional (3D) vertical triple-level cell (TLC) NAND flash memories to achieve higher cost-performance. The 2D-MLC/3D-TLC hybrid SSD achieves up to 31% higher performance than the conventional 2D-MLC/2D-TLC hybrid SSD. The factors of different performance between the proposed hybrid SSD and the conventional hybrid SSD are analyzed by changing its block size, read/write/erase latencies, and write unit of 3D-TLC NAND flash memory, by means of a transaction-level modeling simulator.

Within-wafer CD variation induced by wafer shape

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

2016-03-01

In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked vertical flash cell array has been proposed. In constructing 3D NAND flash memories, the bit number per unit area is increased as increasing the number of stacked layers. However, the increased number of stacked layers has made the film stress control extremely important for maintaining good process quality. The residual film stress alters the wafer shape accordingly several process impacts have been readily observed across wafer, such as film deposition non-uniformity, etch rate non-uniformity, wafer chucking error on scanner, materials coating/baking defects, overlay degradation and critical dimension (CD) non-uniformity. The residual tensile and compressive stresses on wafers will result in concave and convex wafer shapes, respectively. This study investigates within-wafer CD uniformity (CDU) associated with wafer shape change induced by the 3D NAND flash memory processes. Within-wafer CDU was correlated with several critical parameters including different wafer bow heights of concave and convex wafer shapes, photo resists with different post exposure baking (PEB) temperature sensitivities, and DoseMapper compensation. The results indicated the trend of within-wafer CDU maintains flat for convex wafer shapes with bow height up to +230um and concave wafer shapes with bow height ranging from 0 ~ -70um, while the within-wafer CDU trends up from -70um to -246um wafer bow heights. To minimize the within-wafer CD distribution induced by wafer warpage, carefully tailoring the film stack and thermal budget in the process flow for maintaining the wafer shape at CDU friendly range is indispensable and using photo-resist materials with lower PEB temperature sensitivity is also suggested. In addition, DoseMapper compensation is also an alternative to greatly suppress the within-wafer CD non-uniformity but the photo-resist profile variation induced by across-wafer PEB temperature non-uniformity attributed to wafer warpage is uncorrectable, and the photo-resist profile variation is believed to affect across-wafer etch bias uniformity to some degree.

Method for programming a flash memory

DOEpatents

Brosky, Alexander R.; Locke, William N.; Maher, Conrado M.

2016-08-23

A method of programming a flash memory is described. The method includes partitioning a flash memory into a first group having a first level of write-protection, a second group having a second level of write-protection, and a third group having a third level of write-protection. The write-protection of the second and third groups is disabled using an installation adapter. The third group is programmed using a Software Installation Device.

Memristive behavior in a junctionless flash memory cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Orak, Ikram; Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl; Ürel, Mustafa

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits themore » pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.« less

Effect of Radiation Exposure on the Retention of Commercial NAND Flash Memory

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Chen, D.; Friendlich, M.; Carts, M. A.; Seidleck, C. M.; LaBel, K. A.

2011-01-01

We have compared the data retention of irradiated commercial NAND flash memories with that of unirradiated controls. Under some circumstanc es, radiation exposure has a significant effect on the retention of f lash memories.

Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface

DTIC Science & Technology

2016-03-17

Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface Austin H. Roach, Matthew J. Gadlage, James D. Ingalls, Aaron...reliability and trust of memories is very important, but because of incomplete documentation provided by commercial vendors and a lack of low-level...shown here that useful information about the trust and reliability of COTS NAND Flash components can be obtained by going beyond the standard product

Titanium oxide nonvolatile memory device and its application

NASA Astrophysics Data System (ADS)

Wang, Wei

In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vanheusden, K.; Warren, W.L.; Devine, R.A.B.

It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protonsmore » are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).« less

Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

NASA Astrophysics Data System (ADS)

Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

2015-10-01

Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e

Giant Electroresistance in Edge Metal-Insulator-Metal Tunnel Junctions Induced by Ferroelectric Fringe Fields

PubMed Central

Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog

2016-01-01

An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475

Overlay degradation induced by film stress

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Liu, Yu-Lin; Luo, Shing-Ann; Yang, Mars; Yang, Elvis; Hung, Yung-Tai; Luoh, Tuung; Yang, T. H.; Chen, K. C.

2017-03-01

The semiconductor industry has continually sought the approaches to produce memory devices with increased memory cells per memory die. One way to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories is 3D stacked flash cell array. In constructing 3D NAND flash memories, increasing the number of stacked layers to build more memory cell number per unit area necessitates many high-aspect-ratio etching processes accordingly the incorporation of thick and unique etching hard-mask scheme has been indispensable. However, the ever increasingly thick requirement on etching hard-mask has made the hard-mask film stress control extremely important for maintaining good process qualities. The residual film stress alters the wafer shape consequently several process impacts have been readily observed across wafer, such as wafer chucking error on scanner, film peeling, materials coating and baking defects, critical dimension (CD) non-uniformity and overlay degradation. This work investigates the overlay and residual order performance indicator (ROPI) degradation coupling with increasingly thick advanced patterning film (APF) etching hard-mask. Various APF films deposited by plasma enhanced chemical vapor deposition (PECVD) method under different deposition temperatures, chemicals combinations, radio frequency powers and chamber pressures were carried out. And -342MPa to +80MPa film stress with different film thicknesses were generated for the overlay performance study. The results revealed the overlay degradation doesn't directly correlate with convex or concave wafer shapes but the magnitude of residual APF film stress, while increasing the APF thickness will worsen the overlay performance and ROPI strongly. High-stress APF film was also observed to enhance the scanner chucking difference and lead to more serious wafer to wafer overlay variation. To reduce the overlay degradation from ever increasingly thick APF etching hard-mask, optimizing the film stress of APF is the most effective way and high order overlay compensation is also helpful.

GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu

2015-06-24

Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less

Scaling Trends and Tradeoffs between Short Channel Effect and Channel Boosting Characteristics in Sub-20 nm Bulk/Silicon-on-Insulator NAND Flash Memory

NASA Astrophysics Data System (ADS)

Miyaji, Kousuke; Hung, Chinglin; Takeuchi, Ken

2012-04-01

The scaling trends and limitation in sub-20 nm a bulk and silicon-on-insulator (SOI) NAND flash memory is studied by the three-dimensional (3D) device simulation focusing on short channel effects (SCE), channel boost leakage and channel voltage boosting characteristics during the program-inhibit operation. Although increasing punch-through stopper doping concentration is effective for suppressing SCE in bulk NAND cells, the generation of junction leakage becomes serious. On the other hand, SCE can be suppressed by thinning the buried oxide (BOX) in SOI NAND cells. However, the boosted channel voltage decreases by the higher BOX capacitance. It is concluded that the scaling limitation is dominated by the junction leakage and channel boosting capability for bulk and SOI NAND flash cells, respectively, and the scaling limit is decreased to 9 nm using SOI NAND flash memory cells from 13 nm in bulk NAND flash memory cells.

Analysis on applicable error-correcting code strength of storage class memory and NAND flash in hybrid storage

NASA Astrophysics Data System (ADS)

Matsui, Chihiro; Kinoshita, Reika; Takeuchi, Ken

2018-04-01

A hybrid of storage class memory (SCM) and NAND flash is a promising technology for high performance storage. Error correction is inevitable on SCM and NAND flash because their bit error rate (BER) increases with write/erase (W/E) cycles, data retention, and program/read disturb. In addition, scaling and multi-level cell technologies increase BER. However, error-correcting code (ECC) degrades storage performance because of extra memory reading and encoding/decoding time. Therefore, applicable ECC strength of SCM and NAND flash is evaluated independently by fixing ECC strength of one memory in the hybrid storage. As a result, weak BCH ECC with small correctable bit is recommended for the hybrid storage with large SCM capacity because SCM is accessed frequently. In contrast, strong and long-latency LDPC ECC can be applied to NAND flash in the hybrid storage with large SCM capacity because large-capacity SCM improves the storage performance.

Role of Non-Volatile Memories in Automotive and IoT Markets

DTIC Science & Technology

2017-03-01

Role of Non-Volatile Memories in Automotive and IoT Markets Vipin Tiwari Director, Business Development and Product Marketing SST – A Wholly Own...automotive and Internet of Things (IoT) markets . Keywords: Embedded flash; Microcontrollers, Automotive; Internet of Things, IoT; Non-volatile memories...variou s types of non-volatile memories available in the market , bu t the floating-poly based embedded flash memories have been around the longest and

Space Radiation Effects in Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Johnston, A. H.

2001-01-01

Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions. Although EDAC worked well with older types of memory circuits, newer DRAMs use extremely complex internal architectures which has made it increasingly difficult to implement EDAC. Some newer DRAMs have also exhibited catastrophic latchup. Flash memories are an intriguing alternative to DRAMs because of their nonvolatile storage and extremely high storage density, particularly for applications where writing is done relatively infrequently. This paper discusses radiation effects in advanced flash memories, including general observations on scaling and architecture as well as the specific experience obtained at the Jet Propulsion Laboratory in evaluating high-density flash memories for use on the NASA mission to Europa, one of Jupiter's moons. This particular mission must pass through the Jovian radiation belts, which imposes a very demanding radiation requirement.

FPGA Flash Memory High Speed Data Acquisition

NASA Technical Reports Server (NTRS)

Gonzalez, April

2013-01-01

The purpose of this research is to design and implement a VHDL ONFI Controller module for a Modular Instrumentation System. The goal of the Modular Instrumentation System will be to have a low power device that will store data and send the data at a low speed to a processor. The benefit of such a system will give an advantage over other purchased binary IP due to the capability of allowing NASA to re-use and modify the memory controller module. To accomplish the performance criteria of a low power system, an in house auxiliary board (Flash/ADC board), FPGA development kit, debug board, and modular instrumentation board will be jointly used for the data acquisition. The Flash/ADC board contains four, 1 MSPS, input channel signals and an Open NAND Flash memory module with an analog to digital converter. The ADC, data bits, and control line signals from the board are sent to an Microsemi/Actel FPGA development kit for VHDL programming of the flash memory WRITE, READ, READ STATUS, ERASE, and RESET operation waveforms using Libero software. The debug board will be used for verification of the analog input signal and be able to communicate via serial interface with the module instrumentation. The scope of the new controller module was to find and develop an ONFI controller with the debug board layout designed and completed for manufacture. Successful flash memory operation waveform test routines were completed, simulated, and tested to work on the FPGA board. Through connection of the Flash/ADC board with the FPGA, it was found that the device specifications were not being meet with Vdd reaching half of its voltage. Further testing showed that it was the manufactured Flash/ADC board that contained a misalignment with the ONFI memory module traces. The errors proved to be too great to fix in the time limit set for the project.

Advanced error-prediction LDPC with temperature compensation for highly reliable SSDs

NASA Astrophysics Data System (ADS)

Tokutomi, Tsukasa; Tanakamaru, Shuhei; Iwasaki, Tomoko Ogura; Takeuchi, Ken

2015-09-01

To improve the reliability of NAND Flash memory based solid-state drives (SSDs), error-prediction LDPC (EP-LDPC) has been proposed for multi-level-cell (MLC) NAND Flash memory (Tanakamaru et al., 2012, 2013), which is effective for long retention times. However, EP-LDPC is not as effective for triple-level cell (TLC) NAND Flash memory, because TLC NAND Flash has higher error rates and is more sensitive to program-disturb error. Therefore, advanced error-prediction LDPC (AEP-LDPC) has been proposed for TLC NAND Flash memory (Tokutomi et al., 2014). AEP-LDPC can correct errors more accurately by precisely describing the error phenomena. In this paper, the effects of AEP-LDPC are investigated in a 2×nm TLC NAND Flash memory with temperature characterization. Compared with LDPC-with-BER-only, the SSD's data-retention time is increased by 3.4× and 9.5× at room-temperature (RT) and 85 °C, respectively. Similarly, the acceptable BER is increased by 1.8× and 2.3×, respectively. Moreover, AEP-LDPC can correct errors with pre-determined tables made at higher temperatures to shorten the measurement time before shipping. Furthermore, it is found that one table can cover behavior over a range of temperatures in AEP-LDPC. As a result, the total table size can be reduced to 777 kBytes, which makes this approach more practical.

A SONOS device with a separated charge trapping layer for improvement of charge injection

NASA Astrophysics Data System (ADS)

Ahn, Jae-Hyuk; Moon, Dong-Il; Ko, Seung-Won; Kim, Chang-Hoon; Kim, Jee-Yeon; Kim, Moon-Seok; Seol, Myeong-Lok; Moon, Joon-Bae; Choi, Ji-Min; Oh, Jae-Sub; Choi, Sung-Jin; Choi, Yang-Kyu

2017-03-01

A charge trapping layer that is separated from the primary gate dielectric is implemented on a FinFET SONOS structure. By virtue of the reduced effective oxide thickness of the primary gate dielectric, a strong gate-to-channel coupling is obtained and thus short-channel effects in the proposed device are effectively suppressed. Moreover, a high program/erase speed and a large shift in the threshold voltage are achieved due to the improved charge injection by the reduced effective oxide thickness. The proposed structure has potential for use in high speed flash memory.

Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2012

NASA Technical Reports Server (NTRS)

Irom, Farokh; Allen, Gregory R.

2012-01-01

The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

Fast neutron irradiation tests of flash memories used in space environment at the ISIS spallation neutron source

NASA Astrophysics Data System (ADS)

Andreani, C.; Senesi, R.; Paccagnella, A.; Bagatin, M.; Gerardin, S.; Cazzaniga, C.; Frost, C. D.; Picozza, P.; Gorini, G.; Mancini, R.; Sarno, M.

2018-02-01

This paper presents a neutron accelerated study of soft errors in advanced electronic devices used in space missions, i.e. Flash memories performed at the ChipIr and VESUVIO beam lines at the ISIS spallation neutron source. The two neutron beam lines are set up to mimic the space environment spectra and allow neutron irradiation tests on Flash memories in the neutron energy range above 10 MeV and up to 800 MeV. The ISIS neutron energy spectrum is similar to the one occurring in the atmospheric as well as in space and planetary environments, with intensity enhancements varying in the range 108- 10 9 and 106- 10 7 respectively. Such conditions are suitable for the characterization of the atmospheric, space and planetary neutron radiation environments, and are directly applicable for accelerated tests of electronic components as demonstrated here in benchmark measurements performed on flash memories.

An Analysis of MARSIS Radar Flash Memory Data from Lunae Planum, Mars: Searching for Subsurface Structures.

NASA Astrophysics Data System (ADS)

Caprarelli, G.; Orosei, R.; Mastrogiuseppe, M.; Cartacci, M.

2017-12-01

Lunae Planum is a Martian plain measuring approximately 1000 km in width and 2000 km in length, centered at coordinates 294°E-11°N. MOLA elevations range from +2500 m to +500 m in the south, gently sloping northward to -500 m. The plain is part of a belt of terrains located between the southern highlands and the northern lowlands, that are transitional in character (e.g., by elevation, age and morphology). These transitional terrains are poorly understood, in part because of their relative lack of major geomorphological features. They record however a very significant part of Mars's geologic history. The most evident features on Lunae Planum's Hesperian surface are regularly spaced, longitudinally striking, wrinkle ridges. These indicate the presence of blind thrust faults cutting through thick stacks of layers of volcanic or sedimentary rocks. The presence of fluidized ejecta craters scattered all over the region suggests also the presence of ice or volatiles in the subsurface. In a preliminary study of Lunae Planum's subsurface we used the Mars Express ground penetrating radar MARSIS dataset [1], in order to detect reflectors that could indicate the presence of fault planes or layering. Standard radargrams however, provided no evidence of changes in value of dielectric constant that could indicate possible geologic discontinuities or stratification of physically diverse materials. We thus started a new investigation based on processing of raw MARSIS data. Here we report on the preliminary results of this study. We searched the MARSIS archive for raw data stored in flash memory. When operating with flash storage, the radar collects 2 frequency bands along-track covering a distance = 100-250 km, depending on the orbiter altitude [2]. We found flash memory data from 24 orbits over the area. We processed the data focusing radar returns in off-nadir directions, to maximize the likelihood of detecting sloping subsurface structures, including those striking parallel to the Mars Express sub-polar orbits. We plan to follow this study by applying a new processor aimed at improving the resolution and signal to noise ratio of the data. [1] Caprarelli et al. (2017), LPSC 48, 1720. [2] Watters et al. (2017), LPSC 48, 1693.

Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

NASA Astrophysics Data System (ADS)

Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

2017-12-01

Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2010-01-01

This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

Asymmetric programming: a highly reliable metadata allocation strategy for MLC NAND flash memory-based sensor systems.

PubMed

Huang, Min; Liu, Zhaoqing; Qiao, Liyan

2014-10-10

While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash memory. In particular, it's critical to enhance metadata reliability, which occupies only a small portion of the storage space, but maintains the critical information of the file system and the address translations of the storage system. Metadata damage will cause the system to crash or a large amount of data to be lost. This paper presents Asymmetric Programming, a highly reliable metadata allocation strategy for MLC NAND flash memory storage systems. Our technique exploits for the first time the property of the multi-page architecture of MLC NAND flash memory to improve the reliability of metadata. The basic idea is to keep metadata in most significant bit (MSB) pages which are more reliable than least significant bit (LSB) pages. Thus, we can achieve relatively low bit error rates for metadata. Based on this idea, we propose two strategies to optimize address mapping and garbage collection. We have implemented Asymmetric Programming on a real hardware platform. The experimental results show that Asymmetric Programming can achieve a reduction in the number of page errors of up to 99.05% with the baseline error correction scheme.

Asymmetric Programming: A Highly Reliable Metadata Allocation Strategy for MLC NAND Flash Memory-Based Sensor Systems

PubMed Central

Huang, Min; Liu, Zhaoqing; Qiao, Liyan

2014-01-01

While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash memory. In particular, it's critical to enhance metadata reliability, which occupies only a small portion of the storage space, but maintains the critical information of the file system and the address translations of the storage system. Metadata damage will cause the system to crash or a large amount of data to be lost. This paper presents Asymmetric Programming, a highly reliable metadata allocation strategy for MLC NAND flash memory storage systems. Our technique exploits for the first time the property of the multi-page architecture of MLC NAND flash memory to improve the reliability of metadata. The basic idea is to keep metadata in most significant bit (MSB) pages which are more reliable than least significant bit (LSB) pages. Thus, we can achieve relatively low bit error rates for metadata. Based on this idea, we propose two strategies to optimize address mapping and garbage collection. We have implemented Asymmetric Programming on a real hardware platform. The experimental results show that Asymmetric Programming can achieve a reduction in the number of page errors of up to 99.05% with the baseline error correction scheme. PMID:25310473

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

NASA Technical Reports Server (NTRS)

Li, Yue (Inventor); Bruck, Jehoshua (Inventor)

2018-01-01

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Investigation of Current Spike Phenomena During Heavy Ion Irradiation of NAND Flash Memories

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Berg, Melanie; Friendlich, Mark; Wilcox, Ted; Seidleck, Christina; LaBel, Kenneth A.; Irom, Farokh; Buchner, Steven P.; McMorrow, Dale; Mavis, David G.;

Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

NASA Astrophysics Data System (ADS)

Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

2014-11-01

Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

Multi-Level Bitmap Indexes for Flash Memory Storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Kesheng; Madduri, Kamesh; Canon, Shane

2010-07-23

Due to their low access latency, high read speed, and power-efficient operation, flash memory storage devices are rapidly emerging as an attractive alternative to traditional magnetic storage devices. However, tests show that the most efficient indexing methods are not able to take advantage of the flash memory storage devices. In this paper, we present a set of multi-level bitmap indexes that can effectively take advantage of flash storage devices. These indexing methods use coarsely binned indexes to answer queries approximately, and then use finely binned indexes to refine the answers. Our new methods read significantly lower volumes of data atmore » the expense of an increased disk access count, thus taking full advantage of the improved read speed and low access latency of flash devices. To demonstrate the advantage of these new indexes, we measure their performance on a number of storage systems using a standard data warehousing benchmark called the Set Query Benchmark. We observe that multi-level strategies on flash drives are up to 3 times faster than traditional indexing strategies on magnetic disk drives.« less

75 FR 11909 - In the Matter of: Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-12

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of: Certain Flash Memory Chips and Products Containing Same; Notice of Commission Determination Not To Review an Initial..., and the [[Page 11910

Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

PubMed

Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-05-01

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

NASA Astrophysics Data System (ADS)

Jayanti, Srikant

Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG in the form of PVD TaN was investigated along with high-k blocking dielectric. The material properties of TaN metal and high-k / low-k dielectric engineering were systematically studied. And the resulting memory structures exhibit excellent memory characteristics and scalability of the metal FG down to ˜1nm, which is promising in order to reduce the unwanted FG-FG interferences. In the later part of the study, the thermal stability of the combined stack was examined and various approaches to improve the stability and understand the cause of instability were explored. The performance of the high-k IPD metal FG memory structure was observed to degrade with higher annealing conditions and the deteriorated behavior was attributed to the leakage instability of the high-k /TaN capacitor. While the degradation is pronounced in both MIM and MIS capacitors, a higher leakage increment was seen in MIM, which was attributed to the higher degree of dielectric crystallization. In an attempt to improve the thermal stability, the trade-off in using amorphous interlayers to reduce the enhanced dielectric crystallization on metal was highlighted. Also, the effect of oxygen vacancies and grain growth on the dielectric leakage was studied through a multi-deposition-multi-anneal technique. Multi step deposition and annealing in a more electronegative ambient was observed to have a positive impact on the dielectric performance.

PIYAS-proceeding to intelligent service oriented memory allocation for flash based data centric sensor devices in wireless sensor networks.

PubMed

Rizvi, Sanam Shahla; Chung, Tae-Sun

2010-01-01

Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.

Radiation Issues and Applications of Floating Gate Memories

NASA Technical Reports Server (NTRS)

Scheick, L. Z.; Nguyen, D. N.

2000-01-01

The radiation effects that affect various systems that comprise floating gate memories are presented. The wear-out degradation results of unirradiated flash memories are compared to irradiated flash memories. The procedure analyzes the failure to write and erase caused by wear-out and degradation of internal charge pump circuits. A method is described for characterizing the radiation effects of the floating gate itself. The rate dependence, stopping power dependence, SEU susceptibility and applications of floating gate in radiation environment are presented. The ramifications for dosimetry and cell failure are discussed as well as for the long term use aspects of non-volatile memories.

Nonvolatile Memory Technology for Space Applications

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

2010-01-01

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

Light flash phenomena induced by HzE particles

NASA Technical Reports Server (NTRS)

Mcnulty, P. J.; Pease, V. P.

1980-01-01

Astronauts and Apollo and Skylab missions have reported observing a variety of visual phenomena when their eyes are closed and adapted to darkness. These phenomena have been collectively labelled as light flashes. Visual phenomena which are similar in appearance to those observed in space have been demonstrated at the number of accelerator facilities by expressing the eyes of human subjects to beams of various types of radiation. In some laboratory experiments Cerenkov radiation was found to be the basis for the flashes observed while in other experiments Cerenkov radiation could apparently be ruled out. Experiments that differentiate between Cerenkov radiation and other possible mechanisms for inducing visual phenomena was then compared. The phenomena obtained in the presence and absence of Cerenkov radiation were designed and conducted. A new mechanism proposed to explain the visual phenomena observed by Skylab astronauts as they passed through the South Atlantic Anomaly, namely nuclear interactions in and near the sensitive layer of the retina, is covered. Also some studies to search for similar transient effects of space radiation on sensors and microcomputer memories are described.

A study of the switching mechanism and electrode material of fully CMOS compatible tungsten oxide ReRAM

NASA Astrophysics Data System (ADS)

Chien, W. C.; Chen, Y. C.; Lai, E. K.; Lee, F. M.; Lin, Y. Y.; Chuang, Alfred T. H.; Chang, K. P.; Yao, Y. D.; Chou, T. H.; Lin, H. M.; Lee, M. H.; Shih, Y. H.; Hsieh, K. Y.; Lu, Chih-Yuan

2011-03-01

Tungsten oxide (WO X ) resistive memory (ReRAM), a two-terminal CMOS compatible nonvolatile memory, has shown promise to surpass the existing flash memory in terms of scalability, switching speed, and potential for 3D stacking. The memory layer, WO X , can be easily fabricated by down-stream plasma oxidation (DSPO) or rapid thermal oxidation (RTO) of W plugs universally used in CMOS circuits. Results of conductive AFM (C-AFM) experiment suggest the switching mechanism is dominated by the REDOX (Reduction-oxidation) reaction—the creation of conducting filaments leads to a low resistance state and the rupturing of the filaments results in a high resistance state. Our experimental results show that the reactions happen at the TE/WO X interface. With this understanding in mind, we proposed two approaches to boost the memory performance: (i) using DSPO to treat the RTO WO X surface and (ii) using Pt TE, which forms a Schottky barrier with WO X . Both approaches, especially the latter, significantly reduce the forming current and enlarge the memory window.

76 FR 13207 - In the Matter of Certain Flash Memory and Products Containing Same Notice of Request for...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-10

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-685] In the Matter of Certain Flash Memory and Products Containing Same Notice of Request for Statements on the Public Interest Section 337 of the Tariff Act of 1930 provides that if the Commission finds a violation it shall exclude the...

On the origin of resistive switching volatility in Ni/TiO{sub 2}/Ni stacks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cortese, Simone, E-mail: simone.cortese@soton.ac.uk; Trapatseli, Maria; Khiat, Ali

2016-08-14

Resistive switching and resistive random access memories have attracted huge interest for next generation nonvolatile memory applications, also thought to be able to overcome flash memories limitations when arranged in crossbar arrays. A cornerstone of their potential success is that the toggling between two distinct resistance states, usually a High Resistive State (HRS) and a Low Resistive State (LRS), is an intrinsic non-volatile phenomenon with the two states being thermodynamically stable. TiO{sub 2} is one of the most common materials known to support non-volatile RS. In this paper, we report a volatile resistive switching in a titanium dioxide thin filmmore » sandwiched by two nickel electrodes. The aim of this work is to understand the underlying physical mechanism that triggers the volatile effect, which is ascribed to the presence of a NiO layer at the bottom interface. The NiO layer alters the equilibrium between electric field driven filament formation and thermal enhanced ion diffusion, resulting in the volatile behaviour. Although the volatility is not ideal for non-volatile memory applications, it shows merit for access devices in crossbar arrays due to its high LRS/HRS ratio, which are also briefly discussed.« less

Radiation Tests on 2Gb NAND Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, Duc N.; Guertin, Steven M.; Patterson, J. D.

2006-01-01

We report on SEE and TID tests of highly scaled Samsung 2Gbits flash memories. Both in-situ and biased interval irradiations were used to characterize the response of the total accumulated dose failures. The radiation-induced failures can be categorized as followings: single event upset (SEU) read errors in biased and unbiased modes, write errors, and single-event-functional-interrupt (SEFI) failures.

From Secure Memories to Smart Card Security

NASA Astrophysics Data System (ADS)

Handschuh, Helena; Trichina, Elena

Non-volatile memory is essential in most embedded security applications. It will store the key and other sensitive materials for cryptographic and security applications. In this chapter, first an overview is given of current flash memory architectures. Next the standard security features which form the basis of so-called secure memories are described in more detail. Smart cards are a typical embedded application that is very vulnerable to attacks and that at the same time has a high need for secure non-volatile memory. In the next part of this chapter, the secure memories of so-called flash-based high-density smart cards are described. It is followed by a detailed analysis of what the new security challenges for such objects are.

Brownmillerite thin films as fast ion conductors for ultimate-performance resistance switching memory.

PubMed

Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk

2017-07-27

An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.

Nonvolatile memory chips: critical technology for high-performance recce systems

NASA Astrophysics Data System (ADS)

Kaufman, Bruce

2000-11-01

Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Active Flash: Performance-Energy Tradeoffs for Out-of-Core Processing on Non-Volatile Memory Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S

2012-01-01

In this abstract, we study the performance and energy tradeoffs involved in migrating data analysis into the flash device, a process we refer to as Active Flash. The Active Flash paradigm is similar to 'active disks', which has received considerable attention. Active Flash allows us to move processing closer to data, thereby minimizing data movement costs and reducing power consumption. It enables true out-of-core computation. The conventional definition of out-of-core solvers refers to an approach to process data that is too large to fit in the main memory and, consequently, requires access to disk. However, in Active Flash, processing outsidemore » the host CPU literally frees the core and achieves real 'out-of-core' analysis. Moving analysis to data has long been desirable, not just at this level, but at all levels of the system hierarchy. However, this requires a detailed study on the tradeoffs involved in achieving analysis turnaround under an acceptable energy envelope. To this end, we first need to evaluate if there is enough computing power on the flash device to warrant such an exploration. Flash processors require decent computing power to run the internal logic pertaining to the Flash Translation Layer (FTL), which is responsible for operations such as address translation, garbage collection (GC) and wear-leveling. Modern SSDs are composed of multiple packages and several flash chips within a package. The packages are connected using multiple I/O channels to offer high I/O bandwidth. SSD computing power is also expected to be high enough to exploit such inherent internal parallelism within the drive to increase the bandwidth and to handle fast I/O requests. More recently, SSD devices are being equipped with powerful processing units and are even embedded with multicore CPUs (e.g. ARM Cortex-A9 embedded processor is advertised to reach 2GHz frequency and deliver 5000 DMIPS; OCZ RevoDrive X2 SSD has 4 SandForce controllers, each with 780MHz max frequency Tensilica core). Efforts that take advantage of the available computing cycles on the processors on SSDs to run auxiliary tasks other than actual I/O requests are beginning to emerge. Kim et al. investigate database scan operations in the context of processing on the SSDs, and propose dedicated hardware logic to speed up scans. Also, cluster architectures have been explored, which consist of low-power embedded CPUs coupled with small local flash to achieve fast, parallel access to data. Processor utilization on SSD is highly dependent on workloads and, therefore, they can be idle during periods with no I/O accesses. We propose to use the available processing capability on the SSD to run tasks that can be offloaded from the host. This paper makes the following contributions: (1) We have investigated Active Flash and its potential to optimize the total energy cost, including power consumption on the host and the flash device; (2) We have developed analytical models to analyze the performance-energy tradeoffs for Active Flash, by treating the SSD as a blackbox, this is particularly valuable due to the proprietary nature of the SSD internal hardware; and (3) We have enhanced a well-known SSD simulator (from MSR) to implement 'on-the-fly' data compression using Active Flash. Our results provide a window into striking a balance between energy consumption and application performance.« less

Assessing Server Fault Tolerance and Disaster Recovery Implementation in Thin Client Architectures

DTIC Science & Technology

2007-09-01

server • Windows 2003 server Processor AMD Geode GX Memory 512MB Flash/256MB DDR RAM I/O/Peripheral Support • VGA-type video output (DB-15...2000 Advanced Server Processor AMD Geode NX 1500 Memory • 256MB or 512MB or 1GB DDR SDRAM • 1GB or 512MB Flash I/O/Peripheral Support • SiS741 GX

TID and SEE Response of an Advanced Samsung 4G NAND Flash Memory

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Friendlich, M.; Howard, J. W.; Berg, M. D.; Kim, H. S.; Irwin, T. L.; LaBel, K. A.

2007-01-01

Initial total ionizing dose (TID) and single event heavy ion test results are presented for an unhardened commercial flash memory, fabricated with 63 nm technology. Results are that the parts survive to a TID of nearly 200 krad (SiO2), with a tractable soft error rate of about 10(exp -l2) errors/bit-day, for the Adams Ten Percent Worst Case Environment.

Data Movement Dominates: Final Report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacob, Bruce L.

Over the past three years in this project, what we have observed is that the primary reason for data movement in large-scale systems is that the per-node capacity is not large enough—i.e., one of the solutions to the data-movement problem (certainly not the only solution that is required, but a significant one nonetheless) is to increase per-node capacity so that inter-node traffic is reduced. This unfortunately is not as simple as it sounds. Today’s main memory systems for datacenters, enterprise computing systems, and supercomputers, fail to provide high per-socket capacity [Dirik & Jacob 2009; Cooper-Balis et al. 2012], except atmore » extremely high price points (factors of 10–100x the cost/bit of consumer main-memory systems) [Stokes 2008]. The reason is that our choice of technology for today’s main memory systems—i.e., DRAM, which we have used as a main-memory technology since the 1970s [Jacob et al. 2007]—can no longer keep up with our needs for density and price per bit. Main memory systems have always been built from the cheapest, densest, lowest-power memory technology available, and DRAM is no longer the cheapest, the densest, nor the lowest-power storage technology out there. It is now time for DRAM to go the way that SRAM went: move out of the way for a cheaper, slower, denser storage technology, and become a cache instead. This inflection point has happened before, in the context of SRAM yielding to DRAM. There was once a time that SRAM was the storage technology of choice for all main memories [Tomasulo 1967; Thornton 1970; Kidder 1981]. However, once DRAM hit volume production in the 1970s and 80s, it supplanted SRAM as a main memory technology because it was cheaper, and it was denser. It also happened to be lower power, but that was not the primary consideration of the day. At the time, it was recognized that DRAM was much slower than SRAM, but it was only at the supercomputer level (For instance the Cray X-MP in the 1980s and its follow-on, the Cray Y-MP, in the 1990s) that could one afford to build ever- larger main memories out of SRAM—the reasoning for moving to DRAM was that an appropriately designed memory hierarchy, built of DRAM as main memory and SRAM as a cache, would approach the performance of SRAM, at the price-per-bit of DRAM [Mashey 1999]. Today it is quite clear that, were one to build an entire multi-gigabyte main memory out of SRAM instead of DRAM, one could improve the performance of almost any computer system by up to an order of magnitude—but this option is not even considered, because to build that system would be prohibitively expensive. It is now time to revisit the same design choice in the context of modern technologies and modern systems. For reasons both technical and economic, we can no longer afford to build ever-larger main memory systems out of DRAM. Flash memory, on the other hand, is significantly cheaper and denser than DRAM and therefore should take its place. While it is true that flash is significantly slower than DRAM, one can afford to build much larger main memories out of flash than out of DRAM, and we show that an appropriately designed memory hierarchy, built of flash as main memory and DRAM as a cache, will approach the performance of DRAM, at the price-per-bit of flash. In our studies as part of this project, we have investigated Non-Volatile Main Memory (NVMM), a new main-memory architecture for large-scale computing systems, one that is specifically designed to address the weaknesses described previously. In particular, it provides the following features: non-volatility: The bulk of the storage is comprised of NAND flash, and in this organization DRAM is used only as a cache, not as main memory. Furthermore, the flash is journaled, which means that operations such as checkpoint/restore are already built into the system. 1+ terabytes of storage per socket: SSDs and DRAM DIMMs have roughly the same form factor (several square inches of PCB surface area), and terabyte SSDs are now commonplace. performance approaching that of DRAM: DRAM is used as a cache to the flash system. price-per-bit approaching that of NAND: Flash is currently well under $0.50 per gigabyte; DDR3 SDRAM is currently just over $10 per gigabyte [Newegg 2014]. Even today, one can build an easily affordable main memory system with a terabyte or more of NAND storage per CPU socket (which would be extremely expensive were one to use DRAM), and our cycle- accurate, full-system experiments show that this can be done at a performance point that lies within a factor of two of DRAM.« less

Saccades to remembered targets: the effects of smooth pursuit and illusory stimulus motion

NASA Technical Reports Server (NTRS)

Zivotofsky, A. Z.; Rottach, K. G.; Averbuch-Heller, L.; Kori, A. A.; Thomas, C. W.; Dell'Osso, L. F.; Leigh, R. J.

1996-01-01

1. Measurements were made in four normal human subjects of the accuracy of saccades to remembered locations of targets that were flashed on a 20 x 30 deg random dot display that was either stationary or moving horizontally and sinusoidally at +/-9 deg at 0.3 Hz. During the interval between the target flash and the memory-guided saccade, the "memory period" (1.4 s), subjects either fixated a stationary spot or pursued a spot moving vertically sinusoidally at +/-9 deg at 0.3 Hz. 2. When saccades were made toward the location of targets previously flashed on a stationary background as subjects fixated the stationary spot, median saccadic error was 0.93 deg horizontally and 1.1 deg vertically. These errors were greater than for saccades to visible targets, which had median values of 0.59 deg horizontally and 0.60 deg vertically. 3. When targets were flashed as subjects smoothly pursued a spot that moved vertically across the stationary background, median saccadic error was 1.1 deg horizontally and 1.2 deg vertically, thus being of similar accuracy to when targets were flashed during fixation. In addition, the vertical component of the memory-guided saccade was much more closely correlated with the "spatial error" than with the "retinal error"; this indicated that, when programming the saccade, the brain had taken into account eye movements that occurred during the memory period. 4. When saccades were made to targets flashed during attempted fixation of a stationary spot on a horizontally moving background, a condition that produces a weak Duncker-type illusion of horizontal movement of the primary target, median saccadic error increased horizontally to 3.2 deg but was 1.1 deg vertically. 5. When targets were flashed as subjects smoothly pursued a spot that moved vertically on the horizontally moving background, a condition that induces a strong illusion of diagonal target motion, median saccadic error was 4.0 deg horizontally and 1.5 deg vertically; thus the horizontal error was greater than under any other experimental condition. 6. In most trials, the initial saccade to the remembered target was followed by additional saccades while the subject was still in darkness. These secondary saccades, which were executed in the absence of visual feedback, brought the eye closer to the target location. During paradigms involving horizontal background movement, these corrections were more prominent horizontally than vertically. 7. Further measurements were made in two subjects to determine whether inaccuracy of memory-guided saccades, in the horizontal plane, was due to mislocalization at the time that the target flashed, misrepresentation of the trajectory of the pursuit eye movement during the memory period, or both. 8. The magnitude of the saccadic error, both with and without corrections made in darkness, was mislocalized by approximately 30% of the displacement of the background at the time that the target flashed. The magnitude of the saccadic error also was influenced by net movement of the background during the memory period, corresponding to approximately 25% of net background movement for the initial saccade and approximately 13% for the final eye position achieved in darkness. 9. We formulated simple linear models to test specific hypotheses about which combinations of signals best describe the observed saccadic amplitudes. We tested the possibilities that the brain made an accurate memory of target location and a reliable representation of the eye movement during the memory period, or that one or both of these was corrupted by the illusory visual stimulus. Our data were best accounted for by a model in which both the working memory of target location and the internal representation of the horizontal eye movements were corrupted by the illusory visual stimulus. We conclude that extraretinal signals played only a minor role, in comparison with visual estimates of the direction of gaze, in planning eye movements to remembered targ.

On the generation of umbral flashes and running penumbral waves.

NASA Technical Reports Server (NTRS)

Moore, R. L.

1973-01-01

From a review of the observed properties of umbral flashes and running penumbral waves it is proposed that the source of these periodic phenomena is the oscillatory convection which Danielson and Savage (1968) and Savage (1969) have shown is likely to occur in the superadiabatic subphotospheric layers of sunspot umbras. Periods and growth rates are computed for oscillatory modes arising in a simple two-layer model umbra. The results suggest that umbral flashes result from disturbances produced by oscillatory convection occurring in the upper subphotospheric layer of the umbra, where the superadiabatic temperature gradient is much enhanced over that in lower layers, while running penumbral waves are due to oscillations in a layer just below this upper layer.

Feasibilty of a Multi-bit Cell Perpendicular Magnetic Tunnel Junction Device

NASA Astrophysics Data System (ADS)

Kim, Chang Soo

The ultimate objective of this research project was to explore the feasibility of making a multi-bit cell perpendicular magnetic tunnel junction (PMTJ) device to increase the storage density of spin-transfer-torque random access memory (STT-RAM). As a first step toward demonstrating a multi-bit cell device, this dissertation contributed a systematic and detailed study of developing a single cell PMTJ device using L10 FePt films. In the beginning of this research, 13 up-and-coming non-volatile memory (NVM) technologies were investigated and evaluated to see whether one of them might outperform NAND flash memories and even HDDs on a cost-per-TB basis in 2020. This evaluation showed that STT-RAM appears to potentially offer superior power efficiency, among other advantages. It is predicted that STTRAM's density could make it a promising candidate for replacing NAND flash memories and possibly HDDs if STTRAM could be improved to store multiple bits per cell. Ta/Mg0 under-layers were used first in order to develop (001) L1 0 ordering of FePt at a low temperature of below 400 °C. It was found that the tradeoff between surface roughness and (001) L10 ordering of FePt makes it difficult to achieve low surface roughness and good perpendicular magnetic properties simultaneously when Ta/Mg0 under-layers are used. It was, therefore, decided to investigate MgO/CrRu under-layers to simultaneously achieve smooth films with good ordering below 400°C. A well ordered 4 nm L10 FePt film with RMS surface roughness close to 0.4 nm, perpendicular coercivity of about 5 kOe, and perpendicular squareness near 1 was obtained at a deposition temperature of 390 °C on a thermally oxidized Si substrate when MgO/CrRu under-layers are used. A PMTJ device was developed by depositing a thin MgO tunnel barrier layer and a top L10 FePt film and then being postannealed at 450 °C for 30 minutes. It was found that the sputtering power needs to be minimized during the thin MgO tunnel barrier deposition because the high sputtering power can degrade perpendicular magnetic anisotropy of the bottom L1 0 FePt film and also increase RMS film surface roughness of the MgO tunnel barrier layer. From a lithographically unpatterned PMTJ sample, MR ratio and RA were measured at room temperature by the CIPT method and found to be 138% and 6.4 kOmicrom2, respectively. A completed PMTJ test pattern with a junction size of 80x40 microm2 was fabricated and showed a measured MR ratio and RA product of 108% and 4~6 kOmicrom 2, respectively. These values agree relatively well with the corresponding values of 138% and 6.4 kOmicrom2 obtained from the unpatterned PMTJ sample measured by a current-in-plane tunneling (CIPT) method.

The Thermal Diffusivity Measurement of the Two-layer Ceramics Using the Laser Flash Methodn

NASA Astrophysics Data System (ADS)

Akoshima, Megumi; Ogwa, Mitsue; Baba, Tetsuya; Mizuno, Mineo

Ceramics-based thermal barrier coatings are used as heat and wear shields of gas turbines. There are strong needs to evaluate thermophysical properties of coating, such as thermal conductivity, thermal diffusivity and heat capacity of them. Since the coatings are attached on substrates, it is no easy to measure these properties separately. The laser flash method is one of the most popular thermal diffusivity measurement methods above room temperature for solid materials. The surface of the plate shape specimen is heated by the pulsed laser-beam, then the time variation of the temperature of the rear surface is observed by the infrared radiometer. The laser flash method is non-contact and short time measurement. In general, the thermal diffusivity of solids that are dense, homogeneous and stable, are measured by this method. It is easy to measure thermal diffusivity of a specimen which shows heat diffusion time about 1 ms to 1 s consistent with the specimen thickness of about 1 mm to 5 mm. On the other hand, this method can be applied to measure the specific heat capacity of the solids. And it is also used to estimate the thermal diffusivity of an unknown layer in the layered materials. In order to evaluate the thermal diffusivity of the coating attached on substrate, we have developed a measurement procedure using the laser flash method. The multi-layer model based on the response function method was applied to calculate the thermal diffusivity of the coating attached on substrate from the temperature history curve observed for the two-layer sample. We have verified applicability of the laser flash measurement with the multi-layer model using the measured results and the simulation. It was found that the laser flash measurement for the layered sample using the multi-layer model was effective to estimate the thermal diffusivity of an unknown layer in the sample. We have also developed the two-layer ceramics samples as the reference materials for this procedure.

Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

NASA Astrophysics Data System (ADS)

Natarajarathinam, Anusha

Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

Method for providing uranium with a protective copper coating

DOEpatents

Waldrop, Forrest B.; Jones, Edward

1981-01-01

The present invention is directed to a method for providing uranium metal with a protective coating of copper. Uranium metal is subjected to a conventional cleaning operation wherein oxides and other surface contaminants are removed, followed by etching and pickling operations. The copper coating is provided by first electrodepositing a thin and relatively porous flash layer of copper on the uranium in a copper cyanide bath. The resulting copper-layered article is then heated in an air or inert atmosphere to volatilize and drive off the volatile material underlying the copper flash layer. After the heating step an adherent and essentially non-porous layer of copper is electro-deposited on the flash layer of copper to provide an adherent, multi-layer copper coating which is essentially impervious to corrosion by most gases.

Investigation of multi-state charge-storage properties of redox-active organic molecules in silicon-molecular hybrid devices for DRAM and Flash applications

NASA Astrophysics Data System (ADS)

Gowda, Srivardhan Shivappa

Molecular electronics has recently spawned a considerable amount of interest with several molecules possessing charge-conduction and charge-storage properties proposed for use in electronic devices. Hybrid silicon-molecular technology has the promise of augmenting the current silicon technology and provide for a transitional path to future molecule-only technology. The focus of this dissertation work has been on developing a class of hybrid silicon-molecular electronic devices for DRAM and Flash memory applications utilizing redox-active molecules. This work exploits the ability of molecules to store charges with single-electron precision at room temperature. The hybrid devices are fabricated by forming self-assembled monolayers of redox-active molecules on Si and oxide (SiO2 and HfO2) surfaces via formation of covalent linkages. The molecules possess discrete quantum states from which electrons can tunnel to the Si substrate at discrete applied voltages (oxidation process, cell write), leaving behind a positively charged layer of molecules. The reduction (erase) process, which is the process of electrons tunneling back from Si to the molecules, neutralizes the positively charged molecular monolayer. Hybrid silicon-molecular capacitor test structures were electrically characterized with an electrolyte gate using cyclic voltammetry (CyV) and impedance spectroscopy (CV) techniques. The redox voltages, kinetics (write/erase speeds) and charge-retention characteristics were found to be strongly dependent on the Si doping type and densities, and ambient light. It was also determined that the redox energy states in the molecules communicate with the valence band of the Si substrate. This allows tuning of write and read states by modulating minority carriers in n- and p-Si substrates. Ultra-thin dielectric tunnel barriers (SiO2, HfO2) were placed between the molecules and the Si substrate to augment charge-retention for Flash memory applications. The redox response was studied as a function of tunnel oxide thickness, dielectric permittivity and energy barrier, and modified Butler-Volmer expressions were postulated to describe the redox kinetics. The speed vs. retention performance of the devices was improved via asymmetric layered tunnel barriers. The properties of molecules can be tailored by molecular design and synthetic chemistry. In this work, it was demonstrated that an alternate route to tune/enhance the properties of the hybrid device is to engineer the substrate (silicon) component. The molecules were attached to diode surfaces to tune redox voltages and improve charge-retention characteristics. N+ pockets embedded in P-Si well were utilized to obtain multiple states from a two-state molecule. The structure was also employed as a characterization tool in investigating the intrinsic properties of the molecules such as lateral conductivity within the monolayer. Redox molecules were also incorporated on an ultra thin gate-oxide of Si MOSFETs with the intent of studying the interaction of redox states with Si MOSFETs. The discrete molecular states were manifested in the drain current and threshold voltage characteristics of the device. This work demonstrates the multi-state modulation of Si-MOSFETs' drain current via redox-active molecular monolayers. Polymeric films of redox-active molecules were incorporated to improve the charge-density (ON/OFF ratio) and these structures may be employed for multi-state, low-voltage Flash memory applications. The most critical aspect of this research effort is to build a reliable and high density solid state memory technology. To this end, efforts were directed towards replacement of the electrolytic gate, which forms an extremely thin insulating double layer (˜10 nm) at the electrolyte-molecule interface, with a combination of an ultra-thin high-K dielectric layer and a metal gate. Several interesting observations were made in the research approaches towards integration and provided valuable insights into the electrolyte-redox systems. In summary, this work provides fundamental insights into the interaction of redox-energy states with silicon substrate and realistic approaches for exploiting the unique properties of the molecules that may enable solutions for nanoscale high density, low-voltage, long retention and multiple bit memory applications.

Radiation Effects on Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, D. N.; Guertin, S.; Swift, G. M.; Johnston, A. H.

1998-01-01

Flash memories have evolved very rapidly in recent ears. New design techniques such as multilevel storage have been proposed to increase storage density, and are now available commercially. Threshold voltage distributions for single- and three-level technologies are compared. In order to implement this technology special circuitry must be added to allow the amount of charge stored in the floating gate to be controlled within narrow limits during the writing and also to detect the different amounts of charge during reading.

A fast and low-power microelectromechanical system-based non-volatile memory device

PubMed Central

Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

2011-01-01

Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

Interactions of numerical and temporal stimulus characteristics on the control of response location by brief flashes of light.

PubMed

Fetterman, J Gregor; Killeen, P Richard

2011-09-01

Pigeons pecked on three keys, responses to one of which could be reinforced after 3 flashes of the houselight, to a second key after 6, and to a third key after 12. The flashes were arranged according to variable-interval schedules. Response allocation among the keys was a function of the number of flashes. When flashes were omitted, transitions occurred very late. Increasing flash duration produced a leftward shift in the transitions along a number axis. Increasing reinforcement probability produced a leftward shift, and decreasing reinforcement probability produced a rightward shift. Intermixing different flash rates within sessions separated allocations: Faster flash rates shifted the functions sooner in real time, but later in terms of flash count, and conversely for slower flash rates. A model of control by fading memories of number and time was proposed.

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

NASA Astrophysics Data System (ADS)

Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

2013-08-01

In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

Effects of botanicals and combined hormone therapy on cognition in postmenopausal women.

PubMed

Maki, Pauline M; Rubin, Leah H; Fornelli, Deanne; Drogos, Lauren; Banuvar, Suzanne; Shulman, Lee P; Geller, Stacie E

2009-01-01

The aim of this study was to characterize the effects of red clover, black cohosh, and combined hormone therapy on cognitive function in comparison to placebo in women with moderate to severe vasomotor symptoms. In a phase II randomized, double-blind, placebo-controlled study, 66 midlife women (of 89 from a parent study; mean age, 53 y) with 35 or more weekly hot flashes were randomized to receive red clover (120 mg), black cohosh (128 mg), 0.625 mg conjugated equine estrogens plus 2.5 mg medroxyprogesterone acetate (CEE/MPA), or placebo. Participants completed measures of verbal memory (primary outcome) and other cognitive measures (secondary outcomes) before and during the 12th treatment month. A subset of 19 women completed objective, physiological measures of hot flashes using ambulatory skin conductance monitors. Neither of the botanical treatments had an impact on any cognitive measure. Compared with placebo, CEE/MPA led to a greater decline in verbal learning (one of five verbal memory measures). This effect just missed statistical significance (P = 0.057) in unadjusted analyses but reached significance (P = 0.02) after adjusting for vasomotor symptoms. Neither of the botanical treatment groups showed a change in verbal memory that differed from the placebo group (Ps > 0.28), even after controlling for improvements in hot flashes. In secondary outcomes, CEE/MPA led to a decrease in immediate digit recall and an improvement in letter fluency. Only CEE/MPA significantly reduced objective hot flashes. Results indicate that a red clover (phytoestrogen) supplement or black cohosh has no effects on cognitive function. CEE/MPA reduces objective hot flashes but worsens some aspects of verbal memory.

Effects of Botanicals and Combined Hormone Therapy on Cognition in Postmenopausal Women

PubMed Central

Maki, Pauline M.; Rubin, Leah H.; Fornelli, Deanne; Drogos, Lauren; Banuvar, Suzanne; Shulman, Lee P.; Geller, Stacie E.

2009-01-01

Objective To characterize the effects of red clover, black cohosh, and combined hormone therapy on cognitive function in comparison to placebo in women with moderate to severe vasomotor symptoms. Design In a Phase II randomized, double-blind, placebo-controlled study, 66 midlife women (out of 89 from a parent study; mean age=53 y) with ≥ 35 weekly hot flashes were randomized to receive red clover (120 mg), black cohosh (128 mg), CEE/MPA (0.625 mg conjugated equine estrogens plus 2.5 mg medroxyprogesterone acetate), or placebo. Participants completed measures of verbal memory (primary outcome) and other cognitive measures (secondary outcomes) before and during the 12th treatment month. A subset of 19 women completed objective, physiological measures of hot flashes using ambulatory skin conductance monitors. Results There was no impact of either of the botanical treatments on any cognitive measure. Compared to placebo, CEE/MPA led to greater decline in verbal learning (one of five verbal memory measures). This effect just missed statistical significance (p=0.057) in unadjusted analyses, but reached significance (p=.02) after adjusting for vasomotor symptoms. Neither botanical treatment group showed a change in verbal memory that differed from the placebo group (ps>0.28), even after controlling for improvements in hot flashes. In secondary outcomes, CEE/MPA led to a decrease in immediate digit recall and an improvement in letter fluency. Only CEE/MPA significantly reduced objective hot flashes. Conclusions Results indicate no effects of a red clover (phytoestrogen) supplement or black cohosh on cognitive function. CEE/MPA reduces objective hot flashes but worsens some aspects of verbal memory. PMID:19590458

Electric-field-controlled interface dipole modulation for Si-based memory devices.

PubMed

Miyata, Noriyuki

2018-05-31

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Channel doping concentration and cell program state dependence on random telegraph noise spatial and statistical distribution in 30 nm NAND flash memory

NASA Astrophysics Data System (ADS)

Tomita, Toshihiro; Miyaji, Kousuke

2015-04-01

The dependence of spatial and statistical distribution of random telegraph noise (RTN) in a 30 nm NAND flash memory on channel doping concentration NA and cell program state Vth is comprehensively investigated using three-dimensional Monte Carlo device simulation considering random dopant fluctuation (RDF). It is found that single trap RTN amplitude ΔVth is larger at the center of the channel region in the NAND flash memory, which is closer to the jellium (uniform) doping results since NA is relatively low to suppress junction leakage current. In addition, ΔVth peak at the center of the channel decreases in the higher Vth state due to the current concentration at the shallow trench isolation (STI) edges induced by the high vertical electrical field through the fringing capacitance between the channel and control gate. In such cases, ΔVth distribution slope λ cannot be determined by only considering RDF and single trap.

The influence of cognitive load on spatial search performance.

PubMed

Longstaffe, Kate A; Hood, Bruce M; Gilchrist, Iain D

2014-01-01

During search, executive function enables individuals to direct attention to potential targets, remember locations visited, and inhibit distracting information. In the present study, we investigated these executive processes in large-scale search. In our tasks, participants searched a room containing an array of illuminated locations embedded in the floor. The participants' task was to press the switches at the illuminated locations on the floor so as to locate a target that changed color when pressed. The perceptual salience of the search locations was manipulated by having some locations flashing and some static. Participants were more likely to search at flashing locations, even when they were explicitly informed that the target was equally likely to be at any location. In large-scale search, attention was captured by the perceptual salience of the flashing lights, leading to a bias to explore these targets. Despite this failure of inhibition, participants were able to restrict returns to previously visited locations, a measure of spatial memory performance. Participants were more able to inhibit exploration to flashing locations when they were not required to remember which locations had previously been visited. A concurrent digit-span memory task further disrupted inhibition during search, as did a concurrent auditory attention task. These experiments extend a load theory of attention to large-scale search, which relies on egocentric representations of space. High cognitive load on working memory leads to increased distractor interference, providing evidence for distinct roles for the executive subprocesses of memory and inhibition during large-scale search.

A low-voltage sense amplifier with two-stage operational amplifier clamping for flash memory

NASA Astrophysics Data System (ADS)

Guo, Jiarong

2017-04-01

A low-voltage sense amplifier with reference current generator utilizing two-stage operational amplifier clamp structure for flash memory is presented in this paper, capable of operating with minimum supply voltage at 1 V. A new reference current generation circuit composed of a reference cell and a two-stage operational amplifier clamping the drain pole of the reference cell is used to generate the reference current, which avoids the threshold limitation caused by current mirror transistor in the traditional sense amplifier. A novel reference voltage generation circuit using dummy bit-line structure without pull-down current is also adopted, which not only improves the sense window enhancing read precision but also saves power consumption. The sense amplifier was implemented in a flash realized in 90 nm flash technology. Experimental results show the access time is 14.7 ns with power supply of 1.2 V and slow corner at 125 °C. Project supported by the National Natural Science Fundation of China (No. 61376028).

SSD Market Overview

NASA Astrophysics Data System (ADS)

Wong, G.

The unparalleled cost and form factor advantages of NAND flash memory has driven 35 mm photographic film, floppy disks and one-inch hard drives to extinction. Due to its compelling price/performance characteristics, NAND Flash memory is now expanding its reach into the once-exclusive domain of hard disk drives and DRAM in the form of Solid State Drives (SSDs). Driven by the proliferation of thin and light mobile devices and the need for near-instantaneous accessing and sharing of content through the cloud, SSDs are expected to become a permanent fixture in the computing infrastructure.

Total Ionizing Dose Influence on the Single Event Effect Sensitivity in Samsung 8Gb NAND Flash Memories

NASA Astrophysics Data System (ADS)

Edmonds, Larry D.; Irom, Farokh; Allen, Gregory R.

2017-08-01

A recent model provides risk estimates for the deprogramming of initially programmed floating gates via prompt charge loss produced by an ionizing radiation environment. The environment can be a mixture of electrons, protons, and heavy ions. The model requires several input parameters. This paper extends the model to include TID effects in the control circuitry by including one additional parameter. Parameters intended to produce conservative risk estimates for the Samsung 8 Gb SLC NAND flash memory are given, subject to some qualifications.

Fault-tolerant NAND-flash memory module for next-generation scientific instruments

NASA Astrophysics Data System (ADS)

Lange, Tobias; Michel, Holger; Fiethe, Björn; Michalik, Harald; Walter, Dietmar

2015-10-01

Remote sensing instruments on today's space missions deliver a high amount of data which is typically evaluated on ground. Especially for deep space missions the telemetry downlink is very limited which creates the need for the scientific evaluation and thereby a reduction of data volume already on-board the spacecraft. A demanding example is the Polarimetric and Helioseismic Imager (PHI) instrument on Solar Orbiter. To enable on-board offline processing for data reduction, the instrument has to be equipped with a high capacity memory module. The module is based on non-volatile NAND-Flash technology, which requires more advanced operation than volatile DRAM. Unlike classical mass memories, the module is integrated into the instrument and allows readback of data for processing. The architecture and safe operation of such kind of memory module is described in the following paper.

Interactions of double patterning technology with wafer processing, OPC and design flows

NASA Astrophysics Data System (ADS)

Lucas, Kevin; Cork, Chris; Miloslavsky, Alex; Luk-Pat, Gerry; Barnes, Levi; Hapli, John; Lewellen, John; Rollins, Greg; Wiaux, Vincent; Verhaegen, Staf

2008-03-01

Double patterning technology (DPT) is one of the main options for printing logic devices with half-pitch less than 45nm; and flash and DRAM memory devices with half-pitch less than 40nm. DPT methods decompose the original design intent into two individual masking layers which are each patterned using single exposures and existing 193nm lithography tools. The results of the individual patterning layers combine to re-create the design intent pattern on the wafer. In this paper we study interactions of DPT with lithography, masks synthesis and physical design flows. Double exposure and etch patterning steps create complexity for both process and design flows. DPT decomposition is a critical software step which will be performed in physical design and also in mask synthesis. Decomposition includes cutting (splitting) of original design intent polygons into multiple polygons where required; and coloring of the resulting polygons. We evaluate the ability to meet key physical design goals such as: reduce circuit area; minimize rework; ensure DPT compliance; guarantee patterning robustness on individual layer targets; ensure symmetric wafer results; and create uniform wafer density for the individual patterning layers.

Improving NIR snow pit stratigraphy observations by introducing a controlled NIR light source

NASA Astrophysics Data System (ADS)

Dean, J.; Marshall, H.; Rutter, N.; Karlson, A.

2013-12-01

Near-infrared (NIR) photography in a prepared snow pit measures mm-/grain-scale variations in snow structure, as reflectivity is strongly dependent on microstructure and grain size at the NIR wavelengths. We explore using a controlled NIR light source to maximize signal to noise ratio and provide uniform incident, diffuse light on the snow pit wall. NIR light fired from the flash is diffused across and reflected by an umbrella onto the snow pit; the lens filter transmits NIR light onto the spectrum-modified sensor of the DSLR camera. Lenses are designed to refract visible light properly, not NIR light, so there must be a correction applied for the subsequent NIR bright spot. To avoid interpolation and debayering algorithms automatically performed by programs like Adobe's Photoshop on the images, the raw data are analyzed directly in MATLAB. NIR image data show a doubling of the amount of light collected in the same time for flash over ambient lighting. Transitions across layer boundaries in the flash-lit image are detailed by higher camera intensity values than ambient-lit images. Curves plotted using median intensity at each depth, normalized to the average profile intensity, show a separation between flash- and ambient-lit images in the upper 10-15 cm; the ambient-lit image curve asymptotically approaches the level of the flash-lit image curve below 15cm. We hypothesize that the difference is caused by additional ambient light penetrating the upper 10-15 cm of the snowpack from above and transmitting through the wall of the snow pit. This indicates that combining NIR ambient and flash photography could be a powerful technique for studying penetration depth of radiation as a function of microstructure and grain size. The NIR flash images do not increase the relative contrast at layer boundaries; however, the flash more than doubles the amount of recorded light and controls layer noise as well as layer boundary transition noise.

Don’t make cache too complex: A simple probability-based cache management scheme for SSDs

PubMed Central

Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme. PMID:28358897

Don't make cache too complex: A simple probability-based cache management scheme for SSDs.

PubMed

Baek, Seungjae; Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme.

Process solutions for reducing PR residue over non-planar wafer

NASA Astrophysics Data System (ADS)

Lin, C. H.; Huang, C. H.; Yang, Elvis; Yang, T. H.; Chen, K. C.; Lu, Chih-Yuan

2011-03-01

SAS (Self-Aligned Source) process has been widely adopted on manufacturing NOR Flash devices. To form the SAS structure, the compromise between small space patterning and sufficiently removing photo resist residue in topographical substrate has been a critical challenge as the device scaling down. In this study, photo simulation, layout optimization, resist processing and tri-layer materials were evaluated to form defect-free and highly extendible SAS structure for NOR Flash devices. Photo simulation suggested more coherent light source allowed the incident light to reach the trench bottom that facilitates the removal of photo resist. Mask bias also benefited the process latitude extension for residue-free SAS printing. In the photo resist processing, both lowering the SB (Soft Bake) and raising PEB (Post-Exposure Bake) temperature of photo resist were helpful to broaden the process window but the final pattern profile was not good enough. Thermal flow for pos-exposure pattern shrinkage achieved small CD (Critical Dimension) patterning with residue-free, however the materials loading effect is another issue to be addressed at memory array boundary. Tri-layer scheme demonstrated good results in terms of free from residue, better substrate reflectivity control, enabling smaller space printing to loosen overlay specification and minimizing the poly gate clipping defect. It was finally proposed to combine with etch effort to from the SAS structure. Besides it is also promising to extend to even smaller technology nodes.

Improved charge trapping properties by embedded graphene oxide quantum-dots for flash memory application

NASA Astrophysics Data System (ADS)

Jia, Xinlei; Yan, Xiaobing; Wang, Hong; Yang, Tao; Zhou, Zhenyu; Zhao, Jianhui

2018-06-01

In this work, we have investigated two kinds of charge trapping memory devices with Pd/Al2O3/ZnO/SiO2/p-Si and Pd/Al2O3/ZnO/graphene oxide quantum-dots (GOQDs)/ZnO/SiO2/p-Si structure. Compared with the single ZnO sample, the memory window of the ZnO-GOQDs-ZnO sample reaches a larger value (more than doubled) of 2.7 V under the sweeping gate voltage ± 7 V, indicating a better charge storage capability and the significant charge trapping effects by embedding the GOQDs trapping layer. The ZnO-GOQDs-ZnO devices have better date retention properties with the high and low capacitances loss of ˜ 1.1 and ˜ 6.9%, respectively, as well as planar density of the trapped charges of 1.48 × 1012 cm- 2. It is proposed that the GOQDs play an important role in the outstanding memory characteristics due to the deep quantum potential wells and the discrete distribution of the GOQDs. The long date retention time might have resulted from the high potential barrier which suppressed both the back tunneling and the leakage current. Intercalating GOQDs in the memory device is a promising method to realize large memory window, low-power consumption and excellent retention properties.

Flash drive memory apparatus and method

NASA Technical Reports Server (NTRS)

Hinchey, Michael G. (Inventor)

2010-01-01

A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

The future of memory

NASA Astrophysics Data System (ADS)

Marinella, M.

In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

Static Behavior of Chalcogenide Based Programmable Metallization Cells

NASA Astrophysics Data System (ADS)

Rajabi, Saba

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization. To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities. The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior. The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.

3-D Observation of dopant distribution at NAND flash memory floating gate using Atom probe tomography

NASA Astrophysics Data System (ADS)

Lee, Ji-hyun; Chae, Byeong-Kyu; Kim, Joong-Jeong; Lee, Sun Young; Park, Chan Gyung

2015-01-01

Dopant control becomes more difficult and critical as silicon devices become smaller. We observed the dopant distribution in a thermally annealed polysilicon gate using Transmission Electron Microscopy (TEM) and Atom probe tomography (APT). Phosphorus was doped at the silicon-nitride-diffusion-barrier-layer-covered polycrystalline silicon gate. Carbon also incorporated at the gate for the enhancement of operation uniformity. The impurity distribution was observed using atom probe tomography. The carbon atoms had segregated at grain boundaries and suppressed silicon grain growth. Phosphorus atoms, on the other hand, tended to pile-up at the interface. A 1-nm-thick diffusion barrier effectively blocked P atom out-diffusion. [Figure not available: see fulltext.

Methods of flash sintering

DOE Office of Scientific and Technical Information (OSTI.GOV)

Raj, Rishi; Cologna, Marco; Francis, John S.

2016-05-10

This disclosure provides methods of flash sintering and compositions created by these methods. Methods for sintering multilayered bodies are provided in which a sintered body is produced in less than one minute. In one aspect, each layer is of a different composition, and may be constituted wholly from a ceramic or from a combination of ceramic and metallic particles. When the body includes a layer of an anode composition, a layer of an electrolyte composition and a layer of a cathode composition, the sintered body can be used to produce a solid oxide fuel cell.

Low-temperature post-deposition annealing investigation for 3D charge trap flash memory by Kelvin probe force microscopy

NASA Astrophysics Data System (ADS)

Huo, Zongliang; Jin, Lei; Han, Yulong; Li, Xinkai; Ye, Tianchun; Liu, Ming

2015-01-01

The influence of post-deposition annealing (PDA) temperature condition on charge distribution behavior of HfO2 thin films was systematically investigated by various-temperature Kelvin probe force microscopy technology. Contact potential difference profiles demonstrated that charge storage capability shrinks with decreasing annealing temperature from 1,000 to 500 °C and lower. Compared to 1,000 °C PDA, it was found that 500 °C PDA causes deeper effective trap energy level, suppresses lateral charge spreading, and improves the retention characteristics. It is concluded that low-temperature PDA can be adopted in 3D HfO2-based charge trap flash memory to improve the thermal treatment compatibility of the bottom peripheral logic and upper memory arrays.

Numerical model of a single nanocrystal devoted to the study of disordered nanocrystal floating gates of new flash memories

NASA Astrophysics Data System (ADS)

Leroy, Yann; Armeanu, Dumitru; Cordan, Anne-Sophie

2011-05-01

The improvement of our model concerning a single nanocrystal that belongs to a nanocrystal floating gate of a flash memory is presented. In order to extend the gate voltage range applicability of the model, the 3D continuum of states of either metallic or semiconducting electrodes is discretized into 2D subbands. Such an approach gives precise information about the mechanisms behind the charging or release processes of the nanocrystal. Then, the self-energy and screening effects of an electron within the nanocrystal are evaluated and introduced in the model. This enables a better determination of the operating point of the nanocrystal memory. The impact of those improvements on the charging or release time of the nanocrystal is discussed.

Structural and electrical properties of Se-hyperdoped Si via ion implantation and flash lamp annealing

NASA Astrophysics Data System (ADS)

Liu, Fang; Prucnal, S.; Yuan, Ye; Heller, R.; Berencén, Y.; Böttger, R.; Rebohle, L.; Skorupa, W.; Helm, M.; Zhou, S.

2018-06-01

We report on the hyperdoping of silicon with selenium obtained by ion implantation followed by flash lamp annealing. It is shown that the degree of crystalline lattice recovery of the implanted layers and the Se substitutional fraction depend on the pulse duration and energy density of the flash. While the annealing at low energy densities leads to an incomplete recrystallization, annealing at high energy densities results in a decrease of the substitutional fraction of impurities. The electrical properties of the implanted layers are well-correlated with the structural properties resulting from different annealing processing.

Portable Electromyograph

NASA Technical Reports Server (NTRS)

De Luca, Gianluca; De Luca, Carlo J.; Bergman, Per

2004-01-01

A portable electronic apparatus records electromyographic (EMG) signals in as many as 16 channels at a sampling rate of 1,024 Hz in each channel. The apparatus (see figure) includes 16 differential EMG electrodes (each electrode corresponding to one channel) with cables and attachment hardware, reference electrodes, an input/output-and-power-adapter unit, a 16-bit analog-to-digital converter, and a hand-held computer that contains a removable 256-MB flash memory card. When all 16 EMG electrodes are in use, full-bandwidth data can be recorded in each channel for as long as 8 hours. The apparatus is powered by a battery and is small enough that it can be carried in a waist pouch. The computer is equipped with a small screen that can be used to display the incoming signals on each channel. Amplitude and time adjustments of this display can be made easily by use of touch buttons on the screen. The user can also set up a data-acquisition schedule to conform to experimental protocols or to manage battery energy and memory efficiently. Once the EMG data have been recorded, the flash memory card is removed from the EMG apparatus and placed in a flash-memory- card-reading external drive unit connected to a personal computer (PC). The PC can then read the data recorded in the 16 channels. Preferably, before further analysis, the data should be stored in the hard drive of the PC. The data files are opened and viewed on the PC by use of special- purpose software. The software for operation of the apparatus resides in a random-access memory (RAM), with backup power supplied by a small internal lithium cell. A backup copy of this software resides on the flash memory card. In the event of loss of both main and backup battery power and consequent loss of this software, the backup copy can be used to restore the RAM copy after power has been restored. Accessories for this device are also available. These include goniometers, accelerometers, foot switches, and force gauges.

Checkpoint-Restart in User Space

DOE Office of Scientific and Technical Information (OSTI.GOV)

CRUISE implements a user-space file system that stores data in main memory and transparently spills over to other storage, like local flash memory or the parallel file system, as needed. CRUISE also exposes file contents fo remote direct memory access, allowing external tools to copy files to the parallel file system in the background with reduced CPU interruption.

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets of NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Kim, Hak; Phan, Anthony; Seidleck, Christina; LaBel, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found the single-event upset (SEU) cross section varied inversely with fluence. The SEU cross section decreased with increasing fluence. We attribute the effect to the variable upset sensitivities of the memory cells. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, heavy ion irradiation of devices with variable upset sensitivity distribution using typical fluence levels may underestimate the cross section and on-orbit event rate.

Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

NASA Technical Reports Server (NTRS)

Swift, G.

2002-01-01

JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

Endurance degradation and lifetime model of p-channel floating gate flash memory device with 2T structure

NASA Astrophysics Data System (ADS)

Wei, Jiaxing; Liu, Siyang; Liu, Xiaoqiang; Sun, Weifeng; Liu, Yuwei; Liu, Xiaohong; Hou, Bo

2017-08-01

The endurance degradation mechanisms of p-channel floating gate flash memory device with two-transistor (2T) structure are investigated in detail in this work. With the help of charge pumping (CP) measurements and Sentaurus TCAD simulations, the damages in the drain overlap region along the tunnel oxide interface caused by band-to-band (BTB) tunneling programming and the damages in the channel region resulted from Fowler-Nordheim (FN) tunneling erasure are verified respectively. Furthermore, the lifetime model of endurance characteristic is extracted, which can extrapolate the endurance degradation tendency and predict the lifetime of the device.

Tunable bandgap energy of fluorinated nanocrystals for flash memory applications produced by low-damage plasma treatment.

PubMed

Huang, Chi-Hsien; Lin, Chih-Ting; Wang, Jer-Chyi; Chou, Chien; Ye, Yu-Ren; Cheng, Bing-Ming; Lai, Chao-Sung

2012-11-30

A plasma system with a complementary filter to shield samples from damage during tetrafluoromethane (CF(4)) plasma treatment was proposed in order to incorporate fluorine atoms into gadolinium oxide nanocrystals (Gd(2)O(3)-NCs) for flash memory applications. X-ray photoelectron spectroscopy confirmed that fluorine atoms were successfully introduced into the Gd(2)O(3)-NCs despite the use of a filter in the plasma-enhanced chemical vapour deposition system to shield against several potentially damaging species. The number of incorporated fluorine atoms can be controlled by varying the treatment time. The optimized memory window of the resulting flash memory devices was twice that of devices treated by a filterless system because more fluorine atoms were incorporated into the Gd(2)O(3)-NCs film with very little damage. This enlarged the bandgap energy from 5.48 to 6.83 eV, as observed by ultraviolet absorption measurements. This bandgap expansion can provide a large built-in electric field that allows more charges to be stored in the Gd(2)O(3)-NCs. The maximum improvement in the retention characteristic was >60%. Because plasma damage during treatment is minimal, maximum fluorination can be achieved. The concept of simply adding a filter to a plasma system to prevent plasma damage exhibits great promise for functionalization or modification of nanomaterials for advanced nanoelectronics while introducing minimal defects.

Microdose Induced Data Loss on Floating Gate Memories

NASA Technical Reports Server (NTRS)

Guertin, Steven M.; Nguyen, Duc M.; Patterson, Jeffrey D.

2006-01-01

Heavy ion irradiation of flash memories shows loss of stored data. The fluence dependence is indicative of microdose effects. Other qualitative factors identifying the effect as microdose are discussed. The data is presented, and compared to statistical results of a microdose target-based model.

Method and apparatus for implementing material thermal property measurement by flash thermal imaging

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sun, Jiangang

A method and apparatus are provided for implementing measurement of material thermal properties including measurement of thermal effusivity of a coating and/or film or a bulk material of uniform property. The test apparatus includes an infrared camera, a data acquisition and processing computer coupled to the infrared camera for acquiring and processing thermal image data, a flash lamp providing an input of heat onto the surface of a two-layer sample with an enhanced optical filter covering the flash lamp attenuating an entire infrared wavelength range with a series of thermal images is taken of the surface of the two-layer sample.

High Performance Data Transfer for Distributed Data Intensive Sciences

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fang, Chin; Cottrell, R 'Les' A.; Hanushevsky, Andrew B.

We report on the development of ZX software providing high performance data transfer and encryption. The design scales in: computation power, network interfaces, and IOPS while carefully balancing the available resources. Two U.S. patent-pending algorithms help tackle data sets containing lots of small files and very large files, and provide insensitivity to network latency. It has a cluster-oriented architecture, using peer-to-peer technologies to ease deployment, operation, usage, and resource discovery. Its unique optimizations enable effective use of flash memory. Using a pair of existing data transfer nodes at SLAC and NERSC, we compared its performance to that of bbcp andmore » GridFTP and determined that they were comparable. With a proof of concept created using two four-node clusters with multiple distributed multi-core CPUs, network interfaces and flash memory, we achieved 155Gbps memory-to-memory over a 2x100Gbps link aggregated channel and 70Gbps file-to-file with encryption over a 5000 mile 100Gbps link.« less

A Temporal Locality-Aware Page-Mapped Flash Translation Layer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Youngjae; Gupta, Aayush; Urgaonkar, Bhuvan

2013-01-01

The poor performance of random writes has been a cause of major concern which needs to be addressed to better utilize the potential of flash in enterprise-scale environments. We examine one of the important causes of this poor performance: the design of the flash translation layer (FTL) which performs the virtual-to-physical address translations and hides the erase-before-write characteristics of flash. We propose a complete paradigm shift in the design of the core FTL engine from the existing techniques with our Demand-Based Flash Translation Layer (DFTL) which selectively caches page- level address mappings. Our experimental evaluation using FlashSim with realistic enterprise-scalemore » workloads endorses the utility of DFTL in enterprise-scale storage systems by demonstrating: 1) improved performance, 2) reduced garbage collection overhead and 3) better overload behavior compared with hybrid FTL schemes which are the most popular implementation methods. For example, a predominantly random-write dominant I/O trace from an OLTP application running at a large financial institution shows a 78% improvement in average response time (due to a 3-fold reduction in operations of the garbage collector), compared with the hybrid FTL scheme. Even for the well-known read-dominant TPC-H benchmark, for which DFTL introduces additional overheads, we improve system response time by 56%. Moreover, interestingly, when write-back cache on DFTL-based SSD is enabled, DFTL even outperforms the page-based FTL scheme, improving their response time by 72% in Financial trace.« less

Modeling of SONOS Memory Cell Erase Cycle

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

2011-01-01

Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

Non-Volatile Memory Technology Symposium 2001: Proceedings

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Daud, Taher; Strauss, Karl

2001-01-01

This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

SONOS Nonvolatile Memory Cell Programming Characteristics

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

Performance Evaluation and Improvement of Ferroelectric Field-Effect Transistor Memory

NASA Astrophysics Data System (ADS)

Yu, Hyung Suk

Flash memory is reaching scaling limitations rapidly due to reduction of charge in floating gates, charge leakage and capacitive coupling between cells which cause threshold voltage fluctuations, short retention times, and interference. Many new memory technologies are being considered as alternatives to flash memory in an effort to overcome these limitations. Ferroelectric Field-Effect Transistor (FeFET) is one of the main emerging candidates because of its structural similarity to conventional FETs and fast switching speed. Nevertheless, the performance of FeFETs have not been systematically compared and analyzed against other competing technologies. In this work, we first benchmark the intrinsic performance of FeFETs and other memories by simulations in order to identify the strengths and weaknesses of FeFETs. To simulate realistic memory applications, we compare memories on an array structure. For the comparisons, we construct an accurate delay model and verify it by benchmarking against exact HSPICE simulations. Second, we propose an accurate model for FeFET memory window since the existing model has limitations. The existing model assumes symmetric operation voltages but it is not valid for the practical asymmetric operation voltages. In this modeling, we consider practical operation voltages and device dimensions. Also, we investigate realistic changes of memory window over time and retention time of FeFETs. Last, to improve memory window and subthreshold swing, we suggest nonplanar junctionless structures for FeFETs. Using the suggested structures, we study the dimensional dependences of crucial parameters like memory window and subthreshold swing and also analyze key interference mechanisms.

Flash evaporation of liquid monomer particle mixture

DOEpatents

Affinito, John D.; Darab, John G.; Gross, Mark E.

1999-01-01

The present invention is a method of making a first solid composite polymer layer. The method has the steps of (a) mixing a liquid monomer with particles substantially insoluble in the liquid monomer forming a monomer particle mixture; (b) flash evaporating the particle mixture and forming a composite vapor; and (c) continuously cryocondensing said composite vapor on a cool substrate and cross-linking the cryocondensed film thereby forming the polymer layer.

Sentinel 2 MMFU: The first European Mass Memory System Based on NAND-Flash Storage Technology

NASA Astrophysics Data System (ADS)

Staehle, M.; Cassel, M.; Lonsdorfer, U.; Gliem, F.; Walter, D.; Fichna, T.

2011-08-01

Sentinel-2 is the multispectral optical mission of the EU-ESA GMES (Global Monitoring for Environment and Security) program, currently under development by Astrium-GmbH in Friedrichshafen (Germany) for a launch in 2013. The mission features a 490 Mbit/s optical sensor operating at high duty cycles, requiring in turn a large 2.4 Tbit on-board storage capacity.The required storage capacity motivated the selection of the NAND-Flash technology which was already secured by a lengthy period (2004-2009) of detailed testing, analysis and qualification by Astrium GmbH, IDA and ESTEC. The mass memory system is currently being realized by Astrium GmbH.

A 300MHz Embedded Flash Memory with Pipeline Architecture and Offset-Free Sense Amplifiers for Dual-Core Automotive Microcontrollers

NASA Astrophysics Data System (ADS)

Kajiyama, Shinya; Fujito, Masamichi; Kasai, Hideo; Mizuno, Makoto; Yamaguchi, Takanori; Shinagawa, Yutaka

A novel 300MHz embedded flash memory for dual-core microcontrollers with a shared ROM architecture is proposed. One of its features is a three-stage pipeline read operation, which enables reduced access pitch and therefore reduces performance penalty due to conflict of shared ROM accesses. Another feature is a highly sensitive sense amplifier that achieves efficient pipeline operation with two-cycle latency one-cycle pitch as a result of a shortened sense time of 0.63ns. The combination of the pipeline architecture and proposed sense amplifiers significantly reduces access-conflict penalties with shared ROM and enhances performance of 32-bit RISC dual-core microcontrollers by 30%.

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets in a NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond L.; Kim, Hak; Phan, Anthony; Seidleck, Christina; Label, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found that the single-event upset (SEU) cross section varied inversely with cumulative fluence. We attribute the effect to the variable upset sensitivities of the memory cells. Furthermore, the effect impacts only single cell upsets in general. The rate of multiple-bit upsets remained relatively constant with fluence. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, traditional SEE testing techniques may underestimate the on-orbit event rate for a device with variable upset sensitivity.

Characterization of nitride hole lateral transport in a charge trap flash memory by using a random telegraph signal method

NASA Astrophysics Data System (ADS)

Liu, Yu-Heng; Jiang, Cheng-Min; Lin, Hsiao-Yi; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan

2017-07-01

We use a random telegraph signal method to investigate nitride trapped hole lateral transport in a charge trap flash memory. The concept of this method is to utilize an interface oxide trap and its associated random telegraph signal as an internal probe to detect a local channel potential change resulting from nitride charge lateral movement. We apply different voltages to the drain of a memory cell and vary a bake temperature in retention to study the electric field and temperature dependence of hole lateral movement in a nitride. Thermal energy absorption by trapped holes in lateral transport is characterized. Mechanisms of hole lateral transport in retention are investigated. From the measured and modeled results, we find that thermally assisted trap-to-band tunneling is a major trapped hole emission mechanism in nitride hole lateral transport.

Pathological proof of cellular death in radiofrequency ablation therapy and correlation with flash echo imaging--an experiment study.

PubMed

Fujiki, Kei

2004-01-01

The aims of this study were to clarify the geographic distribution of complete cell death in the radiofrequency ablated area in a porcine liver experiment, and to evaluate the efficacy of ultrasonography using contrast media in detecting the area of Radiofrequency-induced cell death. Radiofrequency ablation was performed at 3 sites in each liver in seven swine with a RF2000TM radiofrequency generator using an expandable type needle electrode. The ablation area was investigated histologically by Hematoxylin-Eosin staining and NADH staining. The area of radiofrequency-induced cell death was correlated to the ultrasonographic findings using contrast media, by means of contrast harmonic imaging, flash echo imaging-subtraction and flash echo imaging-power Doppler. The ablation area showed three distinct regions. Although the HE staining did not indicate necrosis, the NADH staining showed a complete loss of cellular activity in the inner and middle layers of the ablation area. However, in the outer layer cells displaying cellular integrity were intermingled with the necrotic cells, indicating that some of the cells in this layer had a chance to survive. Further, in some cases the outer layer of the ablated area had irregular margins. The flash-echo power-doppler images were accurately correlated in size and shape to the pathologically proved region of complete cell death in the radiofrequency-induced lesions. In the marginal part of the radiofrequency ablation area, cell death was incomplete. Flash echo imaging-power doppler was a useful and sensitive real time imaging technique for accurate evaluation of the region of complete cell death.

Nano- and micro-structuring of fused silica using time-delay adjustable double flash ns-laser radiation

NASA Astrophysics Data System (ADS)

Lorenz, Pierre; Zhao, Xiongtao; Ehrhardt, Martin; Zagoranskiy, Igor; Zimmer, Klaus; Han, Bing

2018-02-01

Large area, high speed, nanopatterning of surfaces by laser ablation is challenging due to the required high accuracy of the optical and mechanical systems fulfilling the precision of nanopatterning process. Utilization of self-organization approaches can provide an alternative decoupling spot precision and field of machining. The laser-induced front side etching (LIFE) and laser-induced back side dry etching (LIBDE) of fused silica were studied using single and double flash nanosecond laser pulses with a wavelength of 532 nm where the time delay Δτ of the double flash laser pulses was adjusted from 50 ns to 10 μs. The fused silica can be etched at both processes assisted by a 10 nm chromium layer where the etching depth Δz at single flash laser pulses is linear to the laser fluence and independent on the number of laser pulses, from 2 to 12 J/cm2, it is Δz = δLIFE/LIBDE . Φ with δLIFE 16 nm/(J/cm2) and δLIBDE 5.2 nm/(J/cm2) 3 . δLIFE. At double flash laser pulses, the Δz is dependent on the time delay Δτ of the laser pulses and the Δz slightly increased at decreasing Δτ. Furthermore, the surface nanostructuring of fused silica using IPSM-LIFE (LIFE using in-situ pre-structured metal layer) method with a single double flash laser pulse was tested. The first pulse of the double flash results in a melting of the metal layer. The surface tension of the liquid metal layer tends in a droplet formation process and dewetting process, respectively. If the liquid phase life time ΔtLF is smaller than the droplet formation time the metal can be "frozen" in an intermediated state like metal bare structures. The second laser treatment results in a evaporation of the metal and in a partial evaporation and melting of the fused silica surface, where the resultant structures in the fused silica surface are dependent on the lateral geometry of the pre-structured metal layer. A successful IPSM-LIFE structuring could be achieved assisted by a 20 nm molybdenum layer at Δτ >= 174 ns. That path the way for the high speed ultra-fast nanostructuring of dielectric surfaces by self-organizing processes. The different surface structures were analyzed by scanning electron microscopy (SEM) and white light interferometry (WLI).

A light writable microfluidic "flash memory": optically addressed actuator array with latched operation for microfluidic applications.

PubMed

Hua, Zhishan; Pal, Rohit; Srivannavit, Onnop; Burns, Mark A; Gulari, Erdogan

2008-03-01

This paper presents a novel optically addressed microactuator array (microfluidic "flash memory") with latched operation. Analogous to the address-data bus mediated memory address protocol in electronics, the microactuator array consists of individual phase-change based actuators addressed by localized heating through focused light patterns (address bus), which can be provided by a modified projector or high power laser pointer. A common pressure manifold (data bus) for the entire array is used to generate large deflections of the phase change actuators in the molten phase. The use of phase change material as the working media enables latched operation of the actuator array. After the initial light "writing" during which the phase is temporarily changed to molten, the actuated status is self-maintained by the solid phase of the actuator without power and pressure inputs. The microfluidic flash memory can be re-configured by a new light illumination pattern and common pressure signal. The proposed approach can achieve actuation of arbitrary units in a large-scale array without the need for complex external equipment such as solenoid valves and electrical modules, which leads to significantly simplified system implementation and compact system size. The proposed work therefore provides a flexible, energy-efficient, and low cost multiplexing solution for microfluidic applications based on physical displacements. As an example, the use of the latched microactuator array as "normally closed" or "normally open" microvalves is demonstrated. The phase-change wax is fully encapsulated and thus immune from contamination issues in fluidic environments.

Flash evaporation of liquid monomer particle mixture

DOEpatents

Affinito, J.D.; Darab, J.G.; Gross, M.E.

1999-05-11

The present invention is a method of making a first solid composite polymer layer. The method has the steps of (a) mixing a liquid monomer with particles substantially insoluble in the liquid monomer forming a monomer particle mixture; (b) flash evaporating the particle mixture and forming a composite vapor; and (c) continuously cryocondensing said composite vapor on a cool substrate and cross-linking the cryocondensed film thereby forming the polymer layer. 3 figs.

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

New approach for producing chemical templates over large area by Molecular Transfer Printing

NASA Astrophysics Data System (ADS)

Inoue, Takejiro; Janes, Dustin; Ren, Jiaxing; Willson, Grant; Ellison, Christopher; Nealey, Paul

2014-03-01

Fabrication of well-defined chemically patterned surfaces is crucially important to the development of next generation microprocessors, hard disk memory devices, photonic/plasmonic devices, separation membranes, and biological microarrays. One promising patterning method in these fields is Molecular Transfer Printing (MTP), which replicates chemical patterns with feature dimensions of the order of 10nm utilizing a master template defined by the microphase separated domains of a block copolymer thin film. The total transfer printing area achievable by MTP has so far been limited by the contact area between two rigid substrates. Therefore, strategies to make conformal contact between substrates could be practically useful because a single lithographically-defined starting pattern could be used to fabricate many replicates by a low-cost process. Here we show a new approach that utilizes a chemically deposited SiN layer and a liquid conformal layer to enable transfer printing of chemical patterns upon thermal annealing over large, continuous areas. We anticipate that our process could be integrated into Step and Flash Imprint Lithography (SFIL) tools to achieve conformal layer thicknesses thin and uniform enough to permit pattern transfer through a dry-etch protocol.

DOE Office of Scientific and Technical Information (OSTI.GOV)

An, Ho-Myoung; Kim, Hee-Dong; Kim, Tae Geun, E-mail: tgkim1@korea.ac.kr

Graphical abstract: The degradation tendency extracted by CP technique was almost the same in both the bulk-type and TFT-type cells. - Highlights: • D{sub it} is directly investigated from bulk-type and TFT-type CTF memory. • Charge pumping technique was employed to analyze the D{sub it} information. • To apply the CP technique to monitor the reliability of the 3D NAND flash. - Abstract: The energy distribution and density of interface traps (D{sub it}) are directly investigated from bulk-type and thin-film transistor (TFT)-type charge trap flash memory cells with tunnel oxide degradation, under program/erase (P/E) cycling using a charge pumping (CP)more » technique, in view of application in a 3-demension stackable NAND flash memory cell. After P/E cycling in bulk-type devices, the interface trap density gradually increased from 1.55 × 10{sup 12} cm{sup −2} eV{sup −1} to 3.66 × 10{sup 13} cm{sup −2} eV{sup −1} due to tunnel oxide damage, which was consistent with the subthreshold swing and transconductance degradation after P/E cycling. Its distribution moved toward shallow energy levels with increasing cycling numbers, which coincided with the decay rate degradation with short-term retention time. The tendency extracted with the CP technique for D{sub it} of the TFT-type cells was similar to those of bulk-type cells.« less

Phonological and Sensory Short-Term Memory Are Correlates and Both Affected in Developmental Dyslexia

ERIC Educational Resources Information Center

Laasonen, Marja; Virsu, Veijo; Oinonen, Suvi; Sandbacka, Mirja; Salakari, Anita; Service, Elisabet

2012-01-01

We investigated whether poor short-term memory (STM) in developmental dyslexia affects the processing of sensory stimulus sequences in addition to phonological material. STM for brief binary non-verbal stimuli (light flashes, tone bursts, finger touches, and their crossmodal combinations) was studied in 20 Finnish adults with dyslexia and 24…

Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.

PubMed

Kim, Seung-Yoon; Park, Jong Kyung; Hwang, Wan Sik; Lee, Seung-Jun; Lee, Ki-Hong; Pyi, Seung Ho; Cho, Byung Jin

2016-05-01

We investigated the dependence of grain size on the performance of a polycrystalline silicon (poly-Si) channel TFT for application to 3D NAND Flash memory devices. It has been found that the device performance and memory characteristics are strongly affected by the grain size of the poly-Si channel. Higher on-state current, faster program speed, and poor endurance/reliability properties are observed when the poly-Si grain size is large. These are mainly attributed to the different local electric field induced by an oxide valley at the interface between the poly-Si channel and the gate oxide. In addition, the trap density at the gate oxide interface was successfully measured using a charge pumping method by the separation between the gate oxide interface traps and traps at the grain boundaries in the poly-Si channel. The poly-Si channel with larger grain size has lower interface trap density.

Memory Decline in Peri- and Post-menopausal Women: The Potential of Mind–Body Medicine to Improve Cognitive Performance

PubMed Central

Sliwinski, Jim R; Johnson, Aimee K; Elkins, Gary R

2014-01-01

Cognitive decline is a frequent complaint during the menopause transition and among post-menopausal women. Changes in memory correspond with diminished estrogen production. Further, many peri- and post-menopausal women report sleep concerns, depression, and hot flashes, and these factors may contribute to cognitive decline. Hormone therapy can increase estrogen but is contraindicated for many women. Mind–body medicine has been shown to have beneficial effects on sleep, mood, and hot flashes, among post-menopausal women. Further, mind–body medicine holds potential in addressing symptoms of cognitive decline post-menopause. This study proposes an initial framework for how mind–body interventions may improve cognitive performance and inform future research seeking to identify the common and specific factors associated with mind–body medicine for addressing memory decline in peri- and post-menopausal women. It is our hope that this article will eventually lead to a more holistic and integrative approach to the treatment of cognitive deficits in peri- and post-menopausal women. PMID:25125972

77 FR 74222 - Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-12-13

..., California; Kingston Technology Co., Inc. of Fountain Valley, California; Logitek International S.A. (``LISA...: Clint Gerdine, Esq., Office of the General Counsel, U.S. International Trade Commission, 500 E Street SW....m. to 5:15 p.m.) in the Office of the Secretary, U.S. International Trade Commission, 500 E Street...

Resistive switching mechanisms in random access memory devices incorporating transition metal oxides: TiO2, NiO and Pr0.7Ca0.3MnO3.

PubMed

Magyari-Köpe, Blanka; Tendulkar, Mihir; Park, Seong-Geon; Lee, Hyung Dong; Nishi, Yoshio

2011-06-24

Resistance change random access memory (RRAM) cells, typically built as MIM capacitor structures, consist of insulating layers I sandwiched between metal layers M, where the insulator performs the resistance switching operation. These devices can be electrically switched between two or more stable resistance states at a speed of nanoseconds, with long retention times, high switching endurance, low read voltage, and large switching windows. They are attractive candidates for next-generation non-volatile memory, particularly as a flash successor, as the material properties can be scaled to the nanometer regime. Several resistance switching models have been suggested so far for transition metal oxide based devices, such as charge trapping, conductive filament formation, Schottky barrier modulation, and electrochemical migration of point defects. The underlying fundamental principles of the switching mechanism still lack a detailed understanding, i.e. how to control and modulate the electrical characteristics of devices incorporating defects and impurities, such as oxygen vacancies, metal interstitials, hydrogen, and other metallic atoms acting as dopants. In this paper, state of the art ab initio theoretical methods are employed to understand the effects that filamentary types of stable oxygen vacancy configurations in TiO(2) and NiO have on the electronic conduction. It is shown that strong electronic interactions between metal ions adjacent to oxygen vacancy sites results in the formation of a conductive path and thus can explain the 'ON' site conduction in these materials. Implication of hydrogen doping on electroforming is discussed for Pr(0.7)Ca(0.3)MnO(3) devices based on electrical characterization and FTIR measurements.

Water types and their relaxation behavior in partially rehydrated CaFe-mixed binary oxide obtained from CaFe-layered double hydroxide in the 155-298 K temperature range.

PubMed

Bugris, Valéria; Haspel, Henrik; Kukovecz, Ákos; Kónya, Zoltán; Sipiczki, Mónika; Sipos, Pál; Pálinkó, István

2013-10-29

Heat-treated CaFe-layered double hydroxide samples were equilibrated under conditions of various relative humidities (11%, 43% and 75%). Measurements by FT-IR and dielectric relaxation spectroscopies revealed that partial to full reconstruction of the layered structure took place. Water types taking part in the reconstruction process were identified via dielectric relaxation measurements either at 298 K or on the flash-cooled (to 155 K) samples. The dynamics of water molecules at the various positions was also studied by this method, allowing the flash-cooled samples to warm up to 298 K.

Investigating of Memory - Colours of Intellectually Disabled Children and Virtual Game Addict Students

NASA Astrophysics Data System (ADS)

Sik Lányi, Cecília

We describe an investigation of memory colours. For this investigation Flash test software was developed. 75 observers used this test software in 4 groups: average elementary school children (aged: 8-9 years), intellectually disabled children (age: 9-15), virtual game addict university students (average age: 20) and university students who play with VR games rarely or never (average age: 20). In this pilot test we investigated the difference of memory colours of these 4 groups.

Aging changes in the female reproductive system

MedlinePlus

... Other common changes include: Menopause symptoms such as hot flashes, moodiness, headaches, and trouble sleeping Problems with short-term memory Decrease in breast tissue Lower sex drive (libido) and sexual response Increased risk of ...

Radiation Test Challenges for Scaled Commerical Memories

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

2007-01-01

As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

Mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Selinidis, Kosta S.; Jones, Chris; Doyle, Gary F.; Brown, Laura; Imhof, Joseph; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2011-11-01

The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality "master" mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools and the semiconductor mask replication process. A PerfectaTM MR5000 mask replication tool has been developed specifically to pattern replica masks from an ebeam written master. Performance results, including image placement, critical dimension uniformity, and pattern transfer are covered in detail.

MRAM Technology Status

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2013-01-01

Magnetoresistive Random Access Memory (MRAM) is much different from conventional types of memory like SRAM, DRAM, and Flash, where electric charge is used to store information. Instead of exploiting the charge of an electron, MRAM uses its spin to store data. This new type of electronics is known as "spintronics." The primary focus of this report is the current generation of MRAM technology, and its reliability, vendors, and space-readiness.

82 FR 35991 - Certain Flash Memory Devices and Components Thereof; Notice of Commission Determination Not To...

Federal Register 2010, 2011, 2012, 2013, 2014

2017-08-02

... following respondents: SanDisk LLC of Milpitas, California; Western Digital Corporation of Irvine, California; Western Digital Technologies, Inc. of Milpitas, California; SanDisk Limited of Yokohama, Japan...

Energy transfer dynamics in strongly inhomogeneous hot-dense-matter systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stillman, C. R.; Nilson, P. M.; Sefkow, A. B.

Direct measurements of energy transfer across steep density and temperature gradients in a hot-dense-matter system are presented. Hot dense plasma conditions were generated by high-intensity laser irradiation of a thin-foil target containing a buried metal layer. Energy transfer to the layer was measured using picosecond time-resolved x-ray emission spectroscopy. Here, the data show two x-ray flashes in time. Fully explicit, coupled particle-in-cell and collisional-radiative atomic kinetics model predictions reproduce these observations, connecting the two x-ray flashes with staged radial energy transfer within the target.

Energy transfer dynamics in strongly inhomogeneous hot-dense-matter systems

DOE PAGES

Stillman, C. R.; Nilson, P. M.; Sefkow, A. B.; ...

2018-06-25

Direct measurements of energy transfer across steep density and temperature gradients in a hot-dense-matter system are presented. Hot dense plasma conditions were generated by high-intensity laser irradiation of a thin-foil target containing a buried metal layer. Energy transfer to the layer was measured using picosecond time-resolved x-ray emission spectroscopy. Here, the data show two x-ray flashes in time. Fully explicit, coupled particle-in-cell and collisional-radiative atomic kinetics model predictions reproduce these observations, connecting the two x-ray flashes with staged radial energy transfer within the target.

Total Lightning Observations within Electrified Snowfall using Polarimetric Radar LMA, and NWN Measurements

NASA Technical Reports Server (NTRS)

Schultz, Christopher J.; Bruning, Eric C.; Carey, Lawrence D.; Blakeslee, Richard J.

2013-01-01

Tall structures play and important role in development of winter time lightning flashes.To what extent still needs to be assessed. Tower initiated flashes typically occur as banded structures pass near/overhead. Hi resolution RHI s from polarimetric radar show that the lightning has a tendency to propagate through layered structures within these snowstorms.

An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

NASA Technical Reports Server (NTRS)

Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

2001-01-01

Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

TaOx-based resistive switching memories: prospective and challenges

PubMed Central

2013-01-01

Resistive switching memories (RRAMs) are attractive for replacement of conventional flash in the future. Although different switching materials have been reported; however, low-current operated devices (<100 μA) are necessary for productive RRAM applications. Therefore, TaOx is one of the prospective switching materials because of two stable phases of TaO2 and Ta2O5, which can also control the stable low- and high-resistance states. Long program/erase endurance and data retention at high temperature under low-current operation are also reported in published literature. So far, bilayered TaOx with inert electrodes (Pt and/or Ir) or single layer TaOx with semi-reactive electrodes (W and Ti/W or Ta/Pt) is proposed for real RRAM applications. It is found that the memory characteristics at current compliance (CC) of 80 μA is acceptable for real application; however, data are becoming worst at CC of 10 μA. Therefore, it is very challenging to reduce the operation current (few microampere) of the RRAM devices. This study investigates the switching mode, mechanism, and performance of low-current operated TaOx-based devices as compared to other RRAM devices. This topical review will not only help for application of TaOx-based nanoscale RRAM devices but also encourage researcher to overcome the challenges in the future production. PMID:24107610

External Verification of SCADA System Embedded Controller Firmware

DTIC Science & Technology

2012-03-01

microprocessor and read-only memory (ROM) or flash memory for storing firmware and control logic [5],[8]. A PLC typically has three software levels as shown in...implementing different firmware. Because PLCs are in effect a microprocessor device, an analysis of the current research on embedded devices is important...Electronics Engineers (IEEE) published a 15 best practices guide for firmware control on microprocessors [44]. IEEE suggests that microprocessors

77 FR 35718 - Certain Universal Serial Bus (“USB”) Portable Storage Devices, Including USB Flash Drives and...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-14

... on the Commission's electronic docket (EDIS) at http://edis.usitc.gov . Hearing-impaired persons are... Sunnyvale, California; Kingston Technology Company, Inc. of Fountain Valley, California; Patriot Memory, LLC...

Total ionizing dose effect in an input/output device for flash memory

NASA Astrophysics Data System (ADS)

Liu, Zhang-Li; Hu, Zhi-Yuan; Zhang, Zheng-Xuan; Shao, Hua; Chen, Ming; Bi, Da-Wei; Ning, Bing-Xu; Zou, Shi-Chang

2011-12-01

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

A microcomputer-based daily living activity recording system.

PubMed

Matsuoka, Shingo; Yonezawa, Yoshiharu; Maki, Hiromichi; Ogawa, Hidekuni; Hahn, Allen W; Thayer, Julian F; Caldwell, W Morton

2003-01-01

A new daily living activity recording system has been developed for monitoring health conditions and living patterns, such as respiration, posture, activity/rest ratios and general activity level. The system employs a piezoelectric sensor, a dual axis accelerometer, two low-power active filters, a low-power 8-bit single chip microcomputer and a 128 MB compact flash memory. The piezoelectric sensor, whose electrical polarization voltage is produced by mechanical strain, detects body movements. Its high-frequency output components reflect body movements produced by walking and running activities, while the low frequency components are mainly respiratory. The dual axis accelerometer detects, from body X and Y tilt angles, whether the patient is standing, sitting or lying down (prone, supine, left side or right side). The detected respiratory, behavior and posture signals are stored by the compact flash memory. After recording, these data are downloaded to a desktop computer and analyzed.

Analysis of the Evaluation of a New Glucose Meter with Integrated Self-Management Software and USB Connectivity

PubMed Central

Crowe, Daniel J

2011-01-01

Glucose meter technology has not kept up with the advances that have occurred in other sectors in mobile and health care technology. A new device that combines strip-based capillary blood glucose monitoring and USB flash drive technology is evaluated in an industry-funded study in a cohort of patients and health care professionals. The expanded memory capacity of flash drives allows the software program to be stored on the device for analyzing the blood glucose readings in memory. The study analyzes the device for precision and accuracy as well as for ease of adaptability and usage. This analysis focuses on shortcomings in the design of the study and methodology in addition to features of the hardware device itself. Although the device has distinct advantages over many devices on the market, a challenge is made to device manufacturers to encourage further innovation. PMID:22027309

Mistaking the recent past for the present: false seeing by older adults.

PubMed

Jacoby, Larry L; Rogers, Chad S; Bishara, Anthony J; Shimizu, Yujiro

2012-03-01

Results of three experiments revealed that older, as compared to young, adults are more reliant on context when "seeing" a briefly flashed word that was preceded by a prime. In a congruent condition, the prime was the same word as flashed (e.g., DIRT dirt) whereas in an incongruent condition, the prime differed in a single letter from the word that was flashed (DART dirt). Following their attempt to identify the flashed word, participants were asked to report whether they had "seen" the flashed word or, instead, had responded on some other basis (knowing or guessing). Older adults showed dramatically higher false seeing by reporting the prime on incongruent trials and claiming to have seen it flashed. This was true even though a titration procedure was used to equate the performance of young and older adults on baseline trials which did not provide a biasing context. Results of Experiment 3 related age differences in false seeing to willingness to respond when given the option to withhold responses. Convergence of results with those showing higher false memory and false hearing are interpreted as evidence that older adults are less able to avoid misleading effects of context. That lessened ability may be associated with decline in frontal lobe functioning.

MemFlash device: floating gate transistors as memristive devices for neuromorphic computing

NASA Astrophysics Data System (ADS)

Riggert, C.; Ziegler, M.; Schroeder, D.; Krautschneider, W. H.; Kohlstedt, H.

2014-10-01

Memristive devices are promising candidates for future non-volatile memory applications and mixed-signal circuits. In the field of neuromorphic engineering these devices are especially interesting to emulate neuronal functionality. Therefore, new materials and material combinations are currently investigated, which are often not compatible with Si-technology processes. The underlying mechanisms of the device often remain unclear and are paired with low device endurance and yield. These facts define the current most challenging development tasks towards a reliable memristive device technology. In this respect, the MemFlash concept is of particular interest. A MemFlash device results from a diode configuration wiring scheme of a floating gate transistor, which enables the persistent device resistance to be varied according to the history of the charge flow through the device. In this study, we investigate the scaling conditions of the floating gate oxide thickness with respect to possible applications in the field of neuromorphic engineering. We show that MemFlash cells exhibit essential features with respect to neuromorphic applications. In particular, cells with thin floating gate oxides show a limited synaptic weight growth together with low energy dissipation. MemFlash cells present an attractive alternative for state-of-art memresitive devices. The emulation of associative learning is discussed by implementing a single MemFlash cell in an analogue circuit.

Active Flash: Out-of-core Data Analytics on Flash Storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S

2012-01-01

Next generation science will increasingly come to rely on the ability to perform efficient, on-the-fly analytics of data generated by high-performance computing (HPC) simulations, modeling complex physical phenomena. Scientific computing workflows are stymied by the traditional chaining of simulation and data analysis, creating multiple rounds of redundant reads and writes to the storage system, which grows in cost with the ever-increasing gap between compute and storage speeds in HPC clusters. Recent HPC acquisitions have introduced compute node-local flash storage as a means to alleviate this I/O bottleneck. We propose a novel approach, Active Flash, to expedite data analysis pipelines bymore » migrating to the location of the data, the flash device itself. We argue that Active Flash has the potential to enable true out-of-core data analytics by freeing up both the compute core and the associated main memory. By performing analysis locally, dependence on limited bandwidth to a central storage system is reduced, while allowing this analysis to proceed in parallel with the main application. In addition, offloading work from the host to the more power-efficient controller reduces peak system power usage, which is already in the megawatt range and poses a major barrier to HPC system scalability. We propose an architecture for Active Flash, explore energy and performance trade-offs in moving computation from host to storage, demonstrate the ability of appropriate embedded controllers to perform data analysis and reduction tasks at speeds sufficient for this application, and present a simulation study of Active Flash scheduling policies. These results show the viability of the Active Flash model, and its capability to potentially have a transformative impact on scientific data analysis.« less

Characteristics of flash initiations in a supercell cluster with tornadoes

NASA Astrophysics Data System (ADS)

Zheng, Dong; MacGorman, Donald R.

2016-01-01

Flash initiations within a supercell cluster during 10-11 May 2010 in Oklahoma were investigated based on observations from the Oklahoma Lightning Mapping Array and the Norman, Oklahoma, polarimetric radar (KOUN). The flash initiations at positions dominated by graupel, dry snow, small hail and crystals accounted for 44.3%, 44.1%, 8.0% and 3.0% of the total flashes, respectively. During the tornadic stage of the southern supercell in the cluster, flash initiations associated with graupel occupied the main body, the right flank and the forward flank of the supercell, while those associated with dry snow dominated the outskirts of the adjacent forward anvil, right anvil and rear anvil. The flash initiations associated with small hail were concentrated around the main updraft, particularly toward its front side. Highly dense flash initiations were located in the regions overlying the differential reflectivity (ZDR) arc and right anvil. The average initial height of the flashes decreased gradually from the rear to the front and from the right to the left flanks, while the height range over which initiations occurred reached a maximum at the front of the updraft. The flashes that were initiated in the adjacent forward anvils were largest on average, followed by those in the regions ahead of the updraft and near the ZDR arc. This study supports the concept of charge pockets and further deduces that the pockets in the right anvil are the most abundant and compact due to the frequent flash initiations, small-sized flashes and thin layers including flash initiations.

Development of template and mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Brooks, Cynthia; Selinidis, Kosta; Doyle, Gary; Brown, Laura; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2010-09-01

The Jet and Flash Imprint Lithography (J-FILTM)1-7 process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105 imprints. This suggests that tens of thousands of templates/masks will be required. It is not feasible to employ electronbeam patterning directly to deliver these volumes. Instead, a "master" template - created by directly patterning with an electron-beam tool - will be replicated many times with an imprint lithography tool to produce the required supply of "working" templates/masks. In this paper, we review the development of the pattern transfer process for both template and mask replicas. Pattern transfer of resolutions down to 25nm has been demonstrated for bit patterned media replication. In addition, final resolution on a semiconductor mask of 28nm has been confirmed. The early results on both etch depth and CD uniformity are promising, but more extensive work is required to characterize the pattern transfer process.

Non-volatile memory based on the ferroelectric photovoltaic effect

PubMed Central

Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

2013-01-01

The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

Dynamic Water Storage during Flash Flood Events in the Mountainous Area of Rio de Janeiro/Brazil - Case study: Piabanha River Basin

NASA Astrophysics Data System (ADS)

Araujo, L.; Silva, F. P. D.; Moreira, D. M.; Vásquez P, I. L.; Justi da Silva, M. G. A.; Fernandes, N.; Rotunno Filho, O. C.

2017-12-01

Flash floods are characterized by a rapid rise in water levels, high flow rates and large amounts of debris. Several factors have relevance to the occurrence of these phenomena, including high precipitation rates, terrain slope, soil saturation degree, vegetation cover, soil type, among others. In general, the greater the precipitation intensity, the more likely is the occurrence of a significant increase in flow rate. Particularly on steep and rocky plains or heavily urbanized areas, relatively small rain rates can trigger a flash flood event. In addition, high rain rates in short time intervals can temporarily saturate the surface soil layer acting as waterproofing and favoring the occurrence of greater runoff rates due to non-infiltration of rainwater into the soil. Thus, although precipitation is considered the most important factor for flooding, the interaction between rainfall and the soil can sometimes be of greater importance. In this context, this work investigates the dynamic storage of water associated with flash flood events for Quitandinha river watershed, a tributary of Piabanha river, occurred between 2013 and 2014, by means of water balance analyses applied to three watersheds of varying magnitudes (9.25 km², 260 km² and 429 km²) along the rainy season under different time steps (hourly and daily) using remotely sensed and observational precipitation data. The research work is driven by the hypothesis of a hydrologically active bedrock layer, as the watershed is located in a humid region, having intemperate (fractured) rock layer, just below a shallow soil layer, in the higher part of the basin where steep slopes prevail. The results showed a delay of the variation of the dynamic storage in relation to rainfall peaks and water levels. Such behavior indicates that the surface soil layer, which is not very thick in the region, becomes rapidly saturated along rainfall events. Subsequently, the water infiltrates into the rocky layer and the water storage in the fractured bedrock assumes significant role due to its corresponding release to streams as storm flows.

Out of sight but not out of mind: the neurophysiology of iconic memory in the superior temporal sulcus.

PubMed

Keysers, C; Xiao, D-K; Foldiak, P; Perrett, D I

2005-05-01

Iconic memory, the short-lasting visual memory of a briefly flashed stimulus, is an important component of most models of visual perception. Here we investigate what physiological mechanisms underlie this capacity by showing rapid serial visual presentation (RSVP) sequences with and without interstimulus gaps to human observers and macaque monkeys. For gaps of up to 93 ms between consecutive images, human observers and neurones in the temporal cortex of macaque monkeys were found to continue processing a stimulus as if it was still present on the screen. The continued firing of neurones in temporal cortex may therefore underlie iconic memory. Based on these findings, a neurophysiological vision of iconic memory is presented.

Analytical modeling of flash-back phenomena. [premixed/prevaporized combustion system

NASA Technical Reports Server (NTRS)

Feng, C. C.

1979-01-01

To understand the flame flash-back phenomena more extensively, an analytical model was formed and a numerical program was written and tested to solve the set of differential equations describing the model. Results show that under a given set of conditions flame propagates in the boundary layer on a flat plate when the free stream is at or below 1.8 m/s.

Phototoxic effects of commercial photographic flash lamp on rat eyes.

PubMed

Inoue, Makoto; Shinoda, Kei; Ohde, Hisao; Tezuka, Keiji; Hida, Tetsuo

2006-11-01

To determine whether exposure of the cornea and retina of rats to flashes from a commercial photographic flash lamp is phototoxic. Sprague-Dawley rats were exposed to 10, 100, or 1,000 flashes of the OPTICAM 16M photographic flash lamp (Fujikoeki, Japan) placed 0.1, 1, or 3 m from the eyes. Corneal damage was assessed by a fluorescein staining score, and the retinal damage by eletroretinography (ERG) and histology before and 24 h after exposure. Exposure of the eyes to 1,000 flashes at 0.1 m increased the fluorescein staining score significantly (P = 0.009, the Mann-Whitney test). Scanning electron microscopy (SEM) of the cornea showed a detachment of the epithelial cells from the surface after this exposure. The amplitude of the a-wave was decreased significantly by 23.0% (P = 0.026) of the amplitude before the exposure, and the b-wave by 19.7% (P = 0.0478) following 1,000 flashes at 0.1 m but not by the other exposures. TUNEL-positive cells were present in the outer nuclear layer only after the extreme exposure, but no significant decrease in retinal thickness was seen under any condition. The fluorescein staining score and ERGs recovered to control levels within 1 week. Light exposure to a photographic flash lamp does not induce damage to the cornea and retina except when they are exposed to 1,000 flashes at 0.1 m.

Real cell overlay measurement through design based metrology

NASA Astrophysics Data System (ADS)

Yoo, Gyun; Kim, Jungchan; Park, Chanha; Lee, Taehyeong; Ji, Sunkeun; Jo, Gyoyeon; Yang, Hyunjo; Yim, Donggyu; Yamamoto, Masahiro; Maruyama, Kotaro; Park, Byungjun

2014-04-01

Until recent device nodes, lithography has been struggling to improve its resolution limit. Even though next generation lithography technology is now facing various difficulties, several innovative resolution enhancement technologies, based on 193nm wavelength, were introduced and implemented to keep the trend of device scaling. Scanner makers keep developing state-of-the-art exposure system which guarantees higher productivity and meets a more aggressive overlay specification. "The scaling reduction of the overlay error has been a simple matter of the capability of exposure tools. However, it is clear that the scanner contributions may no longer be the majority component in total overlay performance. The ability to control correctable overlay components is paramount to achieve the desired performance.(2)" In a manufacturing fab, the overlay error, determined by a conventional overlay measurement: by using an overlay mark based on IBO and DBO, often does not represent the physical placement error in the cell area of a memory device. The mismatch may arise from the size or pitch difference between the overlay mark and the cell pattern. Pattern distortion, caused by etching or CMP, also can be a source of the mismatch. Therefore, the requirement of a direct overlay measurement in the cell pattern gradually increases in the manufacturing field, and also in the development level. In order to overcome the mismatch between conventional overlay measurement and the real placement error of layer to layer in the cell area of a memory device, we suggest an alternative overlay measurement method utilizing by design, based metrology tool. A basic concept of this method is shown in figure1. A CD-SEM measurement of the overlay error between layer 1 and 2 could be the ideal method but it takes too long time to extract a lot of data from wafer level. An E-beam based DBM tool provides high speed to cover the whole wafer with high repeatability. It is enabled by using the design as a reference for overlay measurement and a high speed scan system. In this paper, we have demonstrated that direct overlay measurement in the cell area can distinguish the mismatch exactly, instead of using overlay mark. This experiment was carried out for several critical layer in DRAM and Flash memory, using DBM(Design Based Metrology) tool, NGR2170™.

Computer Game Play Reduces Intrusive Memories of Experimental Trauma via Reconsolidation-Update Mechanisms.

PubMed

James, Ella L; Bonsall, Michael B; Hoppitt, Laura; Tunbridge, Elizabeth M; Geddes, John R; Milton, Amy L; Holmes, Emily A

2015-08-01

Memory of a traumatic event becomes consolidated within hours. Intrusive memories can then flash back repeatedly into the mind's eye and cause distress. We investigated whether reconsolidation-the process during which memories become malleable when recalled-can be blocked using a cognitive task and whether such an approach can reduce these unbidden intrusions. We predicted that reconsolidation of a reactivated visual memory of experimental trauma could be disrupted by engaging in a visuospatial task that would compete for visual working memory resources. We showed that intrusive memories were virtually abolished by playing the computer game Tetris following a memory-reactivation task 24 hr after initial exposure to experimental trauma. Furthermore, both memory reactivation and playing Tetris were required to reduce subsequent intrusions (Experiment 2), consistent with reconsolidation-update mechanisms. A simple, noninvasive cognitive-task procedure administered after emotional memory has already consolidated (i.e., > 24 hours after exposure to experimental trauma) may prevent the recurrence of intrusive memories of those emotional events. © The Author(s) 2015.

Computer Game Play Reduces Intrusive Memories of Experimental Trauma via Reconsolidation-Update Mechanisms

PubMed Central

James, Ella L.; Bonsall, Michael B.; Hoppitt, Laura; Tunbridge, Elizabeth M.; Geddes, John R.; Milton, Amy L.

2015-01-01

Memory of a traumatic event becomes consolidated within hours. Intrusive memories can then flash back repeatedly into the mind’s eye and cause distress. We investigated whether reconsolidation—the process during which memories become malleable when recalled—can be blocked using a cognitive task and whether such an approach can reduce these unbidden intrusions. We predicted that reconsolidation of a reactivated visual memory of experimental trauma could be disrupted by engaging in a visuospatial task that would compete for visual working memory resources. We showed that intrusive memories were virtually abolished by playing the computer game Tetris following a memory-reactivation task 24 hr after initial exposure to experimental trauma. Furthermore, both memory reactivation and playing Tetris were required to reduce subsequent intrusions (Experiment 2), consistent with reconsolidation-update mechanisms. A simple, noninvasive cognitive-task procedure administered after emotional memory has already consolidated (i.e., > 24 hours after exposure to experimental trauma) may prevent the recurrence of intrusive memories of those emotional events. PMID:26133572

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.

2008-01-01

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

Non-volatile memory for checkpoint storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.

A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, themore » non-volatile memory is a pluggable flash memory card.« less

Investigations on the Influence of Parameters During Electron Beam Surface Hardening Using the Flash Technique

NASA Astrophysics Data System (ADS)

Grafe, S.; Hengst, P.; Buchwalder, A.; Zenker, R.

2018-06-01

The electron beam hardening (EBH) process is one of today’s most innovative industrial technologies. Due to the almost inertia-free deflection of the EB (up to 100 kHz), the energy transfer function can be adapted locally to the component geometry and/or loading conditions. The current state-of-the-art technology is that of EBH with continuous workpiece feed. Due to the large range of parameters, the potentials and limitations of EBH using the flash technique (without workpiece feed) have not been investigated sufficiently to date. The aim of this research was to generate surface isothermal energy transfer within the flash field. This paper examines the effects of selected process parameters on the EBH surface layer microstructure and the properties achieved when treating hardened and tempered C45E steel. When using constant point distribution within the flash field and a constant beam current, surface isothermal energy input was not generated. However, by increasing the deflection frequency, point density and beam current, a more homogeneous EBH surface layer microstructure could be achieved, along with higher surface hardness and greater surface hardening depths. Furthermore, using temperature-controlled power regulation, surface isothermal energy transfer could be realised over a larger area in the centre of the sample.

A Computer Program for Flow-Log Analysis of Single Holes (FLASH)

USGS Publications Warehouse

Day-Lewis, F. D.; Johnson, C.D.; Paillet, Frederick L.; Halford, K.J.

2011-01-01

A new computer program, FLASH (Flow-Log Analysis of Single Holes), is presented for the analysis of borehole vertical flow logs. The code is based on an analytical solution for steady-state multilayer radial flow to a borehole. The code includes options for (1) discrete fractures and (2) multilayer aquifers. Given vertical flow profiles collected under both ambient and stressed (pumping or injection) conditions, the user can estimate fracture (or layer) transmissivities and far-field hydraulic heads. FLASH is coded in Microsoft Excel with Visual Basic for Applications routines. The code supports manual and automated model calibration. ?? 2011, The Author(s). Ground Water ?? 2011, National Ground Water Association.

Chromospheric umbral dynamics

NASA Astrophysics Data System (ADS)

Reardon, Kevin P.; Vecchio, Antonio; Cauzzi, Gianna; Tritschler, Alexandra

2014-06-01

The chromosphere above sunspots is seen to undergo dynamical driving from perturbations from lower layers of the atmosphere. Umbral flashes have long been understood to be the result of acoustic shocks due to the drop in density in the sunspot chromosphere. Detailed observations of the umbral waves and flashes may help reveal the nature of the sunspot structure in the upper atmosphere. We report on high-resolution observations of umbral dynamics observed in the Ca II 8542 line by IBIS at the Dunn Solar Telescope. We use a principal component decomposition technique (POD) to isolate different components of the observed oscillations. We are able to explore temporal and spatial evolution of the umbral flashes. We find significant variation in the nature of the flashes over the sunspot, indicating that the chromospheric magnetic topology can strongly modify the nature of the umbral intensity and velocity oscillations.

Relativistic electron avalanches as a thunderstorm discharge competing with lightning

NASA Astrophysics Data System (ADS)

Kelley, Nicole A.; Smith, David M.; Dwyer, Joseph R.; Splitt, Michael; Lazarus, Steven; Martinez-McKinney, Forest; Hazelton, Bryna; Grefenstette, Brian; Lowell, Alexander; Rassoul, Hamid K.

2015-08-01

Gamma-ray `glows' are long duration (seconds to tens of minutes) X-ray and gamma-ray emission coming from thunderclouds. Measurements suggest the presence of relativistic runaway electron avalanches (RREA), the same process underlying terrestrial gamma-ray flashes. Here we demonstrate that glows are relatively a common phenomena near the tops of thunderstorms, when compared with events such as terrestrial gamma-ray flashes. Examining the strongest glow measured by the airborne detector for energetic emissions, we show that this glow is measured near the end of a downward RREA, consistent with occurring between the upper positive charge layer and the negative screening layer above it. The glow discharges the upper positive layer by >=9.6 mA, strong enough to be an important charging mechanism of the storm. For this glow, the gamma-ray flux observed is close to the value at which relativistic feedback processes become important, with an avalanche multiplication factor of 4,500.

Patterning optimization for 55nm design rule DRAM/flash memory using production-ready customized illuminations

NASA Astrophysics Data System (ADS)

Chen, Ting; Van Den Broeke, Doug; Hsu, Stephen; Hsu, Michael; Park, Sangbong; Berger, Gabriel; Coskun, Tamer; de Vocht, Joep; Chen, Fung; Socha, Robert; Park, JungChul; Gronlund, Keith

2005-11-01

Illumination optimization, often combined with optical proximity corrections (OPC) to the mask, is becoming one of the critical components for a production-worthy lithography process for 55nm-node DRAM/Flash memory devices and beyond. At low-k1, e.g. k1<0.31, both resolution and imaging contrast can be severely limited by the current imaging tools while using the standard illumination sources. Illumination optimization is a process where the source shape is varied, in both profile and intensity distribution, to achieve enhancement in the final image contrast as compared to using the non-optimized sources. The optimization can be done efficiently for repetitive patterns such as DRAM/Flash memory cores. However, illumination optimization often produces source shapes that are "free-form" like and they can be too complex to be directly applicable for production and lack the necessary radial and annular symmetries desirable for the diffractive optical element (DOE) based illumination systems in today's leading lithography tools. As a result, post-optimization rendering and verification of the optimized source shape are often necessary to meet the production-ready or manufacturability requirements and ensure optimal performance gains. In this work, we describe our approach to the illumination optimization for k1<0.31 DRAM/Flash memory patterns, using an ASML XT:1400i at NA 0.93, where the all necessary manufacturability requirements are fully accounted for during the optimization. The imaging contrast in the resist is optimized in a reduced solution space constrained by the manufacturability requirements, which include minimum distance between poles, minimum opening pole angles, minimum ring width and minimum source filling factor in the sigma space. For additional performance gains, the intensity within the optimized source can vary in a gray-tone fashion (eight shades used in this work). Although this new optimization approach can sometimes produce closely spaced solutions as gauged by the NILS based metrics, we show that the optimal and production-ready source shape solution can be easily determined by comparing the best solutions to the "free-form" solution and more importantly, by their respective imaging fidelity and process latitude ranking. Imaging fidelity and process latitude simulations are performed to analyze the impact and sensitivity of the manufacturability requirements on pattern specific illumination optimizations using ASML XT:1400i and other latest imaging systems. Mask model based OPC (MOPC) is applied and optimized sequentially to ensure that the CD uniformity requirements are met.

Remotely Powered Reconfigurable Receiver for Extreme Environment Sensing Platforms

NASA Technical Reports Server (NTRS)

Sheldon, Douglas J.

2012-01-01

Wireless sensors connected in a local network offer revolutionary exploration capabilities, but the current solutions do not work in extreme environments of low temperatures (200K) and low to moderate radiation levels (<50 krad). These sensors (temperature, radiation, infrared, etc.) would need to operate outside the spacecraft/ lander and be totally independent of power from the spacecraft/lander. Flash memory field-programmable gate arrays (FPGAs) are being used as the main signal processing and protocol generation platform in a new receiver. Flash-based FPGAs have been shown to have at least 100 reduced standby power and 10 reduction operating power when compared to normal SRAM-based FPGA technology.

Portable flash lamp reflectance analyzer system and method

NASA Technical Reports Server (NTRS)

Kalshoven, James Edward (Inventor)

1999-01-01

The system and method allow spectroscopic analysis of vegetation or the like without effects from changing sun and cloud conditions, undesired portions of the area of interest or atmospheric disturbances. The system (1) includes a light source (5) such as a xenon flash lamp, a telescope (7), a spectrometer (9), an analog/digital converter (11), a memory (13), a display (15), and an on-board microprocessor (17) or a port (19) for attachment to a laptop computer. The system is taken to an area of interest in the woods (step 41), the vegetation is illuminated from below (step 43) and data are taken (step 45).

Camera flash heating of a three-layer solid composite: An approximate solution

NASA Astrophysics Data System (ADS)

Jibrin, Sani; Moksin, Mohd Maarof; Husin, Mohd Shahril; Zakaria, Azmi; Hassan, Jumiah; Talib, Zainal Abidin

2014-03-01

Camera flash heating and the subsequent thermal wave propagation in a solid composite material is studied using the Laplace transform technique. Full-field rear surface temperature for a single-layer, two-layer and three-layer solid composites are obtained directly from the Laplace transform conversion tables as opposed to the tedious inversion process by integral transform method. This is achieved by first expressing the hyperbolic-transcendental equation in terms of negative exponentials of square root of s/α and expanded same in a series by the binomial theorem. Electrophoretic deposition (EPD) and dip coating processes were used to prepare three-layer solid composites consisting ZnO/Cu/ZnO and starch/Al/starch respectively. About 0.5ml of deionized water enclosed within an air-tight aluminium container serves as the third three layer sample (AL/water/AL). Thermal diffusivity experiments were carried out on all the three samples prepared. Using Scaled Levenberg-Marquardt algorithm, the approximate temperature curve for the three-layer solid composite is fitted with the corresponding experimental result. The agreement between the theoretical curve and the experimental data as well as that between the obtained thermal diffusivity values for the ZnO, aluminium and deionized water in this work and similar ones found in literature is found to be very good.

Article coated with flash bonded superhydrophobic particles

DOEpatents

Simpson, John T [Clinton, TN; Blue, Craig A [Knoxville, TN; Kiggans, Jr., James O [Oak Ridge, TN

2010-07-13

A method of making article having a superhydrophobic surface includes: providing a solid body defining at least one surface; applying to the surface a plurality of diatomaceous earth particles and/or particles characterized by particle sizes ranging from at least 100 nm to about 10 .mu.m, the particles being further characterized by a plurality of nanopores, wherein at least some of the nanopores provide flow through porosity, the particles being further characterized by a plurality of spaced apart nanostructured features that include a contiguous, protrusive material; flash bonding the particles to the surface so that the particles are adherently bonded to the surface; and applying a hydrophobic coating layer to the surface and the particles so that the hydrophobic coating layer conforms to the nanostructured features.

Apollo-Soyuz pamphlet no. 6: Cosmic ray dosage. [experimental designiradiation hazards and dosage

NASA Technical Reports Server (NTRS)

Page, L. W.; From, T. P.

1977-01-01

The radiation hazard inside spacecraft is discussed with emphasis on its effects on the crew, biological specimens, and spacecraft instruments. The problem of light flash sensations in the eyes of astronauts is addressed and experiment MA-106 is described. In this experiment, light flashes seen by blindfolded astronauts were counted and high energy cosmic ray intensity in the command module cabin were measured. The damage caused by cosmic ray hits on small living organisms was investigated in the Biostack 3 experiment (MA-107). Individual cosmic rays were tracked through layers of bacterial spores, small seeds, and eggs interleaved with layers of AgCl-crystal wafers, special plastic, and special photographic film that registered each cosmic ray particle passed.

Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory

NASA Astrophysics Data System (ADS)

Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming

2017-08-01

The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed.

GROWING WHITE DWARFS TO THE CHANDRASEKHAR LIMIT: THE PARAMETER SPACE OF THE SINGLE DEGENERATE SN Ia CHANNEL

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hillman, Y.; Prialnik, D.; Kovetz, A.

Can a white dwarf (WD), accreting hydrogen-rich matter from a non-degenerate companion star, ever exceed the Chandrasekhar mass and explode as a SN Ia? We explore the range of accretion rates that allow a WD to secularly grow in mass, and derive limits on the accretion rate and on the initial mass that will allow it to reach 1.4M{sub ⊙}—the Chandrasekhar mass. We follow the evolution through a long series of hydrogen flashes, during which a thick helium shell accumulates. This determines the effective helium mass accretion rate for long-term, self-consistent evolutionary runs with helium flashes. We find that netmore » mass accumulation always occurs despite helium flashes. Although the amount of mass lost during the first few helium shell flashes is a significant fraction of that accumulated prior to the flash, that fraction decreases with repeated helium shell flashes. Eventually no mass is ejected at all during subsequent flashes. This unexpected result occurs because of continual heating of the WD interior by the helium shell flashes near its surface. The effect of heating is to lower the electron degeneracy throughout the WD, especially in the outer layers. This key result yields helium burning that is quasi-steady state, instead of explosive. We thus find a remarkably large parameter space within which long-term, self-consistent simulations show that a WD can grow in mass and reach the Chandrasekhar limit, despite its helium flashes.« less

Noise Attenuation Performance Assessment of the Joint Helmet Mounted Cueing System (JHMCS)

DTIC Science & Technology

2010-08-01

Flash Drive (CFD) memory (Figure 9) and Sound Professionals SP-TFB-2 Miniature Binaural Microphones with the Sound Professionals SP-SPSB-1 Slim-line...flight noise. Sound Professionals binaural microphones were placed to record both internal and external sounds. One microphone was attached to the

Future Development of Dense Ferroelectric Memories for Space Applications

NASA Technical Reports Server (NTRS)

Philpy, Stephen C.; Derbenwick, Gary F.

2001-01-01

The availability of high density, radiation tolerant, nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened complementary metal oxide semiconductors (CMOS), can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to single event upsets and proton irradiation, and ferroelectric storage capacitors to be resistant to neutron exposure. In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial double level metal 64-kilobit ferroelectric memory was presented. Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.

Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

2011-01-01

NASA is planning on going beyond Low Earth orbit with manned exploration missions. The radiation environment for most Low Earth orbit missions is harsher than at the Earth's surface but much less harsh than deep space. Development of new electronics is needed to meet the requirements of high performance, radiation tolerance, and reliability. The need for both Volatile and Non-volatile memory has been identified. Emerging Non-volatile memory technologies (FRAM, C-RAM,M-RAM, R-RAM, Radiation Tolerant FLASH, SONOS, etc.) need to be investigated for use in Space missions. An opportunity arose to fly a small memory experiment on a high inclination satellite (FASTSAT). An off-the-shelf 512K Ramtron FRAM was chosen to be tested in the experiment.

A Method for Estimating the Probability of Floating Gate Prompt Charge Loss in a Radiation Environment

NASA Technical Reports Server (NTRS)

Edmonds, L. D.

2016-01-01

Since advancing technology has been producing smaller structures in electronic circuits, the floating gates in modern flash memories are becoming susceptible to prompt charge loss from ionizing radiation environments found in space. A method for estimating the risk of a charge-loss event is given.

A Method for Estimating the Probability of Floating Gate Prompt Charge Loss in a Radiation Environment

NASA Technical Reports Server (NTRS)

Edmonds, L. D.

2016-01-01

Because advancing technology has been producing smaller structures in electronic circuits, the floating gates in modern flash memories are becoming susceptible to prompt charge loss from ionizing radiation environments found in space. A method for estimating the risk of a charge-loss event is given.

76 FR 25707 - In the Matter of Certain Flash Memory and Products Containing Same; Notice of Commission Decision...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-05-05

... review of the ALJ's determination concerning the ALJ's findings on claim construction, infringement... Commission has also determined to review the ID's construction of the ``extracting'' limitation of claim 8 as... construction of the claim limitation ``accumulatively averaging working conditions of lots previously processed...

Charge injection and discharging of Si nanocrystals and arrays by atomic force microscopy

NASA Technical Reports Server (NTRS)

Boer, E.; Ostraat, M.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.

2000-01-01

Charge injection and storage in dense arrays of silicon nanocrystals in SiO(sub 2) is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few-or single- electron storage in a small number of nanocrystal elements.

Radiation Hardened Electronics Destined For Severe Nuclear Reactor Environments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holbert, Keith E.; Clark, Lawrence T.

Post nuclear accident conditions represent a harsh environment for electronics. The full station blackout experience at Fukushima shows the necessity for emergency sensing capabilities in a radiation-enhanced environment. This NEET (Nuclear Energy Enabling Technologies) research project developed radiation hardened by design (RHBD) electronics using commercially available technology that employs commercial off-the-shelf (COTS) devices and present generation circuit fabrication techniques to improve the total ionizing dose (TID) hardness of electronics. Such technology not only has applicability to severe accident conditions but also to facilities throughout the nuclear fuel cycle in which radiation tolerance is required. For example, with TID tolerance tomore » megarads of dose, electronics could be deployed for long-term monitoring, inspection and decontamination missions. The present work has taken a two-pronged approach, specifically, development of both board and application-specific integrated circuit (ASIC) level RHBD techniques. The former path has focused on TID testing of representative microcontroller ICs with embedded flash (eFlash) memory, as well as standalone flash devices that utilize the same fabrication technologies. The standalone flash devices are less complicated, allowing better understanding of the TID response of the crucial circuits. Our TID experiments utilize biased components that are in-situ tested, and in full operation during irradiation. A potential pitfall in the qualification of memory circuits is the lack of rigorous testing of the possible memory states. For this reason, we employ test patterns that include all ones, all zeros, a checkerboard of zeros and ones, an inverse checkerboard, and random data. With experimental evidence of improved radiation response for unbiased versus biased conditions, a demonstration-level board using the COTS devices was constructed. Through a combination of redundancy and power gating, the demonstration board exhibits radiation resilience to over 200 krad. Furthermore, our ASIC microprocessor using RHBD techniques was shown to be fully functional after an exposure of 2.5 Mrad whereas the COTS microcontroller units failed catastrophically at <100 krad. The methods developed in this work can facilitate the long-term viability of radiation-hard robotic systems, thereby avoiding obsolescence issues. As a case in point, the nuclear industry with its low purchasing power does not drive the semiconductor industry strategic plans, and the rapid advancements in electronics technology can leave legacy systems stranded.« less

Method of making molecularly doped composite polymer material

DOEpatents

Affinito, John D [Tucson, AZ; Martin, Peter M [Kennewick, WA; Graff, Gordon L [West Richland, WA; Burrows, Paul E [Kennewick, WA; Gross, Mark E. , Sapochak, Linda S.

2005-06-21

A method of making a composite polymer of a molecularly doped polymer. The method includes mixing a liquid polymer precursor with molecular dopant forming a molecularly doped polymer precursor mixture. The molecularly doped polymer precursor mixture is flash evaporated forming a composite vapor. The composite vapor is cryocondensed on a cool substrate forming a composite molecularly doped polymer precursor layer, and the cryocondensed composite molecularly doped polymer precursor layer is cross linked thereby forming a layer of the composite polymer layer of the molecularly doped polymer.

Total Lightning Observations within Electrified Snowfall using Polarimetric Radar, LMA, and NLDN Measurements

NASA Technical Reports Server (NTRS)

Schultz, Christopher J.; Carey, Lawerence D.; Brunning, Eric C.; Blakeslee, Richard

2013-01-01

Four electrified snowfall cases are examined using total lightning measurements from lightning mapping arrays (LMAs), and the National Lightning Detection Network (NLDN) from Huntsville, AL and Washington D.C. In each of these events, electrical activity was in conjunction with heavy snowfall rates, sometimes exceeding 5-8 cm hr-1. A combination of LMA, and NLDN data also indicate that many of these flashes initiated from tall communications towers and traveled over large horizontal distances. During events near Huntsville, AL, the Advanced Radar for Meteorological and Operational Research (ARMOR) C-band polarimetric radar was collecting range height indicators (RHIs) through regions of heavy snowfall. The combination of ARMOR polarimetric radar and VHF LMA observations suggested contiguous layer changes in height between sloping aggregate-dominated layers and horizontally-oriented crystals. These layers may have provided ideal conditions for the development of extensive regions of charge and resultant horizontal propagation of the lightning flashes over large distances.

Device and methods for writing and erasing analog information in small memory units via voltage pulses

DOEpatents

El Gabaly Marquez, Farid; Talin, Albert Alec

2018-04-17

Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

Silicon doped hafnium oxide (HSO) and hafnium zirconium oxide (HZO) based FeFET: A material relation to device physics

NASA Astrophysics Data System (ADS)

Ali, T.; Polakowski, P.; Riedel, S.; Büttner, T.; Kämpfe, T.; Rudolph, M.; Pätzold, B.; Seidel, K.; Löhr, D.; Hoffmann, R.; Czernohorsky, M.; Kühnel, K.; Thrun, X.; Hanisch, N.; Steinke, P.; Calvo, J.; Müller, J.

2018-05-01

The recent discovery of ferroelectricity in thin film HfO2 materials renewed the interest in ferroelectric FET (FeFET) as an emerging nonvolatile memory providing a potential high speed and low power Flash alternative. Here, we report more insight into FeFET performance by integrating two types of ferroelectric (FE) materials and varying their properties. By varying the material type [HfO2 (HSO) versus hafnium zirconium oxide (HZO)], optimum content (Si doping/mixture ratio), and film thickness, a material relation to FeFET device physics is concluded. As for the material type, an improved FeFET performance is observed for HZO integration with memory window (MW) comparable to theoretical values. For different Si contents, the HSO based FeFET exhibited a MW trend with different stabilized phases. Similarly, the HZO FeFET shows MW dependence on the Hf:Zr mixture ratio. A maximized MW is obtained with cycle ratios of 16:1 (HfO2:Si) and 1:1 (Hf:Zr) as measured on HSO and HZO based FeFETs, respectively. The thickness variation shows a trend of increasing MW with the increased FE layer thickness confirming early theoretical predictions. The FeFET material aspects and stack physics are discussed with insight into the interplay factors, while optimum FE material parameters are outlined in relation to performance.

Feasibility of correlating separation of ternary mixtures of neutral analytes via thin layer chromatography with supercritical fluid chromatography in support of green flash separations.

PubMed

Ashraf-Khorassani, M; Yan, Q; Akin, A; Riley, F; Aurigemma, C; Taylor, L T

2015-10-30

Method development for normal phase flash liquid chromatography traditionally employs preliminary screening using thin layer chromatography (TLC) with conventional solvents on bare silica. Extension to green flash chromatography via correlation of TLC migration results, with conventional polar/nonpolar liquid mixtures, and packed column supercritical fluid chromatography (SFC) retention times, via gradient elution on bare silica with a suite of carbon dioxide mobile phase modifiers, is reported. Feasibility of TLC/SFC correlation is individually described for eight ternary mixtures for a total of 24 neutral analytes. The experimental criteria for TLC/SFC correlation was assumed to be as follows: SFC/UV/MS retention (tR) increases among each of the three resolved mixture components; while, TLC migration (Rf) decreases among the same resolved mixture components. Successful correlation of TLC to SFC was observed for most of the polar organic solvents tested, with the best results observed via SFC on bare silica with methanol as the CO2 modifier and TLC on bare silica with a methanol/dichloromethane mixture. Copyright © 2015 Elsevier B.V. All rights reserved.

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Optimization of a PCRAM Chip for high-speed read and highly reliable reset operations

NASA Astrophysics Data System (ADS)

Li, Xiaoyun; Chen, Houpeng; Li, Xi; Wang, Qian; Fan, Xi; Hu, Jiajun; Lei, Yu; Zhang, Qi; Tian, Zhen; Song, Zhitang

2016-10-01

The widely used traditional Flash memory suffers from its performance limits such as its serious crosstalk problems, and increasing complexity of floating gate scaling. Phase change random access memory (PCRAM) becomes one of the most potential nonvolatile memories among the new memory techniques. In this paper, a 1M-bit PCRAM chip is designed based on the SMIC 40nm CMOS technology. Focusing on the read and write performance, two new circuits with high-speed read operation and highly reliable reset operation are proposed. The high-speed read circuit effectively reduces the reading time from 74ns to 40ns. The double-mode reset circuit improves the chip yield. This 1M-bit PCRAM chip has been simulated on cadence. After layout design is completed, the chip will be taped out for post-test.

Memory device using movement of protons

DOEpatents

Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.

1998-11-03

An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

1998-01-01

An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

2000-01-01

An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

Evaluation Data of a High Temperature COTS Flash Memory Module (TI SM28VLT32) for Use in Geothermal Electronics Packages

DOE Data Explorer

Cashion, Avery

2014-08-29

The accompanying raw data is composslection. Each file is 3 columns and tab-delimited with the first column being the data address, the second column being the first byte of the data, and the third column being the second byte of the data.

Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried Channel

NASA Astrophysics Data System (ADS)

Hou, Zhao-Zhao; Wang, Gui-Lei; Yao, Jia-Xin; Zhang, Qing-Zhu; Yin, Hua-Xiang

2018-05-01

Not Available Supported by the National Science and Technology Major Project of China under Grant No 2013ZX02303007, the National Key Research and Development Program of China under Grant No 2016YFA0301701, and the Youth Innovation Promotion Association of the Chinese Academy of Sciences under Grant No 2016112.

Night-day-night sleep-wakefulness monitoring by ambulatory integrated circuit memories.

PubMed

Yamamoto, M; Nakao, M; Katayama, N; Waku, M; Suzuki, K; Irokawa, K; Abe, M; Ueno, T

1999-04-01

A medium-sized portable digital recorder with fully integrated circuit (IC) memories for sleep monitoring has been developed. It has five amplifiers for EEG, EMG, EOG, ECG, and a signal of body acceleration or respiration sound, four event markers, an 8 ch A/D converter, a digital signal processor (DSP), 192 Mbytes IC flash memories, and batteries. The whole system weighs 1200 g including batteries and is put into a small bag worn on the subject's waist or carried in their hand. The sampling rate for each input channel is programmable through the DSP. This apparatus is valuable for continuously monitoring the states of sleep-wakefulness over 24 h, making a night-day-night recording possible in a hospital, home, or car.

The role of spatial selective attention in working memory for locations: evidence from event-related potentials.

PubMed

Awh, E; Anllo-Vento, L; Hillyard, S A

2000-09-01

We investigated the hypothesis that the covert focusing of spatial attention mediates the on-line maintenance of location information in spatial working memory. During the delay period of a spatial working-memory task, behaviorally irrelevant probe stimuli were flashed at both memorized and nonmemorized locations. Multichannel recordings of event-related potentials (ERPs) were used to assess visual processing of the probes at the different locations. Consistent with the hypothesis of attention-based rehearsal, early ERP components were enlarged in response to probes that appeared at memorized locations. These visual modulations were similar in latency and topography to those observed after explicit manipulations of spatial selective attention in a parallel experimental condition that employed an identical stimulus display.

Individual differences in working memory capacity predict visual attention allocation.

PubMed

Bleckley, M Kathryn; Durso, Francis T; Crutchfield, Jerry M; Engle, Randall W; Khanna, Maya M

2003-12-01

To the extent that individual differences in working memory capacity (WMC) reflect differences in attention (Baddeley, 1993; Engle, Kane, & Tuholski, 1999), differences in WMC should predict performance on visual attention tasks. Individuals who scored in the upper and lower quartiles on the OSPAN working memory test performed a modification of Egly and Homa's (1984) selective attention task. In this task, the participants identified a central letter and localized a displaced letter flashed somewhere on one of three concentric rings. When the displaced letter occurred closer to fixation than the cue implied, high-WMC, but not low-WMC, individuals showed a cost in the letter localization task. This suggests that low-WMC participants allocated attention as a spotlight, whereas those with high WMC showed flexible allocation.

Novel approach for low-cost muzzle flash detection system

NASA Astrophysics Data System (ADS)

Voskoboinik, Asher

2008-04-01

A low-cost muzzle flash detection based on CMOS sensor technology is proposed. This low-cost technology makes it possible to detect various transient events with characteristic times between dozens of microseconds up to dozens of milliseconds while sophisticated algorithms successfully separate them from false alarms by utilizing differences in geometrical characteristics and/or temporal signatures. The proposed system consists of off-the-shelf smart CMOS cameras with built-in signal and image processing capabilities for pre-processing together with allocated memory for storing a buffer of images for further post-processing. Such a sensor does not require sending giant amounts of raw data to a real-time processing unit but provides all calculations in-situ where processing results are the output of the sensor. This patented CMOS muzzle flash detection concept exhibits high-performance detection capability with very low false-alarm rates. It was found that most false-alarms due to sun glints are from sources at distances of 500-700 meters from the sensor and can be distinguished by time examination techniques from muzzle flash signals. This will enable to eliminate up to 80% of falsealarms due to sun specular reflections in the battle field. Additional effort to distinguish sun glints from suspected muzzle flash signal is made by optimization of the spectral band in Near-IR region. The proposed system can be used for muzzle detection of small arms, missiles and rockets and other military applications.

NAFFS: network attached flash file system for cloud storage on portable consumer electronics

NASA Astrophysics Data System (ADS)

Han, Lin; Huang, Hao; Xie, Changsheng

Cloud storage technology has become a research hotspot in recent years, while the existing cloud storage services are mainly designed for data storage needs with stable high speed Internet connection. Mobile Internet connections are often unstable and the speed is relatively low. These native features of mobile Internet limit the use of cloud storage in portable consumer electronics. The Network Attached Flash File System (NAFFS) presented the idea of taking the portable device built-in NAND flash memory as the front-end cache of virtualized cloud storage device. Modern portable devices with Internet connection have built-in more than 1GB NAND Flash, which is quite enough for daily data storage. The data transfer rate of NAND flash device is much higher than mobile Internet connections[1], and its non-volatile feature makes it very suitable as the cache device of Internet cloud storage on portable device, which often have unstable power supply and intermittent Internet connection. In the present work, NAFFS is evaluated with several benchmarks, and its performance is compared with traditional network attached file systems, such as NFS. Our evaluation results indicate that the NAFFS achieves an average accessing speed of 3.38MB/s, which is about 3 times faster than directly accessing cloud storage by mobile Internet connection， and offers a more stable interface than that of directly using cloud storage API. Unstable Internet connection and sudden power off condition are tolerable, and no data in cache will be lost in such situation.

The impact on the ozone layer from NOx produced by terrestrial gamma ray flashes

NASA Astrophysics Data System (ADS)

Cramer, E. S.; Briggs, M. S.; Liu, N.; Mailyan, B.; Dwyer, J. R.; Rassoul, H. K.

2017-05-01

The motivation of this work is to understand the effects of terrestrial gamma ray flashes (TGFs) on the ozone layer. One of the main ozone-destroying mechanisms is the production of NOx in the stratospheric region. NOx from lightning has been considered as a possible cause of ozone depletion, but probably little of this NOx is transported from the tropopause to the stratosphere. Since the energetic particles of TGFs travel from ≈12 km to space, the resulting ionization can produce NOx directly in the stratosphere. In order to quantify the production of stratospheric NOx from TGFs, we use the Runaway Electron Avalanche Model to simulate a typical setup of the acceleration region inside a thundercloud. The photons are then transported through the Earth's atmosphere, where they deposit some of their energy as ionization in the ozone layer. We then calculate the number of NOx molecules produced by considering the average energy required to produce one electron-ion pair. Finally, the effect of TGF NOx production is estimated using the global annual rate of TGFs. It is estimated that the NOx production of TGFs is completely negligible compared to other sources, and therefore, TGFs have no effect on the ozone layer.

A large-scale cryoelectronic system for biological sample banking

NASA Astrophysics Data System (ADS)

Shirley, Stephen G.; Durst, Christopher H. P.; Fuchs, Christian C.; Zimmermann, Heiko; Ihmig, Frank R.

2009-11-01

We describe a polymorphic electronic infrastructure for managing biological samples stored over liquid nitrogen. As part of this system we have developed new cryocontainers and carrier plates attached to Flash memory chips to have a redundant and portable set of data at each sample. Our experimental investigations show that basic Flash operation and endurance is adequate for the application down to liquid nitrogen temperatures. This identification technology can provide the best sample identification, documentation and tracking that brings added value to each sample. The first application of the system is in a worldwide collaborative research towards the production of an AIDS vaccine. The functionality and versatility of the system can lead to an essential optimization of sample and data exchange for global clinical studies.

Configurable test bed design for nanosats to qualify commercial and customized integrated circuits

NASA Astrophysics Data System (ADS)

Guareschi, W.; Azambuja, J.; Kastensmidt, F.; Reis, R.; Durao, O.; Schuch, N.; Dessbesel, G.

The use of small satellites has increased substantially in recent years due to the reduced cost of their development and launch, as well to the flexibility offered by commercial components. The test bed is a platform that allows components to be evaluated and tested in space. It is a flexible platform, which can be adjusted to a wide quantity of components and interfaces. This work proposes the design and implementation of a test bed suitable for test and evaluation of commercial circuits used in nanosatellites. The development of such a platform allows developers to reduce the efforts in the integration of components and therefore speed up the overall system development time. The proposed test bed is a configurable platform implemented using a Field Programmable Gate Array (FPGA) that controls the communication protocols and connections to the devices under test. The Flash-based ProASIC3E FPGA from Microsemi is used as a control system. This adaptive system enables the control of new payloads and softcores for test and validation in space. Thus, the integration can be easily performed through configuration parameters. It is intended for modularity. Each component connected to the test bed can have a specific interface programmed using a hardware description language (HDL). The data of each component is stored in embedded memories. Each component has its own memory space. The size of the allocated memory can be also configured. The data transfer priority can be set and packaging can be added to the logic, when needed. Communication with peripheral devices and with the Onboard Computer (OBC) is done through the pre-implemented protocols, such as I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface) and external memory control. In loco primary tests demonstrated the control system's functionality. The commercial ProASIC3E FPGA family is not space-flight qualified, but tests have been made under Total Ionizing Dose (TID) showing its robustness up to 25 kr- ds (Si). When considering proton and heavy ions, flash-based FPGAs provide immunity to configuration loss and low bit-flips susceptibility in flash memory. In this first version of the test bed two components are connected to the controller FPGA: a commercial magnetometer and a hardened test chip. The embedded FPGA implements a Single Event Effects (SEE) hardened microprocessor and few other soft-cores to be used in space. This test bed will be used in the NanoSatC-BR1, the first Brazilian Cubesat scheduled to be launched in mid-2013.

Defect reduction for semiconductor memory applications using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ye, Zhengmao; Luo, Kang; Irving, J. W.; Lu, Xiaoming; Zhang, Wei; Fletcher, Brian; Liu, Weijun; Xu, Frank; LaBrake, Dwayne; Resnick, Douglas; Sreenivasan, S. V.

2013-03-01

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned resist on the substrate. Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the defect specifications of high end memory devices. Typical defectivity targets are on the order of 0.10/cm2. In previous studies, we have focused on defects such as random non-fill defects occurring during the resist filling process and repeater defects caused by interactions with particles on the substrate. In this work, we attempted to identify the critical imprint defect types using a mask with NAND Flash-like patterns at dimensions as small as 26nm. The two key defect types identified were line break defects induced by small particulates and airborne contaminants which result in local adhesion failure. After identification, the root cause of the defect was determined, and corrective measures were taken to either eliminate or reduce the defect source. As a result, we have been able to reduce defectivity levels by more than three orders of magnitude in only 12 months and are now achieving defectivity adders as small as 2 adders per lot of wafers.

Menopause

MedlinePlus

... and pelvis. Practice slow, deep breathing whenever a hot flash begins. Try taking 6 breaths a minute. Try yoga, tai chi, or meditation. Other tips: Dress lightly and in layers. Keep having sex. Use water-based lubricants or a vaginal moisturizer ...

Local thermal pressurization triggered by flash heating causes dramatic weakening in water-saturated gouges at subseismic slip rates

NASA Astrophysics Data System (ADS)

Yao, Lu; Ma, Shengli; Shimamoto, Toshihiko; Togo, Tetsuhiro; Chen, Jianye; Kitajima, Hiroko; Wang, Yu; He, Honglin

2017-04-01

High-velocity friction studies on water-saturated gouges in recent years have demonstrated that the wet gouges subjected to high-velocity shear tend to have smaller peak and steady-state friction, much shorter slip-weakening distance and lower fracture energy, as compared to the air-dry gouges. Thermal pressurization, compaction-induced pressurization, and flash heating were previously recognized to be the important weakening mechanisms in causing these behaviors. However, in spite of theoretical expectation, there is few evidence to support the occurrence of flash heating in wet gouges, mainly due to the superimposition of multiple weakening mechanisms especially for thermal pressurization. We devised friction experiments to study the role of flash heating in dynamic weakening of water-saturated gouges. In each experiment, we used a pressure vessel to impose a pore pressure of 2.0 MPa on the gouge layer sandwiched between porous ceramics blocks, and applied a long preslide of 1.0 m in displacement before starting the experiment at the target slip rate. By doing so we could (1) suppress rapid thermal pressurization in the bulk gouge layer by means of the designed drained condition and elevated temperature of phase transition of pore water; (2) suppress or even eliminate the pressurization effects due to compaction especially at the very beginning of the experiment. The experiments were performed on a granular gouge (mainly quartz, plagioclase, calcite and illite) and a clay-rich gouge (illite and chlorite ˜58 wt%), which were both collected from the Qingchuan fault of the Longmenshan fault system. For the granular gouge, the steady-state friction coefficients (μss) are 0.39-0.42 at slip rates (V ) of 100 μm/s-10 mm/s; however, at V ≥40 mm/s, the friction coefficients (μ) decrease suddenly at the onset of the slip. For instance, μ reduces by 0.29 within displacement of 0.05-0.08m at V =100 mm/s. For the clay-rich gouge, μss increases from 0.24 to 0.34 as V increasing from 10 μm/s to 100 mm/s. At V =0.4 and 1.0 m/s, the evolutions of friction are characterized by sharp weakening, quick strengthening and slight weakening as slip proceeds. It is noteworthy that the sharp initial weakening is always accompanied by a contemporaneous axial dilatancy of 10-20 μm for both gouges, and the latter friction evolutions are accompanied by axial shortening for the granular gouge and by further dilatancy for the clay-rich gouge. Moreover, microstructure observations reveal that only 40% of the gouge layer was involved in shear deformation for the granular gouge at V =10-100 mm/s, as compared to distributed shear over the entire clay-rich gouge layer at all the tested velocities. The observed data, microstructures and modeling results suggest that flash heating probably triggers thermal pressurization at asperity-contacts or within extremely localized slip zones, causing the sudden initial weakening and contemporaneous dilatancy. The difference in the efficiency of flash heating could explain the different frictional behaviors of the two gouges. Given the extremely fast weakening caused by flash heating and the resulting local thermal pressurization, seismic faults could be weakened more rapidly at much lower slip rates below characteristic weakening velocities previously recognized.

Reduced electron back-injection in Al2O3/AlOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Min Kim, Sung; Lee, Youngmin; Seo, David H.; Seo, Sunae; Wang, Kang L.

2012-12-01

A graphene charge-trap memory is devised using a single-layer graphene channel with an Al2O3/AlOx/Al2O3 oxide stack, where the ion-bombarded AlOx layer is intentionally added to create an abundance of charge-trap sites. The low dielectric constant of AlOx compared to Al2O3 reduces the potential drop in the control oxide Al2O3 and suppresses the electron back-injection from the gate to the charge-storage layer, allowing the memory window of the device to be further extended. This shows that the usage of a lower dielectric constant in the charge-storage layer compared to that of the control oxide layer improves the memory performance for graphene charge-trap memories.

Observations of Two Sprite-Producing Storms in Colorado

NASA Technical Reports Server (NTRS)

Lang, Timothy J.; Lyons, Walter A.; Cummer, Steven A.; Fuchs, Brody R.; Dolan, Brenda; Rutledge, Steven A.; Krehbiel, Paul; Rison, William; Stanley, Mark; Ashcraft, Thomas

2016-01-01

Two sprite-producing thunderstorms were observed on 8 and 25 June 2012 in northeastern Colorado by a combination of low-light cameras, a lightning mapping array, polarimetric and Doppler radars, the National Lightning Detection Network, and charge moment change measurements. The 8 June event evolved from a tornadic hailstorm to a larger multicellular system that produced 21 observed positive sprites in 2 h. The majority of sprites occurred during a lull in convective strength, as measured by total flash rate, flash energy, and radar echo volume. Mean flash area spiked multiple times during this period; however, total flash rates still exceeded 60 min(sup 1), and portions of the storm featured a complex anomalous charge structure, with midlevel positive charge near 20degC. The storm produced predominantly positive cloud-to-ground lightning. All sprite-parent flashes occurred on the northeastern flank of the storm, where strong westerly upper level flow was consistent with advection of charged precipitation away from convection, providing a pathway for stratiform lightning. The 25 June event was another multicellular hailstorm with an anomalous charge structure that produced 26 positive sprites in less than 1 h. The sprites again occurred during a convective lull, with relatively weaker reflectivity and lower total flash rate but relatively larger mean flash area. However, all sprite parents occurred in or near convection and tapped charge layers in adjacent anvil cloud. The results demonstrate the sprite production by convective ground strokes in anomalously charged storms and also indicate that sprite production and convective vigor are inversely related in mature storms.

Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

NASA Technical Reports Server (NTRS)

John, Caroline S.; MacLeod, Todd C.; Evans, Joe; Ho, Fat D.

2011-01-01

We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

Highly reliable top-gated thin-film transistor memory with semiconducting, tunneling, charge-trapping, and blocking layers all of flexible polymers.

PubMed

Wang, Wei; Hwang, Sun Kak; Kim, Kang Lib; Lee, Ju Han; Cho, Suk Man; Park, Cheolmin

2015-05-27

The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 10(4), read and write endurance cycles over 100, and time-dependent data retention of 10(8) s, even when fabricated on a mechanically flexible plastic substrate.

Wearable Wireless Sensor for Multi-Scale Physiological Monitoring

DTIC Science & Technology

2013-10-01

AD_________________ Award Number: W81XWH-12-1-0541 TITLE: Wearable Wireless Sensor for Multi-Scale...TYPE Annual 3. DATES COVERED 25 12- 13 4. TITLE AND SUBTITLE 5a. CONTRACT NUMBER Wearable Wireless Sensor for Multi-Scale Physiological...peripheral management • Procedures for low power mode activation and wake - up • Routines for start- up state detection • Flash memory management

A Public + Private Mashup for Computer Science Education

ERIC Educational Resources Information Center

Wang, Kevin

2013-01-01

Getting called into the boss's office isn't always fun. Memories of trips to the school principal's office flash through one's mind. But the day last year that the author was called in to meet with their division vice president turned out to be a very good day. Executives at his company, Microsoft, had noticed the program he created in his spare…

Experimental Study of Floating-Gate-Type Metal-Oxide-Semiconductor Capacitors with Nanosize Triangular Cross-Sectional Tunnel Areas for Low Operating Voltage Flash Memory Application

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Guo, Ruofeng; Kamei, Takahiro; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Hayashida, Tetsuro; Sakamoto, Kunihiro; Ogura, Atsushi; Masahara, Meishoku

2012-06-01

The floating-gate (FG)-type metal-oxide-semiconductor (MOS) capacitors with planar (planar-MOS) and three-dimensional (3D) nanosize triangular cross-sectional tunnel areas (3D-MOS) have successfully been fabricated by introducing rapid thermal oxidation (RTO) and postdeposition annealing (PDA), and their electrical characteristics between the control gate (CG) and FG have been systematically compared. It was experimentally found in both planar- and 3D-MOS capacitors that the uniform and higher breakdown voltages are obtained by introducing RTO owing to the high-quality thermal oxide formation on the surface and etched edge regions of the n+ polycrystalline silicon (poly-Si) FG, and the leakage current is highly suppressed after PDA owing to the improved quality of the tetraethylorthosilicate (TEOS) silicon dioxide (SiO2) between CG and FG. Moreover, a lower breakdown voltage between CG and FG was obtained in the fabricated 3D-MOS capacitors as compared with that of planar-MOS capacitors thanks to the enhanced local electric field at the tips of triangular tunnel areas. The developed nanosize triangular cross-sectional tunnel area is useful for the fabrication of low operating voltage flash memories.

ReHypar: A Recursive Hybrid Chunk Partitioning Method Using NAND-Flash Memory SSD

PubMed Central

Park, Sung-Soon; Lim, Cheol-Su

2014-01-01

Due to the rapid development of flash memory, SSD is considered to be the replacement of HDD in the storage market. Although SSD retains several promising characteristics, such as high random I/O performance and nonvolatility, its high expense per capacity is the main obstacle in replacing HDD in all storage solutions. An alternative is to provide a hybrid structure where a small portion of SSD address space is combined with the much larger HDD address space. In such a structure, maximizing the space utilization of SSD in a cost-effective way is extremely important to generate high I/O performance. We developed ReHypar (recursive hybrid chunk partitioning) that enables improving the space utilization of SSD in the hybrid structure. The first objective of ReHypar is to mitigate the fragmentation overhead of SSD address space, by reusing the remaining free space of I/O units as much as possible. Furthermore, ReHypar allows defining several, logical data sections in SSD address space, with each of those sections being configured with the different I/O unit. We integrated ReHypar with ext2 and ext4 and evaluated it using two public benchmarks including IOzone and Postmark. PMID:24987741

Multiple Memory Stores and Operant Conditioning: A Rationale for Memory's Complexity

ERIC Educational Resources Information Center

Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu

2009-01-01

Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory…

NRAM: a disruptive carbon-nanotube resistance-change memory.

PubMed

Gilmer, D C; Rueckes, T; Cleveland, L

2018-04-03

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

NRAM: a disruptive carbon-nanotube resistance-change memory

NASA Astrophysics Data System (ADS)

Gilmer, D. C.; Rueckes, T.; Cleveland, L.

2018-04-01

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

Human visual response to nuclear particle exposures

NASA Technical Reports Server (NTRS)

Tobias, C. A.; Budinger, T. F.; Lyman, J. T.

1972-01-01

Experiments with accelerated helium ions were performed in an effort to localize the site of initial radiation interactions in the eye that lead to light flash observations by astronauts during spaceflight. The character and efficiency of helium ion induction of visual sensations depended on the state of dark adaptation of the retina; also, the same events were seen with different efficiencies and details when particle flux density changed. It was concluded that fast particles cause interactions in the retina, particularly in the receptor layer, and thus give rise to the sensations of light flashes, streaks, and supernovae.

FIREFLY: A cubesat mission to study terrestrial gamma-ray flashes

NASA Astrophysics Data System (ADS)

Klenzing, J. H.; Rowland, D. E.; Hill, J.; Weatherwax, A. T.

2009-12-01

FIREFLY is small satellite mission to investigate the link between atmospheric lightning and terrestrial gamma-ray flashes scheduled to launch in late 2010. The instrumentation includes a Gamma-Ray Detector (GRD), VLF receiver, and photometer. GRD will measure the energy and arrival time of x-ray and gamma-ray photons, as well as the energetic electron flux by using a phoswitch-style layered scintillator. The current status of the instrumentation will be discussed, including laboratory tests and simulations of the GRD. FIREFLY is the second in a series of NSF-funded cubesats designed to study the upper atmosphere.

A Hot Downflowing Model Atmosphere for Umbral Flashes and the Physical Properties of Their Dark Fibrils

DOE Office of Scientific and Technical Information (OSTI.GOV)

Henriques, V. M. J.; Mathioudakis, M.; Socas-Navarro, H.

We perform non-LTE inversions in a large set of umbral flashes, including the dark fibrils visible within them, and in the quiescent umbra by using the inversion code NICOLE on a set of full Stokes high-resolution Ca ii λ 8542 observations of a sunspot at disk center. We find that the dark structures have Stokes profiles that are distinct from those of the quiescent and flashed regions. They are best reproduced by atmospheres that are more similar to the flashed atmosphere in terms of velocities, even if with reduced amplitudes. We also find two sets of solutions that finely fitmore » the flashed profiles: a set that is upflowing, featuring a transition region that is deeper than in the quiescent case and preceded by a slight dip in temperature, and a second solution with a hotter atmosphere in the chromosphere but featuring downflows close to the speed of sound at such heights. Such downflows may be related, or even dependent, on the presence of coronal loops, rooted in the umbra of sunspots, as is the case in the region analyzed. Similar loops have been recently observed to have supersonic downflows in the transition region and are consistent with the earlier “sunspot plumes,” which were invariably found to display strong downflows in sunspots. Finally, we find, on average, a magnetic field reduction in the flashed areas, suggesting that the shock pressure is moving field lines in the upper layers.« less

Integrated, nonvolatile, high-speed analog random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

1994-01-01

This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Ferroelectric tunneling element and memory applications which utilize the tunneling element

DOEpatents

Kalinin, Sergei V [Knoxville, TN; Christen, Hans M [Knoxville, TN; Baddorf, Arthur P [Knoxville, TN; Meunier, Vincent [Knoxville, TN; Lee, Ho Nyung [Oak Ridge, TN

2010-07-20

A tunneling element includes a thin film layer of ferroelectric material and a pair of dissimilar electrically-conductive layers disposed on opposite sides of the ferroelectric layer. Because of the dissimilarity in composition or construction between the electrically-conductive layers, the electron transport behavior of the electrically-conductive layers is polarization dependent when the tunneling element is below the Curie temperature of the layer of ferroelectric material. The element can be used as a basis of compact 1R type non-volatile random access memory (RAM). The advantages include extremely simple architecture, ultimate scalability and fast access times generic for all ferroelectric memories.

Effects of Deep Convection on Atmospheric Chemistry

NASA Technical Reports Server (NTRS)

Pickering, Kenneth E.

2007-01-01

This presentation will trace the important research developments of the last 20+ years in defining the roles of deep convection in tropospheric chemistry. The role of deep convection in vertically redistributing trace gases was first verified through field experiments conducted in 1985. The consequences of deep convection have been noted in many other field programs conducted in subsequent years. Modeling efforts predicted that deep convection occurring over polluted continental regions would cause downstream enhancements in photochemical ozone production in the middle and upper troposphere due to the vertical redistribution of ozone precursors. Particularly large post-convective enhancements of ozone production were estimated for convection occurring over regions of pollution from biomass burning and urban areas. These estimates were verified by measurements taken downstream of biomass burning regions of South America. Models also indicate that convective transport of pristine marine boundary layer air causes decreases in ozone production rates in the upper troposphere and that convective downdrafts bring ozone into the boundary layer where it can be destroyed more rapidly. Additional consequences of deep convection are perturbation of photolysis rates, effective wet scavenging of soluble species, nucleation of new particles in convective outflow, and the potential fix stratosphere-troposphere exchange in thunderstorm anvils. The remainder of the talk will focus on production of NO by lightning, its subsequent transport within convective clouds . and its effects on downwind ozone production. Recent applications of cloud/chemistry model simulations combined with anvil NO and lightning flash observations in estimating NO Introduction per flash will be described. These cloud-resolving case-study simulations of convective transport and lightning NO production in different environments have yielded results which are directly applicable to the design of lightning parameterizations for global chemical transport models. The range of mean values (factor of 3) of NO production per flash (or per meter of lightning channel length) that have been deduced from the model will be shown and compared with values of production in the literature that have been deduced using other methods, Results show that on a per flash basis, IC flashes are nearly as productive of NO as CG flashes. When combined with the global flash rate of 44 flashes per second from NASA's Optical Transient Detector (OTD) measurements, these estimates and the results from other techniques yield global NO production rates of 2-9 TgN/year. Vertical profiles of lightning NOx mass at the end of the 3-D storm simulations have been summarized to yield suggested profiles for use in global models. Simulations of the photochemistry over the 24 hours following a storm have been performed to determine the additional ozone production which can be attributed to lightning NO.

Forced Ion Migration for Chalcogenide Phase Change Memory Device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2011-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2012-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Flood Vulnerability Assessment Map

EIA Publications

Maps of energy infrastructure with real-time storm and emergency information by fuel type and by state. Flood hazard information from FEMA has been combined with EIA's energy infrastructure layers as a tool to help state, county, city, and private sector planners assess which key energy infrastructure assets are vulnerable to rising sea levels, storm surges, and flash flooding. Note that flood hazard layers must be zoomed-in to street level before they become visible.

76 FR 2681 - Amended Environmental Impact Statement Filing System Guidance for Implementing 40 CFR 1506.9 and...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-14

...., compact discs (CDs), USB flash drives, or memory cards. Please note that if a Federal agency prepares an... of the NOA in the Federal Register. If a calculated time period would end on a non- working day, the assigned time period will be the next working day (i.e., time periods will not end on weekends or Federal...

Highly Asynchronous VisitOr Queue Graph Toolkit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pearce, R.

2012-10-01

HAVOQGT is a C++ framework that can be used to create highly parallel graph traversal algorithms. The framework stores the graph and algorithmic data structures on external memory that is typically mapped to high performance locally attached NAND FLASH arrays. The framework supports a vertex-centered visitor programming model. The frameworkd has been used to implement breadth first search, connected components, and single source shortest path.

Research and Development of Collaborative Environments for Command and Control

DTIC Science & Technology

2011-05-01

at any state of building. The viewer tool presents the designed model with 360-degree perspective views even after regeneration of the design, which...and it shows the following prompt. GUM > APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED...11 First initialize the microSD card by typing GUM > mmcinit Then erase the old Linux kernel and the root file system on the flash memory

Temporal dynamics of encoding, storage and reallocation of visual working memory

PubMed Central

Bays, Paul M; Gorgoraptis, Nikos; Wee, Natalie; Marshall, Louise; Husain, Masud

2012-01-01

The process of encoding a visual scene into working memory has previously been studied using binary measures of recall. Here we examine the temporal evolution of memory resolution, based on observers’ ability to reproduce the orientations of objects presented in brief, masked displays. Recall precision was accurately described by the interaction of two independent constraints: an encoding limit that determines the maximum rate at which information can be transferred into memory, and a separate storage limit that determines the maximum fidelity with which information can be maintained. Recall variability decreased incrementally with time, consistent with a parallel encoding process in which visual information from multiple objects accumulates simultaneously in working memory. No evidence was observed for a limit on the number of items stored. Cueing one display item with a brief flash led to rapid development of a recall advantage for that item. This advantage was short-lived if the cue was simply a salient visual event, but was maintained if it indicated an object of particular relevance to the task. These cueing effects were observed even for items that had already been encoded into memory, indicating that limited memory resources can be rapidly reallocated to prioritize salient or goal-relevant information. PMID:21911739

Temporal dynamics of encoding, storage, and reallocation of visual working memory.

PubMed

Bays, Paul M; Gorgoraptis, Nikos; Wee, Natalie; Marshall, Louise; Husain, Masud

2011-09-12

The process of encoding a visual scene into working memory has previously been studied using binary measures of recall. Here, we examine the temporal evolution of memory resolution, based on observers' ability to reproduce the orientations of objects presented in brief, masked displays. Recall precision was accurately described by the interaction of two independent constraints: an encoding limit that determines the maximum rate at which information can be transferred into memory and a separate storage limit that determines the maximum fidelity with which information can be maintained. Recall variability decreased incrementally with time, consistent with a parallel encoding process in which visual information from multiple objects accumulates simultaneously in working memory. No evidence was observed for a limit on the number of items stored. Cuing one display item with a brief flash led to rapid development of a recall advantage for that item. This advantage was short-lived if the cue was simply a salient visual event but was maintained if it indicated an object of particular relevance to the task. These cuing effects were observed even for items that had already been encoded into memory, indicating that limited memory resources can be rapidly reallocated to prioritize salient or goal-relevant information.

High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

2017-08-01

Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

High‐Performance Nonvolatile Organic Field‐Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers

PubMed Central

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn

2017-01-01

Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619

Multi-layered nanocomposite dielectrics for high density organic memory devices

NASA Astrophysics Data System (ADS)

Kang, Moonyeong; Chung, Kyungwha; Baeg, Kang-Jun; Kim, Dong Ha; Kim, Choongik

2015-01-01

We fabricated organic memory devices with metal-pentacene-insulator-silicon structure which contain double dielectric layers comprising 3D pattern of Au nanoparticles (Au NPs) and block copolymer (PS-b-P2VP). The role of Au NPs is to charge/discharge carriers upon applied voltage, while block copolymer helps to form highly ordered Au NP patterns in the dielectric layer. Double-layered nanocomposite dielectrics enhanced the charge trap density (i.e., trapped charge per unit area) by Au NPs, resulting in increase of the memory window (ΔVth).

IR Thermography of International Space Station Radiator Panels

NASA Technical Reports Server (NTRS)

Koshti, Ajay; Winfree, WIlliam; Morton, Richard; Howell, Patricia

2010-01-01

Several non-flight qualification test radiators were inspected using flash thermography. Flash thermography data analysis used raw and second derivative images to detect anomalies (Echotherm and Mosaic). Simple contrast evolutions were plotted for the detected anomalies to help in anomaly characterization. Many out-of-family indications were noted. Some out-of-family indications were classified as cold spot indications and are due to additional adhesive or adhesive layer behind the facesheet. Some out-of-family indications were classified as hot spot indications and are due to void, unbond or lack of adhesive behind the facesheet. The IR inspection helped in assessing expected manufacturing quality of the radiators.

``Flash'' synthesis of ``giant'' Mn-doped CdS/ZnSe/ZnS nanocrystals with ZnSe layer as hole quantum-well

NASA Astrophysics Data System (ADS)

Xu, Ruilin; Zhang, Jiayu

Usually, exciton-Mn energy transfer in Mn-doped CdS/ZnS nanocrystals (NCs) can readily outcompete the exciton trapping by an order of magnitude. However, with the accumulation of non-radiative defects in the giant shell during the rapid growth of the thick shell (up to ~20 monolayers in no more than 10 minutes), the photoluminescence (PL) quantum yield of this kind of ``giant'' NCs is significantly reduced by the accumulation of non-radiative defects during the rapid growth of thick shell. That is because the exciton-Mn energy transfer in Mn-doped CdS/ZnS NCs is significantly inhibited by the hole trapping as the major competing process, resulting from the insufficient hole-confinement in CdS/ZnS NCs. Accordingly ``flash'' synthesis of giant Mn-doped CdS/ZnSe/ZnS NCs with ZnSe layer as hole quantum-well is developed to suppress the inhibition. Meanwhile Mn2+ PL peak changes profoundly from ~620 nm to ~540 nm after addition of ZnSe layer. Studies are under the way to explore the relevant mechanisms.

Estimation of NOx Production from Terrestrial Gamma-ray Flashes

NASA Astrophysics Data System (ADS)

Cramer, E. S.; Briggs, M. S.; Liu, N.; Mailyan, B.; Rassoul, H.; Dwyer, J. R.

2016-12-01

The motivation of this work is to understand the effects of TGFs on the ozone layer. One of the main ozone-destroying mechanisms is the production of NOx in the stratospheric region. We first review the mechanisms for NOx production in this region, specifically looking at the global rate produced by lightning. Terrestrial Gamma-ray Flashes, with runaway electron avalanches and the subsequent bremsstrahlung gamma rays, produce atmospheric ionization at all altitudes of the atmosphere. TGFs might have a greater impact on the ozone concentration in the stratosphere since they directly produce ionization and thus NOx in the ozone layer. In order to study the effect from TGFs, we use the runaway electron avalanche model (REAM) to simulate a typical TGF. The photons are then transported through Earth's atmosphere, where they deposit some of their energy as ionization in the ozone layer. We then calculate the number of NOx molecules produced by considering the average energy required to produce one electron-ion pair (W = 35 eV). The W factor has been experimentally quantified and is constant for various types of radiation and over large energy ranges and electric fields. Finally, the effect of TGF NOx production is estimated using the global annual rate of TGFs.

The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V. A. L.

2013-02-01

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics.The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics. Electronic supplementary information (ESI) available: UV-vis spectrum of Au nanoparticle aqueous solution, transfer characteristics of the transistors without inserting an Au nanoparticle monolayer, AFM image of the pentacene layer, transfer characteristics at different program voltages and memory windows with respect to the P/E voltage. See DOI: 10.1039/c2nr32579a

A qualitative study on personal information management (PIM) in clinical and basic sciences faculty members of a medical university in Iran

PubMed Central

Sedghi, Shahram; Abdolahi, Nida; Azimi, Ali; Tahamtan, Iman; Abdollahi, Leila

2015-01-01

Background: Personal Information Management (PIM) refers to the tools and activities to save and retrieve personal information for future uses. This study examined the PIM activities of faculty members of Iran University of Medical Sciences (IUMS) regarding their preferred PIM tools and four aspects of acquiring, organizing, storing and retrieving personal information. Methods: The qualitative design was based on phenomenology approach and we carried out 37 interviews with clinical and basic sciences faculty members of IUMS in 2014. The participants were selected using a random sampling method. All interviews were recorded by a digital voice recorder, and then transcribed, codified and finally analyzed using NVivo 8 software. Results: The use of PIM electronic tools (e-tools) was below expectation among the studied sample and just 37% had reasonable knowledge of PIM e-tools such as, external hard drivers, flash memories etc. However, all participants used both paper and electronic devices to store and access information. Internal mass memories (in Laptops) and flash memories were the most used e-tools to save information. Most participants used "subject" (41.00%) and "file name" (33.7 %) to save, organize and retrieve their stored information. Most users preferred paper-based rather than electronic tools to keep their personal information. Conclusion: Faculty members had little knowledge about PIM techniques and tools. Those who organized personal information could easier retrieve the stored information for future uses. Enhancing familiarity with PIM tools and training courses of PIM tools and techniques are suggested. PMID:26793648

The Ischia island flash flood of November 2009 (Italy): Phenomenon analysis and flood hazard

NASA Astrophysics Data System (ADS)

Santo, A.; Di Crescenzo, G.; Del Prete, S.; Di Iorio, L.

The island of Ischia is particularly susceptible to landslides and flash floods due to its particular geological and geomorphological context. Urbanization in recent decades coupled with the development of tourism has increased the risk. After the November 10, 2009 event occurring in the northern sector of the island (the town of Casamicciola), a detailed geo-morphological survey was conducted to ascertain the evolution of the phenomenon. In the watersheds upstream of Casamicciola, many landslides were mapped and the volume of material involved during detachment and sliding was estimated. In the lower course area, near the town and towards the sea, flow pathways were reconstructed with the aid of extensive video footage taken during the event. Rainfall data were also analyzed and a relationship was established between the hourly rainfall rate and the flash flood. The phenomenon was found to be quite complex, with many upstream landslides stopping before reaching the urban area. In the lower course the alluvial event occurred as a flood with a very small sediment discharge, which left a very thin layer of sediment. Reconstruction of the flash flood phenomenon suggested possible action for future risk mitigation, early warning and civil protection plans.

Fusion Helmet: Electronic Analysis

DTIC Science & Technology

2014-04-01

Table 1: LYR203-101B Board Feature P1 (SEC MODULE) DM648 GPIO PORn Video Ports (2) Bootmode SPI/UART I2C CLKIN MDIO DDR2 128MB/16bit SPI Flash 16...McASP EMAC-SGMII /2 MDIO I2C GPIO DDR2 128MB/16bit JTAG Memory CLKGEN I2C PGoodPGood PORn Pwr LED Power DSP SPI/UART DSP SPI/UARTSPI/UART Video Display

Pigeons' Memory for Number of Events: Effects of Intertrial Interval and Delay Interval Illumination

ERIC Educational Resources Information Center

Hope, Chris; Santi, Angelo

2004-01-01

In Experiment 1, pigeons were trained at a 0-s baseline delay to discriminate sequences of light flashes (illumination of the feeder) that varied in number but not time (2f/4s and 8f/4s). During training, the intertrial interval was illuminated by the houselight for Group Light, but it was dark for Group Dark. Testing conducted with dark delay…

Smart Cards and remote entrusting

NASA Astrophysics Data System (ADS)

Aussel, Jean-Daniel; D'Annoville, Jerome; Castillo, Laurent; Durand, Stephane; Fabre, Thierry; Lu, Karen; Ali, Asad

Smart cards are widely used to provide security in end-to-end communication involving servers and a variety of terminals, including mobile handsets or payment terminals. Sometime, end-to-end server to smart card security is not applicable, and smart cards must communicate directly with an application executing on a terminal, like a personal computer, without communicating with a server. In this case, the smart card must somehow trust the terminal application before performing some secure operation it was designed for. This paper presents a novel method to remotely trust a terminal application from the smart card. For terminals such as personal computers, this method is based on an advanced secure device connected through the USB and consisting of a smart card bundled with flash memory. This device, or USB dongle, can be used in the context of remote untrusting to secure portable applications conveyed in the dongle flash memory. White-box cryptography is used to set the secure channel and a mechanism based on thumbprint is described to provide external authentication when session keys need to be renewed. Although not as secure as end-to-end server to smart card security, remote entrusting with smart cards is easy to deploy for mass-market applications and can provide a reasonable level of security.

Push the flash floating gate memories toward the future low energy application

NASA Astrophysics Data System (ADS)

Della Marca, V.; Just, G.; Regnier, A.; Ogier, J.-L.; Simola, R.; Niel, S.; Postel-Pellerin, J.; Lalande, F.; Masoero, L.; Molas, G.

2013-01-01

In this paper the energy consumption of flash floating gate cell, during a channel hot electron operation, is investigated. We characterize the device using different ramp and box pulses on control gate, to find the best solution to have low energy consumption and good cell performances. We use a new dynamic method to measure the drain current absorption in order to evaluate the impact of different bias conditions, and to study the cell behavior. The programming window and the energy consumption are considered as fundamental parameters. Using this dynamic technique, three zones of work are found; it is possible to optimize the drain voltage during the programming operation to minimize the energy consumption. Moreover, the cell's performances are improved using the CHISEL effect, with a reverse body bias. After the study concerning the programming pulses adjusting, we show the results obtained by increasing the channel doping dose parameter. Considering a channel hot electron programming operation, it is important to focus our attention on the bitline leakage consumption contribution. We measured it for the unselected bitline cells, and we show the effects of the lightly doped drain implantation energy on the leakage current. In this way the impact of gate induced drain leakage in band-to-band tunneling regime decreases, improving the cell's performances in a memory array.

Al203 thin films on Silicon and Germanium substrates for CMOS and flash memory applications

NASA Astrophysics Data System (ADS)

Gopalan, Sundararaman; Dutta, Shibesh; Ramesh, Sivaramakrishnan; Prathapan, Ragesh; Sreehari G., S.

2017-07-01

As scaling of device dimensions has continued, it has become necessary to replace traditional SiO2 with high dielectric constant materials in the conventional CMOS devices. In addition, use of metal gate electrodes and Germanium substrates may have to be used in order to address leakage and mobility issues. Al2O3 is one of the potential candidates both for CMOS and as a blocking dielectric for Flash memory applications owing to its low leakage. In this study, the effects of sputtering conditions and post-deposition annealing conditions on the electrical and reliability characteristics of MOS capacitors using Al2O3 films on Si and Ge substrates with Aluminium gate electrodes have been presented. It was observed that higher sputtering power resulted in larger flat-band voltage (Vfb) shifts, more hysteresis, higher interface state density (Dit) and a poorer reliability. Wit was also found that while a short duration high temperature annealing improves film characteristics, a long duration anneal even at 800C was found to be detrimental to MOS characteristics. Finally, the electronic conduction mechanism in Al2O3 films was also studied. It was observed that the conduction mechanism varied depending on the annealing condition, thickness of film and electric field.

Sb7Te3/Ge multilayer films for low power and high speed phase-change memory

NASA Astrophysics Data System (ADS)

Chen, Shiyu; Wu, Weihua; Zhai, Jiwei; Song, Sannian; Song, Zhitang

2017-06-01

Phase-change memory has attracted enormous attention for its excellent properties as compared to flash memories due to their high speed, high density, better date retention and low power consumption. Here we present Sb7Te3/Ge multilayer films by using a magnetron sputtering method. The 10 years’ data retention temperature is significantly increased compared with pure Sb7Te3. When the annealing temperature is above 250 °C, the Sb7Te3/Ge multilayer thin films have better interface properties, which renders faster crystallization speed and high thermal stability. The decrease in density of ST/Ge multilayer films is only around 5%, which is very suitable for phase change materials. Moreover, the low RESET power benefits from high resistivity and better thermal stability in the PCM cells. This work demonstrates that the multilayer configuration thin films with tailored properties are beneficial for improving the stability and speed in phase change memory applications.

Abnormal Multiple Charge Memory States in Exfoliated Few-Layer WSe2 Transistors.

PubMed

Chen, Mikai; Wang, Yifan; Shepherd, Nathan; Huard, Chad; Zhou, Jiantao; Guo, L J; Lu, Wei; Liang, Xiaogan

2017-01-24

To construct reliable nanoelectronic devices based on emerging 2D layered semiconductors, we need to understand the charge-trapping processes in such devices. Additionally, the identified charge-trapping schemes in such layered materials could be further exploited to make multibit (or highly desirable analog-tunable) memory devices. Here, we present a study on the abnormal charge-trapping or memory characteristics of few-layer WSe 2 transistors. This work shows that multiple charge-trapping states with large extrema spacing, long retention time, and analog tunability can be excited in the transistors made from mechanically exfoliated few-layer WSe 2 flakes, whereas they cannot be generated in widely studied few-layer MoS 2 transistors. Such charge-trapping characteristics of WSe 2 transistors are attributed to the exfoliation-induced interlayer deformation on the cleaved surfaces of few-layer WSe 2 flakes, which can spontaneously form ambipolar charge-trapping sites. Our additional results from surface characterization, charge-retention characterization at different temperatures, and density functional theory computation strongly support this explanation. Furthermore, our research also demonstrates that the charge-trapping states excited in multiple transistors can be calibrated into consistent multibit data storage levels. This work advances the understanding of the charge memory mechanisms in layered semiconductors, and the observed charge-trapping states could be further studied for enabling ultralow-cost multibit analog memory devices.

Efficiently Communicating Rich Heterogeneous Geospatial Data from the FeMO2008 Dive Cruise with FlashMap on EarthRef.org

NASA Astrophysics Data System (ADS)

Minnett, R. C.; Koppers, A. A.; Staudigel, D.; Staudigel, H.

2008-12-01

EarthRef.org is comprehensive and convenient resource for Earth Science reference data and models. It encompasses four main portals: the Geochemical Earth Reference Model (GERM), the Magnetics Information Consortium (MagIC), the Seamount Biogeosciences Network (SBN), and the Enduring Resources for Earth Science Education (ERESE). Their underlying databases are publically available and the scientific community has contributed widely and is urged to continue to do so. However, the net result is a vast and largely heterogeneous warehouse of geospatial data ranging from carefully prepared maps of seamounts to geochemical data/metadata, daily reports from seagoing expeditions, large volumes of raw and processed multibeam data, images of paleomagnetic sampling sites, etc. This presents a considerable obstacle for integrating other rich media content, such as videos, images, data files, cruise tracks, and interoperable database results, without overwhelming the web user. The four EarthRef.org portals clearly lend themselves to a more intuitive user interface and has, therefore, been an invaluable test bed for the design and implementation of FlashMap, a versatile KML-driven geospatial browser written for reliability and speed in Adobe Flash. FlashMap allows layers of content to be loaded and displayed over a streaming high-resolution map which can be zoomed and panned similarly to Google Maps and Google Earth. Many organizations, from National Geographic to the USGS, have begun using Google Earth software to display geospatial content. However, Google Earth, as a desktop application, does not integrate cleanly with existing websites requiring the user to navigate away from the browser and focus on a separate application and Google Maps, written in Java Script, does not scale up reliably to large datasets. FlashMap remedies these problems as a web-based application that allows for seamless integration of the real-time display power of Google Earth and the flexibility of the web without losing scalability and control of the base maps. Our Flash-based application is fully compatible with KML (Keyhole Markup Language) 2.2, the most recent iteration of KML, allowing users with existing Google Earth KML files to effortlessly display their geospatial content embedded in a web page. As a test case for FlashMap, the annual Iron-Oxidizing Microbial Observatory (FeMO) dive cruise to the Loihi Seamount, in conjunction with data available from ongoing and published FeMO laboratory studies, showcases the flexibility of this single web-based application. With a KML 2.2 compatible web-service providing the content, any database can display results in FlashMap. The user can then hide and show multiple layers of content, potentially from several data sources, and rapidly digest a vast quantity of information to narrow the search results. This flexibility gives experienced users the ability to drill down to exactly the record they are looking for (SERC at Carleton College's educational application of FlashMap at http://serc.carleton.edu/sp/erese/activities/22223.html) and allows users familiar with Google Earth the ability to load and view geospatial data content within a browser from any computer with an internet connection.

Investigation and process optimization of SONOS cell's drain disturb in 2-transistor structure flash arrays

NASA Astrophysics Data System (ADS)

Xu, Zhaozhao; Qian, Wensheng; Chen, Hualun; Xiong, Wei; Hu, Jun; Liu, Donghua; Duan, Wenting; Kong, Weiran; Na, Wei; Zou, Shichang

2017-03-01

The mechanism and distribution of drain disturb (DD) are investigated in silicon-oxide-nitride-oxide-silicon (SONOS) flash cells. It is shown that DD is the only concern in this paper. First, the distribution of trapped charge in nitride layer is found to be non-localized (trapped in entire nitride layer along the channel) after programming. Likewise, the erase is also non-localized. Then, the main disturb mechanism: Fowler Nordheim tunneling (FNT) has been confirmed in this paper with negligible disturb effect from hot-hole injection (HHI). And then, distribution of DD is confirmed to be non-localized similarly, which denotes that DD exists in entire tunneling oxide (Oxide for short). Next, four process optimization ways are proposed for minimization of DD, and VTH shift is measured. It reveals that optimized lightly doped drain (LDD), halo, and channel implant are required for the fabrication of a robust SONOS cell. Finally, data retention and endurance of the optimized SONOS are demonstrated.

KSC-05PD-0565

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, a digital still camera has been mounted in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0562

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers check the digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the tank's separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0564

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, a worker mounts a digital still camera in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0561

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers prepare a digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following its separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0563

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers prepare a digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

Role of nanorods insertion layer in ZnO-based electrochemical metallization memory cell

NASA Astrophysics Data System (ADS)

Mangasa Simanjuntak, Firman; Singh, Pragya; Chandrasekaran, Sridhar; Juanda Lumbantoruan, Franky; Yang, Chih-Chieh; Huang, Chu-Jie; Lin, Chun-Chieh; Tseng, Tseung-Yuen

2017-12-01

An engineering nanorod array in a ZnO-based electrochemical metallization device for nonvolatile memory applications was investigated. A hydrothermally synthesized nanorod layer was inserted into a Cu/ZnO/ITO device structure. Another device was fabricated without nanorods for comparison, and this device demonstrated a diode-like behavior with no switching behavior at a low current compliance (CC). The switching became clear only when the CC was increased to 75 mA. The insertion of a nanorods layer induced switching characteristics at a low operation current and improve the endurance and retention performances. The morphology of the nanorods may control the switching characteristics. A forming-free electrochemical metallization memory device having long switching cycles (>104 cycles) with a sufficient memory window (103 times) for data storage application, good switching stability and sufficient retention was successfully fabricated by adjusting the morphology and defect concentration of the inserted nanorod layer. The nanorod layer not only contributed to inducing resistive switching characteristics but also acted as both a switching layer and a cation diffusion control layer.

Inverse Resistance Change Cr2Ge2Te6-Based PCRAM Enabling Ultralow-Energy Amorphization.

PubMed

Hatayama, Shogo; Sutou, Yuji; Shindo, Satoshi; Saito, Yuta; Song, Yun-Heub; Ando, Daisuke; Koike, Junichi

2018-01-24

Phase-change random access memory (PCRAM) has attracted much attention for next-generation nonvolatile memory that can replace flash memory and can be used for storage-class memory. Generally, PCRAM relies on the change in the electrical resistance of a phase-change material between high-resistance amorphous (reset) and low-resistance crystalline (set) states. Herein, we present an inverse resistance change PCRAM with Cr 2 Ge 2 Te 6 (CrGT) that shows a high-resistance crystalline reset state and a low-resistance amorphous set state. The inverse resistance change was found to be due to a drastic decrease in the carrier density upon crystallization, which causes a large increase in contact resistivity between CrGT and the electrode. The CrGT memory cell was demonstrated to show fast reversible resistance switching with a much lower operating energy for amorphization than a Ge 2 Sb 2 Te 5 memory cell. This low operating energy in CrGT should be due to a small programmed amorphous volume, which can be realized by a high-resistance crystalline matrix and a dominant contact resistance. Simultaneously, CrGT can break the trade-off relationship between the crystallization temperature and operating speed.

Layer-by-layer charging in non-volatile memory devices using embedded sub-2 nm platinum nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ramalingam, Balavinayagam; Zheng, Haisheng; Gangopadhyay, Shubhra, E-mail: gangopadhyays@missouri.edu

In this work, we demonstrate multi-level operation of a non-volatile memory metal oxide semiconductor capacitor by controlled layer-by-layer charging of platinum nanoparticle (PtNP) floating gate devices with defined gate voltage bias ranges. The device consists of two layers of ultra-fine, sub-2 nm PtNPs integrated between Al{sub 2}O{sub 3} tunneling and separation layers. PtNP size and interparticle distance were varied to control the particle self-capacitance and associated Coulomb charging energy. Likewise, the tunneling layer thicknesses were also varied to control electron tunneling to the first and second PtNP layers. The final device configuration with optimal charging behavior and multi-level programming was attainedmore » with a 3 nm Al{sub 2}O{sub 3} initial tunneling layer, initial PtNP layer with particle size 0.54 ± 0.12 nm and interparticle distance 4.65 ± 2.09 nm, 3 nm Al{sub 2}O{sub 3} layer to separate the PtNP layers, and second particle layer with 1.11 ± 0.28 nm PtNP size and interparticle distance 2.75 ± 1.05 nm. In this device, the memory window of the first PtNP layer saturated over a programming bias range of 7 V to 14 V, after which the second PtNP layer starts charging, exhibiting a multi-step memory window with layer-by-layer charging.« less

A Semi-Preemptive Garbage Collector for Solid State Drives

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Junghee; Kim, Youngjae; Shipman, Galen M

2011-01-01

NAND flash memory is a preferred storage media for various platforms ranging from embedded systems to enterprise-scale systems. Flash devices do not have any mechanical moving parts and provide low-latency access. They also require less power compared to rotating media. Unlike hard disks, flash devices use out-of-update operations and they require a garbage collection (GC) process to reclaim invalid pages to create free blocks. This GC process is a major cause of performance degradation when running concurrently with other I/O operations as internal bandwidth is consumed to reclaim these invalid pages. The invocation of the GC process is generally governedmore » by a low watermark on free blocks and other internal device metrics that different workloads meet at different intervals. This results in I/O performance that is highly dependent on workload characteristics. In this paper, we examine the GC process and propose a semi-preemptive GC scheme that can preempt on-going GC processing and service pending I/O requests in the queue. Moreover, we further enhance flash performance by pipelining internal GC operations and merge them with pending I/O requests whenever possible. Our experimental evaluation of this semi-preemptive GC sheme with realistic workloads demonstrate both improved performance and reduced performance variability. Write-dominant workloads show up to a 66.56% improvement in average response time with a 83.30% reduced variance in response time compared to the non-preemptive GC scheme.« less

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

NASA Astrophysics Data System (ADS)

Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

2014-01-01

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

NASA Astrophysics Data System (ADS)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

Nonvolatile memory thin film transistors using CdSe/ZnS quantum dot-poly(methyl methacrylate) composite layer formed by a two-step spin coating technique

NASA Astrophysics Data System (ADS)

Chen, Ying-Chih; Huang, Chun-Yuan; Yu, Hsin-Chieh; Su, Yan-Kuin

2012-08-01

The nonvolatile memory thin film transistors (TFTs) using a core/shell CdSe/ZnS quantum dot (QD)-poly(methyl methacrylate) (PMMA) composite layer as the floating gate have been demonstrated, with the device configuration of n+-Si gate/SiO2 insulator/QD-PMMA composite layer/pentacene channel/Au source-drain being proposed. To achieve the QD-PMMA composite layer, a two-step spin coating technique was used to successively deposit QD-PMMA composite and PMMA on the insulator. After the processes, the variation of crystal quality and surface morphology of the subsequent pentacene films characterized by x-ray diffraction spectra and atomic force microscopy was correlated to the two-step spin coating. The crystalline size of pentacene was improved from 147.9 to 165.2 Å, while the degree of structural disorder was decreased from 4.5% to 3.1% after the adoption of this technique. In pentacene-based TFTs, the improvement of the performance was also significant, besides the appearances of strong memory characteristics. The memory behaviors were attributed to the charge storage/discharge effect in QD-PMMA composite layer. Under the programming and erasing operations, programmable memory devices with the memory window (Δ Vth) = 23 V and long retention time were obtained.

Formation and photoluminescence of GaAs1-xNx dilute nitride achieved by N-implantation and flash lamp annealing

NASA Astrophysics Data System (ADS)

Gao, Kun; Prucnal, S.; Skorupa, W.; Helm, M.; Zhou, Shengqiang

2014-07-01

In this paper, we present the fabrication of dilute nitride semiconductor GaAs1-xNx by nitrogen-ion-implantation and flash lamp annealing (FLA). N was implanted into the GaAs wafers with atomic concentration of about ximp1 = 0.38% and ximp2 = 0.76%. The GaAs1-xNx layer is regrown on GaAs during FLA treatment in a solid phase epitaxy process. Room temperature near band-edge photoluminescence (PL) has been observed from the FLA treated GaAs1-xNx samples. According to the redshift of the near band-edge PL peak, up to 80% and 44% of the implanted N atoms have been incorporated into the lattice by FLA for ximp1 = 0.38% and ximp2 = 0.76%, respectively. Our investigation shows that ion implantation followed by ultrashort flash lamp treatment, which allows for large scale production, exhibits a promising prospect on bandgap engineering of GaAs based semiconductors.

Foundry Technologies Focused on Environmental and Ecological Applications

NASA Astrophysics Data System (ADS)

Roizin, Ya.; Lisiansky, M.; Pikhay, E.

Solutions allowing fabrication of remote control systems with integrated sensors (motes) were introduced as a part of CMOS foundry production platform and verified on silicon. The integrated features include sensors employing principles previously verified in the development of ultra-low power consuming non-volatile memories (C-Flash, MRAM) and components allowing low-power energy harvesting (low voltage rectifiers, high -voltage solar cells). The developed systems are discussed with emphasis on their environmental and security applications.

Modular Electronics for Flash Memory Production

DTIC Science & Technology

2011-12-28

DEFENSE TECHNICAL INFORMATION CENTER ImuM ktkUmlimäj DTICfhas determined on oc öf^H AJI that this Technical Document has the Distribution...the second harmonic (8I2/8V2), and a normalization to remove the scale of the measured current. The red dashed lines represent notable vibrational...superimposed as red dashed lines. The agreement between the two spectroscopies is conclusive that we have successfully put our OPE derivative into the gap

Poly(3,4-ethylenedioxythiophene)-Poly(styrenesulfonate) Interlayer Insertion Enables Organic Quaternary Memory.

PubMed

Cheng, Xue-Feng; Hou, Xiang; Qian, Wen-Hu; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei

2017-08-23

Herein, for the first time, quaternary resistive memory based on an organic molecule is achieved via surface engineering. A layer of poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT-PSS) was inserted between the indium tin oxide (ITO) electrode and the organic layer (squaraine, SA-Bu) to form an ITO/PEDOT-PSS/SA-Bu/Al architecture. The modified resistive random-access memory (RRAM) devices achieve quaternary memory switching with the highest yield (∼41%) to date. Surface morphology, crystallinity, and mosaicity of the deposited organic grains are greatly improved after insertion of a PEDOT-PSS interlayer, which provides better contacts at the grain boundaries as well as the electrode/active layer interface. The PEDOT-PSS interlayer also reduces the hole injection barrier from the electrode to the active layer. Thus, the threshold voltage of each switching is greatly reduced, allowing for more quaternary switching in a certain voltage window. Our results provide a simple yet powerful strategy as an alternative to molecular design to achieve organic quaternary resistive memory.

Evaluation of the Radiation Susceptibility of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; LaBel, Kenneth

2017-01-01

We evaluated the heavy ion and proton-induced single-event effects (SEE) for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of similar density and performance in the multiple-cell level (MLC) storage mode. However, the single-level-cell (SLC) storage mode of the 3D NAND showed significantly reduced SEU susceptibility. Additionally, the 3D NAND showed less MBU susceptibility than the planar NAND, with reduced number of upset bits per byte and reduced cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the latest generation planar NAND, indicating a variable upset rate for a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.

Fabrication of overlaid nanopattern arrays for plasmon memory

NASA Astrophysics Data System (ADS)

Okabe, Takao; Wadayama, Hisahiro; Taniguchi, Jun

2018-01-01

Stacking technique of nanopattern array is gathering attention to fabricate next generation data storage such as plasmon memory. This technique provides multi- overlaid nanopatterns which made by nanoimprint lithography. In the structure, several metal nanopatterned layer and resin layer as a spacer are overlaid alternately. The horizontal position of nanopatterns to under nanopatterns and thickness of resin layer as spacer should be controlled accurately, because these parameters affect reading performance and capacity of plasmon memory. In this study, we developed new alignment mark to fabricate multi- overlaid nanopatterns. The alignment accuracy with the order of 300 nm was demonstrated for Ag nanopatterns in 2 layers. The alignment mark can measure the thickness of spacer. The relationship of spacer thickness and position of scale bar on the alignment mark was measured. The usefulness of the alignment mark for highdensity plasmon memory is shown.

Complex-valued Multidirectional Associative Memory

NASA Astrophysics Data System (ADS)

Kobayashi, Masaki; Yamazaki, Haruaki

Hopfield model is a representative associative memory. It was improved to Bidirectional Associative Memory(BAM) by Kosko and Multidirectional Associative Memory(MAM) by Hagiwara. They have two layers or multilayers. Since they have symmetric connections between layers, they ensure to converge. MAM can deal with multiples of many patterns, such as (x1, x2,…), where xm is the pattern on layer-m. Noest, Hirose and Nemoto proposed complex-valued Hopfield model. Lee proposed complex-valued Bidirectional Associative Memory. Zemel proved the rotation invariance of complex-valued Hopfield model. It means that the rotated pattern also stored. In this paper, the complex-valued Multidirectional Associative Memory is proposed. The rotation invariance is also proved. Moreover it is shown by computer simulation that the differences of angles of given patterns are automatically reduced. At first we define complex-valued Multidirectional Associative Memory. Then we define the energy function of network. By using energy function, we prove that the network ensures to converge. Next, we define the learning law and show the characteristic of recall process. The characteristic means that the differences of angles of given patterns are automatically reduced. Especially we prove the following theorem. In case that only a multiple of patterns is stored, if patterns with different angles are given to each layer, the differences are automatically reduced. Finally, we invest that the differences of angles influence the noise robustness. It reduce the noise robustness, because input to each layer become small. We show that by computer simulations.

Influence of Interfacial Carbide Layer Characteristics on Thermal Properties of Copper-Diamond Composites (Postprint)

DTIC Science & Technology

2014-04-01

wettability of diamond is not an issue. Moreover, the solid-state processing can, in principle , be carried out at relatively low temperatures even for non...capacity. q was mea- sured using Archimedes ’ method, and D was measured with laser flash technique per ASTM E1461. The speci- mens for D measurement... principle , attainable by changing the interfacial Cr3C2 layer characteristics. In an earlier study [3], for a given diamond particle size and volume

Effect of oxide insertion layer on resistance switching properties of copper phthalocyanine

NASA Astrophysics Data System (ADS)

Joshi, Nikhil G.; Pandya, Nirav C.; Joshi, U. S.

2013-02-01

Organic memory device showing resistance switching properties is a next-generation of the electrical memory unit. We have investigated the bistable resistance switching in current-voltage (I-V) characteristics of organic diode based on copper phthalocyanine (CuPc) film sandwiched between aluminum (Al) electrodes. Pronounced hysteresis in the I-V curves revealed a resistance switching with on-off ratio of the order of 85%. In order to control the charge injection in the CuPc, nanoscale indium oxide buffer layer was inserted to form Al/CuPc/In2O3/Al device. Analysis of I-V measurements revealed space charge limited switching conduction at the Al/CuPc interface. The traps in the organic layer and charge blocking by oxide insertion layer have been used to explain the absence of resistance switching in the oxide buffer layered memory device cell. Present study offer potential applications for CuPc organic semiconductor in low power non volatile resistive switching memory and logic circuits.

Optimisation of readout performance of phase-change probe memory in terms of capping layer and probe tip

NASA Astrophysics Data System (ADS)

Wang, Lei; Wright, C. David; Aziz, Mustafa. M.; Yang, Ci Hui; Yang, Guo Wei

2014-11-01

The capping layer and the probe tip that serve as the protective layer and the recording tool, respectively, for phase-change probe memory play an important role on the writing performance of phase-change probe memory, thus receiving considerable attention. On the other hand, their influence on the readout performance of phasechange probe memory has rarely been reported before. A three-dimensional parametric study based on the Laplace equation was therefore conducted to investigate the effect of the capping layer and the probe tip on the resulting reading contrast for the two cases of reading a crystalline bit from an amorphous matrix and reading an amorphous bit from a crystalline matrix. The results indicated that a capping layer with a thickness of 2 nm and an electrical conductivity of 50 Ω-1m-1 is able to provide an appropriate reading contrast for both the cases, while satisfying the previous writing requirement, particularly with the assistance of a platinum silicide probe tip.

Advanced Development of Certified OS Kernels

DTIC Science & Technology

2015-06-01

It provides an infrastructure to map a physical page into multiple processes’ page maps in different address spaces. Their ownership mechanism ensures...of their shared memory infrastructure . Trap module The trap module specifies the behaviors of exception handlers and mCertiKOS system calls. In...layers), 1 pm for the shared memory infrastructure (3 layers), 3.5 pm for the thread management (10 layers), 1 pm for the process management (4 layers

Modeling a densely urbanized watershed with an artificial neural network, weather radar and telemetric data

NASA Astrophysics Data System (ADS)

Pereira Filho, Augusto José; dos Santos, Cláudia Cristina

2006-02-01

Artificial neural networks (ANN) are widely used in a myriad of fields of research and development, including the predictability of time series. This work is concerned with one of such applications to simulate and to forecast stage level and streamflow at the Tamanduateí river watershed, one of the main tributaries of the Alto Tietê river watershed in São Paulo State, Brazil. This heavily urbanized watershed is within the Metropolitan Area of São Paulo (MASP) where recurrent flash floods affect a population of more than 17 million inhabitants. Flash floods events between 1991 and 1995 were selected and divided up into three groups for training, verification and forecasting purposes. Weather radar rainfall estimation and telemetric stage level and streamflow data were input to a three-layer feed forward ANN trained with the Linear Least Square Simplex training algorithm (LLSSIM) by Hsu et al. [Hsu, K.L., Gupta, H.V., Sorooshian, S., 1996. A superior training strategy for three-layer feed forward artificial neural networks. Tucson, University of Arizona. (Technique report, HWR no. 96-030, Department of Hydrology and Water Resources)]. The performance of the ANN is improved by 40% when either streamflow or stage level were input together with the rainfall. The ANN simulated flood waves tend to be dominated by phase errors. The ANN showed slightly better results then a multi-parameter auto-regression model and indicates its usefulness in flash flood forecasting.

Regional Specific Evidence for Memory-Load Dependent Activity in the Dorsal Subiculum and the Lateral Entorhinal Cortex

PubMed Central

Ku, Shih-pi; Nakamura, Nozomu H.; Maingret, Nicolas; Mahnke, Liv; Yoshida, Motoharu; Sauvage, Magdalena M.

2017-01-01

The subiculum and the lateral entorhinal cortex (LEC) are the main output areas of the hippocampus which contribute to spatial and non-spatial memory. The proximal part of the subiculum (bordering CA1) receives heavy projections from the perirhinal cortex and the distal part of CA1 (bordering the subiculum), both known for their ties to object recognition memory. However, the extent to which the proximal subiculum contributes to non-spatial memory is still unclear. Comparatively, the involvement of the LEC in non-spatial information processing is quite well known. However, very few studies have investigated its role within the frame of memory function. Thus, it is not known whether its contribution depends on memory load. In addition, the deep layers of the EC have been shown to be predictive of subsequent memory performance, but not its superficial layers. Hence, here we tested the extent to which the proximal part of the subiculum and the superficial and deep layers of the LEC contribute to non-spatial memory, and whether this contribution depends on the memory load of the task. To do so, we imaged brain activity at cellular resolution in these areas in rats performing a delayed nonmatch to sample task based on odors with two different memory loads (5 or 10 odors). This imaging technique is based on the detection of the RNA of the immediate-early gene Arc, which is especially tied to synaptic plasticity and behavioral demands, and is commonly used to map activity in the medial temporal lobe. We report for the first time that the proximal part of the subiculum is recruited in a memory-load dependent manner and the deep layers of the LEC engaged under high memory load conditions during the retrieval of non-spatial memory, thus shedding light on the specific networks contributing to non-spatial memory retrieval. PMID:28790897

Regional Specific Evidence for Memory-Load Dependent Activity in the Dorsal Subiculum and the Lateral Entorhinal Cortex.

PubMed

Ku, Shih-Pi; Nakamura, Nozomu H; Maingret, Nicolas; Mahnke, Liv; Yoshida, Motoharu; Sauvage, Magdalena M

2017-01-01

The subiculum and the lateral entorhinal cortex (LEC) are the main output areas of the hippocampus which contribute to spatial and non-spatial memory. The proximal part of the subiculum (bordering CA1) receives heavy projections from the perirhinal cortex and the distal part of CA1 (bordering the subiculum), both known for their ties to object recognition memory. However, the extent to which the proximal subiculum contributes to non-spatial memory is still unclear. Comparatively, the involvement of the LEC in non-spatial information processing is quite well known. However, very few studies have investigated its role within the frame of memory function. Thus, it is not known whether its contribution depends on memory load. In addition, the deep layers of the EC have been shown to be predictive of subsequent memory performance, but not its superficial layers. Hence, here we tested the extent to which the proximal part of the subiculum and the superficial and deep layers of the LEC contribute to non-spatial memory, and whether this contribution depends on the memory load of the task. To do so, we imaged brain activity at cellular resolution in these areas in rats performing a delayed nonmatch to sample task based on odors with two different memory loads (5 or 10 odors). This imaging technique is based on the detection of the RNA of the immediate-early gene Arc , which is especially tied to synaptic plasticity and behavioral demands, and is commonly used to map activity in the medial temporal lobe. We report for the first time that the proximal part of the subiculum is recruited in a memory-load dependent manner and the deep layers of the LEC engaged under high memory load conditions during the retrieval of non-spatial memory, thus shedding light on the specific networks contributing to non-spatial memory retrieval.

Thermal Diffusivity Measurement for Thermal Spray Coating Attached to Substrate Using Laser Flash Method

NASA Astrophysics Data System (ADS)

Akoshima, Megumi; Tanaka, Takashi; Endo, Satoshi; Baba, Tetsuya; Harada, Yoshio; Kojima, Yoshitaka; Kawasaki, Akira; Ono, Fumio

2011-11-01

Ceramic-based thermal barrier coatings are used as heat and wear shields of gas turbine blades. There is a strong need to evaluate the thermal conductivity of coating for thermal design and use. The thermal conductivity of a bulk material is obtained as the product of thermal diffusivity, specific heat capacity, and density above room temperature in many cases. Thermal diffusivity and thermal conductivity are unique for a given material because they are sensitive to the structure of the material. Therefore, it is important to measure them in each sample. However it is difficult to measure the thermal diffusivity and thermal conductivity of coatings because coatings are attached to substrates. In order to evaluate the thermal diffusivity of a coating attached to the substrate, we have examined the laser flash method with the multilayer model on the basis of the response function method. We carried out laser flash measurements in layered samples composed of a CoNiCrAlY bond coating and a 8YSZ top coating by thermal spraying on a Ni-based superalloy substrate. It was found that the procedure using laser flash method with the multilayer model is useful for the thermal diffusivity evaluation of a coating attached to a substrate.

Comparisons of GLM and LMA Observations

NASA Astrophysics Data System (ADS)

Thomas, R. J.; Krehbiel, P. R.; Rison, W.; Stanley, M. A.; Attanasio, A.

2017-12-01

Observations from 3-dimensional VHF lightning mapping arrays (LMAs) provide a valuable basis for evaluating the spatial accuracy and detection efficiencies of observations from the recently launched, optical-based Geosynchronous Lightning Mapper (GLM). In this presentation, we describe results of comparing the LMA and GLM observations. First, the observations are compared spatially and temporally at the individual event (pixel) level for sets of individual discharges. For LMA networks in Florida, Colorado, and Oklahoma, the GLM observations are well correlated time-wise with LMA observations but are systematically offset by one- to two pixels ( 10 to 15 or 20 km) in a southwesterly direction from the actual lightning activity. The graphical comparisons show a similar location uncertainty depending on the altitude at which the scattered light is emitted from the parent cloud, due to being observed at slant ranges. Detection efficiencies (DEs) can be accurately determined graphically for intervals where individual flashes in a storm are resolved time-wise, and DEs and false alarm rates can be automated using flash sorting algorithms for overall and/or larger storms. This can be done as a function of flash size and duration, and generally shows high detection rates for larger flashes. Preliminary results during the May 1 2017 ER-2 overflight of Colorado storms indicate decreased detection efficiency if the storm is obscured by an overlying cloud layer.

Synaptic physiology of the flow of information in the cat's visual cortex in vivo

PubMed Central

Hirsch, Judith A; Martinez, Luis M; Alonso, José-Manuel; Desai, Komal; Pillai, Cinthi; Pierre, Carhine

2002-01-01

Each stage of the striate cortical circuit extracts novel information about the visual environment. We asked if this analytic process reflected laminar variations in synaptic physiology by making whole-cell recording with dye-filled electrodes from the cat's visual cortex and thalamus; the stimuli were flashed spots. Thalamic afferents terminate in layer 4, which contains two types of cell, simple and complex, distinguished by the spatial structure of the receptive field. Previously, we had found that the postsynaptic and spike responses of simple cells reliably followed the time course of flash-evoked thalamic activity. Here we report that complex cells in layer 4 (or cells intermediate between simple and complex) similarly reprised thalamic activity (response/trial, 99 ± 1.9 %; response duration 159 ± 57 ms; latency 25 ± 4 ms; average ± standard deviation; n = 7). Thus, all cells in layer 4 share a common synaptic physiology that allows secure integration of thalamic input. By contrast, at the second cortical stage (layer 2+3), where layer 4 directs its output, postsynaptic responses did not track simple patterns of antecedent activity. Typical responses to the static stimulus were intermittent and brief (response/trial, 31 ± 40 %; response duration 72 ± 60 ms, latency 39 ± 7 ms; n = 11). Only richer stimuli like those including motion evoked reliable responses. All told, the second level of cortical processing differs markedly from the first. At that later stage, ascending information seems strongly gated by connections between cortical neurons. Inputs must be combined in newly specified patterns to influence intracortical stages of processing. PMID:11927691

KSC-04PD-1812

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, United Space Alliance worker Craig Meyer fits an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04PD-1813

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, an External Tank (ET) digital still camera is positioned into the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis to determine if it fits properly. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1813

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, an External Tank (ET) digital still camera is positioned into the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis to determine if it fits properly. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1812

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, United Space Alliance worker Craig Meyer fits an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

3D Printing of Shape Memory Polymers for Flexible Electronic Devices.

PubMed

Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

2016-06-01

The formation of 3D objects composed of shape memory polymers for flexible electronics is described. Layer-by-layer photopolymerization of methacrylated semicrystalline molten macromonomers by a 3D digital light processing printer enables rapid fabrication of complex objects and imparts shape memory functionality for electrical circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Atom redistribution and multilayer structure in NiTi shape memory alloy induced by high energy proton irradiation

NASA Astrophysics Data System (ADS)

Wang, Haizhen; Yi, Xiaoyang; Zhu, Yingying; Yin, Yongkui; Gao, Yuan; Cai, Wei; Gao, Zhiyong

2017-10-01

The element distribution and surface microstructure in NiTi shape memory alloys exposed to 3 MeV proton irradiation were investigated. Redistribution of the alloying element and a clearly visible multilayer structure consisting of three layers were observed on the surface of NiTi shape memory alloys after proton irradiation. The outermost layer consists primarily of a columnar-like TiH2 phase with a tetragonal structure, and the internal layer is primarily comprised of a bcc austenite phase. In addition, the Ti2Ni phase, with an fcc structure, serves as the transition layer between the outermost and internal layer. The above-mentioned phenomenon is attributed to the preferential sputtering of high energy protons and segregation induced by irradiation.

Variable-Resistivity Material For Memory Circuits

NASA Technical Reports Server (NTRS)

Nagasubramanian, Ganesan; Distefano, Salvador; Moacanin, Jovan

1989-01-01

Nonvolatile memory elements packed densely. Electrically-erasable, programmable, read-only memory matrices made with newly-synthesized organic material of variable electrical resistivity. Material, polypyrrole doped with tetracyanoquinhydrone (TCNQ), changes reversibly between insulating or higher-resistivity state and conducting or low-resistivity state. Thin film of conductive polymer separates layer of row conductors from layer of column conductors. Resistivity of film at each intersection and, therefore, resistance of memory element defined by row and column, increased or decreased by application of suitable switching voltage. Matrix circuits made with this material useful for experiments in associative electronic memories based on models of neural networks.

Endurance cycling results in extreme environments

NASA Technical Reports Server (NTRS)

Guertin, S. M.; Nguyen, D. N.; Scheick, L. Z.

2003-01-01

A new test bed for life testing flash memories in extreme environments is introducted. the test bed is based on a state-of-the-art development board. Since space applications often desire state-of-the-art devices, such a basis seems appropriate. Comparison of this tester to other such systems, including those with data presented here in the past is made. Limitations of different testers for varying applications are discussed. Recently developed data, using this test bed is also presented.

CoNNeCT Baseband Processor Module

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.

2011-01-01

A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.

Minimizing the Disruptive Effects of Prospective Memory in Simulated Air Traffic Control

PubMed Central

Loft, Shayne; Smith, Rebekah E.; Remington, Roger

2015-01-01

Prospective memory refers to remembering to perform an intended action in the future. Failures of prospective memory can occur in air traffic control. In two experiments, we examined the utility of external aids for facilitating air traffic management in a simulated air traffic control task with prospective memory requirements. Participants accepted and handed-off aircraft and detected aircraft conflicts. The prospective memory task involved remembering to deviate from a routine operating procedure when accepting target aircraft. External aids that contained details of the prospective memory task appeared and flashed when target aircraft needed acceptance. In Experiment 1, external aids presented either adjacent or non-adjacent to each of the 20 target aircraft presented over the 40min test phase reduced prospective memory error by 11% compared to a condition without external aids. In Experiment 2, only a single target aircraft was presented a significant time (39min–42min) after presentation of the prospective memory instruction, and the external aids reduced prospective memory error by 34%. In both experiments, costs to the efficiency of non-prospective memory air traffic management (non-target aircraft acceptance response time, conflict detection response time) were reduced by non-adjacent aids compared to no aids or adjacent aids. In contrast, in both experiments, the efficiency of the prospective memory air traffic management (target aircraft acceptance response time) was facilitated by adjacent aids compared to non-adjacent aids. Together, these findings have potential implications for the design of automated alerting systems to maximize multi-task performance in work settings where operators monitor and control demanding perceptual displays. PMID:24059825

Modeling soil moisture memory in savanna ecosystems

NASA Astrophysics Data System (ADS)

Gou, S.; Miller, G. R.

2011-12-01

Antecedent soil conditions create an ecosystem's "memory" of past rainfall events. Such soil moisture memory effects may be observed over a range of timescales, from daily to yearly, and lead to feedbacks between hydrological and ecosystem processes. In this study, we modeled the soil moisture memory effect on savanna ecosystems in California, Arizona, and Africa, using a system dynamics model created to simulate the ecohydrological processes at the plot-scale. The model was carefully calibrated using soil moisture and evapotranspiration data collected at three study sites. The model was then used to simulate scenarios with various initial soil moisture conditions and antecedent precipitation regimes, in order to study the soil moisture memory effects on the evapotranspiration of understory and overstory species. Based on the model results, soil texture and antecedent precipitation regime impact the redistribution of water within soil layers, potentially causing deeper soil layers to influence the ecosystem for a longer time. Of all the study areas modeled, soil moisture memory of California savanna ecosystem site is replenished and dries out most rapidly. Thus soil moisture memory could not maintain the high rate evapotranspiration for more than a few days without incoming rainfall event. On the contrary, soil moisture memory of Arizona savanna ecosystem site lasts the longest time. The plants with different root depths respond to different memory effects; shallow-rooted species mainly respond to the soil moisture memory in the shallow soil. The growing season of grass is largely depended on the soil moisture memory of the top 25cm soil layer. Grass transpiration is sensitive to the antecedent precipitation events within daily to weekly timescale. Deep-rooted plants have different responses since these species can access to the deeper soil moisture memory with longer time duration Soil moisture memory does not have obvious impacts on the phenology of woody plants, as these can maintain transpiration for a longer time even through the top soil layer dries out.

Roll-to-roll nanopatterning using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ahn, Sean; Ganapathisubramanian, Maha; Miller, Mike; Yang, Jack; Choi, Jin; Xu, Frank; Resnick, Douglas J.; Sreenivasan, S. V.

2012-03-01

The ability to pattern materials at the nanoscale can enable a variety of applications ranging from high density data storage, displays, photonic devices and CMOS integrated circuits to emerging applications in the biomedical and energy sectors. These applications require varying levels of pattern control, short and long range order, and have varying cost tolerances. Extremely large area R2R manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. The cost of manufacturing is typically driven by speed (or throughput), tool complexity, cost of consumables (materials used, mold or master cost, etc.), substrate cost, and the downstream processing required (annealing, deposition, etching, etc.). In order to achieve low cost nanopatterning, it is imperative to move towards high speed imprinting, less complex tools, near zero waste of consumables and low cost substrates. The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. In this paper we address the key challenges for roll based nanopatterning by introducing a novel concept: Ink Jet based Roll-to-Roll Nanopatterning. To address this challenge, we have introduced a J-FIL based demonstrator product, the LithoFlex 100. Topics that are discussed in the paper include tool design and process performance. In addition, we have used the LithoFlex 100 to fabricate high performance wire grid polarizers on flexible polycarbonate (PC) films. Transmission of better than 80% and extinction ratios on the order of 4500 have been achieved.

Blue light filtered white light induces depression-like responses and temporary spatial learning deficits in rats.

PubMed

Meng, Qinghe; Lian, Yuzheng; Jiang, Jianjun; Wang, Wei; Hou, Xiaohong; Pan, Yao; Chu, Hongqian; Shang, Lanqin; Wei, Xuetao; Hao, Weidong

2018-04-18

Ambient light has a vital impact on mood and cognitive functions. Blue light has been previously reported to play a salient role in the antidepressant effect via melanopsin. Whether blue light filtered white light (BFW) affects mood and cognitive functions remains unclear. The present study aimed to investigate whether BFW led to depression-like symptoms and cognitive deficits including spatial learning and memory abilities in rats, and whether they were associated with the light-responsive function in retinal explants. Male Sprague-Dawley albino rats were randomly divided into 2 groups (n = 10) and treated with a white light-emitting diode (LED) light source and BFW light source, respectively, under a standard 12 : 12 h L/D condition over 30 days. The sucrose consumption test, forced swim test (FST) and the level of plasma corticosterone (CORT) were employed to evaluate depression-like symptoms in rats. Cognitive functions were assessed by the Morris water maze (MWM) test. A multi-electrode array (MEA) system was utilized to measure electro-retinogram (ERG) responses induced by white or BFW flashes. The effect of BFW over 30 days on depression-like responses in rats was indicated by decreased sucrose consumption in the sucrose consumption test, an increased immobility time in the FST and an elevated level of plasma CORT. BFW led to temporary spatial learning deficits in rats, which was evidenced by prolonged escape latency and swimming distances in the spatial navigation test. However, no changes were observed in the short memory ability of rats treated with BFW. The micro-ERG results showed a delayed implicit time and reduced amplitudes evoked by BFW flashes compared to the white flash group. BFW induces depression-like symptoms and temporary spatial learning deficits in rats, which might be closely related to the impairment of light-evoked output signals in the retina.

Tree-based solvers for adaptive mesh refinement code FLASH - I: gravity and optical depths

NASA Astrophysics Data System (ADS)

Wünsch, R.; Walch, S.; Dinnbier, F.; Whitworth, A.

2018-04-01

We describe an OctTree algorithm for the MPI parallel, adaptive mesh refinement code FLASH, which can be used to calculate the gas self-gravity, and also the angle-averaged local optical depth, for treating ambient diffuse radiation. The algorithm communicates to the different processors only those parts of the tree that are needed to perform the tree-walk locally. The advantage of this approach is a relatively low memory requirement, important in particular for the optical depth calculation, which needs to process information from many different directions. This feature also enables a general tree-based radiation transport algorithm that will be described in a subsequent paper, and delivers excellent scaling up to at least 1500 cores. Boundary conditions for gravity can be either isolated or periodic, and they can be specified in each direction independently, using a newly developed generalization of the Ewald method. The gravity calculation can be accelerated with the adaptive block update technique by partially re-using the solution from the previous time-step. Comparison with the FLASH internal multigrid gravity solver shows that tree-based methods provide a competitive alternative, particularly for problems with isolated or mixed boundary conditions. We evaluate several multipole acceptance criteria (MACs) and identify a relatively simple approximate partial error MAC which provides high accuracy at low computational cost. The optical depth estimates are found to agree very well with those of the RADMC-3D radiation transport code, with the tree-solver being much faster. Our algorithm is available in the standard release of the FLASH code in version 4.0 and later.

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures

NASA Astrophysics Data System (ADS)

Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H.; Seo, Sunae; Chung, U.-In; Yoo, In-Kyeong; Kim, Kinam

2011-08-01

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaOx-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 1012. Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Anomalous annealing of floating gate errors due to heavy ion irradiation

NASA Astrophysics Data System (ADS)

Yin, Yanan; Liu, Jie; Sun, Youmei; Hou, Mingdong; Liu, Tianqi; Ye, Bing; Ji, Qinggang; Luo, Jie; Zhao, Peixiong

2018-03-01

Using the heavy ions provided by the Heavy Ion Research Facility in Lanzhou (HIRFL), the annealing of heavy-ion induced floating gate (FG) errors in 34 nm and 25 nm NAND Flash memories has been studied. The single event upset (SEU) cross section of FG and the evolution of the errors after irradiation depending on the ion linear energy transfer (LET) values, data pattern and feature size of the device are presented. Different rates of annealing for different ion LET and different pattern are observed in 34 nm and 25 nm memories. The variation of the percentage of different error patterns in 34 nm and 25 nm memories with annealing time shows that the annealing of FG errors induced by heavy-ion in memories will mainly take place in the cells directly hit under low LET ion exposure and other cells affected by heavy ions when the ion LET is higher. The influence of Multiple Cell Upsets (MCUs) on the annealing of FG errors is analyzed. MCUs with high error multiplicity which account for the majority of the errors can induce a large percentage of annealed errors.

Avalanche atomic switching in strain engineered Sb2Te3-GeTe interfacial phase-change memory cells

NASA Astrophysics Data System (ADS)

Zhou, Xilin; Behera, Jitendra K.; Lv, Shilong; Wu, Liangcai; Song, Zhitang; Simpson, Robert E.

2017-09-01

By confining phase transitions to the nanoscale interface between two different crystals, interfacial phase change memory heterostructures represent the state of the art for energy efficient data storage. We present the effect of strain engineering on the electrical switching performance of the {{Sb}}2{{Te}}3-GeTe superlattice van der Waals devices. Multiple Ge atoms switching through a two-dimensional Te layer reduces the activation barrier for further atoms to switch; an effect that can be enhanced by biaxial strain. The out-of-plane phonon mode of the GeTe crystal remains active in the superlattice heterostructures. The large in-plane biaxial strain imposed by the {{Sb}}2{{Te}}3 layers on the GeTe layers substantially improves the switching speed, reset energy, and cyclability of the superlattice memory devices. Moreover, carefully controlling residual stress in the layers of {{Sb}}2{{Te}}3-GeTe interfacial phase change memories provides a new degree of freedom to design the properties of functional superlattice structures for memory and photonics applications.

Top-Down Regulation of Laminar Circuit via Inter-Area Signal for Successful Object Memory Recall in Monkey Temporal Cortex.

PubMed

Takeda, Masaki; Koyano, Kenji W; Hirabayashi, Toshiyuki; Adachi, Yusuke; Miyashita, Yasushi

2015-05-06

Memory retrieval in primates is orchestrated by a brain-wide neuronal circuit. To elucidate the operation of this circuit, it is imperative to comprehend neuronal mechanisms of coordination between area-to-area interaction and information processing within individual areas. By simultaneous recording from area 36 (A36) and area TE (TE) of the temporal cortex while monkeys performed a pair-association memory task, we found two distinct inter-area signal flows during memory retrieval: A36 spiking activity exhibited coherence with low-frequency field activity in either the supragranular or infragranular layer of TE. Of these two flows, only signal flow targeting the infragranular layer of TE was further translaminarly coupled with gamma activity in the supragranular layer of TE. Moreover, this coupling was observed when monkeys succeeded in the retrieval of the sought object but not when they failed. The results suggest that local translaminar processing can be recruited via a layer-specific inter-area network for memory retrieval. Copyright © 2015 Elsevier Inc. All rights reserved.

Quick-low-density parity check and dynamic threshold voltage optimization in 1X nm triple-level cell NAND flash memory with comprehensive analysis of endurance, retention-time, and temperature variation

NASA Astrophysics Data System (ADS)

Doi, Masafumi; Tokutomi, Tsukasa; Hachiya, Shogo; Kobayashi, Atsuro; Tanakamaru, Shuhei; Ning, Sheyang; Ogura Iwasaki, Tomoko; Takeuchi, Ken

2016-08-01

NAND flash memory’s reliability degrades with increasing endurance, retention-time and/or temperature. After a comprehensive evaluation of 1X nm triple-level cell (TLC) NAND flash, two highly reliable techniques are proposed. The first proposal, quick low-density parity check (Quick-LDPC), requires only one cell read in order to accurately estimate a bit-error rate (BER) that includes the effects of temperature, write and erase (W/E) cycles and retention-time. As a result, 83% read latency reduction is achieved compared to conventional AEP-LDPC. Also, W/E cycling is extended by 100% compared with conventional Bose-Chaudhuri-Hocquenghem (BCH) error-correcting code (ECC). The second proposal, dynamic threshold voltage optimization (DVO) has two parts, adaptive V Ref shift (AVS) and V TH space control (VSC). AVS reduces read error and latency by adaptively optimizing the reference voltage (V Ref) based on temperature, W/E cycles and retention-time. AVS stores the optimal V Ref’s in a table in order to enable one cell read. VSC further improves AVS by optimizing the voltage margins between V TH states. DVO reduces BER by 80%.

Laminar recordings in frontal cortex suggest distinct layers for maintenance and control of working memory

PubMed Central

Bastos, André M.; Loonis, Roman; Kornblith, Simon; Lundqvist, Mikael; Miller, Earl K.

2018-01-01

All of the cerebral cortex has some degree of laminar organization. These different layers are composed of neurons with distinct connectivity patterns, embryonic origins, and molecular profiles. There are little data on the laminar specificity of cognitive functions in the frontal cortex, however. We recorded neuronal spiking/local field potentials (LFPs) using laminar probes in the frontal cortex (PMd, 8A, 8B, SMA/ACC, DLPFC, and VLPFC) of monkeys performing working memory (WM) tasks. LFP power in the gamma band (50–250 Hz) was strongest in superficial layers, and LFP power in the alpha/beta band (4–22 Hz) was strongest in deep layers. Memory delay activity, including spiking and stimulus-specific gamma bursting, was predominately in superficial layers. LFPs from superficial and deep layers were synchronized in the alpha/beta bands. This was primarily unidirectional, with alpha/beta bands in deep layers driving superficial layer activity. The phase of deep layer alpha/beta modulated superficial gamma bursting associated with WM encoding. Thus, alpha/beta rhythms in deep layers may regulate the superficial layer gamma bands and hence maintenance of the contents of WM. PMID:29339471

Laminar recordings in frontal cortex suggest distinct layers for maintenance and control of working memory.

PubMed

Bastos, André M; Loonis, Roman; Kornblith, Simon; Lundqvist, Mikael; Miller, Earl K

2018-01-30

All of the cerebral cortex has some degree of laminar organization. These different layers are composed of neurons with distinct connectivity patterns, embryonic origins, and molecular profiles. There are little data on the laminar specificity of cognitive functions in the frontal cortex, however. We recorded neuronal spiking/local field potentials (LFPs) using laminar probes in the frontal cortex (PMd, 8A, 8B, SMA/ACC, DLPFC, and VLPFC) of monkeys performing working memory (WM) tasks. LFP power in the gamma band (50-250 Hz) was strongest in superficial layers, and LFP power in the alpha/beta band (4-22 Hz) was strongest in deep layers. Memory delay activity, including spiking and stimulus-specific gamma bursting, was predominately in superficial layers. LFPs from superficial and deep layers were synchronized in the alpha/beta bands. This was primarily unidirectional, with alpha/beta bands in deep layers driving superficial layer activity. The phase of deep layer alpha/beta modulated superficial gamma bursting associated with WM encoding. Thus, alpha/beta rhythms in deep layers may regulate the superficial layer gamma bands and hence maintenance of the contents of WM. Copyright © 2018 the Author(s). Published by PNAS.

Analog Nonvolatile Computer Memory Circuits

NASA Technical Reports Server (NTRS)

MacLeod, Todd

2007-01-01

In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

FLASH_SSF_Aqua-FM3-MODIS_Version3C

Atmospheric Science Data Center

2018-04-04

... Tool:  CERES Order Tool  (netCDF) Subset Data:  CERES Search and Subset Tool (HDF4 & netCDF) ... Cloud Layer Area Cloud Infared Emissivity Cloud Base Pressure Surface (Radiative) Flux TOA Flux Surface Types TOT ... Radiance SW Filtered Radiance LW Flux Order Data:  Earthdata Search:  Order Data Guide Documents:  ...

FLASH_SSF_Terra-FM1-MODIS_Version3C

Atmospheric Science Data Center

2018-04-04

... Tool:  CERES Order Tool  (netCDF) Subset Data:  CERES Search and Subset Tool (HDF4 & netCDF) ... Cloud Layer Area Cloud Infrared Emissivity Cloud Base Pressure Surface (Radiative) Flux TOA Flux Surface Types TOT ... Radiance SW Filtered Radiance LW Flux Order Data:  Earthdata Search:  Order Data Guide Documents:  ...

Characteristics of Reduced Graphene Oxide Quantum Dots for a Flexible Memory Thin Film Transistor.

PubMed

Kim, Yo-Han; Lee, Eun Yeol; Lee, Hyun Ho; Seo, Tae Seok

2017-05-17

Reduced graphene oxide quantum dot (rGOQD) devices in formats of capacitor and thin film transistor (TFT) were demonstrated and examined as the first trial to achieve nonambipolar channel property. In addition, through a gold nanoparticle (Au NP) layer embedded between the rGOQD active channel and dielectric layer, memory capacitor and TFT performances were realized by capacitance-voltage (C-V) hysteresis and gate program, erase, and reprogram biases. First, capacitor structure of the rGOQD memory device was constructed to examine memory charging effect featured in hysteretic C-V behavior with a 30 nm dielectric layer of cross-linked poly(vinyl alcohol). For the intervening Au NP charging layer, self-assembled monolayer (SAM) formation of the Au NP was executed to utilize electrostatic interaction by a dip-coating process under ambient environments with a conformal fabrication uniformity. Second, the rGOQD memory TFT device was also constructed in the same format of the Au NPs SAMs on a flexible substrate. Characteristics of the rGOQD TFT output showed novel saturation curves unlike typical graphene-based TFTs. However, The rGOQD TFT device reveals relatively low on/off ratio of 10 1 and mobility of 5.005 cm 2 /V·s. For the memory capacitor, the flat-band voltage shift (ΔV FB ) was measured as 3.74 V for ±10 V sweep, and for the memory TFT, the threshold voltage shift (ΔV th ) by the Au NP charging was detected as 7.84 V. In summary, it was concluded that the rGOQD memory device could accomplish an ideal graphene-based memory performance, which could have provided a wide memory window and saturated output characteristics.

High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xiang, Lanyi; Ying, Jun; Han, Jinhua

2016-04-25

In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (V{sub on}) and severe degradation of the memory window (ΔV{sub on}) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electronsmore » transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of V{sub on} at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔV{sub on} of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.« less

Suppressing the cellular breakdown in silicon supersaturated with titanium

NASA Astrophysics Data System (ADS)

Liu, Fang; Prucnal, S.; Hübner, R.; Yuan, Ye; Skorupa, W.; Helm, M.; Zhou, Shengqiang

2016-06-01

Hyper doping Si with up to 6 at.% Ti in solid solution was performed by ion implantation followed by pulsed laser annealing and flash lamp annealing. In both cases, the implanted Si layer can be well recrystallized by liquid phase epitaxy and solid phase epitaxy, respectively. Cross-sectional transmission electron microscopy of Ti-implanted Si after liquid phase epitaxy shows the so-called growth interface breakdown or cellular breakdown owing to the occurrence of constitutional supercooling in the melt. The appearance of cellular breakdown prevents further recrystallization. However, the out-diffusion and cellular breakdown can be effectively suppressed by solid phase epitaxy during flash lamp annealing due to the high velocity of amorphous-crystalline interface and the low diffusion velocity for Ti in the solid phase.

Nanoscale Multigate TiN Metal Nanocrystal Memory Using High-k Blocking Dielectric and High-Work-Function Gate Electrode Integrated on Silcon-on-Insulator Substrate

NASA Astrophysics Data System (ADS)

Lu, Chi-Pei; Luo, Cheng-Kei; Tsui, Bing-Yue; Lin, Cha-Hsin; Tzeng, Pei-Jer; Wang, Ching-Chiun; Tsai, Ming-Jinn

2009-04-01

In this study, a charge-trapping-layer-engineered nanoscale n-channel trigate TiN nanocrystal nonvolatile memory was successfully fabricated on silicon-on-insulator (SOI) wafer. An Al2O3 high-k blocking dielectric layer and a P+ polycrystalline silicon gate electrode were used to obtain low operation voltage and suppress the back-side injection effect, respectively. TiN nanocrystals were formed by annealing TiN/Al2O3 nanolaminates deposited by an atomic layer deposition system. The memory characteristics of various samples with different TiN wetting layer thicknesses, post-deposition annealing times, and blocking oxide thicknesses were also investigated. The sample with a thicker wetting layer exhibited a much larger memory window than other samples owing to its larger nanocrystal size. Good retention with a mere 12% charge loss for up to 10 years and high endurance were also obtained. Furthermore, gate disturbance and read disturbance were measured with very small charge migrations after a 103 s stressing bias.

Towards Terabit Memories

NASA Astrophysics Data System (ADS)

Hoefflinger, Bernd

Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet little data on their energy/b. As a read-out memory with unparalleled retention and lifetime, the ROM with electron-beam direct-write-lithography (Chap. 8) should be considered for its projected 2D density of 250 Gb/cm², a very small read energy of 0.1 μW/Gb/s. The lithography write-speed 10 ms/Terabit makes this ROM a serious contentender for the optimum in non-volatile, tamper-proof storage.

Use of Shape Memory Alloys in the Robust Control of Smart Structures

DTIC Science & Technology

1993-08-01

OHP (anions) @ Cation II I I JU Anion O0HP(cations) 0 Ano Cation electrf statically h eld in double layer 0 ’ Double Diff sion Bulk Layer L., Layer I...Effect in Thermoelastic In-Tl Martensite, Mem . Fac. Eng. Kyoto Univ., 43(2): 287-303 (1981) 43. A. Nagasawa, Memory Effect in In-Tl Alloy, J. Phys. Soc

Effect of tunneling layers on the performances of floating-gate based organic thin-film transistor nonvolatile memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Wei, E-mail: wwei99@jlu.edu.cn; Han, Jinhua; Ying, Jun

2014-09-22

Two types of floating-gate based organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) were demonstrated, with poly(methyl methacrylate co glycidyl methacrylate) (P(MMA-GMA)) and tetratetracontane (TTC) as the tunneling layer, respectively. Their device performances were measured and compared. In the memory with a P(MMA-GMA) tunneling layer, typical unipolar hole transport was obtained with a relatively small mobility of 0.16 cm{sup 2}/V s. The unidirectional shift of turn-on voltage (V{sub on}) due to only holes trapped/detrapped in/from the floating gate resulted in a small memory window of 12.5 V at programming/erasing voltages (V{sub P}/V{sub E}) of ±100 V and a nonzero reading voltage. Benefited from the well-ordered moleculemore » orientation and the trap-free surface of TTC layer, a considerably high hole mobility of 1.7 cm{sup 2}/V s and a visible feature of electrons accumulated in channel and trapped in floating-gate were achieved in the memory with a TTC tunneling layer. High hole mobility resulted in a high on current and a large memory on/off ratio of 600 at the V{sub P}/V{sub E} of ±100 V. Both holes and electrons were injected into floating-gate and overwritten each other, which resulted in a bidirectional V{sub on} shift. As a result, an enlarged memory window of 28.6 V at the V{sub P}/V{sub E} of ±100 V and a zero reading voltage were achieved. Based on our results, a strategy is proposed to optimize FG-OTFT-NVMs by choosing a right tunneling layer to improve the majority carrier mobility and realize ambipolar carriers injecting and trapping in the floating-gate.« less

Selective neuronal degeneration in the retrosplenial cortex impairs the recall of contextual fear memory.

PubMed

Sigwald, Eric L; Genoud, Manuel E; Giachero, Marcelo; de Olmos, Soledad; Molina, Víctor A; Lorenzo, Alfredo

2016-05-01

The retrosplenial cortex (RSC) is one of the largest cortical areas in rodents, and is subdivided in two main regions, A29 and A30, according to their cytoarchitectural organization and connectivities. However, very little is known about the functional activity of each RSC subdivision during the execution of complex cognitive tasks. Here, we used a well-established fear learning protocol that induced long-lasting contextual fear memory and showed that during evocation of the fear memory, the expression of early growth response gene 1 was up-regulated in A30, and in other brain areas implicated in fear and spatial memory, however, was down-regulated in A29, including layers IV and V. To search for the participation of A29 on fear memory, we triggered selective degeneration of neurons within cortical layers IV and V of A29 by using a non-invasive protocol that takes advantage of the vulnerability that these neurons have MK801-toxicity and the modulation of this neurodegeneration by testosterone. Application of 5 mg/kg MK801 in intact males induced negligible neuronal degeneration of A29 neurons and had no impact on fear memory retrieval. However, in orchiectomized rats, 5 mg/kg MK801 induced overt degeneration of layers IV-V neurons of A29, significantly impairing fear memory recall. Degeneration of A29 neurons did not affect exploratory or anxiety-related behavior nor altered unconditioned freezing. Importantly, protecting A29 neurons from MK801-toxicity by testosterone preserved fear memory recall in orchiectomized rats. Thus, neurons within cortical layers IV-V of A29 are critically required for efficient retrieval of contextual fear memory.

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

PubMed Central

Zhao, Chun; Zhao, Ce Zhou; Lu, Qifeng; Yan, Xiaoyi; Taylor, Stephen; Chalker, Paul R.

2014-01-01

Oxide materials with large dielectric constants (so-called high-k dielectrics) have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). A novel characterization (pulse capacitance-voltage) method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS) capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future. PMID:28788225

KSC-04PD-1810

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser prepare to conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04PD-1811

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1811

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1810

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser prepare to conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

Vibration damping and heat transfer using material phase changes

NASA Technical Reports Server (NTRS)

Kloucek, Petr (Inventor); Reynolds, Daniel R. (Inventor)

2009-01-01

A method and apparatus wherein phase changes in a material can dampen vibrational energy, dampen noise and facilitate heat transfer. One embodiment includes a method for damping vibrational energy in a body. The method comprises attaching a material to the body, wherein the material comprises a substrate, a shape memory alloy layer, and a plurality of temperature change elements. The method further comprises sensing vibrations in the body. In addition, the method comprises indicating to at least a portion of the temperature change elements to provide a temperature change in the shape memory alloy layer, wherein the temperature change is sufficient to provide a phase change in at least a portion of the shape memory alloy layer, and further wherein the phase change consumes a sufficient amount of kinetic energy to dampen at least a portion of the vibrational energy in the body. In other embodiments, the shape memory alloy layer is a thin film. Additional embodiments include a sensor connected to the material.

Vibration damping and heat transfer using material phase changes

DOEpatents

Kloucek, Petr [Houston, TX; Reynolds, Daniel R [Oakland, CA

2009-03-24

A method and apparatus wherein phase changes in a material can dampen vibrational energy, dampen noise and facilitate heat transfer. One embodiment includes a method for damping vibrational energy in a body. The method comprises attaching a material to the body, wherein the material comprises a substrate, a shape memory alloy layer, and a plurality of temperature change elements. The method further comprises sensing vibrations in the body. In addition, the method comprises indicating to at least a portion of the temperature change elements to provide a temperature change in the shape memory alloy layer, wherein the temperature change is sufficient to provide a phase change in at least a portion of the shape memory alloy layer, and further wherein the phase change consumes a sufficient amount of kinetic energy to dampen at least a portion of the vibrational energy in the body. In other embodiments, the shape memory alloy layer is a thin film. Additional embodiments include a sensor connected to the material.

Block-Parallel Data Analysis with DIY2

DOE Office of Scientific and Technical Information (OSTI.GOV)

Morozov, Dmitriy; Peterka, Tom

DIY2 is a programming model and runtime for block-parallel analytics on distributed-memory machines. Its main abstraction is block-structured data parallelism: data are decomposed into blocks; blocks are assigned to processing elements (processes or threads); computation is described as iterations over these blocks, and communication between blocks is defined by reusable patterns. By expressing computation in this general form, the DIY2 runtime is free to optimize the movement of blocks between slow and fast memories (disk and flash vs. DRAM) and to concurrently execute blocks residing in memory with multiple threads. This enables the same program to execute in-core, out-of-core, serial,more » parallel, single-threaded, multithreaded, or combinations thereof. This paper describes the implementation of the main features of the DIY2 programming model and optimizations to improve performance. DIY2 is evaluated on benchmark test cases to establish baseline performance for several common patterns and on larger complete analysis codes running on large-scale HPC machines.« less

The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer.

PubMed

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V A L

2013-03-07

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al(2)O(3)) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al(2)O(3) dielectric layer) could be potentially integrated with large area flexible electronics.

Role of Al2O3 thin layer on improving the resistive switching properties of Ta5Si3-based conductive bridge random accesses memory device

NASA Astrophysics Data System (ADS)

Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

2018-04-01

Ta5Si3-based conductive bridge random access memory (CBRAM) devices have been investigated to improve their resistive switching characteristics for their application in future nonvolatile memory technology. Changes in the switching characteristics by the addition of a thin Al2O3 layer of different thicknesses at the bottom electrode interface of a Ta5Si3-based CBRAM devices have been studied. The double-layer device with a 1 nm Al2O3 layer has shown improved resistive switching characteristics over the single layer one with a high on/off resistance ratio of 102, high endurance of more than 104 cycles, and good retention for more than 105 s at the temperature of 130 °C. The higher thermal conductivity of Al2O3 over Ta5Si3 has been attributed to the enhanced switching properties of the double-layer devices.

Operation mode switchable charge-trap memory based on few-layer MoS2

NASA Astrophysics Data System (ADS)

Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-03-01

Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.

Low operation voltage and high thermal stability of a WSi2 nanocrystal memory device using an Al2O3/HfO2/Al2O3 tunnel layer

NASA Astrophysics Data System (ADS)

Uk Lee, Dong; Jun Lee, Hyo; Kyu Kim, Eun; You, Hee-Wook; Cho, Won-Ju

2012-02-01

A WSi2 nanocrystal nonvolatile memory device was fabricated with an Al2O3/HfO2/Al2O3 (AHA) tunnel layer and its electrical characteristics were evaluated at 25, 50, 70, 100, and 125 °C. The program/erase (P/E) speed at 125 °C was approximately 500 μs under threshold voltage shifts of 1 V during voltage sweeping of 8 V/-8 V. When the applied pulse voltage was ±9 V for 1 s for the P/E conditions, the memory window at 125 °C was approximately 1.25 V after 105 s. The activation energies for the charge losses of 5%, 10%, 15%, 20%, 25%, 30%, and 35% were approximately 0.05, 0.11, 0.17, 0.21, 0.23, 0.23, and 0.23 eV, respectively. The charge loss mechanisms were direct tunneling and Pool-Frenkel emission between the WSi2 nanocrystals and the AHA barrier engineered tunneling layer. The WSi2 nanocrystal memory device with multi-stacked high-K tunnel layers showed strong potential for applications in nonvolatile memory devices.

Design of a Multi-Level/Analog Ferroelectric Memory Device

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2006-01-01

Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

Novel Organic Phototransistor-Based Nonvolatile Memory Integrated with UV-Sensing/Green-Emissive Aggregation Enhanced Emission (AEE)-Active Aromatic Polyamide Electret Layer.

PubMed

Cheng, Shun-Wen; Han, Ting; Huang, Teng-Yung; Chang Chien, Yu-Hsin; Liu, Cheng-Liang; Tang, Ben Zhong; Liou, Guey-Sheng

2018-05-30

A novel aggregation enhanced emission (AEE)-active polyamide TPA-CN-TPE with a high photoluminesence characteristic was successfully synthesized by the direct polymerization of 4-cyanotriphenyl diamine (TPA-CN) and tetraphenylethene (TPE)-containing dicarboxylic acid. The obtained luminescent polyamide plays a significant role as the polymer electret layer in organic field-effect transistors (OFETs)-type memory. The strong green emission of TPA-CN-TPE under ultraviolet (UV) irradiation can be directly absorbed by the pentacene channel, displaying a light-induced programming and voltage-driven erasing organic phototransistor-based nonvolatile memory. Memory window can be effectively manipulated between the programming and erasing states by applying UV light illumination and electrical field, respectively. The photoinduced memory behavior can be maintained for over 10 4 s between these two states with an on/off ratio of 10 4 , and the memory switching can be steadily operated for many cycles. With high photoresponsivity ( R) and photosensitivity ( S), this organic phototransistor integrated with AEE-active polyamide electret layer could serve as an excellent candidate for UV photodetectors in optical applications. For comparison, an AEE-inactive aromatic polyimide TPA-PIS electret with much weaker solid-state emission was also applied in the same OFETs device architecture, but this device did not show any UV-sensitive and UV-induced memory characteristics, which further confirmed the significance of the light-emitting capability of the electret layer.

Selection by current compliance of negative and positive bipolar resistive switching behaviour in ZrO2-x /ZrO2 bilayer memory

NASA Astrophysics Data System (ADS)

Huang, Ruomeng; Yan, Xingzhao; Morgan, Katrina A.; Charlton, Martin D. B.; (Kees de Groot, C. H.

2017-05-01

We report here a ZrO2-x /ZrO2-based bilayer resistive switching memory with unique properties that enables the selection of the switching mode by applying different electroforming current compliances. Two opposite polarity modes, positive bipolar and negative bipolar, correspond to the switching in the ZrO2 and ZrO2-x layer, respectively. The ZrO2 layer is proved to be responsible for the negative bipolar mode which is also observed in a ZrO2 single layer device. The oxygen deficient ZrO2-x layer plays the dominant role in the positive bipolar mode, which is exclusive to the bilayer memory. A systematic investigation of the ZrO2-x composition in the bilayer memory suggests that ZrO1.8 layer demonstrates optimum switching performance with low switching voltage, narrow switching voltage distribution and good cycling endurance. An excess of oxygen vacancies, beyond this composition, leads to a deterioration of switching properties. The formation and dissolution of the oxygen vacancy filament model has been proposed to explain both polarity switching behaviours and the improved properties in the bilayer positive bipolar mode are attributed to the confined oxygen vacancy filament size within the ZrO2-x layer.

Influence of corona discharge on the ozone budget in the tropical free troposphere: a case study of deep convection during GABRIEL

NASA Astrophysics Data System (ADS)

Bozem, H.; Fischer, H.; Gurk, C.; Schiller, C. L.; Parchatka, U.; Koenigstedt, R.; Stickler, A.; Martinez, M.; Harder, H.; Kubistin, D.; Williams, J.; Eerdekens, G.; Lelieveld, J.

2014-09-01

Convective redistribution of ozone and its precursors between the boundary layer (BL) and the free troposphere (FT) influences photochemistry, in particular in the middle and upper troposphere (UT). We present a case study of convective transport during the GABRIEL campaign over the tropical rain forest in Suriname in October 2005. During one measurement flight the inflow and outflow regions of a cumulonimbus cloud (Cb) have been characterized. We identified a distinct layer between 9 and 11 km altitude with enhanced mixing ratios of CO, O3, HOx, acetone and acetonitrile. The elevated O3 contradicts the expectation that convective transport brings low-ozone air from the boundary layer to the outflow region. Entrainment of ozone-rich air is estimated to account for 62% (range: 33-91%) of the observed O3. Ozone is enhanced by only 5-6% by photochemical production in the outflow due to enhanced NO from lightning, based on model calculations using observations including the first reported HOx measurements over the tropical rainforest. The "excess" ozone in the outflow is most probably due to direct production by corona discharge associated with lightning. We deduce a production rate of 5.12 × 1028 molecules O3 flash-1 (range: 9.89 × 1026-9.82 × 1028 molecules O3 flash-1), which is at the upper limit of the range reported previously.

High efficiency copper indium gallium diselenide (CIGS) thin film solar cells

NASA Astrophysics Data System (ADS)

Rajanikant, Ray Jayminkumar

The generation of electrical current from the solar radiation is known as the photovoltaic effect. Solar cell, also known as photovoltaic (PV) cell, is a device that works on the principle of photovoltaic effect, and is widely used for the generation of electricity. Thin film polycrystalline solar cells based on copper indium gallium diselenide (CIGS) are admirable candidates for clean energy production with competitive prices in the near future. CIGS based polycrystalline thin film solar cells with efficiencies of 20.3 % and excellent temperature stability have already been reported at the laboratory level. The present study discusses about the fabrication of CIGS solar cell. Before the fabrication part of CIGS solar cell, a numerical simulation is carried out using One-Dimensional Analysis of Microelectronic and Photonic Structures (AMPS-ID) for understanding the physics of a solar cell device, so that an optimal structure is analyzed. In the fabrication part of CIGS solar cell, Molybdenum (Mo) thin film, which acts as a 'low' resistance metallic back contact, is deposited by RF magnetron sputtering on organically cleaned soda lime glass substrate. The major advantages for using Mo are high temperature, (greater than 600 °C), stability and inertness to CIGS layer (i.e., no diffusion of CIGS into Mo). Mo thin film is deposited at room temperature (RT) by varying the RF power and the working pressure. The Mo thin films deposited with 100 W RF power and 1 mTorr working pressure show a reflectivity of above average 50 % and the low sheet resistance of about 1 O/□. The p-type CIGS layer is deposited on Mo. Before making thin films of CIGS, a powder of CIGS material is synthesized using melt-quenching method. Thin films of CIGS are prepared by a single-stage flash evaporation process on glass substrates, initially, for optimization of deposition parameters and than on Mo coated glass substrates for device fabrication. CIGS thin film is deposited at 250 °C at a pressure of 10-5 mbar. The thickness of the film was kept 1 mum for the solar cell device preparation. Rapid Thermal Annealing (RTA) is carried out of CIGS thin film at 500 °C for 2 minutes in the argon atmosphere. Annealing process mainly improves the grain growth of the CIGS and, hence the surface roughness, which is essential for a multilayered semiconductor structure. Thin layer of n-type highly resistive cadmium sulphide (CdS), generally known as a "buffer" layer, is deposited on CIGS layer by thermal and flash evaporation method at the substrate temperature of 100 °C. The CdS thin film plays a crucial role in the formation of the p-n junction and thus the solar cell device performance. The effect of CdS film substrate temperature ranging from 50 °C to 200 °C is observed. At the 100 °C substrate temperature, CdS thin film shows the near to 85 % of transmission in the visible region and resistivity of the order of greater then 20 x 109 Ocm, which are the essential characteristics of buffer layer. The bi-layer structure of ZnO, containing 70 nm i-ZnO and 500 nm aluminum (Al) doped ZnO, act as a transparent front-contact for CIGS thin film solar cell. These layers were deposited using RF magnetron sputtering. i-ZnO thin film acts as an insulating layer, which prevents the recombination of the photo-generated carries and also minimizes the lattice miss match defects between CdS and Al-ZnO. The resistivity of iZnO and Al-ZnO is of the order of 1012 Ocm and 10-4 Ocm, respectively. Al-ZnO thin films act as transparent conducting top electrode having transparency of about 85 % in the visible region. On Al-ZnO layer the finger-type grid pattern of silver (Ag), 200 nm thick, is deposited for the collection of photo-generated carriers. The thin film based multilayered structure Mo / CIGS / CdS / i-ZnO / Al-ZnO / Ag grid of CIGS solar cell is grown one by one on a single glass substrate. As-prepared CIGS solar cell device shows a minute photovoltaic effect. For the further improvement of the cell we have varied the thickness of the buffer layer i.e. CdS. In addition, the deposition of CdS is carried out using flash evaporation method to improve the CIGS/CdS junction. Heat soak pulses of about 200 °C are also applied for 20 sec for the further upgrading the junction. To protect the CIGS/CdS junction from the high-energy sputtered particles of ZnO, a fine mesh of stainless steel is placed just before the sample holder to enhance the performance of the solar cell. The influence of the thickness of iZnO and CdS has been checked. The maximum V oe and Jsc of about 138 mV and 1.3 mA/cm2 , respectively, are achieved using flash evaporated CIGS layer and flash evaporated CdS thin film. Further improvement of current performance can be done either by adopting some other fabrication method to obtain a denser CIGS absorber layer or replacing the CdS layer with some other efficient buffer layer.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fernandes, Ana; Pereira, Rita C.; Sousa, Jorge

The Instituto de Plasmas e Fusao Nuclear (IPFN) has developed dedicated re-configurable modules based on field programmable gate array (FPGA) devices for several nuclear fusion machines worldwide. Moreover, new Advanced Telecommunication Computing Architecture (ATCA) based modules developed by IPFN are already included in the ITER catalogue. One of the requirements for re-configurable modules operating in future nuclear environments including ITER is the remote update capability. Accordingly, this work presents an alternative method for FPGA remote programing to be implemented in new ATCA based re-configurable modules. FPGAs are volatile devices and their programming code is usually stored in dedicated flash memoriesmore » for properly configuration during module power-on. The presented method is capable to store new FPGA codes in Serial Peripheral Interface (SPI) flash memories using the PCIexpress (PCIe) network established on the ATCA back-plane, linking data acquisition endpoints and the data switch blades. The method is based on the Xilinx Quick Boot application note, adapted to PCIe protocol and ATCA based modules. (authors)« less

Leakage characterization of top select transistor for program disturbance optimization in 3D NAND flash

NASA Astrophysics Data System (ADS)

Zhang, Yu; Jin, Lei; Jiang, Dandan; Zou, Xingqi; Zhao, Zhiguo; Gao, Jing; Zeng, Ming; Zhou, Wenbin; Tang, Zhaoyun; Huo, Zongliang

2018-03-01

In order to optimize program disturbance characteristics effectively, a characterization approach that measures top select transistor (TSG) leakage from bit-line is proposed to quantify TSG leakage under program inhibit condition in 3D NAND flash memory. Based on this approach, the effect of Vth modulation of two-cell TSG on leakage is evaluated. By checking the dependence of leakage and corresponding program disturbance on upper and lower TSG Vth, this approach is validated. The optimal Vth pattern with high upper TSG Vth and low lower TSG Vth has been suggested for low leakage current and high boosted channel potential. It is found that upper TSG plays dominant role in preventing drain induced barrier lowering (DIBL) leakage from boosted channel to bit-line, while lower TSG assists to further suppress TSG leakage by providing smooth potential drop from dummy WL to edge of TSG, consequently suppressing trap assisted band-to-band tunneling current (BTBT) between dummy WL and TSG.

Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; Label, Kenneth

2017-01-01

We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode. The 3D NAND showed significantly reduced SEU susceptibility in single-level-cell (SLC) storage mode. Additionally, the 3D NAND showed less multiple-bit upset susceptibility than the planar NAND, with fewer number of upset bits per byte and smaller cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the Micron 16 nm planar NAND, which suggests that typical heavy ion test fluences will underestimate the upset rate during a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.

High density associative memory

NASA Technical Reports Server (NTRS)

Moopenn, Alexander W. (Inventor); Thakoor, Anilkumar P. (Inventor); Daud, Taher (Inventor); Lambe, John J. (Inventor)

1989-01-01

A multi-layered, thin-film, digital memory having associative recall. There is a first memory matrix and a second memory matrix. Each memory matrix comprises, a first layer comprising a plurality of electrically separated row conductors; a second layer comprising a plurality of electrically separated column conductors intersecting but electrically separated from the row conductors; and, a plurality of resistance elements electrically connected between the row condutors and the column conductors at respective intersections of the row conductors and the column conductors, each resistance element comprising, in series, a first resistor of sufficiently high ohmage to conduct a sensible element current therethrough with virtually no heat-generating power consumption when a low voltage as employed in thin-film applications is applied thereacross and a second resistor of sufficiently high ohmage to conduct no sensible current therethrough when a low voltage as employed in thin-film applications is applied thereacross, the second resistor having the quality of breaking down to create a short therethrough upon the application of a breakdown level voltage across the first and second resistors.

Entorhinal Cortical Ocean Cells Encode Specific Contexts and Drive Context-Specific Fear Memory

PubMed Central

Kitamura, Takashi; Sun, Chen; Martin, Jared; Kitch, Lacey J; Schnitzer, Mark J; Tonegawa, Susumu

2016-01-01

Summary Forming distinct representations and memories of multiple contexts and episodes is thought to be a crucial function of the hippocampal-entorhinal cortical network. The hippocampal dentate gyrus (DG) and CA3 are known to contribute to these functions but the role of the entorhinal cortex (EC) is poorly understood. Here, we show that Ocean cells, excitatory stellate neurons in the medial EC layer II projecting into DG and CA3, rapidly form a distinct representation of a novel context and drive context-specific activation of downstream CA3 cells as well as context-specific fear memory. In contrast, Island cells, excitatory pyramidal neurons in the medial EC layer II projecting into CA1, are indifferent to context-specific encoding or memory. On the other hand, Ocean cells are dispensable for temporal association learning, for which Island cells are crucial. Together, the two excitatory medial EC layer II inputs to the hippocampus have complementary roles in episodic memory. PMID:26402611

Multiple memory stores and operant conditioning: a rationale for memory's complexity.

PubMed

Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu

2009-02-01

Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory stores, but such access was penalized as energy expenditure. Model animals were then selected on their fitness in simulated operant conditioning tasks. Results suggest that having access to multiple memory stores and their representations is important in learning to regulate dopamine release, as well as in contextual discrimination. For simple operant conditioning, as well as stimulus discrimination, hippocampal compound representations turned out to suffice, a counterintuitive result given findings that hippocampal lesions tend not to affect performance in such tasks. We argue that there is in fact evidence to support a role for compound representations and the hippocampus in even the simplest conditioning tasks.

Carrier transport mechanisms of nonvolatile write-once-read-many-times memory devices with InP-ZnS core-shell nanoparticles embedded in a polymethyl methacrylate layer

NASA Astrophysics Data System (ADS)

Ham, Jung Hoon; Oh, Do Hyun; Cho, Sung Hwan; Jung, Jae Hun; Kim, Tae Whan; Ryu, Eui Dock; Kim, Sang Wook

2009-03-01

Current-voltage (I-V) curves at 300 K for Al/InP-ZnS nanoparticles embedded in a polymethyl methacrylate layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. From the I-V curves, the ON/OFF ratio for the device with InP-ZnS nanoparticles was significantly larger than that for the device without InP-ZnS nanoparticles, indicative of the existence of charge capture in the InP nanoparticles. The estimated retention time of the ON state for the WORM memory device was more than 10 years. The carrier transport mechanisms for the WORM memory devices are described by using several models to fit the experimental I-V data.

Improved memory characteristics by NH3-nitrided GdO as charge storage layer for nonvolatile memory applications

NASA Astrophysics Data System (ADS)

Liu, L.; Xu, J. P.; Ji, F.; Chen, J. X.; Lai, P. T.

2012-07-01

Charge-trapping memory capacitor with nitrided gadolinium oxide (GdO) as charge storage layer (CSL) is fabricated, and the influence of post-deposition annealing in NH3 on its memory characteristics is investigated. Transmission electron microscopy, x-ray photoelectron spectroscopy, and x-ray diffraction are used to analyze the cross-section and interface quality, composition, and crystallinity of the stack gate dielectric, respectively. It is found that nitrogen incorporation can improve the memory window and achieve a good trade-off among the memory properties due to NH3-annealing-induced reasonable distribution profile of a large quantity of deep-level bulk traps created in the nitrided GdO film and reduction of shallow traps near the CSL/SiO2 interface.

Laminar Differences in Associative Memory Signals in Monkey Perirhinal Cortex.

PubMed

Vogels, Rufin

2016-10-19

New research published in Neuron describes assignment of cortical layer to single neurons recorded in awake monkeys. Applying the procedure to perirhinal cortex, Koyano et al. (2016) found marked and unsuspected differences among layers in the coding of associative memory signals. Copyright © 2016. Published by Elsevier Inc.

Interfacial Redox Reactions Associated Ionic Transport in Oxide-Based Memories.

PubMed

Younis, Adnan; Chu, Dewei; Shah, Abdul Hadi; Du, Haiwei; Li, Sean

2017-01-18

As an alternative to transistor-based flash memories, redox reactions mediated resistive switches are considered as the most promising next-generation nonvolatile memories that combine the advantages of a simple metal/solid electrolyte (insulator)/metal structure, high scalability, low power consumption, and fast processing. For cation-based memories, the unavailability of in-built mobile cations in many solid electrolytes/insulators (e.g., Ta 2 O 5 , SiO 2 , etc.) instigates the essential role of absorbed water in films to keep electroneutrality for redox reactions at counter electrodes. Herein, we demonstrate electrochemical characteristics (oxidation/reduction reactions) of active electrodes (Ag and Cu) at the electrode/electrolyte interface and their subsequent ions transportation in Fe 3 O 4 film by means of cyclic voltammetry measurements. By posing positive potentials on Ag/Cu active electrodes, Ag preferentially oxidized to Ag + , while Cu prefers to oxidize into Cu 2+ first, followed by Cu/Cu + oxidation. By sweeping the reverse potential, the oxidized ions can be subsequently reduced at the counter electrode. The results presented here provide a detailed understanding of the resistive switching phenomenon in Fe 3 O 4 -based memory cells. The results were further discussed on the basis of electrochemically assisted cations diffusions in the presence of absorbed surface water molecules in the film.

Total Lightning Characteristics with Respect to Radar-Derived Mesocyclone Strength

NASA Technical Reports Server (NTRS)

Stough, Sarah M.; Carey, Lawrence D.; Schultz, Christopher J.

2015-01-01

Recent work investigating the microphysical and kinematic relationship between a storm's updraft, its total lightning production, and manifestations of severe weather has resulted in development of tools for improved nowcasting of storm intensity. The total lightning jump algorithm, which identifies rapid increases in total lightning flash rate that often precede severe events, has shown particular potential to benefit warning operations. Maximizing this capability of total lightning and its operational implementation via the lightning jump may best be done through its fusion with radar and radar-derived intensity metrics. Identification of a mesocyclone, or quasi-steady rotating updraft, in Doppler velocity is the predominant radar-inferred early indicator of severe potential in a convective storm. Fused lightning-radar tools that capitalize on the most robust intensity indicators would allow enhanced situational awareness for increased warning confidence. A foundational step toward such tools comes from a better understanding of the updraft-centric relationship between intensification of total lightning production and mesocyclone development and strength. The work presented here utilizes a sample of supercell case studies representing a spectrum of severity. These storms are analyzed with respect to total lightning flash rate and the lightning jump alongside mesocyclone strength derived objectively from the National Severe Storms Laboratory (NSSL) Mesocyclone Detection Algorithm (MDA) and maximum azimuthal shear through a layer. Early results indicate that temporal similarities exist in the trends between total lightning flash rate and low- to mid-level rotation in supercells. Other characteristics such as polarimetric signatures of rotation, flash size, and cloud-to-ground flash ratio are explored for added insight into the significance of these trends with respect to the updraft and related processes of severe weather production.

CoNNeCT Baseband Processor Module Boot Code SoftWare (BCSW)

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K.; Orozco, David S.; Byrne, D. J.; Allen, Steven J.; Sahasrabudhe, Adit; Lang, Minh

2012-01-01

This software provides essential startup and initialization routines for the CoNNeCT baseband processor module (BPM) hardware upon power-up. A command and data handling (C&DH) interface is provided via 1553 and diagnostic serial interfaces to invoke operational, reconfiguration, and test commands within the code. The BCSW has features unique to the hardware it is responsible for managing. In this case, the CoNNeCT BPM is configured with an updated CPU (Atmel AT697 SPARC processor) and a unique set of memory and I/O peripherals that require customized software to operate. These features include configuration of new AT697 registers, interfacing to a new HouseKeeper with a flash controller interface, a new dual Xilinx configuration/scrub interface, and an updated 1553 remote terminal (RT) core. The BCSW is intended to provide a "safe" mode for the BPM when initially powered on or when an unexpected trap occurs, causing the processor to reset. The BCSW allows the 1553 bus controller in the spacecraft or payload controller to operate the BPM over 1553 to upload code; upload Xilinx bit files; perform rudimentary tests; read, write, and copy the non-volatile flash memory; and configure the Xilinx interface. Commands also exist over 1553 to cause the CPU to jump or call a specified address to begin execution of user-supplied code. This may be in the form of a real-time operating system, test routine, or specific application code to run on the BPM.

Review of radiation effects on ReRAM devices and technology

NASA Astrophysics Data System (ADS)

Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

2017-08-01

A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs).

PubMed

Moradi, Saber; Qiao, Ning; Stefanini, Fabio; Indiveri, Giacomo

2018-02-01

Neuromorphic computing systems comprise networks of neurons that use asynchronous events for both computation and communication. This type of representation offers several advantages in terms of bandwidth and power consumption in neuromorphic electronic systems. However, managing the traffic of asynchronous events in large scale systems is a daunting task, both in terms of circuit complexity and memory requirements. Here, we present a novel routing methodology that employs both hierarchical and mesh routing strategies and combines heterogeneous memory structures for minimizing both memory requirements and latency, while maximizing programming flexibility to support a wide range of event-based neural network architectures, through parameter configuration. We validated the proposed scheme in a prototype multicore neuromorphic processor chip that employs hybrid analog/digital circuits for emulating synapse and neuron dynamics together with asynchronous digital circuits for managing the address-event traffic. We present a theoretical analysis of the proposed connectivity scheme, describe the methods and circuits used to implement such scheme, and characterize the prototype chip. Finally, we demonstrate the use of the neuromorphic processor with a convolutional neural network for the real-time classification of visual symbols being flashed to a dynamic vision sensor (DVS) at high speed.

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

NASA Technical Reports Server (NTRS)

MacLeod, Todd; Ho, Fat D.

2012-01-01

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

NASA Astrophysics Data System (ADS)

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-07-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

Liquid phase epitaxy of binary III–V nanocrystals in thin Si layers triggered by ion implantation and flash lamp annealing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wutzler, Rene, E-mail: r.wutzler@hzdr.de; Rebohle, Lars; Prucnal, Slawomir

2015-05-07

The integration of III–V compound semiconductors in Si is a crucial step towards faster and smaller devices in future technologies. In this work, we investigate the formation process of III–V compound semiconductor nanocrystals, namely, GaAs, GaSb, and InP, by ion implantation and sub-second flash lamp annealing in a SiO{sub 2}/Si/SiO{sub 2} layer stack on Si grown by plasma-enhanced chemical vapor deposition. Raman spectroscopy, Rutherford Backscattering spectrometry, and transmission electron microscopy were performed to identify the structural and optical properties of these structures. Raman spectra of the nanocomposites show typical phonon modes of the compound semiconductors. The formation process of themore » III–V compounds is found to be based on liquid phase epitaxy, and the model is extended to the case of an amorphous matrix without an epitaxial template from a Si substrate. It is shown that the particular segregation and diffusion coefficients of the implanted group-III and group-V ions in molten Si significantly determine the final appearance of the nanostructure and thus their suitability for potential applications.« less

Transition from Target to Gaze Coding in Primate Frontal Eye Field during Memory Delay and Memory-Motor Transformation.

PubMed

Sajad, Amirsaman; Sadeh, Morteza; Yan, Xiaogang; Wang, Hongying; Crawford, John Douglas

2016-01-01

The frontal eye fields (FEFs) participate in both working memory and sensorimotor transformations for saccades, but their role in integrating these functions through time remains unclear. Here, we tracked FEF spatial codes through time using a novel analytic method applied to the classic memory-delay saccade task. Three-dimensional recordings of head-unrestrained gaze shifts were made in two monkeys trained to make gaze shifts toward briefly flashed targets after a variable delay (450-1500 ms). A preliminary analysis of visual and motor response fields in 74 FEF neurons eliminated most potential models for spatial coding at the neuron population level, as in our previous study (Sajad et al., 2015). We then focused on the spatiotemporal transition from an eye-centered target code (T; preferred in the visual response) to an eye-centered intended gaze position code (G; preferred in the movement response) during the memory delay interval. We treated neural population codes as a continuous spatiotemporal variable by dividing the space spanning T and G into intermediate T-G models and dividing the task into discrete steps through time. We found that FEF delay activity, especially in visuomovement cells, progressively transitions from T through intermediate T-G codes that approach, but do not reach, G. This was followed by a final discrete transition from these intermediate T-G delay codes to a "pure" G code in movement cells without delay activity. These results demonstrate that FEF activity undergoes a series of sensory-memory-motor transformations, including a dynamically evolving spatial memory signal and an imperfect memory-to-motor transformation.

Effects of Mg pre-flow, memory, and diffusion on the growth of p-GaN with MOCVD (Conference Presentation)

NASA Astrophysics Data System (ADS)

Tu, Charng-Gan; Chen, Hao-Tsung; Chen, Sheng-Hung; Chao, Chen-Yao; Kiang, Yean-Woei; Yang, Chih-Chung

2017-02-01

In MOCVD growth, two key factors for growing a p-type structure, when the modulation growth or delta-doping technique is used, include Mg memory and diffusion. With high-temperature growth (>900 degree C), doped Mg can diffuse into the under-layer. Also, due to the high-pressure growth and growth chamber coating in MOCVD, plenty Mg atoms exist in the growth chamber for a duration after Mg supply is ended. In this situation, Mg doping continues in the following designated un-doped layers. In this paper, we demonstrate the study results of Mg preflow, memory, and diffusion. The results show that pre-flow of Mg into the growth chamber can lead to a significantly higher Mg doping concentration in growing a p-GaN layer. In other words, a duration for Mg buildup is required for high Mg incorporation. Based on SIMS study, we find that with the pre-flow growth, a high- and a low-doping p-GaN layer are formed. The doping concentration difference between the two layers is about 10 times. The thickness of the high- (low-) doping layer is about 40 (65) nm. The growth of the high-doping layer starts 10-15 min after Mg supply starts (Mg buildup time). The diffusion length of Mg into the AlGaN layer beneath (Mg content reduced to <5%) is about 10 nm. The memory time of Mg in the growth chamber is about 60 min, after which the Mg doping concentration is reduced to <1%.

Formation of silicon nanocrystals in silicon carbide using flash lamp annealing

NASA Astrophysics Data System (ADS)

Weiss, Charlotte; Schnabel, Manuel; Prucnal, Slawomir; Hofmann, Johannes; Reichert, Andreas; Fehrenbach, Tobias; Skorupa, Wolfgang; Janz, Stefan

2016-09-01

During the formation of Si nanocrystals (Si NC) in SixC1-x layers via solid-phase crystallization, the unintended formation of nanocrystalline SiC reduces the minority carrier lifetime and therefore the performance of SixC1-x as an absorber layer in solar cells. A significant reduction in the annealing time may suppress the crystallization of the SiC matrix while maintaining the formation of Si NC. In this study, we investigated the crystallization of stoichiometric SiC and Si-rich SiC using conventional rapid thermal annealing (RTA) and nonequilibrium millisecond range flash lamp annealing (FLA). The investigated SixC1-x films were prepared by plasma-enhanced chemical vapor deposition and annealed at temperatures from 700 °C to 1100 °C for RTA and at flash energies between 34 J/cm2 and 62 J/cm2 for FLA. Grazing incidence X-ray diffraction and Fourier transformed infrared spectroscopy were conducted to investigate hydrogen effusion, Si and SiC NC growth, and SiC crystallinity. Both the Si content and the choice of the annealing process affect the crystallization behavior. It is shown that under certain conditions, FLA can be successfully utilized for the formation of Si NC in a SiC matrix, which closely resembles Si NC in a SiC matrix achieved by RTA. The samples must have excess Si, and the flash energy should not exceed 40 J/cm2 and 47 J/cm2 for Si0.63C0.37 and Si0.77C0.23 samples, respectively. Under these conditions, FLA succeeds in producing Si NC of a given size in less crystalline SiC than RTA does. This result is discussed in terms of nucleation and crystal growth using classical crystallization theory. For FLA and RTA samples, an opposite relationship between NC size and Si content was observed and attributed either to the dependence of H effusion on Si content or to the optical absorption properties of the materials, which also depend on the Si content.

Soft lithography using perfluorinated polyether molds and PRINT technology for fabrication of 3-D arrays on glass substrates

NASA Astrophysics Data System (ADS)

Wiles, Kenton B.; Wiles, Natasha S.; Herlihy, Kevin P.; Maynor, Benjamin W.; Rolland, Jason P.; DeSimone, Joseph M.

2006-03-01

The fabrication of nanometer size structures and complex devices for microelectronics is of increasing importance so as to meet the challenges of large-scale commercial applications. Soft lithography typically employs elastomeric polydimethylsiloxane (PDMS) molds to replicate micro- and nanoscale features. However, the difficulties of PDMS for nanoscale fabrication include inherent incompatibility with organic liquids and the production of a residual scum or flash layer that link features where the nano-structures meet the substrate. An emerging technologically advanced technique known as Pattern Replication in Non-wetting Templates (PRINT) avoids both of these dilemmas by utilizing photocurable perfluorinated polyether (PFPE) rather than PDMS as the elastomeric molding material. PFPE is a liquid at room temperature that exhibits low modulus and high gas permeability when cured. The highly fluorinated PFPE material allows for resistance to swelling by organic liquids and very low surface energies, thereby preventing flash layer formation and ease of separation of PFPE molds from the substrates. These enhanced characteristics enable easy removal of the stamp from the molded material, thereby minimizing damage to the nanoscale features. Herein we describe that PRINT can be operated in two different modes depending on whether the objects to be molded are to be removed and harvested (i.e. to make shape specific organic particles) or whether scum free objects are desired which are adhered onto the substrate (i.e. for scum free pattern generation using imprint lithography). The former can be achieved using a non-reactive, low surface energy substrate (PRINT: Particle Replication in Non-wetting Templates) and the latter can be achieved using a reactive, low surface energy substrate (PRINT: Pattern Replication in Non-wetting Templates). We show that the PRINT technology can been used to fabricate nano-particle arrays covalently bound to a glass substrate with no scum layer. The nanometer size arrays were fabricated using a PFPE mold and a self-assembled monolayer (SAM) fluorinated glass substrate that was also functionalized with free-radically reactive SAM methacrylate moieties. The molded polymeric materials were covalently bound to the glass substrate through thermal curing with the methacrylate groups to permit three dimensional array fabrication. The low surface energies of the PFPE mold and fluorinated glass substrate allowed for no flash layer formation, permitting well resolved structures.

Comparing soil moisture memory in satellite observations and models

NASA Astrophysics Data System (ADS)

Stacke, Tobias; Hagemann, Stefan; Loew, Alexander

2013-04-01

A major obstacle to a correct parametrization of soil processes in large scale global land surface models is the lack of long term soil moisture observations for large parts of the globe. Currently, a compilation of soil moisture data derived from a range of satellites is released by the ESA Climate Change Initiative (ECV_SM). Comprising the period from 1978 until 2010, it provides the opportunity to compute climatological relevant statistics on a quasi-global scale and to compare these to the output of climate models. Our study is focused on the investigation of soil moisture memory in satellite observations and models. As a proxy for memory we compute the autocorrelation length (ACL) of the available satellite data and the uppermost soil layer of the models. Additional to the ECV_SM data, AMSR-E soil moisture is used as observational estimate. Simulated soil moisture fields are taken from ERA-Interim reanalysis and generated with the land surface model JSBACH, which was driven with quasi-observational meteorological forcing data. The satellite data show ACLs between one week and one month for the greater part of the land surface while the models simulate a longer memory of up to two months. Some pattern are similar in models and observations, e.g. a longer memory in the Sahel Zone and the Arabian Peninsula, but the models are not able to reproduce regions with a very short ACL of just a few days. If the long term seasonality is subtracted from the data the memory is strongly shortened, indicating the importance of seasonal variations for the memory in most regions. Furthermore, we analyze the change of soil moisture memory in the different soil layers of the models to investigate to which extent the surface soil moisture includes information about the whole soil column. A first analysis reveals that the ACL is increasing for deeper layers. However, its increase is stronger in the soil moisture anomaly than in its absolute values and the first even exceeds the latter in the deepest layer. From this we conclude that the seasonal soil moisture variations dominate the memory close to the surface but these are dampened in lower layers where the memory is mainly affected by longer term variations.

Thermophysical properties of plasma sprayed coatings

NASA Technical Reports Server (NTRS)

Wilkes, K. E.; Lagedrost, J. F.

1973-01-01

Thermophysical properties of plasma sprayed materials were determined for the following plasma sprayed materials: CaO - stabilized ZrO2, Y2O3 - stabilized ZerO2, Al2O3, HfO2 Mo, nichrome, NiAl, Mo-ZrO2, and MoAl2O3 mixtures. In all cases the thermal conductivity of the as-sprayed materials was found to be considerably lower than that of the bulk material. The flash-laser thermal diffusivity technique was used both for diffusivity determination of single-layer materials and to determine the thermal contact resistance at the interface of two-layer specimens.

Enhanced HMAX model with feedforward feature learning for multiclass categorization.

PubMed

Li, Yinlin; Wu, Wei; Zhang, Bo; Li, Fengfu

2015-01-01

In recent years, the interdisciplinary research between neuroscience and computer vision has promoted the development in both fields. Many biologically inspired visual models are proposed, and among them, the Hierarchical Max-pooling model (HMAX) is a feedforward model mimicking the structures and functions of V1 to posterior inferotemporal (PIT) layer of the primate visual cortex, which could generate a series of position- and scale- invariant features. However, it could be improved with attention modulation and memory processing, which are two important properties of the primate visual cortex. Thus, in this paper, based on recent biological research on the primate visual cortex, we still mimic the first 100-150 ms of visual cognition to enhance the HMAX model, which mainly focuses on the unsupervised feedforward feature learning process. The main modifications are as follows: (1) To mimic the attention modulation mechanism of V1 layer, a bottom-up saliency map is computed in the S1 layer of the HMAX model, which can support the initial feature extraction for memory processing; (2) To mimic the learning, clustering and short-term memory to long-term memory conversion abilities of V2 and IT, an unsupervised iterative clustering method is used to learn clusters with multiscale middle level patches, which are taken as long-term memory; (3) Inspired by the multiple feature encoding mode of the primate visual cortex, information including color, orientation, and spatial position are encoded in different layers of the HMAX model progressively. By adding a softmax layer at the top of the model, multiclass categorization experiments can be conducted, and the results on Caltech101 show that the enhanced model with a smaller memory size exhibits higher accuracy than the original HMAX model, and could also achieve better accuracy than other unsupervised feature learning methods in multiclass categorization task.

Laminar activity in the hippocampus and entorhinal cortex related to novelty and episodic encoding

PubMed Central

Maass, Anne; Schütze, Hartmut; Speck, Oliver; Yonelinas, Andrew; Tempelmann, Claus; Heinze, Hans-Jochen; Berron, David; Cardenas-Blanco, Arturo; Brodersen, Kay H.; Enno Stephan, Klaas; Düzel, Emrah

2014-01-01

The ability to form long-term memories for novel events depends on information processing within the hippocampus (HC) and entorhinal cortex (EC). The HC–EC circuitry shows a quantitative segregation of anatomical directionality into different neuronal layers. Whereas superficial EC layers mainly project to dentate gyrus (DG), CA3 and apical CA1 layers, HC output is primarily sent from pyramidal CA1 layers and subiculum to deep EC layers. Here we utilize this directionality information by measuring encoding activity within HC/EC subregions with 7 T high resolution functional magnetic resonance imaging (fMRI). Multivariate Bayes decoding within HC/EC subregions shows that processing of novel information most strongly engages the input structures (superficial EC and DG/CA2–3), whereas subsequent memory is more dependent on activation of output regions (deep EC and pyramidal CA1). This suggests that while novelty processing is strongly related to HC–EC input pathways, the memory fate of a novel stimulus depends more on HC–EC output. PMID:25424131

HYDRODYNAMIC SIMULATIONS OF H ENTRAINMENT AT THE TOP OF He-SHELL FLASH CONVECTION

DOE Office of Scientific and Technical Information (OSTI.GOV)

Woodward, Paul R.; Lin, Pei-Hung; Herwig, Falk, E-mail: paul@lcse.umn.edu, E-mail: fherwig@uvic.ca

2015-01-01

We present the first three-dimensional, fully compressible gas-dynamics simulations in 4π geometry of He-shell flash convection with proton-rich fuel entrainment at the upper boundary. This work is motivated by the insufficiently understood observed consequences of the H-ingestion flash in post-asymptotic giant branch (post-AGB) stars (Sakurai's object) and metal-poor AGB stars. Our investigation is focused on the entrainment process at the top convection boundary and on the subsequent advection of H-rich material into deeper layers, and we therefore ignore the burning of the proton-rich fuel in this study. We find that for our deep convection zone, coherent convective motions of nearmore » global scale appear to dominate the flow. At the top boundary convective shear flows are stable against Kelvin-Helmholtz instabilities. However, such shear instabilities are induced by the boundary-layer separation in large-scale, opposing flows. This links the global nature of thick shell convection with the entrainment process. We establish the quantitative dependence of the entrainment rate on grid resolution. With our numerical technique, simulations with 1024{sup 3} cells or more are required to reach a numerical fidelity appropriate for this problem. However, only the result from the 1536{sup 3} simulation provides a clear indication that we approach convergence with regard to the entrainment rate. Our results demonstrate that our method, which is described in detail, can provide quantitative results related to entrainment and convective boundary mixing in deep stellar interior environments with very stiff convective boundaries. For the representative case we study in detail, we find an entrainment rate of 4.38 ± 1.48 × 10{sup –13} M {sub ☉} s{sup –1}.« less

The Pupil Light Reflex in Leber's Hereditary Optic Neuropathy: Evidence for Preservation of Melanopsin-Expressing Retinal Ganglion Cells

PubMed Central

Moura, Ana Laura A.; Nagy, Balázs V.; La Morgia, Chiara; Barboni, Piero; Oliveira, André Gustavo Fernandes; Salomão, Solange R.; Berezovsky, Adriana; de Moraes-Filho, Milton Nunes; Chicani, Carlos Filipe; Belfort, Rubens; Carelli, Valerio; Sadun, Alfredo A.; Hood, Donald C.; Ventura, Dora Fix

2013-01-01

Purpose. To investigate the pupillary light reflex (PLR) of patients with severe loss of vision due to Leber's Hereditary Optic Neuropathy (LHON) in the context of a proposed preservation of melanopsin-expressing retinal ganglion cells (mRGCs). Methods. Ten LHON patients (7 males; 51.6 ± 14.1 years), with visual acuities ranging from 20/400 to hand motion perception and severe visual field losses, were tested and compared with 16 healthy subjects (7 males; 42.15 ± 15.4 years) tested as controls. PLR was measured with an eye tracker and the stimuli were controlled with a Ganzfeld system. Pupil responses were measured monocularly, to 1 second of blue (470 nm) and red (640 nm) flashes with 1, 10, 100, and 250 cd/m2 luminances. The normalized amplitude of peak of the transient PLR and the amplitude of the sustained PLR at 6 seconds after the flash offset were measured. In addition, optical coherence topography (OCT) scans of the peripapillary retinal nerve fiber layer were obtained. Results. The patient's peak PLR responses were on average 15% smaller than controls (P < 0.05), but 5 out of 10 patients had amplitudes within the range of controls. The patients' sustained PLRs were comparable with controls at lower flash intensities, but on average, 27% smaller to the 250 cd/m2 blue light, although there was considerable overlap with the PLR amplitudes of control. All patients had severe visual field losses and the retinal nerve fiber layer thickness was reduced to a minimum around the optic disc in 8 of the 10 patients. Conclusions. The PLR is maintained overall in LHON patients despite the severity of optic atrophy. These results are consistent with previous evidence of selective preservation of mRGCs. PMID:23737476

Asymptotic theory of circular polarization memory.

PubMed

Dark, Julia P; Kim, Arnold D

2017-09-01

We establish a quantitative theory of circular polarization memory, which is the unexpected persistence of the incident circular polarization state in a strongly scattering medium. Using an asymptotic analysis of the three-dimensional vector radiative transfer equation (VRTE) in the limit of strong scattering, we find that circular polarization memory must occur in a boundary layer near the portion of the boundary on which polarized light is incident. The boundary layer solution satisfies a one-dimensional conservative scattering VRTE. Through a spectral analysis of this boundary layer problem, we introduce the dominant mode, which is the slowest-decaying mode in the boundary layer. To observe circular polarization memory for a particular set of optical parameters, we find that this dominant mode must pass three tests: (1) this dominant mode is given by the largest, discrete eigenvalue of a reduced problem that corresponds to Fourier mode k=0 in the azimuthal angle, and depends only on Stokes parameters U and V; (2) the polarization state of this dominant mode is largely circular polarized so that |V|≫|U|; and (3) the circular polarization of this dominant mode is maintained for all directions so that V is sign-definite. By applying these three tests to numerical calculations for monodisperse distributions of Mie scatterers, we determine the values of the size and relative refractive index when circular polarization memory occurs. In addition, we identify a reduced, scalar-like problem that provides an accurate approximation for the dominant mode when circular polarization memory occurs.

Monte Carlo Radiative Transfer Modeling of Lightning Observed in Galileo Images of Jupiter

NASA Technical Reports Server (NTRS)

Dyudine, U. A.; Ingersoll, Andrew P.

2002-01-01

We study lightning on Jupiter and the clouds illuminated by the lightning using images taken by the Galileo orbiter. The Galileo images have a resolution of 25 km/pixel and axe able to resolve the shape of the single lightning spots in the images, which have full widths at half the maximum intensity in the range of 90-160 km. We compare the measured lightning flash images with simulated images produced by our ED Monte Carlo light-scattering model. The model calculates Monte Carlo scattering of photons in a ED opacity distribution. During each scattering event, light is partially absorbed. The new direction of the photon after scattering is chosen according to a Henyey-Greenstein phase function. An image from each direction is produced by accumulating photons emerging from the cloud in a small range (bins) of emission angles. Lightning bolts are modeled either as points or vertical lines. Our results suggest that some of the observed scattering patterns axe produced in a 3-D cloud rather than in a plane-parallel cloud layer. Lightning is estimated to occur at least as deep as the bottom of the expected water cloud. For the six cases studied, we find that the clouds above the lightning are optically thick (tau > 5). Jovian flashes are more regular and circular than the largest terrestrial flashes observed from space. On Jupiter there is nothing equivalent to the 30-40-km horizontal flashes which axe seen on Earth.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.; Archer, Leo B.; Brown, George A.; Wallace, Robert M.

2000-01-01

An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.

Evaluating automatic attentional capture by self-relevant information.

PubMed

Ocampo, Brenda; Kahan, Todd A

2016-01-01

Our everyday decisions and memories are inadvertently influenced by self-relevant information. For example, we are faster and more accurate at making perceptual judgments about stimuli associated with ourselves, such as our own face or name, as compared with familiar non-self-relevant stimuli. Humphreys and Sui propose a "self-attention network" to account for these effects, wherein self-relevant stimuli automatically capture our attention and subsequently enhance the perceptual processing of self-relevant information. We propose that the masked priming paradigm and continuous flash suppression represent two ways to experimentally examine these controversial claims.

Micron MT29F128G08AJAAA 128GB Asynchronous Flash Memory Total Ionizing Dose Characterization Test Report

NASA Technical Reports Server (NTRS)

Campola, Michael; Wyrwas, Edward

2017-01-01

The purpose of this test was to characterize the Micron MT29F128G08AJAAAs parameter degradation for total dose response and to evaluate and compare lot date codes for sensitivity. In the test, the device was exposed to both low dose and high dose rate (HDR) irradiations using gamma radiation. Device parameters such as leakage currents, quantity of upset bits and overall chip and die health were investigated to determine which lot is more robust.

Calcium phosphate coating of nickel-titanium shape-memory alloys. Coating procedure and adherence of leukocytes and platelets.

PubMed

Choi, Jongsik; Bogdanski, Denise; Köller, Manfred; Esenwein, Stefan A; Müller, Dietmar; Muhr, Gert; Epple, Matthias

2003-09-01

Nickel-titanium shape-memory alloys (NiTi-SMA) were coated with calcium phosphate by dipping in oversaturated calcium phosphate solution. The layer thickness (typically 5-20 micrometer) can be varied by choice of the immersion time. The porous nature of the layer of microcrystals makes it mechanically stable enough to withstand both the shape-memory transition upon cooling and heating and also strong bending of the material (superelastic effect). This layer may improve the biocompatibility of NiTi-SMA, particulary for osteosynthetic devices by creating a more physiological surface and by restricting a potential nickel release. The adherence of human leukocytes (peripheral blood mononuclear cells and polymorphonuclear neutrophil granulocytes) and platelets to the calcium phosphate layer was analyzed in vitro. In comparison to non-coated NiTi-SMA, leukocytes and platelets showed a significantly increased adhesion to the coated NiTi-SMA.

Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures.

PubMed

Abhijith, T; Kumar, T V Arun; Reddy, V S

2017-03-03

Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO 3 ) between two tris-(8-hydroxyquinoline)aluminum (Alq 3 ) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 10 3 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO 3 layer thickness and its location in the Alq 3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO 3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures

NASA Astrophysics Data System (ADS)

Abhijith, T.; Kumar, T. V. Arun; Reddy, V. S.

2017-03-01

Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO3) between two tris-(8-hydroxyquinoline)aluminum (Alq3) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 103 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO3 layer thickness and its location in the Alq3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

Manufacturing and application of a fully polymeric electrophoresis chip with integrated polyaniline electrodes.

PubMed

Henderson, Rowan D; Guijt, Rosanne M; Haddad, Paul R; Hilder, Emily F; Lewis, Trevor W; Breadmore, Michael C

2010-07-21

This work describes the development of a fully polymeric microchip with integrated polymeric electrodes suitable for performing microchip electrophoresis. The polymer electrodes were fabricated in a thin film of the conducting polymer, polyaniline (PANI), by flash lithography using a studio camera flash and a transparency mask. During flash welding, exposed regions welded into non-conducting regions forming a conducting polymer circuit in the non-exposed regions. Using a structured layer of dry film photoresist for sealing, a polydimethylsiloxane (PDMS) substrate containing channels and reservoirs was bound to the PANI film to form an integrated microfluidic device. The conducting regions of the PANI film were shown to be capable of carrying the high voltages of up to 2000 V required for chip electrophoresis, and were stable for up to 30 minutes under these conditions. The PANI electrodes were used for the electrophoretic separation of three sugars labelled with 8-amino-1,3,6-pyrenetrisulfonic acid (APTS) in the dry film resist-PDMS hybrid device. Highly efficient separations comparable to those achieved in similar microchips using platinum electrodes confirm the potential of polyaniline as a new material suitable for high voltage electrodes in Lab-on-a-chip devices.

Formation and photoluminescence of GaAs{sub 1−x}N{sub x} dilute nitride achieved by N-implantation and flash lamp annealing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, Kun, E-mail: k.gao@hzdr.de; Helm, M.; Technische Universität Dresden, 01062 Dresden

2014-07-07

In this paper, we present the fabrication of dilute nitride semiconductor GaAs{sub 1−x}N{sub x} by nitrogen-ion-implantation and flash lamp annealing (FLA). N was implanted into the GaAs wafers with atomic concentration of about x{sub imp1} = 0.38% and x{sub imp2} = 0.76%. The GaAs{sub 1−x}N{sub x} layer is regrown on GaAs during FLA treatment in a solid phase epitaxy process. Room temperature near band-edge photoluminescence (PL) has been observed from the FLA treated GaAs{sub 1−x}N{sub x} samples. According to the redshift of the near band-edge PL peak, up to 80% and 44% of the implanted N atoms have been incorporated into the lattice bymore » FLA for x{sub imp1} = 0.38% and x{sub imp2} = 0.76%, respectively. Our investigation shows that ion implantation followed by ultrashort flash lamp treatment, which allows for large scale production, exhibits a promising prospect on bandgap engineering of GaAs based semiconductors.« less

The scotopic electroretinogram of the sugar glider related to histological features of its retina.

PubMed

Akula, James D; Esdaille, Tricia M; Caffé, A Romeo; Naarendorp, Franklin

2011-11-01

The flash electroretinogram (ERG) was used to characterize the scotopic retinal function in a marsupial. Key parameter values of the a- and b-waves of adult male sugar gliders, Petaurus breviceps breviceps, elicited with ganzfeld flashes were determined under dark- and light-adapted conditions. Using standard histological methods, the thicknesses of the major layers of the retina were assessed to provide insight into the nature of the ERG responses. The ERG and histological results were compared to corresponding data for placental C57Bl/6 mice to establish whether the functional retinal specialization that underlies scotopic visual function in a marsupial parallels that of a placental mouse. The sensitivity of the a-wave assessed with the Lamb and Pugh (Invest Ophthalmol Vis Sci 47:5138-5152, 2006) "model" and that of the b-wave assessed with standard methods were lower in the sugar glider compared to the mouse. The thickness of the sugar glider retina was two-third of that of the mouse. The high-intensity flash ERG of the sugar glider substantially differed in shape from that of the mouse reflecting perhaps structural and functional differences between the two species at the level of the inner retina.

High performance wire grid polarizers using jet and flashTM imprint lithography

NASA Astrophysics Data System (ADS)

Ahn, Sean; Yang, Jack; Miller, Mike; Ganapathisubramanian, Maha; Menezes, Marlon; Choi, Jin; Xu, Frank; Resnick, Douglas J.; Sreenivasan, S. V.

2013-03-01

The ability to pattern materials at the nanoscale can enable a variety of applications ranging from high density data storage, displays, photonic devices and CMOS integrated circuits to emerging applications in the biomedical and energy sectors. These applications require varying levels of pattern control, short and long range order, and have varying cost tolerances. Extremely large area roll to roll (R2R) manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. The cost of manufacturing is typically driven by speed (or throughput), tool complexity, cost of consumables (materials used, mold or master cost, etc.), substrate cost, and the downstream processing required (annealing, deposition, etching, etc.). In order to achieve low cost nanopatterning, it is imperative to move towards high speed imprinting, less complex tools, near zero waste of consumables and low cost substrates. The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. In this paper we have developed a roll based J-FIL process and applied it to technology demonstrator tool, the LithoFlex 100, to fabricate large area flexible bilayer wire grid polarizers (WGP) and high performance WGPs on rigid glass substrates. Extinction ratios of better than 10000 were obtained for the glass-based WGPs. Two simulation packages were also employed to understand the effects of pitch, aluminum thickness and pattern defectivity on the optical performance of the WGP devices. It was determined that the WGPs can be influenced by both clear and opaque defects in the gratings, however the defect densities are relaxed relative to the requirements of a high density semiconductor device.

Progress in mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Selinidis, Kosta S.; Brooks, Cynthia B.; Doyle, Gary F.; Brown, Laura; Jones, Chris; Imhof, Joseph; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2011-04-01

The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality "master" mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools and processes specifically for semiconductor applications. The requirements needed for semiconductors dictate the need for a well defined form factor for both master and replica masks which is also compatible with the existing mask infrastructure established for the 6025 semi standard, 6" x 6" x 0.25" photomasks. Complying with this standard provides the necessary tooling needed for mask fabrication processes, cleaning, metrology, and inspection. The replica form factor has additional features specific to imprinting such as a pre-patterned mesa. A PerfectaTM MR5000 mask replication tool has been developed specifically to pattern replica masks from an e-beam written master. The system specifications include a throughput of four replicas per hour with an added image placement component of 5nm, 3sigma and a critical dimension uniformity error of less than 1nm, 3sigma. A new process has been developed to fabricate replicas with high contrast alignment marks so that designs for imprint can fit within current device layouts and maximize the usable printed area on the wafer. Initial performance results of this marks are comparable to the baseline fused silica align marks.

Florida Thunderstorms: A Faucet of Reactive Nitrogen to the Upper Troposphere

NASA Technical Reports Server (NTRS)

Ridley, B.; Ott, L.; Emmons, L.; Montzka, D.; Weinheimer, A.; Knapp, D.; Grahek, F.; Li, L.; Heymsfield, G.; McGill, M.

2004-01-01

During the NASA Cirrus Regional Study of Tropical Anvils and Cirrus Layers-Florida Area Cirrus Experiment (CRYSTAL-FACE) enhanced mixing ratios of nitric oxide were measured in the anvils of thunderstorms and in clear air downwind of storm systems on flights of a Wl3-57F high-altitude aircraft. Mixing ratios greater than l0 - 20 times background were readily observed over distances of 25-120 km due to lightning activity. In many of the Florida storms deposition of NO occurred up to near the tropopause but major deposition usually occurred 1 - 2 km below the tropopause, or mostly within the visible anvil volume formed prior to storm decay. Observations from two storms of very different anvil size and electrical activity allowed estimates of the total mass of NO, vented to the middle and upper troposphere. Using the cloud-to ground (CG) flash accumulations from the National Lightning Detection Network, climatological intra-cloud (IC) to CG ratios, and assuming that CG and IC flashes were of equivalent efficiency for NO production, the ranges of production per flash for a moderate-sized and a large storm were (0.51 - 1.0) x l0(exp 26) and (2.3 - 3.1) x 10(exp 26) molecules NO/flash, respectively. Using the recently determined average global flash rate of 44 8, a gross extrapolation of these two storms to represent possible global annual production rates yield 1.6 - 3.2 and 7.3 - 9.9 Tg(N)/yr, respectively. If the more usual assumption is made that IC efficiency is l/l0th that of CG activity, the ranges of production for the moderate-sized and large storm were (1.3 - 2.7) x l0(exp 26) and (6.0 - 8.1) x l0(exp 26) molecules NO/CG flash, respectively. The estimates from the large storm may be high because there is indirect evidence that the IC/CG ratio was larger than would be derived from climatology. These two storms and others studied did not have flash rates that scaled as approx. H(sup 5) where H is the cloud top altitude. The observed CG flash accumulations and NO(x) mass production estimate for the month of July over the Florida area were compared with a representative 3D global Chemistry-Transport Model (CTMJ that uses the Price et al. lightning parameterization. For two land grid points representing the Florida peninsula the model compared well with the observations: CG flash rates were low by only a factor of approx. 2. When the model grid points included the coastal regions of Florida the flash accumulations were lower than observed by a factor of 3.4 - 4.6. It is recommended that models using the Price et al. parameterization allow any global coastal grid point to maintain the land rather than the marine flash rate parameterization. The convection in this CTM underestimated the actual cloud top heights over Florida by 1 - 2 km and thus the total lightning flash rates and the altitude range of reactive nitrogen deposition. Broad scale (20 - 120 km) median mixing ratios of NO within anvils over Florida were significantly larger than in storms previously investigated over Colorado and New Mexico.

Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

2012-01-01

Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

Impacts of Co doping on ZnO transparent switching memory device characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar

2016-05-02

The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less

The start of lightning: Evidence of bidirectional lightning initiation.

PubMed

Montanyà, Joan; van der Velde, Oscar; Williams, Earle R

2015-10-16

Lightning flashes are known to initiate in regions of strong electric fields inside thunderstorms, between layers of positively and negatively charged precipitation particles. For that reason, lightning inception is typically hidden from sight of camera systems used in research. Other technology such as lightning mapping systems based on radio waves can typically detect only some aspects of the lightning initiation process and subsequent development of positive and negative leaders. We report here a serendipitous recording of bidirectional lightning initiation in virgin air under the cloud base at ~11,000 images per second, and the differences in characteristics of opposite polarity leader sections during the earliest stages of the discharge. This case reveals natural lightning initiation, propagation and a return stroke as in negative cloud-to-ground flashes, upon connection to another lightning channel - without any masking by cloud.

High-density patterned media fabrication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ye, Zhengmao; Ramos, Rick; Brooks, Cynthia; Simpson, Logan; Fretwell, John; Carden, Scott; Hellebrekers, Paul; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2011-04-01

The Jet and Flash Imprint Lithography (J-FIL®) process uses drop dispensing of UV curable resists for high resolution patterning. Several applications, including patterned media, are better, and more economically served by a full substrate patterning process since the alignment requirements are minimal. Patterned media is particularly challenging because of the aggressive feature sizes necessary to achieve storage densities required for manufacturing beyond the current technology of perpendicular recording. In this paper, the key process steps for the application of J-FIL to pattern media fabrication are reviewed with special attention to substrate cleaning, vapor adhesion of the adhesion layer and imprint performance at >300 disk per hour. Also discussed are recent results for imprinting discrete track patterns at half pitches of 24nm and bit patterned media patterns at densities of 1 Tb/in2.

Financial Brownian Particle in the Layered Order-Book Fluid and Fluctuation-Dissipation Relations

NASA Astrophysics Data System (ADS)

Yura, Yoshihiro; Takayasu, Hideki; Sornette, Didier; Takayasu, Misako

2014-03-01

We introduce a novel description of the dynamics of the order book of financial markets as that of an effective colloidal Brownian particle embedded in fluid particles. The analysis of comprehensive market data enables us to identify all motions of the fluid particles. Correlations between the motions of the Brownian particle and its surrounding fluid particles reflect specific layering interactions; in the inner layer the correlation is strong and with short memory, while in the outer layer it is weaker and with long memory. By interpreting and estimating the contribution from the outer layer as a drag resistance, we demonstrate the validity of the fluctuation-dissipation relation in this nonmaterial Brownian motion process.

Financial Brownian particle in the layered order-book fluid and fluctuation-dissipation relations.

PubMed

Yura, Yoshihiro; Takayasu, Hideki; Sornette, Didier; Takayasu, Misako

2014-03-07

We introduce a novel description of the dynamics of the order book of financial markets as that of an effective colloidal Brownian particle embedded in fluid particles. The analysis of comprehensive market data enables us to identify all motions of the fluid particles. Correlations between the motions of the Brownian particle and its surrounding fluid particles reflect specific layering interactions; in the inner layer the correlation is strong and with short memory, while in the outer layer it is weaker and with long memory. By interpreting and estimating the contribution from the outer layer as a drag resistance, we demonstrate the validity of the fluctuation-dissipation relation in this nonmaterial Brownian motion process.

Intense pulsed light annealing of copper zinc tin sulfide nanocrystal coatings

DOE Office of Scientific and Technical Information (OSTI.GOV)

Williams, Bryce A.; Smeaton, Michelle A.; Holgate, Collin S.

2016-09-15

A promising method for forming the absorber layer in copper zinc tin sulfide [Cu{sub 2}ZnSnS{sub 4} (CZTS)] thin film solar cells is thermal annealing of coatings cast from dispersions of CZTS nanocrystals. Intense pulsed light (IPL) annealing utilizing xenon flash lamps is a potential high-throughput, low-cost, roll-to-roll manufacturing compatible alternative to thermal annealing in conventional furnaces. The authors studied the effects of flash energy density (3.9–11.6 J/cm{sup 2}) and number of flashes (1–400) during IPL annealing on the microstructure of CZTS nanocrystal coatings cast on molybdenum-coated soda lime glass substrates (Mo-coated SLG). The annealed coatings exhibited cracks with two distinct linearmore » crack densities, 0.01 and 0.2 μm{sup −1}, depending on the flash intensity and total number of flashes. Low density cracking (0.01 μm{sup −1}, ∼1 crack per 100 μm) is caused by decomposition of CZTS at the Mo-coating interface. Vapor decomposition products at the interface cause blisters as they escape the coating. Residual decomposition products within the blisters were imaged using confocal Raman spectroscopy. In support of this hypothesis, replacing the Mo-coated SLG substrate with quartz eliminated blistering and low-density cracking. High density cracking is caused by rapid thermal expansion and contraction of the coating constricted on the substrate as it is heated and cooled during IPL annealing. Finite element modeling showed that CZTS coatings on low thermal diffusivity materials (i.e., SLG) underwent significant differential heating with respect to the substrate with rapid rises and falls of the coating temperature as the flash is turned on and off, possibly causing a build-up of tensile stress within the coating prompting cracking. Use of a high thermal diffusivity substrate, such as a molybdenum foil (Mo foil), reduces this differential heating and eliminates the high-density cracking. IPL annealing in presence of sulfur vapor prevented both low- and high-density cracking as well as blistering. However, grain growth was limited even after annealing with 400 flashes. This lack of grain growth is attributed to a difficulty of maintaining high sulfur vapor pressure and absence of alkali metal impurities when Mo foil substrates are used.« less

Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

NASA Astrophysics Data System (ADS)

Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

2018-01-01

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

Sol-gel-derived double-layered nanocrystal memory

NASA Astrophysics Data System (ADS)

Ko, Fu-Hsiang; You, Hsin-Chiang; Lei, Tan-Fu

2006-12-01

The authors have used the sol-gel spin-coating method to fabricate a coexisting hafnium silicate and zirconium silicate double-layered nanocrystal (NC) memories. From transmission electron microscopic and x-ray photoelectron spectroscopic analyses, the authors determined that the hafnium silicate and zirconium silicate NCs formed after annealing at 900°C for 1min. When using channel hot electron injection for charging and band-to-band tunneling-induced hot hole injection for discharging, the NC memories exhibited superior Vth shifting because of the higher probability for trapping the charge carrier.

Lifetime prediction of InGaZnO thin film transistor for the application of display device and BEOL-transistors

NASA Astrophysics Data System (ADS)

Kim, Sang Min; Cho, Won Ju; Yu, Chong Gun; Park, Jong Tae

2018-04-01

In this work, the lifetime prediction models of amorphous InGaZnO thin film transistors (a-IGZO TFTs) were suggested for the application of display device and BEOL (Back End Of line) transistors with embedded a-IGZO TFTs. Four different types of test devices according to the active layer thickness, source/drain electrode materials and thermal treatments have been used to verify the suggested model. The device lifetimes under high gate bias stress and hot carrier stress were extracted through fittings of the stretched-exponential equation for threshold voltage shifts and the current estimation method for drain current degradations. Our suggested lifetime prediction models could be used in any kinds of structures of a-IGZO TFTs for the application of display device and BEOL transistors. The a-IGZO TFTs with embedded ITO local conducting layer under source/drain is better for BEOL transistor application and a-IGZO TFTs with InGaZnO thin film as source/drain electrodes may be better for the application of display devices. From 1983 to 1985, he was a Researcher at Gold-Star Semiconductor, Inc., Korea, where he worked on the development of SRAM. He joined the Department of Electronics Engineering, University of Incheon, Incheon, Korea, in 1987, where he is a Professor. As a visiting scientist at Massachusetts Institute of Technology, Cambridge, in 1991, he conducted research in hot carrier reliability of CMOS. As a visiting scholar at University of California, Davis, in 2001, he conducted research on the device structure of Nano-scale SOI CMOS. His recent interests are device structure and reliability of Nano-scale CMOS devices, flash memory, and thin film transistors.

High-fluence Ga-implanted silicon-The effect of annealing and cover layers

NASA Astrophysics Data System (ADS)

Fiedler, J.; Heera, V.; Hübner, R.; Voelskow, M.; Germer, S.; Schmidt, B.; Skorupa, W.

2014-07-01

The influence of SiO2 and SiNx cover layers on the dopant distribution as well as microstructure of high fluence Ga implanted Si after thermal processing is investigated. The annealing temperature determines the layer microstructure and the cover layers influence the obtained Ga profile. Rapid thermal annealing at temperatures up to 750 °C leads to a polycrystalline layer structure containing amorphous Ga-rich precipitates. Already after a short 20 ms flash lamp annealing, a Ga-rich interface layer is observed for implantation through the cover layers. This effect can partly be suppressed by annealing temperatures of at least 900 °C. However, in this case, Ga accumulates in larger, cone-like precipitates without disturbing the surrounding Si lattice parameters. Such a Ga-rich crystalline Si phase does not exist in the equilibrium phase diagram according to which the Ga solubility in Si is less than 0.1 at. %. The Ga-rich areas are capped with SiOx grown during annealing which only can be avoided by the usage of SiNx cover layers.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

PubMed Central

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-01-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

Status of climacteric symptoms among middle-aged to elderly Japanese women: comparison of general healthy women with women presenting at a menopausal clinic.

PubMed

Ikeda, Toshiyuki; Makita, Kazuya; Ishitani, Ken; Takamatsu, Kiyoshi; Horiguchi, Fumi; Nozawa, Shiro

2005-04-01

To examine the status and characteristics of climacteric symptoms reported by generally healthy middle-aged to elderly women in Japan, those living in Saitama Prefecture were surveyed . The subjects comprised 398 women ranging in age from 40 to <60 years (mean age, 50.5 years). Climacteric symptoms were objectively assessed using the Keio questionnaire. The total scores obtained for the 40 symptoms were used to calculate symptom prevalence and severity. (i) The most frequent symptom was poor memory, reported by 88.7% of the women. (ii) Lumbar-sacral back pain was rated as a severe symptom by the highest percentage of women (15.3%). (iii) The prevalence and severity of poor memory and lumbar-sacral back pain did not differ with menopausal status. (iv) Hot flashes and sweats were slightly higher in peri- and early postmenopausal women than in premenopausal women. The present study showed that healthy women who do not consult physicians because of climacteric symptoms are primarily concerned with age-related symptoms, such as poor memory, loss of hair, and forgetfulness.

[Development of a video image system for wireless capsule endoscopes based on DSP].

PubMed

Yang, Li; Peng, Chenglin; Wu, Huafeng; Zhao, Dechun; Zhang, Jinhua

2008-02-01

A video image recorder to record video picture for wireless capsule endoscopes was designed. TMS320C6211 DSP of Texas Instruments Inc. is the core processor of this system. Images are periodically acquired from Composite Video Broadcast Signal (CVBS) source and scaled by video decoder (SAA7114H). Video data is transported from high speed buffer First-in First-out (FIFO) to Digital Signal Processor (DSP) under the control of Complex Programmable Logic Device (CPLD). This paper adopts JPEG algorithm for image coding, and the compressed data in DSP was stored to Compact Flash (CF) card. TMS320C6211 DSP is mainly used for image compression and data transporting. Fast Discrete Cosine Transform (DCT) algorithm and fast coefficient quantization algorithm are used to accelerate operation speed of DSP and decrease the executing code. At the same time, proper address is assigned for each memory, which has different speed;the memory structure is also optimized. In addition, this system uses plenty of Extended Direct Memory Access (EDMA) to transport and process image data, which results in stable and high performance.

Impact of high-κ dielectric and metal nanoparticles in simultaneous enhancement of programming speed and retention time of nano-flash memory

NASA Astrophysics Data System (ADS)

Pavel, Akeed A.; Khan, Mehjabeen A.; Kirawanich, Phumin; Islam, N. E.

2008-10-01

A methodology to simulate memory structures with metal nanocrystal islands embedded as floating gate in a high-κ dielectric material for simultaneous enhancement of programming speed and retention time is presented. The computational concept is based on a model for charge transport in nano-scaled structures presented earlier, where quantum mechanical tunneling is defined through the wave impedance that is analogous to the transmission line theory. The effects of substrate-tunnel dielectric conduction band offset and metal work function on the tunneling current that determines the programming speed and retention time is demonstrated. Simulation results confirm that a high-κ dielectric material can increase programming current due to its lower conduction band offset with the substrate and also can be effectively integrated with suitable embedded metal nanocrystals having high work function for efficient data retention. A nano-memory cell designed with silver (Ag) nanocrystals embedded in Al 2O 3 has been compared with similar structure consisting of Si nanocrystals in SiO 2 to validate the concept.

Effect of surface oxidation on thermomechanical behavior of NiTi shape memory alloy wire

NASA Astrophysics Data System (ADS)

Ng, Ching Wei; Mahmud, Abdus Samad

2017-12-01

Nickel titanium (NiTi) alloy is a unique alloy that exhibits special behavior that recovers fully its shape after being deformed to beyond elastic region. However, this alloy is sensitive to any changes of its composition and introduction of inclusion in its matrix. Heat treatment of NiTi shape memory alloy to above 600 °C leads to the formation of the titanium oxide (TiO2) layer. Titanium oxide is a ceramic material that does not exhibit shape memory behaviors and possess different mechanical properties than that of NiTi alloy, thus disturbs the shape memory behavior of the alloy. In this work, the effect of formation of TiO2 surface oxide layer towards the thermal phase transformation and stress-induced deformation behaviors of the NiTi alloy were studied. The NiTi wire with composition of Ti-50.6 at% Ni was subjected to thermal oxidation at 600 °C to 900 °C for 30 and 60 minutes. The formation of the surface oxide layers was characterized by using the Scanning Electron Microscope (SEM). The effect of surface oxide layers with different thickness towards the thermal phase transformation behavior was studied by using the Differential Scanning Calorimeter (DSC). The effect of surface oxidation towards the stress-induced deformation behavior was studied through the tensile deformation test. The stress-induced deformation behavior and the shape memory recovery of the NiTi wire under tensile deformation were found to be affected marginally by the formation of thick TiO2 layer.

Prospective memory in an air traffic control simulation: External aids that signal when to act

PubMed Central

Loft, Shayne; Smith, Rebekah E.; Bhaskara, Adella

2011-01-01

At work and in our personal life we often need to remember to perform intended actions at some point in the future, referred to as Prospective Memory. Individuals sometimes forget to perform intentions in safety-critical work contexts. Holding intentions can also interfere with ongoing tasks. We applied theories and methods from the experimental literature to test the effectiveness of external aids in reducing prospective memory error and costs to ongoing tasks in an air traffic control simulation. Participants were trained to accept and hand-off aircraft, and to detect aircraft conflicts. For the prospective memory task participants were required to substitute alternative actions for routine actions when accepting target aircraft. Across two experiments, external display aids were provided that presented the details of target aircraft and associated intended actions. We predicted that aids would only be effective if they provided information that was diagnostic of target occurrence and in this study we examined the utility of aids that directly cued participants when to allocate attention to the prospective memory task. When aids were set to flash when the prospective memory target aircraft needed to be accepted, prospective memory error and costs to ongoing tasks of aircraft acceptance and conflict detection were reduced. In contrast, aids that did not alert participants specifically when the target aircraft were present provided no advantage compared to when no aids we used. These findings have practical implications for the potential relative utility of automated external aids for occupations where individuals monitor multi-item dynamic displays. PMID:21443381

Prospective memory in an air traffic control simulation: external aids that signal when to act.

PubMed

Loft, Shayne; Smith, Rebekah E; Bhaskara, Adella

2011-03-01

At work and in our personal life we often need to remember to perform intended actions at some point in the future, referred to as Prospective Memory. Individuals sometimes forget to perform intentions in safety-critical work contexts. Holding intentions can also interfere with ongoing tasks. We applied theories and methods from the experimental literature to test the effectiveness of external aids in reducing prospective memory error and costs to ongoing tasks in an air traffic control simulation. Participants were trained to accept and hand-off aircraft and to detect aircraft conflicts. For the prospective memory task, participants were required to substitute alternative actions for routine actions when accepting target aircraft. Across two experiments, external display aids were provided that presented the details of target aircraft and associated intended actions. We predicted that aids would only be effective if they provided information that was diagnostic of target occurrence, and in this study, we examined the utility of aids that directly cued participants when to allocate attention to the prospective memory task. When aids were set to flash when the prospective memory target aircraft needed to be accepted, prospective memory error and costs to ongoing tasks of aircraft acceptance and conflict detection were reduced. In contrast, aids that did not alert participants specifically when the target aircraft were present provided no advantage compared to when no aids were used. These findings have practical implications for the potential relative utility of automated external aids for occupations where individuals monitor multi-item dynamic displays.

The conjunction of non-consciously perceived object identity and spatial position can be retained during a visual short-term memory task.

PubMed

Bergström, Fredrik; Eriksson, Johan

2015-01-01

Although non-consciously perceived information has previously been assumed to be short-lived (< 500 ms), recent findings show that non-consciously perceived information can be maintained for at least 15 s. Such findings can be explained as working memory without a conscious experience of the information to be retained. However, whether or not working memory can operate on non-consciously perceived information remains controversial, and little is known about the nature of such non-conscious visual short-term memory (VSTM). Here we used continuous flash suppression to render stimuli non-conscious, to investigate the properties of non-consciously perceived representations in delayed match-to-sample (DMS) tasks. In Experiment I we used variable delays (5 or 15 s) and found that performance was significantly better than chance and was unaffected by delay duration, thereby replicating previous findings. In Experiment II the DMS task required participants to combine information of spatial position and object identity on a trial-by-trial basis to successfully solve the task. We found that the conjunction of spatial position and object identity was retained, thereby verifying that non-conscious, trial-specific information can be maintained for prospective use. We conclude that our results are consistent with a working memory interpretation, but that more research is needed to verify this interpretation.

Oxide Structure Dependence of SiO2/SiOx/3C-SiC/n-Type Si Nonvolatile Resistive Memory on Memory Operation Characteristics

NASA Astrophysics Data System (ADS)

Yamaguchi, Yuichiro; Shouji, Masatsugu; Suda, Yoshiyuki

2012-11-01

We have investigated the dependence of the oxide layer structure of our previously proposed metal/SiO2/SiOx/3C-SiC/n-Si/metal metal-insulator-semiconductor (MIS) resistive memory device on the memory operation characteristics. The current-voltage (I-V) measurement and X-ray photoemission spectroscopy results suggest that SiOx defect states mainly caused by the oxidation of 3C-SiC at temperatures below 1000 °C are related to the hysteresis memory behavior in the I-V curve. By restricting the SiOx interface region, the number of switching cycles and the on/off current ratio are more enhanced. Compared with a memory device formed by one-step or two-step oxidation of 3C-SiC, a memory device formed by one-step oxidation of Si/3C-SiC exhibits a more restrictive SiOx interface with a more definitive SiO2 layer and higher memory performances for both the endurance switching cycle and on/off current ratio.

Vertical bloch line memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-chuan (Inventor)

1995-01-01

A new read gate design for the vertical Bloch line (VBL) memory is disclosed which offers larger operating margin than the existing read gate designs. In the existing read gate designs, a current is applied to all the stripes. The stripes that contain a VBL pair are chopped, while the stripes that do not contain a VBL pair are not chopped. The information is then detected by inspecting the presence or absence of the bubble. The margin of the chopping current amplitude is very small, and sometimes non-existent. A new method of reading Vertical Bloch Line memory is also disclosed. Instead of using the wall chirality to separate the two binary states, the spatial deflection of the stripe head is used. Also disclosed herein is a compact memory which uses vertical Bloch line (VBL) memory technology for providing data storage. A three-dimensional arrangement in the form of stacks of VBL memory layers is used to achieve high volumetric storage density. High data transfer rate is achieved by operating all the layers in parallel. Using Hall effect sensing, and optical sensing via the Faraday effect to access the data from within the three-dimensional packages, an even higher data transfer rate can be achieved due to parallel operation within each layer.

Active Vibration Control of Elastic Beam by Means of Shape Memory Alloy Layers

NASA Technical Reports Server (NTRS)

Chen, Q.; Levy, C.

1996-01-01

The mathematical model of a flexible beam covered with shape memory alloy (SMA) layers is presented. The SMA layers are used as actuators, which are capable of changing their elastic modulus and recovery stress, thus changing the natural frequency of, and adjusting the excitation to, the vibrating beam. The frequency factor variation as a function of SMA Young's modulus, SMA layer thickness and beam thickness is discussed. Also control of the beam employing an optimal linear control law is evaluated. The control results indicate how the system reacts to various levels of excitation input through the non-homogeneous recovery shear term of the governing differential equation.

NiTi shape-memory alloy oxidized in low-temperature plasma with carbon coating: Characteristic and a potential for cardiovascular applications

NASA Astrophysics Data System (ADS)

Witkowska, Justyna; Sowińska, Agnieszka; Czarnowska, Elżbieta; Płociński, Tomasz; Borowski, Tomasz; Wierzchoń, Tadeusz

2017-11-01

Surface layers currently produced on NiTi alloys do not meet all the requirements for materials intended for use in cardiology. Plasma surface treatments of titanium and its alloys under glow discharge conditions make it possible to produce surface layers, such as TiN or TiO2, which increases corrosion resistance and biocompatibility. The production of layers on NiTi alloys with the same properties, and maintaining their shape memory and superelasticity features, requires the use of low-temperature processes. At the same time, since it is known that the carbon-based layers could prevent excessive adhesion and aggregation of platelets, we examined the composite a-CNH + TiO2 type surface layer produced by means of a hybrid method combining oxidation in low-temperature plasma and Radio Frequency Chemical Vapor Deposition (RFCVD) processes. Investigations have shown that this composite layer increases the corrosion resistance of the material, and both the low degree of roughness and the chemical composition of the surface produced lead to decreased platelet adhesion and aggregation and proper endothelialization, which could extend the range of applications of NiTi shape memory alloys.

Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx, GdOx, HfOx, and TaOx switching materials.

PubMed

Prakash, Amit; Maikap, Siddheswar; Banerjee, Writam; Jana, Debanjan; Lai, Chao-Sung

2013-09-06

Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled 'SET/RESET' current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.

Write once read many memory device from Tris-8 (-hydroxyquinoline) aluminum and Indium tin oxide nano particles

NASA Astrophysics Data System (ADS)

Aneesh, J.; Predeep, P.

2011-10-01

Consequent to the fast increase in data storage requirements new materials and device structures are explored in a war footing. Organic memory devices are attracting lot of interest among the researchers and are becoming a hot topic of investigations. This study is an attempt to develop a tri-layer organic memory device using indium tin oxide (ITO) nanoparticles as charge trapping middle layer between tris-8(-hydroxyquinoline)aluminum (Alq3) layers employing spin coating technique. Device switching is studied by applying a current-voltage (I-V) sweep. On increasing the applied bias the device switched from the initial high resistance (OFF) state to a low resistance (ON) state at a switch on voltage of around 4 V. ON/OFF ratio is of the order of 100 at a read voltage of 2 V. The device is found to remain in the low resistance state on further scans, showing the applicability of this device as a write once read many times (WORM) memory.

Shift and rotation invariant photorefractive crystal-based associative memory

NASA Astrophysics Data System (ADS)

Uang, Chii-Maw; Lin, Wei-Feng; Lu, Ming-Huei; Lu, Guowen; Lu, Mingzhe

1995-08-01

A shift and rotation invariant photorefractive (PR) crystal based associative memory is addressed. The proposed associative memory has three layers: the feature extraction, inner- product, and output mapping layers. The feature extraction is performed by expanding an input object into a set of circular harmonic expansions (CHE) in the Fourier domain to acquire both the shift and rotation invariant properties. The inner product operation is performed by taking the advantage of Bragg diffraction of the bulky PR-crystal. The output mapping is achieved by using the massive storage capacity of the PR-crystal. In the training process, memories are stored in another PR-crystal by using the wavelength multiplexing technique. During the recall process, the output from the winner-take-all processor decides which wavelength should be used to read out the memory from the PR-crystal.

Spin-valve Josephson junctions for cryogenic memory

NASA Astrophysics Data System (ADS)

Niedzielski, Bethany M.; Bertus, T. J.; Glick, Joseph A.; Loloee, R.; Pratt, W. P.; Birge, Norman O.

2018-01-01

Josephson junctions containing two ferromagnetic layers are being considered for use in cryogenic memory. Our group recently demonstrated that the ground-state phase difference across such a junction with carefully chosen layer thicknesses could be controllably toggled between zero and π by switching the relative magnetization directions of the two layers between the antiparallel and parallel configurations. However, several technological issues must be addressed before those junctions can be used in a large-scale memory. Many of these issues can be more easily studied in single junctions, rather than in the superconducting quantum interference device (SQUID) used for phase-sensitive measurements. In this work, we report a comprehensive study of spin-valve junctions containing a Ni layer with a fixed thickness of 2.0 nm and a NiFe layer of thickness varying between 1.1 and 1.8 nm in steps of 0.1 nm. We extract the field shift of the Fraunhofer patterns and the critical currents of the junctions in the parallel and antiparallel magnetic states, as well as the switching fields of both magnetic layers. We also report a partial study of similar junctions containing a slightly thinner Ni layer of 1.6 nm and the same range of NiFe thicknesses. These results represent the first step toward mapping out a "phase diagram" for phase-controllable spin-valve Josephson junctions as a function of the two magnetic layer thicknesses.

Cobalt germanide nanostructure formation and memory characteristic enhancement in silicon oxide films

NASA Astrophysics Data System (ADS)

Joo, Beom Soo; Kim, Hyunseung; Jang, Seunghun; Han, Dongwoo; Han, Moonsup

2018-08-01

We investigated nano-floating gate memory having a charge trap layer (CTL) composed of cobalt germanide nanostructure (ns-CoGe). A tunneling oxide layer; a CTL containing Co, Ge, and Si; and a blocking oxide layer were sequentially deposited on a p-type silicon substrate by RF magnetron sputtering and low-pressure chemical vapor deposition. We optimized the CTL formation conditions by rapid thermal annealing at a somewhat low temperature (about 830 °C) by considering the differences in Gibbs free energy and chemical enthalpy among the components. To characterize the charge storage properties, capacitance-voltage (C-V) measurements were performed. Further, we used X-ray photoelectron spectroscopy for chemical analysis of the CTL. In this work, we not only report that the C-V measurement shows a remarkable opening of the memory window for the ns-CoGe compared with those of nanostructures composed of Co or Ge alone, but also clarify that the improvement in the memory characteristics originates in the nanostructure formation, which consists mainly of Co-Ge bonds. We expect ns-CoGe to be a strong candidate for fabrication of next-generation memory devices.

Material parameters from frequency dispersion simulation of floating gate memory with Ge nanocrystals in HfO2

NASA Astrophysics Data System (ADS)

Palade, C.; Lepadatu, A. M.; Slav, A.; Lazanu, S.; Teodorescu, V. S.; Stoica, T.; Ciurea, M. L.

2018-01-01

Trilayer memory capacitors with Ge nanocrystals (NCs) floating gate in HfO2 were obtained by magnetron sputtering deposition on p-type Si substrate followed by rapid thermal annealing at relatively low temperature of 600 °C. The frequency dispersion of capacitance and resistance was measured in accumulation regime of Al/HfO2 gate oxide/Ge NCs in HfO2 floating gate/HfO2 tunnel oxide/SiOx/p-Si/Al memory capacitors. For simulation of the frequency dispersion a complex circuit model was used considering an equivalent parallel RC circuit for each layer of the trilayer structure. A series resistance due to metallic contacts and Si substrate was necessary to be included in the model. A very good fit to the experimental data was obtained and the parameters of each layer in the memory capacitor, i.e. capacitances and resistances were determined and in turn the intrinsic material parameters, i.e. dielectric constants and resistivities of layers were evaluated. The results are very important for the study and optimization of the hysteresis behaviour of floating gate memories based on NCs embedded in oxide.

Enhancement of memory margins in the polymer composite of [6,6]-phenyl-C61-butyric acid methyl ester and polystyrene.

PubMed

Sun, Yanmei; Lu, Junguo; Ai, Chunpeng; Wen, Dianzhong; Bai, Xuduo

2016-11-09

Memory devices based on composites of polystyrene (PS) and [6,6]-phenyl-C 61 -butyric acid methyl ester (PCBM) were investigated with bistable resistive switching behavior. Current-voltage (I-V) curves for indium-tin-oxide (ITO)/PS + PCBM/Al devices with 33 wt% PCBM showed non-volatile, rewritable, flash memory properties with a maximum ON/OFF current ratio of 1 × 10 4 , which was 100 times larger than the ON/OFF ratio of the device with 5 wt% PCBM. For ITO/PS + PCBM/Al devices with 33 wt% PCBM, the write-read-erase-read test cycles demonstrated the bistable devices with ON and OFF states at the same voltage. The programmable ON and OFF states endured up to 10 4 read pulses and possessed a retention time of over 10 5 s, indicative of the memory stability of the device. In the OFF state, the I-V curve at lower voltages up to 0.45 V was attributed to the thermionic emission mechanism, and the I-V characteristics in the applied voltage above 0.5 V dominantly followed the space-charge-limited-current behaviors. In the ON state, the curve in the applied voltage range was related to an Ohmic mechanism.

Detection of charge storage on molecular thin films of tris(8-hydroxyquinoline) aluminum (Alq3) by Kelvin force microscopy: a candidate system for high storage capacity memory cells.

PubMed

Paydavosi, Sarah; Aidala, Katherine E; Brown, Patrick R; Hashemi, Pouya; Supran, Geoffrey J; Osedach, Timothy P; Hoyt, Judy L; Bulović, Vladimir

2012-03-14

Retention and diffusion of charge in tris(8-hydroxyquinoline) aluminum (Alq(3)) molecular thin films are investigated by injecting electrons and holes via a biased conductive atomic force microscopy tip into the Alq(3) films. After the charge injection, Kelvin force microscopy measurements reveal minimal changes with time in the spatial extent of the trapped charge domains within Alq(3) films, even for high hole and electron densities of >10(12) cm(-2). We show that this finding is consistent with the very low mobility of charge carriers in Alq(3) thin films (<10(-7) cm(2)/(Vs)) and that it can benefit from the use of Alq(3) films as nanosegmented floating gates in flash memory cells. Memory capacitors using Alq(3) molecules as the floating gate are fabricated and measured, showing durability over more than 10(4) program/erase cycles and the hysteresis window of up to 7.8 V, corresponding to stored charge densities as high as 5.4 × 10(13) cm(-2). These results demonstrate the potential for use of molecular films in high storage capacity nonvolatile memory cells. © 2012 American Chemical Society

Impact of Recent Hardware and Software Trends on High Performance Transaction Processing and Analytics

NASA Astrophysics Data System (ADS)

Mohan, C.

In this paper, I survey briefly some of the recent and emerging trends in hardware and software features which impact high performance transaction processing and data analytics applications. These features include multicore processor chips, ultra large main memories, flash storage, storage class memories, database appliances, field programmable gate arrays, transactional memory, key-value stores, and cloud computing. While some applications, e.g., Web 2.0 ones, were initially built without traditional transaction processing functionality in mind, slowly system architects and designers are beginning to address such previously ignored issues. The availability, analytics and response time requirements of these applications were initially given more importance than ACID transaction semantics and resource consumption characteristics. A project at IBM Almaden is studying the implications of phase change memory on transaction processing, in the context of a key-value store. Bitemporal data management has also become an important requirement, especially for financial applications. Power consumption and heat dissipation properties are also major considerations in the emergence of modern software and hardware architectural features. Considerations relating to ease of configuration, installation, maintenance and monitoring, and improvement of total cost of ownership have resulted in database appliances becoming very popular. The MapReduce paradigm is now quite popular for large scale data analysis, in spite of the major inefficiencies associated with it.

Strong Motion Seismograph Based On MEMS Accelerometer

NASA Astrophysics Data System (ADS)

Teng, Y.; Hu, X.

2013-12-01

The MEMS strong motion seismograph we developed used the modularization method to design its software and hardware.It can fit various needs in different application situation.The hardware of the instrument is composed of a MEMS accelerometer,a control processor system,a data-storage system,a wired real-time data transmission system by IP network,a wireless data transmission module by 3G broadband,a GPS calibration module and power supply system with a large-volumn lithium battery in it. Among it,the seismograph's sensor adopted a three-axis with 14-bit high resolution and digital output MEMS accelerometer.Its noise level just reach about 99μg/√Hz and ×2g to ×8g dynamically selectable full-scale.Its output data rates from 1.56Hz to 800Hz. Its maximum current consumption is merely 165μA,and the device is so small that it is available in a 3mm×3mm×1mm QFN package. Furthermore,there is access to both low pass filtered data as well as high pass filtered data,which minimizes the data analysis required for earthquake signal detection. So,the data post-processing can be simplified. Controlling process system adopts a 32-bit low power consumption embedded ARM9 processor-S3C2440 and is based on the Linux operation system.The processor's operating clock at 400MHz.The controlling system's main memory is a 64MB SDRAM with a 256MB flash-memory.Besides,an external high-capacity SD card data memory can be easily added.So the system can meet the requirements for data acquisition,data processing,data transmission,data storage,and so on. Both wired and wireless network can satisfy remote real-time monitoring, data transmission,system maintenance,status monitoring or updating software.Linux was embedded and multi-layer designed conception was used.The code, including sensor hardware driver,the data acquisition,earthquake setting out and so on,was written on medium layer.The hardware driver consist of IIC-Bus interface driver, IO driver and asynchronous notification driver. The application program layer mainly concludes: earthquake parameter module, local database managing module, data transmission module, remote monitoring, FTP service and so on. The application layer adopted multi-thread process. The whole strong motion seismograph was encapsulated in a small aluminum box, which size is 80mm×120mm×55mm. The inner battery can work continuesly more than 24 hours. The MEMS accelerograph uses modular design for its software part and hardware part. It has remote software update function and can meet the following needs: a) Auto picking up the earthquake event; saving the data on wave-event files and hours files; It may be used for monitoring strong earthquake, explosion, bridge and house health. b) Auto calculate the earthquake parameters, and transferring those parameters by 3G wireless broadband network. This kind of seismograph has characteristics of low cost, easy installation. They can be concentrated in the urban region or areas need to specially care. We can set up a ground motion parameters quick report sensor network while large earthquake break out. Then high-resolution-fine shake-map can be easily produced for the need of emergency rescue. c) By loading P-wave detection program modules, it can be used for earthquake early warning for large earthquakes; d) Can easily construct a high-density layout seismic monitoring network owning remote control and modern intelligent earthquake sensor.

Peteye detection and correction

NASA Astrophysics Data System (ADS)

Yen, Jonathan; Luo, Huitao; Tretter, Daniel

2007-01-01

Redeyes are caused by the camera flash light reflecting off the retina. Peteyes refer to similar artifacts in the eyes of other mammals caused by camera flash. In this paper we present a peteye removal algorithm for detecting and correcting peteye artifacts in digital images. Peteye removal for animals is significantly more difficult than redeye removal for humans, because peteyes can be any of a variety of colors, and human face detection cannot be used to localize the animal eyes. In many animals, including dogs and cats, the retina has a special reflective layer that can cause a variety of peteye colors, depending on the animal's breed, age, or fur color, etc. This makes the peteye correction more challenging. We have developed a semi-automatic algorithm for peteye removal that can detect peteyes based on the cursor position provided by the user and correct them by neutralizing the colors with glare reduction and glint retention.

Devolatilization Analysis in a Twin Screw Extruder by using the Flow Analysis Network (FAN) Method

NASA Astrophysics Data System (ADS)

Tomiyama, Hideki; Takamoto, Seiji; Shintani, Hiroaki; Inoue, Shigeki

We derived the theoretical formulas for three mechanisms of devolatilization in a twin screw extruder. These are flash, surface refreshment and forced expansion. The method for flash devolatilization is based on the equation of equilibrium concentration which shows that volatiles break off from polymer when they are relieved from high pressure condition. For surface refreshment devolatilization, we applied Latinen's model to allow estimation of polymer behavior in the unfilled screw conveying condition. Forced expansion devolatilization is based on the expansion theory in which foams are generated under reduced pressure and volatiles are diffused on the exposed surface layer after mixing with the injected devolatilization agent. Based on these models, we developed the simulation software of twin-screw extrusion by the FAN method and it allows us to quantitatively estimate volatile concentration and polymer temperature with a high accuracy in the actual multi-vent extrusion process for LDPE + n-hexane.

Abnormal neural activation patterns underlying working memory impairment in chronic phencyclidine-treated mice.

PubMed

Arime, Yosefu; Akiyama, Kazufumi

2017-01-01

Working memory impairment is a hallmark feature of schizophrenia and is thought be caused by dysfunctions in the prefrontal cortex (PFC) and associated brain regions. However, the neural circuit anomalies underlying this impairment are poorly understood. The aim of this study is to assess working memory performance in the chronic phencyclidine (PCP) mouse model of schizophrenia, and to identify the neural substrates of working memory. To address this issue, we conducted the following experiments for mice after withdrawal from chronic administration (14 days) of either saline or PCP (10 mg/kg): (1) a discrete paired-trial variable-delay task in T-maze to assess working memory, and (2) brain-wide c-Fos mapping to identify activated brain regions relevant to this task performance either 90 min or 0 min after the completion of the task, with each time point examined under working memory effort and basal conditions. Correct responses in the test phase of the task were significantly reduced across delays (5, 15, and 30 s) in chronic PCP-treated mice compared with chronic saline-treated controls, suggesting delay-independent impairments in working memory in the PCP group. In layer 2-3 of the prelimbic cortex, the number of working memory effort-elicited c-Fos+ cells was significantly higher in the chronic PCP group than in the chronic saline group. The main effect of working memory effort relative to basal conditions was to induce significantly increased c-Fos+ cells in the other layers of prelimbic cortex and the anterior cingulate and infralimbic cortex regardless of the different chronic regimens. Conversely, this working memory effort had a negative effect (fewer c-Fos+ cells) in the ventral hippocampus. These results shed light on some putative neural networks relevant to working memory impairments in mice chronically treated with PCP, and emphasize the importance of the layer 2-3 of the prelimbic cortex of the PFC.

Abnormal neural activation patterns underlying working memory impairment in chronic phencyclidine-treated mice

PubMed Central

Akiyama, Kazufumi

2017-01-01

Working memory impairment is a hallmark feature of schizophrenia and is thought be caused by dysfunctions in the prefrontal cortex (PFC) and associated brain regions. However, the neural circuit anomalies underlying this impairment are poorly understood. The aim of this study is to assess working memory performance in the chronic phencyclidine (PCP) mouse model of schizophrenia, and to identify the neural substrates of working memory. To address this issue, we conducted the following experiments for mice after withdrawal from chronic administration (14 days) of either saline or PCP (10 mg/kg): (1) a discrete paired-trial variable-delay task in T-maze to assess working memory, and (2) brain-wide c-Fos mapping to identify activated brain regions relevant to this task performance either 90 min or 0 min after the completion of the task, with each time point examined under working memory effort and basal conditions. Correct responses in the test phase of the task were significantly reduced across delays (5, 15, and 30 s) in chronic PCP-treated mice compared with chronic saline-treated controls, suggesting delay-independent impairments in working memory in the PCP group. In layer 2–3 of the prelimbic cortex, the number of working memory effort-elicited c-Fos+ cells was significantly higher in the chronic PCP group than in the chronic saline group. The main effect of working memory effort relative to basal conditions was to induce significantly increased c-Fos+ cells in the other layers of prelimbic cortex and the anterior cingulate and infralimbic cortex regardless of the different chronic regimens. Conversely, this working memory effort had a negative effect (fewer c-Fos+ cells) in the ventral hippocampus. These results shed light on some putative neural networks relevant to working memory impairments in mice chronically treated with PCP, and emphasize the importance of the layer 2–3 of the prelimbic cortex of the PFC. PMID:29253020

Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations.

PubMed

Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

2016-01-27

Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

A chiral-based magnetic memory device without a permanent magnet

PubMed Central

Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

A chiral-based magnetic memory device without a permanent magnet.

PubMed

Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations

NASA Astrophysics Data System (ADS)

Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

2016-01-01

Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

Why Flash Type Matters: A Statistical Analysis

NASA Astrophysics Data System (ADS)

Mecikalski, Retha M.; Bitzer, Phillip M.; Carey, Lawrence D.

2017-09-01

While the majority of research only differentiates between intracloud (IC) and cloud-to-ground (CG) flashes, there exists a third flash type, known as hybrid flashes. These flashes have extensive IC components as well as return strokes to ground but are misclassified as CG flashes in current flash type analyses due to the presence of a return stroke. In an effort to show that IC, CG, and hybrid flashes should be separately classified, the two-sample Kolmogorov-Smirnov (KS) test was applied to the flash sizes, flash initiation, and flash propagation altitudes for each of the three flash types. The KS test statistically showed that IC, CG, and hybrid flashes do not have the same parent distributions and thus should be separately classified. Separate classification of hybrid flashes will lead to improved lightning-related research, because unambiguously classified hybrid flashes occur on the same order of magnitude as CG flashes for multicellular storms.

Nocturnal Hot Flashes: Relationship to Objective Awakenings and Sleep Stage Transitions

PubMed Central

Bianchi, Matt T.; Kim, Semmie; Galvan, Thania; White, David P.; Joffe, Hadine

2016-01-01

Study Objectives: While women report sleep interruption secondary to nighttime hot flashes, the sleep disrupting impact of nocturnal hot flashes (HF) is not well characterized. We utilized a model of induced HF to investigate the relationship of nighttime HF to sleep architecture and sleep-stage transitions. Methods: Twenty-eight healthy, premenopausal volunteers received the depot gonadotropin-releasing hormone agonist (GnRHa) leuprolide to rapidly induce menopause, manifesting with HF. Sleep disruption was measured on 2 polysomnograms conducted before and after 4–5 weeks on leuprolide, when HF had developed. Results: 165 HF episodes were recorded objectively during 48 sleep studies (mean 3.4 HF/night). After standardizing to sleep-stage time distribution, the majority of HF were recorded during wake (51.0%) and stage N1 (18.8%). Sixty-six percent of HF occurred within 5 minutes of an awakening, with 80% occurring just before or during the awakening. Objective HF were not associated with sleep disruption as measured by increased transitions to wake or N1, but self-reported nocturnal HF correlated with an increase from pre- to post-leuprolide in the rate of transitions to wake (p = 0.01), and to N1 (p = 0.008). Conclusions: By isolating the effect of HF on sleep in women without the confound of age-related sleep changes associated with natural menopause, this experimental model shows that HF arise most commonly during N1 and wake, typically preceding or occurring simultaneously with wake episodes. Perception of HF, but not objective HF, is linked to increased sleep-stage transitions, suggesting that sleep disruption increases awareness of and memory for nighttime HF events. Clinical Trial Registration: ClinicalTrials.gov Identifier: NCT01116401. Citation: Bianchi MT, Kim S, Galvan T, White DP, Joffe H. Nocturnal hot flashes: relationship to objective awakenings and sleep stage transitions. J Clin Sleep Med 2016;12(7):1003–1009. PMID:26951410

Time evolution of coherent structures in networks of Hindmarch Rose neurons

NASA Astrophysics Data System (ADS)

Mainieri, M. S.; Erichsen, R.; Brunnet, L. G.

2005-08-01

In the regime of partial synchronization, networks of diffusively coupled Hindmarch-Rose neurons show coherent structures developing in a region of the phase space which is wider than in the correspondent single neuron. Such structures are kept, without important changes, during several bursting periods. In this work, we study the time evolution of these structures and their dynamical stability under damage. This system may model the behavior of ensembles of neurons coupled through a bidirectional gap junction or, in a broader sense, it could also account for the molecular cascades present in the formation of flash and short time memory.

Moore's law realities for recording systems and memory storage components: HDD, tape, NAND, and optical

NASA Astrophysics Data System (ADS)

Fontana, Robert E.; Decad, Gary M.

2018-05-01

This paper describes trends in the storage technologies associated with Linear Tape Open (LTO) Tape cartridges, hard disk drives (HDD), and NAND Flash based storage devices including solid-state drives (SSD). This technology discussion centers on the relationship between cost/bit and bit density and, specifically on how the Moore's Law perception that areal density doubling and cost/bit halving every two years is no longer being achieved for storage based components. This observation and a Moore's Law Discussion are demonstrated with data from 9-year storage technology trends, assembled from publically available industry reporting sources.

Synchronizing Photography For High-Speed-Engine Research

NASA Technical Reports Server (NTRS)

Chun, K. S.

1989-01-01

Light flashes when shaft reaches predetermined angle. Synchronization system facilitates visualization of flow in high-speed internal-combustion engines. Designed for cinematography and holographic interferometry, system synchronizes camera and light source with predetermined rotational angle of engine shaft. 10-bit resolution of absolute optical shaft encoder adapted, and 2 to tenth power combinations of 10-bit binary data computed to corresponding angle values. Pre-computed angle values programmed into EPROM's (erasable programmable read-only memories) to use as angle lookup table. Resolves shaft angle to within 0.35 degree at rotational speeds up to 73,240 revolutions per minute.

A microcontroller-based implantable nerve stimulator used for rats.

PubMed

Sha, Hong; Zheng, Zheng; Wang, Yan; Ren, Chaoshi

2005-01-01

A microcontroller-based stimulator that can be flexible programmed after it has been implanted into a rat was studied. Programmability enables implanted stimulators to generate customized, complex protocols for experiments. After implantation, a coded light pulse train that contains information of specific identification will unlock a certain stimulator. If a command that changing the parameters is received, the microcontroller will update its flash memory after it affirms the commands. The whole size of it is only 1.6 cubic centimeters, and it can work for a month. The devices have been successfully used in animal behavior experiments, especially on rats.

UDCM Operating Procedure (Limited Functionality prototype)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Newell, Matthew R.

2016-06-14

The UDCM is a two channel low current measurement device designed to record sub-nano-amp to micro-amp currents from radiation detectors. The UDCM incorporates a Commercial-Off-The- Shelf (COTS) processor enabling both serial over USB as well as Ethernet communications. The instrument includes microSD and USB flash memory for data storage as well as a programmable High Voltage (HV) power supply for detector bias. The UDCM incorporates a unique TTL output feature first used in the LANL Current to Pulse Converter (CPC). Two SMA connectors on the UDCM provide TTL pulses at a frequency proportional to the input currents.

JTAG-based remote configuration of FPGAs over optical fibers

DOE PAGES

Deng, B.; Xu, H.; Liu, C.; ...

2015-01-28

In this study, a remote FPGA-configuration method based on JTAG extension over optical fibers is presented. The method takes advantage of commercial components and ready-to-use software such as iMPACT and does not require any hardware or software development. The method combines the advantages of the slow remote JTAG configuration and the fast local flash memory configuration. The method has been verified successfully and used in the Demonstrator of Liquid-Argon Trigger Digitization Board (LTDB) for the ATLAS liquid argon calorimeter Phase-I trigger upgrade. All components on the FPGA side are verified to meet the radiation tolerance requirements.

Remote direct memory access over datagrams

DOEpatents

Grant, Ryan Eric; Rashti, Mohammad Javad; Balaji, Pavan; Afsahi, Ahmad

2014-12-02

A communication stack for providing remote direct memory access (RDMA) over a datagram network is disclosed. The communication stack has a user level interface configured to accept datagram related input and communicate with an RDMA enabled network interface card (NIC) via an NIC driver. The communication stack also has an RDMA protocol layer configured to supply one or more data transfer primitives for the datagram related input of the user level. The communication stack further has a direct data placement (DDP) layer configured to transfer the datagram related input from a user storage to a transport layer based on the one or more data transfer primitives by way of a lower layer protocol (LLP) over the datagram network.

Apparatus and methods for memory using in-plane polarization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Junwei; Chang, Kai; Ji, Shuai-Hua

A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process ismore » non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.« less

Cartographic production for the Florida Shelf Habitat (FLaSH) map study: generation of surface grids, contours, and KMZ files

USGS Publications Warehouse

Robbins, Lisa L.; Hansen, Mark; Raabe, Ellen; Knorr, Paul O.; Browne, Joseph

2007-01-01

The Florida shelf represents a finite source of economic resources, including commercial and recreational fisheries, tourism, recreation, sand and gravel resources, phosphate, and freshwater reserves. Yet the basic information needed to locate resources, or to interpret and utilize existing data, comes from many sources, dates, and formats. A multi-agency effort is underway to coordinate and prioritize the compilation of suitable datasets for an integrated information system of Florida’s coastal and ocean resources. This report and the associated data files represent part of the effort to make data accessible and useable with computer-mapping systems, web-based technologies, and user-friendly visualization tools. Among the datasets compiled and developed are seafloor imagery, marine sediment data, and existing bathymetric data. A U.S. Geological Survey-sponsored workshop in January 2007 resulted in the establishment of mapping priorities for the state. Bathymetry was identified as a common priority among agencies and researchers. State-of-the-art computer-mapping techniques and data-processing tools were used to develop shelf-wide raster and vector data layers. Florida Shelf Habitat (FLaSH) Mapping Project (http://coastal.er.usgs.gov/flash) endeavors to locate available data, identify data gaps, synthesize existing information, and expand our understanding of geologic processes in our dynamic coastal and marine systems.

Design of an optimised readout architecture for phase-change probe memory using Ge2Sb2Te5 media

NASA Astrophysics Data System (ADS)

Wang, Lei; Wright, C. David; Aziz, Mustafa M.; Yang, Ci-Hui; Yang, Guo-Wei

2014-02-01

Phase-change probe memory has recently received considerable attention on its writing performance, while its readout performance is rarely evaluated. Therefore, a three-dimensional readout model has been developed for the first time to calculate the reading contrast by varying the electrical conductivities and the thickness of the capping and under layers as well as the thickness of the Ge2Sb2Te5 layer. It is found that a phase-change probe architecture, consisting of a 10 nm Ge2Sb2Te5 layer sandwiched by a 2 nm, 50 Ω-1 m-1 capping layer and a 40 nm, 5 × 106 Ω-1 m-1 under layer, has the capability of providing the optimal readout performance.

Self-accelerated development of salt karst during flash floods along the Dead Sea Coast, Israel

NASA Astrophysics Data System (ADS)

Avni, Yoav; Lensky, Nadav; Dente, Elad; Shviro, Maayan; Arav, Reuma; Gavrieli, Ittai; Yechieli, Yoseph; Abelson, Meir; Lutzky, Hallel; Filin, Sagi; Haviv, Itai; Baer, Gidon

2016-01-01

We document and analyze the rapid development of a real-time karst system within the subsurface salt layers of the Ze'elim Fan, Dead Sea, Israel by a multidisciplinary study that combines interferometric synthetic aperture radar and light detection and ranging measurements, sinkhole mapping, time-lapse camera monitoring, groundwater level measurements and chemical and isotopic analyses of surface runoff and groundwater. The >1 m/yr drop of Dead Sea water level and the subsequent change in the adjacent groundwater system since the 1960s resulted in flushing of the coastal aquifer by fresh groundwater, subsurface salt dissolution, gradual land subsidence and formation of sinkholes. Since 2010 this process accelerated dramatically as flash floods at the Ze'elim Fan were drained by newly formed sinkholes. During and immediately after these flood events the dissolution rates of the subsurface salt layer increased dramatically, the overlying ground surface subsided, a large number of sinkholes developed over short time periods (hours to days), and salt-saturated water resurged downstream. Groundwater flow velocities increased by more than 2 orders of magnitudes compared to previously measured velocities along the Dead Sea. The process is self-accelerating as salt dissolution enhances subsidence and sinkhole formation, which in turn increase the ponding areas of flood water and generate additional draining conduits to the subsurface. The rapid terrain response is predominantly due to the highly soluble salt. It is enhanced by the shallow depth of the salt layer, the low competence of the newly exposed unconsolidated overburden and the moderate topographic gradients of the Ze'elim Fan.

High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

NASA Astrophysics Data System (ADS)

Nedic, Stanko; Tea Chun, Young; Hong, Woong-Ki; Chu, Daping; Welland, Mark

2014-01-01

A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ˜16.5 V, a high drain current on/off ratio of ˜105, a gate leakage current below ˜300 pA, and excellent retention characteristics for over 104 s.

Computations in the deep vs superficial layers of the cerebral cortex.

PubMed

Rolls, Edmund T; Mills, W Patrick C

2017-11-01

A fundamental question is how the cerebral neocortex operates functionally, computationally. The cerebral neocortex with its superficial and deep layers and highly developed recurrent collateral systems that provide a basis for memory-related processing might perform somewhat different computations in the superficial and deep layers. Here we take into account the quantitative connectivity within and between laminae. Using integrate-and-fire neuronal network simulations that incorporate this connectivity, we first show that attractor networks implemented in the deep layers that are activated by the superficial layers could be partly independent in that the deep layers might have a different time course, which might because of adaptation be more transient and useful for outputs from the neocortex. In contrast the superficial layers could implement more prolonged firing, useful for slow learning and for short-term memory. Second, we show that a different type of computation could in principle be performed in the superficial and deep layers, by showing that the superficial layers could operate as a discrete attractor network useful for categorisation and feeding information forward up a cortical hierarchy, whereas the deep layers could operate as a continuous attractor network useful for providing a spatially and temporally smooth output to output systems in the brain. A key advance is that we draw attention to the functions of the recurrent collateral connections between cortical pyramidal cells, often omitted in canonical models of the neocortex, and address principles of operation of the neocortex by which the superficial and deep layers might be specialized for different types of attractor-related memory functions implemented by the recurrent collaterals. Copyright © 2017 Elsevier Inc. All rights reserved.

High-fluence Ga-implanted silicon—The effect of annealing and cover layers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fiedler, J., E-mail: jan.fiedler@hzdr.de; Heera, V.; Hübner, R.

2014-07-14

The influence of SiO{sub 2} and SiN{sub x} cover layers on the dopant distribution as well as microstructure of high fluence Ga implanted Si after thermal processing is investigated. The annealing temperature determines the layer microstructure and the cover layers influence the obtained Ga profile. Rapid thermal annealing at temperatures up to 750 °C leads to a polycrystalline layer structure containing amorphous Ga-rich precipitates. Already after a short 20 ms flash lamp annealing, a Ga-rich interface layer is observed for implantation through the cover layers. This effect can partly be suppressed by annealing temperatures of at least 900 °C. However, in this case,more » Ga accumulates in larger, cone-like precipitates without disturbing the surrounding Si lattice parameters. Such a Ga-rich crystalline Si phase does not exist in the equilibrium phase diagram according to which the Ga solubility in Si is less than 0.1 at. %. The Ga-rich areas are capped with SiO{sub x} grown during annealing which only can be avoided by the usage of SiN{sub x} cover layers.« less

Structure and properties of nitrided surface layer produced on NiTi shape memory alloy by low temperature plasma nitriding

NASA Astrophysics Data System (ADS)

Czarnowska, Elżbieta; Borowski, Tomasz; Sowińska, Agnieszka; Lelątko, Józef; Oleksiak, Justyna; Kamiński, Janusz; Tarnowski, Michał; Wierzchoń, Tadeusz

2015-04-01

NiTi shape memory alloys are used for bone and cardiological implants. However, on account of the metallosis effect, i.e. the release of the alloy elements into surrounding tissues, they are subjected to various surface treatment processes in order to improve their corrosion resistance and biocompatibility without influencing the required shape memory properties. In this paper, the microstructure, topography and morphology of TiN surface layer on NiTi alloy, and corrosion resistance, both before and after nitriding in low-temperature plasma at 290 °C, are presented. Examinations with the use of the potentiodynamic and electrochemical impedance spectroscopy methods were carried out and show an increase of corrosion resistance in Ringer's solution after glow-discharge nitriding. This surface titanium nitride layer also improved the adhesion of platelets and the proliferation of osteoblasts, which was investigated in in vitro experiments with human cells. Experimental data revealed that nitriding NiTi shape memory alloy under low-temperature plasma improves its properties for bone implant applications.

Environmental impoverishment and aging alter object recognition, spatial learning, and dentate gyrus astrocytes.

PubMed

Diniz, Daniel G; Foro, César A R; Rego, Carla M D; Gloria, David A; de Oliveira, Fabio R R; Paes, Juliana M P; de Sousa, Aline A; Tokuhashi, Tatyana P; Trindade, Lucas S; Turiel, Maíra C P; Vasconcelos, Erick G R; Torres, João B; Cunnigham, Colm; Perry, Victor H; Vasconcelos, Pedro F da Costa; Diniz, Cristovam W P

2010-08-01

Environmental and age-related effects on learning and memory were analysed and compared with changes observed in astrocyte laminar distribution in the dentate gyrus. Aged (20 months) and young (6 months) adult female albino Swiss mice were housed from weaning either in impoverished conditions or in enriched conditions, and tested for episodic-like and water maze spatial memories. After these behavioral tests, brain hippocampal sections were immunolabeled for glial fibrillary acid protein to identify astrocytes. The effects of environmental enrichment on episodic-like memory were not dependent on age, and may protect water maze spatial learning and memory from declines induced by aging or impoverished environment. In the dentate gyrus, the number of astrocytes increased with both aging and enriched environment in the molecular layer, increased only with aging in the polymorphic layer, and was unchanged in the granular layer. We suggest that long-term experience-induced glial plasticity by enriched environment may represent at least part of the circuitry groundwork for improvements in behavioral performance in the aged mice brain.

X-ray bursts: Observation versus theory

NASA Technical Reports Server (NTRS)

Lewin, W. H. G.

1981-01-01

Results of various observations of common type I X-ray bursts are discussed with respect to the theory of thermonuclear flashes in the surface layers of accreting neutron stars. Topics covered include burst profiles; irregular burst intervals; rise and decay times and the role of hydrogen; the accuracy of source distances; accuracy in radii determination; radius increase early in the burst; the super Eddington limit; temperatures at burst maximum; and the role of the magnetic field.

Are Categorical Spatial Relations Encoded by Shifting Visual Attention between Objects?

PubMed Central

Uttal, David; Franconeri, Steven

2016-01-01

Perceiving not just values, but relations between values, is critical to human cognition. We tested the predictions of a proposed mechanism for processing categorical spatial relations between two objects—the shift account of relation processing—which states that relations such as ‘above’ or ‘below’ are extracted by shifting visual attention upward or downward in space. If so, then shifts of attention should improve the representation of spatial relations, compared to a control condition of identity memory. Participants viewed a pair of briefly flashed objects and were then tested on either the relative spatial relation or identity of one of those objects. Using eye tracking to reveal participants’ voluntary shifts of attention over time, we found that when initial fixation was on neither object, relational memory showed an absolute advantage for the object following an attention shift, while identity memory showed no advantage for either object. This result is consistent with the shift account of relation processing. When initial fixation began on one of the objects, identity memory strongly benefited this fixated object, while relational memory only showed a relative benefit for objects following an attention shift. This result is also consistent, although not as uniquely, with the shift account of relation processing. Taken together, we suggest that the attention shift account provides a mechanistic explanation for the overall results. This account can potentially serve as the common mechanism underlying both linguistic and perceptual representations of spatial relations. PMID:27695104

Are Categorical Spatial Relations Encoded by Shifting Visual Attention between Objects?

PubMed

Yuan, Lei; Uttal, David; Franconeri, Steven

2016-01-01

Perceiving not just values, but relations between values, is critical to human cognition. We tested the predictions of a proposed mechanism for processing categorical spatial relations between two objects-the shift account of relation processing-which states that relations such as 'above' or 'below' are extracted by shifting visual attention upward or downward in space. If so, then shifts of attention should improve the representation of spatial relations, compared to a control condition of identity memory. Participants viewed a pair of briefly flashed objects and were then tested on either the relative spatial relation or identity of one of those objects. Using eye tracking to reveal participants' voluntary shifts of attention over time, we found that when initial fixation was on neither object, relational memory showed an absolute advantage for the object following an attention shift, while identity memory showed no advantage for either object. This result is consistent with the shift account of relation processing. When initial fixation began on one of the objects, identity memory strongly benefited this fixated object, while relational memory only showed a relative benefit for objects following an attention shift. This result is also consistent, although not as uniquely, with the shift account of relation processing. Taken together, we suggest that the attention shift account provides a mechanistic explanation for the overall results. This account can potentially serve as the common mechanism underlying both linguistic and perceptual representations of spatial relations.

Multibit data storage states formed in plasma-treated MoS₂ transistors.

PubMed

Chen, Mikai; Nam, Hongsuk; Wi, Sungjin; Priessnitz, Greg; Gunawan, Ivan Manuel; Liang, Xiaogan

2014-04-22

New multibit memory devices are desirable for improving data storage density and computing speed. Here, we report that multilayer MoS2 transistors, when treated with plasmas, can dramatically serve as low-cost, nonvolatile, highly durable memories with binary and multibit data storage capability. We have demonstrated binary and 2-bit/transistor (or 4-level) data states suitable for year-scale data storage applications as well as 3-bit/transistor (or 8-level) data states for day-scale data storage. This multibit memory capability is hypothesized to be attributed to plasma-induced doping and ripple of the top MoS2 layers in a transistor, which could form an ambipolar charge-trapping layer interfacing the underlying MoS2 channel. This structure could enable the nonvolatile retention of charged carriers as well as the reversible modulation of polarity and amount of the trapped charge, ultimately resulting in multilevel data states in memory transistors. Our Kelvin force microscopy results strongly support this hypothesis. In addition, our research suggests that the programming speed of such memories can be improved by using nanoscale-area plasma treatment. We anticipate that this work would provide important scientific insights for leveraging the unique structural property of atomically layered two-dimensional materials in nanoelectronic applications.

Forming-free resistive switching characteristics of Ag/CeO2/Pt devices with a large memory window

NASA Astrophysics Data System (ADS)

Zheng, Hong; Kim, Hyung Jun; Yang, Paul; Park, Jong-Sung; Kim, Dong Wook; Lee, Hyun Ho; Kang, Chi Jung; Yoon, Tae-Sik

2017-05-01

Ag/CeO2(∼45 nm)/Pt devices exhibited forming-free bipolar resistive switching with a large memory window (low-resistance-state (LRS)/high-resistance-state (HRS) ratio >106) at a low switching voltage (<±1 ∼ 2 V) in voltage sweep condition. Also, they retained a large memory window (>104) at a pulse operation (±5 V, 50 μs). The high oxygen ionic conductivity of the CeO2 layer as well as the migration of silver facilitated the formation of filament for the transition to LRS at a low voltage without a high voltage forming operation. Also, a certain amount of defects in the CeO2 layer was required for stable HRS with space-charge-limited-conduction, which was confirmed comparing the devices with non-annealed and annealed CeO2 layers.

Solving the integration problem of one transistor one memristor architecture with a Bi-layer IGZO film through synchronous process

NASA Astrophysics Data System (ADS)

Chang, Che-Chia; Liu, Po-Tsun; Chien, Chen-Yu; Fan, Yang-Shun

2018-04-01

This study demonstrates the integration of a thin film transistor (TFT) and resistive random-access memory (RRAM) to form a one-transistor-one-resistor (1T1R) configuration. With the concept of the current conducting direction in RRAM and TFT, a triple-layer stack design of Pt/InGaZnO/Al2O3 is proposed for both the switching layer of RRAM and the channel layer of TFT. This proposal decreases the complexity of fabrication and the numbers of photomasks required. Also, the robust endurance and stable retention characteristics are exhibited by the 1T1R architecture for promising applications in memory-embedded flat panel displays.

Mg concentration profile and its control in the low temperature grown Mg-doped GaN epilayer

NASA Astrophysics Data System (ADS)

Liu, S. T.; Yang, J.; Zhao, D. G.; Jiang, D. S.; Liang, F.; Chen, P.; Zhu, J. J.; Liu, Z. S.; Liu, W.; Xing, Y.; Zhang, L. Q.; Wang, W. J.; Li, M.; Zhang, Y. T.; Du, G. T.

2018-01-01

In this work, the Cp2Mg flux and growth pressure influence to Mg doping concentration and depth profiles is studied. From the SIMS measurement we found that a transition layer exists at the bottom region of the layer in which the Mg doping concentration changes gradually. The thickness of transition layer decreases with the increases of Mg doping concentration. Through analysis, we found that this is caused by Ga memory effect which the Ga atoms stay residual in MOCVD system will react with Mg source, leading a transition layer formation and improve the growth rate. And the Ga memory effect can be well suppressed by increasing Mg doping concentration and growth pressure and thus get a steep Mg doping at the bottom region of p type layer.

Giant tunnelling electroresistance in metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier

PubMed Central

Xi, Zhongnan; Ruan, Jieji; Li, Chen; Zheng, Chunyan; Wen, Zheng; Dai, Jiyan; Li, Aidong; Wu, Di

2017-01-01

Recently, ferroelectric tunnel junctions have attracted much attention due to their potential applications in non-destructive readout non-volatile memories. Using a semiconductor electrode has been proven effective to enhance the tunnelling electroresistance in ferroelectric tunnel junctions. Here we report a systematic investigation on electroresistance of Pt/BaTiO3/Nb:SrTiO3 metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier on Nb:SrTiO3 surface via varying BaTiO3 thickness and Nb doping concentration. The optimum ON/OFF ratio as great as 6.0 × 106, comparable to that of commercial Flash memories, is achieved in a device with 0.1 wt% Nb concentration and a 4-unit-cell-thick BaTiO3 barrier. With this thinnest BaTiO3 barrier, which shows a negligible resistance to the tunnelling current but is still ferroelectric, the device is reduced to a polarization-modulated metal/semiconductor Schottky junction that exhibits a more efficient control on the tunnelling resistance to produce the giant electroresistance observed. These results may facilitate the design of high performance non-volatile resistive memories. PMID:28513590

Giant tunnelling electroresistance in metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier

NASA Astrophysics Data System (ADS)

Xi, Zhongnan; Ruan, Jieji; Li, Chen; Zheng, Chunyan; Wen, Zheng; Dai, Jiyan; Li, Aidong; Wu, Di

2017-05-01

Recently, ferroelectric tunnel junctions have attracted much attention due to their potential applications in non-destructive readout non-volatile memories. Using a semiconductor electrode has been proven effective to enhance the tunnelling electroresistance in ferroelectric tunnel junctions. Here we report a systematic investigation on electroresistance of Pt/BaTiO3/Nb:SrTiO3 metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier on Nb:SrTiO3 surface via varying BaTiO3 thickness and Nb doping concentration. The optimum ON/OFF ratio as great as 6.0 × 106, comparable to that of commercial Flash memories, is achieved in a device with 0.1 wt% Nb concentration and a 4-unit-cell-thick BaTiO3 barrier. With this thinnest BaTiO3 barrier, which shows a negligible resistance to the tunnelling current but is still ferroelectric, the device is reduced to a polarization-modulated metal/semiconductor Schottky junction that exhibits a more efficient control on the tunnelling resistance to produce the giant electroresistance observed. These results may facilitate the design of high performance non-volatile resistive memories.

NASA's 3D Flight Computer for Space Applications

NASA Technical Reports Server (NTRS)

Alkalai, Leon

2000-01-01

The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

Measuring hot flash phenomenonology using ambulatory prospective digital diaries

PubMed Central

Fisher, William I.; Thurston, Rebecca C.

2016-01-01

Objective This study provides the description, protocol, and results from a novel prospective ambulatory digital hot flash phenomenon diary. Methods This study included 152 midlife women with daily hot flashes who completed an ambulatory electronic hot flash diary continuously for the waking hours of 3 consecutive days. In this diary, women recorded their hot flashes and accompanying characteristics and associations as the hot flashes occurred. Results Self-reported hot flash severity on the digital diaries indicated that the majority of hot flashes were rated as mild (41.3%) or moderate (43.7%). Severe (13.1%) and very severe (1.8%) hot flashes were less common. Hot flash bother ratings were rated as mild (43%), or moderate (33.5%), with fewer hot flashes reported bothersome (17.5%) or very bothersome (6%). The majority of hot flashes were reported as occurring on the on the face (78.9%), neck (74.7%), and chest (61.3%). Prickly skin was reported concurrently with 32% of hot flashes, 7% with anxiety and 5% with nausea. A novel finding, 38% of hot flashes were accompanied by a premonitory aura. Conclusion A prospective electronic digital hot flash diary allows for a more precise quantitation of hot flashes while overcoming many of the limitations of commonly employed retrospective questionnaires and paper diaries. Unique insights into the phenomenology, loci and associated characteristics of hot flashes were obtained using this device. The digital hot flash phenomenology diary is recommended for future ambulatory studies of hot flashes as a prospective measure of the hot flash experience. PMID:27404030

Measuring hot flash phenomenonology using ambulatory prospective digital diaries.

PubMed

Fisher, William I; Thurston, Rebecca C

2016-11-01

This study provides the description, protocol, and results from a novel prospective ambulatory digital hot flash phenomenon diary. This study included 152 midlife women with daily hot flashes who completed an ambulatory electronic hot flash diary continuously for the waking hours of three consecutive days. In this diary, women recorded their hot flashes and accompanying characteristics and associations as the hot flashes occurred. Self-reported hot flash severity on the digital diaries indicated that the majority of hot flashes were rated as mild (41.3%) or moderate (43.7%). Severe (13.1%) and very severe (1.8%) hot flashes were less common. Hot flash bother ratings were rated as mild (43%), or moderate (33.5%), with fewer hot flashes reported bothersome (17.5%) or very bothersome (6%). The majority of hot flashes were reported as occurring on the face (78.9%), neck (74.7%), and chest (61.3%). Of all reported hot flashes, 32% occurred concurrently with prickly skin, 7% with anxiety, and 5% with nausea. A novel finding from the study was that 38% of hot flashes were accompanied by a premonitory aura. A prospective electronic digital hot flash diary allows for a more precise quantitation of hot flashes while overcoming many of the limitations of commonly used retrospective questionnaires and paper diaries. Unique insights into the phenomenology, loci, and associated characteristics of hot flashes were obtained using this device. The digital hot flash phenomenology diary is recommended for future ambulatory studies of hot flashes as a prospective measure of the hot flash experience.

Neural Network Model For Fast Learning And Retrieval

NASA Astrophysics Data System (ADS)

Arsenault, Henri H.; Macukow, Bohdan

1989-05-01

An approach to learning in a multilayer neural network is presented. The proposed network learns by creating interconnections between the input layer and the intermediate layer. In one of the new storage prescriptions proposed, interconnections are excitatory (positive) only and the weights depend on the stored patterns. In the intermediate layer each mother cell is responsible for one stored pattern. Mutually interconnected neurons in the intermediate layer perform a winner-take-all operation, taking into account correlations between stored vectors. The performance of networks using this interconnection prescription is compared with two previously proposed schemes, one using inhibitory connections at the output and one using all-or-nothing interconnections. The network can be used as a content-addressable memory or as a symbolic substitution system that yields an arbitrarily defined output for any input. The training of a model to perform Boolean logical operations is also described. Computer simulations using the network as an autoassociative content-addressable memory show the model to be efficient. Content-addressable associative memories and neural logic modules can be combined to perform logic operations on highly corrupted data.

Modeling midwave infrared muzzle flash spectra from unsuppressed and flash-suppressed large caliber munitions

NASA Astrophysics Data System (ADS)

Steward, Bryan J.; Perram, Glen P.; Gross, Kevin C.

2012-07-01

Time-resolved infrared spectra of firings from a 152 mm howitzer were acquired over an 1800-6000 cm-1 spectral range using a Fourier-transform spectrometer. The instrument collected primarily at 32 cm-1 spectral and 100 Hz temporal resolutions. Munitions included unsuppressed and chemically flash suppressed propellants. Secondary combustion occurred with unsuppressed propellants resulting in flash emissions lasting ˜100 ms and dominated by H2O and CO2 spectral structure. Non-combusting plume emissions were one-tenth as intense and approached background levels within 20-40 ms. A low-dimensional phenomenological model was used to reduce the data to temperatures, soot absorbances, and column densities of H2O, CO2, CH4, and CO. The combusting plumes exhibit peak temperatures of ˜1400 K, areas of greater than 32 m2, low soot emissivity of ˜0.04, with nearly all the CO converted to CO2. The non-combusting plumes exhibit lower temperatures of ˜1000 K, areas of ˜5 m2, soot emissivity of greater than 0.38 and CO as the primary product. Maximum fit residual relative to peak intensity are 14% and 8.9% for combusting and non-combusting plumes, respectively. The model was generalized to account for turbulence-induced variations in the muzzle plumes. Distributions of temperature and concentration in 1-2 spatial regions demonstrate a reduction in maximum residuals by 40%. A two-region model of combusting plumes provides a plausible interpretation as a ˜1550 K, optically thick plume core and ˜2550 K, thin, surface-layer flame-front. Temperature rate of change was used to characterize timescales and energy release for plume emissions. Heat of combustion was estimated to be ˜5 MJ/kg.

Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

NASA Astrophysics Data System (ADS)

Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

2007-04-01

Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

A Strategy to Design High-Density Nanoscale Devices utilizing Vapor Deposition of Metal Halide Perovskite Materials.

PubMed

Hwang, Bohee; Lee, Jang-Sik

2017-08-01

The demand for high memory density has increased due to increasing needs of information storage, such as big data processing and the Internet of Things. Organic-inorganic perovskite materials that show nonvolatile resistive switching memory properties have potential applications as the resistive switching layer for next-generation memory devices, but, for practical applications, these materials should be utilized in high-density data-storage devices. Here, nanoscale memory devices are fabricated by sequential vapor deposition of organolead halide perovskite (OHP) CH 3 NH 3 PbI 3 layers on wafers perforated with 250 nm via-holes. These devices have bipolar resistive switching properties, and show low-voltage operation, fast switching speed (200 ns), good endurance, and data-retention time >10 5 s. Moreover, the use of sequential vapor deposition is extended to deposit CH 3 NH 3 PbI 3 as the memory element in a cross-point array structure. This method to fabricate high-density memory devices could be used for memory cells that occupy large areas, and to overcome the scaling limit of existing methods; it also presents a way to use OHPs to increase memory storage capacity. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-01-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-09-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Enriched environment increases neurogenesis and improves social memory persistence in socially isolated adult mice.

PubMed

Monteiro, Brisa M M; Moreira, Fabrício A; Massensini, André R; Moraes, Márcio F D; Pereira, Grace S

2014-02-01

Social memory consists of the information necessary to identify and recognize cospecifics and is essential to many forms of social interaction. Social memory persistence is strongly modulated by the animal's experiences. We have shown in previous studies that social isolation (SI) in adulthood impairs social memory persistence and that an enriched environment (EE) prevents this impairment. However, the mechanisms involved in the effects of SI and EE on social memory persistence remain unknown. We hypothesized that the mechanism by which SI and EE affect social memory persistence is through their modulation of neurogenesis. To investigate this hypothesis, adult mice were submitted to 7 days of one of the following conditions: group-housing in a standard (GH) or enriched environment (GH+EE); social isolation in standard (SI) or enriched environment (SI+EE). We observed an increase in the number of newborn neurons in the dentate gyrus of the hippocampus (DG) and glomerular layer of the olfactory bulb (OB) in both GH+EE and SI+EE mice. However, this increase of newborn neurons in the granule cell layer of the OB was restricted to the GH+EE group. Furthermore, both SI and SI+EE groups showed less neurogenesis in the mitral layer of the OB. Interestingly, the performance of the SI mice in the buried food-finding task was inferior to that of the GH mice. To further analyze whether increased neurogenesis is in fact the mechanism by which the EE improves social memory persistence in SI mice, we administered the mitotic inhibitor AraC or saline directly into the lateral ventricles of the SI+EE mice. We found that the AraC treatment decreased cell proliferation in both the DG and OB, and impaired social memory persistence in the SI+EE mice. Taken together, our results strongly suggest that neurogenesis is what supports social memory persistence in socially isolated mice. © 2013 Wiley Periodicals, Inc.

Monolayer optical memory cells based on artificial trap-mediated charge storage and release

NASA Astrophysics Data System (ADS)

Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min

2017-03-01

Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.

Unexpected surface implanted layer in static random access memory devices observed by microwave impedance microscope

NASA Astrophysics Data System (ADS)

Kundhikanjana, W.; Yang, Y.; Tanga, Q.; Zhang, K.; Lai, K.; Ma, Y.; Kelly, M. A.; Li, X. X.; Shen, Z.-X.

2013-02-01

Real-space mapping of doping concentration in semiconductor devices is of great importance for the microelectronics industry. In this work, a scanning microwave impedance microscope (MIM) is employed to resolve the local conductivity distribution of a static random access memory sample. The MIM electronics can also be adjusted to the scanning capacitance microscopy (SCM) mode, allowing both measurements on the same region. Interestingly, while the conventional SCM images match the nominal device structure, the MIM results display certain unexpected features, which originate from a thin layer of the dopant ions penetrating through the protective layers during the heavy implantation steps.

The effect of different oxygen exchange layers on TaO x based RRAM devices

NASA Astrophysics Data System (ADS)

Alamgir, Zahiruddin; Holt, Joshua; Beckmann, Karsten; Cady, Nathaniel C.

2018-01-01

In this work, we investigated the effect of the oxygen exchange layer (OEL) on the resistive switching properties of TaO x based memory cells. It was found that the forming voltage, SET-RESET voltage, R off, R on and retention properties are strongly correlated with the oxygen scavenging ability of the OEL, and the resulting oxygen vacancy formation ability of this layer. Higher forming voltage was observed for OELs having lower electronegativity/lower Gibbs free energy for oxide formation, and devices fabricated with these OELs exhibited an increased memory window, when using similar SET-RESET voltage range.

Structure and functional properties of TiNiZr surface layers obtained by high-velocity oxygen fuel spraying

NASA Astrophysics Data System (ADS)

Rusinov, P. O.; Blednova, Zh M.; Borovets, O. I.

2017-05-01

The authors studied a complex method of surface modification of steels for materials with shape memory effect (SME) Ti-Ni-Zr with a high-velocity oxygen-fuel spraying (HVOF) of mechanically activated (MA) powder in a protective medium. We assessed the functional properties and X-ray diffraction studies, which showed that the formation of surface layers according to the developed technology ensures the manifestation of the shape memory effect.

Shape memory effect in nanosized Ti2NiCu alloy-based composites

NASA Astrophysics Data System (ADS)

Irzhak, A. V.; Lega, P. V.; Zhikharev, A. M.; Koledov, V. V.; Orlov, A. P.; Kuchin, D. S.; Tabachkova, N. Yu.; Dikan, V. A.; Shelyakov, A. V.; Beresin, M. Yu.; Pushin, V. G.; von Gratowski, S. V.; Pokrovskiy, V. Ya.; Zybtsev, S. G.; Shavrov, V. G.

2017-01-01

The shape memory effect (SME) in alloys with a thermoelastic martensite transition opens unique opportunities for the creation of miniature mechanical devices. The SME has been studied in layered composite microstructures consisting of a Ti2NiCu alloy and platinum. It occurs upon a decrease in the active layer thickness at least to 80 nm. Some physical and technological restrictions on the minimum size of a material with SME are discussed.

Materials and other needs for advanced phase change memory (Presentation Recording)

NASA Astrophysics Data System (ADS)

Sosa, Norma E.

2015-09-01

Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

Daily Physical Activity and Hot Flashes in the Study of Women's Health Across the Nation FLASHES Study

PubMed Central

Gibson, Carolyn; Matthews, Karen; Thurston, Rebecca

2014-01-01

Objective To examine the role of physical activity in menopausal hot flashes. Competing models conceptualize physical activity as a risk or protective factor for hot flashes. Few studies have examined this relationship prospectively using physiologic measures of hot flashes and physical activity. Design Over two 48 hour-periods, 51 participants wore a physiologic hot flash monitor and activity monitor, and reported their hot flashes in an electronic diary. Physiologic hot flashes, reported hot flashes and reported hot flashes without physiological corroboration were related to activity changes using hierarchical generalized linear modeling, adjusting for potential confounders. Setting Community. Patients Midlife women. Interventions None. Main Outcome Measures Physiologically-detected hot flashes and reported hot flashes with and without physiologic corroboration. Results Hot flash reports without physiologic corroboration were more likely after activity increases (OR 1.04, 95% CI: 1.00-1.10, p=.01), particularly among women with higher levels of depressive symptoms (interaction p=.02). No other types of hot flashes were related to physical activity. Conclusion Acute increases in physical activity were associated with increased reporting of hot flashes lacking physiologic corroboration, particularly among women with depressive symptoms. Clinicians should consider the role of symptom perception and reporting in relations between physical activity and hot flashes. PMID:24491454