Top coat or no top coat for immersion lithography?

NASA Astrophysics Data System (ADS)

Stepanenko, N.; Kim, Hyun-Woo; Kishimura, S.; Van Den Heuvel, D.; Vandenbroeck, N.; Kocsis, M.; Foubert, P.; Maenhoudt, M.; Ercken, M.; Van Roey, F.; Gronheid, R.; Pollentier, I.; Vangoidsenhoven, D.; Delvaux, C.; Baerts, C.; O'Brien, S.; Fyen, W.; Wells, G.

2006-03-01

Since the moment immersion lithography appeared in the roadmaps of IC manufacturers, the question whether to use top coats has become one of the important topics for discussions. The top coats used in immersion lithography have proved to serve as good protectors from leaching of the resist components (PAGs, bases) into the water. However their application complicates the process and may lead to two side effects. First, top coats can affect the process window and resist profile depending on the material's refractive index, thickness, acidity, chemical interaction with the resist and the soaking time. Second, the top coat application may increase the total amount of defects on the wafer. Having an immersion resist which could work without the top coat would be a preferable solution. Still, it is quite challenging to make such a resist as direct water/resist interaction may also result in process window changes, CD variations, generation of additional defects. We have performed a systematic evaluation of a large number of immersion resist and top coat combinations, using the ASML XT:1250Di scanner at IMEC. The samples for the experiments were provided by all the leading resist and top coat suppliers. Particular attention was paid to how the resist and top coat materials from different vendors interacted with each other. Among the factors which could influence the total amount of defects or CD variations on the wafer were: the material's dynamic contact angle and its interaction with the scanner stage speed, top coat thickness and intermixing layer formation, water uptake and leaching. We have examined the importance of all mentioned factors, using such analytical techniques as Resist Development Analyser (RDA), Quartz Crystal Microbalance (QCM), Mass Spectroscopy (MS) and scatterometry. We have also evaluated the influence of the pre- and pos- exposure rinse processes on the defectivity. In this paper we will present the data on imaging and defectivity performance of the resists with and without the use of top coats. So far we can conclude that top coat/resist approach used in immersion lithography needs some more improvements (i.e. process, materials properties) in order to be implemented in high volume manufacturing.

Single-expose patterning development for EUV lithography

NASA Astrophysics Data System (ADS)

De Silva, Anuja; Petrillo, Karen; Meli, Luciana; Shearer, Jeffrey C.; Beique, Genevieve; Sun, Lei; Seshadri, Indira; Oh, Taehwan; Han, Seulgi; Saulnier, Nicole; Lee, Joe; Arnold, John C.; Hamieh, Bassem; Felix, Nelson M.; Furukawa, Tsuyoshi; Singh, Lovejeet; Ayothi, Ramakrishnan

2017-03-01

Initial readiness of EUV (extreme ultraviolet) patterning was demonstrated in 2016 with IBM Alliance's 7nm device technology. The focus has now shifted to driving the 'effective' k1 factor and enabling the second generation of EUV patterning. With the substantial cost of EUV exposure there is significant interest in extending the capability to do single exposure patterning with EUV. To enable this, emphasis must be placed on the aspect ratios, adhesion, defectivity reduction, etch selectivity, and imaging control of the whole patterning process. Innovations in resist materials and processes must be included to realize the full entitlement of EUV lithography at 0.33NA. In addition, enhancements in the patterning process to enable good defectivity, lithographic process window, and post etch pattern fidelity are also required. Through this work, the fundamental material challenges in driving down the effective k1 factor will be highlighted.

UDOF direct improvement by modulating mask absorber thickness

NASA Astrophysics Data System (ADS)

Yu, Tuan-Yen; Lio, En Chuan; Chen, Po Tsang; Wei, Chih I.; Chen, Yi Ting; Peng, Ming Chun; Chou, William; Yu, Chun Chi

2016-10-01

As the process generation migrate to advanced and smaller dimension or pitch, the mask and resist 3D effects will impact the lithography focus common window severely because of both individual depth-of-focus (iDOF) range decrease and center mismatch. Furthermore, some chemical or thermal factors, such as PEB (Post Exposure Bake) also worsen the usable depth-of-focus (uDOF) performance. So the mismatch of thru-pitch iDOF center should be considered as a lithography process integration issue, and more complicated to partition the 3D effects induced by optical or chemical factors. In order to reduce the impact of 3D effects induced by both optical and chemical issues, and improve iDOF center mismatch, we would like to propose a mask absorber thickness offset approach, which is directly to compensate the iDOF center bias by adjusting mask absorber thickness, for iso, semi-iso or dense characteristics in line, space or via patterns to enlarge common process window, i.e uDOF, which intends to provide similar application as Flexwave[1] (ASML trademark). By the way, since mask absorber thickness offset approach is similar to focus tuning or change on wafer lithography process, it could be acted as the process tuning method of photoresist (PR) profile optimization locally, PR scum improvement in specific patterns or to modulate etching bias to meet process integration request. For mass production consideration, and available material, current att-PSM blank, quartz, MoSi with chrome layer as hard-mask in reticle process, will be implemented in this experiment, i.e. chrome will be kept remaining above partial thru-pitch patterns, and act as the absorber thickness bias in different patterns. And then, from the best focus offset of thru-pitch patterns, the iDOF center shifts could be directly corrected and to enlarge uDOF by increasing the overlap of iDOF. Finally, some negative tone development (NTD) result in line patterns will be demonstrated as well.

Expanding the printable design space for lithography processes utilizing a cut mask

NASA Astrophysics Data System (ADS)

Wandell, Jerome; Salama, Mohamed; Wilkinson, William; Curtice, Mark; Feng, Jui-Hsuan; Gao, Shao Wen; Asthana, Abhishek

2016-03-01

The utilization of a cut-mask in semiconductor patterning processes has been in practice for logic devices since the inception of 32nm-node devices, notably with unidirectional gate level printing. However, the microprocessor applications where cut-mask patterning methods are used are expanding as Self-Aligned Double Patterning (SADP) processes become mainstream for 22/14nm fin diffusion, and sub-14nm metal levels. One common weakness for these types of lithography processes is that the initial pattern requiring the follow-up cut-mask typically uses an extreme off-axis imaging source such as dipole to enhance the resolution and line-width roughness (LWR) for critical dense patterns. This source condition suffers from poor process margin in the semi-dense (forbidden pitch) realm and wrong-way directional design spaces. Common pattern failures in these limited design regions include bridging and extra-printing defects that are difficult to resolve with traditional mask improvement means. This forces the device maker to limit the allowable geometries that a designer may use on a device layer. This paper will demonstrate methods to expand the usable design space on dipole-like processes such as unidirectional gate and SADP processes by utilizing the follow-up cut mask to improve the process window. Traditional mask enhancement means for improving the process window in this design realm will be compared to this new cut-mask approach. The unique advantages and disadvantages of the cut-mask solution will be discussed in contrast to those customary methods.

Matching OPC and masks on 300-mm lithography tools utilizing variable illumination settings

NASA Astrophysics Data System (ADS)

Palitzsch, Katrin; Kubis, Michael; Schroeder, Uwe P.; Schumacher, Karl; Frangen, Andreas

2004-05-01

CD control is crucial to maximize product yields on 300mm wafers. This is particularly true for DRAM frontend lithography layers, like gate level, and deep trench (capacitor) level. In the DRAM process, large areas of the chip are taken up by array structures, which are difficult to structure due to aggressive pitch requirements. Consequently, the lithography process is centered such that the array structures are printed on target. Optical proximity correction is applied to print gate level structures in the periphery circuitry on target. Only slight differences of the different Zernike terms can cause rather large variations of the proximity curves, resulting in a difference of isolated and semi-isolated lines printed on different tools. If the deviations are too large, tool specific OPC is needed. The same is true for deep trench level, where the length to width ratio of elongated contact-like structures is an important parameter to adjust the electrical properties of the chip. Again, masks with specific biases for tools with different Zernikes are needed to optimize product yield. Additionally, mask making contributes to the CD variation of the process. Theoretically, the CD deviation caused by an off-centered mask process can easily eat up the majority of the CD budget of a lithography process. In practice, masks are very often distributed intelligently among production tools, such that lens and mask effects cancel each other. However, only dose adjusting and mask allocation may still result in a high CD variation with large systematical contributions. By adjusting the illumination settings, we have successfully implemented a method to reduce CD variation on our advanced processes. Especially inner and outer sigma for annular illumination, and the numerical aperture, can be optimized to match mask and stepper properties. This process will be shown to overcome slight lens and mask differences effectively. The effects on lithography process windows have to be considered, nonetheless.

28nm node process optimization: a lithography centric view

NASA Astrophysics Data System (ADS)

Seltmann, Rolf

2014-10-01

Many experts claim that the 28nm technology node will be the most cost effective technology node forever. This results from primarily from the cost of manufacturing due to the fact that 28nm is the last true Single Patterning (SP) node. It is also affected by the dramatic increase of design costs and the limited shrink factor of the next following nodes. Thus, it is assumed that this technology still will be alive still for many years. To be cost competitive, high yields are mandatory. Meanwhile, leading edge foundries have optimized the yield of the 28nm node to such a level that that it is nearly exclusively defined by random defectivity. However, it was a long way to go to come to that level. In my talk I will concentrate on the contribution of lithography to this yield learning curve. I will choose a critical metal patterning application. I will show what was needed to optimize the process window to a level beyond the usual OPC model work that was common on previous nodes. Reducing the process (in particular focus) variability is a complementary need. It will be shown which improvements were needed in tooling, process control and design-mask-wafer interaction to remove all systematic yield detractors. Over the last couple of years new scanner platforms were introduced that were targeted for both better productivity and better parametric performance. But this was not a clear run-path. It needed some extra affords of the tool suppliers together with the Fab to bring the tool variability down to the necessary level. Another important topic to reduce variability is the interaction of wafer none-planarity and lithography optimization. Having an accurate knowledge of within die topography is essential for optimum patterning. By completing both the variability reduction work and the process window enhancement work we were able to transfer the original marginal process budget to a robust positive budget and thus ensuring high yield and low costs.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2005-01-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we present a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2004-10-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However, AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we report a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

Design optimization of highly asymmetrical layouts by 2D contour metrology

NASA Astrophysics Data System (ADS)

Hu, C. M.; Lo, Fred; Yang, Elvis; Yang, T. H.; Chen, K. C.

2018-03-01

As design pitch shrinks to the resolution limit of up-to-date optical lithography technology, the Critical Dimension (CD) variation tolerance has been dramatically decreased for ensuring the functionality of device. One of critical challenges associates with the narrower CD tolerance for whole chip area is the proximity effect control on asymmetrical layout environments. To fulfill the tight CD control of complex features, the Critical Dimension Scanning Electron Microscope (CD-SEM) based measurement results for qualifying process window and establishing the Optical Proximity Correction (OPC) model become insufficient, thus 2D contour extraction technique [1-5] has been an increasingly important approach for complementing the insufficiencies of traditional CD measurement algorithm. To alleviate the long cycle time and high cost penalties for product verification, manufacturing requirements are better to be well handled at design stage to improve the quality and yield of ICs. In this work, in-house 2D contour extraction platform was established for layout design optimization of 39nm half-pitch Self-Aligned Double Patterning (SADP) process layer. Combining with the adoption of Process Variation Band Index (PVBI), the contour extraction platform enables layout optimization speedup as comparing to traditional methods. The capabilities of identifying and handling lithography hotspots in complex layout environments of 2D contour extraction platform allow process window aware layout optimization to meet the manufacturing requirements.

Joint optimization of source, mask, and pupil in optical lithography

NASA Astrophysics Data System (ADS)

Li, Jia; Lam, Edmund Y.

2014-03-01

Mask topography effects need to be taken into consideration for more advanced resolution enhancement techniques in optical lithography. However, rigorous 3D mask model achieves high accuracy at a large computational cost. This work develops a combined source, mask and pupil optimization (SMPO) approach by taking advantage of the fact that pupil phase manipulation is capable of partially compensating for mask topography effects. We first design the pupil wavefront function by incorporating primary and secondary spherical aberration through the coefficients of the Zernike polynomials, and achieve optimal source-mask pair under the condition of aberrated pupil. Evaluations against conventional source mask optimization (SMO) without incorporating pupil aberrations show that SMPO provides improved performance in terms of pattern fidelity and process window sizes.

ILT optimization of EUV masks for sub-7nm lithography

NASA Astrophysics Data System (ADS)

Hooker, Kevin; Kuechler, Bernd; Kazarian, Aram; Xiao, Guangming; Lucas, Kevin

2017-06-01

The 5nm and 7nm technology nodes will continue recent scaling trends and will deliver significantly smaller minimum features, standard cell areas and SRAM cell areas vs. the 10nm node. There are tremendous economic pressures to shrink each subsequent technology, though in a cost-effective and performance enhancing manner. IC manufacturers are eagerly awaiting EUV so that they can more aggressively shrink their technology than they could by using complicated MPT. The current 0.33NA EUV tools and processes also have their patterning limitations. EUV scanner lenses, scanner sources, masks and resists are all relatively immature compared to the current lithography manufacturing baseline of 193i. For example, lens aberrations are currently several times larger (as a function of wavelength) in EUV scanners than for 193i scanners. Robustly patterning 16nm L/S fully random logic metal patterns and 40nm pitch random logic rectangular contacts with 0.33NA EUV are tough challenges that will benefit from advanced OPC/RET. For example, if an IC manufacturer can push single exposure device layer resolution 10% tighter using improved ILT to avoid using DPT, there will be a significant cost and process complexity benefit to doing so. ILT is well known to have considerable benefits in finding flexible 193i mask pattern solutions to improve process window, improve 2D CD control, improve resolution in low K1 lithography regime and help to delay the introduction of DPT. However, ILT has not previously been applied to EUV lithography. In this paper, we report on new developments which extend ILT method to EUV lithography and we characterize the benefits seen vs. traditional EUV OPC/RET methods.

Integrated model-based retargeting and optical proximity correction

NASA Astrophysics Data System (ADS)

Agarwal, Kanak B.; Banerjee, Shayak

2011-04-01

Conventional resolution enhancement techniques (RET) are becoming increasingly inadequate at addressing the challenges of subwavelength lithography. In particular, features show high sensitivity to process variation in low-k1 lithography. Process variation aware RETs such as process-window OPC are becoming increasingly important to guarantee high lithographic yield, but such techniques suffer from high runtime impact. An alternative to PWOPC is to perform retargeting, which is a rule-assisted modification of target layout shapes to improve their process window. However, rule-based retargeting is not a scalable technique since rules cannot cover the entire search space of two-dimensional shape configurations, especially with technology scaling. In this paper, we propose to integrate the processes of retargeting and optical proximity correction (OPC). We utilize the normalized image log slope (NILS) metric, which is available at no extra computational cost during OPC. We use NILS to guide dynamic target modification between iterations of OPC. We utilize the NILS tagging capabilities of Calibre TCL scripting to identify fragments with low NILS. We then perform NILS binning to assign different magnitude of retargeting to different NILS bins. NILS is determined both for width, to identify regions of pinching, and space, to locate regions of potential bridging. We develop an integrated flow for 1x metal lines (M1) which exhibits lesser lithographic hotspots compared to a flow with just OPC and no retargeting. We also observe cases where hotspots that existed in the rule-based retargeting flow are fixed using our methodology. We finally also demonstrate that such a retargeting methodology does not significantly alter design properties by electrically simulating a latch layout before and after retargeting. We observe less than 1% impact on latch Clk-Q and D-Q delays post-retargeting, which makes this methodology an attractive one for use in improving shape process windows without perturbing designed values.

Mix & match electron beam & scanning probe lithography for high throughput sub-10 nm lithography

NASA Astrophysics Data System (ADS)

Kaestner, Marcus; Hofer, Manuel; Rangelow, Ivo W.

2013-03-01

The prosperous demonstration of a technique able to produce features with single nanometer (SN) resolution could guide the semiconductor industry into the desired beyond CMOS era. In the lithographic community immense efforts are being made to develop extreme ultra-violet lithography (EUVL) and multiple-e-beam direct-write systems as possible successor for next generation lithography (NGL). However, patterning below 20 nm resolution and sub-10 nm overlay alignment accuracy becomes an extremely challenging quest. Herein, the combination of electron beam lithography (EBL) or EUVL with the outstanding capabilities of closed-loop scanning proximal probe nanolithography (SPL) reveals a promising way to improve both patterning resolution and reproducibility in combination with excellent overlay and placement accuracy. In particular, the imaging and lithographic resolution capabilities provided by scanning probe microscopy (SPM) methods touches the atomic level, which expresses the theoretical limit of constructing nanoelectronic devices. Furthermore, the symbiosis between EBL (EUVL) and SPL expands the process window of EBL (EUVL) far beyond state-of-the-art allowing SPL-based pre- and post-patterning of EBL (EUVL) written features at critical dimension level with theoretically nanometer precise pattern overlay alignment. Moreover, we can modify the EBL (EUVL) pattern before as well as after the development step. In this paper we demonstrate proof of concept using the ultra-high resolution molecular glass resist calixarene. Therefor we applied Gaussian E-beam lithography system operating at 10 keV and a home-developed SPL set-up. The introduced Mix and Match lithography strategy enables a powerful use of our SPL set-up especially as post-patterning tool for inspection and repair functions below the sub-10 nm critical dimension level.

Indus-2 X-ray lithography beamline for X-ray optics and material science applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dhamgaye, V. P., E-mail: vishal@rrcat.gov.in; Lodha, G. S., E-mail: vishal@rrcat.gov.in

2014-04-24

X-ray lithography is an ideal technique by which high aspect ratio and high spatial resolution micro/nano structures are fabricated using X-rays from synchrotron radiation source. The technique has been used for fabricating optics (X-ray, visible and infrared), sensors and actuators, fluidics and photonics. A beamline for X-ray lithography is operational on Indus-2. The beamline offers wide lithographic window from 1-40keV photon energy and wide beam for producing microstructures in polymers upto size ∼100mm × 100mm. X-ray exposures are possible in air, vacuum and He gas environment. The air based exposures enables the X-ray irradiation of resist for lithography and alsomore » irradiation of biological and liquid samples.« less

Manufacturability study of masks created by inverse lithography technology (ILT)

NASA Astrophysics Data System (ADS)

Martin, Patrick M.; Progler, C. J.; Xiao, G.; Gray, R.; Pang, L.; Liu, Y.

2005-11-01

As photolithography is pushed to fabricate deep-sub wavelength devices for 90nm, 65nm and smaller technology nodes using available exposure tools (i.e., 248nm, 193nm steppers), photomask capability is becoming extremely critical. For example, PSM masks require more complicated processing; aggressive OPC makes the writing time longer and sometimes unpredictable; and, high MEEF imposes much more stringent demands on mask quality. Therefore, in order for any new lithography technology to be adopted into production, mask manufacturability must be studied thoroughly and carefully. In this paper we will present the mask manufacturability study on mask patterns created using Inverse Lithography Technology (ILT). Unlike conventional OPC methodologies, ILT uses a unique outcome-based technology to mathematically determine the mask features that produce the desired on-wafer results. ILT solves the most critical litho challenges of the deep sub-wavelength era. Potential benefits include: higher yield; expanded litho process windows; superb pattern fidelity at 90, 65 & 45-nm nodes; and reduced time-to-silicon - all without changing the existing lithography infrastructure and design-to-silicon flow. In this study a number of cell structures were selected and used as test patterns. "Luminized patterns" were generated for binary mask and attenuated phase-shift mask. Both conventional OPC patterns and "luminized patterns" were put on a test reticle side by side, and they all have a number of variations in term of correction aggressivity level and mask complexity. Mask manufacturability, including data fracturing, writing time, mask inspection, and metrology were studied. The results demonstrate that, by optimizing the inspection recipe, masks created using ILT technology can be made and qualified using current processes with a reasonable turn-around time.

Revisiting adoption of high transmission PSM: pros, cons and path forward

NASA Astrophysics Data System (ADS)

Ma, Z. Mark; McDonald, Steve; Progler, Chris

2009-12-01

High transmission attenuated phase shift masks (Hi-T PSM) have been successfully applied in volume manufacturing for certain memory devices. Moreover, numerous studies have shown the potential benefits of Hi-T PSM for specific lithography applications. In this paper, the potential for extending Hi-T PSM to logic devices, is revisited with an emphasis on understanding layout, transmission, and manufacturing of Hi-T PSM versus traditional 6% embedded attenuated phase shift mask (EAPSM). Simulations on various layouts show Hi-T PSM has advantage over EAPSM in low duty cycle line patterns and high duty cycle space patterns. The overall process window can be enhanced when Hi- T PSM is combined with optimized optical proximity correction (OPC), sub-resolution assist features (SRAF), and source illumination. Therefore, Hi-T PSM may be a viable and lower cost alternative to other complex resolution enhancement technology (RET) approaches. Aerial image measurement system (AIMS) results on test masks, based on an inverse lithography technology (ILT) generated layout, confirm the simulation results. New advancement in high transmission blanks also make low topography Hi-T PSM a reality, which can minimize scattering effects in high NA lithography.

Hotspot detection using image pattern recognition based on higher-order local auto-correlation

NASA Astrophysics Data System (ADS)

Maeda, Shimon; Matsunawa, Tetsuaki; Ogawa, Ryuji; Ichikawa, Hirotaka; Takahata, Kazuhiro; Miyairi, Masahiro; Kotani, Toshiya; Nojima, Shigeki; Tanaka, Satoshi; Nakagawa, Kei; Saito, Tamaki; Mimotogi, Shoji; Inoue, Soichi; Nosato, Hirokazu; Sakanashi, Hidenori; Kobayashi, Takumi; Murakawa, Masahiro; Higuchi, Tetsuya; Takahashi, Eiichi; Otsu, Nobuyuki

2011-04-01

Below 40nm design node, systematic variation due to lithography must be taken into consideration during the early stage of design. So far, litho-aware design using lithography simulation models has been widely applied to assure that designs are printed on silicon without any error. However, the lithography simulation approach is very time consuming, and under time-to-market pressure, repetitive redesign by this approach may result in the missing of the market window. This paper proposes a fast hotspot detection support method by flexible and intelligent vision system image pattern recognition based on Higher-Order Local Autocorrelation. Our method learns the geometrical properties of the given design data without any defects as normal patterns, and automatically detects the design patterns with hotspots from the test data as abnormal patterns. The Higher-Order Local Autocorrelation method can extract features from the graphic image of design pattern, and computational cost of the extraction is constant regardless of the number of design pattern polygons. This approach can reduce turnaround time (TAT) dramatically only on 1CPU, compared with the conventional simulation-based approach, and by distributed processing, this has proven to deliver linear scalability with each additional CPU.

65-nm full-chip implementation using double dipole lithography

NASA Astrophysics Data System (ADS)

Hsu, Stephen D.; Chen, J. Fung; Cororan, Noel; Knose, William T.; Van Den Broeke, Douglas J.; Laidig, Thomas L.; Wampler, Kurt E.; Shi, Xuelong; Hsu, Michael; Eurlings, Mark; Finders, Jo; Chiou, Tsann-Bim; Socha, Robert J.; Conley, Will; Hsieh, Yen W.; Tuan, Steve; Hsieh, Frank

2003-06-01

Double Dipole Lithography (DDL) has been demonstrated to be capable of patterning complex 2D patterns. Due to inherently high aerial imaging contrast, especially for dense features, we have found that it has a very good potential to meet manufacturing requirements for the 65nm node using ArF binary chrome masks. For patterning in the k1<0.35 regime without resorting to hard phase-shift masks (PSMs), DDL is one unique Resolution Enhancement Technique (RET) which can achieve an acceptable process window. To utilize DDL for printing actual IC devices, the original design data must be decomposed into "vertical (V)" and "horizontal (H)" masks for the respective X- and Y-dipole exposures. An improved two-pass, model-based, DDL mask data processing methodology has been established. It is capable of simultaneously converting complex logic and memory mask patterns into DDL compatible mask layout. To maximize the overlapped process window area, we have previously shown that the pattern-shielding algorithm must be intelligently applied together with both Scattering Bars (SBs) and model-based OPC (MOPC). Due to double exposures, stray light must be well-controlled to ensure uniform printing across the entire chip. One solution to minimize stray light is to apply large patches of solid chrome in open areas to reduce the background transmission during exposure. Unfortunately, this is not feasible for a typical clear-field poly gate masks to be patterned by a positive resist process. In this work, we report a production-worthy DDL mask pattern decomposition scheme for full-chip application. A new generation of DDL technology reticle set has been developed to verify the printing performance. Shielding is a critical part of the DDL. An innovative shielding scheme has been developed to protect the critical features and minimize the impact of stray light during double exposure.

Complete data preparation flow for Massively Parallel E-Beam lithography on 28nm node full-field design

NASA Astrophysics Data System (ADS)

Fay, Aurélien; Browning, Clyde; Brandt, Pieter; Chartoire, Jacky; Bérard-Bergery, Sébastien; Hazart, Jérôme; Chagoya, Alexandre; Postnikov, Sergei; Saib, Mohamed; Lattard, Ludovic; Schavione, Patrick

2016-03-01

Massively parallel mask-less electron beam lithography (MP-EBL) offers a large intrinsic flexibility at a low cost of ownership in comparison to conventional optical lithography tools. This attractive direct-write technique needs a dedicated data preparation flow to correct both electronic and resist processes. Moreover, Data Prep has to be completed in a short enough time to preserve the flexibility advantage of MP-EBL. While the MP-EBL tools have currently entered an advanced stage of development, this paper will focus on the data preparation side of the work for specifically the MAPPER Lithography FLX-1200 tool [1]-[4], using the ASELTA Nanographics Inscale software. The complete flow as well as the methodology used to achieve a full-field layout data preparation, within an acceptable cycle time, will be presented. Layout used for Data Prep evaluation was one of a 28 nm technology node Metal1 chip with a field size of 26x33mm2, compatible with typical stepper/scanner field sizes and wafer stepping plans. Proximity Effect Correction (PEC) was applied to the entire field, which was then exported as a single file to MAPPER Lithography's machine format, containing fractured shapes and dose assignments. The Soft Edge beam to beam stitching method was employed in the specific overlap regions defined by the machine format as well. In addition to PEC, verification of the correction was included as part of the overall data preparation cycle time. This verification step was executed on the machine file format to ensure pattern fidelity and accuracy as late in the flow as possible. Verification over the full chip, involving billions of evaluation points, is performed both at nominal conditions and at Process Window corners in order to ensure proper exposure and process latitude. The complete MP-EBL data preparation flow was demonstrated for a 28 nm node Metal1 layout in 37 hours. The final verification step shows that the Edge Placement Error (EPE) is kept below 2.25 nm over an exposure dose variation of 8%.

Sub-half-micron contact window design with 3D photolithography simulator

NASA Astrophysics Data System (ADS)

Brainerd, Steve K.; Bernard, Douglas A.; Rey, Juan C.; Li, Jiangwei; Granik, Yuri; Boksha, Victor V.

1997-07-01

In state of the art IC design and manufacturing certain lithography layers have unique requirements. Latitudes and tolerances that apply to contacts and polysilicon gates are tight for such critical layers. Industry experts are discussing the most cost effective ways to use feature- oriented equipment and materials already developed for these layers. Such requirements introduce new dimensions into the traditionally challenging task for the photolithography engineer when considering various combinations of multiple factors to optimize and control the process. In addition, he/she faces a rapidly increasing cost of experiments, limited time and scarce access to equipment to conduct them. All the reasons presented above support simulation as an ideal method to satisfy these demands. However lithography engineers may be easily dissatisfied with a simulation tool when discovering disagreement between the simulation and experimental data. The problem is that several parameters used in photolithography simulation are very process specific. Calibration, i.e. matching experimental and simulation data using a specific set of procedures allows one to effectively use the simulation tool. We present results of a simulation based approach to optimize photolithography processes for sub-0.5 micron contact windows. Our approach consists of: (1) 3D simulation to explore different lithographic options, (2) calibration to a range of process conditions with extensive use of specifically developed optimization techniques. The choice of a 3D simulator is essential because of 3D nature of the problem of contact window design. We use DEPICT 4.1. This program performs fast aerial image simulation as presented before. For 3D exposure the program uses an extension to three-dimensions of the high numerical aperture model combined with Fast Fourier Transforms for maximum performance and accuracy. We use Kim (U.C. Berkeley) model and the fast marching Level Set method respectively for the calculation of resist development rates and resist surface movement during development process. Calibration efforts were aimed at matching experimental results on contact windows obtained after exposure of a binary mask. Additionally, simulation was applied to conduct quantitative analysis of PSM design capabilities, optical proximity correction, and stepper parameter optimization. Extensive experiments covered exposure (ASML 5500/100D stepper), pre- and post-exposure bake and development (2.38% TMAH, puddle process) of JSR IX725D2G and TOK iP3500 photoresists films on 200 mm test wafers. `Aquatar' was used as top antireflective coating, SEM pictures of developed patterns were analyzed and compared with simulation results for different values of defocus, exposure energies, numerical aperture and partial coherence.

Wafer chamber having a gas curtain for extreme-UV lithography

DOEpatents

Kanouff, Michael P.; Ray-Chaudhuri, Avijit K.

2001-01-01

An EUVL device includes a wafer chamber that is separated from the upstream optics by a barrier having an aperture that is permeable to the inert gas. Maintaining an inert gas curtain in the proximity of a wafer positioned in a chamber of an extreme ultraviolet lithography device can effectively prevent contaminants from reaching the optics in an extreme ultraviolet photolithography device even though solid window filters are not employed between the source of reflected radiation, e.g., the camera, and the wafer. The inert gas removes the contaminants by entrainment.

A lithium niobate electro-optic tunable Bragg filter fabricated by electron beam lithography

NASA Astrophysics Data System (ADS)

Pierno, L.; Dispenza, M.; Secchi, A.; Fiorello, A.; Foglietti, V.

2008-06-01

We have designed and fabricated a lithium niobate tunable Bragg filter patterned by electron beam lithography and etched by reactive ion etching. Devices with 1 mm, 2 mm and 4 mm length and 360 and 1080 nm Bragg period, with 5 pm V-1 tuning efficiency, have been characterized. Some applications were identified. Optical simulation based on finite element model (FEM) software showing the optical filtering curve and the coupling factor dependence on the manufacturing parameter is reported. The tuning of the filter window position is electro-optically controlled.

Facile fabrication of microfluidic surface-enhanced Raman scattering devices via lift-up lithography

NASA Astrophysics Data System (ADS)

Wu, Yuanzi; Jiang, Ye; Zheng, Xiaoshan; Jia, Shasha; Zhu, Zhi; Ren, Bin; Ma, Hongwei

2018-04-01

We describe a facile and low-cost approach for a flexibly integrated surface-enhanced Raman scattering (SERS) substrate in microfluidic chips. Briefly, a SERS substrate was fabricated by the electrostatic assembling of gold nanoparticles, and shaped into designed patterns by subsequent lift-up soft lithography. The SERS micro-pattern could be further integrated within microfluidic channels conveniently. The resulting microfluidic SERS chip allowed ultrasensitive in situ SERS monitoring from the transparent glass window. With its advantages in simplicity, functionality and cost-effectiveness, this method could be readily expanded into optical microfluidic fabrication for biochemical applications.

Direct write electron beam lithography: a historical overview

NASA Astrophysics Data System (ADS)

Pfeiffer, Hans C.

2010-09-01

Maskless pattern generation capability in combination with practically limitless resolution made probe-forming electron beam systems attractive tools in the semiconductor fabrication process. However, serial exposure of pattern elements with a scanning beam is a slow process and throughput presented a key challenge in electron beam lithography from the beginning. To meet this challenge imaging concepts with increasing exposure efficiency have been developed projecting ever larger number of pixels in parallel. This evolution started in the 1960s with the SEM-type Gaussian beam systems writing one pixel at a time directly on wafers. During the 1970s IBM pioneered the concept of shaped beams containing multiple pixels which led to higher throughput and an early success of e-beam direct write (EBDW) in large scale manufacturing of semiconductor chips. EBDW in a mix-and match approach with optical lithography provided unique flexibility in part number management and cycle time reduction and proved extremely cost effective in IBM's Quick-Turn-Around-Time (QTAT) facilities. But shaped beams did not keep pace with Moore's law because of limitations imposed by the physics of charged particles: Coulomb interactions between beam electrons cause image blur and consequently limit beam current and throughput. A new technology approach was needed. Physically separating beam electrons into multiple beamlets to reduce Coulomb interaction led to the development of massively parallel projection of pixels. Electron projection lithography (EPL) - a mask based imaging technique emulating optical steppers - was pursued during the 1990s by Bell Labs with SCALPEL and by IBM with PREVAIL in partnership with Nikon. In 2003 Nikon shipped the first NCR-EB1A e-beam stepper based on the PREVAIL technology to Selete. It exposed pattern segments containing 10 million pixels in single shot and represented the first successful demonstration of massively parallel pixel projection. However the window of opportunity for EPL had closed with the quick implementation of immersion lithography and the interest of the industry has since shifted back to maskless lithography (ML2). This historical overview of EBDW will highlight opportunities and limitation of the technology with particular focus on technical challenges facing the current ML2 development efforts in Europe and the US. A brief status report and risk assessment of the ML2 approaches will be provided.

Challenges of anamorphic high-NA lithography and mask making

NASA Astrophysics Data System (ADS)

Hsu, Stephen D.; Liu, Jingjing

2017-06-01

Chip makers are actively working on the adoption of 0.33 numerical aperture (NA) EUV scanners for the 7-nm and 5-nm nodes (B. Turko, S. L. Carson, A. Lio, T. Liang, M. Phillips, et al., in `Proc. SPIE9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 977602 (2016) doi: 10.1117/12.2225014; A. Lio, in `Proc. SPIE9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97760V (2016) doi: 10.1117/12.2225017). In the meantime, leading foundries and integrated device manufacturers are starting to investigate patterning options beyond the 5-nm node (O. Wood, S. Raghunathan, P. Mangat, V. Philipsen, V. Luong, et al., in `Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94220I (2015) doi: 10.1117/12.2085022). To minimize the cost and process complexity of multiple patterning beyond the 5-nm node, EUV high-NA single-exposure patterning is a preferred method over EUV double patterning (O. Wood, S. Raghunathan, P. Mangat, V. Philipsen, V. Luong, et al., in `Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94220I (2015) doi: 10.1117/12.2085022; J. van Schoot, K. van Ingen Schenau, G. Bottiglieri, K. Troost, J. Zimmerman, et al., `Proc. SPIE. 9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97761I (2016) doi: 10.1117/12.2220150). The EUV high-NA scanner equipped with a projection lens of 0.55 NA is designed to support resolutions below 10 nm. The high-NA system is beneficial for enhancing resolution, minimizing mask proximity correction bias, improving normalized image log slope (NILS), and controlling CD uniformity (CDU). However, increasing NA from 0.33 to 0.55 reduces the depth of focus (DOF) significantly. Therefore, the source mask optimization (SMO) with sub-resolution assist features (SRAFs) are needed to increase DOF to meet the demanding full chip process control requirements (S. Hsu, R. Howell, J. Jia, H.-Y. Liu, K. Gronlund, et al., EUV `Proc. SPIE9048, Extreme Ultraviolet (EUV) Lithography VI', (2015) doi: 10.1117/12.2086074). To ensure no assist feature printing, the assist feature sizes need to be scaled with λ/NA. The extremely small SRAF width (below 25 nm on the reticle) is difficult to fabricate across the full reticle. In this paper, we introduce an innovative `attenuated SRAF' to improve SRAF manufacturability and still maintain the process window benefit. A new mask fabrication process is proposed to use existing mask-making capability to manufacture the attenuated SRAFs. The high-NA EUV system utilizes anamorphic reduction; 4× in the horizontal (slit) direction and 8× in the vertical (scanning) direction (J. van Schoot, K. van Ingen Schenau, G. Bottiglieri, K. Troost, J. Zimmerman, et al., `Proc. SPIE. 9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97761I (2016) doi: 10.1117/12.2220150; B. Kneer, S. Migura, W. Kaiser, J. T. Neumann, J. van Schoot, in `Proc. SPIE9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94221G (2015) doi: 10.1117/12.2175488). For an anamorphic system, the magnification has an angular dependency, and thus, familiar mask specifications such as mask error factor (MEF) need to be redefined. Similarly, mask-manufacturing rule check (MRC) needs to consider feature orientation.

Compensation for Lithography Induced Process Variations during Physical Design

NASA Astrophysics Data System (ADS)

Chin, Eric Yiow-Bing

This dissertation addresses the challenge of designing robust integrated circuits in the deep sub micron regime in the presence of lithography process variability. By extending and combining existing process and circuit analysis techniques, flexible software frameworks are developed to provide detailed studies of circuit performance in the presence of lithography variations such as focus and exposure. Applications of these software frameworks to select circuits demonstrate the electrical impact of these variations and provide insight into variability aware compact models that capture the process dependent circuit behavior. These variability aware timing models abstract lithography variability from the process level to the circuit level and are used to estimate path level circuit performance with high accuracy with very little overhead in runtime. The Interconnect Variability Characterization (IVC) framework maps lithography induced geometrical variations at the interconnect level to electrical delay variations. This framework is applied to one dimensional repeater circuits patterned with both 90nm single patterning and 32nm double patterning technologies, under the presence of focus, exposure, and overlay variability. Studies indicate that single and double patterning layouts generally exhibit small variations in delay (between 1--3%) due to self compensating RC effects associated with dense layouts and overlay errors for layouts without self-compensating RC effects. The delay response of each double patterned interconnect structure is fit with a second order polynomial model with focus, exposure, and misalignment parameters with 12 coefficients and residuals of less than 0.1ps. The IVC framework is also applied to a repeater circuit with cascaded interconnect structures to emulate more complex layout scenarios, and it is observed that the variations on each segment average out to reduce the overall delay variation. The Standard Cell Variability Characterization (SCVC) framework advances existing layout-level lithography aware circuit analysis by extending it to cell-level applications utilizing a physically accurate approach that integrates process simulation, compact transistor models, and circuit simulation to characterize electrical cell behavior. This framework is applied to combinational and sequential cells in the Nangate 45nm Open Cell Library, and the timing response of these cells to lithography focus and exposure variations demonstrate Bossung like behavior. This behavior permits the process parameter dependent response to be captured in a nine term variability aware compact model based on Bossung fitting equations. For a two input NAND gate, the variability aware compact model captures the simulated response to an accuracy of 0.3%. The SCVC framework is also applied to investigate advanced process effects including misalignment and layout proximity. The abstraction of process variability from the layout level to the cell level opens up an entire new realm of circuit analysis and optimization and provides a foundation for path level variability analysis without the computationally expensive costs associated with joint process and circuit simulation. The SCVC framework is used with slight modification to illustrate the speedup and accuracy tradeoffs of using compact models. With variability aware compact models, the process dependent performance of a three stage logic circuit can be estimated to an accuracy of 0.7% with a speedup of over 50,000. Path level variability analysis also provides an accurate estimate (within 1%) of ring oscillator period in well under a second. Another significant advantage of variability aware compact models is that they can be easily incorporated into existing design methodologies for design optimization. This is demonstrated by applying cell swapping on a logic circuit to reduce the overall delay variability along a circuit path. By including these variability aware compact models in cell characterization libraries, design metrics such as circuit timing, power, area, and delay variability can be quickly assessed to optimize for the correct balance of all design metrics, including delay variability. Deterministic lithography variations can be easily captured using the variability aware compact models described in this dissertation. However, another prominent source of variability is random dopant fluctuations, which affect transistor threshold voltage and in turn circuit performance. The SCVC framework is utilized to investigate the interactions between deterministic lithography variations and random dopant fluctuations. Monte Carlo studies show that the output delay distribution in the presence of random dopant fluctuations is dependent on lithography focus and exposure conditions, with a 3.6 ps change in standard deviation across the focus exposure process window. This indicates that the electrical impact of random variations is dependent on systematic lithography variations, and this dependency should be included for precise analysis.

Two-layer critical dimensions and overlay process window characterization and improvement in full-chip computational lithography

NASA Astrophysics Data System (ADS)

Sturtevant, John L.; Liubich, Vlad; Gupta, Rachit

2016-04-01

Edge placement error (EPE) was a term initially introduced to describe the difference between predicted pattern contour edge and the design target for a single design layer. Strictly speaking, this quantity is not directly measurable in the fab. What is of vital importance is the relative edge placement errors between different design layers, and in the era of multipatterning, the different constituent mask sublayers for a single design layer. The critical dimensions (CD) and overlay between two layers can be measured in the fab, and there has always been a strong emphasis on control of overlay between design layers. The progress in this realm has been remarkable, accelerated in part at least by the proliferation of multipatterning, which reduces the available overlay budget by introducing a coupling of overlay and CD errors for the target layer. Computational lithography makes possible the full-chip assessment of two-layer edge to edge distances and two-layer contact overlap area. We will investigate examples of via-metal model-based analysis of CD and overlay errors. We will investigate both single patterning and double patterning. For single patterning, we show the advantage of contour-to-contour simulation over contour to target simulation, and how the addition of aberrations in the optical models can provide a more realistic CD-overlay process window (PW) for edge placement errors. For double patterning, the interaction of 4-layer CD and overlay errors is very complex, but we illustrate that not only can full-chip verification identify potential two-layer hotspots, the optical proximity correction engine can act to mitigate such hotspots and enlarge the joint CD-overlay PW.

Recovery of Multilayer-Coated Zerodur and ULE Optics for Extreme-Ultraviolet Lithography by Recoating, Reactive-Ion Etching, and Wet-Chemical Processes.

PubMed

Mirkarimi, P B; Baker, S L; Montcalm, C; Folta, J A

2001-01-01

Extreme-ultraviolet lithography requires expensive multilayer-coated Zerodur or ULE optics with extremely tight figure and finish specifications. Therefore it is desirable to develop methods to recover these optics if they are coated with a nonoptimum multilayer films or in the event that the coating deteriorates over time owing to long-term exposure to radiation, corrosion, or surface contamination. We evaluate recoating, reactive-ion etching, and wet-chemical techniques for the recovery of Mo/Si and Mo/Be multilayer films upon Zerodur and ULE test optics. The recoating technique was successfully employed in the recovery of Mo/Si-coated optics but has the drawback of limited applicability. A chlorine-based reactive-ion etch process was successfully used to recover Mo/Si-coated optics, and a particularly large process window was observed when ULE optics were employed; this is an advantageous for large, curved optics. Dilute HCl wet-chemical techniques were developed and successfully demonstrated for the recovery of Mo/Be-coated optics as well as for Mo/Si-coated optics when Mo/Be release layers were employed; however, there are questions about the extendability of the HCl process to large optics and multiple coat and strip cycles. The technique of using carbon barrier layers to protect the optic during removal of Mo/Si in HF:HNO(3) also showed promise.

Microfluidic device for chemical and mechanical manipulation of suspended cells

NASA Astrophysics Data System (ADS)

Rezvani, Samaneh; Shi, Nan; Squires, Todd M.; Schmidt, Christoph F.

2018-01-01

Microfluidic devices have proven to be useful and versatile for cell studies. We here report on a method to adapt microfluidic stickers made from UV-curable optical adhesive with inserted permeable hydrogel membrane micro-windows for mechanical studies of suspended cells. The windows were fabricated by optical projection lithography using scanning confocal microscopy. The device allows us to rapidly exchange embedding medium while observing and probing the cells. We characterize the device and demonstrate the function by exposing cultured fibroblasts to varying osmotic conditions. Cells can be shrunk reversibly under osmotic compression.

X-ray transmissive debris shield

DOEpatents

Spielman, R.B.

1996-05-21

An X-ray debris shield for use in X-ray lithography that is comprised of an X-ray window having a layer of low density foam exhibits increased longevity without a substantial increase in exposure time. The low density foam layer serves to absorb the debris emitted from the X-ray source and attenuate the shock to the window so as to reduce the chance of breakage. Because the foam is low density, the X-rays are hardly attenuated by the foam and thus the exposure time is not substantially increased.

X-ray transmissive debris shield

DOEpatents

Spielman, Rick B.

1996-01-01

An X-ray debris shield for use in X-ray lithography that is comprised of an X-ray window having a layer of low density foam exhibits increased longevity without a substantial increase in exposure time. The low density foam layer serves to absorb the debris emitted from the X-ray source and attenuate the shock to the window so as to reduce the chance of breakage. Because the foam is low density, the X-rays are hardly attenuated by the foam and thus the exposure time is not substantially increased.

Selective-area growth of GaN nanowires on SiO{sub 2}-masked Si (111) substrates by molecular beam epitaxy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kruse, J. E.; Doundoulakis, G.; Institute of Electronic Structure and Laser, Foundation for Research and Technology–Hellas, N. Plastira 100, 70013 Heraklion

2016-06-14

We analyze a method to selectively grow straight, vertical gallium nitride nanowires by plasma-assisted molecular beam epitaxy (MBE) at sites specified by a silicon oxide mask, which is thermally grown on silicon (111) substrates and patterned by electron-beam lithography and reactive-ion etching. The investigated method requires only one single molecular beam epitaxy MBE growth process, i.e., the SiO{sub 2} mask is formed on silicon instead of on a previously grown GaN or AlN buffer layer. We present a systematic and analytical study involving various mask patterns, characterization by scanning electron microscopy, transmission electron microscopy, and photoluminescence spectroscopy, as well asmore » numerical simulations, to evaluate how the dimensions (window diameter and spacing) of the mask affect the distribution of the nanowires, their morphology, and alignment, as well as their photonic properties. Capabilities and limitations for this method of selective-area growth of nanowires have been identified. A window diameter less than 50 nm and a window spacing larger than 500 nm can provide single nanowire nucleation in nearly all mask windows. The results are consistent with a Ga diffusion length on the silicon dioxide surface in the order of approximately 1 μm.« less

Directed self-assembly of block copolymer films on atomically-thin graphene chemical patterns

DOE PAGES

Chang, Tzu-Hsuan; Xiong, Shisheng; Jacobberger, Robert M.; ...

2016-08-16

Directed self-assembly of block copolymers is a scalable method to fabricate well-ordered patterns over the wafer scale with feature sizes below the resolution of conventional lithography. Typically, lithographically-defined prepatterns with varying chemical contrast are used to rationally guide the assembly of block copolymers. The directed self-assembly to obtain accurate registration and alignment is largely influenced by the assembly kinetics. Furthermore, a considerably broad processing window is favored for industrial manufacturing. Using an atomically-thin layer of graphene on germanium, after two simple processing steps, we create a novel chemical pattern to direct the assembly of polystyreneblock-poly(methyl methacrylate). Faster assembly kinetics aremore » observed on graphene/germanium chemical patterns than on conventional chemical patterns based on polymer mats and brushes. This new chemical pattern allows for assembly on a wide range of guiding periods and along designed 90° bending structures. We also achieve density multiplication by a factor of 10, greatly enhancing the pattern resolution. Lastly, the rapid assembly kinetics, minimal topography, and broad processing window demonstrate the advantages of inorganic chemical patterns composed of hard surfaces.« less

Rules based process window OPC

NASA Astrophysics Data System (ADS)

O'Brien, Sean; Soper, Robert; Best, Shane; Mason, Mark

2008-03-01

As a preliminary step towards Model-Based Process Window OPC we have analyzed the impact of correcting post-OPC layouts using rules based methods. Image processing on the Brion Tachyon was used to identify sites where the OPC model/recipe failed to generate an acceptable solution. A set of rules for 65nm active and poly were generated by classifying these failure sites. The rules were based upon segment runlengths, figure spaces, and adjacent figure widths. 2.1 million sites for active were corrected in a small chip (comparing the pre and post rules based operations), and 59 million were found at poly. Tachyon analysis of the final reticle layout found weak margin sites distinct from those sites repaired by rules-based corrections. For the active layer more than 75% of the sites corrected by rules would have printed without a defect indicating that most rulesbased cleanups degrade the lithographic pattern. Some sites were missed by the rules based cleanups due to either bugs in the DRC software or gaps in the rules table. In the end dramatic changes to the reticle prevented catastrophic lithography errors, but this method is far too blunt. A more subtle model-based procedure is needed changing only those sites which have unsatisfactory lithographic margin.

Demonstration of electronic design automation flow for massively parallel e-beam lithography

NASA Astrophysics Data System (ADS)

Brandt, Pieter; Belledent, Jérôme; Tranquillin, Céline; Figueiro, Thiago; Meunier, Stéfanie; Bayle, Sébastien; Fay, Aurélien; Milléquant, Matthieu; Icard, Beatrice; Wieland, Marco

2014-07-01

For proximity effect correction in 5 keV e-beam lithography, three elementary building blocks exist: dose modulation, geometry (size) modulation, and background dose addition. Combinations of these three methods are quantitatively compared in terms of throughput impact and process window (PW). In addition, overexposure in combination with negative bias results in PW enhancement at the cost of throughput. In proximity effect correction by over exposure (PEC-OE), the entire layout is set to fixed dose and geometry sizes are adjusted. In PEC-dose to size (DTS) both dose and geometry sizes are locally optimized. In PEC-background (BG), a background is added to correct the long-range part of the point spread function. In single e-beam tools (Gaussian or Shaped-beam), throughput heavily depends on the number of shots. In raster scan tools such as MAPPER Lithography's FLX 1200 (MATRIX platform) this is not the case and instead of pattern density, the maximum local dose on the wafer is limiting throughput. The smallest considered half-pitch is 28 nm, which may be considered the 14-nm node for Metal-1 and the 10-nm node for the Via-1 layer, achieved in a single exposure with e-beam lithography. For typical 28-nm-hp Metal-1 layouts, it was shown that dose latitudes (size of process window) of around 10% are realizable with available PEC methods. For 28-nm-hp Via-1 layouts this is even higher at 14% and up. When the layouts do not reach the highest densities (up to 10∶1 in this study), PEC-BG and PEC-OE provide the capability to trade throughput for dose latitude. At the highest densities, PEC-DTS is required for proximity correction, as this method adjusts both geometry edges and doses and will reduce the dose at the densest areas. For 28-nm-hp lines critical dimension (CD), hole&dot (CD) and line ends (edge placement error), the data path errors are typically 0.9, 1.0 and 0.7 nm (3σ) and below, respectively. There is not a clear data path performance difference between the investigated PEC methods. After the simulations, the methods were successfully validated in exposures on a MAPPER pre-alpha tool. A 28-nm half pitch Metal-1 and Via-1 layouts show good performance in resist that coincide with the simulation result. Exposures of soft-edge stitched layouts show that beam-to-beam position errors up to ±7 nm specified for FLX 1200 show no noticeable impact on CD. The research leading to these results has been performed in the frame of the industrial collaborative consortium IMAGINE.

Immersion lithography defectivity analysis at DUV inspection wavelength

NASA Astrophysics Data System (ADS)

Golan, E.; Meshulach, D.; Raccah, N.; Yeo, J. Ho.; Dassa, O.; Brandl, S.; Schwarz, C.; Pierson, B.; Montgomery, W.

2007-03-01

Significant effort has been directed in recent years towards the realization of immersion lithography at 193nm wavelength. Immersion lithography is likely a key enabling technology for the production of critical layers for 45nm and 32nm design rule (DR) devices. In spite of the significant progress in immersion lithography technology, there remain several key technology issues, with a critical issue of immersion lithography process induced defects. The benefits of the optical resolution and depth of focus, made possible by immersion lithography, are well understood. Yet, these benefits cannot come at the expense of increased defect counts and decreased production yield. Understanding the impact of the immersion lithography process parameters on wafer defects formation and defect counts, together with the ability to monitor, control and minimize the defect counts down to acceptable levels is imperative for successful introduction of immersion lithography for production of advanced DR's. In this report, we present experimental results of immersion lithography defectivity analysis focused on topcoat layer thickness parameters and resist bake temperatures. Wafers were exposed on the 1150i-α-immersion scanner and 1200B Scanner (ASML), defect inspection was performed using a DUV inspection tool (UVision TM, Applied Materials). Higher sensitivity was demonstrated at DUV through detection of small defects not detected at the visible wavelength, indicating on the potential high sensitivity benefits of DUV inspection for this layer. The analysis indicates that certain types of defects are associated with different immersion process parameters. This type of analysis at DUV wavelengths would enable the optimization of immersion lithography processes, thus enabling the qualification of immersion processes for volume production.

Efficient full-chip SRAF placement using machine learning for best accuracy and improved consistency

NASA Astrophysics Data System (ADS)

Wang, Shibing; Baron, Stanislas; Kachwala, Nishrin; Kallingal, Chidam; Sun, Dezheng; Shu, Vincent; Fong, Weichun; Li, Zero; Elsaid, Ahmad; Gao, Jin-Wei; Su, Jing; Ser, Jung-Hoon; Zhang, Quan; Chen, Been-Der; Howell, Rafael; Hsu, Stephen; Luo, Larry; Zou, Yi; Zhang, Gary; Lu, Yen-Wen; Cao, Yu

2018-03-01

Various computational approaches from rule-based to model-based methods exist to place Sub-Resolution Assist Features (SRAF) in order to increase process window for lithography. Each method has its advantages and drawbacks, and typically requires the user to make a trade-off between time of development, accuracy, consistency and cycle time. Rule-based methods, used since the 90 nm node, require long development time and struggle to achieve good process window performance for complex patterns. Heuristically driven, their development is often iterative and involves significant engineering time from multiple disciplines (Litho, OPC and DTCO). Model-based approaches have been widely adopted since the 20 nm node. While the development of model-driven placement methods is relatively straightforward, they often become computationally expensive when high accuracy is required. Furthermore these methods tend to yield less consistent SRAFs due to the nature of the approach: they rely on a model which is sensitive to the pattern placement on the native simulation grid, and can be impacted by such related grid dependency effects. Those undesirable effects tend to become stronger when more iterations or complexity are needed in the algorithm to achieve required accuracy. ASML Brion has developed a new SRAF placement technique on the Tachyon platform that is assisted by machine learning and significantly improves the accuracy of full chip SRAF placement while keeping consistency and runtime under control. A Deep Convolutional Neural Network (DCNN) is trained using the target wafer layout and corresponding Continuous Transmission Mask (CTM) images. These CTM images have been fully optimized using the Tachyon inverse mask optimization engine. The neural network generated SRAF guidance map is then used to place SRAF on full-chip. This is different from our existing full-chip MB-SRAF approach which utilizes a SRAF guidance map (SGM) of mask sensitivity to improve the contrast of optical image at the target pattern edges. In this paper, we demonstrate that machine learning assisted SRAF placement can achieve a superior process window compared to the SGM model-based SRAF method, while keeping the full-chip runtime affordable, and maintain consistency of SRAF placement . We describe the current status of this machine learning assisted SRAF technique and demonstrate its application to full chip mask synthesis and discuss how it can extend the computational lithography roadmap.

Formation of Size- and Position-Controlled Nanometer Size Pt Dots on GaAs and InP Substrates by Pulsed Electrochemical Deposition

NASA Astrophysics Data System (ADS)

Sato, Taketomo; Kaneshiro, Chinami; HiroshiOkada, HiroshiOkada; Hasegawa, Hideki

1999-04-01

Attempts were made to form regular arrays of size- andposition-controlled Pt-dots on GaAs and InP by combining an insitu electrochemical process with the electron beam (EB)lithography. This utilizes the precipitation of Pt nano-particles atthe initial stage of electrodeposition. First, electrochemicalconditions were optimized in the mode of self-assembled dot arrayformation on unpatterned substrates. Minimum in-plane dot diameters of22 nm and 26 nm on GaAs and InP, respectively, were obtained underthe optimal pulsed mode. Then, Pt dots were selectively formed onpatterned substrates with open circular windows formed by EBlithography, thereby realizing dot-position control. The Pt dot wasfound to have been deposited at the center of each open window, andthe in-plane diameter of the dot could be controlled by the number,width and period of the pulse-waveform applied to substrates. Aminimum diameter of 20 nm was realized in windows with a diameter of100 nm, using a single pulse. Current-voltage (I-V)measurements using an atomic force microscopy (AFM) system with aconductive probe indicated that each Pt dot/n-GaAs contact possessed ahigh Schottky barrier height of about 1 eV.

XUV generation from the interaction of pico- and nanosecond laser pulses with nanostructured targets

NASA Astrophysics Data System (ADS)

Barte, Ellie Floyd; Lokasani, Ragava; Proska, Jan; Stolcova, Lucie; Maguire, Oisin; Kos, Domagoj; Sheridan, Paul; O'Reilly, Fergal; Sokell, Emma; McCormack, Tom; O'Sullivan, Gerry; Dunne, Padraig; Limpouch, Jiri

2017-05-01

Laser-produced plasmas are intense sources of XUV radiation that can be suitable for different applications such as extreme ultraviolet lithography, beyond extreme ultraviolet lithography and water window imaging. In particular, much work has focused on the use of tin plasmas for extreme ultraviolet lithography at 13.5 nm. We have investigated the spectral behavior of the laser produced plasmas formed on closely packed polystyrene microspheres and porous alumina targets covered by a thin tin layer in the spectral region from 2.5 to 16 nm. Nd:YAG lasers delivering pulses of 170 ps (Ekspla SL312P )and 7 ns (Continuum Surelite) duration were focused onto the nanostructured targets coated with tin. The intensity dependence of the recorded spectra was studied; the conversion efficiency (CE) of laser energy into the emission in the 13.5 nm spectral region was estimated. We have observed an increase in CE using high intensity 170 ps Nd:YAG laser pulses as compared with a 7 ns pulse.

A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

PubMed Central

Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang

2012-01-01

This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording. PMID:22666012

High-throughput electrical characterization for robust overlay lithography control

NASA Astrophysics Data System (ADS)

Devender, Devender; Shen, Xumin; Duggan, Mark; Singh, Sunil; Rullan, Jonathan; Choo, Jae; Mehta, Sohan; Tang, Teck Jung; Reidy, Sean; Holt, Jonathan; Kim, Hyung Woo; Fox, Robert; Sohn, D. K.

2017-03-01

Realizing sensitive, high throughput and robust overlay measurement is a challenge in current 14nm and advanced upcoming nodes with transition to 300mm and upcoming 450mm semiconductor manufacturing, where slight deviation in overlay has significant impact on reliability and yield1). Exponentially increasing number of critical masks in multi-patterning lithoetch, litho-etch (LELE) and subsequent LELELE semiconductor processes require even tighter overlay specification2). Here, we discuss limitations of current image- and diffraction- based overlay measurement techniques to meet these stringent processing requirements due to sensitivity, throughput and low contrast3). We demonstrate a new electrical measurement based technique where resistance is measured for a macro with intentional misalignment between two layers. Overlay is quantified by a parabolic fitting model to resistance where minima and inflection points are extracted to characterize overlay control and process window, respectively. Analyses using transmission electron microscopy show good correlation between actual overlay performance and overlay obtained from fitting. Additionally, excellent correlation of overlay from electrical measurements to existing image- and diffraction- based techniques is found. We also discuss challenges of integrating electrical measurement based approach in semiconductor manufacturing from Back End of Line (BEOL) perspective. Our findings open up a new pathway for accessing simultaneous overlay as well as process window and margins from a robust, high throughput and electrical measurement approach.

Advanced in-production hotspot prediction and monitoring with micro-topography

NASA Astrophysics Data System (ADS)

Fanton, P.; Hasan, T.; Lakcher, A.; Le-Gratiet, B.; Prentice, C.; Simiz, J.-G.; La Greca, R.; Depre, L.; Hunsche, S.

2017-03-01

At 28nm technology node and below, hot spot prediction and process window control across production wafers have become increasingly critical to prevent hotspots from becoming yield-limiting defects. We previously established proof of concept for a systematic approach to identify the most critical pattern locations, i.e. hotspots, in a reticle layout by computational lithography and combining process window characteristics of these patterns with across-wafer process variation data to predict where hotspots may become yield impacting defects [1,2]. The current paper establishes the impact of micro-topography on a 28nm metal layer, and its correlation with hotspot best focus variations across a production chip layout. Detailed topography measurements are obtained from an offline tool, and pattern-dependent best focus (BF) shifts are determined from litho simulations that include mask-3D effects. We also establish hotspot metrology and defect verification by SEM image contour extraction and contour analysis. This enables detection of catastrophic defects as well as quantitative characterization of pattern variability, i.e. local and global CD uniformity, across a wafer to establish hotspot defect and variability maps. Finally, we combine defect prediction and verification capabilities for process monitoring by on-product, guided hotspot metrology, i.e. with sampling locations being determined from the defect prediction model and achieved prediction accuracy (capture rate) around 75%

Clean solutions to the incoming wafer quality impact on lithography process yield limits in a dynamic copper/low-k research and development environment

NASA Astrophysics Data System (ADS)

Lysaght, Patrick S.; Ybarra, Israel; Sax, Harry; Gupta, Gaurav; West, Michael; Doros, Theodore G.; Beach, James V.; Mello, Jim

2000-06-01

The continued growth of the semiconductor manufacturing industry has been due, in large part, to improved lithographic resolution and overlay across increasingly larger chip areas. Optical lithography continues to be the mainstream technology for the industry with extensions of optical lithography being employed to support 180 nm product and process development. While the industry momentum is behind optical extensions to 130 nm, the key challenge will be maintaining an adequate and affordable process latitude (depth of focus/exposure window) necessary for 10% post-etch critical dimension (CD) control. If the full potential of optical lithography is to be exploited, the current lithographic systems can not be compromised by incoming wafer quality. Impurity specifications of novel Low-k dielectric materials, plating solutions, chemical-mechanical planarization (CMP) slurries, and chemical vapor deposition (CVD) precursors are not well understood and more stringent control measures will be required to meet defect density targets as identified in the National Technology Roadmap for Semiconductors (NTRS). This paper identifies several specific poor quality wafer issues that have been effectively addressed as a result of the introduction of a set of flexible and reliable wafer back surface clean processes developed on the SEZ Spin-Processor 203 configured for processing of 200 mm diameter wafers. Patterned wafers have been back surface etched by means of a novel spin process contamination elimination (SpCE) technique with the wafer suspended by a dynamic nitrogen (N2) flow, device side down, via the Bernoulli effect. Figure 1 illustrates the wafer-chuck orientation within the process chamber during back side etch processing. This paper addresses a number of direct and immediate benefits to the MicraScan IIITM deep-ultraviolet (DUV) step-and-scan system at SEMATECH. These enhancements have resulted from the resolution of three significant problems: (1) back surface particle/residual contamination, (2) wafer flatness, and (3) control of contaminant materials such as copper (Cu). Data associated with the SpCE process, optimized for flatness improvement, particle removal, and Cu contamination control is presented in this paper, as it relates to excessive consumption of the usable depth of focus (UDOF) and comprehensive yield enhancement in photolithography. Additionally, data illustrating a highly effective means of eliminating copper from the wafer backside, bevel/edge, and frontside edge exclusion zone (0.5 mm - 3 mm), is presented. The data, obtained within the framework of standard and experimental copper/low-k device production at SEMATECH, quantifies the benefits of implementing the SEZ SpCE clean operation. Furthermore, this data confirms the feasibility of utilizing existing (non-copper) process equipment in conjunction with the development of copper applications by verifying the reliability and cost effectiveness of SpCE functionality.

100-nm gate lithography for double-gate transistors

NASA Astrophysics Data System (ADS)

Krasnoperova, Azalia A.; Zhang, Ying; Babich, Inna V.; Treichler, John; Yoon, Jung H.; Guarini, Kathryn; Solomon, Paul M.

2001-09-01

The double gate field effect transistor (FET) is an exploratory device that promises certain performance advantages compared to traditional CMOS FETs. It can be scaled down further than the traditional devices because of the greater electrostatic control by the gates on the channel (about twice as short a channel length for the same gate oxide thickness), has steeper sub-threshold slope and about double the current for the same width. This paper presents lithographic results for double gate FET's developed at IBM's T. J. Watson Research Center. The device is built on bonded wafers with top and bottom gates self-aligned to each other. The channel is sandwiched between the top and bottom polysilicon gates and the gate length is defined using DUV lithography. An alternating phase shift mask was used to pattern gates with critical dimensions of 75 nm, 100 nm and 125 nm in photoresist. 50 nm gates in photoresist have also been patterned by 20% over-exposure of nominal 100 nm lines. No trim mask was needed because of a specific way the device was laid out. UV110 photoresist from Shipley on AR-3 antireflective layer were used. Process windows, developed and etched patterns are presented.

Hurdles in low k1 mass production

NASA Astrophysics Data System (ADS)

Yim, Donggyu; Yang, Hyunjo; Park, Chanha; Hong, Jongkyun; Choi, Jaeseung

2005-05-01

As the optical lithography pushes toward its theoretical resolution limit 0.25k1, the application of aggressive Resolution Enhancement Techniques (RETs) are required in order to ensure necessary resolution, sufficient process window, and reasonable MEEF in critical layers. When chip makers are adopting RETs in low k1 device, there are a lot of crucial factors to take into account in the development and mass production. Those hurdles are not only difficult to overcome but also highly risky to the company, which adopts low k1 mass production strategy. But, low k1 production strategy is very attractive to all chip makers, owing to improving production capacity and cost of ownership. So, low k1 technology has been investigated by many lithography engineers. Lots of materials have been introduced. Most of them are just in RnD level. In this study, low k1 mass production issues shall be introduced, mainly. The definition of low k1 in mass production shall be suggested. And, a lot of low_k1 issues shall be introduced, also. Most of them were investigated/experienced in RnD development stage and final mass production line. Low k1 mass production, is some what different from only RnD development.

Optimizing laser produced plasmas for efficient extreme ultraviolet and soft X-ray light sources

NASA Astrophysics Data System (ADS)

Sizyuk, Tatyana; Hassanein, Ahmed

2014-08-01

Photon sources produced by laser beams with moderate laser intensities, up to 1014 W/cm2, are being developed for many industrial applications. The performance requirements for high volume manufacture devices necessitate extensive experimental research supported by theoretical plasma analysis and modeling predictions. We simulated laser produced plasma sources currently being developed for several applications such as extreme ultraviolet lithography using 13.5% ± 1% nm bandwidth, possibly beyond extreme ultraviolet lithography using 6.× nm wavelengths, and water-window microscopy utilizing 2.48 nm (La-α) and 2.88 nm (He-α) emission. We comprehensively modeled plasma evolution from solid/liquid tin, gadolinium, and nitrogen targets as three promising materials for the above described sources, respectively. Results of our analysis for plasma characteristics during the entire course of plasma evolution showed the dependence of source conversion efficiency (CE), i.e., laser energy to photons at the desired wavelength, on plasma electron density gradient. Our results showed that utilizing laser intensities which produce hotter plasma than the optimum emission temperatures allows increasing CE for all considered sources that, however, restricted by the reabsorption processes around the main emission region and this restriction is especially actual for the 6.× nm sources.

Generalization of the photo process window and its application to OPC test pattern design

NASA Astrophysics Data System (ADS)

Eisenmann, Hans; Peter, Kai; Strojwas, Andrzej J.

2003-07-01

From the early development phase up to the production phase, test pattern play a key role for microlithography. The requirement for test pattern is to represent the design well and to cover the space of all process conditions, e.g. to investigate the full process window and all other process parameters. This paper shows that the current state-of-the-art test pattern do not address these requirements sufficiently and makes suggestions for a better selection of test pattern. We present a new methodology to analyze an existing layout (e.g. logic library, test pattern or full chip) for critical layout situations which does not need precise process data. We call this method "process space decomposition", because it is aimed at decomposing the process impact to a layout feature into a sum of single independent contributions, the dimensions of the process space. This is a generalization of the classical process window, which examines defocus and exposure dependency of given test pattern, e.g. CD value of dense and isolated lines. In our process space we additionally define the dimensions resist effects, etch effects, mask error and misalignment, which describe the deviation of the printed silicon pattern from its target. We further extend it by the pattern space using a product based layout (library, full chip or synthetic test pattern). The criticality of pattern is defined by their deviation due to aerial image, their sensitivity to the respective dimension or several combinations of these. By exploring the process space for a given design, the method allows to find the most critical patterns independent of specific process parameters. The paper provides examples for different applications of the method: (1) selection of design oriented test pattern for lithography development (2) test pattern reduction in process characterization (3) verification/optimization of printability and performance of post processing procedures (like OPC) (4) creation of a sensitive process monitor.

A large format membrane-based x-ray mask for microfluidic chip fabrication

NASA Astrophysics Data System (ADS)

Wang, Lin; Zhang, Min; Desta, Yohannes; Melzak, J.; Wu, C. H.; Peng, Zhengchun

2006-02-01

X-ray lithography is a very good option for the fabrication of micro-devices especially when high aspect ratio patterns are required. Membrane-based x-ray masks are commonly used for high-resolution x-ray lithography. A thin layer of silicon nitride (Si3N4) or silicon carbide (SiC) film (1-2 µm) is normally used as the membrane material for x-ray mask fabrication (Wells G M, Reilly M, Nachman R, Cerrina F, El-Khakani M A and Chaker M 1993 Mater. Res. Soc. Conf. Proc. 306 81-9 Shoki T, Nagasawa H, Kosuga H, Yamaguchi Y, Annaka N, Amemiya I and Nagarekawa O 1993 SPIE Proc. 1924 450-6). The freestanding membrane window of an x-ray mask, which defines the exposing area of the x-ray mask, can be obtained by etching a pre-defined area on a silicon wafer from the backside (Wang L, Desta Y, Fettig R K, Goettert J, Hein H, Jakobs P and Chulz J 2004 J. Micromech. Microeng. 14 722-6). Usually, the window size of an x-ray mask is around 20 × 20 mm because of the low tensile stress of the membrane (10-100 MPa), and the larger window dimension of an x-ray mask may cause the deformation of membranes and lower the mask quality. However, x-ray masks with larger windows are preferred for micro-device fabrication in order to increase the productivity. We analyzed the factors which influence the flatness of large format x-ray masks and fabricated x-ray masks with a window size of 55 × 55 mm and 46 × 65 mm on 1 µm thick membranes by increasing the tensile stress of the membranes (>300 MPa) and optimizing the stress of the absorber layer. The large format x-ray mask was successfully applied for the fabrication of microfluidic chips.

Rigorous assessment of patterning solution of metal layer in 7 nm technology node

NASA Astrophysics Data System (ADS)

Gao, Weimin; Ciofi, Ivan; Saad, Yves; Matagne, Philippe; Bachmann, Michael; Gillijns, Werner; Lucas, Kevin; Demmerle, Wolfgang; Schmoeller, Thomas

2016-01-01

In a 7 nm node (N7), the logic design requires a critical poly pitch of 42 to 45 nm and a metal 1 (M1) pitch of 28 to 32 nm. Such high-pattern density pushes the 193 immersion lithography solution toward its limit and also brings extremely complex patterning scenarios. The N7 M1 layer may require a self-aligned quadruple patterning (SAQP) with a triple litho-etch (LE3) block process. Therefore, the whole patterning process flow requires multiple exposure+etch+deposition processes and each step introduces a particular impact on the pattern profiles and the topography. In this study, we have successfully integrated a simulation tool that enables emulation of the whole patterning flow with realistic process-dependent three-dimensional (3-D) profile and topology. We use this tool to study the patterning process variations of the N7 M1 layer including the overlay control, the critical dimension uniformity budget, and the lithographic process window (PW). The resulting 3-D pattern structure can be used to optimize the process flow, verify design rules, extract parasitics, and most importantly, simulate the electric field, and identify hot spots for dielectric reliability. As an example application, the maximum electric field at M1 tip-to-tip, which is one of the most critical patterning locations, has been simulated and extracted. The approach helps to investigate the impact of process variations on dielectric reliability. We have also assessed the alternative M1 patterning flow with a single exposure block using extreme ultraviolet lithography (EUVL) and analyzed its advantages compared to the LE3 block approach.

Optimum ArFi laser bandwidth for 10nm node logic imaging performance

NASA Astrophysics Data System (ADS)

Alagna, Paolo; Zurita, Omar; Timoshkov, Vadim; Wong, Patrick; Rechtsteiner, Gregory; Baselmans, Jan; Mailfert, Julien

2015-03-01

Lithography process window (PW) and CD uniformity (CDU) requirements are being challenged with scaling across all device types. Aggressive PW and yield specifications put tight requirements on scanner performance, especially on focus budgets resulting in complicated systems for focus control. In this study, an imec N10 Logic-type test vehicle was used to investigate the E95 bandwidth impact on six different Metal 1 Logic features. The imaging metrics that track the impact of light source E95 bandwidth on performance of hot spots are: process window (PW), line width roughness (LWR), and local critical dimension uniformity (LCDU). In the first section of this study, the impact of increasing E95 bandwidth was investigated to observe the lithographic process control response of the specified logic features. In the second section, a preliminary assessment of the impact of lower E95 bandwidth was performed. The impact of lower E95 bandwidth on local intensity variability was monitored through the CDU of line end features and the LWR power spectral density (PSD) of line/space patterns. The investigation found that the imec N10 test vehicle (with OPC optimized for standard E95 bandwidth of300fm) features exposed at 200fm showed pattern specific responses, suggesting areas of potential interest for further investigation.

Mask data processing in the era of multibeam writers

NASA Astrophysics Data System (ADS)

Abboud, Frank E.; Asturias, Michael; Chandramouli, Maesh; Tezuka, Yoshihiro

2014-10-01

Mask writers' architectures have evolved through the years in response to ever tightening requirements for better resolution, tighter feature placement, improved CD control, and tolerable write time. The unprecedented extension of optical lithography and the myriad of Resolution Enhancement Techniques have tasked current mask writers with ever increasing shot count and higher dose, and therefore, increasing write time. Once again, we see the need for a transition to a new type of mask writer based on massively parallel architecture. These platforms offer a step function improvement in both dose and the ability to process massive amounts of data. The higher dose and almost unlimited appetite for edge corrections open new windows of opportunity to further push the envelope. These architectures are also naturally capable of producing curvilinear shapes, making the need to approximate a curve with multiple Manhattan shapes unnecessary.

Data sharing system for lithography APC

NASA Astrophysics Data System (ADS)

Kawamura, Eiichi; Teranishi, Yoshiharu; Shimabara, Masanori

2007-03-01

We have developed a simple and cost-effective data sharing system between fabs for lithography advanced process control (APC). Lithography APC requires process flow, inter-layer information, history information, mask information and so on. So, inter-APC data sharing system has become necessary when lots are to be processed in multiple fabs (usually two fabs). The development cost and maintenance cost also have to be taken into account. The system handles minimum information necessary to make trend prediction for the lots. Three types of data have to be shared for precise trend prediction. First one is device information of the lots, e.g., process flow of the device and inter-layer information. Second one is mask information from mask suppliers, e.g., pattern characteristics and pattern widths. Last one is history data of the lots. Device information is electronic file and easy to handle. The electronic file is common between APCs and uploaded into the database. As for mask information sharing, mask information described in common format is obtained via Wide Area Network (WAN) from mask-vender will be stored in the mask-information data server. This information is periodically transferred to one specific lithography-APC server and compiled into the database. This lithography-APC server periodically delivers the mask-information to every other lithography-APC server. Process-history data sharing system mainly consists of function of delivering process-history data. In shipping production lots to another fab, the product-related process-history data is delivered by the lithography-APC server from the shipping site. We have confirmed the function and effectiveness of data sharing systems.

Nanoimprint lithography for nanodevice fabrication

NASA Astrophysics Data System (ADS)

Barcelo, Steven; Li, Zhiyong

2016-09-01

Nanoimprint lithography (NIL) is a compelling technique for low cost nanoscale device fabrication. The precise and repeatable replication of nanoscale patterns from a single high resolution patterning step makes the NIL technique much more versatile than other expensive techniques such as e-beam or even helium ion beam lithography. Furthermore, the use of mechanical deformation during the NIL process enables grayscale lithography with only a single patterning step, not achievable with any other conventional lithography techniques. These strengths enable the fabrication of unique nanoscale devices by NIL for a variety of applications including optics, plasmonics and even biotechnology. Recent advances in throughput and yield in NIL processes demonstrate the potential of being adopted for mainstream semiconductor device fabrication as well.

Stability and imaging of the ASML EUV alpha demo tool

NASA Astrophysics Data System (ADS)

Hermans, Jan V.; Baudemprez, Bart; Lorusso, Gian; Hendrickx, Eric; van Dijk, Andre; Jonckheere, Rik; Goethals, Anne-Marie

2009-03-01

Extreme Ultra-Violet (EUV) lithography is the leading candidate for semiconductor manufacturing of the 22nm technology node and beyond, due to the very short wavelength of 13.5nm. However, reducing the wavelength adds complexity to the lithographic process. The impact of the EUV specific conditions on lithographic performance needs to be understood, before bringing EUV lithography into pre-production. To provide early learning on EUV, an EUV fullfield scanner, the Alpha Demo Tool (ADT) from ASML was installed at IMEC, using a Numerical Aperture (NA) of 0.25. In this paper we report on different aspects of the ADT: the imaging and overlay performance and both short and long-term stability. For 40nm dense Lines-Spaces (LS), the ADT shows an across field overlapping process window of 270nm Depth Of Focus (DOF) at 10% Exposure Latitude (EL) and a wafer CD Uniformity (CDU) of 3nm 3σ, without any corrections for process or reticle. The wafer CDU is correlated to different factors that are known to influence the CD fingerprint from traditional lithography: slit intensity uniformity, focus plane deviation and reticle CD error. Taking these contributions into account, the CD through slit fingerprint for 40nm LS is simulated with excellent agreement to experimental data. The ADT shows good CD stability over 9 months of operation, both intrafield and across wafer. The projection optics reflectivity has not degraded over 9 months. Measured overlay performance with respect to a dry tool shows |Mean|+3σ below 20nm with more correction potential by applying field-by-field corrections (|Mean|+3σ <=10nm). For 22nm SRAM application, both contact hole and metal layer were printed in EUV with 10% CD and 15nm overlay control. Below 40nm, the ADT shows good wafer CDU for 30nm dense and isolated lines (on the same wafer) and 38nm dense Contact Holes (CH). First 28nm dense line CDU data are achieved. The results indicate that the ADT can be used effectively for EUV process development before installation of the pre-production tool, the ASML NXE Gen. 1 at IMEC.

Optimized plasma etch window of block copolymers and neutral brush layers for enhanced direct self-assembly pattern transfer into a hardmask layer

NASA Astrophysics Data System (ADS)

Brakensiek, Nickolas; Xu, Kui; Sweat, Daniel; Hockey, Mary Ann

2018-03-01

Directed self-assembly (DSA) of block copolymers (BCPs) is one of the most promising patterning technologies for future lithography nodes. However, one of the biggest challenges to DSA is the pattern transfer by plasma etching from BCP to hardmask (HM) because the etch selectivity between BCP and neutral brush layer underneath is usually not high enough to enable robust pattern transfer. This paper will explore the plasma etch conditions of both BCPs and neutral brush layers that may improve selectivity and allow a more robust pattern transfer of DSA patterns into the hardmask layer. The plasma etching parameters that are under investigation include the selection of oxidative or reductive etch chemistries, as well as plasma gas pressure, power, and gas mixture fractions. Investigation into the relationship between BCP/neutral brush layer materials with varying chemical compositions and the plasma etching conditions will be highlighted. The culmination of this work will demonstrate important etch parameters that allow BCPs and neutral brush layers to be etched into the underlying hardmask layer with a large process window.

Optical proximity correction for anamorphic extreme ultraviolet lithography

NASA Astrophysics Data System (ADS)

Clifford, Chris; Lam, Michael; Raghunathan, Ananthan; Jiang, Fan; Fenger, Germain; Adam, Kostas

2017-10-01

The change from isomorphic to anamorphic optics in high numerical aperture extreme ultraviolet scanners necessitates changes to the mask data preparation flow. The required changes for each step in the mask tape out process are discussed, with a focus on optical proximity correction (OPC). When necessary, solutions to new problems are demonstrated and verified by rigorous simulation. Additions to the OPC model include accounting for anamorphic effects in the optics, mask electromagnetics, and mask manufacturing. The correction algorithm is updated to include awareness of anamorphic mask geometry for mask rule checking. OPC verification through process window conditions is enhanced to test different wafer scale mask error ranges in the horizontal and vertical directions. This work will show that existing models and methods can be updated to support anamorphic optics without major changes. Also, the larger mask size in the Y direction can result in better model accuracy, easier OPC convergence, and designs that are more tolerant to mask errors.

Demonstration of lithography patterns using reflective e-beam direct write

NASA Astrophysics Data System (ADS)

Freed, Regina; Sun, Jeff; Brodie, Alan; Petric, Paul; McCord, Mark; Ronse, Kurt; Haspeslagh, Luc; Vereecke, Bart

2011-04-01

Traditionally, e-beam direct write lithography has been too slow for most lithography applications. E-beam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the uncertainty with regards to the optical lithography roadmap beyond the 22 nm technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for high volume wafer processing. For this work, we report on the development and current status of a new maskless, direct write e-beam lithography tool which has the potential for high volume lithography at and below the 22 nm technology node. A Reflective Electron Beam Lithography (REBL) tool is being developed for high throughput electron beam direct write maskless lithography. The system is targeting critical patterning steps at the 22 nm node and beyond at a capital cost equivalent to conventional lithography. Reflective Electron Beam Lithography incorporates a number of novel technologies to generate and expose lithographic patterns with a throughput and footprint comparable to current 193 nm immersion lithography systems. A patented, reflective electron optic or Digital Pattern Generator (DPG) enables the unique approach. The Digital Pattern Generator is a CMOS ASIC chip with an array of small, independently controllable lens elements (lenslets), which act as an array of electron mirrors. In this way, the REBL system is capable of generating the pattern to be written using massively parallel exposure by ~1 million beams at extremely high data rates (~ 1Tbps). A rotary stage concept using a rotating platen carrying multiple wafers optimizes the writing strategy of the DPG to achieve the capability of high throughput for sparse pattern wafer levels. The lens elements on the DPG are fabricated at IMEC (Leuven, Belgium) under IMEC's CMORE program. The CMOS fabricated DPG contains ~ 1,000,000 lens elements, allowing for 1,000,000 individually controllable beamlets. A single lens element consists of 5 electrodes, each of which can be set at controlled voltage levels to either absorb or reflect the electron beam. A system using a linear movable stage and the DPG integrated into the electron optics module was used to expose patterns on device representative wafers. Results of these exposure tests are discussed.

Optically resilient 3D micro-optics on the tips of optical fibers

NASA Astrophysics Data System (ADS)

Jonušauskas, Linas

2017-05-01

In this paper we present a study aimed at investigating an optical resiliency of polymers that could be applied in 3D femtosecond laser lithography. These include popular in lithography SU8 and OrmoClear as well as hybrid organic-inorganic zirconium containing SZ2080. We show that latter material in its pure (non-photosensitized) form has the best optical resiliency out of all tested materials. Furthermore, its 3D structurability is investigated. Despite threshold-like quality degradation outside fabrication window, we show that this material is suitable for creating complex 3D structures on the tips of optical fibers. Overall it is demonstrated, that unique capability of 3DLL to structure pure materials can lead to very compact functional fiber-based devices that could withstand high (GW/cm2) light intensities.

United States Air Force High School Apprenticeship Program. 1990 Program Management Report. Volume 3

DTIC Science & Technology

1991-04-18

User Guide Shelly Knupp 73 Computer-Aided Design (CAD) Area Christopher O’Dell 74 Electron Beam Lithography Suzette Yu 68 Flight Dynamics Laboratory 75...fabrication. I Mr. Ed Davis, for the background knowledge of device processes and I information on electron beam lithography . Captain Mike Cheney, for...researcher may write gates on to the wafer by a process called lithography . This is the most crucial and complex part of the process. Two types of proven

Rigorous ILT optimization for advanced patterning and design-process co-optimization

NASA Astrophysics Data System (ADS)

Selinidis, Kosta; Kuechler, Bernd; Cai, Howard; Braam, Kyle; Hoppe, Wolfgang; Domnenko, Vitaly; Poonawala, Amyn; Xiao, Guangming

2018-03-01

Despite the large difficulties involved in extending 193i multiple patterning and the slow ramp of EUV lithography to full manufacturing readiness, the pace of development for new technology node variations has been accelerating. Multiple new variations of new and existing technology nodes have been introduced for a range of device applications; each variation with at least a few new process integration methods, layout constructs and/or design rules. This had led to a strong increase in the demand for predictive technology tools which can be used to quickly guide important patterning and design co-optimization decisions. In this paper, we introduce a novel hybrid predictive patterning method combining two patterning technologies which have each individually been widely used for process tuning, mask correction and process-design cooptimization. These technologies are rigorous lithography simulation and inverse lithography technology (ILT). Rigorous lithography simulation has been extensively used for process development/tuning, lithography tool user setup, photoresist hot-spot detection, photoresist-etch interaction analysis, lithography-TCAD interactions/sensitivities, source optimization and basic lithography design rule exploration. ILT has been extensively used in a range of lithographic areas including logic hot-spot fixing, memory layout correction, dense memory cell optimization, assist feature (AF) optimization, source optimization, complex patterning design rules and design-technology co-optimization (DTCO). The combined optimization capability of these two technologies will therefore have a wide range of useful applications. We investigate the benefits of the new functionality for a few of these advanced applications including correction for photoresist top loss and resist scumming hotspots.

Photoluminescence enhancement of silicon quantum dot monolayer by plasmonic substrate fabricated by nano-imprint lithography

NASA Astrophysics Data System (ADS)

Yanagawa, Hiroto; Inoue, Asuka; Sugimoto, Hiroshi; Shioi, Masahiko; Fujii, Minoru

2017-12-01

Near-field coupling between a silicon quantum dot (Si-QD) monolayer and a plasmonic substrate fabricated by nano-imprint lithography and having broad multiple resonances in the near-infrared (NIR) window of biological substances was studied by precisely controlling the QDs-substrate distance. A strong enhancement of the NIR photoluminescence (PL) of Si-QDs was observed. Detailed analyses of the PL and PL excitation spectra, the PL decay dynamics, and the reflectance spectra revealed that both the excitation cross-sections and the emission rates are enhanced by the surface plasmon resonances, thanks to the broad multiple resonances of the plasmonic substrate, and that the relative contribution of the two enhancement processes depends strongly on the excitation wavelength. Under excitation by short wavelength photons (405 nm), where enhancement of the excitation cross-section is not expected, the maximum enhancement was obtained when the QDs-substrate distance was around 30 nm. On the other hand, under long wavelength excitation (641 nm), where strong excitation cross-section enhancement is expected, the largest enhancement was obtained when the distance was minimum (around 1 nm). The achievement of efficient excitation of NIR luminescence of Si-QDs by long wavelength photons paves the way for the development of Si-QD-based fluorescence bio-sensing devices with a high bound-to-free ratio.

Optofluidic encapsulation and manipulation of silicon microchips using image processing based optofluidic maskless lithography and railed microfluidics.

PubMed

Chung, Su Eun; Lee, Seung Ah; Kim, Jiyun; Kwon, Sunghoon

2009-10-07

We demonstrate optofluidic encapsulation of silicon microchips using image processing based optofluidic maskless lithography and manipulation using railed microfluidics. Optofluidic maskless lithography is a dynamic photopolymerization technique of free-floating microstructures within a fluidic channel using spatial light modulator. Using optofluidic maskless lithography via computer-vision aided image processing, polymer encapsulants are fabricated for chip protection and guiding-fins for efficient chip conveying within a fluidic channel. Encapsulated silicon chips with guiding-fins are assembled using railed microfluidics, which is an efficient guiding and heterogeneous self-assembly system of microcomponents. With our technology, externally fabricated silicon microchips are encapsulated, fluidically guided and self-assembled potentially enabling low cost fluidic manipulation and assembly of integrated circuits.

Directed Self-Assembly of Triblock Copolymer on Chemical Patterns for Sub-10-nm Nanofabrication via Solvent Annealing.

PubMed

Xiong, Shisheng; Wan, Lei; Ishida, Yoshihito; Chapuis, Yves-Andre; Craig, Gordon S W; Ruiz, Ricardo; Nealey, Paul F

2016-08-23

Directed self-assembly (DSA) of block copolymers (BCPs) is a leading strategy to pattern at sublithographic resolution in the technology roadmap for semiconductors and is the only known solution to fabricate nanoimprint templates for the production of bit pattern media. While great progress has been made to implement block copolymer lithography with features in the range of 10-20 nm, patterning solutions below 10 nm are still not mature. Many BCP systems self-assemble at this length scale, but challenges remain in simultaneously tuning the interfacial energy atop the film to control the orientation of BCP domains, designing materials, templates, and processes for ultra-high-density DSA, and establishing a robust pattern transfer strategy. Among the various solutions to achieve domains that are perpendicular to the substrate, solvent annealing is advantageous because it is a versatile method that can be applied to a diversity of materials. Here we report a DSA process based on chemical contrast templates and solvent annealing to fabricate 8 nm features on a 16 nm pitch. To make this possible, a number of innovations were brought in concert with a common platform: (1) assembling the BCP in the phase-separated, solvated state, (2) identifying a larger process window for solvated triblock vs diblock BCPs as a function of solvent volume fraction, (3) employing templates for sub-10-nm BCP systems accessible by lithography, and (4) integrating a robust pattern transfer strategy by vapor infiltration of organometallic precursors for selective metal oxide synthesis to prepare an inorganic hard mask.

Integration of multiple theories for the simulation of laser interference lithography processes

NASA Astrophysics Data System (ADS)

Lin, Te-Hsun; Yang, Yin-Kuang; Fu, Chien-Chung

2017-11-01

The periodic structure of laser interference lithography (LIL) fabrication is superior to other lithography technologies. In contrast to traditional lithography, LIL has the advantages of being a simple optical system with no mask requirements, low cost, high depth of focus, and large patterning area in a single exposure. Generally, a simulation pattern for the periodic structure is obtained through optical interference prior to its fabrication through LIL. However, the LIL process is complex and combines the fields of optical and polymer materials; thus, a single simulation theory cannot reflect the real situation. Therefore, this research integrates multiple theories, including those of optical interference, standing waves, and photoresist characteristics, to create a mathematical model for the LIL process. The mathematical model can accurately estimate the exposure time and reduce the LIL process duration through trial and error.

Integration of multiple theories for the simulation of laser interference lithography processes.

PubMed

Lin, Te-Hsun; Yang, Yin-Kuang; Fu, Chien-Chung

2017-11-24

The periodic structure of laser interference lithography (LIL) fabrication is superior to other lithography technologies. In contrast to traditional lithography, LIL has the advantages of being a simple optical system with no mask requirements, low cost, high depth of focus, and large patterning area in a single exposure. Generally, a simulation pattern for the periodic structure is obtained through optical interference prior to its fabrication through LIL. However, the LIL process is complex and combines the fields of optical and polymer materials; thus, a single simulation theory cannot reflect the real situation. Therefore, this research integrates multiple theories, including those of optical interference, standing waves, and photoresist characteristics, to create a mathematical model for the LIL process. The mathematical model can accurately estimate the exposure time and reduce the LIL process duration through trial and error.

Simulation of the effect of incline incident angle in DMD Maskless Lithography

NASA Astrophysics Data System (ADS)

Liang, L. W.; Zhou, J. Y.; Xiang, L. L.; Wang, B.; Wen, K. H.; Lei, L.

2017-06-01

The aim of this study is to provide a simulation method for investigation of the intensity fluctuation caused by the inclined incident angle in DMD (digital micromirror device) maskless lithography. The simulation consists of eight main processes involving the simplification of the DMD aperture function and light propagation utilizing the non-parallel angular spectrum method. These processes provide a possibility of co-simulation in the spatial frequency domain, which combines the microlens array and DMD in the maskless lithography system. The simulation provided the spot shape and illumination distribution. These two parameters are crucial in determining the exposure dose in the existing maskless lithography system.

Range pattern matching with layer operations and continuous refinements

NASA Astrophysics Data System (ADS)

Tseng, I.-Lun; Lee, Zhao Chuan; Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Ong, Jonathan Yoong Seang

2018-03-01

At advanced and mainstream process nodes (e.g., 7nm, 14nm, 22nm, and 55nm process nodes), lithography hotspots can exist in layouts of integrated circuits even if the layouts pass design rule checking (DRC). Existence of lithography hotspots in a layout can cause manufacturability issues, which can result in yield losses of manufactured integrated circuits. In order to detect lithography hotspots existing in physical layouts, pattern matching (PM) algorithms and commercial PM tools have been developed. However, there are still needs to use DRC tools to perform PM operations. In this paper, we propose a PM synthesis methodology, which uses a continuous refinement technique, for the automatic synthesis of a given lithography hotspot pattern into a DRC deck, which consists of layer operation commands, so that an equivalent PM operation can be performed by executing the synthesized deck with the use of a DRC tool. Note that the proposed methodology can deal with not only exact patterns, but also range patterns. Also, lithography hotspot patterns containing multiple layers can be processed. Experimental results show that the proposed methodology can accurately and efficiently detect lithography hotspots in physical layouts.

Study on photochemical analysis system (VLES) for EUV lithography

NASA Astrophysics Data System (ADS)

Sekiguchi, A.; Kono, Y.; Kadoi, M.; Minami, Y.; Kozawa, T.; Tagawa, S.; Gustafson, D.; Blackborow, P.

2007-03-01

A system for photo-chemical analysis of EUV lithography processes has been developed. This system has consists of 3 units: (1) an exposure that uses the Z-Pinch (Energetiq Tech.) EUV Light source (DPP) to carry out a flood exposure, (2) a measurement system RDA (Litho Tech Japan) for the development rate of photo-resists, and (3) a simulation unit that utilizes PROLITH (KLA-Tencor) to calculate the resist profiles and process latitude using the measured development rate data. With this system, preliminary evaluation of the performance of EUV lithography can be performed without any lithography tool (Stepper and Scanner system) that is capable of imaging and alignment. Profiles for 32 nm line and space pattern are simulated for the EUV resist (Posi-2 resist by TOK) by using VLES that hat has sensitivity at the 13.5nm wavelength. The simulation successfully predicts the resist behavior. Thus it is confirmed that the system enables efficient evaluation of the performance of EUV lithography processes.

Application specific beam profiles: new surface and thin-film refinement processes using beam shaping technologies

NASA Astrophysics Data System (ADS)

Hauschild, Dirk

2017-02-01

Today, the use of laser photons for materials processing is a key technology in nearly all industries. Most of the applications use circular beam shapes with Gaussian intensity distribution that is given by the resonator of the laser or by the power delivery via optical fibre. These beam shapes can be typically used for material removal with cutting or drilling and for selective removal of material layers with ablation processes. In addition to the removal of materials, it is possible to modify and improve the material properties in case the dose of laser photons and the resulting light-material interaction addresses a defined window of energy and dwell-time. These process windows have typically dwell-times between µs and s because of using sintering, melting, thermal diffusion or photon induced chemical and physical reaction mechanisms. Using beam shaping technologies the laser beam profiles can be adapted to the material properties and time-temperature and the space-temperature envelopes can be modified to enable selective annealing or crystallization of layers or surfaces. Especially the control of the process energy inside the beam and at its edges opens a large area of laser applications that can be addressed only with an optimized spatial and angular beam profile with down to sub-percent intensity variation used in e.g. immersion lithography tools with ArF laser sources. LIMO will present examples for new beam shapes and related material refinement processes even on large surfaces and give an overview about new mechanisms in laser material processing for current and coming industrial applications.

Lithographic performance comparison with various RET for 45-nm node with hyper NA

NASA Astrophysics Data System (ADS)

Adachi, Takashi; Inazuki, Yuichi; Sutou, Takanori; Kitahata, Yasuhisa; Morikawa, Yasutaka; Toyama, Nobuhito; Mohri, Hiroshi; Hayashi, Naoya

2006-05-01

In order to realize 45 nm node lithography, strong resolution enhancement technology (RET) and water immersion will be needed. In this research, we discussed about various RET performance comparison for 45 nm node using 3D rigorous simulation. As a candidate, we chose binary mask (BIN), several kinds of attenuated phase-shifting mask (att-PSM) and chrome-less phase-shifting lithography mask (CPL). The printing performance was evaluated and compared for each RET options, after the optimizing illumination conditions, mask structure and optical proximity correction (OPC). The evaluation items of printing performance were CD-DOF, contrast-DOF, conventional ED-window and MEEF, etc. It's expected that effect of mask 3D topography becomes important at 45 nm node, so we argued about not only the case of ideal structures, but also the mask topography error effects. Several kinds of mask topography error were evaluated and we confirmed how these errors affect to printing performance.

A two-in-one process for reliable graphene transistors processed with photo-lithography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahlberg, P.; Hinnemo, M.; Song, M.

2015-11-16

Research on graphene field-effect transistors (GFETs) has mainly relied on devices fabricated using electron-beam lithography for pattern generation, a method that has known problems with polymer contaminants. GFETs fabricated via photo-lithography suffer even worse from other chemical contaminations, which may lead to strong unintentional doping of the graphene. In this letter, we report on a scalable fabrication process for reliable GFETs based on ordinary photo-lithography by eliminating the aforementioned issues. The key to making this GFET processing compatible with silicon technology lies in a two-in-one process where a gate dielectric is deposited by means of atomic layer deposition. During thismore » deposition step, contaminants, likely unintentionally introduced during the graphene transfer and patterning, are effectively removed. The resulting GFETs exhibit current-voltage characteristics representative to that of intrinsic non-doped graphene. Fundamental aspects pertaining to the surface engineering employed in this work are investigated in the light of chemical analysis in combination with electrical characterization.« less

OML: optical maskless lithography for economic design prototyping and small-volume production

NASA Astrophysics Data System (ADS)

Sandstrom, Tor; Bleeker, Arno; Hintersteiner, Jason; Troost, Kars; Freyer, Jorge; van der Mast, Karel

2004-05-01

The business case for Maskless Lithography is more compelling than ever before, due to more critical processes, rising mask costs and shorter product cycles. The economics of Maskless Lithography gives a crossover volume from Maskless to mask-based lithography at surprisingly many wafers per mask for surprisingly few wafers per hour throughput. Also, small-volume production will in many cases be more economical with Maskless Lithography, even when compared to "shuttle" schemes, reticles with multiple layers, etc. The full benefit of Maskless Lithography is only achievable by duplicating processes that are compatible with volume production processes on conventional scanners. This can be accomplished by the integration of pattern generators based on spatial light modulator technology with state-of-the-art optical scanner systems. This paper reports on the system design of an Optical Maskless Scanner in development by ASML and Micronic: small-field optics with high demagnification, variable NA and illumination schemes, spatial light modulators with millions of MEMS mirrors on CMOS drivers, a data path with a sustained data flow of more than 250 GPixels per second, stitching of sub-fields to scanner fields, and rasterization and writing strategies for throughput and good image fidelity. Predicted lithographic performance based on image simulations is also shown.

Development of nanoimprint lithography templates for the contact hole layer application (Conference Presentation)

NASA Astrophysics Data System (ADS)

Ichimura, Koji; Hikichi, Ryugo; Harada, Saburo; Kanno, Koichi; Kurihara, Masaaki; Hayashi, Naoya

2017-04-01

Nanoimprint lithography, NIL, is gathering much attention as one of the most potential candidates for the next generation lithography for semiconductor. This technology needs no pattern data modification for exposure, simpler exposure system, and single step patterning process without any coat/develop truck, and has potential of cost effective patterning rather than very complex optical lithography and/or EUV lithography. NIL working templates are made by the replication of the EB written high quality master templates. Fabrication of high resolution master templates is one of the most important issues. Since NIL is 1:1 pattern transfer process, master templates have 4 times higher resolution compared with photomasks. Another key is to maintain the quality of the master templates in replication process. NIL process is applied for the template replication and this imprint process determines most of the performance of the replicated templates. Expectations to the NIL are not only high resolution line and spaces but also the contact hole layer application. Conventional ArF-i lithography has a certain limit in size and pitch for contact hole fabrication. On the other hand, NIL has good pattern fidelity for contact hole fabrication at smaller sizes and pitches compared with conventional optical lithography. Regarding the tone of the templates for contact hole, there are the possibilities of both tone, the hole template and the pillar template, depending on the processes of the wafer side. We have succeeded to fabricate both types of templates at 2xnm in size. In this presentation, we will be discussing fabrication or our replica template for the contact hole layer application. Both tone of the template fabrication will be presented as well as the performance of the replica templates. We will also discuss the resolution improvement of the hole master templates by using various e-beam exposure technologies.

Theoretical study of fabrication of line-and-space patterns with 7 nm quarter-pitch using electron beam lithography with chemically amplified resist process: III. Post exposure baking on quartz substrates

NASA Astrophysics Data System (ADS)

Kozawa, Takahiro

2015-09-01

Electron beam (EB) lithography is a key technology for the fabrication of photomasks for ArF immersion and extreme ultraviolet (EUV) lithography and molds for nanoimprint lithography. In this study, the temporal change in the chemical gradient of line-and-space patterns with a 7 nm quarter-pitch (7 nm space width and 21 nm line width) was calculated until it became constant, independently of postexposure baking (PEB) time, to clarify the feasibility of single nano patterning on quartz substrates using EB lithography with chemically amplified resist processes. When the quencher diffusion constant is the same as the acid diffusion constant, the maximum chemical gradient of the line-and-space pattern with a 7 nm quarter-pitch did not differ much from that with a 14 nm half-pitch under the condition described above. Also, from the viewpoint of process control, a low quencher diffusion constant is considered to be preferable for the fabrication of line-and-space patterns with a 7 nm quarter-pitch on quartz substrates.

Development of high damage threshold laser-machined apodizers and gain filters for laser applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rambo, Patrick; Schwarz, Jens; Kimmel, Mark

We have developed high damage threshold filters to modify the spatial profile of a high energy laser beam. The filters are formed by laser ablation of a transmissive window. The ablation sites constitute scattering centers which can be filtered in a subsequent spatial filter. Finally, by creating the filters in dielectric materials, we see an increased laser-induced damage threshold from previous filters created using ‘metal on glass’ lithography.

Development of high damage threshold laser-machined apodizers and gain filters for laser applications

DOE PAGES

Rambo, Patrick; Schwarz, Jens; Kimmel, Mark; ...

2016-09-27

We have developed high damage threshold filters to modify the spatial profile of a high energy laser beam. The filters are formed by laser ablation of a transmissive window. The ablation sites constitute scattering centers which can be filtered in a subsequent spatial filter. Finally, by creating the filters in dielectric materials, we see an increased laser-induced damage threshold from previous filters created using ‘metal on glass’ lithography.

M&A For Lithography Of Sparse Arrays Of Sub-Micrometer Features

DOEpatents

Brueck, Steven R.J.; Chen, Xiaolan; Zaidi, Saleem; Devine, Daniel J.

1998-06-02

Methods and apparatuses are disclosed for the exposure of sparse hole and/or mesa arrays with line:space ratios of 1:3 or greater and sub-micrometer hole and/or mesa diameters in a layer of photosensitive material atop a layered material. Methods disclosed include: double exposure interferometric lithography pairs in which only those areas near the overlapping maxima of each single-period exposure pair receive a clearing exposure dose; double interferometric lithography exposure pairs with additional processing steps to transfer the array from a first single-period interferometric lithography exposure pair into an intermediate mask layer and a second single-period interferometric lithography exposure to further select a subset of the first array of holes; a double exposure of a single period interferometric lithography exposure pair to define a dense array of sub-micrometer holes and an optical lithography exposure in which only those holes near maxima of both exposures receive a clearing exposure dose; combination of a single-period interferometric exposure pair, processing to transfer resulting dense array of sub-micrometer holes into an intermediate etch mask, and an optical lithography exposure to select a subset of initial array to form a sparse array; combination of an optical exposure, transfer of exposure pattern into an intermediate mask layer, and a single-period interferometric lithography exposure pair; three-beam interferometric exposure pairs to form sparse arrays of sub-micrometer holes; five- and four-beam interferometric exposures to form a sparse array of sub-micrometer holes in a single exposure. Apparatuses disclosed include arrangements for the three-beam, five-beam and four-beam interferometric exposures.

Micro-fabrication method of graphite mesa microdevices based on optical lithography technology

NASA Astrophysics Data System (ADS)

Zhang, Cheng; Wen, Donghui; Zhu, Huamin; Zhang, Xiaorui; Yang, Xing; Shi, Yunsheng; Zheng, Tianxiang

2017-12-01

Graphite mesa microdevices have incommensurate contact nanometer interfaces, superlubricity, high-speed self-retraction, and other characteristics, which have potential applications in high-performance oscillators and micro-scale switches, memory devices, and gyroscopes. However, the current method of fabricating graphite mesa microdevices is mainly based on high-cost, low efficiency electron beam lithography technology. In this paper, the processing technologies of graphite mesa microdevices with various shapes and sizes were investigated by a low-cost micro-fabrication method, which was mainly based on optical lithography technology. The characterization results showed that the optical lithography technology could realize a large-area of patterning on the graphite surface, and the graphite mesa microdevices, which have a regular shape, neat arrangement, and high verticality could be fabricated in large batches through optical lithography technology. The experiments and analyses showed that the graphite mesa microdevices fabricated through optical lithography technology basically have the same self-retracting characteristics as those fabricated through electron beam lithography technology, and the maximum size of the graphite mesa microdevices with self-retracting phenomenon can reach 10 µm  ×  10 µm. Therefore, the proposed method of this paper can realize the high-efficiency and low-cost processing of graphite mesa microdevices, which is significant for batch fabrication and application of graphite mesa microdevices.

An investigation on defect-generation conditions in immersion lithography

NASA Astrophysics Data System (ADS)

Tomita, Tadatoshi; Shimoaoki, Takeshi; Enomoto, Masashi; Kyoda, Hideharu; Kitano, Junichi; Suganaga, Toshifumi

2006-03-01

As a powerful candidate for a lithography technique that can accommodate the scaling-down of semiconductors, 193-nm immersion lithography-which realizes a high numerical aperture (NA) and uses deionized water as the medium between the lens and wafer in the exposure system-has been developing at a rapid pace and has reached the stage of practical application. In regards to defects that are a cause for concern in the case of 193-nm immersion lithography, however, many components are still unclear and many problems remain to be solved. It has been pointed out, for example, that in the case of 193-nm immersion lithography, immersion of the resist film in deionized water during exposure causes infiltration of moisture into the resist film, internal components of the resist dissolve into the deionized water, and residual water generated during exposure affects post-processing. Moreover, to prevent this influence of directly immersing the resist in de-ionized water, application of a protective film is regarded as effective. However, even if such a film is applied, it is still highly likely that the above-mentioned defects will still occur. Accordingly, to reduce these defects, it is essential to identify the typical defects occurring in 193-nm immersion lithography and to understand the condition for generation of defects by using some kinds of protective films and resist materials. Furthermore, from now onwards, with further scaling down of semiconductors, it is important to maintain a clear understanding of the relation between defect-generation conditions and critical dimensions (CD). Aiming to extract typical defects occurring in 193-nm immersion lithography, the authors carried out a comparative study with dry exposure lithography, thereby confirming several typical defects associated with immersion lithography. We then investigated the conditions for generation of defects in the case of some kinds of protective films. In addition to that, by investigating the defect-generation conditions and comparing the classification data between wet and dry exposure, we were able to determine the origin of each particular defect involved in immersion lithography. Furthermore, the comparison of CD for wet and dry processing could indicate the future defectivity levels to be expected with shrinking immersion process critical dimensions.

Microsystems Research in Japan

DTIC Science & Technology

2003-09-01

microsystems applications, like microfluidic systems, will require more than planar lithography -based fabrication processes. The committee was impressed by the...United States focused on exploiting silicon planar lithography as the core technology for microstructure fabrication, whereas Japan explored a wide...including LIGA and its extensions, micro-stereolithography, and e-beam lithography . The range of materials seen in Japan was broader than in the

Overlap junctions for high coherence superconducting qubits

NASA Astrophysics Data System (ADS)

Wu, X.; Long, J. L.; Ku, H. S.; Lake, R. E.; Bal, M.; Pappas, D. P.

2017-07-01

Fabrication of sub-micron Josephson junctions is demonstrated using standard processing techniques for high-coherence, superconducting qubits. These junctions are made in two separate lithography steps with normal-angle evaporation. Most significantly, this work demonstrates that it is possible to achieve high coherence with junctions formed on aluminum surfaces cleaned in situ by Ar plasma before junction oxidation. This method eliminates the angle-dependent shadow masks typically used for small junctions. Therefore, this is conducive to the implementation of typical methods for improving margins and yield using conventional CMOS processing. The current method uses electron-beam lithography and an additive process to define the top and bottom electrodes. Extension of this work to optical lithography and subtractive processes is discussed.

The novel solution for negative impact of out-of-band and outgassing by top coat materials in EUVL

NASA Astrophysics Data System (ADS)

Fujitani, Noriaki; Sakamoto, Rikimaru; Endo, Takafumi; Onishi, Ryuji; Nishita, Tokio; Yaguchi, Hiroaki; Ho, Bang-Ching

2013-03-01

EUV lithography (EUVL) is the most promising candidate of next generation technology for hp20nm node device manufacturing and beyond. However, the power of light source, masks and photo resists are the most critical issues for driving the EUVL. Especially, concerning about deterioration of the patterning performance by Out-of-Band (OoB) light existing in the EUV light, and contamination problem of exposure tool due to the resist outgassing are the key issues which have to be resolved in the material view point toward the high volume manufacturing by EUVL. This paper proposes the solution for these critical issues by applying the top coat material. The key characteristics for top coat material are the protection of the OoB effect, the prevention of the outgassing from resist as a barrier layer and enhancement of photo resist performance, like resist profile and process window. This paper describes the material design and performance. The optical property needs having the high absorbance of DUV light in OoB range and high transmittance for 13.5nm wavelength. Outgassing barrier property needs high broking property against non contamination chemical species from photo resist outgassing. The study of TOF-SIMS analysis indicates how much the polymer chemistry can impact for outgassing barrier property. The dependency of material design and lithography performance is also discussed.

ArF halftone PSM cleaning process optimization for next-generation lithography

NASA Astrophysics Data System (ADS)

Son, Yong-Seok; Jeong, Seong-Ho; Kim, Jeong-Bae; Kim, Hong-Seok

2000-07-01

ArF lithography which is expected for the next generation optical lithography is adapted for 0.13 micrometers design-rule and beyond. ArF half-tone phase shift mask (HT PSM) will be applied as 1st generation of ArF lithography. Also ArF PSM cleaning demands by means of tighter controls related to phase angle, transmittance and contamination on the masks. Phase angle on ArF HT PSM should be controlled within at least +/- 3 degree and transmittance controlled within at least +/- 3 percent after cleaning process and pelliclization. In the cleaning process of HT PSM, requires not only the remove the particle on mask, but also control to half-tone material for metamorphosis. Contamination defects on the Qz of half tone type PSM is not easy to remove on the photomask surface. New technology and methods of cleaning will be developed in near future, but we try to get out for limit contamination on the mask, without variation of phase angle and transmittance after cleaning process.

Metal1 patterning study for random-logic applications with 193i, using calibrated OPC for litho and etch

NASA Astrophysics Data System (ADS)

Mailfert, Julien; Van de Kerkhove, Jeroen; De Bisschop, Peter; De Meyer, Kristin

2014-03-01

A Metal1-layer (M1) patterning study is conducted on 20nm node (N20) for random-logic applications. We quantified the printability performance on our test vehicle for N20, corresponding to Poly/M1 pitches of 90/64nm, and with a selected minimum M1 gap size of 70nm. The Metal1 layer is patterned with 193nm immersion lithography (193i) using Negative Tone Developer (NTD) resist, and a double-patterning Litho-Etch-Litho-Etch (LELE) process. Our study is based on Logic test blocks that we OPCed with a combination of calibrated models for litho and for etch. We report the Overlapping Process Window (OPW), based on a selection of test structures measured after-etch. We find that most of the OPW limiting structures are EOL (End-of-Line) configurations. Further analysis of these individual OPW limiters will reveal that they belong to different types, such as Resist 3D (R3D) and Mask 3D (M3D) sensitive structures, limiters related to OPC (Optical Proximity Corrections) options such as assist placement, or the choice of CD metrics and tolerances for calculation of the process windows itself. To guide this investigation, we will consider a `reference OPC' case to be compared with other solutions. In addition, rigorous simulations and OPC verifications will complete the after-etch measurements to help us to validate our experimental findings.

A study of an alignment-less lithography method as an educational resource

NASA Astrophysics Data System (ADS)

Kai, Kazuho; Shiota, Koki; Nagaoka, Shiro; Mahmood, Mohamad Rusop Bin Haji; Kawai, Akira

2016-07-01

A simplification of the lithography process was studied. The simplification method of photolithography, named "alignment-less lithography" was proposed by omitting the photomask alignment process in photolithography process using mechanically aligned photomasks and substrate by using a simple jig on which countersinks were formed. Photomasks made of glass and the photomasks made of transparent plastic sheets were prepared for the process. As the result, approximately 5µm in the case of the glass mask, and 20µm in the case of the OHP mask were obtained with repetitive accuracies, respectively. It was confirmed that the alignment-less lithography method was successful. The possibility of the application to an educational program, such as a heuristic for solving problems was suggested using the method with the OHP mask. The nMOS FET fabrication process was successfully demonstrated using this method. The feasibility of this process was confirmed. It is expected that a totally simplified device fabrication process can be achievable when combined with other simplifications, such ass the simplified impurity diffusion processes using PSG and BSG thin film as diffusion source prepared by the Sol-Gel material under normal air environment.

Combination photo and electron beam lithography with polymethyl methacrylate (PMMA) resist.

PubMed

Carbaugh, Daniel J; Pandya, Sneha G; Wright, Jason T; Kaya, Savas; Rahman, Faiz

2017-11-10

We describe techniques for performing photolithography and electron beam lithography in succession on the same resist-covered substrate. Larger openings are defined in the resist film through photolithography whereas smaller openings are defined through conventional electron beam lithography. The two processes are carried out one after the other and without an intermediate wet development step. At the conclusion of the two exposures, the resist film is developed once to reveal both large and small openings. Interestingly, these techniques are applicable to both positive and negative tone lithographies with both optical and electron beam exposure. Polymethyl methacrylate, by itself or mixed with a photocatalytic cross-linking agent, is used for this purpose. We demonstrate that such resists are sensitive to both ultraviolet and electron beam irradiation. All four possible combinations, consisting of optical and electron beam lithographies, carried out in positive and negative tone modes have been described. Demonstration grating structures have been shown and process conditions have been described for all four cases.

Impact of design-parameters on the optical performance of a high-power adaptive mirror

NASA Astrophysics Data System (ADS)

Koek, Wouter D.; Nijkerk, David; Smeltink, Jeroen A.; van den Dool, Teun C.; van Zwet, Erwin J.; van Baars, Gregor E.

2017-02-01

TNO is developing a High Power Adaptive Mirror (HPAM) to be used in the CO2 laser beam path of an Extreme Ultra- Violet (EUV) light source for next-generation lithography. In this paper we report on a developed methodology, and the necessary simulation tools, to assess the performance and associated sensitivities of this deformable mirror. Our analyses show that, given the current limited insight concerning the process window of EUV generation, the HPAM module should have an actuator pitch of <= 4 mm. Furthermore we have modelled the sensitivity of performance with respect to dimpling and actuator noise. For example, for a deformable mirror with an actuator pitch of 4 mm, and if the associated performance impact is to be limited to smaller than 5%, the actuator noise should be smaller than 45 nm (rms). Our tools assist in the detailed design process by assessing the performance impact of various design choices, including for example those that affect the shape and spectral content of the influence function.

Optical proximity correction for anamorphic extreme ultraviolet lithography

NASA Astrophysics Data System (ADS)

Clifford, Chris; Lam, Michael; Raghunathan, Ananthan; Jiang, Fan; Fenger, Germain; Adam, Kostas

2017-10-01

The change from isomorphic to anamorphic optics in high numerical aperture (NA) extreme ultraviolet (EUV) scanners necessitates changes to the mask data preparation flow. The required changes for each step in the mask tape out process are discussed, with a focus on optical proximity correction (OPC). When necessary, solutions to new problems are demonstrated, and verified by rigorous simulation. Additions to the OPC model include accounting for anamorphic effects in the optics, mask electromagnetics, and mask manufacturing. The correction algorithm is updated to include awareness of anamorphic mask geometry for mask rule checking (MRC). OPC verification through process window conditions is enhanced to test different wafer scale mask error ranges in the horizontal and vertical directions. This work will show that existing models and methods can be updated to support anamorphic optics without major changes. Also, the larger mask size in the Y direction can result in better model accuracy, easier OPC convergence, and designs which are more tolerant to mask errors.

Eco-friendly electron beam lithography using water-developable resist material derived from biomass

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Oshima, Akihiro; Wakabayashi, Takanori; Kozawa, Takahiro; Tagawa, Seiichi

2012-07-01

We investigated the eco-friendly electron beam (EB) lithography using a high-sensitive negative type of water-developable resist material derived from biomass on hardmask layer for tri-layer processes. A water developable, non-chemically amplified, high sensitive, and negative tone resist material in EB lithography was developed for environmental affair, safety, easiness of handling, and health of the working people, instead of the common developable process of trimethylphenylammonium hydroxide. The images of 200 nm line and 800 nm space pattern with exposure dose of 7.0 μC/cm2 and CF4 etching selectivity of 2.2 with hardmask layer were provided by specific process conditions.

Nanoparticle photoresist studies for EUV lithography

NASA Astrophysics Data System (ADS)

Kasahara, Kazuki; Xu, Hong; Kosma, Vasiliki; Odent, Jeremy; Giannelis, Emmanuel P.; Ober, Christopher K.

2017-03-01

EUV (extreme ultraviolet) lithography is one of the most promising candidates for next generation lithography. The main challenge for EUV resists is to simultaneously satisfy resolution, LWR (line-width roughness) and sensitivity requirements according to the ITRS roadmap. Though polymer type CAR (chemically amplified resist) is the currently standard photoresist, entirely new resist platforms are required due to the performance targets of smaller process nodes. In this paper, recent progress in nanoparticle photoresists which Cornell University has intensely studied is discussed. Lithography performance, especially scum elimination, improvement studies with the dissolution rate acceleration concept and new metal core applications are described.

Automatic alternative phase-shift mask CAD layout tool for gate shrinkage of embedded DRAM in logic below 0.18 μm

NASA Astrophysics Data System (ADS)

Ohnuma, Hidetoshi; Kawahira, Hiroichi

1998-09-01

An automatic alternative phase shift mask (PSM) pattern layout tool has been newly developed. This tool is dedicated for embedded DRAM in logic device to shrink gate line width with improving line width controllability in lithography process with a design rule below 0.18 micrometers by the KrF excimer laser exposure. The tool can crete Levenson type PSM used being coupled with a binary mask adopting a double exposure method for positive photo resist. By using graphs, this tool automatically creates alternative PSM patterns. Moreover, it does not give any phase conflicts. By adopting it to actual embedded DRAM in logic cells, we have provided 0.16 micrometers gate resist patterns at both random logic and DRAM areas. The patterns were fabricated using two masks with the double exposure method. Gate line width has been well controlled under a practical exposure-focus window.

Effect of wafer geometry on lithography chucking processes

NASA Astrophysics Data System (ADS)

Turner, Kevin T.; Sinha, Jaydeep K.

2015-03-01

Wafer flatness during exposure in lithography tools is critical and is becoming more important as feature sizes in devices shrink. While chucks are used to support and flatten the wafer during exposure, it is essential that wafer geometry be controlled as well. Thickness variations of the wafer and high-frequency wafer shape components can lead to poor flatness of the chucked wafer and ultimately patterning problems, such as defocus errors. The objective of this work is to understand how process-induced wafer geometry, resulting from deposited films with non-uniform stress, can lead to high-frequency wafer shape variations that prevent complete chucking in lithography scanners. In this paper, we discuss both the acceptable limits of wafer shape that permit complete chucking to be achieved, and how non-uniform residual stresses in films, either due to patterning or process non-uniformity, can induce high spatial frequency wafer shape components that prevent chucking. This paper describes mechanics models that relate non-uniform film stress to wafer shape and presents results for two example cases. The models and results can be used as a basis for establishing control strategies for managing process-induced wafer geometry in order to avoid wafer flatness-induced errors in lithography processes.

EUVL masks: paving the path for commercialization

NASA Astrophysics Data System (ADS)

Mangat, Pawitter J. S.; Hector, Scott D.

2001-09-01

Optical projection lithography has been the principal vehicle of semiconductor manufacturing for more than 20 years and is marching aggressively to satisfy the needs of semiconductor manufacturers for 100nm devices. However, the complexity of optical lithography continues to increase as wavelength reduction continues to 157nm. Extreme Ultraviolet Lithography (EUVL), with wavelength from 13-14 nm, is evolving as a leading next generation lithography option for semiconductor industry to stay on the path laid by Moore's Law. Masks are a critical part of the success of any technology and are considered to be high risk both for optical lithography and NGL technologies for sub-100nm lithography. Two key areas of EUV mask fabrication are reflective multilayer deposition and absorber patterning. In the case of reflective multilayers, delivering defect free multilayers for mask blanks is the biggest challenge. Defect mitigation is being explored as a possible option to smooth the multilayer defects in addition to optimization of the deposition process to reduce defect density. The mask patterning process needs focus on the defect-free absorber stack patterning process, mask cleaning, inspection and repair. In addition, there is considerable effort to understand by simulations, the defect printability, thermal and mechanical distortions, and non-telecentric illumination, to mention a few. To protect the finished mask from defects added during use, a removable pellicle strategy combined with thermophoretic protection during exposure is being developed. Recent migration to square form factor using low thermal expansion material (LTEM) is advantageous as historical developments in optical masks can be applied to EUV mask patterning. This paper addresses recent developments in the EUV mask patterning and highlights critical manufacturing process controls needed to fabricate defect-free full field masks with CD and image placement specifications for sub-70nm node lithography. No technology can be implemented without establishing the commercial infrastructure. The rising cost seems to be a major issue affecting the technology development. With respect to mask fabrication for commercial availability, a virtual mask shop analysis is presented that indicates that the process cost for EUVL masks are comparable to the high end optical mask with a reasonable yield. However, the cost for setting up a new mask facility is considerably high.

Hot spot variability and lithography process window investigation by CDU improvement using CDC technique

NASA Astrophysics Data System (ADS)

Thamm, Thomas; Geh, Bernd; Djordjevic Kaufmann, Marija; Seltmann, Rolf; Bitensky, Alla; Sczyrba, Martin; Samy, Aravind Narayana

2018-03-01

Within the current paper, we will concentrate on the well-known CDC technique from Carl Zeiss to improve the CD distribution of the wafer by improving the reticle CDU and its impact on hotspots and Litho process window. The CDC technique uses an ultra-short pulse laser technology, which generates a micro-level Shade-In-Element (also known as "Pixels") into the mask quartz bulk material. These scatter centers are able to selectively attenuate certain areas of the reticle in higher resolution compared to other methods and thus improve the CD uniformity. In a first section, we compare the CDC technique with scanner dose correction schemes. It becomes obvious, that the CDC technique has unique advantages with respect to spatial resolution and intra-field flexibility over scanner correction schemes, however, due to the scanner flexibility across wafer both methods are rather complementary than competing. In a second section we show that a reference feature based correction scheme can be used to improve the CDU of a full chip with multiple different features that have different MEEF and dose sensitivities. In detail we will discuss the impact of forward scattering light originated by the CDC pixels on the illumination source and the related proximity signature. We will show that the impact on proximity is small compared to the CDU benefit of the CDC technique. Finally we show to which extend the reduced variability across reticle will result in a better common electrical process window of a whole chip design on the whole reticle field on wafer. Finally we will discuss electrical verification results between masks with purposely made bad CDU that got repaired by the CDC technique versus inherently good "golden" masks on a complex logic device. No yield difference is observed between the repaired bad masks and the masks with good CDU.

Drawing lithography for microneedles: a review of fundamentals and biomedical applications.

PubMed

Lee, Kwang; Jung, Hyungil

2012-10-01

A microneedle is a three-dimensional (3D) micromechanical structure and has been in the spotlight recently as a drug delivery system (DDS). Because a microneedle delivers the target drug after penetrating the skin barrier, the therapeutic effects of microneedles proceed from its 3D structural geometry. Various types of microneedles have been fabricated using subtractive micromanufacturing methods which are based on the inherently planar two-dimensional (2D) geometries. However, traditional subtractive processes are limited for flexible structural microneedles and makes functional biomedical applications for efficient drug delivery difficult. The authors of the present study propose drawing lithography as a unique additive process for the fabrication of a microneedle directly from 2D planar substrates, thus overcoming a subtractive process shortcoming. The present article provides the first overview of the principal drawing lithography technology: fundamentals and biomedical applications. The continuous drawing technique for an ultrahigh-aspect ratio (UHAR) hollow microneedle, stepwise controlled drawing technique for a dissolving microneedle, and drawing technique with antidromic isolation for a hybrid electro-microneedle (HEM) are reviewed, and efficient biomedical applications by drawing lithography-mediated microneedles as an innovative drug and gene delivery system are described. Drawing lithography herein can provide a great breakthrough in the development of materials science and biotechnology. Copyright © 2012 Elsevier Ltd. All rights reserved.

In-Process Atomic-Force Microscopy (AFM) Based Inspection

PubMed Central

Mekid, Samir

2017-01-01

A new in-process atomic-force microscopy (AFM) based inspection is presented for nanolithography to compensate for any deviation such as instantaneous degradation of the lithography probe tip. Traditional method used the AFM probes for lithography work and retract to inspect the obtained feature but this practice degrades the probe tip shape and hence, affects the measurement quality. This paper suggests a second dedicated lithography probe that is positioned back-to-back to the AFM probe under two synchronized controllers to correct any deviation in the process compared to specifications. This method shows that the quality improvement of the nanomachining, in progress probe tip wear, and better understanding of nanomachining. The system is hosted in a recently developed nanomanipulator for educational and research purposes. PMID:28561747

Nanofabrication on unconventional substrates using transferred hard masks

DOE PAGES

Li, Luozhou; Bayn, Igal; Lu, Ming; ...

2015-01-15

Here, a major challenge in nanofabrication is to pattern unconventional substrates that cannot be processed for a variety of reasons, such as incompatibility with spin coating, electron beam lithography, optical lithography, or wet chemical steps. Here, we present a versatile nanofabrication method based on re-usable silicon membrane hard masks, patterned using standard lithography and mature silicon processing technology. These masks, transferred precisely onto targeted regions, can be in the millimetre scale. They allow for fabrication on a wide range of substrates, including rough, soft, and non-conductive materials, enabling feature linewidths down to 10 nm. Plasma etching, lift-off, and ion implantationmore » are realized without the need for scanning electron/ion beam processing, UV exposure, or wet etching on target substrates.« less

EUV lithography using water-developable resist material derived from biomass

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Oshima, Akihiro; Oyama, Tomoko G.; Ichikawa, Takumi; Sekiguchi, Atsushi; Kashiwakura, Miki; Kozawa, Takahiro; Tagawa, Seiichi

2013-03-01

A water-developable resist material which had specific desired properties such as high sensitivity of 5.0 μC/cm2, thermal stability of 160 °C, suitable calculated linear absorption coefficients of 13.5 nm, and acceptable CF4 etch selectivity was proposed using EB lithography for EUV lithography. A water developable resist material derived from biomass is expected for non-petroleum resources, environmental affair, safety, easiness of handling, and health of the working people, instead of the common developable process of trimethylphenylammonium hydroxide. 100 nm line and 400 nm space patterning images with exposure dose of 5.0 μC/cm2 were provided by specific process conditions of EB lithography. The developed trehalose derivatives with hydroxyl groups and EB sensitive groups in the water-developable resist material derived from biomass were applicable to future development of high-sensitive and resolution negative type of water-developable resist material as a novel chemical design.

High-sensitivity green resist material with organic solvent-free spin-coating and tetramethylammonium hydroxide-free water-developable processes for EB and EUV lithography

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Hanabata, Makoto; Oshima, Akihiro; Kashiwakura, Miki; Kozawa, Takahiro; Tagawa, Seiichi

2015-03-01

We investigated the eco-friendly electron beam (EB) and extreme-ultraviolet (EUV) lithography using a high-sensitive negative type of green resist material derived from biomass to take advantage of organic solvent-free water spin-coating and tetramethylammonium hydroxide(TMAH)-free water-developable techniques. A water developable, non-chemically amplified, high sensitive, and negative tone resist material in EB lithography was developed for environmental affair, safety, easiness of handling, and health of the working people, instead of the common developable process of TMAH. The material design concept to use the water-soluble resist material with acceptable properties such as pillar patterns with less than 100 nm in high EB sensitivity of 10 μC/cm2 and etch selectivity with a silicon-based middle layer in CF4 plasma treatment was demonstrated for EB and EUV lithography.

Novel Processes for Modular Integration of Silicon-Germanium MEMS with CMOS Electronics

DTIC Science & Technology

2007-02-28

process limits the compatibility with further lithography steps. Using silicon as the MEMS structural material, most of the integration processes...structures are defined by lithography and deep reactive ion etching. A layer of gasket oxide is deposited as the sacrificial material between the...When the Bragg condition for constructive interference is obtained, a diffraction peak is produced and the relative peak height is proportional to

All-optical lithography process for contacting nanometer precision donor devices

NASA Astrophysics Data System (ADS)

Ward, D. R.; Marshall, M. T.; Campbell, D. M.; Lu, T. M.; Koepke, J. C.; Scrymgeour, D. A.; Bussmann, E.; Misra, S.

2017-11-01

We describe an all-optical lithography process that can make electrical contact to nanometer-precision donor devices fabricated in silicon using scanning tunneling microscopy (STM). This is accomplished by implementing a cleaning procedure in the STM that allows the integration of metal alignment marks and ion-implanted contacts at the wafer level. Low-temperature transport measurements of a patterned device establish the viability of the process.

All-optical lithography process for contacting nanometer precision donor devices

DOE PAGES

Ward, Daniel Robert; Marshall, Michael Thomas; Campbell, DeAnna Marie; ...

2017-11-06

In this article, we describe an all-optical lithography process that can make electrical contact to nanometer-precision donor devices fabricated in silicon using scanning tunneling microscopy (STM). This is accomplished by implementing a cleaning procedure in the STM that allows the integration of metal alignment marks and ion-implanted contacts at the wafer level. Low-temperature transport measurements of a patterned device establish the viability of the process.

All-optical lithography process for contacting nanometer precision donor devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ward, Daniel Robert; Marshall, Michael Thomas; Campbell, DeAnna Marie

In this article, we describe an all-optical lithography process that can make electrical contact to nanometer-precision donor devices fabricated in silicon using scanning tunneling microscopy (STM). This is accomplished by implementing a cleaning procedure in the STM that allows the integration of metal alignment marks and ion-implanted contacts at the wafer level. Low-temperature transport measurements of a patterned device establish the viability of the process.

Novel EUV photoresist for sub-7nm node (Conference Presentation)

NASA Astrophysics Data System (ADS)

Furukawa, Tsuyoshi; Naruoka, Takehiko; Nakagawa, Hisashi; Miyata, Hiromu; Shiratani, Motohiro; Hori, Masafumi; Dei, Satoshi; Ayothi, Ramakrishnan; Hishiro, Yoshi; Nagai, Tomoki

2017-04-01

Extreme ultraviolet (EUV) lithography has been recognized as a promising candidate for the manufacturing of semiconductor devices as LS and CH pattern for 7nm node and beyond. EUV lithography is ready for high volume manufacturing stage. For the high volume manufacturing of semiconductor devices, significant improvement of sensitivity and line edge roughness (LWR) and Local CD Uniformity (LCDU) is required for EUV resist. It is well-known that the key challenge for EUV resist is the simultaneous requirement of ultrahigh resolution (R), low line edge roughness (L) and high sensitivity (S). Especially high sensitivity and good roughness is important for EUV lithography high volume manufacturing. We are trying to improve sensitivity and LWR/LCDU from many directions. From material side, we found that both sensitivity and LWR/LCDU are simultaneously improved by controlling acid diffusion length and efficiency of acid generation using novel resin and PAG. And optimizing EUV integration is one of the good solution to improve sensitivity and LWR/LCDU. We are challenging to develop new multi-layer materials to improve sensitivity and LWR/LCDU. Our new multi-layer materials are designed for best performance in EUV lithography system. From process side, we found that sensitivity was substantially improved maintaining LWR applying novel type of chemical amplified resist (CAR) and process. EUV lithography evaluation results obtained for new CAR EUV interference lithography. And also metal containing resist is one possibility to break through sensitivity and LWR trade off. In this paper, we will report the recent progress of sensitivity and LWR/LCDU improvement of JSR novel EUV resist and process.

Electron Beam/Optical Hybrid Lithography For The Production Of Gallium Arsenide Monolithic Microwave Integrated Circuits (Mimics)

NASA Astrophysics Data System (ADS)

Nagarajan, Rao M.; Rask, Steven D.

1988-06-01

A hybrid lithography technique is described in which selected levels are fabricated by high resolution direct write electron beam lithography and all other levels are fabricated optically. This technique permits subhalf micron geometries and the site-by-site alignment for each field written by electron beam lithography while still maintaining the high throughput possible with optical lithography. The goal is to improve throughput and reduce overall cost of fabricating MIMIC GaAS chips without compromising device performance. The lithography equipment used for these experiments is the Cambridge Electron beam vector scan system EBMF 6.4 capable of achieving ultra high current densities with a beam of circular cross section and a gaussian intensity profile operated at 20 kev. The optical aligner is a Karl Suss Contact aligner. The flexibility of the Cambridge electron beam system is matched to the less flexible Karl Suss contact aligner. The lithography related factors, such as image placement, exposure and process related analyses, which influence overlay, pattern quality and performance, are discussed. A process chip containing 3.2768mm fields in an eleven by eleven array was used for alignment evaluation on a 3" semi-insulating GaAS wafer. Each test chip contained five optical verniers and four Prometrix registration marks per field along with metal bumps for alignment marks. The process parameters for these chips are identical to those of HEMT/epi-MESFET ohmic contact and gate layer processes. These layers were used to evaluate the overlay accuracy because of their critical alignment and dimensional control requirements. Two cases were examined: (1) Electron beam written gate layers aligned to optically imaged ohmic contact layers and (2) Electron beam written gate layers aligned to electron beam written ohmic contact layers. The effect of substrate charging by the electron beam is also investigated. The resulting peak overlay error accuracies are: (1) Electron beam to optical with t 0.2μm (2 sigma) and (2) Electron beam to electron beam with f 0.lμm (2 sigma). These results suggest that the electron beam/optical hybrid lithography techniques could be used for MIMIC volume production as alignment tolerances required by GaAS chips are met in both cases. These results are discussed in detail.

Finding the right way: DFM versus area efficiency for 65 nm gate layer lithography

NASA Astrophysics Data System (ADS)

Sarma, Chandra S.; Scheer, Steven; Herold, Klaus; Fonseca, Carlos; Thomas, Alan; Schroeder, Uwe P.

2006-03-01

DFM (Design for Manufacturing) has become a buzzword for lithography since the 90nm node. Implementing DFM intelligently can boost yield rates and reliability in semiconductor manufacturing significantly. However, any restriction on the design space will always result in an area loss, thus diminishing the effective shrink factor for a given technology. For a lithographer, the key task is to develop a manufacturable process, while not sacrificing too much area. We have developed a high performing lithography process for attenuated gate level lithography that is based on aggressive illumination and a newly optimized SRAF placement schemes. In this paper we present our methodology and results for this optimization, using an anchored simulation model. The wafer results largely confirm the predictions of the simulations. The use of aggressive SRAF (Sub Resolution Assist Features) strategy leads to reduction of forbidden pitch regions without any SRAF printing. The data show that our OPC is capable of correcting the PC tip to tip distance without bridging between the tips in dense SRAM cells. SRAF strategy for various 2D cases has also been verified on wafer. We have shown that aggressive illumination schemes yielding a high performing lithography process can be employed without sacrificing area. By carefully choosing processing conditions, we were able develop a process that has very little restrictions for design. In our approach, the remaining issues can be addressed by DFM, partly in data prep procedures, which are largely area neutral and transparent to the designers. Hence, we have shown successfully, that DFM and effective technology shrinks are not mutually exclusive.

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

NASA Technical Reports Server (NTRS)

Sewell, James S.; Bozada, Christopher A.

1994-01-01

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

NASA Astrophysics Data System (ADS)

Sewell, James S.; Bozada, Christopher A.

1994-02-01

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

Ion beam lithography system

DOEpatents

Leung, Ka-Ngo

2005-08-02

A maskless plasma-formed ion beam lithography tool provides for patterning of sub-50 nm features on large area flat or curved substrate surfaces. The system is very compact and does not require an accelerator column and electrostatic beam scanning components. The patterns are formed by switching beamlets on or off from a two electrode blanking system with the substrate being scanned mechanically in one dimension. This arrangement can provide a maskless nano-beam lithography tool for economic and high throughput processing.

Optical force stamping lithography

PubMed Central

Nedev, Spas; Urban, Alexander S.; Lutich, Andrey A.; Feldmann, Jochen

2013-01-01

Here we introduce a new paradigm of far-field optical lithography, optical force stamping lithography. The approach employs optical forces exerted by a spatially modulated light field on colloidal nanoparticles to rapidly stamp large arbitrary patterns comprised of single nanoparticles onto a substrate with a single-nanoparticle positioning accuracy well beyond the diffraction limit. Because the process is all-optical, the stamping pattern can be changed almost instantly and there is no constraint on the type of nanoparticle or substrates used. PMID:21992538

LENS (lithography enhancement toward nano scale): a European project to support double exposure and double patterning technology development

NASA Astrophysics Data System (ADS)

Cantu, Pietro; Baldi, Livio; Piacentini, Paolo; Sytsma, Joost; Le Gratiet, Bertrand; Gaugiran, Stéphanie; Wong, Patrick; Miyashita, Hiroyuki; Atzei, Luisa R.; Buch, Xavier; Verkleij, Dick; Toublan, Olivier; Perez-Murano, Francesco; Mecerreyes, David

2010-04-01

In 2009 a new European initiative on Double Patterning and Double Exposure lithography process development was started in the framework of the ENIAC Joint Undertaking. The project, named LENS (Lithography Enhancement Towards Nano Scale), involves twelve companies from five different European Countries (Italy, Netherlands, France, Belgium Spain; includes: IC makers (Numonyx and STMicroelectronics), a group of equipment and materials companies (ASML, Lam Research srl, JSR, FEI), a mask maker (Dai Nippon Photomask Europe), an EDA company (Mentor Graphics) and four research and development institutes (CEA-Leti, IMEC, Centro Nacional de Microelectrónica, CIDETEC). The LENS project aims to develop and integrate the overall infrastructure required to reach patterning resolutions required by 32nm and 22nm technology nodes through the double patterning and pitch doubling technologies on existing conventional immersion exposure tools, with the purpose to allow the timely development of 32nm and 22nm technology nodes for memories and logic devices, providing a safe alternative to EUV, Higher Refraction Index Fluids Immersion Lithography and maskless lithography, which appear to be still far from maturity. The project will cover the whole lithography supply chain including design, masks, materials, exposure tools, process integration, metrology and its final objective is the demonstration of 22nm node patterning on available 1.35 NA immersion tools on high complexity mask set.

450mm wafer patterning with jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Thompson, Ecron; Hellebrekers, Paul; Hofemann, Paul; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2013-09-01

The next step in the evolution of wafer size is 450mm. Any transition in sizing is an enormous task that must account for fabrication space, environmental health and safety concerns, wafer standards, metrology capability, individual process module development and device integration. For 450mm, an aggressive goal of 2018 has been set, with pilot line operation as early as 2016. To address these goals, consortiums have been formed to establish the infrastructure necessary to the transition, with a focus on the development of both process and metrology tools. Central to any process module development, which includes deposition, etch and chemical mechanical polishing is the lithography tool. In order to address the need for early learning and advance process module development, Molecular Imprints Inc. has provided the industry with the first advanced lithography platform, the Imprio® 450, capable of patterning a full 450mm wafer. The Imprio 450 was accepted by Intel at the end of 2012 and is now being used to support the 450mm wafer process development demands as part of a multi-year wafer services contract to facilitate the semiconductor industry's transition to lower cost 450mm wafer production. The Imprio 450 uses a Jet and Flash Imprint Lithography (J-FILTM) process that employs drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for markets including NAND Flash memory, patterned media for hard disk drives and displays. This paper reviews the recent performance of the J-FIL technology (including overlay, throughput and defectivity), mask development improvements provided by Dai Nippon Printing, and the application of the technology to a 450mm lithography platform.

Inverse Tomo-Lithography for Making Microscopic 3D Parts

NASA Technical Reports Server (NTRS)

White, Victor; Wiberg, Dean

2003-01-01

According to a proposal, basic x-ray lithography would be extended to incorporate a technique, called inverse tomography, that would enable the fabrication of microscopic three-dimensional (3D) objects. The proposed inverse tomo-lithographic process would make it possible to produce complex shaped, submillimeter-sized parts that would be difficult or impossible to make in any other way. Examples of such shapes or parts include tapered helices, paraboloids with axes of different lengths, and even Archimedean screws that could serve as rotors in microturbines. The proposed inverse tomo-lithographic process would be based partly on a prior microfabrication process known by the German acronym LIGA (lithographie, galvanoformung, abformung, which means lithography, electroforming, molding). In LIGA, one generates a precise, high-aspect ratio pattern by exposing a thick, x-ray-sensitive resist material to an x-ray beam through a mask that contains the pattern. One can electrodeposit metal into the developed resist pattern to form a precise metal part, then dissolve the resist to free the metal. Aspect ratios of 100:1 and patterns into resist thicknesses of several millimeters are possible.

Design and development of next-generation bottom anti-reflective coatings for 45nm process with hyper NA lithography

NASA Astrophysics Data System (ADS)

Nakajima, Makoto; Sakaguchi, Takahiro; Hashimoto, Keisuke; Sakamoto, Rikimaru; Kishioka, Takahiro; Takei, Satoshi; Enomoto, Tomoyuki; Nakajima, Yasuyuki

2006-03-01

Integrated circuit manufacturers are consistently seeking to minimize device feature dimensions in order to reduce chip size and increase integration level. Feature sizes on chips are achieved sub 65nm with the advanced 193nm microlithography process. R&D activities of 45nm process have been started so far, and 193nm lithography is used for this technology. The key parameters for this lithography process are NA of exposure tool, resolution capability of resist, and reflectivity control with bottom anti-reflective coating (BARC). In the point of etching process, single-layer resist process can't be applied because resist thickness is too thin for getting suitable aspect ratio. Therefore, it is necessary to design novel BARC system and develop hard mask materials having high etching selectivity. This system and these materials can be used for 45nm generation lithography. Nissan Chemical Industries, Ltd. and Brewer Science, Inc. have been designed and developed the advanced BARCs for the above propose. In order to satisfy our target, we have developed novel BARC and hard mask materials. We investigated the multi-layer resist process stacked 4 layers (resist / thin BARC / silicon-contained BARC (Si-ARC) / spin on carbon hard mask (SOC)) (4 layers process). 4 layers process showed the excellent lithographic performance and pattern transfer performance. In this paper, we will discuss the detail of our approach and materials for 4 layers process.

Biocompatibility of hydroxyapatite scaffolds processed by lithography-based additive manufacturing.

PubMed

Tesavibul, Passakorn; Chantaweroad, Surapol; Laohaprapanon, Apinya; Channasanon, Somruethai; Uppanan, Paweena; Tanodekaew, Siriporn; Chalermkarnnon, Prasert; Sitthiseripratip, Kriskrai

2015-01-01

The fabrication of hydroxyapatite scaffolds for bone tissue engineering applications by using lithography-based additive manufacturing techniques has been introduced due to the abilities to control porous structures with suitable resolutions. In this research, the use of hydroxyapatite cellular structures, which are processed by lithography-based additive manufacturing machine, as a bone tissue engineering scaffold was investigated. The utilization of digital light processing system for additive manufacturing machine in laboratory scale was performed in order to fabricate the hydroxyapatite scaffold, of which biocompatibilities were eventually evaluated by direct contact and cell-culturing tests. In addition, the density and compressive strength of the scaffolds were also characterized. The results show that the hydroxyapatite scaffold at 77% of porosity with 91% of theoretical density and 0.36 MPa of the compressive strength are able to be processed. In comparison with a conventionally sintered hydroxyapatite, the scaffold did not present any cytotoxic signs while the viability of cells at 95.1% was reported. After 14 days of cell-culturing tests, the scaffold was able to be attached by pre-osteoblasts (MC3T3-E1) leading to cell proliferation and differentiation. The hydroxyapatite scaffold for bone tissue engineering was able to be processed by the lithography-based additive manufacturing machine while the biocompatibilities were also confirmed.

Exploring EUV and SAQP pattering schemes at 5nm technology node

NASA Astrophysics Data System (ADS)

Hamed Fatehy, Ahmed; Kotb, Rehab; Lafferty, Neal; Jiang, Fan; Word, James

2018-03-01

For years, Moore's law keeps driving the semiconductors industry towards smaller dimensions and higher density chips with more devices. Earlier, the correlation between exposure source's wave length and the smallest resolvable dimension, mandated the usage of Deep Ultra-Violent (DUV) optical lithography system which has been used for decades to sustain Moore's law, especially when immersion lithography was introduced with 193nm ArF laser sources. As dimensions of devices get smaller beyond Deep Ultra-Violent (DUV) optical resolution limits, the need for Extremely Ultra-Violent (EUV) optical lithography systems was a must. However, EUV systems were still under development at that time for the mass-production in semiconductors industry. Theretofore, Multi-Patterning (MP) technologies was introduced to swirl about DUV optical lithography limitations in advanced nodes beyond minimum dimension (CD) of 20nm. MP can be classified into two main categories; the first one is to split the target itself across multiple masks that give the original target patterns when they are printed. This category includes Double, Triple and Quadruple patterning (DP, TP, and QP). The second category is the Self-Aligned Patterning (SAP) where the target is divided into Mandrel patterns and non-Mandrel patterns. The Mandrel patterns get printed first, then a self-aligned sidewalls are grown around these printed patterns drawing the other non-Mandrel targets, afterword, a cut mask(s) is used to define target's line-ends. This approach contains Self-Aligned-Double Pattering (SADP) and Self-Aligned- Quadruple-Pattering (SAQP). DUV and MP along together paved the way for the industry down to 7nm. However, with the start of development at the 5nm node and the readiness of EUV, the differentiation question is aroused again, which pattering approach should be selected, direct printing using EUV or DUV with MP, or a hybrid flow that contains both DUV-MP and EUV. In this work we are comparing two potential pattering techniques for Back End Of Line (BEOL) metal layers in the 5nm technology node, the first technique is Single Exposure EUV (SE-EUV) with a Direct Patterning EUV lithography process, and the second one is Self-Aligned Quadruple Patterning (SAQP) with a hybrid lithography processes, where the drawn metal target layer is decomposed into a Mandrel mask and Blocks/Cut mask, Mandrel mask is printed using DUV 193i lithography process, while Block/Cut Mask is printed using SE-EUV lithography process. The pros and cons of each technique are quantified based on Edge-Placement-Error (EPE) and Process Variation Band (PVBand) measured at 1D and 2D edges. The layout used in this comparison is a candidate layout for Foundries 5nm process node.

Selective reflection by deteriorated phase accumulation in Fabry-Perot cavity with aperiodic metallic nanomesh entry windows

NASA Astrophysics Data System (ADS)

Sun, Tianyi; Guo, Chuanfei; Kempa, Krzysztof; Ren, Zhifeng

2014-03-01

A Fabry-Perot reflection filter, consisting of semi-transparent metal and dielectric layers on opaque metals, is featured by selective absorption determined by the phase difference of waves from the two interfaces. In such systems, semi-transparency is usually realized by layers of reflective metals thinner than the penetration depth of the light. Here we present a filter cavity with entry windows not made of traditional thin layers, but of aperiodic metallic random nanomeshes thicker than the penetration depth, fabricated by grain boundary lithography. It is shown that due to the deteriorated phase caused by the interface between the random nanomesh and the dielectric layer, the width and location of the resonances can be tuned by metallic coverage. Further experiments show that this phenomenon can be used in designing aperiodic plasmonic metamaterial structures for visible and infrared applications.

Efficient analysis of three dimensional EUV mask induced imaging artifacts using the waveguide decomposition method

NASA Astrophysics Data System (ADS)

Shao, Feng; Evanschitzky, Peter; Fühner, Tim; Erdmann, Andreas

2009-10-01

This paper employs the Waveguide decomposition method as an efficient rigorous electromagnetic field (EMF) solver to investigate three dimensional mask-induced imaging artifacts in EUV lithography. The major mask diffraction induced imaging artifacts are first identified by applying the Zernike analysis of the mask nearfield spectrum of 2D lines/spaces. Three dimensional mask features like 22nm semidense/dense contacts/posts, isolated elbows and line-ends are then investigated in terms of lithographic results. After that, the 3D mask-induced imaging artifacts such as feature orientation dependent best focus shift, process window asymmetries, and other aberration-like phenomena are explored for the studied mask features. The simulation results can help lithographers to understand the reasons of EUV-specific imaging artifacts and to devise illumination and feature dependent strategies for their compensation in the optical proximity correction (OPC) for EUV masks. At last, an efficient approach using the Zernike analysis together with the Waveguide decomposition technique is proposed to characterize the impact of mask properties for the future OPC process.

Fabrication of cobalt magnetic nanostructures using atomic force microscope lithography.

PubMed

Chu, Haena; Yun, Seonghun; Lee, Haiwon

2013-12-01

Cobalt nanopatterns are promising assemblies for patterned magnetic storage applications. The fabrication of cobalt magnetic nanostructures on n-tridecylamine x hydrochloride (TDA x HCl) self-assembled monolayer (SAM) modified silicon surfaces using direct writing atomic force microscope (AFM) lithography for localized electrochemical reduction of cobalt ions was demonstrated. The ions were reduced to form metal nanowires along the direction of the electricfield between the AFM tip and the substrate. In this lithography process, TDA x HCI SAMs play an important role in the lithography process for improving the resolution of cobalt nanopatterns by preventing nonspecific reduction of cobalt ions on the unwritten background. Cobalt nanowires and nanodots with width of 225 +/- 26 nm and diameter of 208 +/- 28 nm were successfully fabricated. Platinium-coated polydimethylsiloxane (PDMS) stamp was used fabricating bulk cobalt structures which can be detected by energy dispersive X-ray spectroscopy for element analysis and the physical and magnetic properties of these cobalt nanopatterns were characterized using AFM and magnetic force microscope.

Advanced electric-field scanning probe lithography on molecular resist using active cantilever

NASA Astrophysics Data System (ADS)

Kaestner, Marcus; Aydogan, Cemal; Lipowicz, Hubert-Seweryn; Ivanov, Tzvetan; Lenk, Steve; Ahmad, Ahmad; Angelov, Tihomir; Reum, Alexander; Ishchuk, Valentyn; Atanasov, Ivaylo; Krivoshapkina, Yana; Hofer, Manuel; Holz, Mathias; Rangelow, Ivo W.

2015-03-01

The routine "on demand" fabrication of features smaller than 10 nm opens up new possibilities for the realization of many novel nanoelectronic, NEMS, optical and bio-nanotechnology-based devices. Based on the thermally actuated, piezoresistive cantilever technology we have developed a first prototype of a scanning probe lithography (SPL) platform able to image, inspect, align and pattern features down to single digit nano regime. The direct, mask-less patterning of molecular resists using active scanning probes represents a promising path circumventing the problems in today's radiation-based lithography. Here, we present examples of practical applications of the previously published electric field based, current-controlled scanning probe lithography on molecular glass resist calixarene by using the developed tabletop SPL system. We demonstrate the application of a step-and-repeat scanning probe lithography scheme including optical as well as AFM based alignment and navigation. In addition, sequential read-write cycle patterning combining positive and negative tone lithography is shown. We are presenting patterning over larger areas (80 x 80 μm) and feature the practical applicability of the lithographic processes.

Innovative method to suppress local geometry distortions for fabrication of interdigitated electrode arrays with nano gaps

NASA Astrophysics Data System (ADS)

Partel, S.; Urban, G.

2016-03-01

In this paper we present a method to optimize the lithography process for the fabrication of interdigitated electrode arrays (IDA) for a lift-off free electrochemical biosensor. The biosensor is based on amperometric method to allow a signal amplification by redox cycling. We already demonstrated a method to fabricate IDAs with nano gaps with conventional mask aligner lithography and two subsequent deposition processes. By decreasing the distance down to the nanometer range the linewidth variation is becoming the most critical factor and can result in a short circuit of the electrodes. Therefore, the light propagation and the resist pattern of the mask aligner lithography process are simulated to optimize the lithography process. To optimize the outer finger structure assistant features (AsFe) were introduced. The AsFe allow an optimization of the intensity distribution at the electrode fingers. Hence, the periodicity is expanded and the outer structure of the IDA is practically a part of the periodic array. The better CD uniformity can be obtained by adding three assistant features which generate an equal intensity distributions for the complete finger pattern. Considering a mask optimization of the outer structures would also be feasible. However, due to the strong impact of the gap between mask and wafer at contact lithography it is not practicable. The better choice is to create the same intensity distribution for all finger structures. With the introduction of the assistant features large areas with electrode gap sizes in the sub 100 nm region are demonstrated.

Plastic masters-rigid templates for soft lithography.

PubMed

Desai, Salil P; Freeman, Dennis M; Voldman, Joel

2009-06-07

We demonstrate a simple process for the fabrication of rigid plastic master molds for soft lithography directly from (poly)dimethysiloxane devices. Plastics masters (PMs) provide a cost-effective alternative to silicon-based masters and can be easily replicated without the need for cleanroom facilities. We have successfully demonstrated the use of plastics micromolding to generate both single and dual-layer plastic structures, and have characterized the fidelity of the molding process. Using the PM fabrication technique, world-to-chip connections can be integrated directly into the master enabling devices with robust, well-aligned fluidic ports directly after molding. PMs provide an easy technique for the fabrication of microfluidic devices and a simple route for the scaling-up of fabrication of robust masters for soft lithography.

Robust resolution enhancement optimization methods to process variations based on vector imaging model

NASA Astrophysics Data System (ADS)

Ma, Xu; Li, Yanqiu; Guo, Xuejia; Dong, Lisong

2012-03-01

Optical proximity correction (OPC) and phase shifting mask (PSM) are the most widely used resolution enhancement techniques (RET) in the semiconductor industry. Recently, a set of OPC and PSM optimization algorithms have been developed to solve for the inverse lithography problem, which are only designed for the nominal imaging parameters without giving sufficient attention to the process variations due to the aberrations, defocus and dose variation. However, the effects of process variations existing in the practical optical lithography systems become more pronounced as the critical dimension (CD) continuously shrinks. On the other hand, the lithography systems with larger NA (NA>0.6) are now extensively used, rendering the scalar imaging models inadequate to describe the vector nature of the electromagnetic field in the current optical lithography systems. In order to tackle the above problems, this paper focuses on developing robust gradient-based OPC and PSM optimization algorithms to the process variations under a vector imaging model. To achieve this goal, an integrative and analytic vector imaging model is applied to formulate the optimization problem, where the effects of process variations are explicitly incorporated in the optimization framework. The steepest descent algorithm is used to optimize the mask iteratively. In order to improve the efficiency of the proposed algorithms, a set of algorithm acceleration techniques (AAT) are exploited during the optimization procedure.

Advanced scanning probe lithography.

PubMed

Garcia, Ricardo; Knoll, Armin W; Riedo, Elisa

2014-08-01

The nanoscale control afforded by scanning probe microscopes has prompted the development of a wide variety of scanning-probe-based patterning methods. Some of these methods have demonstrated a high degree of robustness and patterning capabilities that are unmatched by other lithographic techniques. However, the limited throughput of scanning probe lithography has prevented its exploitation in technological applications. Here, we review the fundamentals of scanning probe lithography and its use in materials science and nanotechnology. We focus on robust methods, such as those based on thermal effects, chemical reactions and voltage-induced processes, that demonstrate a potential for applications.

Development of a Discharge Pumped 13 nm Laser for Metrology of Projection Lithography Optics at the Manufacture-Site

DTIC Science & Technology

2003-09-14

nm @2,6,9#. In the particular case of Ar discharges the gain-length product for the 3p 1S0-3s 1P1 transition of Ne-like Ar at 46.9 nm has exceeded...The addition of the Al filter decreases the transmissivity in this window by a factor that increases from about 63 at 4.5 nm to about 6003 at 10 nm... factors including the smaller current and pinch radius, together with very good initial plasma symmetry and relatively short time duration of4-7 GONZALEZ

Co-optimization of lithographic and patterning processes for improved EPE performance

NASA Astrophysics Data System (ADS)

Maslow, Mark J.; Timoshkov, Vadim; Kiers, Ton; Jee, Tae Kwon; de Loijer, Peter; Morikita, Shinya; Demand, Marc; Metz, Andrew W.; Okada, Soichiro; Kumar, Kaushik A.; Biesemans, Serge; Yaegashi, Hidetami; Di Lorenzo, Paolo; Bekaert, Joost P.; Mao, Ming; Beral, Christophe; Larivière, Stephane

2017-03-01

Complimentary lithography is already being used for advanced logic patterns. The tight pitches for 1D Metal layers are expected to be created using spacer based multiple patterning ArF-i exposures and the more complex cut/block patterns are made using EUV exposures. At the same time, control requirements of CDU, pattern shift and pitch-walk are approaching sub-nanometer levels to meet edge placement error (EPE) requirements. Local variability, such as Line Edge Roughness (LER), Local CDU, and Local Placement Error (LPE), are dominant factors in the total Edge Placement error budget. In the lithography process, improving the imaging contrast when printing the core pattern has been shown to improve the local variability. In the etch process, it has been shown that the fusion of atomic level etching and deposition can also improve these local variations. Co-optimization of lithography and etch processing is expected to further improve the performance over individual optimizations alone. To meet the scaling requirements and keep process complexity to a minimum, EUV is increasingly seen as the platform for delivering the exposures for both the grating and the cut/block patterns beyond N7. In this work, we evaluated the overlay and pattern fidelity of an EUV block printed in a negative tone resist on an ArF-i SAQP grating. High-order Overlay modeling and corrections during the exposure can reduce overlay error after development, a significant component of the total EPE. During etch, additional degrees of freedom are available to improve the pattern placement error in single layer processes. Process control of advanced pitch nanoscale-multi-patterning techniques as described above is exceedingly complicated in a high volume manufacturing environment. Incorporating potential patterning optimizations into both design and HVM controls for the lithography process is expected to bring a combined benefit over individual optimizations. In this work we will show the EPE performance improvement for a 32nm pitch SAQP + block patterned Metal 2 layer by cooptimizing the lithography and etch processes. Recommendations for further improvements and alternative processes will be given.

Mask manufacturing of advanced technology designs using multi-beam lithography (Part 1)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-10-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking Sub-Resolution Assist Features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, we study one such process, characterizing mask manufacturing capability of 10nm and below structures with particular focus on minimum resolution and pattern fidelity.

Mask manufacturing of advanced technology designs using multi-beam lithography (part 2)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-09-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced optical proximity correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking sub-resolution assist features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, Part 2 of our study, we further characterize an MBMW process for 10nm and below logic node mask manufacturing including advanced pattern analysis and write time demonstration.

Ultralow dose effects in ion-beam induced grafting of polymethylmethacrylate (PMMA)

NASA Astrophysics Data System (ADS)

Corelli, J. C.; Steckl, A. J.; Pulver, D.; Randall, J. N.

We have investigated the process of image enhancement in high resolution lithography through polymer grafting techniques. Sensitivity gains of 10 3-10 4 were obtained for H +, X-ray, e-beam and deep-UV irradiations. Ultralow dose effects in 60 keV H + irradiated PMMA have been observed through the use of the acrylic acid (AA) monomer grafting with irradiated PMMA. At conventional doses of 10 10 cm -2 an inner structure of each feature is revealed. At doses of (1-2) X 10 9 cm -2, discrete events within the exposed regions are observable. This is the first time that individual events have been observable in a lithography process and sets the upper limit in the useful sensitivity of the resist and ion lithography process. This effect is directly observable only with ions, because of their higher efficiency per particle than either photons or electrons.

Controlling bridging and pinching with pixel-based mask for inverse lithography

NASA Astrophysics Data System (ADS)

Kobelkov, Sergey; Tritchkov, Alexander; Han, JiWan

2016-03-01

Inverse Lithography Technology (ILT) has become a viable computational lithography candidate in recent years as it can produce mask output that results in process latitude and CD control in the fab that is hard to match with conventional OPC/SRAF insertion approaches. An approach to solving the inverse lithography problem as a nonlinear, constrained minimization problem over a domain mask pixels was suggested in the paper by Y. Granik "Fast pixel-based mask optimization for inverse lithography" in 2006. The present paper extends this method to satisfy bridging and pinching constraints imposed on print contours. Namely, there are suggested objective functions expressing penalty for constraints violations, and their minimization with gradient descent methods is considered. This approach has been tested with an ILT-based Local Printability Enhancement (LPTM) tool in an automated flow to eliminate hotspots that can be present on the full chip after conventional SRAF placement/OPC and has been applied in 14nm, 10nm node production, single and multiple-patterning flows.

Line-frequency doubling of directed self-assembly patterns for single-digit bit pattern media lithography

NASA Astrophysics Data System (ADS)

Patel, K. C.; Ruiz, R.; Lille, J.; Wan, L.; Dobiz, E.; Gao, H.; Robertson, N.; Albrecht, T. R.

2012-03-01

Directed self-assembly is emerging as a promising technology to define sub-20nm features. However, a straightforward path to scale block copolymer lithography to single-digit fabrication remains challenging given the diverse material properties found in the wide spectrum of self-assembling materials. A vast amount of block copolymer research for industrial applications has been dedicated to polystyrene-b-methyl methacrylate (PS-b-PMMA), a model system that displays multiple properties making it ideal for lithography, but that is limited by a weak interaction parameter that prevents it from scaling to single-digit lithography. Other block copolymer materials have shown scalability to much smaller dimensions, but at the expense of other material properties that could delay their insertion into industrial lithographic processes. We report on a line doubling process applied to block copolymer patterns to double the frequency of PS-b-PMMA line/space features, demonstrating the potential of this technique to reach single-digit lithography. We demonstrate a line-doubling process that starts with directed self-assembly of PS-b-PMMA to define line/space features. This pattern is transferred into an underlying sacrificial hard-mask layer followed by a growth of self-aligned spacers which subsequently serve as hard-masks for transferring the 2x frequency doubled pattern to the underlying substrate. We applied this process to two different block copolymer materials to demonstrate line-space patterns with a half pitch of 11nm and 7nm underscoring the potential to reach single-digit critical dimensions. A subsequent patterning step with perpendicular lines can be used to cut the fine line patterns into a 2-D array of islands suitable for bit patterned media. Several integration challenges such as line width control and line roughness are addressed.

New 3D structuring process for non-integrated circuit related technologies (Conference Presentation)

NASA Astrophysics Data System (ADS)

Nouri, Lamia; Possémé, Nicolas; Landis, Stéfan; Milesi, Frédéric; Gaillard, Frédéric-Xavier

2017-04-01

Fabrication processes that microelectronic developed for Integrated circuit (IC) technologies for decades, do not meet the new emerging structuration's requirements, in particular non-IC related technologies one, such as MEMS/NEMS, Micro-Fluidics, photovoltaics, lenses. Actually complex 3D structuration requires complex lithography patterning approaches such as gray-scale electron beam lithography, laser ablation, focused ion beam lithography, two photon polymerization. It is now challenging to find cheaper and easiest technique to achieve 3D structures. In this work, we propose a straightforward process to realize 3D structuration, intended for silicon based materials (Si, SiN, SiOCH). This structuration technique is based on nano-imprint lithography (NIL), ion implantation and selective wet etching. In a first step a pattern is performed by lithography on a substrate, then ion implantation is realized through a resist mask in order to create localized modifications in the material, thus the pattern is transferred into the subjacent layer. Finally, after the resist stripping, a selective wet etching is carried out to remove selectively the modified material regarding the non-modified one. In this paper, we will first present results achieved with simple 2D line array pattern processed either on Silicon or SiOCH samples. This step have been carried out to demonstrate the feasibility of this new structuration process. SEM pictures reveals that "infinite" selectivity between the implanted areas versus the non-implanted one could be achieved. We will show that a key combination between the type of implanted ion species and wet etching chemistries is required to obtain such results. The mechanisms understanding involved during both implantation and wet etching processes will also be presented through fine characterizations with Photoluminescence, Raman and Secondary Ion Mass Spectrometry (SIMS) for silicon samples, and ellipso-porosimetry and Fourier Transform InfraRed spectroscopy (FTIR) for SiOCH samples. Finally the benefit of this new patterning approach will be presented on 3D patterns structures.

A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography

NASA Astrophysics Data System (ADS)

Mingyan, Yu; Shirui, Zhao; Yupeng, Jing; Yunbo, Shi; Baoqin, Chen

2014-12-01

Pattern distortions caused by the charging effect should be reduced while using the electron beam lithography process on an insulating substrate. We have developed a novel process by using the SX AR-PC 5000/90.1 solution as a spin-coated conductive layer, to help to fabricate nanoscale patterns of poly-methyl-methacrylate polymer resist on glass for phased array device application. This method can restrain the influence of the charging effect on the insulating substrate effectively. Experimental results show that the novel process can solve the problems of the distortion of resist patterns and electron beam main field stitching error, thus ensuring the accuracy of the stitching and overlay of the electron beam lithography system. The main characteristic of the novel process is that it is compatible to the multi-layer semiconductor process inside a clean room, and is a green process, quite simple, fast, and low cost. It can also provide a broad scope in the device development on insulating the substrate, such as high density biochips, flexible electronics and liquid crystal display screens.

Mask cost of ownership for advanced lithography

NASA Astrophysics Data System (ADS)

Muzio, Edward G.; Seidel, Philip K.

2000-07-01

As technology advances, becoming more difficult and more expensive, the cost of ownership (CoO) metric becomes increasingly important in evaluating technical strategies. The International SEMATECH CoC analysis has steadily gained visibility over the past year, as it attempts to level the playing field between technology choices, and create a fair relative comparison. In order to predict mask cots for advanced lithography, mask process flows are modeled using bets-known processing strategies, equipment cost, and yields. Using a newly revised yield mode, and updated mask manufacture flows, representative mask flows can be built. These flows are then used to calculate mask costs for advanced lithography down to the 50 nm node. It is never the goal of this type of work to provide absolute cost estimates for business planning purposes. However, the combination of a quantifiable yield model with a clearly defined set of mask processing flows and a cost model based upon them serves as an excellent starting point for cost driver analysis and process flow discussion.

Fabrication of high quality aspheric microlens array by dose-modulated lithography and surface thermal reflow

NASA Astrophysics Data System (ADS)

Huang, Shengzhou; Li, Mujun; Shen, Lianguan; Qiu, Jinfeng; Zhou, Youquan

2018-03-01

A novel fabrication method for high quality aspheric microlens array (MLA) was developed by combining the dose-modulated DMD-based lithography and surface thermal reflow process. In this method, the complex shape of aspheric microlens is pre-modeled via dose modulation in a digital micromirror device (DMD) based maskless projection lithography. And the dose modulation mainly depends on the distribution of exposure dose of photoresist. Then the pre-shaped aspheric microlens is polished by a following non-contact thermal reflow (NCTR) process. Different from the normal process, the reflow process here is investigated to improve the surface quality while keeping the pre-modeled shape unchanged, and thus will avoid the difficulties in generating the aspheric surface during reflow. Fabrication of a designed aspheric MLA with this method was demonstrated in experiments. Results showed that the obtained aspheric MLA was good in both shape accuracy and surface quality. The presented method may be a promising approach in rapidly fabricating high quality aspheric microlens with complex surface.

Investigation of pattern transfer to piezoelectric jetted polymer using roll-to-roll nanoimprint lithography

NASA Astrophysics Data System (ADS)

Menezes, Shannon John

Nanoimprint Lithography (NIL) has existed since the mid 1990s as a proven concept of creating micro- and nanostructures using direct mechanical pattern transfer. Initially seen as a viable option to replace conventional lithography methods, the lack of technology to support large-scale manufacturing using NIL has motivated researchers to explore the application of NIL to create a better, more cost-efficient process with the ability to integrate NIL into a mass manufacturing system. One such method is the roll-to-roll process, similar to that used in printing presses of newspapers and plastics. This thesis is an investigation to characterize polymer deposition using a piezoelectric jetting head and attempt to create micro- and nanostructures on the polymer using R2RNIL technique.

Resist Parameter Extraction from Line-and-Space Patterns of Chemically Amplified Resist for Extreme Ultraviolet Lithography

NASA Astrophysics Data System (ADS)

Kozawa, Takahiro; Oizumi, Hiroaki; Itani, Toshiro; Tagawa, Seiichi

2010-11-01

The development of extreme ultraviolet (EUV) lithography has progressed owing to worldwide effort. As the development status of EUV lithography approaches the requirements for the high-volume production of semiconductor devices with a minimum line width of 22 nm, the extraction of resist parameters becomes increasingly important from the viewpoints of the accurate evaluation of resist materials for resist screening and the accurate process simulation for process and mask designs. In this study, we demonstrated that resist parameters (namely, quencher concentration, acid diffusion constant, proportionality constant of line edge roughness, and dissolution point) can be extracted from the scanning electron microscopy (SEM) images of patterned resists without the knowledge on the details of resist contents using two types of latest EUV resist.

Understanding overlay signatures using machine learning on non-lithography context information

NASA Astrophysics Data System (ADS)

Overcast, Marshall; Mellegaard, Corey; Daniel, David; Habets, Boris; Erley, Georg; Guhlemann, Steffen; Thrun, Xaver; Buhl, Stefan; Tottewitz, Steven

2018-03-01

Overlay errors between two layers can be caused by non-lithography processes. While these errors can be compensated by the run-to-run system, such process and tool signatures are not always stable. In order to monitor the impact of non-lithography context on overlay at regular intervals, a systematic approach is needed. Using various machine learning techniques, significant context parameters that relate to deviating overlay signatures are automatically identified. Once the most influential context parameters are found, a run-to-run simulation is performed to see how much improvement can be obtained. The resulting analysis shows good potential for reducing the influence of hidden context parameters on overlay performance. Non-lithographic contexts are significant contributors, and their automatic detection and classification will enable the overlay roadmap, given the corresponding control capabilities.

Transverse correlation in entangled photons and light-matter interaction

NASA Astrophysics Data System (ADS)

Wen, Jianming

In recent years, quantum entanglement has attracted much attention, because its unique properties provide potential applications, which could not be achieved using conventional techniques, such as quantum computing, quantum imaging and lithography. To realize these advancements, one has to obtain an entanglement-generation source, thoroughly master its physical properties, and fully understand the light-matter interaction. This dissertation is an attempt to address such issues as stated above. Conventionally, paired photons are created from spontaneous parametric down-conversion (SPDC). It is known that the transverse correlation in biphotons may improve the visibility and resolution in quantum imaging and lithography. In this thesis, we described an alternative biphoton source---Raman-EIT (electromagnetically induced transparency) generator, and emphasize on its geometrical and optical properties. We found that to utilize the transverse effects in paired Stokes-anti-Stokes, it is necessary to make the product of the EIT window times the group delay much greater than unity. To gain further insight into quantum imaging and lithography, we studied the transverse correlation in triphoton entanglement theoretically. We found that in the two-image process, the quality of images is determined by the optical path-lengths, even though the Gaussian thin lens equations are satisfied. The ghost interference-diffraction patterns of double slits show one more fold interference, which is essentially different from the biphoton case. Klyshko's advanced-wave model is still applicable, with some modifications. We also generalized the transverse correlation to the case of multi-photon entangled states. To implement quantum computing, one key element is quantum memory. In this thesis, we have theoretically explored the feasibility of such a memory by using nonclassical SPDC light in an EIT system at the single-photon level. We found that both the quantum coherence of SPDC and atomic coherence of EIT can survive after interacting within a vapor cell. Due to the inherent mismatch of magnitude between the spectral bandwidth of SPDC and the very narrow transmission width of EIT, the coincidence counts of the two-photon interference is reduced to one pair per second, which is barely doable in the current experimental situation.

ESH assessment of advanced lithography materials and processes

NASA Astrophysics Data System (ADS)

Worth, Walter F.; Mallela, Ram

2004-05-01

The ESH Technology group at International SEMATECH is conducting environment, safety, and health (ESH) assessments in collaboration with the lithography technologists evaluating the performance of an increasing number of new materials and technologies being considered for advanced lithography such as 157nm photresist and extreme ultraviolet (EUV). By performing data searches for 75 critical data types, emissions characterizations, and industrial hygiene (IH) monitoring during the use of the resist candidates, it has been shown that the best performing resist formulations, so far, appear to be free of potential ESH concerns. The ESH assessment of the EUV lithography tool that is being developed for SEMATECH has identified several features of the tool that are of ESH concern: high energy consumption, poor energy conversion efficiency, tool complexity, potential ergonomic and safety interlock issues, use of high powered laser(s), generation of ionizing radiation (soft X-rays), need for adequate shielding, and characterization of the debris formed by the extreme temperature of the plasma. By bringing these ESH challenges to the attention of the technologists and tool designers, it is hoped that the processes and tools can be made more ESH friendly.

Patterning control strategies for minimum edge placement error in logic devices

NASA Astrophysics Data System (ADS)

Mulkens, Jan; Hanna, Michael; Slachter, Bram; Tel, Wim; Kubis, Michael; Maslow, Mark; Spence, Chris; Timoshkov, Vadim

2017-03-01

In this paper we discuss the edge placement error (EPE) for multi-patterning semiconductor manufacturing. In a multi-patterning scheme the creation of the final pattern is the result of a sequence of lithography and etching steps, and consequently the contour of the final pattern contains error sources of the different process steps. We describe the fidelity of the final pattern in terms of EPE, which is defined as the relative displacement of the edges of two features from their intended target position. We discuss our holistic patterning optimization approach to understand and minimize the EPE of the final pattern. As an experimental test vehicle we use the 7-nm logic device patterning process flow as developed by IMEC. This patterning process is based on Self-Aligned-Quadruple-Patterning (SAQP) using ArF lithography, combined with line cut exposures using EUV lithography. The computational metrology method to determine EPE is explained. It will be shown that ArF to EUV overlay, CDU from the individual process steps, and local CD and placement of the individual pattern features, are the important contributors. Based on the error budget, we developed an optimization strategy for each individual step and for the final pattern. Solutions include overlay and CD metrology based on angle resolved scatterometry, scanner actuator control to enable high order overlay corrections and computational lithography optimization to minimize imaging induced pattern placement errors of devices and metrology targets.

The application of phase grating to CLM technology for the sub-65nm node optical lithography

NASA Astrophysics Data System (ADS)

Yoon, Gi-Sung; Kim, Sung-Hyuck; Park, Ji-Soong; Choi, Sun-Young; Jeon, Chan-Uk; Shin, In-Kyun; Choi, Sung-Woon; Han, Woo-Sung

2005-06-01

As a promising technology for sub-65nm node optical lithography, CLM(Chrome-Less Mask) technology among RETs(Resolution Enhancement Techniques) for low k1 has been researched worldwide in recent years. CLM has several advantages, such as relatively simple manufacturing process and competitive performance compared to phase-edge PSM's. For the low-k1 lithography, we have researched CLM technique as a good solution especially for sub-65nm node. As a step for developing the sub-65nm node optical lithography, we have applied CLM technology in 80nm-node lithography with mesa and trench method. From the analysis of the CLM technology in the 80nm lithography, we found that there is the optimal shutter size for best performance in the technique, the increment of wafer ADI CD varied with pattern's pitch, and a limitation in patterning various shapes and size by OPC dead-zone - OPC dead-zone in CLM technique is the specific region of shutter size that dose not make the wafer CD increased more than a specific size. And also small patterns are easily broken, while fabricating the CLM mask in mesa method. Generally, trench method has better optical performance than mesa. These issues have so far restricted the application of CLM technology to a small field. We approached these issues with 3-D topographic simulation tool and found that the issues could be overcome by applying phase grating in trench-type CLM. With the simulation data, we made some test masks which had many kinds of patterns with many different conditions and analyzed their performance through AIMS fab 193 and exposure on wafer. Finally, we have developed the CLM technology which is free of OPC dead-zone and pattern broken in fabrication process. Therefore, we can apply the CLM technique into sub-65nm node optical lithography including logic devices.

In-vitro perforation of the round window membrane via direct 3-D printed microneedles.

PubMed

Aksit, Aykut; Arteaga, Daniel N; Arriaga, Miguel; Wang, Xun; Watanabe, Hirobumi; Kasza, Karen E; Lalwani, Anil K; Kysar, Jeffrey W

2018-06-08

The cochlea, or inner ear, is a space fully enclosed within the temporal bone of the skull, except for two membrane-covered portals connecting it to the middle ear space. One of these portals is the round window, which is covered by the Round Window Membrane (RWM). A longstanding clinical goal is to reliably and precisely deliver therapeutics into the cochlea to treat a plethora of auditory and vestibular disorders. Standard of care for several difficult-to-treat diseases calls for injection of a therapeutic substance through the tympanic membrane into the middle ear space, after which a portion of the substance diffuses across the RWM into the cochlea. The efficacy of this technique is limited by an inconsistent rate of molecular transport across the RWM. A solution to this problem involves the introduction of one or more microscopic perforations through the RWM to enhance the rate and reliability of diffusive transport. This paper reports the use of direct 3D printing via Two-Photon Polymerization (2PP) lithography to fabricate ultra-sharp polymer microneedles specifically designed to perforate the RWM. The microneedle has tip radius of 500 nm and shank radius of 50 μ m, and perforates the guinea pig RWM with a mean force of 1.19 mN. The resulting perforations performed in vitro are lens-shaped with major axis equal to the microneedle shank diameter and minor axis about 25% of the major axis, with mean area 1670 μ m 2 . The major axis is aligned with the direction of the connective fibers within the RWM. The fibers were separated along their axes without ripping or tearing of the RWM suggesting the main failure mechanism to be fiber-to-fiber decohesion. The small perforation area along with fiber-to-fiber decohesion are promising indicators that the perforations would heal readily following in vivo experiments. These results establish a foundation for the use of Two-Photon Polymerization lithography as a means to fabricate microneedles to perforate the RWM and other similar membranes.

Force-controlled inorganic crystallization lithography.

PubMed

Cheng, Chao-Min; LeDuc, Philip R

2006-09-20

Lithography plays a key role in integrated circuits, optics, information technology, biomedical applications, catalysis, and separation technologies. However, inorganic lithography techniques remain of limited utility for applications outside of the typical foci of integrated circuit manufacturing. In this communication, we have developed a novel stamping method that applies pressure on the upper surface of the stamp to regulate the dewetting process of the inorganic buffer and the evaporation rate of the solvent in this buffer between the substrate and the surface of the stamp. We focused on generating inorganic microstructures with specific locations and also on enabling the ability to pattern gradients during the crystallization of the inorganic salts. This approach utilized a combination of lithography with bottom-up growth and assembly of inorganic crystals. This work has potential applications in a variety of fields, including studying inorganic material patterning and small-scale fabrication technology.

Selective Etching via Soft Lithography of Conductive Multilayered Gold Films with Analysis of Electrolyte Solutions

ERIC Educational Resources Information Center

Gerber, Ralph W.; Oliver-Hoyo, Maria T.

2008-01-01

This experiment is designed to expose undergraduate students to the process of selective etching by using soft lithography and the resulting electrical properties of multilayered films fabricated via self-assembly of gold nanoparticles. Students fabricate a conductive film of gold on glass, apply a patterned resist using a polydimethylsiloxane…

Rapid prototyping of microstructures in polydimethylsiloxane (PDMS) by direct UV-lithography.

PubMed

Scharnweber, Tim; Truckenmüller, Roman; Schneider, Andrea M; Welle, Alexander; Reinhardt, Martina; Giselbrecht, Stefan

2011-04-07

Microstructuring of polydimethylsiloxane (PDMS) is a key step for many lab-on-a-chip (LOC) applications. In general, the structure is generated by casting the liquid prepolymer against a master. The production of the master in turn calls for special equipment and know how. Furthermore, a given master only allows the reproduction of the defined structure. We report on a simple, cheap and practical method to produce microstructures in already cured PDMS by direct UV-lithography followed by chemical development. Due to the available options during the lithographic process like multiple exposures, the method offers a high design flexibility granting easy access to complex and stepped structures. Furthermore, no master is needed and the use of pre-cured PDMS allows processing at ambient (light) conditions. Features down to approximately 5 µm and a depth of 10 µm can be realised. As a proof of principle, we demonstrate the feasibility of the process by applying the structures to various established soft lithography techniques.

Hybrid Metrology and 3D-AFM Enhancement for CD Metrology Dedicated to 28 nm Node and Below Requirements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Foucher, J.; Faurie, P.; Dourthe, L.

2011-11-10

The measurement accuracy is becoming one of the major components that have to be controlled in order to guarantee sufficient production yield. Already at the R and D level, we have to come up with the accurate measurements of sub-40 nm dense trenches and contact holes coming from 193 immersion lithography or E-Beam lithography. Current production CD (Critical Dimension) metrology techniques such as CD-SEM (CD-Scanning Electron Microscope) and OCD (Optical Critical Dimension) are limited in relative accuracy for various reasons (i.e electron proximity effect, outputs parameters correlation, stack influence, electron interaction with materials...). Therefore, time for R and D ismore » increasing, process windows degrade and finally production yield can decrease because you cannot manufactured correctly if you are unable to measure correctly. A new high volume manufacturing (HVM) CD metrology solution has to be found in order to improve the relative accuracy of production environment otherwise current CD Metrology solution will very soon get out of steam.In this paper, we will present a potential Hybrid CD metrology solution that smartly tuned 3D-AFM (3D-Atomic Force Microscope) and CD-SEM data in order to add accuracy both in R and D and production. The final goal for 'chip makers' is to improve yield and save R and D and production costs through real-time feedback loop implement on CD metrology routines. Such solution can be implemented and extended to any kind of CD metrology solution. In a 2{sup nd} part we will discuss and present results regarding a new AFM3D probes breakthrough with the introduction of full carbon tips made will E-Beam Deposition process. The goal is to overcome the current limitations of conventional flared silicon tips which are definitely not suitable for sub-32 nm nodes production.« less

Immersion and dry scanner extensions for sub-10nm production nodes

NASA Astrophysics Data System (ADS)

Weichselbaum, Stefan; Bornebroek, Frank; de Kort, Toine; Droste, Richard; de Graaf, Roelof F.; van Ballegoij, Rob; Botter, Herman; McLaren, Matthew G.; de Boeij, Wim P.

2015-03-01

Progressing towards the 10nm and 7nm imaging node, pattern-placement and layer-to-layer overlay requirements keep on scaling down and drives system improvements in immersion (ArFi) and dry (ArF/KrF) scanners. A series of module enhancements in the NXT platform have been introduced; among others, the scanner is equipped with exposure stages with better dynamics and thermal control. Grid accuracy improvements with respect to calibration, setup, stability, and layout dependency tighten MMO performance and enable mix and match scanner operation. The same platform improvements also benefit focus control. Improvements in detectability and reproducibility of low contrast alignment marks enhance the alignment solution window for 10nm logic processes and beyond. The system's architecture allows dynamic use of high-order scanner optimization based on advanced actuators of projection lens and scanning stages. This enables a holistic optimization approach for the scanner, the mask, and the patterning process. Productivity scanner design modifications esp. stage speeds and optimization in metrology schemes provide lower layer costs for customers using immersion lithography as well as conventional dry technology. Imaging, overlay, focus, and productivity data is presented, that demonstrates 10nm and 7nm node litho-capability for both (immersion & dry) platforms.

Quadratic nonlinear optics to assess the morphology of riboflavin doped chitosan for eco-friendly lithography

NASA Astrophysics Data System (ADS)

Ray, Cédric; Caillau, Mathieu; Jonin, Christian; Benichou, Emmanuel; Moulin, Christophe; Salmon, Estelle; Maldonado, Melissa E.; Gomes, Anderson S. L.; Monnier, Virginie; Laurenceau, Emmanuelle; Leclercq, Jean-Louis; Chevolot, Yann; Delair, Thierry; Brevet, Pierre-François

2018-06-01

We report the use of the Second Harmonic Generation response from a riboflavin doped chitosan film as a characterization method of the film morphology. This film is of particular interest in the development of new and bio-sourced material for eco-friendly UV lithography. The method allows us to determine how riboflavin is distributed as a function of film depth in the sample. This possibility is of importance in order to have a better understanding of the riboflavin influence in chitosan films during the lithography process. On the contrary, linear optical techniques provide no information beyond the mere confirmation of the riboflavin presence.

Fabrication of submicron structures in nanoparticle/polymer composite by holographic lithography and reactive ion etching

NASA Astrophysics Data System (ADS)

Zhang, A. Ping; He, Sailing; Kim, Kyoung Tae; Yoon, Yong-Kyu; Burzynski, Ryszard; Samoc, Marek; Prasad, Paras N.

2008-11-01

We report on the fabrication of nanoparticle/polymer submicron structures by combining holographic lithography and reactive ion etching. Silica nanoparticles are uniformly dispersed in a (SU8) polymer matrix at a high concentration, and in situ polymerization (cross-linking) is used to form a nanoparticle/polymer composite. Another photosensitive SU8 layer cast upon the nanoparticle/SU8 composite layer is structured through holographic lithography, whose pattern is finally transferred to the nanoparticle/SU8 layer by the reactive ion etching process. Honeycomb structures in a submicron scale are experimentally realized in the nanoparticle/SU8 composite.

Examination for optimization of synchrotron radiation spectrum for the x ray depth lithography

NASA Astrophysics Data System (ADS)

Dany, Raimund

1992-06-01

The effect of reducing the vertical distribution of synchrotron radiation on its spectral distribution is examined through resin irradiation. The resulting filter effect is compared to that of absorption filters. Transmission coefficients of titanium, gold, and polyamide were calculated from linear absorption coefficients with the Beer law. The use of a diaphragm in X-ray depth lithography, which is the first step of the LIGA (Lithography Galvanoforming Molding) process, is discussed. A calorimetric device for determining the synchrotron radiation power and distribution was developed and tested. Measurements at the ELSA storage ring show a strong dependence of the vertical emittance on the electron current.

Lithography exposure characteristics of poly(methyl methacrylate) (PMMA) for carbon, helium and hydrogen ions

NASA Astrophysics Data System (ADS)

Puttaraksa, Nitipon; Norarat, Rattanaporn; Laitinen, Mikko; Sajavaara, Timo; Singkarat, Somsorn; Whitlow, Harry J.

2012-02-01

Poly(methyl methacrylate) is a common polymer used as a lithographic resist for all forms of particle (photon, ion and electron) beam writing. Faithful lithographic reproduction requires that the exposure dose, Θ, lies in the window Θ0⩽Θ<Θ, where Θ0 and Θ represent the clearing and cross-linking onset doses, respectively. In this work we have used the programmable proximity aperture ion beam lithography systems in Chiang Mai and Jyväskylä to determine the exposure characteristics in terms of fluence for 2 MeV protons, 3 MeV 4He and 6 MeV 12C ions, respectively. After exposure the samples were developed in 7:3 by volume propan-2-ol:de-ionised water mixture. At low fluences, where the fluence is below the clearing fluence, the exposed regions were characterised by rough regions, particularly for He with holes around the ion tracks. As the fluence (dose) increases so that the dose exceeds the clearing dose, the PMMA is uniformly removed with sharp vertical walls. When Θ exceeds the cross-linking onset fluence, the bottom of the exposed regions show undissolved PMMA.

High throughput optical lithography by scanning a massive array of bowtie aperture antennas at near-field

PubMed Central

Wen, X.; Datta, A.; Traverso, L. M.; Pan, L.; Xu, X.; Moon, E. E.

2015-01-01

Optical lithography, the enabling process for defining features, has been widely used in semiconductor industry and many other nanotechnology applications. Advances of nanotechnology require developments of high-throughput optical lithography capabilities to overcome the optical diffraction limit and meet the ever-decreasing device dimensions. We report our recent experimental advancements to scale up diffraction unlimited optical lithography in a massive scale using the near field nanolithography capabilities of bowtie apertures. A record number of near-field optical elements, an array of 1,024 bowtie antenna apertures, are simultaneously employed to generate a large number of patterns by carefully controlling their working distances over the entire array using an optical gap metrology system. Our experimental results reiterated the ability of using massively-parallel near-field devices to achieve high-throughput optical nanolithography, which can be promising for many important nanotechnology applications such as computation, data storage, communication, and energy. PMID:26525906

Control of the interaction strength of photonic molecules by nanometer precise 3D fabrication.

PubMed

Rawlings, Colin D; Zientek, Michal; Spieser, Martin; Urbonas, Darius; Stöferle, Thilo; Mahrt, Rainer F; Lisunova, Yuliya; Brugger, Juergen; Duerig, Urs; Knoll, Armin W

2017-11-28

Applications for high resolution 3D profiles, so-called grayscale lithography, exist in diverse fields such as optics, nanofluidics and tribology. All of them require the fabrication of patterns with reliable absolute patterning depth independent of the substrate location and target materials. Here we present a complete patterning and pattern-transfer solution based on thermal scanning probe lithography (t-SPL) and dry etching. We demonstrate the fabrication of 3D profiles in silicon and silicon oxide with nanometer scale accuracy of absolute depth levels. An accuracy of less than 1nm standard deviation in t-SPL is achieved by providing an accurate physical model of the writing process to a model-based implementation of a closed-loop lithography process. For transfering the pattern to a target substrate we optimized the etch process and demonstrate linear amplification of grayscale patterns into silicon and silicon oxide with amplification ratios of ∼6 and ∼1, respectively. The performance of the entire process is demonstrated by manufacturing photonic molecules of desired interaction strength. Excellent agreement of fabricated and simulated structures has been achieved.

Optimized filtration for reduced defectivity and improved dispense recipe in 193-nm BARC lithography

NASA Astrophysics Data System (ADS)

Do, Phong; Pender, Joe; Lehmann, Thomas; Mc Ardle, Leo P.; Gotlinsky, Barry; Mesawich, Michael

2004-05-01

The implementation of 193 nm lithography into production has been complicated by high defectivity issues. Many companies have been struggling with high defect densities, forcing process and lithography engineers to focus their efforts on chemical filtration instead of process development. After-etch defects have complicated the effort to reduce this problem. In particular it has been determined that chemical filtration at the 90 nm node and below is a crucial item which current industry standard pump recipes and material choices are not able to address. LSI Logic and Pall Corporation have been working together exploring alternative materials and resist pump process parameters to address these issues. These changes will free up process development time by reducing these high defect density issues. This paper provides a fundamental understanding of how 20nm filtration combined with optimized resist pump set-up and dispense can significantly reduce defects in 193nm lithography. The purpose of this study is to examine the effectiveness of 20 nanometer rated filters to reduce various defects observed in bottom anti reflective coating materials. Multiple filter types were installed on a Tokyo Electron Limited Clean Track ACT8 tool utilizing two-stage resist pumps. Lithographic performance of the filtered resist and defect analysis of patterned and non-patterned wafers were performed. Optimized pump start-up and dispense recipes also were evaluated to determine their effect on defect improvements. The track system used in this experiment was a standard production tool and was not modified from its original specifications.

Exploration of BEOL line-space patterning options at 12 nm half-pitch and below

NASA Astrophysics Data System (ADS)

Decoster, S.; Lazzarino, F.; Petersen Barbosa Lima, L.; Li, W.; Versluijs, J.; Halder, S.; Mallik, A.; Murdoch, G.

2018-03-01

While the semiconductor industry is almost ready for high-volume manufacturing of the 7 nm technology node, research centers are defining and troubleshooting the patterning options for the 5 nm technology node (N5) and below. The target dimension for imec's N5 BEOL applications is 20-24 nm Metal Pitch (MP), which requires Self-Aligned multiple (Double/Quadruple/Octuple) Patterning approaches (SAxP) in combination with EUV or immersion lithography at 193 nm. There are numerous technical challenges to enable gratings at the hard mask level such as good uniformity across wafer, low line edge/width roughness (LER/LWR), large process window, and all of this at low cost. An even greater challenge is to transfer these gratings into the dielectric material at such critical dimensions, where increased line edge roughness, line wiggling and even pattern collapse can be expected for materials with small mechanical stability such as highly porous low-k dielectrics. In this work we first compare three different patterning options for 12 nm half-pitch gratings at the hard mask level: EUV-based SADP and 193i-based SAQP and SAOP. This comparison will be based on process window, line edge/width roughness and cost. Next, the transfer of 12 nm line/space gratings in the dielectric material is discussed and presented. The LER of the dielectric lines is investigated as a function of the dielectric material, the trench depth, and the stress in the sacrificial hard mask. Finally, we elaborate on the different options to enable scaling down from 24 nm MP to 16 nm MP, and demonstrate 8 nm line/space gratings with 193i-based SAOP.

Analysis of e-beam impact on the resist stack in e-beam lithography process

NASA Astrophysics Data System (ADS)

Indykeiwicz, K.; Paszkiewicz, B.

2013-07-01

Paper presents research on the sub-micron gate, AlGaN /GaN HEMT type transistors, fabrication by e-beam lithography and lift-off technique. The impact of the electron beam on the resists layer and the substrate was analyzed by MC method in Casino v3.2 software. The influence of technological process parameters on the metal structures resolution and quality for paths 100 nm, 300 nm and 500 nm wide and 20 μm long was studied. Qualitative simulation correspondences to the conducted experiments were obtained.

Solid Freeform Fabrication Proceedings -1999

DTIC Science & Technology

1999-08-11

geometry of the stylus. Some geometries cannot be used to acquire data if the part geometry interferes 48 with a feature on the part. Thus, the data...fabrication processing systems such as surface micro- machining and lithography . 63 Conclusion The LCVD system (figure 6) has the versatility and...part, creating STL (STereo Lithography ) or VRML (Virtual Reality Modeling Language) files, slicing them, converting into laser path files, and

Fabrication of flexible grating sensing waveguide based on nano-imprint lithography and micro-replication process

NASA Astrophysics Data System (ADS)

Liu, Yueming; Tian, Weijian; Zhang, Shaojun

2009-05-01

Soft and flexible grating sensing waveguides is urgently demanded in application of micro-bending sensing and surface distortion sensing in medical catheter and smart skin sensing unit etc. Based on Nano-imprint Lithography and micro-replication process, polymer grating waveguides with core size 4μm×20μm and pitch 0.75μm are fabricated successfully in this paper. This novel grating waveguides is soft and flexible enough for related application and with the bio-medical safe feature when used in human body catheter. Fabricated processes are presented including the fabrication of micro mould and UV-replication process, and relative skills are discussed also in this paper.

And There Was Light: Prospects for the Creation of Micro- and Nanostructures through Maskless Photolithography.

PubMed

Rühe, J

2017-09-26

In photolithographic processes, the light inducing the photochemical reactions is confined to a small volume, which enables direct writing of micro- and nanoscale features onto solid surfaces without the need of a predefined photomask. The direct writing process can be used to generate topographic patterns through photopolymerization or photo-cross-linking or can be employed to use light to generate chemical patterns on the surface with high spatial control, which would make such processes attractive for bioapplications. The prospects of maskless photolithography technologies with a focus on two-photon lithography and scanning-probe-based photochemical processes based on scanning near-field optical microscopy or beam pen lithography are discussed.

Carbon dioxide gas purification and analytical measurement for leading edge 193nm lithography

NASA Astrophysics Data System (ADS)

Riddle Vogt, Sarah; Landoni, Cristian; Applegarth, Chuck; Browning, Matt; Succi, Marco; Pirola, Simona; Macchi, Giorgio

2015-03-01

The use of purified carbon dioxide (CO2) has become a reality for leading edge 193 nm immersion lithography scanners. Traditionally, both dry and immersion 193 nm lithographic processes have constantly purged the optics stack with ultrahigh purity compressed dry air (UHPCDA). CO2 has been utilized for a similar purpose as UHPCDA. Airborne molecular contamniation (AMC) purification technologies and analytical measurement methods have been extensively developed to support the Lithography Tool Manufacturers purity requirements. This paper covers the analytical tests and characterizations carried out to assess impurity removal from 3.0 N CO2 (beverage grade) for its final utilization in 193 nm and EUV scanners.

Sequential infiltration synthesis for advanced lithography

DOEpatents

Darling, Seth B.; Elam, Jeffrey W.; Tseng, Yu-Chih; Peng, Qing

2015-03-17

A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.

Fabrication process for a gradient index x-ray lens

DOEpatents

Bionta, R.M.; Makowiecki, D.M.; Skulina, K.M.

1995-01-17

A process is disclosed for fabricating high efficiency x-ray lenses that operate in the 0.5-4.0 keV region suitable for use in biological imaging, surface science, and x-ray lithography of integrated circuits. The gradient index x-ray optics fabrication process broadly involves co-sputtering multi-layers of film on a wire, followed by slicing and mounting on block, and then ion beam thinning to a thickness determined by periodic testing for efficiency. The process enables the fabrication of transmissive gradient index x-ray optics for the 0.5-4.0 keV energy range. This process allows the fabrication of optical elements for the next generation of imaging and x-ray lithography instruments in the soft x-ray region. 13 figures.

Fabrication process for a gradient index x-ray lens

DOEpatents

Bionta, Richard M.; Makowiecki, Daniel M.; Skulina, Kenneth M.

1995-01-01

A process for fabricating high efficiency x-ray lenses that operate in the 0.5-4.0 keV region suitable for use in biological imaging, surface science, and x-ray lithography of integrated circuits. The gradient index x-ray optics fabrication process broadly involves co-sputtering multi-layers of film on a wire, followed by slicing and mounting on block, and then ion beam thinning to a thickness determined by periodic testing for efficiency. The process enables the fabrication of transmissive gradient index x-ray optics for the 0.5-4.0 keV energy range. This process allows the fabrication of optical elements for the next generation of imaging and x-ray lithography instruments m the soft x-ray region.

A novel double patterning approach for 30nm dense holes

NASA Astrophysics Data System (ADS)

Hsu, Dennis Shu-Hao; Wang, Walter; Hsieh, Wei-Hsien; Huang, Chun-Yen; Wu, Wen-Bin; Shih, Chiang-Lin; Shih, Steven

2011-04-01

Double Patterning Technology (DPT) was commonly accepted as the major workhorse beyond water immersion lithography for sub-38nm half-pitch line patterning before the EUV production. For dense hole patterning, classical DPT employs self-aligned spacer deposition and uses the intersection of horizontal and vertical lines to define the desired hole patterns. However, the increase in manufacturing cost and process complexity is tremendous. Several innovative approaches have been proposed and experimented to address the manufacturing and technical challenges. A novel process of double patterned pillars combined image reverse will be proposed for the realization of low cost dense holes in 30nm node DRAM. The nature of pillar formation lithography provides much better optical contrast compared to the counterpart hole patterning with similar CD requirements. By the utilization of a reliable freezing process, double patterned pillars can be readily implemented. A novel image reverse process at the last stage defines the hole patterns with high fidelity. In this paper, several freezing processes for the construction of the double patterned pillars were tested and compared, and 30nm double patterning pillars were demonstrated successfully. A variety of different image reverse processes will be investigated and discussed for their pros and cons. An economic approach with the optimized lithography performance will be proposed for the application of 30nm DRAM node.

New type of dummy layout pattern to control ILD etch rate

NASA Astrophysics Data System (ADS)

Pohland, Oliver; Spieker, Julie; Huang, Chih-Ta; Govindaswamy, Srikanth; Balasinski, Artur

2007-12-01

Adding dummy features (waffles) to drawn geometries of the circuit layout is a common practice to improve its manufacturability. As an example, local dummy pattern improves MOSFET line and space CD control by adjusting short range optical proximity and reducing the aggressiveness of its correction features (OPC) to widen the lithography process window. Another application of dummy pattern (waffles) is to globally equalize layout pattern density, to reduce long-range inter-layer dielectric (ILD) thickness variations after the CMP process and improve contact resistance uniformity over the die area. In this work, we discuss a novel type of dummy pattern with a mid-range interaction distance, to control the ILD composition driven by its deposition and etch process. This composition is reflected on sidewall spacers and depends on the topography of the underlying poly pattern. During contact etch, it impacts the etch rate of the ILD. As a result, the deposited W filling the damascene etched self-aligned trench contacts in the ILD may electrically short to the underlying gates in the areas of isolated poly. To mitigate the dependence of the ILD composition on poly pattern distribution, we proposed a special dummy feature generation with the interaction range defined by the ILD deposition and etch process. This helped equalize mid-range poly pattern density without disabling the routing capability with damascene trench contacts in the periphery which would have increased the layout footprint.

High throughput, high resolution enzymatic lithography process: effect of crystallite size, moisture, and enzyme concentration.

PubMed

Mao, Zhantong; Ganesh, Manoj; Bucaro, Michael; Smolianski, Igor; Gross, Richard A; Lyons, Alan M

2014-12-08

By bringing enzymes into contact with predefined regions of a surface, a polymer film can be selectively degraded to form desired patterns that find a variety of applications in biotechnology and electronics. This so-called "enzymatic lithography" is an environmentally friendly process as it does not require actinic radiation or synthetic chemicals to develop the patterns. A significant challenge to using enzymatic lithography has been the need to restrict the mobility of the enzyme in order to maintain control of feature sizes. Previous approaches have resulted in low throughput and were limited to polymer films only a few nanometers thick. In this paper, we demonstrate an enzymatic lithography system based on Candida antartica lipase B (CALB) and poly(ε-caprolactone) (PCL) that can resolve fine-scale features, (<1 μm across) in thick (0.1-2.0 μm) polymer films. A Polymer Pen Lithography (PPL) tool was developed to deposit an aqueous solution of CALB onto a spin-cast PCL film. Immobilization of the enzyme on the polymer surface was monitored using fluorescence microscopy by labeling CALB with FITC. The crystallite size in the PCL films was systematically varied; small crystallites resulted in significantly faster etch rates (20 nm/min) and the ability to resolve smaller features (as fine as 1 μm). The effect of printing conditions and relative humidity during incubation is also presented. Patterns formed in the PCL film were transferred to an underlying copper foil demonstrating a "Green" approach to the fabrication of printed circuit boards.

Integration of plant viruses in electron beam lithography nanostructures.

PubMed

Alonso, Jose M; Ondarçuhu, Thierry; Bittner, Alexander M

2013-03-15

Tobacco mosaic virus (TMV) is the textbook example of a virus, and also of a self-assembling nanoscale structure. This tubular RNA/protein architecture has also found applications as biotemplate for the synthesis of nanomaterials such as wires, as tubes, or as nanoparticle assemblies. Although TMV is, being a biological structure, quite resilient to environmental conditions (temperature, chemicals), it cannot be processed in electron beam lithography (eBL) fabrication, which is the most important and most versatile method of nanoscale structuring. Here we present adjusted eBL-compatible processes that allow the incorporation of TMV in nanostructures made of positive and negative tone eBL resists. The key steps are covering TMV by polymer resists, which are only heated to 50 °C, and development (selective dissolution) in carefully selected organic solvents. We demonstrate the post-lithography biochemical functionality of TMV by selective immunocoating of the viral particles, and the use of immobilized TMV as direct immunosensor. Our modified eBL process should be applicable to incorporate a wide range of sensitive materials in nanofabrication schemes.

First Results From A Multi-Ion Beam Lithography And Processing System At The University Of Florida

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gila, Brent; Appleton, Bill R.; Fridmann, Joel

2011-06-01

The University of Florida (UF) have collaborated with Raith to develop a version of the Raith ionLiNE IBL system that has the capability to deliver multi-ion species in addition to the Ga ions normally available. The UF system is currently equipped with a AuSi liquid metal alloy ion source (LMAIS) and ExB filter making it capable of delivering Au and Si ions and ion clusters for ion beam processing. Other LMAIS systems could be developed in the future to deliver other ion species. This system is capable of high performance ion beam lithography, sputter profiling, maskless ion implantation, ion beammore » mixing, and spatial and temporal ion beam assisted writing and processing over large areas (100 mm2)--all with selected ion species at voltages from 15-40 kV and nanometer precision. We discuss the performance of the system with the AuSi LMAIS source and ExB mass separator. We report on initial results from the basic system characterization, ion beam lithography, as well as for basic ion-solid interactions.« less

Automated imprint mask cleaning for step-and-flash imprint lithography

NASA Astrophysics Data System (ADS)

Singh, Sherjang; Chen, Ssuwei; Selinidis, Kosta; Fletcher, Brian; McMackin, Ian; Thompson, Ecron; Resnick, Douglas J.; Dress, Peter; Dietze, Uwe

2009-03-01

Step-and-Flash Imprint Lithography (S-FIL) is a promising lithography strategy for semiconductor manufacturing at device nodes below 32nm. The S-FIL 1:1 pattern transfer technology utilizes a field-by-field ink jet dispense of a low viscosity liquid resist to fill the relief pattern of the device layer etched into the glass mask. Compared to other sub 40nm CD lithography methods, the resulting high resolution, high throughput through clustering, 3D patterning capability, low process complexity, and low cost of ownership (CoO) of S-FIL makes it a widely accepted technology for patterned media as well as a promising mainstream option for future CMOS applications. Preservation of mask cleanliness is essential to avoid risk of repeated printing of defects. The development of mask cleaning processes capable of removing particles adhered to the mask surface without damaging the mask is critical to meet high volume manufacturing requirements. In this paper we have presented various methods of residual (cross-linked) resist removal and final imprint mask cleaning demonstrated on the HamaTech MaskTrack automated mask cleaning system. Conventional and non-conventional (acid free) methods of particle removal have been compared and the effect of mask cleaning on pattern damage and CD integrity is also studied.

Non-CAR resists and advanced materials for Massively Parallel E-Beam Direct Write process integration

NASA Astrophysics Data System (ADS)

Pourteau, Marie-Line; Servin, Isabelle; Lepinay, Kévin; Essomba, Cyrille; Dal'Zotto, Bernard; Pradelles, Jonathan; Lattard, Ludovic; Brandt, Pieter; Wieland, Marco

2016-03-01

The emerging Massively Parallel-Electron Beam Direct Write (MP-EBDW) is an attractive high resolution high throughput lithography technology. As previously shown, Chemically Amplified Resists (CARs) meet process/integration specifications in terms of dose-to-size, resolution, contrast, and energy latitude. However, they are still limited by their line width roughness. To overcome this issue, we tested an alternative advanced non-CAR and showed it brings a substantial gain in sensitivity compared to CAR. We also implemented and assessed in-line post-lithographic treatments for roughness mitigation. For outgassing-reduction purpose, a top-coat layer is added to the total process stack. A new generation top-coat was tested and showed improved printing performances compared to the previous product, especially avoiding dark erosion: SEM cross-section showed a straight pattern profile. A spin-coatable charge dissipation layer based on conductive polyaniline has also been tested for conductivity and lithographic performances, and compatibility experiments revealed that the underlying resist type has to be carefully chosen when using this product. Finally, the Process Of Reference (POR) trilayer stack defined for 5 kV multi-e-beam lithography was successfully etched with well opened and straight patterns, and no lithography-etch bias.

Picosecond excimer laser-plasma x-ray source for microscopy, biochemistry, and lithography

NASA Astrophysics Data System (ADS)

Turcu, I. C. Edmond; Ross, Ian N.; Trenda, P.; Wharton, C. W.; Meldrum, R. A.; Daido, Hiroyuki; Schulz, M. S.; Fluck, P.; Michette, Alan G.; Juna, A. P.; Maldonado, Juan R.; Shields, Harry; Tallents, Gregory J.; Dwivedi, L.; Krishnan, J.; Stevens, D. L.; Jenner, T.; Batani, Dimitri; Goodson, H.

1994-02-01

At Rutherford Appleton Laboratory we developed a high repetition rate, picosecond, excimer laser system which generates a high temperature and density plasma source emitting approximately 200 mW (78 mW/sr) x ray average power at h(nu) approximately 1.2 KeV or 0.28 KeV < h(nu) < 0.53 KeV (the `water window'). At 3.37 nm wavelength the spectral brightness of the source is approximately 9 X 1011 photons/s/mm2/mrad2/0.1% bandwidth. The x-ray source serves a large user community for applications such as: scanning and holographic microscopy, the study of the biochemistry of DNA damage and repair, microlithography and spectroscopy.

Fabrication of a Polymer Micro Needle Array by Mask-Dragging X-Ray Lithography and Alignment X-Ray Lithography

NASA Astrophysics Data System (ADS)

Li, Yi-Gui; Yang, Chun-Sheng; Liu, Jing-Quan; Sugiyama, Susumu

2011-03-01

Polymer materials such as transparent thermoplastic poly(methyl methacrylate) (PMMA) have been of great interest in the research and development of integrated circuits and micro-electromechanical systems due to their relatively low cost and easy process. We fabricated PMMA-based polymer hollow microneedle arrays by mask-dragging and aligning x-ray lithography. Techniques for 3D micromachining by direct lithography using x-rays are developed. These techniques are based on using image projection in which the x-ray is used to illuminate an appropriate gold pattern on a polyimide film mask. The mask is imaged onto the PMMA sample. A pattern with an area of up to 100 × 100mm2 can be fabricated with sub-micron resolution and a highly accurate order of a few microns by using a dragging mask. The fabrication technology has several advantages, such as forming complex 3D micro structures, high throughput and low cost.

Suspended liquid subtractive lithography: printing three dimensional channels directly into uncured PDMS

NASA Astrophysics Data System (ADS)

Helmer, D.; Voigt, A.; Wagner, S.; Keller, N.; Sachsenheimer, K.; Kotz, F.; Nargang, T. M.; Rapp, B. E.

2018-02-01

Polydimethylsiloxane (PDMS) is one of the most widely used polymers for the generation of microfluidic chips. The standard procedures of soft lithography require the formation of a new master structure for every design which is timeconsuming and expensive. All channel generated by soft lithography need to be consecutively sealed by bonding which is a process that can proof to be hard to control. Channel cross-sections are largely restricted to squares or flat-topped designs and the generation of truly three-dimensional designs is not straightforward. Here we present Suspended Liquid Subtractive Lithography (SLSL) a method for generating microfluidic channels of nearly arbitrary three-dimensional structures in PDMS that do not require master formation or bonding and give circular channel cross sections which are especially interesting for mimicking in vivo environments. In SLSL, an immiscible liquid is introduced into the uncured PDMS by a capillary mounted on a 3D printer head. The liquid forms continuous "threads" inside the matrix thus creating void suspended channel structures.

Compact synchrotron radiation depth lithography facility

NASA Astrophysics Data System (ADS)

Knüppel, O.; Kadereit, D.; Neff, B.; Hormes, J.

1992-01-01

X-ray depth lithography allows the fabrication of plastic microstructures with heights of up to 1 mm but with the smallest possible lateral dimensions of about 1 μm. A resist is irradiated with ``white'' synchrotron radiation through a mask that is partially covered with x-ray absorbing microstructures. The plastic microstructure is then obtained by a subsequent chemical development of the irradiated resist. In order to irradiate a reasonably large resist area, the mask and the resist have to be ``scanned'' across the vertically thin beam of the synchrotron radiation. A flexible, nonexpensive and compact scanner apparatus has been built for x-ray depth lithography at the beamline BN1 at ELSA (the 3.5 GeV Electron Stretcher and Accelerator at the Physikalisches Institut of Bonn University). Measurements with an electronic water level showed that the apparatus limits the scanner-induced structure precision to not more than 0.02 μm. The whole apparatus is installed in a vacuum chamber thus allowing lithography under different process gases and pressures.

Creating Active Device Materials for Nanoelectronics Using Block Copolymer Lithography

PubMed Central

Morris, Michael A.

2017-01-01

The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO3) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP soft template. We outline WO3 nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO3 nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance. PMID:28973987

Fabrication of 3D surface structures using grayscale lithography

NASA Astrophysics Data System (ADS)

Stilson, Christopher; Pal, Rajan; Coutu, Ronald A.

2014-03-01

The ability to design and develop 3D microstructures is important for microelectromechanical systems (MEMS) fabrication. Previous techniques used to create 3D devices included tedious steps in direct writing and aligning patterns onto a substrate followed by multiple photolithography steps using expensive, customized equipment. Additionally, these techniques restricted batch processing and placed limits on achievable shapes. Gray-scale lithography enables the fabrication of a variety of shapes using a single photolithography step followed by reactive ion etching (RIE). Micromachining 3D silicon structures for MEMS can be accomplished using gray-scale lithography along with dry anisotropic etching. In this study, we investigated: using MATLAB for mask designs; feasibility of using 1 μm Heidelberg mask maker to direct write patterns onto photoresist; using RIE processing to etch patterns into a silicon substrate; and the ability to tailor etch selectivity for precise fabrication. To determine etch rates and to obtain desired etch selectivity, parameters such as gas mixture, gas flow, and electrode power were studied. This process successfully demonstrates the ability to use gray-scale lithography and RIE for use in the study of micro-contacts. These results were used to produce a known engineered non-planer surface for testing micro-contacts. Surface structures are between 5 μm and 20 μm wide with varying depths and slopes based on mask design and etch rate selectivity. The engineered surfaces will provide more insight into contact geometries and failure modes of fixed-fixed micro-contacts.

Creating Active Device Materials for Nanoelectronics Using Block Copolymer Lithography.

PubMed

Cummins, Cian; Bell, Alan P; Morris, Michael A

2017-09-30

The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO₃) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)- block -poly(4-vinylpyridine) (PS- b -P4VP) BCP soft template. We outline WO₃ nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO₃ nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance.

The lithographer's dilemma: shrinking without breaking the bank

NASA Astrophysics Data System (ADS)

Levinson, Harry J.

2013-10-01

It can no longer be assumed that the lithographic scaling which has previously driven Moore's Law will lead in the future to reduced cost per transistor. Until recently, higher prices for lithography tools were offset by improvements in scanner productivity. The necessity of using double patterning to extend scaling beyond the single exposure resolution limit of optical lithography has resulted in a sharp increase in the cost of patterning a critical construction layer that has not been offset by improvements in exposure tool productivity. Double patterning has also substantially increased the cost of mask sets. EUV lithography represents a single patterning option, but the combination of very high exposure tools prices, moderate throughput, high maintenance costs, and expensive mask blanks makes this a solution more expensive than optical double patterning but less expensive than triple patterning. Directed self-assembly (DSA) could potentially improve wafer costs, but this technology currently is immature. There are also design layout and process integration issues associated with DSA that need to be solved in order to obtain full benefit from tighter pitches. There are many approaches for improving the cost effectiveness of lithography. Innovative double patterning schemes lead to smaller die. EUV lithography productivity can be improved with higher power light sources and improved reliability. There are many technical and business challenges for extending EUV lithography to higher numerical apertures. Efficient contact hole and cut mask solutions are needed, as well as very tight overlay control, regardless of lithographic solution.

Line edge roughness (LER) mitigation studies specific to interference-like lithography

NASA Astrophysics Data System (ADS)

Baylav, Burak; Estroff, Andrew; Xie, Peng; Smith, Bruce W.

2013-04-01

Line edge roughness (LER) is a common problem to most lithography approaches and is seen as the main resolution limiter for advanced technology nodes1. There are several contributors to LER such as chemical/optical shot noise, random nature of acid diffusion, development process, and concentration of acid generator/base quencher. Since interference-like lithography (IL) is used to define one directional gridded patterns, some LER mitigation approaches specific to IL-like imaging can be explored. Two methods investigated in this work for this goal are (i) translational image averaging along the line direction and (ii) pupil plane filtering. Experiments regarding the former were performed on both interferometric and projection lithography systems. Projection lithography experiments showed a small amount of reduction in low/mid frequency LER value for image averaged cases at pitch of 150 nm (193 nm illumination, 0.93 NA) with less change for smaller pitches. Aerial image smearing did not significantly increase LER since it was directional. Simulation showed less than 1% reduction in NILS (compared to a static, smooth mask equivalent) with ideal alignment. In addition, description of pupil plane filtering on the transfer of mask roughness is given. When astigmatism-like aberrations were introduced in the pupil, transfer of mask roughness is decreased at best focus. It is important to exclude main diffraction orders from the filtering to prevent contrast and NILS loss. These ideas can be valuable as projection lithography approaches to conditions similar to IL (e.g. strong RET methods).

Ecofriendly ethanol-developable processes for electron beam lithography using positive-tone dextrin resist material

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Sugino, Naoto; Hanabata, Makoto; Oshima, Akihiro; Kashiwakura, Miki; Kozawa, Takahiro; Tagawa, Seiichi

2017-07-01

From the viewpoints of the utilization of agricultural resources and advanced use of biomass, this study is aimed at expanding the resolution limits of ecofriendly ethanol-developable processes for electron-beam lithography using a positive-tone dextrin resist material with high hydrophilicity on a cellulose-based underlayer. The images of 20-nm-hole and 40-nm-line patterns with an exposure dose of approximately 1800 µC/cm2 were provided by ecofriendly ethanol-developable processes instead of the common development processes using tetramethylammonium hydroxide and organic solvents. The CF4 etching selectivity of the positive-tone dextrin resist material was approximately 10% lower than that of the polymethyl methacrylate used as a reference resist material.

Study of correlation between overlay and displacement measured by Coherent Gradient Sensing (CGS) interferometry

NASA Astrophysics Data System (ADS)

Mileham, Jeffrey; Tanaka, Yasushi; Anberg, Doug; Owen, David M.; Lee, Byoung-Ho; Bouche, Eric

2016-03-01

Within the semiconductor lithographic process, alignment control is one of the most critical considerations. In order to realize high device performance, semiconductor technology is approaching the 10 nm design rule, which requires progressively smaller overlay budgets. Simultaneously, structures are expanding in the 3rd dimension, thereby increasing the potential for inter-layer distortion. For these reasons, device patterning is becoming increasingly difficult as the portion of the overlay budget attributed to process-induced variation increases. After lithography, overlay gives valuable feedback to the lithography tool; however overlay measurements typically have limited density, especially at the wafer edge, due to throughput considerations. Moreover, since overlay is measured after lithography, it can only react to, but not predict the process-induced overlay. This study is a joint investigation in a high-volume manufacturing environment of the portion of overlay associated with displacement induced by a single process across many chambers. Displacement measurements are measured by Coherent Gradient Sensing (CGS) interferometry, which generates high-density displacement maps (>3 million points on a 300 mm wafer) such that the stresses induced die-by-die and process-by-process can be tracked in detail. The results indicate the relationship between displacement and overlay shows the ability to forecast overlay values before the lithographic process. Details of the correlation including overlay/displacement range, and lot-to-lot displacement variability are considered.

Scalable fabrication of nanostructured devices on flexible substrates using additive driven self-assembly and nanoimprint lithography

NASA Astrophysics Data System (ADS)

Watkins, James

2013-03-01

Roll-to-roll (R2R) technologies provide routes for continuous production of flexible, nanostructured materials and devices with high throughput and low cost. We employ additive-driven self-assembly to produce well-ordered polymer/nanoparticle hybrid materials that can serve as active device layers, we use highly filled nanoparticle/polymer hybrids for applications that require tailored dielectric constant or refractive index, and we employ R2R nanoimprint lithography for device scale patterning. Specific examples include the fabrication of flexible floating gate memory and large area films for optical/EM management. Our newly constructed R2R processing facility includes a custom designed, precision R2R UV-assisted nanoimprint lithography (NIL) system and hybrid nanostructured materials coaters.

X-ray lithography source

DOEpatents

Piestrup, Melvin A.; Boyers, David G.; Pincus, Cary

1991-01-01

A high-intensity, inexpensive X-ray source for X-ray lithography for the production of integrated circuits. Foil stacks are bombarded with a high-energy electron beam of 25 to 250 MeV to produce a flux of soft X-rays of 500 eV to 3 keV. Methods of increasing the total X-ray power and making the cross section of the X-ray beam uniform are described. Methods of obtaining the desired X-ray-beam field size, optimum frequency spectrum and elminating the neutron flux are all described. A method of obtaining a plurality of station operation is also described which makes the process more efficient and economical. The satisfying of these issues makes transition radiation an exellent moderate-priced X-ray source for lithography.

Sequential infiltration synthesis for advanced lithography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Darling, Seth B.; Elam, Jeffrey W.; Tseng, Yu-Chih

A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned usingmore » photolithography, electron-beam lithography or a block copolymer self-assembly process.« less

Organic solvent-free sugar-based transparency nanopatterning material derived from biomass for eco-friendly optical biochips using green lithography

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Oshima, Akihiro; Oyama, Tomoko G.; Ito, Kenta; Sugahara, Kigenn; Kashiwakura, Miki; Kozawa, Takahiro; Tagawa, Seiichi

2014-05-01

An organic solvent-free sugar-based transparency nanopatterning material which had specific desired properties such as nanostructures of subwavelength grating and moth-eye antireflection, acceptable thermal stability of 160 °C, and low imaginary refractive index of less than 0.005 at 350-800 nm was proposed using electron beam lithography. The organic solvent-free sugar-based transparency nanopatterning material is expected for non-petroleum resources, environmental affair, safety, easiness of handling, and health of the working people, instead of the common developable process of tetramethylammonium hydroxide. 120 nm moth-eye antireflection nanopatterns images with exposure dose of 10 μC/cm2 were provided by specific process conditions of electron beam lithography. The developed sugar derivatives with hydroxyl groups and EB sensitive groups in the organic solvent-free sugar-based transparency nanopatterning material were applicable to future development of optical interface films of biology and electronics as a novel chemical design.

Advanced light source technologies that enable high-volume manufacturing of DUV lithography extensions

NASA Astrophysics Data System (ADS)

Cacouris, Theodore; Rao, Rajasekhar; Rokitski, Rostislav; Jiang, Rui; Melchior, John; Burfeindt, Bernd; O'Brien, Kevin

2012-03-01

Deep UV (DUV) lithography is being applied to pattern increasingly finer geometries, leading to solutions like double- and multiple-patterning. Such process complexities lead to higher costs due to the increasing number of steps required to produce the desired results. One of the consequences is that the lithography equipment needs to provide higher operating efficiencies to minimize the cost increases, especially for producers of memory devices that experience a rapid decline in sales prices of these products over time. In addition to having introduced higher power 193nm light sources to enable higher throughput, we previously described technologies that also enable: higher tool availability via advanced discharge chamber gas management algorithms; improved process monitoring via enhanced on-board beam metrology; and increased depth of focus (DOF) via light source bandwidth modulation. In this paper we will report on the field performance of these technologies with data that supports the desired improvements in on-wafer performance and operational efficiencies.

Variability-aware double-patterning layout optimization for analog circuits

NASA Astrophysics Data System (ADS)

Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Lee, Zhao Chuan; Tseng, I.-Lun; Ong, Jonathan Yoong Seang

2018-03-01

The semiconductor industry has adopted multi-patterning techniques to manage the delay in the extreme ultraviolet lithography technology. During the design process of double-patterning lithography layout masks, two polygons are assigned to different masks if their spacing is less than the minimum printable spacing. With these additional design constraints, it is very difficult to find experienced layout-design engineers who have a good understanding of the circuit to manually optimize the mask layers in order to minimize color-induced circuit variations. In this work, we investigate the impact of double-patterning lithography on analog circuits and provide quantitative analysis for our designers to select the optimal mask to minimize the circuit's mismatch. To overcome the problem and improve the turn-around time, we proposed our smart "anchoring" placement technique to optimize mask decomposition for analog circuits. We have developed a software prototype that is capable of providing anchoring markers in the layout, allowing industry standard tools to perform automated color decomposition process.

Jet and flash imprint defectivity: assessment and reduction for semiconductor applications

NASA Astrophysics Data System (ADS)

Malloy, Matt; Litt, Lloyd C.; Johnson, Steve; Resnick, Douglas J.; Lovell, David

2011-04-01

Defectivity has been historically identified as a leading technical roadblock to the implementation of nanoimprint lithography for semiconductor high volume manufacturing. The lack of confidence in nanoimprint's ability to meet defect requirements originates in part from the industry's past experiences with 1X lithography and the shortage in end-user generated defect data. SEMATECH has therefore initiated a defect assessment aimed at addressing these concerns. The goal is to determine whether nanoimprint, specifically Jet and Flash Imprint Lithography from Molecular Imprints, is capable of meeting semiconductor industry defect requirements. At this time, several cycles of learning have been completed in SEMATECH's defect assessment, with promising results. J-FIL process random defectivity of < 0.1 def/cm2 has been demonstrated using a 120nm half-pitch template, providing proof of concept that a low defect nanoimprint process is possible. Template defectivity has also improved significantly as shown by a pre-production grade template at 80nm pitch. Cycles of learning continue on feature sizes down to 22nm.

Design, Fabrication and Characterization of Micro Opto-Electro-Mechanical Systems.

DTIC Science & Technology

1995-12-01

interference problems (see Fig. 3-6). Improvements in the lithography of the MCNC process would allow for grating spaces of less than 2 gm and therefore...A micro-spectrometer has been fabricated using LIGA, an acronym for lithography , electroforming, and micromolding (the acronym came from the German...location for test samples and an adjustable mirror. The beams are brought back together to form an interference pattern. At an observation screen the

Electrically conducting nanopatterns formed by chemical e-beam lithography via gold nanoparticle seeds.

PubMed

Schaal, Patrick A; Besmehn, Astrid; Maynicke, Eva; Noyong, Michael; Beschoten, Bernd; Simon, Ulrich

2012-02-07

We report the formation of thiol nanopatterns on SAM covered silicon wafers by converting sulfonic acid head groups via e-beam lithography. These thiol groups act as binding sites for gold nanoparticles, which can be enhanced to form electrically conducting nanostructures. This approach serves as a proof-of-concept for the combination of top-down and bottom-up processes for the generation of electrical devices on silicon.

Scalable Fabrication of Integrated Nanophotonic Circuits on Arrays of Thin Single Crystal Diamond Membrane Windows.

PubMed

Piracha, Afaq H; Rath, Patrik; Ganesan, Kumaravelu; Kühn, Stefan; Pernice, Wolfram H P; Prawer, Steven

2016-05-11

Diamond has emerged as a promising platform for nanophotonic, optical, and quantum technologies. High-quality, single crystalline substrates of acceptable size are a prerequisite to meet the demanding requirements on low-level impurities and low absorption loss when targeting large photonic circuits. Here, we describe a scalable fabrication method for single crystal diamond membrane windows that achieves three major goals with one fabrication method: providing high quality diamond, as confirmed by Raman spectroscopy; achieving homogeneously thin membranes, enabled by ion implantation; and providing compatibility with established planar fabrication via lithography and vertical etching. On such suspended diamond membranes we demonstrate a suite of photonic components as building blocks for nanophotonic circuits. Monolithic grating couplers are used to efficiently couple light between photonic circuits and optical fibers. In waveguide coupled optical ring resonators, we find loaded quality factors up to 66 000 at a wavelength of 1560 nm, corresponding to propagation loss below 7.2 dB/cm. Our approach holds promise for the scalable implementation of future diamond quantum photonic technologies and all-diamond photonic metrology tools.

Advanced electric-field scanning probe lithography on molecular resist using active cantilever

NASA Astrophysics Data System (ADS)

Kaestner, Marcus; Aydogan, Cemal; Ivanov, Tzvetan; Ahmad, Ahmad; Angelov, Tihomir; Reum, Alexander; Ishchuk, Valentyn; Krivoshapkina, Yana; Hofer, Manuel; Lenk, Steve; Atanasov, Ivaylo; Holz, Mathias; Rangelow, Ivo W.

2015-07-01

The routine "on demand" fabrication of features smaller than 10 nm opens up new possibilities for the realization of many devices. Driven by the thermally actuated piezoresistive cantilever technology, we have developed a prototype of a scanning probe lithography (SPL) platform which is able to image, inspect, align, and pattern features down to the single digit nanoregime. Here, we present examples of practical applications of the previously published electric-field based current-controlled scanning probe lithography. In particular, individual patterning tests are carried out on calixarene by using our developed table-top SPL system. We have demonstrated the application of a step-and-repeat SPL method including optical as well as atomic force microscopy-based navigation and alignment. The closed-loop lithography scheme was applied to sequentially write positive and negative tone features. Due to the integrated unique combination of read-write cycling, each single feature is aligned separately with the highest precision and inspected after patterning. This routine was applied to create a pattern step by step. Finally, we have demonstrated the patterning over larger areas, over existing topography, and the practical applicability of the SPL processes for lithography down to 13-nm pitch patterns. To enhance the throughput capability variable beam diameter electric field, current-controlled SPL is briefly discussed.

Implementation of assist features in EUV lithography

NASA Astrophysics Data System (ADS)

Jiang, Fan; Burkhardt, Martin; Raghunathan, Ananthan; Torres, Andres; Gupta, Rachit; Word, James

2015-03-01

The introduction of EUV lithography will happen at a critical feature pitch which corresponds to a k1 factor of roughly 0.45. While this number seems not very aggressive compared to recent ArF lithography nodes, the number is sufficiently low that the introduction of assist features has to be considered. While the small NA makes the k1 factor larger, the depth of focus still needs to be scaled down with wavelength. However the exposure tool's focus control is not greatly improved over the ArF tools, so other solutions to improve the depth of focus, e.g. SRAFs, are needed. On the other hand, sub-resolution assist features (SRAFs) require very small mask dimensions, which make masks more costly to write and inspect. Another disadvantage of SRAFs is the fact that they may cause pattern-dependent best focus shift due to thick mask effects. Those effects can be predicted, but the shift of best focus and the associated tilt of Bossung curves make the process more difficult to control. We investigate the impact of SRAFs on printing in EUV lithography and evaluate advantages and disadvantages. By using image quality parameters such as best focus (BF), and depth of focus (DOF), respectively with and without SRAFs, we will answer the question if we can gain a net benefit for 1D and 2D patterns by adding SRAFs. SRAFs will only be introduced if any net improvement in process variation (PV) outweighs the additional expense of assist patterning on the mask. In this paper, we investigate the difference in printing behavior of symmetric and asymmetric SRAF placement and whether through slit effect needs to be considered in SRAF placement for EUV lithography.

Interference lithography for optical devices and coatings

NASA Astrophysics Data System (ADS)

Juhl, Abigail Therese

Interference lithography can create large-area, defect-free nanostructures with unique optical properties. In this thesis, interference lithography will be utilized to create photonic crystals for functional devices or coatings. For instance, typical lithographic processing techniques were used to create 1, 2 and 3 dimensional photonic crystals in SU8 photoresist. These structures were in-filled with birefringent liquid crystal to make active devices, and the orientation of the liquid crystal directors within the SU8 matrix was studied. Most of this thesis will be focused on utilizing polymerization induced phase separation as a single-step method for fabrication by interference lithography. For example, layered polymer/nanoparticle composites have been created through the one-step two-beam interference lithographic exposure of a dispersion of 25 and 50 nm silica particles within a photopolymerizable mixture at a wavelength of 532 nm. In the areas of constructive interference, the monomer begins to polymerize via a free-radical process and concurrently the nanoparticles move into the regions of destructive interference. The holographic exposure of the particles within the monomer resin offers a single-step method to anisotropically structure the nanoconstituents within a composite. A one-step holographic exposure was also used to fabricate self-healing coatings that use water from the environment to catalyze polymerization. Polymerization induced phase separation was used to sequester an isocyanate monomer within an acrylate matrix. Due to the periodic modulation of the index of refraction between the monomer and polymer, the coating can reflect a desired wavelength, allowing for tunable coloration. When the coating is scratched, polymerization of the liquid isocyanate is catalyzed by moisture in air; if the indices of the two polymers are matched, the coatings turn transparent after healing. Interference lithography offers a method of creating multifunctional self-healing coatings that readout when damage has occurred.

PMJ 2007 panel discussion overview: double exposure and double patterning for 32-nm half-pitch design node

NASA Astrophysics Data System (ADS)

Nagaoka, Yoshinori; Watanabe, Hidehiro

2007-10-01

As part of the technical program in Photomask Japan 2007, we held a panel discussion to discuss challenges and solutions for the double exposure and double patterning lithography technique for 32nm half-pitch design node. 4 panelists, Rik Jonckheere of IMEC, Belgium), Tsann-Binn Chiou of ASML Taiwan Ltd., Taiwan), Judy Huckabay of Cadence Design Systems Inc. (USA) and Yoshimitsu Okuda of Toppan Printing Co., Ltd., Japan) were invited to represent each key technical area. We also took a survey from the PMJ attendees prior to the panel discussion, to vote which key technical area they think the challenge exists for the 32nm half-pitch DE/DP lithography. The result of the survey was also presented during the panel discussion. One would intuitively think that by using a DE/DP technique you're relaxing the design rule by 2x, thus for 32nm node it's essentially the 65nm process- you're just repeating it 2 times. Well, not exactly, as identified by the panelists and the participants in the discussion. We recognized the difficulties in the LSI fabrication process steps, the lithography tool overlay, photomask CD and registration, and the issue of data splitting conflict. These difficulties are big challenge for both LSI and photomask manufactures; however, we have confirmed some solutions are already examined by the theoretical and experimental works of the people in research. Despite these difficulties, we are convinced that the immersion lithography with double exposure and double patterning techniques is one of the most promising candidates of the lithography for 32nm half pitch design node.

Metal-dielectric frequency-selective surface for high performance solar window coatings

NASA Astrophysics Data System (ADS)

Toor, Fatima; Guneratne, Ananda C.; Temchenko, Marina

2016-03-01

We demonstrate a solar control window film consisting of metallic nanoantennas designed to reflect infrared (IR) light while allowing visible light to pass through. The film consists of a capacitive frequency-selective surface (CFSS) which acts as a band-stop filter, reflecting only light at target wavelengths. The designed CFSS when installed on windows will lower air conditioning costs by reflecting undesired wavelengths of light and thus reduce the amount of heat that enters a building. State-of-the-art commercial solar control films consist of a multilayer stack which is costly ( 13/m2 to 40/m2) to manufacture and absorbs IR radiation, causing delamination or glass breakage when attached to windows. Our solar control film consists of a nanostructured metallic layer on a polyethylene terephthalate (PET) substrate that reflects IR radiation instead of absorbing it, solving the delamination problem. The CFSS is also easy to manufacture with roll-to-roll nanoimprint lithography at a cost of <$12/m2. We design the CFSS using the COMSOL Wave Optics module to solve for electromagnetic wave propagation in optical media via the finite element method. The simulation domain is reduced to a single unit cell with periodic boundary conditions to account for the symmetries of the planar, periodic CFSS. The design is optimized using parametric sweeps around the various geometric components of the metallic nanoantenna. Our design achieves peak reflection of 80% at 1000 nm and has a broadband IR response that will allow for optimum solar control without significantly affecting the transmission of visible light.

Merging Bottom-Up with Top-Down: Continuous Lamellar Networks and Block Copolymer Lithography

NASA Astrophysics Data System (ADS)

Campbell, Ian Patrick

Block copolymer lithography is an emerging nanopatterning technology with capabilities that may complement and eventually replace those provided by existing optical lithography techniques. This bottom-up process relies on the parallel self-assembly of macromolecules composed of covalently linked, chemically distinct blocks to generate periodic nanostructures. Among the myriad potential morphologies, lamellar structures formed by diblock copolymers with symmetric volume fractions have attracted the most interest as a patterning tool. When confined to thin films and directed to assemble with interfaces perpendicular to the substrate, two-dimensional domains are formed between the free surface and the substrate, and selective removal of a single block creates a nanostructured polymeric template. The substrate exposed between the polymeric features can subsequently be modified through standard top-down microfabrication processes to generate novel nanostructured materials. Despite tremendous progress in our understanding of block copolymer self-assembly, continuous two-dimensional materials have not yet been fabricated via this robust technique, which may enable nanostructured material combinations that cannot be fabricated through bottom-up methods. This thesis aims to study the effects of block copolymer composition and processing on the lamellar network morphology of polystyrene-block-poly(methyl methacrylate) (PS-b-PMMA) and utilize this knowledge to fabricate continuous two-dimensional materials through top-down methods. First, block copolymer composition was varied through homopolymer blending to explore the physical phenomena surrounding lamellar network continuity. After establishing a framework for tuning the continuity, the effects of various processing parameters were explored to engineer the network connectivity via defect annihilation processes. Precisely controlling the connectivity and continuity of lamellar networks through defect engineering and optimizing the block copolymer lithography process thus enabled the top-down fabrication of continuous two-dimensional gold networks with nanoscale properties. The lamellar structure of these networks was found to confer unique mechanical properties on the nanowire networks and suggests that materials templated via this method may be excellent candidates for integration into stretchable and flexible devices.

Comprehensive analysis of statistical and model-based overlay lot disposition methods

NASA Astrophysics Data System (ADS)

Crow, David A.; Flugaur, Ken; Pellegrini, Joseph C.; Joubert, Etienne L.

2001-08-01

Overlay lot disposition algorithms in lithography occupy some of the highest leverage decision points in the microelectronic manufacturing process. In a typical large volume sub-0.18micrometers fab the lithography lot disposition decision is made about 500 times per day. Each decision will send a lot of wafers either to the next irreversible process step or back to rework in an attempt to improve unacceptable overlay performance. In the case of rework, the intention is that the reworked lot will represent better yield (and thus more value) than the original lot and that the enhanced lot value will exceed the cost of rework. Given that the estimated cost of reworking a critical-level lot is around 10,000 (based upon the opportunity cost of consuming time on a state-of-the-art DUV scanner), we are faced with the implication that the lithography lot disposition decision process impacts up to 5 million per day in decisions. That means that a 1% error rate in this decision process represents over 18 million per year lost in profit for a representative sit. Remarkably, despite this huge leverage, the lithography lot disposition decision algorithm usually receives minimal attention. In many cases, this lack of attention has resulted in the retention of sub-optimal algorithms from earlier process generations and a significant negative impact on the economic output of many high-volume manufacturing sites. An ideal lot- dispositioning algorithm would be an algorithm that results into the best economic decision being made every time - lots would only be reworked where the expected value (EV) of the reworked lot minus the expected value of the original lot exceeds the cost of the rework: EV(reworked lot)- EV(original lot)>COST(rework process) Calculating the above expected values in real-time has generally been deemed too complicated and maintenance-intensive to be practical for fab operations, so a simplified rule is typically used.

Surface phenomena related to mirror degradation in extreme ultraviolet (EUV) lithography

NASA Astrophysics Data System (ADS)

Madey, Theodore E.; Faradzhev, Nadir S.; Yakshinskiy, Boris V.; Edwards, N. V.

2006-12-01

One of the most promising methods for next generation device manufacturing is extreme ultraviolet (EUV) lithography, which uses 13.5 nm wavelength radiation generated from freestanding plasma-based sources. The short wavelength of the incident illumination allows for a considerable decrease in printed feature size, but also creates a range of technological challenges not present for traditional optical lithography. Contamination and oxidation form on multilayer reflecting optics surfaces that not only reduce system throughput because of the associated reduction in EUV reflectivity, but also introduce wavefront aberrations that compromise the ability to print uniform features. Capping layers of ruthenium, films ∼2 nm thick, are found to extend the lifetime of Mo/Si multilayer mirrors used in EUV lithography applications. However, reflectivities of even the Ru-coated mirrors degrade in time during exposure to EUV radiation. Ruthenium surfaces are chemically reactive and are very effective as heterogeneous catalysts. In the present paper we summarize the thermal and radiation-induced surface chemistry of bare Ru exposed to gases; the emphasis is on H2O vapor, a dominant background gas in vacuum processing chambers. Our goal is to provide insights into the fundamental physical processes that affect the reflectivity of Ru-coated Mo/Si multilayer mirrors exposed to EUV radiation. Our ultimate goal is to identify and recommend practices or antidotes that may extend mirror lifetimes.

Fabrication of three-dimensional millimeter-height structures using direct ultraviolet lithography on liquid-state photoresist for simple and fast manufacturing

NASA Astrophysics Data System (ADS)

Kim, Jungkwun; Yoon, Yong-Kyu

2015-07-01

A rapid three-dimensional (3-D) ultraviolet (UV) lithography process for the fabrication of millimeter-tall high aspect ratio complex structures is presented. The liquid-state negative-tone photosensitive polyurethane, LF55GN, has been directly photopatterned using multidirectionally projected UV light for 3-D micropattern formation. The proposed lithographic scheme enabled us to overcome the maximum height obtained with a photopatternable epoxy, SU8, which has been conventionally most commonly used for the fabrication of tall and high aspect ratio microstructures. Also, the fabrication process time has been significantly reduced by eliminating photoresist-baking steps. Computer-controlled multidirectional UV lithography has been employed to fabricate 3-D structures, where the UV-exposure substrate is dynamically tilt-rotating during UV exposure to create various 3-D ray traces in the polyurethane layer. LF55GN has been characterized to provide feasible fabrication conditions for the multidirectional UV lithography. Very tall structures including a 6-mm tall triangular slab and a 5-mm tall hexablaze have been successfully fabricated. A 4.5-mm tall air-lifted polymer-core bowtie monopole antenna, which is the tallest monopole structure fabricated by photolithography and subsequent metallization, has been successfully demonstrated. The antenna shows a resonant radiation frequency of 12.34 GHz, a return loss of 36 dB, and a 10 dB bandwidth of 7%.

Nano-imprint lithography using poly (methyl methacrylate) (PMMA) and polystyrene (PS) polymers

NASA Astrophysics Data System (ADS)

Ting, Yung-Chiang; Shy, Shyi-Long

2016-04-01

Nano-imprinting lithography (NIL) technology, as one of the most promising fabrication technologies, has been demonstrated to be a powerful tool for large-area replication up to wafer-level, with features down to nanometer scale. The cost of resists used for NIL is important for wafer-level large-area replication. This study aims to develop capabilities in patterning larger area structure using thermal NIL. The commercial available Poly (Methyl Methacrylate) (PMMA) and Polystyrene (PS) polymers possess a variety of characteristics desirable for NIL, such as low material cost, low bulkvolumetric shrinkage, high spin coating thickness uniformity, high process stability, and acceptable dry-etch resistance. PMMA materials have been utilized for positive electron beam lithography for many years, offering high resolution capability and wide process latitude. In addition, it is preferable to have a negative resist like PMMA, which is a simple polymer with low cost and practically unlimited shelf life, and can be dissolved easily using commercial available Propylene glycol methyl ether acetate (PGMEA) safer solvent to give the preferred film thickness. PS is such a resist, as it undergoes crosslinking when exposed to deep UV light or an electron beam and can be used for NIL. The result is a cost effective patterning larger area structure using thermal nano-imprint lithography (NIL) by using commercial available PMMA and PS ploymers as NIL resists.

Improvement of sub-20nm pattern quality with dose modulation technique for NIL template production

NASA Astrophysics Data System (ADS)

Yagawa, Keisuke; Ugajin, Kunihiro; Suenaga, Machiko; Kanamitsu, Shingo; Motokawa, Takeharu; Hagihara, Kazuki; Arisawa, Yukiyasu; Kobayashi, Sachiko; Saito, Masato; Ito, Masamitsu

2016-04-01

Nanoimprint lithography (NIL) technology is in the spotlight as a next-generation semiconductor manufacturing technique for integrated circuits at 22 nm and beyond. NIL is the unmagnified lithography technique using template which is replicated from master templates. On the other hand, master templates are currently fabricated by electron-beam (EB) lithography[1]. In near future, finer patterns less than 15nm will be required on master template and EB data volume increases exponentially. So, we confront with a difficult challenge. A higher resolution EB mask writer and a high performance fabrication process will be required. In our previous study, we investigated a potential of photomask fabrication process for finer patterning and achieved 15.5nm line and space (L/S) pattern on template by using VSB (Variable Shaped Beam) type EB mask writer and chemically amplified resist. In contrast, we found that a contrast loss by backscattering decreases the performance of finer patterning. For semiconductor devices manufacturing, we must fabricate complicated patterns which includes high and low density simultaneously except for consecutive L/S pattern. Then it's quite important to develop a technique to make various size or coverage patterns all at once. In this study, a small feature pattern was experimentally formed on master template with dose modulation technique. This technique makes it possible to apply the appropriate exposure dose for each pattern size. As a result, we succeed to improve the performance of finer patterning in bright field area. These results show that the performance of current EB lithography process have a potential to fabricate NIL template.

Direct-write maskless lithography using patterned oxidation of Si-substrate Induced by femtosecond laser pulses

NASA Astrophysics Data System (ADS)

Kiani, Amirkianoosh; Venkatakrishnan, Krishnan; Tan, Bo

2013-03-01

In this study we report a new method for direct-write maskless lithography using oxidized silicon layer induced by high repetition (MHz) ultrafast (femtosecond) laser pulses under ambient condition. The induced thin layer of predetermined pattern can act as an etch stop during etching process in alkaline etchants such as KOH. The proposed method can be leading to promising solutions for direct-write maskless lithography technique since the proposed method offers a higher degree of flexibility and reduced time and cost of fabrication which makes it particularly appropriate for rapid prototyping and custom scale manufacturing. A Scanning Electron Microscope (SEM), Micro-Raman, Energy Dispersive X-ray (EDX), optical microscope and X-ray diffraction spectroscopy (XRD) were used to evaluate the quality of oxidized layer induced by laser pulses.

Sub-micron lines patterning into silica using water developable chitosan bioresist films for eco-friendly positive tone e-beam and UV lithography

NASA Astrophysics Data System (ADS)

Caillau, Mathieu; Chevalier, Céline; Crémillieu, Pierre; Delair, Thierry; Soppera, Olivier; Leuschel, Benjamin; Ray, Cédric; Moulin, Christophe; Jonin, Christian; Benichou, Emmanuel; Brevet, Pierre-François; Yeromonahos, Christelle; Laurenceau, Emmanuelle; Chevolot, Yann; Leclercq, Jean-Louis

2018-03-01

Biopolymers represent natural, renewable and abundant materials. Their use is steadily growing in various areas (food, health, building …) but, in lithography, despite some works, resists, solvents and developers are still oil-based and hazardous chemicals. In this work, we replaced synthetic resist by chitosan, a natural, abundant and hydrophilic polysaccharide. High resolution sub-micron patterns were obtained through chitosan films as water developable, chemically unmodified, positive tone mask resist for an eco-friendly electron beam and deep-UV (193 nm) lithography process. Sub-micron patterns were also successfully obtained using a 248 nm photomasker thanks to the addition of biosourced photoactivator, riboflavin. Patterns were then transferred by plasma etching into silica even for high resolution patterns.

Fabrication of a negative PMMA master mold for soft-lithography by MeV ion beam lithography

NASA Astrophysics Data System (ADS)

Puttaraksa, Nitipon; Unai, Somrit; Rhodes, Michael W.; Singkarat, Kanda; Whitlow, Harry J.; Singkarat, Somsorn

2012-02-01

In this study, poly(methyl methacrylate) (PMMA) was investigated as a negative resist by irradiation with a high-fluence 2 MeV proton beam. The beam from a 1.7 MV Tandetron accelerator at the Plasma and Beam Physics Research Facility (PBP) of Chiang Mai University is shaped by a pair of computer-controlled L-shaped apertures which are used to expose rectangular pattern elements with 1-1000 μm side length. Repeated exposure of rectangular pattern elements allows a complex pattern to be built up. After subsequent development, the negative PMMA microstructure was used as a master mold for casting poly(dimethylsiloxane) (PDMS) following a standard soft-lithography process. The PDMS chip fabricated by this technique was demonstrated to be a microfluidic device.

X-ray lithography source

DOEpatents

Piestrup, M.A.; Boyers, D.G.; Pincus, C.

1991-12-31

A high-intensity, inexpensive X-ray source for X-ray lithography for the production of integrated circuits is disclosed. Foil stacks are bombarded with a high-energy electron beam of 25 to 250 MeV to produce a flux of soft X-rays of 500 eV to 3 keV. Methods of increasing the total X-ray power and making the cross section of the X-ray beam uniform are described. Methods of obtaining the desired X-ray-beam field size, optimum frequency spectrum and eliminating the neutron flux are all described. A method of obtaining a plurality of station operation is also described which makes the process more efficient and economical. The satisfying of these issues makes transition radiation an excellent moderate-priced X-ray source for lithography. 26 figures.

Fabrication of sub-12 nm thick silicon nanowires by processing scanning probe lithography masks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kyoung Ryu, Yu; Garcia, Ricardo, E-mail: r.garcia@csic.es; Aitor Postigo, Pablo

2014-06-02

Silicon nanowires are key elements to fabricate very sensitive mechanical and electronic devices. We provide a method to fabricate sub-12 nm silicon nanowires in thickness by combining oxidation scanning probe lithography and anisotropic dry etching. Extremely thin oxide masks (0.3–1.1 nm) are transferred into nanowires of 2–12 nm in thickness. The width ratio between the mask and the silicon nanowire is close to one which implies that the nanowire width is controlled by the feature size of the nanolithography. This method enables the fabrication of very small single silicon nanowires with cross-sections below 100 nm{sup 2}. Those values are the smallest obtained withmore » a top-down lithography method.« less

Manufacturability improvements in EUV resist processing toward NXE:3300 processing

NASA Astrophysics Data System (ADS)

Kuwahara, Yuhei; Matsunaga, Koichi; Shimoaoki, Takeshi; Kawakami, Shinichiro; Nafus, Kathleen; Foubert, Philippe; Goethals, Anne-Marie; Shimura, Satoru

2014-03-01

As the design rule of semiconductor process gets finer, extreme ultraviolet lithography (EUVL) technology is aggressively studied as a process for 22nm half pitch and beyond. At present, the studies for EUV focus on manufacturability. It requires fine resolution, uniform, smooth patterns and low defectivity, not only after lithography but also after the etch process. In the first half of 2013, a CLEAN TRACKTM LITHIUS ProTMZ-EUV was installed at imec for POR development in preparation of the ASML NXE:3300. This next generation coating/developing system is equipped with state of the art defect reduction technology. This tool with advanced functions can achieve low defect levels. This paper reports on the progress towards manufacturing defectivity levels and latest optimizations towards the NXE:3300 POR for both lines/spaces and contact holes at imec.

Critical aspects of substrate nanopatterning for the ordered growth of GaN nanocolumns.

PubMed

Barbagini, Francesca; Bengoechea-Encabo, Ana; Albert, Steven; Martinez, Javier; Sanchez García, Miguel Angel; Trampert, Achim; Calleja, Enrique

2011-12-14

Precise and reproducible surface nanopatterning is the key for a successful ordered growth of GaN nanocolumns. In this work, we point out the main technological issues related to the patterning process, mainly surface roughness and cleaning, and mask adhesion to the substrate. We found that each of these factors, process-related, has a dramatic impact on the subsequent selective growth of the columns inside the patterned holes. We compare the performance of e-beam lithography, colloidal lithography, and focused ion beam in the fabrication of hole-patterned masks for ordered columnar growth. These results are applicable to the ordered growth of nanocolumns of different materials.

Machine learning for inverse lithography: using stochastic gradient descent for robust photomask synthesis

NASA Astrophysics Data System (ADS)

Jia, Ningning; Y Lam, Edmund

2010-04-01

Inverse lithography technology (ILT) synthesizes photomasks by solving an inverse imaging problem through optimization of an appropriate functional. Much effort on ILT is dedicated to deriving superior masks at a nominal process condition. However, the lower k1 factor causes the mask to be more sensitive to process variations. Robustness to major process variations, such as focus and dose variations, is desired. In this paper, we consider the focus variation as a stochastic variable, and treat the mask design as a machine learning problem. The stochastic gradient descent approach, which is a useful tool in machine learning, is adopted to train the mask design. Compared with previous work, simulation shows that the proposed algorithm is effective in producing robust masks.

Contact patterning strategies for 32nm and 28nm technology

NASA Astrophysics Data System (ADS)

Morgenfeld, Bradley; Stobert, Ian; An, Ju j.; Kanai, Hideki; Chen, Norman; Aminpur, Massud; Brodsky, Colin; Thomas, Alan

2011-04-01

As 193 nm immersion lithography is extended indefinitely to sustain technology roadmaps, there is increasing pressure to contain escalating lithography costs by identifying patterning solutions that can minimize the use of multiple-pass processes. Contact patterning for the 32/28 nm technology nodes has been greatly facilitated by just-in-time introduction of new process enablers that allow the simultaneous support of flexible foundry-oriented ground rules alongside highperformance technology, while also migrating to a single-pass patterning process. The incorporation of device based performance metrics along with rigorous patterning and structural variability studies were critical in the evaluation of material innovation for improved resolution and CD shrink along with novel data preparation flows utilizing aggressive strategies for SRAF insertion and retargeting.

High order field-to-field corrections for imaging and overlay to achieve sub 20-nm lithography requirements

NASA Astrophysics Data System (ADS)

Mulkens, Jan; Kubis, Michael; Hinnen, Paul; de Graaf, Roelof; van der Laan, Hans; Padiy, Alexander; Menchtchikov, Boris

2013-04-01

Immersion lithography is being extended to the 20-nm and 14-nm node and the lithography performance requirements need to be tightened further to enable this shrink. In this paper we present an integral method to enable high-order fieldto- field corrections for both imaging and overlay, and we show that this method improves the performance with 20% - 50%. The lithography architecture we build for these higher order corrections connects the dynamic scanner actuators with the angle resolved scatterometer via a separate application server. Improvements of CD uniformity are based on enabling the use of freeform intra-field dose actuator and field-to-field control of focus. The feedback control loop uses CD and focus targets placed on the production mask. For the overlay metrology we use small in-die diffraction based overlay targets. Improvements of overlay are based on using the high order intra-field correction actuators on a field-tofield basis. We use this to reduce the machine matching error, extending the heating control and extending the correction capability for process induced errors.

Triple/quadruple patterning layout decomposition via linear programming and iterative rounding

NASA Astrophysics Data System (ADS)

Lin, Yibo; Xu, Xiaoqing; Yu, Bei; Baldick, Ross; Pan, David Z.

2017-04-01

As the feature size of the semiconductor technology scales down to 10 nm and beyond, multiple patterning lithography (MPL) has become one of the most practical candidates for lithography, along with other emerging technologies, such as extreme ultraviolet lithography (EUVL), e-beam lithography (EBL), and directed self-assembly. Due to the delay of EUVL and EBL, triple and even quadruple patterning is considered to be used for lower metal and contact layers with tight pitches. In the process of MPL, layout decomposition is the key design stage, where a layout is split into various parts and each part is manufactured through a separate mask. For metal layers, stitching may be allowed to resolve conflicts, whereas it is forbidden for contact and via layers. We focus on the application of layout decomposition where stitching is not allowed, such as for contact and via layers. We propose a linear programming (LP) and iterative rounding solving technique to reduce the number of nonintegers in the LP relaxation problem. Experimental results show that the proposed algorithms can provide high quality decomposition solutions efficiently while introducing as few conflicts as possible.

3D Microfabrication Using Emulsion Mask Grayscale Photolithography Technique

NASA Astrophysics Data System (ADS)

Lee, Tze Pin; Mohamed, Khairudin

2016-02-01

Recently, the rapid development of technology such as biochips, microfluidic, micro-optical devices and micro-electromechanical-systems (MEMS) demands the capability to create complex design of three-dimensional (3D) microstructures. In order to create 3D microstructures, the traditional photolithography process often requires multiple photomasks to form 3D pattern from several stacked photoresist layers. This fabrication method is extremely time consuming, low throughput, costly and complicated to conduct for high volume manufacturing scale. On the other hand, next generation lithography such as electron beam lithography (EBL), focused ion beam lithography (FIB) and extreme ultraviolet lithography (EUV) are however too costly and the machines require expertise to setup. Therefore, the purpose of this study is to develop a simplified method in producing 3D microstructures using single grayscale emulsion mask technique. By using this grayscale fabrication method, microstructures of thickness as high as 500μm and as low as 20μm are obtained in a single photolithography exposure. Finally, the fabrication of 3D microfluidic channel has been demonstrated by using this grayscale photolithographic technique.

Double exposure technique for 45nm node and beyond

NASA Astrophysics Data System (ADS)

Hsu, Stephen; Park, Jungchul; Van Den Broeke, Douglas; Chen, J. Fung

2005-11-01

The technical challenges in using F2 lithography for the 45nm node, along with the insurmountable difficulties in EUV lithography, has driven the semiconductor chipmaker into the low k1 lithography era under the pressure of ever decreasing feature sizes. Extending lithography towards lower k1 puts heavy demand on the resolution enhancement technique (RET), exposure tool, and the need for litho friendly design. Hyper numerical aperture (NA) exposure tools, immersion, and double exposure techniques (DET's) are the promising methods to extend lithography manufacturing to the 45nm node at k1 factors below 0.3. Scattering bars (SB's) have become an integral part of the lithography process as chipmakers move to production at ever lower k1 factors. To achieve better critical dimension (CD) control, polarization is applied to enhance the image contrast in the preferential imaging orientation, which increases the risk of SB printability. The optimum SB width is approximately (0.20 ~ 0.25)*(λ/NA). When the SB width becomes less than the exposure wavelength on the 4X mask, Kirchhoff's scalar theory under predicts the SB intensity. The optical weighting factor of the SB increases (Figure 1b) and the SB's become more susceptible to printing. Meanwhile, under hyper NA conditions, the effectiveness of "subresolution" SB's is significantly diminished. A full-sized scattering bars (FSB) scheme becomes necessary. Double exposure methods, such as using ternary 6% attenuated PSM (attPSM) for DDL, are good imaging solutions that can reach and likely go beyond the 45nm node. Today DDL, using binary chrome masks, is capable of printing 65 nm device patterns. In this work, we investigate the use of DET with 6% attPSM masks to target 45nm node device. The SB scalability and printability issues can be taken cared of by using "mutual trimming", i.e., with the combined energy from the two exposures. In this study, we share our findings of using DET to pattern a 45nm node device design with polarization and immersion. We also explore other double patterning methods which in addition to having two exposures, incorporates double coat/developing/etch processing to break the 0.25 k1 barrier.

Selection Process for New Windows | Efficient Windows Collaborative

Science.gov Websites

Foundry Foundry New Construction Windows Window Selection Tool Selection Process Design Guidance Installation Replacement Windows Window Selection Tool Assessing Options Selection Process Design Guidance Installation Understanding Windows Benefits Design Considerations Measuring Performance Performance Standards

Selection Process for Replacement Windows | Efficient Windows Collaborative

Science.gov Websites

Foundry Foundry New Construction Windows Window Selection Tool Selection Process Design Guidance Installation Replacement Windows Window Selection Tool Assessing Options Selection Process Design Guidance Installation Understanding Windows Benefits Design Considerations Measuring Performance Performance Standards

Development of a 0.1 μm linewidth fabrication process for x-ray lithography with a laser plasma source

NASA Astrophysics Data System (ADS)

Bobkowski, Romuald; Fedosejevs, Robert; Broughton, James N.

1999-06-01

A process has been developed for the purpose of fabricating 0.1 micron linewidth interdigital electrode patterns based on proximity x-ray lithography using a laser-plasma source. Such patterns are required in the manufacture of surface acoustic wave devices. The x-ray lithography was carried out using emission form a Cu plasma produced by a 15Hz, 248nm KrF excimer laser. A temporally multiplexed 50ps duration seed pulse was used to extract the KrF laser energy producing a train of several 50ps pulses spaced approximately 2ns apart within each output pulse. Each short pulse within the train gave the high focal spot intensity required to achieve high efficiency emission of keV x-rays. The first stage of the overall process involves the fabrication of x-ray mask patterns on 1 micron thick Si3N4 membranes using 3-beam lithography followed by gold electroplating. The second stage involves x-ray exposure of a chemically amplified resist through the mask patterns to produce interdigital electrode patterns with 0.1 micron linewidth. Helium background gas and thin polycarbonate/aluminum filters are employed to prevent debris particles from the laser-plasma source form reaching the exposed sample. A computer control system fires the laser and monitors the x-ray flux from the laser-plasma source to insure the desired x-ray exposure is achieved at the resist. In order to reduce diffusion effects in the chemically amplified resist during the post exposure bake the temperature had to be reduced from that normally used. Good reproduction of 0.1 micron linewidth patterns into the x-ray resist was obtained once the exposure parameters and post exposure bake were optimized. A compact exposure station using flowing helium at atmospheric pressure has also been developed for the process, alleviating the need for a vacuum chamber. The details of the overall process and the compact exposure station will be presented.

Alternating phase-shifted mask for logic gate levels, design, and mask manufacturing

NASA Astrophysics Data System (ADS)

Liebmann, Lars W.; Graur, Ioana C.; Leipold, William C.; Oberschmidt, James M.; O'Grady, David S.; Regaill, Denis

1999-07-01

While the benefits of alternating phase shifted masks in improving lithographic process windows at increased resolution are well known throughout the lithography community, broad implementation of this potentially powerful technique has been slow due to the inherent complexity of the layout design and mask manufacturing process. This paper will review a project undertaken at IBM's Semiconductor Research and Development Center and Mask Manufacturing and Development facility to understand the technical and logistical issues associated with the application of alternating phase shifted mask technology to the gate level of a full microprocessor chip. The work presented here depicts an important milestone toward integration of alternating phase shifted masks into the manufacturing process by demonstrating an automated design solution and yielding a functional alternating phase shifted mask. The design conversion of the microprocessor gate level to a conjugate twin shifter alternating phase shift layout was accomplished with IBM's internal design system that automatically scaled the design, added required phase regions, and resolved phase conflicts. The subsequent fabrication of a nearly defect free phase shifted mask, as verified by SEM based die to die inspection, highlights the maturity of the alternating phase shifted mask manufacturing process in IBM's internal mask facility. Well defined and recognized challenges in mask inspection and repair remain and the layout of alternating phase shifted masks present a design and data preparation overhead, but the data presented here demonstrate the feasibility of designing and building manufacturing quality alternating phase shifted masks for the gate level of a microprocessor.

Process Flow Features as a Host-Based Event Knowledge Representation

DTIC Science & Technology

2012-06-14

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Fabrication of superconducting MgB2 nanostructures by an electron beam lithography-based technique

NASA Astrophysics Data System (ADS)

Portesi, C.; Borini, S.; Amato, G.; Monticone, E.

2006-03-01

In this work, we present the results obtained in fabrication and characterization of magnesium diboride nanowires realized by an electron beam lithography (EBL)-based method. For fabricating MgB2 thin films, an all in situ technique has been used, based on the coevaporation of B and Mg by means of an e-gun and a resistive heater, respectively. Since the high temperatures required for the fabrication of good quality MgB2 thin films do not allow the nanostructuring approach based on the lift-off technique, we structured the samples combining EBL, optical lithography, and Ar milling. In this way, reproducible nanowires 1 μm long have been obtained. To illustrate the impact of the MgB2 film processing on its superconducting properties, we measured the temperature dependence of the resistance on a nanowire and compared it to the original magnesium diboride film. The electrical properties of the films are not degraded as a consequence of the nanostructuring process, so that superconducting nanodevices may be obtained by this method.

Maskless Lithography and in situ Visualization of Conductivity of Graphene using Helium Ion Microscopy

DOE PAGES

Iberi, Vighter O.; Vlassiouk, Ivan V.; Zhang, X. -G.; ...

2015-07-07

The remarkable mechanical and electronic properties of graphene make it an ideal candidate for next generation nanoelectronics. With the recent development of commercial-level single-crystal graphene layers, the potential for manufacturing household graphene-based devices has improved, but significant challenges still remain with regards to patterning the graphene into devices. In the case of graphene supported on a substrate, traditional nanofabrication techniques such as e-beam lithography (EBL) are often used in fabricating graphene nanoribbons but the multi-step processes they require can result in contamination of the graphene with resists and solvents. In this letter, we report the utility of scanning helium ionmore » lithography for fabricating functional graphene nanoconductors that are supported directly on a silicon dioxide layer, and we measure the minimum feature size achievable due to limitations imposed by thermal fluctuations and ion scattering during the milling process. Further we demonstrate that ion beams, due to their positive charging nature, may be used to observe and test the conductivity of graphene-based nanoelectronic devices in situ.« less

Defect reduction of patterned media templates and disks

NASA Astrophysics Data System (ADS)

Luo, Kang; Ha, Steven; Fretwell, John; Ramos, Rick; Ye, Zhengmao; Schmid, Gerard; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2010-05-01

Imprint lithography has been shown to be an effective technique for the replication of nano-scale features. Acceptance of imprint lithography for manufacturing will require a demonstration of defect levels commensurate with cost-effective device production. This work summarizes the results of defect inspections of hard disks patterned using Jet and Flash Imprint Lithography (J-FILTM). Inspections were performed with optical based automated inspection tools. For the hard drive market, it is important to understand the defectivity of both the template and the imprinted disk. This work presents a methodology for automated pattern inspection and defect classification for imprint-patterned media. Candela CS20 and 6120 tools from KLA-Tencor map the optical properties of the disk surface, producing highresolution grayscale images of surface reflectivity and scattered light. Defects that have been identified in this manner are further characterized according to the morphology. The imprint process was tested after optimizing both the disk cleaning and adhesion layers processes that precede imprinting. An extended imprint run was performed and both the defect types and trends are reported.

Self-assembly and nanosphere lithography for large-area plasmonic patterns on graphene.

PubMed

Lotito, Valeria; Zambelli, Tomaso

2015-06-01

Plasmonic structures on graphene can tailor its optical properties, which is essential for sensing and optoelectronic applications, e.g. for the enhancement of photoresponsivity of graphene photodetectors. Control over their structural and, hence, spectral properties can be attained by using electron beam lithography, which is not a viable solution for the definition of patterns over large areas. For the fabrication of large-area plasmonic nanostructures, we propose to use self-assembled monolayers of nanospheres as a mask for metal evaporation and etching processes. An optimized approach based on self-assembly at air/water interface with a properly designed apparatus allows the attainment of monolayers of hexagonally closely packed patterns with high long-range order and large area coverage; special strategies are devised in order to protect graphene against damage resulting from surface treatment and further processing steps such as reactive ion etching, which could potentially impair graphene properties. Therefore we demonstrate that nanosphere lithography is a cost-effective solution to create plasmonic patterns on graphene. Copyright © 2014 Elsevier Inc. All rights reserved.

Wafer-shape metrics based foundry lithography

NASA Astrophysics Data System (ADS)

Kim, Sungtae; Liang, Frida; Mileham, Jeffrey; Tsai, Damon; Bouche, Eric; Lee, Sean; Huang, Albert; Hua, C. F.; Wei, Ming Sheng

2017-03-01

As device shrink, there are many difficulties with process integration and device yield. Lithography process control is expected to be a major challenge due to tighter overlay and focus control requirement. The understanding and control of stresses accumulated during device fabrication has becoming more critical at advanced technology nodes. Within-wafer stress variations cause local wafer distortions which in turn present challenges for managing overlay and depth of focus during lithography. A novel technique for measuring distortion is Coherent Gradient Sensing (CGS) interferometry, which is capable of generating a high-density distortion data set of the full wafer within a time frame suitable for a high volume manufacturing (HVM) environment. In this paper, we describe the adoption of CGS (Coherent Gradient Sensing) interferometry into high volume foundry manufacturing to overcome these challenges. Leveraging this high density 3D metrology, we characterized its In-plane distortion as well as its topography capabilities applied to the full flow of an advanced foundry manufacturing. Case studies are presented that summarize the use of CGS data to reveal correlations between in-plane distortion and overlay variation as well as between topography and device yield.

Imprint lithography template technology for bit patterned media (BPM)

NASA Astrophysics Data System (ADS)

Lille, J.; Patel, K.; Ruiz, R.; Wu, T.-W.; Gao, H.; Wan, Lei; Zeltzer, G.; Dobisz, E.; Albrecht, T. R.

2011-11-01

Bit patterned media (BPM) for magnetic recording has emerged as a promising technology to deliver thermally stable magnetic storage at densities beyond 1Tb/in2. Insertion of BPM into hard disk drives will require the introduction of nanoimprint lithography and other nanofabrication processes for the first time. In this work, we focus on nanoimprint and nanofabrication challenges that are being overcome in order to produce patterned media. Patterned media has created the need for new tools and processes, such as an advanced rotary e-beam lithography tool and block copolymer integration. The integration of block copolymer is through the use of a chemical contrast pattern on the substrate which guides the alignment of di-block copolymers. Most of the work on directed self assembly for patterned media applications has, until recently, concentrated on the formation of circular dot patterns in a hexagonal close packed lattice. However, interactions between the read head and media favor a bit aspect ratio (BAR) greater than one. This design constraint has motivated new approaches for using self-assembly to create suitable high-BAR master patterns and has implications for template fabrication.

All-Printed, Self-Aligned Carbon Nanotube Thin-Film Transistors on Imprinted Plastic Substrates.

PubMed

Song, Donghoon; Zare Bidoky, Fazel; Hyun, Woo Jin; Walker, S Brett; Lewis, Jennifer A; Frisbie, C Daniel

2018-05-09

We present a self-aligned process for printing thin-film transistors (TFTs) on plastic with single-walled carbon nanotube (SWCNT) networks as the channel material. The SCALE (self-aligned capillarity-assisted lithography for electronics) process combines imprint lithography with inkjet printing. Specifically, inks are jetted into imprinted reservoirs, where they then flow into narrow device cavities due to capillarity. Here, we incorporate a composite high- k gate dielectric and an aligned conducting polymer gate electrode in the SCALE process to enable a smaller areal footprint than prior designs that yields low-voltage SWCNT TFTs with average p-type carrier mobilities of 4 cm 2 /V·s and ON/OFF current ratios of 10 4 . Our work demonstrates the promising potential of the SCALE process to fabricate SWCNT-based TFTs with favorable I- V characteristics on plastic substrates.

Micro and Nano Systems for Space Exploration

NASA Technical Reports Server (NTRS)

Manohara, Harish

2007-01-01

This slide presentation reviews the use of micro and nano systems in Space exploration. Included are: an explanation of the rationales behind nano and micro technologies for space exploration, a review of how the devices are fabricated, including details on lithography with more information on Electron Beam (E-Beam) lithography, and X-ray lithography, a review of micro gyroscopes and inchworm Microactuator as examples of the use of MicroElectoMechanical (MEMS) technology. Also included is information on Carbon Nanotubes, including a review of the CVD growth process. These micro-nano systems have given rise to the next generation of miniature X-ray Diffraction, X-ray Fluorescence instruments, mass spectrometers, and terahertz frequency vacuum tube oscillators and amplifiers, scanning electron microscopes and energy dispersive x-ray spectroscope. The nanotechnology has also given rise to coating technology, such as silicon nanotip anti-reflection coating.

Miniature low voltage beam systems producable by combined lithographies

NASA Astrophysics Data System (ADS)

Koops, Hans W. P.; Munro, Eric; Rouse, John; Kretz, Johannes; Rudolph, Michael; Weber, Markus; Dahm, Gerold

The project of a miniaturized vacuum microelectronic 100 GHz switch is described. It implies the development of a field emission electron gun as well as the investigation of miniaturized lenses and deflectors. Electrostatic elements are designed and developed for this application. Connector pads and wiring pattern are created by conventional electron beam lithography and a lift-off or etching process. Wire and other 3-dimensional structures are grown using electron beam induced deposition. This additive lithography allows to form electrodes and resistors of a preset conductivity. The scanning electron microscope features positioning the structures with nm precision. An unconventional lithography system is used that is capable of controlling the pixel dwell time within a shape with different time functions. With this special function 3-dimensional structures can be generated like free standing square shaped electrodes. The switch is built by computer controlled additive lithography avoiding assembly from parts. Lenses of micrometer dimensions were investigated with numerical electron optics programs computing the 3-dimensional potential and field distribution. From the extracted axial field distribution the electron optic characteristic parameters, like focal length, chromatic and spherical aberration, were calculated for various lens excitations. The analysis reveals that miniaturized optics for low energy electrons, as low as 30 eV, are diffraction limited. For a lens with 2 μm focal length, a chromatic aberration disc of 1 nm contributes to 12 nm diffraction disc. The spherical aberration blurs the probe by 0.02 nm, assuming an aperture of 0.01 rad. Employing hydrogen ions at 100 V, a probe diameter of 0.3 nm generated by chromatic aberration is possible. Miniaturized electron optical probe forming systems and imaging systems can be constructed with those lenses. Its application as lithography systems with massive parallel beams can be forseen.

Molecular dynamics modeling framework for overcoming nanoshape retention limits of imprint lithography

NASA Astrophysics Data System (ADS)

Cherala, Anshuman; Sreenivasan, S. V.

2018-12-01

Complex nanoshaped structures (nanoshape structures here are defined as shapes enabled by sharp corners with radius of curvature <5 nm) have been shown to enable emerging nanoscale applications in energy, electronics, optics, and medicine. This nanoshaped fabrication at high throughput is well beyond the capabilities of advanced optical lithography. While the highest-resolution e-beam processes (Gaussian beam tools with non-chemically amplified resists) can achieve <5 nm resolution, this is only available at very low throughputs. Large-area e-beam processes, needed for photomasks and imprint templates, are limited to 18 nm half-pitch lines and spaces and 20 nm half-pitch hole patterns. Using nanoimprint lithography, we have previously demonstrated the ability to fabricate precise diamond-like nanoshapes with 3 nm radius corners over large areas. An exemplary shaped silicon nanowire ultracapacitor device was fabricated with these nanoshaped structures, wherein the half-pitch was 100 nm. The device significantly exceeded standard nanowire capacitor performance (by 90%) due to relative increase in surface area per unit projected area, enabled by the nanoshape. Going beyond the previous work, in this paper we explore the scaling of these nanoshaped structures to 10 nm half-pitch and below. At these scales a new "shape retention" resolution limit is observed due to polymer relaxation in imprint resists, which cannot be predicted with a linear elastic continuum model. An all-atom molecular dynamics model of the nanoshape structure was developed here to study this shape retention phenomenon and accurately predict the polymer relaxation. The atomistic framework is an essential modeling and design tool to extend the capability of imprint lithography to sub-10 nm nanoshapes. This framework has been used here to propose process refinements that maximize shape retention, and design template assist features (design for nanoshape retention) to achieve targeted nanoshapes.

Fabrication of 0.25-um electrode width SAW filters using x-ray lithography with a laser plasma source

NASA Astrophysics Data System (ADS)

Bobkowski, Romuald; Li, Yunlei; Fedosejevs, Robert; Broughton, James N.

1996-05-01

A process for the fabrication of surface acoustic wave (SAW) devices with line widths of 250 nm and less, based on x-ray lithography using a laser-plasma source has been developed. The x-ray lithography process is based on keV x-ray emission from Cu plasma produced by 15 Hz, 50 ps, 248 nm KrF excimer laser pulses. The full structure of a 2 GHz surface acoustic wave filter with interdigital transducers in a split-electrode geometry has been manufactured. The devices require patterning a 150 nm thick aluminum layer on a LiNbO3 substrate with electrodes 250 nm wide. The manufacturing process has two main steps: x-ray mask fabrication employing e-beam lithography and x-ray lithography to obtain the final device. The x-ray masks are fabricated on 1 micrometers thick membranes of Si2N4. The line patterns on the masks are written into PMMA resist using a scanning electron microscope which has been interfaced to a personal computer equipped to control the x and y scan voltages. The opaque regions of the x-ray mask are then formed by electroplating fine grain gold into the open spaces in the etched PMMA. The mask and sample are mounted in an exposure cassette with a fixed spacer of 10 micrometers separating them. The sample consists of a LiNbO3 substrate coated with Shipley XP90104C x-ray resist which has been previously characterized. The x-ray patterning is carried out in an exposure chamber with flowing helium background gas in order to minimize debris deposition on the filters. After etching the x-ray resist, the final patterns are produced using metallization and a standard lift-off technique. The SAW filters are then bonded and packaged onto impedance matching striplines. The resultant devices are tested using Scalar Network Analyzers. The final devices produced had a center frequency of 1.93 GHz with a bandwidth of 98 MHz, close to the expected performance of our simple design.

Critical aspects of substrate nanopatterning for the ordered growth of GaN nanocolumns

PubMed Central

2011-01-01

Precise and reproducible surface nanopatterning is the key for a successful ordered growth of GaN nanocolumns. In this work, we point out the main technological issues related to the patterning process, mainly surface roughness and cleaning, and mask adhesion to the substrate. We found that each of these factors, process-related, has a dramatic impact on the subsequent selective growth of the columns inside the patterned holes. We compare the performance of e-beam lithography, colloidal lithography, and focused ion beam in the fabrication of hole-patterned masks for ordered columnar growth. These results are applicable to the ordered growth of nanocolumns of different materials. PMID:22168918

Designed tools for analysis of lithography patterns and nanostructures

NASA Astrophysics Data System (ADS)

Dervillé, Alexandre; Baderot, Julien; Bernard, Guilhem; Foucher, Johann; Grönqvist, Hanna; Labrosse, Aurélien; Martinez, Sergio; Zimmermann, Yann

2017-03-01

We introduce a set of designed tools for the analysis of lithography patterns and nano structures. The classical metrological analysis of these objects has the drawbacks of being time consuming, requiring manual tuning and lacking robustness and user friendliness. With the goal of improving the current situation, we propose new image processing tools at different levels: semi automatic, automatic and machine-learning enhanced tools. The complete set of tools has been integrated into a software platform designed to transform the lab into a virtual fab. The underlying idea is to master nano processes at the research and development level by accelerating the access to knowledge and hence speed up the implementation in product lines.

Molecular Switch for Sub-Diffraction Laser Lithography by Photoenol Intermediate-State Cis-Trans Isomerization.

PubMed

Mueller, Patrick; Zieger, Markus M; Richter, Benjamin; Quick, Alexander S; Fischer, Joachim; Mueller, Jonathan B; Zhou, Lu; Nienhaus, Gerd Ulrich; Bastmeyer, Martin; Barner-Kowollik, Christopher; Wegener, Martin

2017-06-27

Recent developments in stimulated-emission depletion (STED) microscopy have led to a step change in the achievable resolution and allowed breaking the diffraction limit by large factors. The core principle is based on a reversible molecular switch, allowing for light-triggered activation and deactivation in combination with a laser focus that incorporates a point or line of zero intensity. In the past years, the concept has been transferred from microscopy to maskless laser lithography, namely direct laser writing (DLW), in order to overcome the diffraction limit for optical lithography. Herein, we propose and experimentally introduce a system that realizes such a molecular switch for lithography. Specifically, the population of intermediate-state photoenol isomers of α-methyl benzaldehydes generated by two-photon absorption at 700 nm fundamental wavelength can be reversibly depleted by simultaneous irradiation at 440 nm, suppressing the subsequent Diels-Alder cycloaddition reaction which constitutes the chemical core of the writing process. We demonstrate the potential of the proposed mechanism for STED-inspired DLW by covalently functionalizing the surface of glass substrates via the photoenol-driven STED-inspired process exploiting reversible photoenol activation with a polymerization initiator. Subsequently, macromolecules are grown from the functionalized areas and the spatially coded glass slides are characterized by atomic-force microscopy. Our approach allows lines with a full-width-at-half-maximum of down to 60 nm and line gratings with a lateral resolution of 100 nm to be written, both surpassing the diffraction limit.

Extreme-ultraviolet and electron beam lithography processing using water developable resist material

NASA Astrophysics Data System (ADS)

Takei, Satoshi

2017-08-01

In order to achieve the use of pure water in the developable process of extreme-ultraviolet and electron beam lithography, instead of conventionally used tetramethylammonium hydroxide and organic solvents, a water developable resist material was designed and developed. The water-developable resist material was derived from woody biomass with beta-linked disaccharide unit for environmental affair, safety, easiness of handling, and health of the working people. 80 nm dense line patterning images with exposure dose of 22 μC/cm2 and CF4 etching selectivity of 1.8 with hardmask layer were provided by specific process conditions. The approach of our water-developable resist material will be one of the most promising technologies ready to be investigated into production of medical device applications.

Quartz 9-inch size mask blanks for ArF PSM (Phase Shift Mask)

NASA Astrophysics Data System (ADS)

Harashima, Noriyuki; Isozaki, Tatsuya; Kawanishi, Arata; Kanai, Shuichiro; Kageyama, Kagehiro; Iso, Hiroyuki; Chishima, Tatsuya

2017-07-01

Semiconductor technology nodes are steadily miniaturizing. On the other hand, various efforts have been made to reduce costs, mass production lines have shifted from 200 mmφ of Si wafer to 300 mmφ, and technology development of Si wafer 450 mmφ is also in progress. As a photomask, 6-inch size binary Cr mask has been used for many years, but in recent years, the use of 9-inch binary Cr masks for Proximity Lithography Process in automotive applications, MEMS, packages, etc. has increased, and cost reduction has been taken. Since the miniaturization will progress in the above applications in the future, products corresponding to miniaturization are also desired in 9-inch photomasks. The high grade Cr - binary mask blanks used in proximity exposure process, there is a prospect of being able to use it by ULVAC COATING CORPORATION's tireless research. As further demands for miniaturization, KrF and ArF Lithography Process, which are used for steppers and scanners , there are also a demand for 9-inch size Mask Blanks. In ULVAC COATING CORPORATION, we developed a 9 - inch size KrF PSM mask Blanks prototype in 2016 and proposed a new high grade 9 - inch photomask. This time, we have further investigated and developed 9-inch size ArF PSM Mask Blanks corresponding to ArF Lithography Process, so we report it.

Development of an algorithm for monitoring pattern fidelity on photomasks for 0.2-μm technology and beyond based on light optical CD metrology tools

NASA Astrophysics Data System (ADS)

Schaetz, Thomas; Hay, Bernd; Walden, Lars; Ziegler, Wolfram

1999-04-01

With the ongoing shrinking of design rules, the complexity of photomasks does increase continuously. Features are getting smaller and denser, their characterization requires sophisticated procedures. Looking for the deviation from their target value and their linewidth variation is not sufficient any more. In addition, measurements of corner rounding and line end shortening are necessary to define the pattern fidelity on the mask. Otherwise printing results will not be satisfying. Contacts and small features are suffering mainly from imaging inaccuracies. The size of the contacts as an example may come out too small on the photomask and therefore reduces the process window in lithography. In order to meet customer requirements for pattern fidelity, a measurement algorithm and a measurement procedure needs to be introduced and specifications to be defined. In this paper different approaches are compared, allowing an automatic qualification of photomask by optical light microscopy based on a MueTec CD-metrology system, the newly developed MueTec 2030UV, provided with a 365 nm light source. The i-line illumination allows to resolve features down to 0.2 micrometers size with good repeatability.

Engineered ZnO nanowire arrays using different nanopatterning techniques

NASA Astrophysics Data System (ADS)

Volk, János; Szabó, Zoltán; Erdélyi, Róbert; Khánh, Nguyen Q.

2012-02-01

The impact of various masking patterns and template layers on the wet chemically grown vertical ZnO nanowire arrays was investigated. The nanowires/nanorods were seeded at nucleation windows which were patterned in a mask layer using various techniques such as electron beam lithography, nanosphere photolithography, and atomic force microscope type nanolithography. The compared ZnO templates included single crystals, epitaxial layer, and textured polycrystalline films. Scanning electron microscopy revealed that the alignment and crystal orientation of the nanowires were dictated by the underlying seed layer, while their geometry can be tuned by the parameters of the certain nanopatterning technique and of the wet chemical process. The comparison of the alternative nanolithography techniques showed that using direct writing methods the diameter of the ordered ZnO nanowires can be as low as 30-40 nm at a density of 100- 1000 NW/μm2 in a very limited area (10 μm2-1 mm2). Nanosphere photolithography assisted growth, on the other hand, favors thicker nanopillars (~400 nm) and enables large-area, low-cost patterning (1-100 cm2). These alternative lowtemperature fabrication routes can be used for different novel optoelectronic devices, such as nanorod based ultraviolet photodiode, light emitting device, and waveguide laser.

NASA Tech Briefs, January 2004

NASA Technical Reports Server (NTRS)

2004-01-01

Topics covered include: Multisensor Instrument for Real-Time Biological Monitoring; Sensor for Monitoring Nanodevice-Fabrication Plasmas; Backed Bending Actuator; Compact Optoelectronic Compass; Micro Sun Sensor for Spacecraft; Passive IFF: Autonomous Nonintrusive Rapid Identification of Friendly Assets; Finned-Ladder Slow-Wave Circuit for a TWT; Directional Radio-Frequency Identification Tag Reader; Integrated Solar-Energy-Harvesting and -Storage Device; Event-Driven Random-Access-Windowing CCD Imaging System; Stroboscope Controller for Imaging Helicopter Rotors; Software for Checking State-charts; Program Predicts Broadband Noise from a Turbofan Engine; Protocol for a Delay-Tolerant Data-Communication Network; Software Implements a Space-Mission File-Transfer Protocol; Making Carbon-Nanotube Arrays Using Block Copolymers: Part 2; Modular Rake of Pitot Probes; Preloading To Accelerate Slow-Crack-Growth Testing; Miniature Blimps for Surveillance and Collection of Samples; Hybrid Automotive Engine Using Ethanol-Burning Miller Cycle; Fabricating Blazed Diffraction Gratings by X-Ray Lithography; Freeze-Tolerant Condensers; The StarLight Space Interferometer; Champagne Heat Pump; Controllable Sonar Lenses and Prisms Based on ERFs; Measuring Gravitation Using Polarization Spectroscopy; Serial-Turbo-Trellis-Coded Modulation with Rate-1 Inner Code; Enhanced Software for Scheduling Space-Shuttle Processing; Bayesian-Augmented Identification of Stars in a Narrow View; Spacecraft Orbits for Earth/Mars-Lander Radio Relay; and Self-Inflatable/Self-Rigidizable Reflectarray Antenna.

OPC for curved designs in application to photonics on silicon

NASA Astrophysics Data System (ADS)

Orlando, Bastien; Farys, Vincent; Schneider, Loïc.; Cremer, Sébastien; Postnikov, Sergei V.; Millequant, Matthieu; Dirrenberger, Mathieu; Tiphine, Charles; Bayle, Sébastian; Tranquillin, Céline; Schiavone, Patrick

2016-03-01

Today's design for photonics devices on silicon relies on non-Manhattan features such as curves and a wide variety of angles with minimum feature size below 100nm. Industrial manufacturing of such devices requires optimized process window with 193nm lithography. Therefore, Resolution Enhancement Techniques (RET) that are commonly used for CMOS manufacturing are required. However, most RET algorithms are based on Manhattan fragmentation (0°, 45° and 90°) which can generate large CD dispersion on masks for photonic designs. Industrial implementation of RET solutions to photonic designs is challenging as most currently available OPC tools are CMOS-oriented. Discrepancy from design to final results induced by RET techniques can lead to lower photonic device performance. We propose a novel sizing algorithm allowing adjustment of design edge fragments while preserving the topology of the original structures. The results of the algorithm implementation in the rule based sizing, SRAF placement and model based correction will be discussed in this paper. Corrections based on this novel algorithm were applied and characterized on real photonics devices. The obtained results demonstrate the validity of the proposed correction method integrated in Inscale software of Aselta Nanographics.

Tunable optical response of bowtie nanoantenna arrays on thermoplastic substrates

NASA Astrophysics Data System (ADS)

Sharac, N.; Sharma, H.; Veysi, M.; Sanderson, R. N.; Khine, M.; Capolino, F.; Ragan, R.

2016-03-01

Thermally responsive polymers present an interesting avenue for tuning the optical properties of nanomaterials on their surfaces by varying their periodicity and shape using facile processing methods. Gold bowtie nanoantenna arrays are fabricated using nanosphere lithography on prestressed polyolefin (PO), a thermoplastic polymer, and optical properties are investigated via a combination of spectroscopy and electromagnetic simulations to correlate shape evolution with optical response. Geometric features of bowtie nanoantennas evolve by annealing at temperatures between 105 °C and 135 °C by releasing the degree of prestress in PO. Due to the higher modulus of Au versus PO, compressive stress occurs on Au bowtie regions on PO, which leads to surface buckling at the two highest annealing temperatures; regions with a 5 nm gap between bowtie nanoantennas are observed and the average reduction is 75%. Reflectance spectroscopy and full-wave electromagnetic simulations both demonstrate the ability to tune the plasmon resonance wavelength with a window of approximately 90 nm in the range of annealing temperatures investigated. Surface-enhanced Raman scattering measurements demonstrate that maximum enhancement is observed as the excitation wavelength approaches the plasmon resonance of Au bowtie nanoantennas. Both the size and morphology tunability offered by PO allows for customizing optical response.

Electron-beam lithography with character projection technique for high-throughput exposure with line-edge quality control

NASA Astrophysics Data System (ADS)

Ikeno, Rimon; Maruyama, Satoshi; Mita, Yoshio; Ikeda, Makoto; Asada, Kunihiro

2016-07-01

The high throughput of character projection (CP) electron-beam (EB) lithography makes it a promising technique for low-to-medium volume device fabrication with regularly arranged layouts, such as for standard-cell logics and memory arrays. However, non-VLSI applications such as MEMS and MOEMS may not be able to fully utilize the benefits of the CP method due to the wide variety of layout figures including curved and oblique edges. In addition, the stepwise shapes that appear because of the EB exposure process often result in intolerable edge roughness, which degrades device performances. In this study, we propose a general EB lithography methodology for such applications utilizing a combination of the CP and variable-shaped beam methods. In the process of layout data conversion with CP character instantiation, several control parameters were optimized to minimize the shot count, improve the edge quality, and enhance the overall device performance. We have demonstrated EB shot reduction and edge-quality improvement with our methodology by using a leading-edge EB exposure tool, ADVANTEST F7000S-VD02, and a high-resolution hydrogen silsesquioxane resist. Atomic force microscope observations were used to analyze the resist edge profiles' quality to determine the influence of the control parameters used in the data conversion process.

Development of template and mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Brooks, Cynthia; Selinidis, Kosta; Doyle, Gary; Brown, Laura; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2010-09-01

The Jet and Flash Imprint Lithography (J-FILTM)1-7 process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105 imprints. This suggests that tens of thousands of templates/masks will be required. It is not feasible to employ electronbeam patterning directly to deliver these volumes. Instead, a "master" template - created by directly patterning with an electron-beam tool - will be replicated many times with an imprint lithography tool to produce the required supply of "working" templates/masks. In this paper, we review the development of the pattern transfer process for both template and mask replicas. Pattern transfer of resolutions down to 25nm has been demonstrated for bit patterned media replication. In addition, final resolution on a semiconductor mask of 28nm has been confirmed. The early results on both etch depth and CD uniformity are promising, but more extensive work is required to characterize the pattern transfer process.

Imprint lithography: lab curiosity or the real NGL

NASA Astrophysics Data System (ADS)

Resnick, Douglas J.; Dauksher, William J.; Mancini, David P.; Nordquist, Kevin J.; Bailey, Todd C.; Johnson, Stephen C.; Stacey, Nicholas A.; Ekerdt, John G.; Willson, C. Grant; Sreenivasan, S. V.; Schumaker, Norman E.

2003-06-01

The escalating cost for Next Generation Lithography (NGL) tools is driven in part by the need for complex sources and optics. The cost for a single NGL tool could exceed $50M in the next few years, a prohibitive number for many companies. As a result, several researchers are looking at low cost alternative methods for printing sub-100 nm features. In the mid-1990s, several resarech groups started investigating different methods for imprinting small features. Many of these methods, although very effective at printing small features across an entire wafer, are limited in their ability to do precise overlay. In 1999, Willson and Sreenivasan discovered that imprinting could be done at low pressures and at room temperatures by using low viscosity UV curable monomers. The technology is typically referred to as Step and Flash Imprint Lithography. The use of a quartz template enabled the photocuring process to occur and also opened up the potential for optical alignment of teh wafer and template. This paper traces the development of nanoimprint lithography and addresses the issues that must be solved if this type of technology is to be applied to high-density silicon integrated circuitry.

Triple/quadruple patterning layout decomposition via novel linear programming and iterative rounding

NASA Astrophysics Data System (ADS)

Lin, Yibo; Xu, Xiaoqing; Yu, Bei; Baldick, Ross; Pan, David Z.

2016-03-01

As feature size of the semiconductor technology scales down to 10nm and beyond, multiple patterning lithography (MPL) has become one of the most practical candidates for lithography, along with other emerging technologies such as extreme ultraviolet lithography (EUVL), e-beam lithography (EBL) and directed self assembly (DSA). Due to the delay of EUVL and EBL, triple and even quadruple patterning are considered to be used for lower metal and contact layers with tight pitches. In the process of MPL, layout decomposition is the key design stage, where a layout is split into various parts and each part is manufactured through a separate mask. For metal layers, stitching may be allowed to resolve conflicts, while it is forbidden for contact and via layers. In this paper, we focus on the application of layout decomposition where stitching is not allowed such as for contact and via layers. We propose a linear programming and iterative rounding (LPIR) solving technique to reduce the number of non-integers in the LP relaxation problem. Experimental results show that the proposed algorithms can provide high quality decomposition solutions efficiently while introducing as few conflicts as possible.

Experimental, theoretical, and device application development of nanoscale focused electron-beam-induced deposition

NASA Astrophysics Data System (ADS)

Randolph, Steven Jeffrey

Electron-beam-induced deposition (EBID) is a highly versatile nanofabrication technique that allows for growth of a variety of materials with nanoscale precision and resolution. While several applications and studies of EBID have been reported and published, there is still a significant lack of understanding of the complex mechanisms involved in the process. Consequently, EBID process control is, in general, limited and certain common experimental results regarding nanofiber growth have yet to be fully explained. Such anomalous results have been addressed in this work both experimentally and by computer simulation. Specifically, a correlation between SiOx nanofiber deposition observations and the phenomenon of electron beam heating (EBH) was shown by comparison of thermal computer models and experimental results. Depending on the beam energy, beam current, and nanostructure geometry, the heat generated can be substantial and may influence the deposition rate. Temperature dependent EBID growth experiments qualitatively verified the results of the EBH model. Additionally, EBID was used to produce surface image layers for maskless, direct-write lithography (MDL). A single layer process used directly written SiOx features as a masking layer for amorphous silicon thin films. A bilayer process implemented a secondary masking layer consisting of standard photoresist into which a pattern---directly written by EBID tungsten---was transferred. The single layer process was found to be extremely sensitive to the etch selectivity of the plasma etch. In the bilayer process, EBID tungsten was written onto photoresist and the pattern transferred by means of oxygen plasma dry development following a brief refractory descum. Conditions were developed to reduce the spatial spread of electrons in the photoresist layer and obtain ˜ 35 nm lines. Finally, an EBID-based technique for field emitter repair was applied to the Digital Electrostatically focused e-beam Array Lithography (DEAL) parallel electron beam lithography configuration to repair damaged or missing carbon nanofiber cathodes. The I-V response and lithography results from EBID tungsten-based devices were comparable to CNF-based DEAL devices indicating a successful repair technique.

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Integrated approach to improving local CD uniformity in EUV patterning

NASA Astrophysics Data System (ADS)

Liang, Andrew; Hermans, Jan; Tran, Timothy; Viatkina, Katja; Liang, Chen-Wei; Ward, Brandon; Chuang, Steven; Yu, Jengyi; Harm, Greg; Vandereyken, Jelle; Rio, David; Kubis, Michael; Tan, Samantha; Dusa, Mircea; Singhal, Akhil; van Schravendijk, Bart; Dixit, Girish; Shamma, Nader

2017-03-01

Extreme ultraviolet (EUV) lithography is crucial to enabling technology scaling in pitch and critical dimension (CD). Currently, one of the key challenges of introducing EUV lithography to high volume manufacturing (HVM) is throughput, which requires high source power and high sensitivity chemically amplified photoresists. Important limiters of high sensitivity chemically amplified resists (CAR) are the effects of photon shot noise and resist blur on the number of photons received and of photoacids generated per feature, especially at the pitches required for 7 nm and 5 nm advanced technology nodes. These stochastic effects are reflected in via structures as hole-to-hole CD variation or local CD uniformity (LCDU). Here, we demonstrate a synergy of film stack deposition, EUV lithography, and plasma etch techniques to improve LCDU, which allows the use of high sensitivity resists required for the introduction of EUV HVM. Thus, to improve LCDU to a level required by 5 nm node and beyond, film stack deposition, EUV lithography, and plasma etch processes were combined and co-optimized to enhance LCDU reduction from synergies. Test wafers were created by depositing a pattern transfer stack on a substrate representative of a 5 nm node target layer. The pattern transfer stack consisted of an atomically smooth adhesion layer and two hardmasks and was deposited using the Lam VECTOR PECVD product family. These layers were designed to mitigate hole roughness, absorb out-of-band radiation, and provide additional outlets for etch to improve LCDU and control hole CD. These wafers were then exposed through an ASML NXE3350B EUV scanner using a variety of advanced positive tone EUV CAR. They were finally etched to the target substrate using Lam Flex dielectric etch and Kiyo conductor etch systems. Metrology methodologies to assess dimensional metrics as well as chip performance and defectivity were investigated to enable repeatable patterning process development. Illumination conditions in EUV lithography were optimized to improve normalized image log slope (NILS), which is expected to reduce shot noise related effects. It can be seen that the EUV imaging contrast improvement can further reduce post-develop LCDU from 4.1 nm to 3.9 nm and from 2.8 nm to 2.6 nm. In parallel, etch processes were developed to further reduce LCDU, to control CD, and to transfer these improvements into the final target substrate. We also demonstrate that increasing post-develop CD through dose adjustment can enhance the LCDU reduction from etch. Similar trends were also observed in different pitches down to 40 nm. The solutions demonstrated here are critical to the introduction of EUV lithography in high volume manufacturing. It can be seen that through a synergistic deposition, lithography, and etch optimization, LCDU at a 40 nm pitch can be improved to 1.6 nm (3-sigma) in a target oxide layer and to 1.4 nm (3-sigma) at the photoresist layer.

Electron Beam Lithography Double Step Exposure Technique for Fabrication of Mushroom-Like Profile in Bilayer Resist System

NASA Astrophysics Data System (ADS)

Kornelia, Indykiewicz; Bogdan, Paszkiewicz; Tomasz, Szymański; Regina, Paszkiewicz

2015-01-01

The Hi/Lo bilayer resist system exposure in e-beam lithography (EBL) process, intended for mushroom-like profile fabrication, was studied. Different exposure parameters and theirs influence on the resist layers were simulated in CASINO software and the obtained results were compared with the experimental data. The AFM technique was used for the estimation of the e-beam penetration depth in the resist stack. Performed numerical and experimental results allow us to establish the useful ranges of the exposure parameters.

Nanostructures Enabled by On-Wire Lithography (OWL)

PubMed Central

Braunschweig, Adam B.; Schmucker, Abrin L.; Wei, Wei David; Mirkin, Chad A.

2010-01-01

Nanostructures fabricated by a novel technique, termed On-Wire-Lithography (OWL), can be combined with organic and biological molecules to create systems with emergent and highly functional properties. OWL is a template-based, electrochemical process for forming gapped cylindrical structures on a solid support, with feature sizes (both gap and segment length) that can be controlled on the sub-100 nm length scale. Structures prepared by this method have provided valuable insight into the plasmonic properties of noble metal nanomaterials and have formed the basis for novel molecular electronic, encoding, and biological detection devices. PMID:20396668

Coherent diffractive imaging methods for semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Helfenstein, Patrick; Mochi, Iacopo; Rajeev, Rajendran; Fernandez, Sara; Ekinci, Yasin

2017-12-01

The paradigm shift of the semiconductor industry moving from deep ultraviolet to extreme ultraviolet lithography (EUVL) brought about new challenges in the fabrication of illumination and projection optics, which constitute one of the core sources of cost of ownership for many of the metrology tools needed in the lithography process. For this reason, lensless imaging techniques based on coherent diffractive imaging started to raise interest in the EUVL community. This paper presents an overview of currently on-going research endeavors that use a number of methods based on lensless imaging with coherent light.

Modulated grayscale UV pattern for uniform photopolymerization based on a digital micromirror device system

NASA Astrophysics Data System (ADS)

Yoon, Jinsik; Kim, Kibeom; Park, Wook

2017-07-01

We present an essential method for generating microparticles uniformly in a single ultraviolet (UV) light exposure area for optofluidic maskless lithography. In the optofluidic maskless lithography process, the productivity of monodisperse microparticles depends on the size of the UV exposure area. An effective fabrication area is determined by the size of the UV intensity profile map, satisfying the required uniformity of UV intensity. To increase the productivity of monodisperse microparticles in optofluidic maskless lithography, we expanded the effective UV exposure area by modulating the intensity of the desired UV light pattern based on the premeasured UV intensity profile map. We verified the improvement of the uniformity of the microparticles generated by the proposed modulation technique, providing histogram analyses of the conjugated fluorescent intensities and the sizes of the microparticles. Additionally, we demonstrated the generation of DNA uniformly encapsulated in microparticles.

Latest results on solarization of optical glasses with pulsed laser radiation

NASA Astrophysics Data System (ADS)

Jedamzik, Ralf; Petzold, Uwe

2017-02-01

Femtosecond lasers are more and more used for material processing and lithography. Femtosecond laser help to generate three dimensional structures in photoresists without using masks in micro lithography. This technology is of growing importance for the field of backend lithography or advanced packaging. Optical glasses used for beam shaping and inspection tools need to withstand high laser pulse energies. Femtosecond laser radiation in the near UV wavelength range generates solarization effects in optical glasses. In this paper results are shown of femtosecond laser solarization experiments on a broad range of optical glasses from SCHOTT. The measurements have been performed by the Laser Zentrum Hannover in Germany. The results and their impact are discussed in comparison to traditional HOK-4 and UVA-B solarization measurements of the same materials. The target is to provide material selection guidance to the optical designer of beam shaping lens systems.

Advanced coatings for next generation lithography

NASA Astrophysics Data System (ADS)

Naujok, P.; Yulin, S.; Kaiser, N.; Tünnermann, A.

2015-03-01

Beyond EUV lithography at 6.X nm wavelength has a potential to extend EUVL beyond the 11 nm node. To implement B-based mirrors and to enable their industrial application in lithography tools, a reflectivity level of > 70% has to be reached in near future. The authors will prove that transition from conventional La/B4C to promising LaN/B4C multilayer coatings leads to enhanced optical properties. Currently a near normal-incidence reflectivity of 58.1% @ 6.65 nm is achieved by LaN/B4C multilayer mirrors. The introduction of ultrathin diffusion barriers into the multilayer design to reach the targeted reflectivity of 70% was also tested. The optimization of multilayer design and deposition process for interface-engineered La/C/B4C multilayer mirrors resulted in peak reflectivity of 56.8% at the wavelength of 6.66 nm. In addition, the thermal stability of several selected multilayers was investigated and will be discussed.

Removal of Tin from Extreme Ultraviolet Collector Optics by an In-Situ Hydrogen Plasma

NASA Astrophysics Data System (ADS)

Elg, Daniel Tyler

Throughout the 1980s and 1990s, as the semiconductor industry upheld Moore's Law and continuously shrank device feature sizes, the wavelength of the lithography source remained at or below the resolution limit of the minimum feature size. Since 2001, however, the light source has been the 193nm ArF excimer laser. While the industry has managed to keep up with Moore's Law, shrinking feature sizes without shrinking the lithographic wavelength has required extra innovations and steps that increase fabrication time, cost, and error. These innovations include immersion lithography and double patterning. Currently, the industry is at the 14 nm technology node. Thus, the minimum feature size is an order of magnitude below the exposure wavelength. For the 10 nm node, triple and quadruple patterning have been proposed, causing potentially even more cost, fabrication time, and error. Such a trend cannot continue indefinitely in an economic fashion, and it is desirable to decrease the wavelength of the lithography sources. Thus, much research has been invested in extreme ultraviolet lithography (EUVL), which uses 13.5 nm light. While much progress has been made in recent years, some challenges must still be solved in order to yield a throughput high enough for EUVL to be commercially viable for high-volume manufacturing (HVM). One of these problems is collector contamination. Due to the 92 eV energy of a 13.5 nm photon, EUV light must be made by a plasma, rather than by a laser. Specifically, the industrially-favored EUV source topology is to irradiate a droplet of molten Sn with a laser, creating a dense, hot laser-produced plasma (LPP) and ionizing the Sn to (on average) the +10 state. Additionally, no materials are known to easily transmit EUV. All EUV light must be collected by a collector optic mirror, which cannot be guarded by a window. The plasmas used in EUV lithography sources expel Sn ions and neutrals, which degrade the quality of collector optics. The mitigation of this debris is one of the main problems facing potential manufacturers of EUV sources. which can damage the collector optic in three ways: sputtering, implantation, and deposition. The first two damage processes are irreversible and are caused by the high energies (1-10 keV) of the ion debris. Debris mitigation methods have largely managed to reduce this problem by using collisions with H2 buffer gas to slow down the energetic ions. However, deposition can take place at all ion and neutral energies, and no mitigation method can deterministically deflect all neutrals away from the collector. Thus, deposition still takes place, lowering the collector reflectivity and increasing the time needed to deliver enough EUV power to pattern a wafer. Additionally, even once EUV reaches HVM insertion, source power will need to be continually increased as feature sizes continue to shrink; this increase in source power may potentially come at a cost of increased debris. Thus, debris mitigation solutions that work for the initial generation of commercial EUVL systems may not be adequate for future generations. An in-situ technology to clean collector optics without source downtime is required. which will require an in-situ technology to clean collector optics. The novel cleaning solution described in this work is to create the radicals directly on the collector surface by using the collector itself to drive a capacitively-coupled hydrogen plasma. This allows for radical creation at the desired location without requiring any delivery system and without requiring any source downtime. Additionally, the plasma provides energetic radicals that aid in the etching process. This work will focus on two areas. First, it will focus on experimental collector cleaning and EUV reflectivity restoration. Second, it will focus on developing an understanding of the fundamental processes governing Sn removal. It will be shown that this plasma technique can clean an entire collector optic and restore EUV reflectivity to MLMs without damaging them. Additionally, it will be shown that, within the parameter space explored, the limiting factor in Sn etching is not hydrogen radical flux or SnH4 decomposition but ion energy flux. This will be backed up by experimental measurements, as well as a plasma chemistry model of the radical density and a 3D model of SnH4 transport and redeposition.

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Planar techniques for fabricating X-ray diffraction gratings and zone plates

NASA Technical Reports Server (NTRS)

Smith, H. I.; Anderson, E. H.; Hawryluk, A. M.; Schattenburg, M. L.

1984-01-01

The state of current planar techniques in the fabrication of Fresnel zone plates and diffraction gratings is reviewed. Among the fabrication techniques described are multilayer resist techniques; scanning electron beam lithography; and holographic lithography. Consideration is also given to: X-ray lithography; ion beam lithography; and electroplating. SEM photographs of the undercut profiles obtained in a type AZ 135OB photoresistor by holographic lithography are provided.

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Model-assisted template extraction SRAF application to contact holes patterns in high-end flash memory device fabrication

NASA Astrophysics Data System (ADS)

Seoud, Ahmed; Kim, Juhwan; Ma, Yuansheng; Jayaram, Srividya; Hong, Le; Chae, Gyu-Yeol; Lee, Jeong-Woo; Park, Dae-Jin; Yune, Hyoung-Soon; Oh, Se-Young; Park, Chan-Ha

2018-03-01

Sub-resolution assist feature (SRAF) insertion techniques have been effectively used for a long time now to increase process latitude in the lithography patterning process. Rule-based SRAF and model-based SRAF are complementary solutions, and each has its own benefits, depending on the objectives of applications and the criticality of the impact on manufacturing yield, efficiency, and productivity. Rule-based SRAF provides superior geometric output consistency and faster runtime performance, but the associated recipe development time can be of concern. Model-based SRAF provides better coverage for more complicated pattern structures in terms of shapes and sizes, with considerably less time required for recipe development, although consistency and performance may be impacted. In this paper, we introduce a new model-assisted template extraction (MATE) SRAF solution, which employs decision tree learning in a model-based solution to provide the benefits of both rule-based and model-based SRAF insertion approaches. The MATE solution is designed to automate the creation of rules/templates for SRAF insertion, and is based on the SRAF placement predicted by model-based solutions. The MATE SRAF recipe provides optimum lithographic quality in relation to various manufacturing aspects in a very short time, compared to traditional methods of rule optimization. Experiments were done using memory device pattern layouts to compare the MATE solution to existing model-based SRAF and pixelated SRAF approaches, based on lithographic process window quality, runtime performance, and geometric output consistency.

Fabrication of tunable diffraction grating by imprint lithography with photoresist mold

NASA Astrophysics Data System (ADS)

Yamada, Itsunari; Ikeda, Yusuke; Higuchi, Tetsuya

2018-05-01

We fabricated a deformable transmission silicone [poly(dimethylsiloxane)] grating using a two-beam interference method and imprint lithography and evaluated its optical characteristics during a compression process. The grating pattern with 0.43 μm depth and 1.0 μm pitch was created on a silicone surface by an imprinting process with a photoresist mold to realize a simple, low-cost fabrication process. The first-order diffraction transmittance of this grating reached 10.3% at 632.8 nm wavelength. We also measured the relationship between the grating period and compressive stress to the fabricated elements. The grating period changed from 1.0 μm to 0.84 μm by 16.6% compression of the fabricated element in one direction, perpendicular to the grooves, and the first-order diffraction transmittance was 8.6%.

High-density patterned media fabrication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ye, Zhengmao; Ramos, Rick; Brooks, Cynthia; Simpson, Logan; Fretwell, John; Carden, Scott; Hellebrekers, Paul; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2011-04-01

The Jet and Flash Imprint Lithography (J-FIL®) process uses drop dispensing of UV curable resists for high resolution patterning. Several applications, including patterned media, are better, and more economically served by a full substrate patterning process since the alignment requirements are minimal. Patterned media is particularly challenging because of the aggressive feature sizes necessary to achieve storage densities required for manufacturing beyond the current technology of perpendicular recording. In this paper, the key process steps for the application of J-FIL to pattern media fabrication are reviewed with special attention to substrate cleaning, vapor adhesion of the adhesion layer and imprint performance at >300 disk per hour. Also discussed are recent results for imprinting discrete track patterns at half pitches of 24nm and bit patterned media patterns at densities of 1 Tb/in2.

Performance of the ALTA 3500 scanned-laser mask lithography system

NASA Astrophysics Data System (ADS)

Buck, Peter D.; Buxbaum, Alex H.; Coleman, Thomas P.; Tran, Long

1998-09-01

The ALTA 3500, an advanced scanned-laser mask lithography tool produced by Etec, was introduced to the marketplace in September 1997. The system architecture was described and an initial performance evaluation was presented. This system, based on the ALTA 3000, uses a new 33.3X, 0.8 NA final reduction lens to reduce the spot size to 0.27 micrometers FWHM, thereby affording improved resolution and pattern acuity on the mask. To take advantage of the improved resolution, a new anisotropic chrome etch process has been developed and introduced along with change from Olin 895i resist to TOK iP3600 resist. In this paper we will more extensively describe the performance of the ALTA 3500 and the performance of these new processes.

Fabrication of absorption gratings with X-ray lithography for X-ray phase contrast imaging

NASA Astrophysics Data System (ADS)

Wang, Bo; Wang, Yu-Ting; Yi, Fu-Ting; Zhang, Tian-Chong; Liu, Jing; Zhou, Yue

2018-05-01

Grating-based X-ray phase contrast imaging is promising especially in the medical area. Two or three gratings are involved in grating-based X-ray phase contrast imaging in which the absorption grating of high-aspect-ratio is the most important device and the fabrication process is a great challenge. The material with large atomic number Z is used to fabricate the absorption grating for excellent absorption of X-ray, and Au is usually used. The fabrication process, which involves X-ray lithography, development and gold electroplating, is described in this paper. The absorption gratings with 4 μm period and about 100 μm height are fabricated and the high-aspect-ratio is 50.

Challenges in process marginality for advanced technology nodes and tackling its contributors

NASA Astrophysics Data System (ADS)

Narayana Samy, Aravind; Schiwon, Roberto; Seltmann, Rolf; Kahlenberg, Frank; Katakamsetty, Ushasree

2013-10-01

Process margin is getting critical in the present node shrinkage scenario due to the physical limits reached (Rayleigh's criterion) using ArF lithography tools. K1 is used to its best for better resolution and to enhance the process margin (28nm metal patterning k1=0.31). In this paper, we would like to give an overview of various contributors in the advanced technology nodes which limit the process margins and how the challenges have been tackled in a modern foundry model. Advanced OPC algorithms are used to make the design content at the mask optimum for patterning. However, as we work at the physical limit, critical features (Hot-spots) are very susceptible to litho process variations. Furthermore, etch can have a significant impact as well. Pattern that still looks healthy at litho can fail due to etch interactions. This makes the traditional 2D contour output from ORC tools not able to predict accurately all defects and hence not able to fully correct it in the early mask tapeout phase. The above makes a huge difference in the fast ramp-up and high yield in a competitive foundry market. We will explain in this paper how the early introduction of 3D resist model based simulation of resist profiles (resist top-loss, bottom bridging, top-rounding, etc.,) helped in our prediction and correction of hot-spots in the early 28nm process development phase. The paper also discusses about the other overall process window reduction contributors due to mask 3D effects, wafer topography (focus shifts/variations) and how this has been addressed with different simulation efforts in a fast and timely manner.

Comparison of binary mask defect printability analysis using virtual stepper system and aerial image microscope system

NASA Astrophysics Data System (ADS)

Phan, Khoi A.; Spence, Chris A.; Dakshina-Murthy, S.; Bala, Vidya; Williams, Alvina M.; Strener, Steve; Eandi, Richard D.; Li, Junling; Karklin, Linard

1999-12-01

As advanced process technologies in the wafer fabs push the patterning processes toward lower k1 factor for sub-wavelength resolution printing, reticles are required to use optical proximity correction (OPC) and phase-shifted mask (PSM) for resolution enhancement. For OPC/PSM mask technology, defect printability is one of the major concerns. Current reticle inspection tools available on the market sometimes are not capable of consistently differentiating between an OPC feature and a true random defect. Due to the process complexity and high cost associated with the making of OPC/PSM reticles, it is important for both mask shops and lithography engineers to understand the impact of different defect types and sizes to the printability. Aerial Image Measurement System (AIMS) has been used in the mask shops for a number of years for reticle applications such as aerial image simulation and transmission measurement of repaired defects. The Virtual Stepper System (VSS) provides an alternative method to do defect printability simulation and analysis using reticle images captured by an optical inspection or review system. In this paper, pre- programmed defects and repairs from a Defect Sensitivity Monitor (DSM) reticle with 200 nm minimum features (at 1x) will be studied for printability. The simulated resist lines by AIMS and VSS are both compared to SEM images of resist wafers qualitatively and quantitatively using CD verification.Process window comparison between unrepaired and repaired defects for both good and bad repair cases will be shown. The effect of mask repairs to resist pattern images for the binary mask case will be discussed. AIMS simulation was done at the International Sematech, Virtual stepper simulation at Zygo and resist wafers were processed at AMD-Submicron Development Center using a DUV lithographic process for 0.18 micrometer Logic process technology.

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Firefly: an optical lithographic system for the fabrication of holographic security labels

NASA Astrophysics Data System (ADS)

Calderón, Jorge; Rincón, Oscar; Amézquita, Ricardo; Pulido, Iván.; Amézquita, Sebastián.; Bernal, Andrés.; Romero, Luis; Agudelo, Viviana

2016-03-01

This paper introduces Firefly, an optical lithography origination system that has been developed to produce holographic masters of high quality. This mask-less lithography system has a resolution of 418 nm half-pitch, and generates holographic masters with the optical characteristics required for security applications of level 1 (visual verification), level 2 (pocket reader verification) and level 3 (forensic verification). The holographic master constitutes the main core of the manufacturing process of security holographic labels used for the authentication of products and documents worldwide. Additionally, the Firefly is equipped with a software tool that allows for the hologram design from graphic formats stored in bitmaps. The software is capable of generating and configuring basic optical effects such as animation and color, as well as effects of high complexity such as Fresnel lenses, engraves and encrypted images, among others. The Firefly technology gathers together optical lithography, digital image processing and the most advanced control systems, making possible a competitive equipment that challenges the best technologies in the industry of holographic generation around the world. In this paper, a general description of the origination system is provided as well as some examples of its capabilities.

Holistic approach for overlay and edge placement error to meet the 5nm technology node requirements

NASA Astrophysics Data System (ADS)

Mulkens, Jan; Slachter, Bram; Kubis, Michael; Tel, Wim; Hinnen, Paul; Maslow, Mark; Dillen, Harm; Ma, Eric; Chou, Kevin; Liu, Xuedong; Ren, Weiming; Hu, Xuerang; Wang, Fei; Liu, Kevin

2018-03-01

In this paper, we discuss the metrology methods and error budget that describe the edge placement error (EPE). EPE quantifies the pattern fidelity of a device structure made in a multi-patterning scheme. Here the pattern is the result of a sequence of lithography and etching steps, and consequently the contour of the final pattern contains error sources of the different process steps. EPE is computed by combining optical and ebeam metrology data. We show that high NA optical scatterometer can be used to densely measure in device CD and overlay errors. Large field e-beam system enables massive CD metrology which is used to characterize the local CD error. Local CD distribution needs to be characterized beyond 6 sigma, and requires high throughput e-beam system. We present in this paper the first images of a multi-beam e-beam inspection system. We discuss our holistic patterning optimization approach to understand and minimize the EPE of the final pattern. As a use case, we evaluated a 5-nm logic patterning process based on Self-Aligned-QuadruplePatterning (SAQP) using ArF lithography, combined with line cut exposures using EUV lithography.

Mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Selinidis, Kosta S.; Jones, Chris; Doyle, Gary F.; Brown, Laura; Imhof, Joseph; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2011-11-01

The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality "master" mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools and the semiconductor mask replication process. A PerfectaTM MR5000 mask replication tool has been developed specifically to pattern replica masks from an ebeam written master. Performance results, including image placement, critical dimension uniformity, and pattern transfer are covered in detail.

Increased Light & View | Efficient Windows Collaborative

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Condensation Resistance (CR) | Efficient Windows Collaborative

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Low Conductance Spacers | Efficient Windows Collaborative

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Energy & Cost Savings | Efficient Windows Collaborative

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U-Factor (U-value) | Efficient Windows Collaborative

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Solar Heat Gain Coefficient (SHGC) | Efficient Windows Collaborative

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Characterization of Antisticking Layers for UV Nanoimprint Lithography Molds with Scanning Probe Microscopy

NASA Astrophysics Data System (ADS)

Masaaki Kurihara,; Sho Hatakeyama,; Noriko Yamada,; Takeya Shimomura,; Takaharu Nagai,; Kouji Yoshida,; Tatsuya Tomita,; Morihisa Hoga,; Naoya Hayashi,; Hiroyuki Ohtani,; Masamichi Fujihira,

2010-06-01

Antisticking layers (ASLs) on UV nanoimprint lithography (UV-NIL) molds were characterized by scanning probe microscopies (SPMs) in addition to macroscopic analyses of work of adhesion and separation force. Local physical properties of the ASLs were measured by atomic force microscopy (AFM) and friction force microscopy (FFM). The behavior of local adhesive forces measured with AFM on several surfaces was consistent with that of work of adhesion obtained from contact angle. The ASLs were coated by two different processes, i.e., one is a vapor-phase process and the other a spin-coating process. The homogeneity of the ASLs prepared by the vapor-phase process was better than that of those prepared by the spin-coating process. In addition, we measured the thicknesses of ASL patterns prepared by a lift-off method to investigate the effect of the ASL thicknesses on critical dimensions of the molds with ASLs and found that this effect is not negligible.

Via patterning in the 7-nm node using immersion lithography and graphoepitaxy directed self-assembly

NASA Astrophysics Data System (ADS)

Doise, Jan; Bekaert, Joost; Chan, Boon Teik; Hori, Masafumi; Gronheid, Roel

2017-04-01

Insertion of a graphoepitaxy directed self-assembly process as a via patterning technology into integrated circuit fabrication is seriously considered for the 7-nm node and beyond. At these dimensions, a graphoepitaxy process using a cylindrical block copolymer that enables hole multiplication can alleviate costs by extending 193-nm immersion-based lithography and significantly reducing the number of masks that would be required per layer. To be considered for implementation, it needs to be proved that this approach can achieve the required pattern quality in terms of defects and variability using a representative, aperiodic design. The patterning of a via layer from an actual 7-nm node logic layout is demonstrated using immersion lithography and graphoepitaxy directed self-assembly in a fab-like environment. The performance of the process is characterized in detail on a full 300-mm wafer scale. The local variability in an edge placement error of the obtained patterns (4.0 nm 3σ for singlets) is in line with the recent results in the field and significantly less than of the prepattern (4.9 nm 3σ for singlets). In addition, it is expected that pattern quality can be further improved through an improved mask design and optical proximity correction. No major complications for insertion of the graphoepitaxy directed self-assembly into device manufacturing were observed.

Microfluidic-based photocatalytic microreactor for environmental application: a review of fabrication substrates and techniques, and operating parameters.

PubMed

Das, Susmita; Srivastava, Vimal Chandra

2016-06-08

Photochemical technology with microfluidics is emerging as a new platform in environmental science. Microfluidic technology has various advantages, like better mixing and a shorter diffusion distance for the reactants and products; and uniform distribution of light on the photocatalyst. Depending on the material type and related applications, several fabrication techniques have been adopted by various researchers. Microreactors have been prepared by various techniques, such as lithography, etching, mechanical microcutting technology, etc. Lithography can be classified into photolithography, soft lithography and X-ray lithography techniques whereas the etching process is divided into wet etching (chemical etching) and dry etching (plasma etching) techniques. Several substrates, like polymers, such as polydimethyl-siloxane (PDMS), polymethyle-methacrylate (PMMA), hydrogel, etc.; metals, such as stainless steel, titanium foil, etc.; glass, such as silica capillary, glass slide, etc.; and ceramics have been used for microchannel fabrication. During degradation in a microreactor, the degradation efficiency is affected by few important parameters such as flow rate, initial concentration of the target compound, microreactor dimensions, light intensity, photocatalyst structure and catalyst support. The present paper discusses and critically reviews fabrication techniques and substrates used for microchannel fabrication and critical operating parameters for organics, especially dye degradation in the microreactor. The kinetics of degradation has also been discussed.

3D nanofabrication inside rapid prototyped microfluidic channels showcased by wet-spinning of single micrometre fibres.

PubMed

Lölsberg, Jonas; Linkhorst, John; Cinar, Arne; Jans, Alexander; Kuehne, Alexander J C; Wessling, Matthias

2018-05-01

Microfluidics is an established multidisciplinary research domain with widespread applications in the fields of medicine, biotechnology and engineering. Conventional production methods of microfluidic chips have been limited to planar structures, preventing the exploitation of truly three-dimensional architectures for applications such as multi-phase droplet preparation or wet-phase fibre spinning. Here the challenge of nanofabrication inside a microfluidic chip is tackled for the showcase of a spider-inspired spinneret. Multiphoton lithography, an additive manufacturing method, was used to produce free-form microfluidic masters, subsequently replicated by soft lithography. Into the resulting microfluidic device, a three-dimensional spider-inspired spinneret was directly fabricated in-chip via multiphoton lithography. Applying this unprecedented fabrication strategy, the to date smallest printed spinneret nozzle is produced. This spinneret resides tightly sealed, connecting it to the macroscopic world. Its functionality is demonstrated by wet-spinning of single-digit micron fibres through a polyacrylonitrile coagulation process induced by a water sheath layer. The methodology developed here demonstrates fabrication strategies to interface complex architectures into classical microfluidic platforms. Using multiphoton lithography for in-chip fabrication adopts a high spatial resolution technology for improving geometry and thus flow control inside microfluidic chips. The showcased fabrication methodology is generic and will be applicable to multiple challenges in fluid control and beyond.

Development of a Wafer Positioning System for the Sandia Extreme Ultraviolet Lithography Tool

NASA Technical Reports Server (NTRS)

Wronosky, John B.; Smith, Tony G.; Darnold, Joel R.

1996-01-01

A wafer positioning system was recently developed by Sandia National Laboratories for an Extreme Ultraviolet Lithography (EUVL) tool. The system, which utilizes a magnetically levitated fine stage to provide ultra-precise positioning in all six degrees of freedom, incorporates technological improvements resulting from four years of prototype development. This paper describes the design, implementation, and functional capability of the system. Specifics regarding control system electronics, including software and control algorithm structure, as well as performance design goals and test results are presented. Potential system enhancements, some of which are in process, are also discussed.

How to measure a-few-nanometer-small LER occurring in EUV lithography processed feature

NASA Astrophysics Data System (ADS)

Kawada, Hiroki; Kawasaki, Takahiro; Kakuta, Junichi; Ikota, Masami; Kondo, Tsuyoshi

2018-03-01

For EUV lithography features we want to decrease the dose and/or energy of CD-SEM's probe beam because LER decreases with severe resist-material's shrink. Under such conditions, however, measured LER increases from true LER, due to LER bias that is fake LER caused by random noise in SEM image. A gap error occurs between the right and the left LERs. In this work we propose new procedures to obtain true LER by excluding the LER bias from the measured LER. To verify it we propose a LER's reference-metrology using TEM.

Inedible cellulose-based biomass resist material amenable to water-based processing for use in electron beam lithography

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Maki, Hirotaka; Sugahara, Kigen; Ito, Kenta; Hanabata, Makoto

2015-07-01

An electron beam (EB) lithography method using inedible cellulose-based resist material derived from woody biomass has been successfully developed. This method allows the use of pure water in the development process instead of the conventionally used tetramethylammonium hydroxide and anisole. The inedible cellulose-based biomass resist material, as an alternative to alpha-linked disaccharides in sugar derivatives that compete with food supplies, was developed by replacing the hydroxyl groups in the beta-linked disaccharides with EB-sensitive 2-methacryloyloxyethyl groups. A 75 nm line and space pattern at an exposure dose of 19 μC/cm2, a resist thickness uniformity of less than 0.4 nm on a 200 mm wafer, and low film thickness shrinkage under EB irradiation were achieved with this inedible cellulose-based biomass resist material using a water-based development process.

Fabrication of amorphous IGZO thin film transistor using self-aligned imprint lithography with a sacrificial layer

NASA Astrophysics Data System (ADS)

Kim, Sung Jin; Kim, Hyung Tae; Choi, Jong Hoon; Chung, Ho Kyoon; Cho, Sung Min

2018-04-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistor (TFT) was fabricated by a self-aligned imprint lithography (SAIL) method with a sacrificial photoresist layer. The SAIL is a top-down method to fabricate a TFT using a three-dimensional multilayer etch mask having all pattern information for the TFT. The sacrificial layer was applied in the SAIL process for the purpose of removing the resin residues that were inevitably left when the etch mask was thinned by plasma etching. This work demonstrated that the a-IGZO TFT could be fabricated by the SAIL process with the sacrificial layer. Specifically, the simple fabrication process utilized in this study can be utilized for the TFT with a plasma-sensitive semiconductor such as the a-IGZO and further extended for the roll-to-roll TFT fabrication.

Holographic illuminator for synchrotron-based projection lithography systems

DOEpatents

Naulleau, Patrick P.

2005-08-09

The effective coherence of a synchrotron beam line can be tailored to projection lithography requirements by employing a moving holographic diffuser and a stationary low-cost spherical mirror. The invention is particularly suited for use in an illuminator device for an optical image processing system requiring partially coherent illumination. The illuminator includes: (1) a synchrotron source of coherent or partially coherent radiation which has an intrinsic coherence that is higher than the desired coherence, (2) a holographic diffuser having a surface that receives incident radiation from said source, (3) means for translating the surface of the holographic diffuser in two dimensions along a plane that is parallel to the surface of the holographic diffuser wherein the rate of the motion is fast relative to integration time of said image processing system; and (4) a condenser optic that re-images the surface of the holographic diffuser to the entrance plane of said image processing system.

Field emitter arrays and displays produced by ion tracking lithography

NASA Astrophysics Data System (ADS)

Felter, T. E.; Musket, R. G.; Bernhardt, A. F.

2005-12-01

When ions of sufficient electronic energy loss traverse a dielectric film or foil, they alter the chemical bonding along their nominally straight path within the material. A suitable etchant can quickly dissolve these so-called latent tracks leaving holes of small diameter (∼10 nm) but long length - several microns. Continuing the etching process gradually increases the diameter reproducibly and uniformly. The trackable medium can be applied as a uniform film onto large substrates. The small, monodisperse holes produced by this track etching can be used in conjunction with additional thin film processing to create functional structures attached to the substrate. For example, Lawrence Livermore National Laboratory and Candescent Technologies Corporation (CTC) co-developed a process to make arrays of gated field emitters (∼100 nm diameter electron guns) for CTC's Thin CRTTM displays, which have been fabricated to diagonal dimensions >13 in. Additional technological applications of ion tracking lithography will be briefly covered.

The Introduction and Early Use of Lithography in the United States.

ERIC Educational Resources Information Center

Barnhill, Georgia B.

This paper discusses the use of lithography in the United States in the early 1800s. Highlights include: the development of lithography in Germany between 1796 and 1798; early expectations for lithography; competition against the existing technology for the production of images--relief prints and copper-plate engravings; examples of 18th-century…

Data Compression for Maskless Lithography Systems: Architecture, Algorithms and Implementation

DTIC Science & Technology

2008-05-19

Data Compression for Maskless Lithography Systems: Architecture, Algorithms and Implementation Vito Dai Electrical Engineering and Computer Sciences...servers or to redistribute to lists, requires prior specific permission. Data Compression for Maskless Lithography Systems: Architecture, Algorithms and...for Maskless Lithography Systems: Architecture, Algorithms and Implementation Copyright 2008 by Vito Dai 1 Abstract Data Compression for Maskless

Spun-wrapped aligned nanofiber (SWAN) lithography for fabrication of micro/nano-structures on 3D objects

NASA Astrophysics Data System (ADS)

Ye, Zhou; Nain, Amrinder S.; Behkam, Bahareh

2016-06-01

Fabrication of micro/nano-structures on irregularly shaped substrates and three-dimensional (3D) objects is of significant interest in diverse technological fields. However, it remains a formidable challenge thwarted by limited adaptability of the state-of-the-art nanolithography techniques for nanofabrication on non-planar surfaces. In this work, we introduce Spun-Wrapped Aligned Nanofiber (SWAN) lithography, a versatile, scalable, and cost-effective technique for fabrication of multiscale (nano to microscale) structures on 3D objects without restriction on substrate material and geometry. SWAN lithography combines precise deposition of polymeric nanofiber masks, in aligned single or multilayer configurations, with well-controlled solvent vapor treatment and etching processes to enable high throughput (>10-7 m2 s-1) and large-area fabrication of sub-50 nm to several micron features with high pattern fidelity. Using this technique, we demonstrate whole-surface nanopatterning of bulk and thin film surfaces of cubes, cylinders, and hyperbola-shaped objects that would be difficult, if not impossible to achieve with existing methods. We demonstrate that the fabricated feature size (b) scales with the fiber mask diameter (D) as b1.5 ~ D. This scaling law is in excellent agreement with theoretical predictions using the Johnson, Kendall, and Roberts (JKR) contact theory, thus providing a rational design framework for fabrication of systems and devices that require precisely designed multiscale features.Fabrication of micro/nano-structures on irregularly shaped substrates and three-dimensional (3D) objects is of significant interest in diverse technological fields. However, it remains a formidable challenge thwarted by limited adaptability of the state-of-the-art nanolithography techniques for nanofabrication on non-planar surfaces. In this work, we introduce Spun-Wrapped Aligned Nanofiber (SWAN) lithography, a versatile, scalable, and cost-effective technique for fabrication of multiscale (nano to microscale) structures on 3D objects without restriction on substrate material and geometry. SWAN lithography combines precise deposition of polymeric nanofiber masks, in aligned single or multilayer configurations, with well-controlled solvent vapor treatment and etching processes to enable high throughput (>10-7 m2 s-1) and large-area fabrication of sub-50 nm to several micron features with high pattern fidelity. Using this technique, we demonstrate whole-surface nanopatterning of bulk and thin film surfaces of cubes, cylinders, and hyperbola-shaped objects that would be difficult, if not impossible to achieve with existing methods. We demonstrate that the fabricated feature size (b) scales with the fiber mask diameter (D) as b1.5 ~ D. This scaling law is in excellent agreement with theoretical predictions using the Johnson, Kendall, and Roberts (JKR) contact theory, thus providing a rational design framework for fabrication of systems and devices that require precisely designed multiscale features. Electronic supplementary information (ESI) available: SWAN lithography on silicon; comparison of SWAN lithography and state-of-the-art nanopatterning methods; replica molding using SWAN lithography fabricated template; PDMS nanofluidic device, gold nanopattern characterization. See DOI: 10.1039/c6nr03323g

George E. Pake Prize: A Few Challenges in the Evolution of Semiconductor Device/Manufacturing Technology

NASA Astrophysics Data System (ADS)

Doering, Robert

In the early 1980s, the semiconductor industry faced the related challenges of ``scaling through the one-micron barrier'' and converting single-level-metal NMOS integrated circuits to multi-level-metal CMOS. Multiple advances in lithography technology and device materials/process integration led the way toward the deep-sub-micron transistors and interconnects that characterize today's electronic chips. In the 1990s, CMOS scaling advanced at an accelerated pace enabled by rapid advances in many aspects of optical lithography. However, the industry also needed to continue the progress in manufacturing on ever-larger silicon wafers to maintain economy-of-scale trends. Simultaneously, the increasing complexity and absolute-precision requirements of manufacturing compounded the necessity for new processes, tools, and control methodologies. This talk presents a personal perspective on some of the approaches that addressed the aforementioned challenges. In particular, early work on integrating silicides, lightly-doped-drain FETs, shallow recessed isolation, and double-level metal will be discussed. In addition, some pioneering efforts in deep-UV lithography and single-wafer processing will be covered. The latter will be mainly based on results from the MMST Program - a 100 M +, 5-year R&D effort, funded by DARPA, the U.S. Air Force, and Texas Instruments, that developed a wide range of new technologies for advanced semiconductor manufacturing. The major highlight of the program was the demonstration of sub-3-day cycle time for manufacturing 350-nm CMOS integrated circuits in 1993. This was principally enabled by the development of: (1) 100% single-wafer processing, including rapid-thermal processing (RTP), and (2) computer-integrated-manufacturing (CIM), including real-time, in-situ process control.

MEMS Incandescent Light Source

NASA Technical Reports Server (NTRS)

Tuma, Margaret; King, Kevin; Kim, Lynn; Hansler, Richard; Jones, Eric; George, Thomas

2001-01-01

A MEMS-based, low-power, incandescent light source is being developed. This light source is fabricated using three bonded chips. The bottom chip consists of a reflector on Silicon, the middle chip contains a Tungsten filament bonded to silicon and the top layer is a transparent window. A 25-micrometer-thick spiral filament is fabricated in Tungsten using lithography and wet-etching. A proof-of-concept device has been fabricated and tested in a vacuum chamber. Results indicate that the filament is electrically heated to approximately 2650 K. The power required to drive the proof-of-concept spiral filament to incandescence is 1.25 W. The emitted optical power is expected to be approximately 1.0 W with the spectral peak at 1.1 microns. The micromachining techniques used to fabricate this light source can be applied to other MEMS devices.

A high resolution water soluble fullerene molecular resist for electron beam lithography.

PubMed

Chen, X; Palmer, R E; Robinson, A P G

2008-07-09

Traditionally, many lithography resists have used hazardous, environmentally damaging or flammable chemicals as casting solvent and developer. There is now a strong drive towards processes that are safer and more environmentally friendly. We report nanometre-scale patterning of a fullerene molecular resist film with electron beam lithography, using water as casting solvent and developer. Negative tone behaviour is demonstrated after exposure and development. The sensitivity of this resist to 20 keV electrons is 1.5 × 10(-2) C cm(-2). Arrays of lines with a width of 30-35 nm and pitches of 200 and 400 nm, and arrays of dots with a diameter of 40 nm and a pitch of 200 nm have been patterned at 30 keV. The etch durability of this resist was found to be ∼2 times that of a standard novolac based resist. Initial results of the chemical amplification of this material for enhanced sensitivity are also presented.

Rapid fabrication of embossing tools for the production of polymeric microfluidic devices for bioanalytical applications

NASA Astrophysics Data System (ADS)

Ford, Sean M.; McCandless, Andrew B.; Liu, Xuezhu; Soper, Steven A.

2001-09-01

In this paper we present embossing tools that were fabricated using both UV and X-ray lithography. The embossing tools created were used to emboss microfluidic channels for bioanalytical applications. Specifically, two tools were fabricated. One, using x-ray lithography, was fabricated for electrophoretic separations of DNA restriction fragment analysis. A second tool, fabricated using SU8, was designed for micro PCR applications. Depths of both tools were approximately 100 micrometers . Both tools were made by directly electroforming nickel on a stainless steel base. Fabrication time for the tool fabricated using x-ray lithography was less than 1 week, and largely depended on the availability of the x-ray source. The SU8 embossing tool was fabricated in less than 24 hours. The resulting nickel electroforms from both processes were extremely robust and did not fail under embossing conditions required for PMMA and/or polycarbonate. Some problems removing SU8 after electroforming were sen for smaller size gaps between nickel structures.

Mapper: high throughput maskless lithography

NASA Astrophysics Data System (ADS)

Kuiper, V.; Kampherbeek, B. J.; Wieland, M. J.; de Boer, G.; ten Berge, G. F.; Boers, J.; Jager, R.; van de Peut, T.; Peijster, J. J. M.; Slot, E.; Steenbrink, S. W. H. K.; Teepen, T. F.; van Veen, A. H. V.

2009-01-01

Maskless electron beam lithography, or electron beam direct write, has been around for a long time in the semiconductor industry and was pioneered from the mid-1960s onwards. This technique has been used for mask writing applications as well as device engineering and in some cases chip manufacturing. However because of its relatively low throughput compared to optical lithography, electron beam lithography has never been the mainstream lithography technology. To extend optical lithography double patterning, as a bridging technology, and EUV lithography are currently explored. Irrespective of the technical viability of both approaches, one thing seems clear. They will be expensive [1]. MAPPER Lithography is developing a maskless lithography technology based on massively-parallel electron-beam writing with high speed optical data transport for switching the electron beams. In this way optical columns can be made with a throughput of 10-20 wafers per hour. By clustering several of these columns together high throughputs can be realized in a small footprint. This enables a highly cost-competitive alternative to double patterning and EUV alternatives. In 2007 MAPPER obtained its Proof of Lithography milestone by exposing in its Demonstrator 45 nm half pitch structures with 110 electron beams in parallel, where all the beams where individually switched on and off [2]. In 2008 MAPPER has taken a next step in its development by building several tools. A new platform has been designed and built which contains a 300 mm wafer stage, a wafer handler and an electron beam column with 110 parallel electron beams. This manuscript describes the first patterning results with this 300 mm platform.

Manipulation of heat-diffusion channel in laser thermal lithography.

PubMed

Wei, Jingsong; Wang, Yang; Wu, Yiqun

2014-12-29

Laser thermal lithography is a good alternative method for forming small pattern feature size by taking advantage of the structural-change threshold effect of thermal lithography materials. In this work, the heat-diffusion channels of laser thermal lithography are first analyzed, and then we propose to manipulate the heat-diffusion channels by inserting thermal conduction layers in between channels. Heat-flow direction can be changed from the in-plane to the out-of-plane of the thermal lithography layer, which causes the size of the structural-change threshold region to become much smaller than the focused laser spot itself; thus, nanoscale marks can be obtained. Samples designated as "glass substrate/thermal conduction layer/thermal lithography layer (100 nm)/thermal conduction layer" are designed and prepared. Chalcogenide phase-change materials are used as thermal lithography layer, and Si is used as thermal conduction layer to manipulate heat-diffusion channels. Laser thermal lithography experiments are conducted on a home-made high-speed rotation direct laser writing setup with 488 nm laser wavelength and 0.90 numerical aperture of converging lens. The writing marks with 50-60 nm size are successfully obtained. The mark size is only about 1/13 of the focused laser spot, which is far smaller than that of the light diffraction limit spot of the direct laser writing setup. This work is useful for nanoscale fabrication and lithography by exploiting the far-field focusing light system.

EUV process improvement with novel litho track hardware

NASA Astrophysics Data System (ADS)

Stokes, Harold; Harumoto, Masahiko; Tanaka, Yuji; Kaneyama, Koji; Pieczulewski, Charles; Asai, Masaya

2017-03-01

Currently, there are many developments in the field of EUV lithography that are helping to move it towards increased HVM feasibility. Targeted improvements in hardware design for advanced lithography are of interest to our group specifically for metrics such as CD uniformity, LWR, and defect density. Of course, our work is focused on EUV process steps that are specifically affected by litho track performance, and consequently, can be improved by litho track design improvement and optimization. In this study we are building on our experience to provide continual improvement for LWR, CDU, and Defects as applied to a standard EUV process by employing novel hardware solutions on our SOKUDO DUO coat develop track system. Although it is preferable to achieve such improvements post-etch process we feel, as many do, that improvements after patterning are a precursor to improvements after etching. We hereby present our work utilizing the SOKUDO DUO coat develop track system with an ASML NXE:3300 in the IMEC (Leuven, Belgium) cleanroom environment to improve aggressive dense L/S patterns.

Performance of ASML YieldStar μDBO overlay targets for advanced lithography nodes C028 and C014 overlay process control

NASA Astrophysics Data System (ADS)

Blancquaert, Yoann; Dezauzier, Christophe; Depre, Jerome; Miqyass, Mohamed; Beltman, Jan

2013-04-01

Continued tightening of overlay control budget in semiconductor lithography drives the need for improved metrology capabilities. Aggressive improvements are needed for overlay metrology speed, accuracy and precision. This paper is dealing with the on product metrology results of a scatterometry based platform showing excellent production results on resolution, precision, and tool matching for overlay. We will demonstrate point to point matching between tool generations as well as between target sizes and types. Nowadays, for the advanced process nodes a lot of information is needed (Higher order process correction, Reticle fingerprint, wafer edge effects) to quantify process overlay. For that purpose various overlay sampling schemes are evaluated: ultra- dense, dense and production type. We will show DBO results from multiple target type and shape for on product overlay control for current and future node down to at least 14 nm node. As overlay requirements drive metrology needs, we will evaluate if the new metrology platform meets the overlay requirements.

The capability of lithography simulation based on MVM-SEM® system

NASA Astrophysics Data System (ADS)

Yoshikawa, Shingo; Fujii, Nobuaki; Kanno, Koichi; Imai, Hidemichi; Hayano, Katsuya; Miyashita, Hiroyuki; Shida, Soichi; Murakawa, Tsutomu; Kuribara, Masayuki; Matsumoto, Jun; Nakamura, Takayuki; Matsushita, Shohei; Hara, Daisuke; Pang, Linyong

2015-10-01

The 1Xnm technology node lithography is using SMO-ILT, NTD or more complex pattern. Therefore in mask defect inspection, defect verification becomes more difficult because many nuisance defects are detected in aggressive mask feature. One key Technology of mask manufacture is defect verification to use aerial image simulator or other printability simulation. AIMS™ Technology is excellent correlation for the wafer and standards tool for defect verification however it is difficult for verification over hundred numbers or more. We reported capability of defect verification based on lithography simulation with a SEM system that architecture and software is excellent correlation for simple line and space.[1] In this paper, we use a SEM system for the next generation combined with a lithography simulation tool for SMO-ILT, NTD and other complex pattern lithography. Furthermore we will use three dimension (3D) lithography simulation based on Multi Vision Metrology SEM system. Finally, we will confirm the performance of the 2D and 3D lithography simulation based on SEM system for a photomask verification.

An assessment of the process capabilities of nanoimprint lithography

NASA Astrophysics Data System (ADS)

Balla, Tobias; Spearing, S. Mark; Monk, Andrew

2008-09-01

Nanoimprint lithography (NIL) is an emerging nanofabrication tool, able to replicate imprint patterns quickly and at high volumes. The present study was performed in order to define the capabilities of NIL, based on a study of published research and to identify the application areas where NIL has the greatest potential. The process attributes of different NIL process chains were analysed, and their process capabilities were compared to identify trends and process limitations. The attributes chosen include the line width, relief height, initial resist thickness, residual layer thickness, imprint area and line width tolerances. In each case well-defined limits can be identified, which are a direct result of the mechanisms involved in the NIL process. These quantitative results were compared with the assessments of individuals in academia and within the microfabrication industry. The results suggest NIL is most suited to producing photonic, microfluidic and patterned media applications, with photonic applications the closest to market. NIL needs to address overlay alignment issues for wider use, while an analysis is needed for each market, as to whether NIL adds value.

Defect reduction of high-density full-field patterns in jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Singh, Lovejeet; Luo, Kang; Ye, Zhengmao; Xu, Frank; Haase, Gaddi; Curran, David; LaBrake, Dwayne; Resnick, Douglas; Sreenivasan, S. V.

2011-04-01

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned resist on the substrate. Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the defect specifications of high end memory devices. Typical defectivity targets are on the order of 0.10/cm2. This work summarizes the results of defect inspections focusing on two key defect types; random non-fill defects occurring during the resist filling process and repeater defects caused by interactions with particles on the substrate. Non-fill defectivity must always be considered within the context of process throughput. The key limiting throughput step in an imprint process is resist filling time. As a result, it is critical to characterize the filling process by measuring non-fill defectivity as a function of fill time. Repeater defects typically have two main sources; mask defects and particle related defects. Previous studies have indicated that soft particles tend to cause non-repeating defects. Hard particles, on the other hand, can cause either resist plugging or mask damage. In this work, an Imprio 500 twenty wafer per hour (wph) development tool was used to study both defect types. By carefully controlling the volume of inkjetted resist, optimizing the drop pattern and controlling the resist fluid front during spreading, fill times of 1.5 seconds were achieved with non-fill defect levels of approximately 1.2/cm2. Longevity runs were used to study repeater defects and a nickel contamination was identified as the key source of particle induced repeater defects.

Polarization manipulation in single refractive prism based holography lithography

NASA Astrophysics Data System (ADS)

Xiong, Wenjie; Xu, Yi; Xiao, Yujian; Lv, Xiaoxu; Wu, Lijun

2015-01-01

We propose theoretically and demonstrate experimentally a simple but effective strategy for polarization manipulation in single refractive prism based holographic lithography. By tuning the polarization of a single laser beam, we can obtain the pill shape interference pattern with a high-contrast where a complex optical setup and multiple polarizers are needed in the conventional holography lithography. Fabrication of pill shape two-dimensional polymer photonic crystals using one beam and one shoot holography lithography is shown as an example to support our theoretical results. This integrated polarization manipulation technique can release the crucial stability restrictions imposed on the multiple beams holography lithography.

Glass ceramic ZERODUR enabling nanometer precision

NASA Astrophysics Data System (ADS)

Jedamzik, Ralf; Kunisch, Clemens; Nieder, Johannes; Westerhoff, Thomas

2014-03-01

The IC Lithography roadmap foresees manufacturing of devices with critical dimension of < 20 nm. Overlay specification of single digit nanometer asking for nanometer positioning accuracy requiring sub nanometer position measurement accuracy. The glass ceramic ZERODUR® is a well-established material in critical components of microlithography wafer stepper and offered with an extremely low coefficient of thermal expansion (CTE), the tightest tolerance available on market. SCHOTT is continuously improving manufacturing processes and it's method to measure and characterize the CTE behavior of ZERODUR® to full fill the ever tighter CTE specification for wafer stepper components. In this paper we present the ZERODUR® Lithography Roadmap on the CTE metrology and tolerance. Additionally, simulation calculations based on a physical model are presented predicting the long term CTE behavior of ZERODUR® components to optimize dimensional stability of precision positioning devices. CTE data of several low thermal expansion materials are compared regarding their temperature dependence between - 50°C and + 100°C. ZERODUR® TAILORED 22°C is full filling the tight CTE tolerance of +/- 10 ppb / K within the broadest temperature interval compared to all other materials of this investigation. The data presented in this paper explicitly demonstrates the capability of ZERODUR® to enable the nanometer precision required for future generation of lithography equipment and processes.

Ultimate intra-wafer critical dimension uniformity control by using lithography and etch tool corrections

NASA Astrophysics Data System (ADS)

Kubis, Michael; Wise, Rich; Reijnen, Liesbeth; Viatkina, Katja; Jaenen, Patrick; Luca, Melisa; Mernier, Guillaume; Chahine, Charlotte; Hellin, David; Kam, Benjamin; Sobieski, Daniel; Vertommen, Johan; Mulkens, Jan; Dusa, Mircea; Dixit, Girish; Shamma, Nader; Leray, Philippe

2016-03-01

With shrinking design rules, the overall patterning requirements are getting aggressively tighter. For the 7-nm node and below, allowable CD uniformity variations are entering the Angstrom region (ref [1]). Optimizing inter- and intra-field CD uniformity of the final pattern requires a holistic tuning of all process steps. In previous work, CD control with either litho cluster or etch tool corrections has been discussed. Today, we present a holistic CD control approach, combining the correction capability of the etch tool with the correction capability of the exposure tool. The study is done on 10-nm logic node wafers, processed with a test vehicle stack patterning sequence. We include wafer-to-wafer and lot-to-lot variation and apply optical scatterometry to characterize the fingerprints. Making use of all available correction capabilities (lithography and etch), we investigated single application of exposure tool corrections and of etch tool corrections as well as combinations of both to reach the lowest CD uniformity. Results of the final pattern uniformity based on single and combined corrections are shown. We conclude on the application of this holistic lithography and etch optimization to 7nm High-Volume manufacturing, paving the way to ultimate within-wafer CD uniformity control.

Layout compliance for triple patterning lithography: an iterative approach

NASA Astrophysics Data System (ADS)

Yu, Bei; Garreton, Gilda; Pan, David Z.

2014-10-01

As the semiconductor process further scales down, the industry encounters many lithography-related issues. In the 14nm logic node and beyond, triple patterning lithography (TPL) is one of the most promising techniques for Metal1 layer and possibly Via0 layer. As one of the most challenging problems in TPL, recently layout decomposition efforts have received more attention from both industry and academia. Ideally the decomposer should point out locations in the layout that are not triple patterning decomposable and therefore manual intervention by designers is required. A traditional decomposition flow would be an iterative process, where each iteration consists of an automatic layout decomposition step and manual layout modification task. However, due to the NP-hardness of triple patterning layout decomposition, automatic full chip level layout decomposition requires long computational time and therefore design closure issues continue to linger around in the traditional flow. Challenged by this issue, we present a novel incremental layout decomposition framework to facilitate accelerated iterative decomposition. In the first iteration, our decomposer not only points out all conflicts, but also provides the suggestions to fix them. After the layout modification, instead of solving the full chip problem from scratch, our decomposer can provide a quick solution for a selected portion of layout. We believe this framework is efficient, in terms of performance and designer friendly.

Advances in maskless and mask-based optical lithography on plastic flexible substrates

NASA Astrophysics Data System (ADS)

Barbu, Ionut; Ivan, Marius G.; Giesen, Peter; Van de Moosdijk, Michel; Meinders, Erwin R.

2009-12-01

Organic flexible electronics is an emerging technology with huge potential growth in the future which is likely to open up a complete new series of potential applications such as flexible OLED-based displays, urban commercial signage, and flexible electronic paper. The transistor is the fundamental building block of all these applications. A key challenge in patterning transistors on flexible plastic substrates stems from the in-plane nonlinear deformations as a consequence of foil expansion/shrinkage, moisture uptake, baking etc. during various processing steps. Optical maskless lithography is one of the potential candidates for compensating for these foil distortions by in-situ adjustment prior to exposure of the new layer image with respect to the already patterned layers. Maskless lithography also brings the added value of reducing the cost-of-ownership related to traditional mask-based tools by eliminating the need for expensive masks. For the purpose of this paper, single-layer maskless exposures at 355 nm were performed on gold-coated poly(ethylenenaphthalate) (PEN) flexible substrates temporarily attached to rigid carriers to ensure dimensional stability during processing. Two positive photoresists were employed for this study and the results on plastic foils were benchmarked against maskless as well as mask-based (ASML PAS 5500/100D stepper) exposures on silicon wafers.

New self-assembly strategies for next generation lithography

NASA Astrophysics Data System (ADS)

Schwartz, Evan L.; Bosworth, Joan K.; Paik, Marvin Y.; Ober, Christopher K.

2010-04-01

Future demands of the semiconductor industry call for robust patterning strategies for critical dimensions below twenty nanometers. The self assembly of block copolymers stands out as a promising, potentially lower cost alternative to other technologies such as e-beam or nanoimprint lithography. One approach is to use block copolymers that can be lithographically patterned by incorporating a negative-tone photoresist as the majority (matrix) phase of the block copolymer, paired with photoacid generator and a crosslinker moiety. In this system, poly(α-methylstyrene-block-hydroxystyrene)(PαMS-b-PHOST), the block copolymer is spin-coated as a thin film, processed to a desired microdomain orientation with long-range order, and then photopatterned. Therefore, selfassembly of the block copolymer only occurs in select areas due to the crosslinking of the matrix phase, and the minority phase polymer can be removed to produce a nanoporous template. Using bulk TEM analysis, we demonstrate how the critical dimension of this block copolymer is shown to scale with polymer molecular weight using a simple power law relation. Enthalpic interactions such as hydrogen bonding are used to blend inorganic additives in order to enhance the etch resistance of the PHOST block. We demonstrate how lithographically patternable block copolymers might fit in to future processing strategies to produce etch-resistant self-assembled features at length scales impossible with conventional lithography.

Immersion and dry lithography monitoring for flash memories (after develop inspection and photo cell monitor) using a darkfield imaging inspector with advanced binning technology

NASA Astrophysics Data System (ADS)

Parisi, P.; Mani, A.; Perry-Sullivan, C.; Kopp, J.; Simpson, G.; Renis, M.; Padovani, M.; Severgnini, C.; Piacentini, P.; Piazza, P.; Beccalli, A.

2009-12-01

After-develop inspection (ADI) and photo-cell monitoring (PM) are part of a comprehensive lithography process monitoring strategy. Capturing defects of interest (DOI) in the lithography cell rather than at later process steps shortens the cycle time and allows for wafer re-work, reducing overall cost and improving yield. Low contrast DOI and multiple noise sources make litho inspection challenging. Broadband brightfield inspectors provide the highest sensitivity to litho DOI and are traditionally used for ADI and PM. However, a darkfield imaging inspector has shown sufficient sensitivity to litho DOI, providing a high-throughput option for litho defect monitoring. On the darkfield imaging inspector, a very high sensitivity inspection is used in conjunction with advanced defect binning to detect pattern issues and other DOI and minimize nuisance defects. For ADI, this darkfield inspection methodology enables the separation and tracking of 'color variation' defects that correlate directly to CD variations allowing a high-sampling monitor for focus excursions, thereby reducing scanner re-qualification time. For PM, the darkfield imaging inspector provides sensitivity to critical immersion litho defects at a lower cost-of-ownership. This paper describes litho monitoring methodologies developed and implemented for flash devices for 65nm production and 45nm development using the darkfield imaging inspector.

Hybrid strategies for nanolithography and chemical patterning

NASA Astrophysics Data System (ADS)

Srinivasan, Charan

Remarkable technological advances in photolithography have extended patterning to the sub-50-nm regime. However, because photolithography is a top-down approach, it faces substantial technological and economic challenges in maintaining the downward scaling trends of feature sizes below 30 nm. Concurrently, fundamental research on chemical self-assembly has enabled the path to access molecular length scales. The key to the success of photolithography is its inherent economies of scale, which justify the large capital investment for its implementation. In this thesis research, top-down and bottom-up approaches have been combined synergistically, and these hybrid strategies have been employed in applications that do not have the economies of scale found in semiconductor chip manufacturing. The specific instances of techniques developed here include molecular-ruler lithography and a series of nanoscale chemical patterning methods. Molecular-ruler lithography utilizes self-assembled multilayered films as a sidewall spacer on initial photolithographically patterned gold features (parent) to place a second-generation feature (daughter) in precise proximity to the parent. The parent-daughter separation, which is on the nanometer length scale, is defined by the thickness of the molecular-ruler resist. Analogous to protocols followed in industry to evaluate lithographic performance, electrical test-pad structures were designed to interrogate the nanostructures patterned by molecular-ruler nanolithography, failure modes creating electrical shorts were mapped to each lithographic step, and subsequent lithographic optimization was performed to pattern nanoscale devices with excellent electrical performance. The optimized lithographic processes were applied to generate nanoscale devices such as nanowires and thin-film transistors (TFTs). Metallic nanowires were patterned by depositing a tertiary generation material in the nanogap and surrounding micron-scale regions, and then chemically removing the parent and daughter structures selectively. This processing was also performed on silicon-on-insulator substrates and the metallic nanowires were used as a hard mask to transfer the pattern to the single crystalline silicon epilayer resulting in a quaternary generation structure of single-crystalline silicon nanowire field-effect transistors. Additionally, the proof of concept for patterning nanoscale pentacene TFTs utilizing molecular-rulers was demonstrated. For applications in sub-100-nm lithography, the limitations on the relative heights of parent and daughter structures were overcome and processes to integrate molecular-ruler nanolithography with existing complementary metal-oxide-semiconductor (CMOS) processing were developed. Pattern transfer to underlying SiO2 substrates has opened a new avenue of opportunities to apply these nanostructures in nanofluidics and in non-traditional lithography such as imprint lithography. Additionally, the molecular-ruler process has been shown to increase the spatial density of features created by high-resolution techniques such as electron-beam lithography. A limitation of photolithography is its inability to pattern chemical functionality on surfaces. To overcome this limitation, two techniques were developed to extend nanolithography beyond semiconductors and apply them to patterning of self-assembled monolayers. First, a novel bilayer resist was devised to protect and to pattern chemical functionality on surfaces by being able to withstand conditions necessary for both chemical self-assembly and photooxidation of the Au-S bond while not disrupting the preexisting SAM. In addition to photolithography, soft-lithographic approaches such as microcontact printing are often used to create chemical patterns. In this work, a technique for the creation of chemical patterns of inserted molecules with dilute coverages (≤10%) was implemented. As part of the research in chemical patterning, a method for characterizing chemical patterns using scanning electron microscopy has been developed. These tools are the standard for metrology in nanolithography, and thus are readily accessible as our advances in chemical patterning are adopted and applied by the lithography community.

Progress on complementary patterning using plasmon-excited electron beamlets (Conference Presentation)

NASA Astrophysics Data System (ADS)

Du, Zhidong; Chen, Chen; Pan, Liang

2017-04-01

Maskless lithography using parallel electron beamlets is a promising solution for next generation scalable maskless nanolithography. Researchers have focused on this goal but have been unable to find a robust technology to generate and control high-quality electron beamlets with satisfactory brightness and uniformity. In this work, we will aim to address this challenge by developing a revolutionary surface-plasmon-enhanced-photoemission (SPEP) technology to generate massively-parallel electron beamlets for maskless nanolithography. The new technology is built upon our recent breakthroughs in plasmonic lenses, which will be used to excite and focus surface plasmons to generate massively-parallel electron beamlets through photoemission. Specifically, the proposed SPEP device consists of an array of plasmonic lens and electrostatic micro-lens pairs, each pair independently producing an electron beamlet. During lithography, a spatial optical modulator will dynamically project light onto individual plasmonic lenses to control the switching and brightness of electron beamlets. The photons incident onto each plasmonic lens are concentrated into a diffraction-unlimited spot as localized surface plasmons to excite the local electrons to near their vacuum levels. Meanwhile, the electrostatic micro-lens extracts the excited electrons to form a focused beamlet, which can be rastered across a wafer to perform lithography. Studies showed that surface plasmons can enhance the photoemission by orders of magnitudes. This SPEP technology can scale up the maskless lithography process to write at wafers per hour. In this talk, we will report the mechanism of the strong electron-photon couplings and the locally enhanced photoexcitation, design of a SPEP device, overview of our proof-of-concept study, and demonstrated parallel lithography of 20-50 nm features.

Integrating nanosphere lithography in device fabrication

NASA Astrophysics Data System (ADS)

Laurvick, Tod V.; Coutu, Ronald A.; Lake, Robert A.

2016-03-01

This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniques, allowing for nano-scaled features to be realized within larger microelectromechanical system (MEMS) based devices. Nanosphere self-patterning methods have been researched for over three decades, but typically not for use as a lithography process. Only recently has progress been made towards integrating many of the best practices from these publications and determining a process that yields large areas of coverage, with repeatability and enabled a process for precise placement of nanospheres relative to other features. Discussed are two of the more common self-patterning methods used in NSL (i.e. spin-coating and dip coating) as well as a more recently conceived variation of dip coating. Recent work has suggested the repeatability of any method depends on a number of variables, so to better understand how these variables affect the process a series of test vessels were developed and fabricated. Commercially available 3-D printing technology was used to incrementally alter the test vessels allowing for each variable to be investigated individually. With these deposition vessels, NSL can now be used in conjunction with other fabrication steps to integrate features otherwise unattainable through current methods, within the overall fabrication process of larger MEMS devices. Patterned regions in 1800 series photoresist with a thickness of ~700nm are used to capture regions of self-assembled nanospheres. These regions are roughly 2-5 microns in width, and are able to control the placement of 500nm polystyrene spheres by controlling where monolayer self-assembly occurs. The resulting combination of photoresist and nanospheres can then be used with traditional deposition or etch methods to utilize these fine scale features in the overall design.

Nanoimprinted polymer lasers with threshold below 100 W/cm2 using mixed-order distributed feedback resonators.

PubMed

Wang, Yue; Tsiminis, Georgios; Kanibolotsky, Alexander L; Skabara, Peter J; Samuel, Ifor D W; Turnbull, Graham A

2013-06-17

Organic semiconductor lasers were fabricated by UV-nanoimprint lithography with thresholds as low as 57 W/cm(2) under 4 ns pulsed operation. The nanoimprinted lasers employed mixed-order distributed feedback resonators, with second-order gratings surrounded by first-order gratings, combined with a light-emitting conjugated polymer. They were pumped by InGaN LEDs to produce green-emitting lasers, with thresholds of 208 W/cm(2) (102 nJ/pulse). These hybrid lasers incorporate a scalable UV-nanoimprint lithography process, compatible with high-performance LEDs, therefore we have demonstrated a coherent, compact, low-cost light source.

Fabrication of frequency selective surface for band stop IR-filter

NASA Astrophysics Data System (ADS)

Mishra, Akshita; Sudheer, Tiwari, P.; Mondal, P.; Bhatt, H.; Rai, V. N.; Srivastava, A. K.

2016-05-01

Fabrication and characterization of frequency selective surfaces (FSS) on silicon dioxide/ silicon is reported. Electron beam lithography based techniques are used for the fabrication of periodic slot structure in tungsten layer on silicon dioxide/silicon. The fabrication process consists of growth of SiO2 on silicon, tungsten deposition, electron beam lithography, and wet etching of tungsten. The optical characterization of the structural pattern was carried out using fourier transform infrared spectroscopy (FTIR). The reflectance spectra clearly show a resonance peak at 9.09 µm in the mid infrared region. This indicates that the patterned surface acts as band stop filter in the mid-infrared region.

Graphene as discharge layer for electron beam lithography on insulating substrate

NASA Astrophysics Data System (ADS)

Liu, Junku; Li, Qunqing; Ren, Mengxin; Zhang, Lihui; Chen, Mo; Fan, Shoushan

2013-09-01

Charging of insulating substrates is a common problem during Electron Beam lithography (EBL), which deflects the beam and distorts the pattern. A homogeneous, electrically conductive, and transparent graphene layer is used as a discharge layer for EBL processes on insulating substrates. The EBL resolution is improved compared with the metal discharge layer. Dense arrays of holes with diameters of 50 nm and gratings with line/space of 50/30 nm are obtained on quartz substrate. The pattern placement errors and proximity effect are suppressed over a large area and high quality complex nanostructures are fabricated using graphene as a conductive layer.

Methodology for evaluating pattern transfer completeness in inkjet printing with irregular edges

NASA Astrophysics Data System (ADS)

Huang, Bo-Cin; Chan, Hui-Ju; Hong, Jian-Wei; Lo, Cheng-Yao

2016-06-01

A methodology for quantifying and qualifying pattern transfer completeness in inkjet printing through examining both pattern dimensions and pattern contour deviations from reference design is proposed, which enables scientifically identifying and evaluating inkjet-printed lines, corners, circles, ellipses, and spirals with irregular edges of bulging, necking, and unpredictable distortions resulting from different process conditions. This methodology not only avoids differences in individual perceptions of ambiguous pattern distortions but also indicates the systematic effects of mechanical stresses applied in different directions to a polymer substrate, and is effective for both optical and electrical microscopy in direct and indirect lithography or lithography-free patterning.

Fabricating optical phantoms to simulate skin tissue properties and microvasculatures

NASA Astrophysics Data System (ADS)

Sheng, Shuwei; Wu, Qiang; Han, Yilin; Dong, Erbao; Xu, Ronald

2015-03-01

This paper introduces novel methods to fabricate optical phantoms that simulate the morphologic, optical, and microvascular characteristics of skin tissue. The multi-layer skin-simulating phantom was fabricated by a light-cured 3D printer that mixed and printed the colorless light-curable ink with the absorption and the scattering ingredients for the designated optical properties. The simulated microvascular network was fabricated by a soft lithography process to embed microchannels in polydimethylsiloxane (PDMS) phantoms. The phantoms also simulated vascular anomalies and hypoxia commonly observed in cancer. A dual-modal multispectral and laser speckle imaging system was used for oxygen and perfusion imaging of the tissue-simulating phantoms. The light-cured 3D printing technique and the soft lithography process may enable freeform fabrication of skin-simulating phantoms that embed microvessels for image and drug delivery applications.

Plasma-based EUV light source

DOEpatents

Shumlak, Uri; Golingo, Raymond; Nelson, Brian A.

2010-11-02

Various mechanisms are provided relating to plasma-based light source that may be used for lithography as well as other applications. For example, a device is disclosed for producing extreme ultraviolet (EUV) light based on a sheared plasma flow. The device can produce a plasma pinch that can last several orders of magnitude longer than what is typically sustained in a Z-pinch, thus enabling the device to provide more power output than what has been hitherto predicted in theory or attained in practice. Such power output may be used in a lithography system for manufacturing integrated circuits, enabling the use of EUV wavelengths on the order of about 13.5 nm. Lastly, the process of manufacturing such a plasma pinch is discussed, where the process includes providing a sheared flow of plasma in order to stabilize it for long periods of time.

REBL: design progress toward 16 nm half-pitch maskless projection electron beam lithography

NASA Astrophysics Data System (ADS)

McCord, Mark A.; Petric, Paul; Ummethala, Upendra; Carroll, Allen; Kojima, Shinichi; Grella, Luca; Shriyan, Sameet; Rettner, Charles T.; Bevis, Chris F.

2012-03-01

REBL (Reflective Electron Beam Lithography) is a novel concept for high speed maskless projection electron beam lithography. Originally targeting 45 nm HP (half pitch) under a DARPA funded contract, we are now working on optimizing the optics and architecture for the commercial silicon integrated circuit fabrication market at the equivalent of 16 nm HP. The shift to smaller features requires innovation in most major subsystems of the tool, including optics, stage, and metrology. We also require better simulation and understanding of the exposure process. In order to meet blur requirements for 16 nm lithography, we are both shrinking the pixel size and reducing the beam current. Throughput will be maintained by increasing the number of columns as well as other design optimizations. In consequence, the maximum stage speed required to meet wafer throughput targets at 16 nm will be much less than originally planned for at 45 nm. As a result, we are changing the stage architecture from a rotary design to a linear design that can still meet the throughput requirements but with more conventional technology that entails less technical risk. The linear concept also allows for simplifications in the datapath, primarily from being able to reuse pattern data across dies and columns. Finally, we are now able to demonstrate working dynamic pattern generator (DPG) chips, CMOS chips with microfabricated lenslets on top to prevent crosstalk between pixels.

The patterning center of excellence (CoE): an evolving lithographic enablement model

NASA Astrophysics Data System (ADS)

Montgomery, Warren; Chun, Jun Sung; Liehr, Michael; Tittnich, Michael

2015-03-01

As EUV lithography moves toward high-volume manufacturing (HVM), a key need for the lithography materials makers is access to EUV photons and imaging. The SEMATECH Resist Materials Development Center (RMDC) provided a solution path by enabling the Resist and Materials companies to work together (using SUNY Polytechnic Institute's Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) -based exposure systems), in a consortium fashion, in order to address the need for EUV photons. Thousands of wafers have been processed by the RMDC (leveraging the SUNY Poly CNSE/SEMATECH MET, SUNY Poly CNSE Alpha Demo Tool (ADT) and the SEMATECH Lawrence Berkeley MET) allowing many of the questions associated with EUV materials development to be answered. In this regard the activities associated with the RMDC are continuing. As the major Integrated Device Manufacturers (IDMs) have continued to purchase EUV scanners, Materials companies must now provide scanner based test data that characterizes the lithography materials they are producing. SUNY Poly CNSE and SEMATECH have partnered to evolve the RMDC into "The Patterning Center of Excellence (CoE)". The new CoE leverages the capability of the SUNY Poly CNSE-based full field ASML 3300 EUV scanner and combines that capability with EUV Microexposure (MET) systems resident in the SEMATECH RMDC to create an integrated lithography model which will allow materials companies to advance materials development in ways not previously possible.

Trends in imprint lithography for biological applications.

PubMed

Truskett, Van N; Watts, Michael P C

2006-07-01

Imprint lithography is emerging as an alternative nano-patterning technology to traditional photolithography that permits the fabrication of 2D and 3D structures with <100 nm resolution, patterning and modification of functional materials other than photoresist and is low cost, with operational ease for use in developing bio-devices. Techniques for imprint lithography, categorized as either 'molding and embossing' or 'transfer printing', will be discussed in the context of microarrays for genomics, proteomics and tissue engineering. Specifically, fabrication by nanoimprint lithography (NIL), UV-NIL, step and flash imprint lithography (S-FIL), micromolding by elastomeric stamps and micro- and nano-contact printing will be reviewed.

Plasmonic direct writing lithography with a macroscopical contact probe

NASA Astrophysics Data System (ADS)

Huang, Yuerong; Liu, Ling; Wang, Changtao; Chen, Weidong; Liu, Yunyue; Li, Ling

2018-05-01

In this work, we design a plasmonic direct writing lithography system with a macroscopical contact probe to achieve nanometer scale spots. The probe with bowtie-shaped aperture array adopts spring hinge and beam deflection method (BDM) to realize near-field lithography. Lithography results show that a macroscopical plasmonic contact probe can achieve a patterning resolution of around 75 nm at 365 nm wavelength, and demonstrate that the lithography system is promising for practical applications due to beyond the diffraction limit, low cost, and simplification of system configuration. CST calculations provide a guide for the design of recording structure and the arrangement of placing polarizer.

Physical Limitations in Lithography for Microelectronics.

ERIC Educational Resources Information Center

Flavin, P. G.

1981-01-01

Describes techniques being used in the production of microelectronics kits which have replaced traditional optical lithography, including contact and optical projection printing, and X-ray and electron beam lithography. Also includes limitations of each technique described. (SK)

Polymer based tunneling sensor

NASA Technical Reports Server (NTRS)

Wang, Jing (Inventor); Zhao, Yongjun (Inventor); Cui, Tianhong (Inventor)

2006-01-01

A process for fabricating a polymer based circuit by the following steps. A mold of a design is formed through a lithography process. The design is transferred to a polymer substrate through a hot embossing process. A metal layer is then deposited over at least part of said design and at least one electrical lead is connected to said metal layer.

Fabrication of functional devices using soft lithography and unconventional micropatterning

NASA Astrophysics Data System (ADS)

Deng, Tao

In this thesis, I present part of our work in the fabrication of functional devices using soft lithography, and also describe unconventional micropatterning techniques involving photographic films. Soft lithography is a set of techniques that are complementary to photolithography, but not limited to planar patterning. It offers the capability of generating micro and nanostructures to a larger community than that familiar with conventional fabrication facilities. The first part of this thesis (chapter 1--4) focuses on the fabrication of microelectronic and micromagnetic devices. These successful demonstrations establish the compatibility of soft lithography with multilayer fabrication of functional devices, and open the door for the further development in these areas. Chapter 1 and 2 describe the use of microtransfer molding (muTM), micromolding in capillaries (MIMIC), and microcontact (muCP) for fabricating Schottky diodes and half-wave rectifier circuits. The fabrication processes involve multiple soft lithography steps and address the registrations between different layer of structures. Room temperature characteristics of these devices resemble those of diodes and rectifiers fabricated by photolithography. Chapter 3 and 4 demonstrate the fabrication of micromagnetic systems. In chapter 3, a one-dimensional bead motor is reported. Based on current-carrying wire systems, the bead motor can trap and transfer magnetic beads suspended in aqueous solutions. Chapter 4 shows a microfiltration system that uses arrays of nickel posts positioned in a polydimethylsiloxane (PDMS) microfluidic channel as the filtering elements. Turning on or off the magnetic field that is localized by these nickel posts can trap or release magnetic beads flowing by. The second part of this thesis (chapter 5--7) focuses on the development of unconventional microfabrication. The major objective underlying this work is to explore the simplest and most broadly available techniques that we could identify for forming patterns with features useful in functional microstructures. Chapter 5 and 6 describe the use of photographic films (microfiche and slide film) and transparencies printed using different printers as photomasks in the fabrication of PDMS stamps/molds for soft lithography. In chapter 6, we also compare different methods of generating microstructures using facilities readily and inexpensively available to chemistry and biology laboratories. Among the films and transparencies investigated, microfiche carries the highest resolution. It can generate structures as small as ˜10 mum in lateral dimensions. Chapter 7 shows a new rapid prototyping process for the fabrication of metallic microstructures using silver halide-based photographic film. The whole process, which involves photographic development and electrochemical deposition, only takes ˜2 hours, starting from a computer design file. It can generate electrically continuous structures with the smallest dimension of ˜30 mum in the plane of the film. The resulting structures---either supported on the film backing, or freed from it---are appropriate for use as passive, structural materials such as wire frames or meshes, and can also be used in microfluidic, microanalytical, and microelectromechanical systems (MEMS).

Due-Window Assignment Scheduling with Variable Job Processing Times

PubMed Central

Wu, Yu-Bin

2015-01-01

We consider a common due-window assignment scheduling problem jobs with variable job processing times on a single machine, where the processing time of a job is a function of its position in a sequence (i.e., learning effect) or its starting time (i.e., deteriorating effect). The problem is to determine the optimal due-windows, and the processing sequence simultaneously to minimize a cost function includes earliness, tardiness, the window location, window size, and weighted number of tardy jobs. We prove that the problem can be solved in polynomial time. PMID:25918745

Exploring the readiness of EUV photo materials for patterning advanced technology nodes

NASA Astrophysics Data System (ADS)

De Simone, Danilo; Vesters, Yannick; Shehzad, Atif; Vandenberghe, Geert; Foubert, Philippe; Beral, Christophe; Van Den Heuvel, Dieter; Mao, Ming; Lazzarino, Fred

2017-03-01

Imec is currently driving the extreme ultraviolet (EUV) photo material development within the imec material and equipment supplier hub. EUV baseline processes using the ASML NXE3300 full field scanner have been setup for the critical layers of the imec N7 (iN7) BEOL process modules with a resist sensitivity of 35mJ/cm2, 40mJ/cm2 and 60mJ/cm2 for metal, block and vias layer, respectively. A feasibility study on higher sensitivity resists for HVM has been recently conducted looking at 16nm dense line-space at a targeted exposure dose of 20mJ/cm2. Such a study reveals that photoresist formulations with a cost-effective resist sensitivity are feasible today. Moreover, recent advances in enhanced underlayers are further offering novel development opportunities to increase the resist sensitivity. However, line width roughness (LWR) and pattern defectivity at nano scale are the major limiting factors of the lithographic process window and further efforts are needed to reach a HVM maturity level. We will present the results of the photo material screening and we examine in detail the lithography patterning results for the best performing photoresists. We further discuss the fundamental aspects of photo materials from a light-matter interaction standpoint looking at the photo emission yield at the EUV light for different photo materials towards a better understanding of the relation between photon efficiency and patterning performance. Finally, as metal containing resists are becoming part of the EUV material landscape, we also review the manufacturing aspects of a such class of resists looking at metal cross contamination pattern and defectivity on the process equipment.

Monolithic microfabricated valves and pumps by multilayer soft lithography.

PubMed

Unger, M A; Chou, H P; Thorsen, T; Scherer, A; Quake, S R

2000-04-07

Soft lithography is an alternative to silicon-based micromachining that uses replica molding of nontraditional elastomeric materials to fabricate stamps and microfluidic channels. We describe here an extension to the soft lithography paradigm, multilayer soft lithography, with which devices consisting of multiple layers may be fabricated from soft materials. We used this technique to build active microfluidic systems containing on-off valves, switching valves, and pumps entirely out of elastomer. The softness of these materials allows the device areas to be reduced by more than two orders of magnitude compared with silicon-based devices. The other advantages of soft lithography, such as rapid prototyping, ease of fabrication, and biocompatibility, are retained.

Progress in coherent lithography using table-top extreme ultraviolet lasers

NASA Astrophysics Data System (ADS)

Li, Wei

Nanotechnology has drawn a wide variety of attention as interesting phenomena occurs when the dimension of the structures is in the nanometer scale. The particular characteristics of nanoscale structures had enabled new applications in different fields in science and technology. Our capability to fabricate these nanostructures routinely for sure will impact the advancement of nanoscience. Apart from the high volume manufacturing in semiconductor industry, a small-scale but reliable nanofabrication tool can dramatically help the research in the field of nanotechnology. This dissertation describes alternative extreme ultraviolet (EUV) lithography techniques which combine table-top EUV laser and various cost-effective imaging strategies. For each technique, numerical simulations, system design, experiment result and its analysis will be presented. In chapter II, a brief review of the main characteristics of table-top EUV lasers will be addressed concentrating on its high power and large coherence radius that enable the lithography application described herein. The development of a Talbot EUV lithography system which is capable of printing 50nm half pitch nanopatterns will be illustrated in chapter III. A detailed discussion of its resolution limit will be presented followed by the development of X-Y-Z positioning stage, the fabrication protocol for diffractive EUV mask, and the pattern transfer using self- developed ion beam etching, and the dose control unit. In addition, this dissertation demonstrated the capability to fabricate functional periodic nanostructures using Talbot EUV lithography. After that, resolution enhancement techniques like multiple exposure, displacement Talbot EUV lithography, fractional Talbot EUV lithography, and Talbot lithography using 18.9nm amplified spontaneous emission laser will be demonstrated. Chapter IV will describe a hybrid EUV lithography which combines the Talbot imaging and interference lithography rendering a high resolution interference pattern whose lattice is modified by a custom designed Talbot mask. In other words, this method enables filling the arbitrary Talbot cell with ultra-fine interference nanofeatures. Detailed optics modeling, system design and experiment results using He-Ne laser and table top EUV laser are included. The last part of chapter IV will analyze its exclusive advantages over traditional Talbot or interference lithography.

Challenges and requirements of mask data processing for multi-beam mask writer

NASA Astrophysics Data System (ADS)

Choi, Jin; Lee, Dong Hyun; Park, Sinjeung; Lee, SookHyun; Tamamushi, Shuichi; Shin, In Kyun; Jeon, Chan Uk

2015-07-01

To overcome the resolution and throughput of current mask writer for advanced lithography technologies, the platform of e-beam writer have been evolved by the developments of hardware and software in writer. Especially, aggressive optical proximity correction (OPC) for unprecedented extension of optical lithography and the needs of low sensitivity resist for high resolution result in the limit of variable shaped beam writer which is widely used for mass production. The multi-beam mask writer is attractive candidate for photomask writing of sub-10nm device because of its high speed and the large degree of freedom which enable high dose and dose modulation for each pixel. However, the higher dose and almost unlimited appetite for dose modulation challenge the mask data processing (MDP) in aspects of extreme data volume and correction method. Here, we discuss the requirements of mask data processing for multi-beam mask writer and presents new challenges of the data format, data flow, and correction method for user and supplier MDP tool.

The influence of grating shape formation fluctuation on DFB laser diode threshold condition

NASA Astrophysics Data System (ADS)

Bao, Shiwei; Song, Qinghai; Xie, Chunmei

2018-03-01

Not only the grating material refractive index itself but also the Bragg grating physical shape formation affects the coupling strength greatly. The Bragg grating shape includes three factors, namely grating depth, duty ratio and grating angle. During the lithography and wet etching process, there always will be some fluctuation between the target and real grating shape formation after fabrication process. This grating shape fluctuation will affect the DFB coupling coefficient κ , and then consequently threshold current and corresponding wavelength. This paper studied the grating shape formation fluctuation influence to improve the DFB fabrication yield. A truncated normal random distribution fluctuation is considered in this paper. The simulation results conclude that it is better to choose relative thicker grating depth with lower refractive index to obtain a better fabrication tolerance, while not quite necessary to spend too much effort on improving lithography and wet etching process to get a precisely grating duty ratio and grating angle.

Design and implementation of a cloud based lithography illumination pupil processing application

NASA Astrophysics Data System (ADS)

Zhang, Youbao; Ma, Xinghua; Zhu, Jing; Zhang, Fang; Huang, Huijie

2017-02-01

Pupil parameters are important parameters to evaluate the quality of lithography illumination system. In this paper, a cloud based full-featured pupil processing application is implemented. A web browser is used for the UI (User Interface), the websocket protocol and JSON format are used for the communication between the client and the server, and the computing part is implemented in the server side, where the application integrated a variety of high quality professional libraries, such as image processing libraries libvips and ImageMagic, automatic reporting system latex, etc., to support the program. The cloud based framework takes advantage of server's superior computing power and rich software collections, and the program could run anywhere there is a modern browser due to its web UI design. Compared to the traditional way of software operation model: purchased, licensed, shipped, downloaded, installed, maintained, and upgraded, the new cloud based approach, which is no installation, easy to use and maintenance, opens up a new way. Cloud based application probably is the future of the software development.

The influence of grating shape formation fluctuation on DFB laser diode threshold condition

NASA Astrophysics Data System (ADS)

Bao, Shiwei; Song, Qinghai; Xie, Chunmei

2018-06-01

Not only the grating material refractive index itself but also the Bragg grating physical shape formation affects the coupling strength greatly. The Bragg grating shape includes three factors, namely grating depth, duty ratio and grating angle. During the lithography and wet etching process, there always will be some fluctuation between the target and real grating shape formation after fabrication process. This grating shape fluctuation will affect the DFB coupling coefficient κ, and then consequently threshold current and corresponding wavelength. This paper studied the grating shape formation fluctuation influence to improve the DFB fabrication yield. A truncated normal random distribution fluctuation is considered in this paper. The simulation results conclude that it is better to choose relative thicker grating depth with lower refractive index to obtain a better fabrication tolerance, while not quite necessary to spend too much effort on improving lithography and wet etching process to get a precisely grating duty ratio and grating angle.

Pattern Inspection of EUV Masks Using DUV Light

NASA Astrophysics Data System (ADS)

Liang, Ted; Tejnil, Edita; Stivers, Alan R.

2002-12-01

Inspection of extreme ultraviolet (EUV) lithography masks requires reflected light and this poses special challenges for inspection tool suppliers as well as for mask makers. Inspection must detect all the printable defects in the absorber pattern as well as printable process-related defects. Progress has been made under the NIST ATP project on "Intelligent Mask Inspection Systems for Next Generation Lithography" in assessing the factors that impact the inspection tool sensitivity. We report in this paper the inspection of EUV masks with programmed absorber defects using 257nm light. All the materials of interests for masks are highly absorptive to EUV light as compared to deep ultraviolet (DUV) light. Residues and contamination from mask fabrication process and handling are prone to be printable. Therefore, it is critical to understand their EUV printability and optical inspectability. Process related defects may include residual buffer layer such as oxide, organic contaminants and possible over-etch to the multilayer surface. Both simulation and experimental results will be presented in this paper.

High Quality 3D Photonics using Nano Imprint Lithography of Fast Sol-gel Materials.

PubMed

Bar-On, Ofer; Brenner, Philipp; Siegle, Tobias; Gvishi, Raz; Kalt, Heinz; Lemmer, Uli; Scheuer, Jacob

2018-05-18

A method for the realization of low-loss integrated optical components is proposed and demonstrated. This approach is simple, fast, inexpensive, scalable for mass production, and compatible with both 2D and 3D geometries. The process is based on a novel dual-step soft nano imprint lithography process for producing devices with smooth surfaces, combined with fast sol-gel technology providing highly transparent materials. As a concrete example, this approach is demonstrated on a micro ring resonator made by direct laser writing (DLW) to achieve a quality factor improvement from one hundred thousand to more than 3 million. To the best of our knowledge this also sets a Q-factor record for UV-curable integrated micro-ring resonators. The process supports the integration of many types of materials such as light-emitting, electro-optic, piezo-electric, and can be readily applied to a wide variety of devices such as waveguides, lenses, diffractive elements and more.

MAPPER: high-throughput maskless lithography

NASA Astrophysics Data System (ADS)

Wieland, M. J.; de Boer, G.; ten Berge, G. F.; Jager, R.; van de Peut, T.; Peijster, J. J. M.; Slot, E.; Steenbrink, S. W. H. K.; Teepen, T. F.; van Veen, A. H. V.; Kampherbeek, B. J.

2009-03-01

Maskless electron beam lithography, or electron beam direct write, has been around for a long time in the semiconductor industry and was pioneered from the mid-1960s onwards. This technique has been used for mask writing applications as well as device engineering and in some cases chip manufacturing. However because of its relatively low throughput compared to optical lithography, electron beam lithography has never been the mainstream lithography technology. To extend optical lithography double patterning, as a bridging technology, and EUV lithography are currently explored. Irrespective of the technical viability of both approaches, one thing seems clear. They will be expensive [1]. MAPPER Lithography is developing a maskless lithography technology based on massively-parallel electron-beam writing with high speed optical data transport for switching the electron beams. In this way optical columns can be made with a throughput of 10-20 wafers per hour. By clustering several of these columns together high throughputs can be realized in a small footprint. This enables a highly cost-competitive alternative to double patterning and EUV alternatives. In 2007 MAPPER obtained its Proof of Lithography milestone by exposing in its Demonstrator 45 nm half pitch structures with 110 electron beams in parallel, where all the beams where individually switched on and off [2]. In 2008 MAPPER has taken a next step in its development by building several tools. The objective of building these tools is to involve semiconductor companies to be able to verify tool performance in their own environment. To enable this, the tools will have a 300 mm wafer stage in addition to a 110-beam optics column. First exposures at 45 nm half pitch resolution have been performed and analyzed. On the same wafer it is observed that all beams print and based on analysis of 11 beams the CD for the different patterns is within 2.2 nm from target and the CD uniformity for the different patterns is better than 2.8 nm.

High-Tc superconducting microbolometer for terahertz applications

NASA Astrophysics Data System (ADS)

Ulysse, C.; Gaugue, A.; Adam, A.; Kreisler, A. J.; Villégier, J.-C.; Thomassin, J.-L.

2002-05-01

Superconducting hot electron bolometer mixers are now a competitive alternative to Schottky diode mixers in the terahertz frequency range because of their ultra wideband (from millimeter waves to visible light), high conversion gain, and low intrinsic noise level. High Tc superconductor materials can be used to make hot electron bolometers and present some advantage in term of operating temperature and cooling. In this paper, we present first a model for the study of superconducting hot electron bolometers responsivity in direct detection mode, in order to establish a firm basis for the design of future THz mixers. Secondly, an original process to realize YBaCuO hot electron bolometer mixers will be described. Submicron YBaCuO superconducting structures are expitaxially sputter deposited on MgO substrates and patterned by using electron beam lithography in combination with optical lithography. Metal masks achieved by electron beam lithography are insuring a good bridge definition and protection during ion etching. Finally, detection experiments are being performed with a laser at 850 nm wavelength, in homodyne mode in order to prove the feasibility and potential performances of these devices.

Nanopatterning on calixarene thin films via low-energy field-emission scanning probe lithography.

PubMed

He, Xiaoyue; Li, Peng; Liu, Pengchong; Zhang, Xiaoxian; Zhou, Xiangqian; Liu, Wei; Qiu, Xiaohui

2018-08-10

Field-emitted, low-energy electrons from the conducting tip of an atomic force microscope were adopted for nanolithography on calixarene ultrathin films coated on silicon wafers. A structural evolution from protrusion to depression down to a 30 nm spatial resolution was reproducibly obtained by tuning the sample voltage and exposure current in the lithography process. Close analyses of the profiles showed that the nanostructures formed by a single exposure with a high current are almost identical to those created by cumulative exposure with a lower current but an equal number of injected electrons. Surface potential imaging by Kelvin probe force microscopy found a negatively charged region surrounding the groove structures once the structures were formed. We conclude that the mechanism related to the formation of a temporary negative state and molecule decomposition, rather than thermal ablation, is responsible for the low-energy field-emission electron lithography on a calixarene molecular resist. We hope that our elucidation of the underlying mechanism is helpful for molecular resist design and further improving the reproducibility and throughput of nanolithography.

High Throughput Optical Lithography by Scanning a Massive Array of Bowtie Aperture Antennas at Near-Field

DTIC Science & Technology

2015-11-03

scale optical projection system powered by spatial light modulators, such as digital micro-mirror device ( DMD ). Figure 4 shows the parallel lithography ...1Scientific RepoRts | 5:16192 | DOi: 10.1038/srep16192 www.nature.com/scientificreports High throughput optical lithography by scanning a massive...array of bowtie aperture antennas at near-field X. Wen1,2,3,*, A. Datta1,*, L. M. Traverso1, L. Pan1, X. Xu1 & E. E. Moon4 Optical lithography , the

Sub-100nm, Maskless Deep-UV Zone-Plate Array Lithography

DTIC Science & Technology

2004-05-07

The basic idea is to use fiducial grids, fabricated using interference lithography (or a derivative thereof) to determine the placement of features...sensed, and corrections are fed back to the beam-control electronics to cancel errors in the beam’s position. The virtue of interference lithography ...Sub-100nm, Maskless Deep-UV Zone-Plate Array Lithography Project Period: March 1, 2001 – February 28, 2004 F i n a l R e p o r t Army Research

Lead zirconate titanate nanoscale patterning by ultraviolet-based lithography lift-off technique for nano-electromechanical system applications.

PubMed

Guillon, Samuel; Saya, Daisuke; Mazenq, Laurent; Costecalde, Jean; Rèmiens, Denis; Soyer, Caroline; Nicu, Liviu

2012-09-01

The advantage of using lead zirconate titanate (PbZr(0.54)Ti(0.46)O(3)) ceramics as an active material in nanoelectromechanical systems (NEMS) comes from its relatively high piezoelectric coefficients. However, its integration within a technological process is limited by the difficulty of structuring this material with submicrometer resolution at the wafer scale. In this work, we develop a specific patterning method based on optical lithography coupled with a dual-layer resist process. The main objective is to obtain sub-micrometer features by lifting off a 100-nm-thick PZT layer while preserving the material's piezoelectric properties. A subsequent result of the developed method is the ability to stack several layers with a lateral resolution of few tens of nanometers, which is mandatory for the fabrication of NEMS with integrated actuation and read-out capabilities.

Side-wall spacer passivated sub-μm Josephson junction fabrication process

NASA Astrophysics Data System (ADS)

Grönberg, Leif; Kiviranta, Mikko; Vesterinen, Visa; Lehtinen, Janne; Simbierowicz, Slawomir; Luomahaara, Juho; Prunnila, Mika; Hassel, Juha

2017-12-01

We present a structure and a fabrication method for superconducting tunnel junctions down to the dimensions of 200 nm using i-line UV lithography. The key element is a sidewall-passivating spacer structure (SWAPS) which is shaped for smooth crossline contacting and low parasitic capacitance. The SWAPS structure enables formation of junctions with dimensions at or below the lithography-limited linewidth. An additional benefit is avoiding the excessive use of amorphous dielectric materials which is favorable in sub-Kelvin microwave applications often plagued by nonlinear and lossy dielectrics. We apply the structure to niobium trilayer junctions, and provide characterization results yielding evidence on wafer-scale scalability, and critical current density tuning in the range of 0.1-3.0 kA cm-2. We discuss the applicability of the junction process in the context of different applications, such as SQUID magnetometers and Josephson parametric amplifiers.

The line roughness improvement with plasma coating and cure treatment for 193nm lithography and beyond

NASA Astrophysics Data System (ADS)

Zheng, Erhu; Huang, Yi; Zhang, Haiyang

2017-03-01

As CMOS technology reaches 14nm node and beyond, one of the key challenges of the extension of 193nm immersion lithography is how to control the line edge and width roughness (LER/LWR). For Self-aligned Multiple Patterning (SaMP), LER becomes larger while LWR becomes smaller as the process proceeds[1]. It means plasma etch process becomes more and more dominant for LER reduction. In this work, we mainly focus on the core etch solution including an extra plasma coating process introduced before the bottom anti reflective coating (BARC) open step, and an extra plasma cure process applied right after BARC-open step. Firstly, we leveraged the optimal design experiment (ODE) to investigate the impact of plasma coating step on LER and identified the optimal condition. ODE is an appropriate method for the screening experiments of non-linear parameters in dynamic process models, especially for high-cost-intensive industry [2]. Finally, we obtained the proper plasma coating treatment condition that has been proven to achieve 32% LER improvement compared with standard process. Furthermore, the plasma cure scheme has been also optimized with ODE method to cover the LWR degradation induced by plasma coating treatment.

Method for the fabrication of three-dimensional microstructures by deep X-ray lithography

DOEpatents

Sweatt, William C.; Christenson, Todd R.

2005-04-05

A method for the fabrication of three-dimensional microstructures by deep X-ray lithography (DXRL) comprises a masking process that uses a patterned mask with inclined mask holes and off-normal exposures with a DXRL beam aligned with the inclined mask holes. Microstructural features that are oriented in different directions can be obtained by using multiple off-normal exposures through additional mask holes having different orientations. Various methods can be used to block the non-aligned mask holes from the beam when using multiple exposures. A method for fabricating a precision 3D X-ray mask comprises forming an intermediate mask and a master mask on a common support membrane.

Accurate lithography simulation model based on convolutional neural networks

NASA Astrophysics Data System (ADS)

Watanabe, Yuki; Kimura, Taiki; Matsunawa, Tetsuaki; Nojima, Shigeki

2017-07-01

Lithography simulation is an essential technique for today's semiconductor manufacturing process. In order to calculate an entire chip in realistic time, compact resist model is commonly used. The model is established for faster calculation. To have accurate compact resist model, it is necessary to fix a complicated non-linear model function. However, it is difficult to decide an appropriate function manually because there are many options. This paper proposes a new compact resist model using CNN (Convolutional Neural Networks) which is one of deep learning techniques. CNN model makes it possible to determine an appropriate model function and achieve accurate simulation. Experimental results show CNN model can reduce CD prediction errors by 70% compared with the conventional model.

Fabrication of frequency selective surface for band stop IR-filter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mishra, Akshita, E-mail: akshitamishra27@gmail.com; Sudheer,; Tiwari, P.

2016-05-23

Fabrication and characterization of frequency selective surfaces (FSS) on silicon dioxide/ silicon is reported. Electron beam lithography based techniques are used for the fabrication of periodic slot structure in tungsten layer on silicon dioxide/silicon. The fabrication process consists of growth of SiO{sub 2} on silicon, tungsten deposition, electron beam lithography, and wet etching of tungsten. The optical characterization of the structural pattern was carried out using fourier transform infrared spectroscopy (FTIR). The reflectance spectra clearly show a resonance peak at 9.09 µm in the mid infrared region. This indicates that the patterned surface acts as band stop filter in the mid-infraredmore » region.« less

The effects of the bottom anti-reflective coating with different baked temperatures and thicknesses on nanoscale patterns

NASA Astrophysics Data System (ADS)

Zheng, Jie; Li, Ling; Chen, Weidong

2015-12-01

The bottom anti-reflective coating (BARC) material can enhance the resolution of the nanopatterns structures in laser interference lithography process. In this study, WIDE-B ARC material was investigated to confirm the reduction of the vertical standing wave which leads to defect of nanopatterns. And the critical dimension (CD) of 100 nm L/S patterns with and without the application of BARC material was fabricated by laser interference lithography technology. The compared results showed that BARC can effectively reduce CD swing and obtain more uniform nanopatterns. Meanwhile, we also verified the influence of cured temperature and film thickness of BARC on the uniformity of nanopatterns.

Fabrication of Silicon Nanobelts and Nanopillars by Soft Lithography for Hydrophobic and Hydrophilic Photonic Surfaces.

PubMed

Baquedano, Estela; Martinez, Ramses V; Llorens, José M; Postigo, Pablo A

2017-05-11

Soft lithography allows for the simple and low-cost fabrication of nanopatterns with different shapes and sizes over large areas. However, the resolution and the aspect ratio of the nanostructures fabricated by soft lithography are limited by the depth and the physical properties of the stamp. In this work, silicon nanobelts and nanostructures were achieved by combining soft nanolithography patterning with optimized reactive ion etching (RIE) in silicon. Using polymethylmethacrylate (PMMA) nanopatterned layers with thicknesses ranging between 14 and 50 nm, we obtained silicon nanobelts in areas of square centimeters with aspect ratios up to ~1.6 and linewidths of 225 nm. The soft lithographic process was assisted by a thin film of SiO x (less than 15 nm) used as a hard mask and RIE. This simple patterning method was also used to fabricate 2D nanostructures (nanopillars) with aspect ratios of ~2.7 and diameters of ~200 nm. We demonstrate that large areas patterned with silicon nanobelts exhibit a high reflectivity peak in the ultraviolet C (UVC) spectral region (280 nm) where some aminoacids and peptides have a strong absorption. We also demonstrated how to tailor the aspect ratio and the wettability of these photonic surfaces (contact angles ranging from 8.1 to 96.2°) by changing the RIE power applied during the fabrication process.

Moore's law, lithography, and how optics drive the semiconductor industry

NASA Astrophysics Data System (ADS)

Hutcheson, G. Dan

2018-03-01

When the subject of Moore's Law arises, the important role that lithography plays and how advances in optics have made it all possible is seldom brought up in the world outside of lithography itself. When lithography is mentioned up in the value chain, it's often a critique of how advances are coming too slow and getting far too expensive. Yet advances in lithography are at the core of how Moore's Law is viable. This presentation lays out how technology and the economics of optics in manufacturing interleave to drive the immense value that semiconductors have brought to the world by making it smarter. Continuing these advances will be critical as electronics make the move from smart to cognitive.

Availability of underlayer application to EUV process

NASA Astrophysics Data System (ADS)

Kosugi, Hitoshi; Fonseca, Carlos; Iwao, Fumiko; Marumoto, Hiroshi; Kim, Hyun-Woo; Cho, Kyoungyong; Park, Cheol-Hong; Park, Chang-Min; Na, Hai-Sub; Koh, Cha-Won; Cho, Hanku

2011-04-01

EUV lithography is one of the most promising technologies for the fabrication of beyond 30nm HP generation devices. However, it is well-known that EUV lithography still has significant challenges. A great concern is the change of resist material for EUV resist process. EUV resist material formulations will likely change from conventional-type materials. As a result, substrate dependency needs to be understood. TEL has reported that the simulation combined with experiments is a good way to confirm the substrate dependency. In this work the application of HMDS treatment and SiON introduction, as an underlayer, are studied to cause a footing of resist profile. Then, we applied this simulation technique to Samsung EUV process. We will report the benefit of this simulation work and effect of underlayer application. Regarding the etching process, underlayer film introduction could have significant issues because the film that should be etched off increases. For that purpose, thinner films are better for etching. In general, thinner films may have some coating defects. We will report the coating coverage performance and defectivity of ultra thin film coating.

Scale up of large ALON® and spinel windows

NASA Astrophysics Data System (ADS)

Goldman, Lee M.; Kashalikar, Uday; Ramisetty, Mohan; Jha, Santosh; Sastri, Suri

2017-05-01

Aluminum Oxynitride (ALON® Transparent Ceramic) and Magnesia Aluminate Spinel (Spinel) combine broadband transparency with excellent mechanical properties. Their cubic structure means that they are transparent in their polycrystalline form, allowing them to be manufactured by conventional powder processing techniques. Surmet has scaled up its ALON® production capability to produce and deliver windows as large as 4.4 sq ft. We have also produced our first 6 sq ft window. We are in the process of producing 7 sq ft ALON® window blanks for armor applications; and scale up to even larger, high optical quality blanks for Recce window applications is underway. Surmet also produces spinel for customers that require superior transmission at the longer wavelengths in the mid wave infra-red (MWIR). Spinel windows have been limited to smaller sizes than have been achieved with ALON. To date the largest spinel window produced is 11x18-in, and windows 14x20-in size are currently in process. Surmet is now scaling up its spinel processing capability to produce high quality window blanks as large as 19x27-in for sensor applications.

Lithography with MeV Energy Ions for Biomedical Applications: Accelerator Considerations

NASA Astrophysics Data System (ADS)

Sangyuenyongpipat, S.; Whitlow, H. J.; Nakagawa, S. T.; Yoshida, E.

2009-03-01

MeV ion beam lithographies are very powerful techniques for 3D direct writing in positive or negtive photoresist materials. Nanometer-scale rough structures, or clear areas with straight vertical sidewalls as thin as a few 10's of nm in a resist of a few nm to 100 μm thickness can be made. These capabilities are particularly useful for lithography in cellular- and sub-cellular level biomedical research and technology applications. It can be used for tailor making special structures such as optical waveguides, biosensors, DNA sorters, spotting plates, systems for DNA, protein and cell separation, special cell-growth substrates and microfluidic lab-on-a-chip devices. Furthermore MeV ion beam lithography can be used for rapid prototyping, and also making master stamps and moulds for mass production by hot embossing and nanoimprint lithography. The accelerator requirements for three different high energy ion beam lithography techniques are overviewed. We consider the special requirements placed on the accelerator and how this is achieved for a commercial proton beam writing tool.

Transplant Image Processing Technology under Windows into the Platform Based on MiniGUI

NASA Astrophysics Data System (ADS)

Gan, Lan; Zhang, Xu; Lv, Wenya; Yu, Jia

MFC has a large number of digital image processing-related API functions, object-oriented and class mechanisms which provides image processing technology strong support in Windows. But in embedded systems, image processing technology dues to the restrictions of hardware and software do not have the environment of MFC in Windows. Therefore, this paper draws on the experience of image processing technology of Windows and transplants it into MiniGUI embedded systems. The results show that MiniGUI/Embedded graphical user interface applications about image processing which used in embedded image processing system can be good results.

Micro-bridge defects: characterization and root cause analysis

NASA Astrophysics Data System (ADS)

Santoro, Gaetano; Van den Heuvel, Dieter; Braggin, Jennifer; Rosslee, Craig; Leray, Philippe J.; Cheng, Shaunee; Jehoul, Christiane; Schreutelkamp, Robert; Hillel, Noam

2010-03-01

Defect review of advanced lithography processes is becoming more and more challenging as feature sizes decrease. Previous studies using a defect review SEM on immersion lithography generated wafers have resulted in a defect classification scheme which, among others, includes a category for micro-bridges. Micro-bridges are small connections between two adjacent lines in photo-resist and are considered device killing defects. Micro-bridge rates also tend to increase as feature sizes decrease, making them even more important for the next technology nodes. Especially because micro-bridge defects can originate from different root causes, the need to further refine and split up the classification of this type of defect into sub groups may become a necessity. This paper focuses on finding the correlation of the different types of micro-bridge defects to a particular root cause based on a full characterization and root cause analysis of this class of defects, by using advanced SEM review capabilities like high quality imaging in very low FOV, Multi Perspective SEM Imaging (MPSI), tilted column and rotated stage (Tilt&Rotation) imaging and Focused Ion Beam (FIB) cross sectioning. Immersion lithography material has been mainly used to generate the set of data presented in this work even though, in the last part of the results, some EUV lithography data will be presented as part of the continuing effort to extend the micro-bridge defect characterization to the EUV technology on 40 nm technology node and beyond.

State-of-the-art Nanofabrication in Catalysis.

PubMed

Karim, Waiz; Tschupp, Simon A; Herranz, Juan; Schmidt, Thomas J; Ekinci, Yasin; van Bokhovenac, Jeroen A

2017-04-26

We present recent developments in top-down nanofabrication that have found application in catalysis research. To unravel the complexity of catalytic systems, the design and use of models with control of size, morphology, shape and inter-particle distances is a necessity. The study of well-defined and ordered nanoparticles on a support contributes to the understanding of complex phenomena that govern reactions in heterogeneous and electro-catalysis. We review the strengths and limitations of different nanolithography methods such as electron beam lithography (EBL), photolithography, extreme ultraviolet (EUV) lithography and colloidal lithography for the creation of such highly tunable catalytic model systems and their applications in catalysis. Innovative strategies have enabled particle sizes reaching dimensions below 10 nm. It is now possible to create pairs of particles with distance controlled with an extremely high precision in the order of one nanometer. We discuss our approach to study these model systems at the single-particle level using X-ray absorption spectroscopy and show new ways to fabricate arrays of single nanoparticles or nanoparticles in pairs over a large area using EBL and EUV-achromatic Talbot lithography. These advancements have provided new insights into the active sites in metal catalysts and enhanced the understanding of the role of inter-particle interactions and catalyst supports, such as in the phenomenon of hydrogen spillover. We present a perspective on future directions for employing top-down nanofabrication in heterogeneous and electrocatalysis. The rapid development in nanofabrication and characterization methods will continue to have an impact on understanding of complex catalytic processes.

Defect printability for high-exposure dose advanced packaging applications

NASA Astrophysics Data System (ADS)

Mikles, Max; Flack, Warren; Nguyen, Ha-Ai; Schurz, Dan

2003-12-01

Pellicles are used in semiconductor lithography to minimize printable defects and reduce reticle cleaning frequency. However, there are a growing number of microlithography applications, such as advanced packaging and nanotechnology, where it is not clear that pellicles always offer a significant benefit. These applications have relatively large critical dimensions and require ultra thick photoresists with extremely high exposure doses. Given that the lithography is performed in Class 100 cleanroom conditions, it is possible that the risk of defects from contamination is sufficiently low that pellicles would not be required on certain process layer reticles. The elimination of the pellicle requirement would provide a cost reduction by saving the original pellicle cost and eliminating future pellicle replacement and repair costs. This study examines the imaging potential of defects with reticle patterns and processes typical for gold-bump and solder-bump advanced packaging lithography. The test reticle consists of 30 to 90 μm octagonal contact patterns representative of advanced packaging reticles. Programmed defects are added that represent the range of particle sizes (3 to 30 μm) normally protected by the pellicle and that are typical of advanced packaging lithography cleanrooms. The reticle is exposed using an Ultratech Saturn Spectrum 300e2 1X stepper on wafers coated with a variety of ultra thick (30 to 100 μm) positive and negative-acting photoresists commonly used in advanced packaging. The experimental results show that in many cases smaller particles continue to be yield issues for the feature size and density typical of advanced packaging processes. For the two negative photoresists studied it appears that a pellicle is not required for protection from defects smaller than 10 to 15 μm depending on the photoresist thickness. Thus the decision on pellicle usage for these materials would need to be made based on the device fabrication process and the cleanliness of a fabrication facility. For the two positive photoresists studied it appears that a pellicle is required to protect from defects down to 3 μm defects depending on the photoresist thickness. This suggests that a pellicle should always be used for these materials. Since a typical fabrication facility would use both positive and negative photoresists it may be advantageous to use pellicles on all reticles simply to avoid confusion. The cost savings of not using a pellicle could easily be outweighed by the yield benefits of using one.

Laser Material Processing for Microengineering Applications

NASA Technical Reports Server (NTRS)

Helvajian, H.

1995-01-01

The processing of materials via laser irradiation is presented in a brief survey. Various techniques currently used in laser processing are outlined and the significance to the development of space qualified microinstrumentation are identified. In general the laser processing technique permits the transferring of patterns (i.e. lithography), machining (i.e. with nanometer precision), material deposition (e.g., metals, dielectrics), the removal of contaminants/debris/passivation layers and the ability to provide process control through spectroscopy.

The development of 8 inch roll-to-plate nanoimprint lithography (8-R2P-NIL) system

NASA Astrophysics Data System (ADS)

Lee, Lai Seng; Mohamed, Khairudin; Ooi, Su Guan

2017-07-01

Growth in semiconductor and integrated circuit industry was observed in the past decennium of years for industrial technology which followed Moore's law. The line width of nanostructure to be exposed was influenced by the essential technology of photolithography. Thus, it is crucial to have a low cost and high throughput manufacturing process for nanostructures. Nanoimprint Lithography technique invented by Stephen Y. Chou was considered as major nanolithography process to be used in future integrated circuit and integrated optics. The drawbacks of high imprint pressure, high imprint temperature, air bubbles formation, resist sticking to mold and low throughput of thermal nanoimprint lithography on silicon wafer have yet to be solved. Thus, the objectives of this work is to develop a high throughput, low imprint force, room temperature UV assisted 8 inch roll to plate nanoimprint lithography system capable of imprinting nanostructures on 200 mm silicon wafer using roller imprint with flexible mold. A piece of resist spin coated silicon wafer was placed onto vacuum chuck drives forward by a stepper motor. A quartz roller wrapped with a piece of transparent flexible mold was used as imprint roller. The imprinted nanostructures were cured by 10 W, 365 nm UV LED which situated inside the quartz roller. Heat generated by UV LED was dissipated by micro heat pipe. The flexible mold detaches from imprinted nanostructures in a 'line peeling' pattern and imprint pressure was measured by ultra-thin force sensors. This system has imprinting speed capability ranging from 0.19 mm/s to 5.65 mm/s, equivalent to imprinting capability of 3 to 20 pieces of 8 inch wafers per hour. Speed synchronization between imprint roller and vacuum chuck was achieved by controlling pulse rate supplied to stepper motor which drive the vacuum chuck. The speed different ranging from 2 nm/s to 98 nm/s is achievable. Vacuum chuck height was controlled by stepper motor with displacement of 5 nm/step.

Mask fabrication and its applications to extreme ultra-violet diffractive optics

NASA Astrophysics Data System (ADS)

Cheng, Yang-Chun

Short-wavelength radiation around 13nm of wavelength (Extreme Ultra-Violet, EUV) is being considered for patterning microcircuits, and other electronic chips with dimensions in the nanometer range. Interferometric Lithography (IL) uses two beams of radiation to form high-resolution interference fringes, as small as half the wavelength of the radiation used. As a preliminary step toward manufacturing technology, IL can be used to study the imaging properties of materials in a wide spectral range and at nanoscale dimensions. A simple implementation of IL uses two transmission diffraction gratings to form the interference pattern. More complex interference patterns can be created by using different types of transmission gratings. In this thesis, I describe the development of a EUV lithography system that uses diffractive optical elements (DOEs), from simple gratings to holographic structures. The exposure system is setup on a EUV undulator beamline at the Synchrotron Radiation Center, in the Center for NanoTechnology clean room. The setup of the EUV exposure system is relatively simple, while the design and fabrication of the DOE "mask" is complex, and relies on advanced nanofabrication techniques. The EUV interferometric lithography provides reliable EUV exposures of line/space patterns and is ideal for the development of EUV resist technology. In this thesis I explore the fabrication of these DOE for the EUV range, and discuss the processes I have developed for the fabrication of ultra-thin membranes. In addition, I discuss EUV holographic lithography and generalized Talbot imaging techniques to extend the capability of our EUV-IL system to pattern arbitrary shapes, using more coherent sources than the undulator. In a series of experiments, we have demonstrated the use of a soft X-ray (EUV) laser as effective source for EUV lithography. EUV-IL, as implemented at CNTech, is being used by several companies and research organizations to characterize photoresist materials.

Use of Sacrificial Nanoparticles to Remove the Effects of Shot-noise in Contact Holes Fabricated by E-beam Lithography.

PubMed

Rananavare, Shankar B; Morakinyo, Moshood K

2017-02-12

Nano-patterns fabricated with extreme ultraviolet (EUV) or electron-beam (E-beam) lithography exhibit unexpected variations in size. This variation has been attributed to statistical fluctuations in the number of photons/electrons arriving at a given nano-region arising from shot-noise (SN). The SN varies inversely to the square root of a number of photons/electrons. For a fixed dosage, the SN is larger in EUV and E-beam lithographies than for traditional (193 nm) optical lithography. Bottom-up and top-down patterning approaches are combined to minimize the effects of shot noise in nano-hole patterning. Specifically, an amino-silane surfactant self-assembles on a silicon wafer that is subsequently spin-coated with a 100 nm film of a PMMA-based E-beam photoresist. Exposure to the E-beam and the subsequent development uncover the underlying surfactant film at the bottoms of the holes. Dipping the wafer in a suspension of negatively charged, citrate-capped, 20 nm gold nanoparticles (GNP) deposits one particle per hole. The exposed positively charged surfactant film in the hole electrostatically funnels the negatively charged nanoparticle to the center of an exposed hole, which permanently fixes the positional registry. Next, by heating near the glass transition temperature of the photoresist polymer, the photoresist film reflows and engulfs the nanoparticles. This process erases the holes affected by SN but leaves the deposited GNPs locked in place by strong electrostatic binding. Treatment with oxygen plasma exposes the GNPs by etching a thin layer of the photoresist. Wet-etching the exposed GNPs with a solution of I2/KI yields uniform holes located at the center of indentations patterned by E-beam lithography. The experiments presented show that the approach reduces the variation in the size of the holes caused by SN from 35% to below 10%. The method extends the patterning limits of transistor contact holes to below 20 nm.

Lithography process for patterning HgI2 photonic devices

DOEpatents

Mescher, Mark J.; James, Ralph B.; Hermon, Haim

2004-11-23

A photolithographic process forms patterns on HgI.sub.2 surfaces and defines metal sublimation masks and electrodes to substantially improve device performance by increasing the realizable design space. Techniques for smoothing HgI.sub.2 surfaces and for producing trenches in HgI.sub.2 are provided. A sublimation process is described which produces etched-trench devices with enhanced electron-transport-only behavior.

Lossless compression techniques for maskless lithography data

NASA Astrophysics Data System (ADS)

Dai, Vito; Zakhor, Avideh

2002-07-01

Future lithography systems must produce more dense chips with smaller feature sizes, while maintaining the throughput of one wafer per sixty seconds per layer achieved by today's optical lithography systems. To achieve this throughput with a direct-write maskless lithography system, using 25 nm pixels for 50 nm feature sizes, requires data rates of about 10 Tb/s. In a previous paper, we presented an architecture which achieves this data rate contingent on consistent 25 to 1 compression of lithography data, and on implementation of a decoder-writer chip with a real-time decompressor fabricated on the same chip as the massively parallel array of lithography writers. In this paper, we examine the compression efficiency of a spectrum of techniques suitable for lithography data, including two industry standards JBIG and JPEG-LS, a wavelet based technique SPIHT, general file compression techniques ZIP and BZIP2, our own 2D-LZ technique, and a simple list-of-rectangles representation RECT. Layouts rasterized both to black-and-white pixels, and to 32 level gray pixels are considered. Based on compression efficiency, JBIG, ZIP, 2D-LZ, and BZIP2 are found to be strong candidates for application to maskless lithography data, in many cases far exceeding the required compression ratio of 25. To demonstrate the feasibility of implementing the decoder-writer chip, we consider the design of a hardware decoder based on ZIP, the simplest of the four candidate techniques. The basic algorithm behind ZIP compression is Lempel-Ziv 1977 (LZ77), and the design parameters of LZ77 decompression are optimized to minimize circuit usage while maintaining compression efficiency.

Pocket Pal: A Graphic Arts Digest for Printers and Advertising Production Managers. Tenth Edition.

ERIC Educational Resources Information Center

1970

In this digest of information about printing a brief survey of the history of printing precedes detailed explanations of the processes and the materials involved in printing. The four major printing processes--letterpress, gravure, offset lithography, and screen--are explained. Steps in preparing art and copy for printing, including selection of…

40 CFR 52.777 - Control strategy: photochemical oxidants (hydrocarbons).

Code of Federal Regulations, 2013 CFR

2013-07-01

... lithography operations, business plastics, automotive plastics, and synthetic organic chemical manufacturing..., automotive plastics, and synthetic organic chemical manufacturing industries (SOCMI) batch processes... Michigan area, and an agreed order between U.S. Steel (currently USX Corporation) and the IDEM signed by...

40 CFR 52.777 - Control strategy: photochemical oxidants (hydrocarbons).

Code of Federal Regulations, 2014 CFR

2014-07-01

... plastics, automotive plastics, and synthetic organic chemical manufacturing industries (SOCMI) batch... wastewater processes, offset lithography operations, business plastics, automotive plastics, and synthetic... order between U.S. Steel (currently USX Corporation) and the IDEM signed by IDEM on March 22, 1996...

40 CFR 52.777 - Control strategy: photochemical oxidants (hydrocarbons).

Code of Federal Regulations, 2010 CFR

2010-07-01

... plastics, automotive plastics, and synthetic organic chemical manufacturing industries (SOCMI) batch... wastewater processes, offset lithography operations, business plastics, automotive plastics, and synthetic... order between U.S. Steel (currently USX Corporation) and the IDEM signed by IDEM on March 22, 1996...

40 CFR 52.777 - Control strategy: photochemical oxidants (hydrocarbons).

Code of Federal Regulations, 2011 CFR

2011-07-01

... plastics, automotive plastics, and synthetic organic chemical manufacturing industries (SOCMI) batch... wastewater processes, offset lithography operations, business plastics, automotive plastics, and synthetic... order between U.S. Steel (currently USX Corporation) and the IDEM signed by IDEM on March 22, 1996...

40 CFR 52.777 - Control strategy: photochemical oxidants (hydrocarbons).

Code of Federal Regulations, 2012 CFR

2012-07-01

... lithography operations, business plastics, automotive plastics, and synthetic organic chemical manufacturing..., automotive plastics, and synthetic organic chemical manufacturing industries (SOCMI) batch processes... Michigan area, and an agreed order between U.S. Steel (currently USX Corporation) and the IDEM signed by...

Scanning digital lithography providing high speed large area patterning with diffraction limited sub-micron resolution

NASA Astrophysics Data System (ADS)

Wen, Sy-Bor; Bhaskar, Arun; Zhang, Hongjie

2018-07-01

A scanning digital lithography system using computer controlled digital spatial light modulator, spatial filter, infinity correct optical microscope and high precision translation stage is proposed and examined. Through utilizing the spatial filter to limit orders of diffraction modes for light delivered from the spatial light modulator, we are able to achieve diffraction limited deep submicron spatial resolution with the scanning digital lithography system by using standard one inch level optical components with reasonable prices. Raster scanning of this scanning digital lithography system using a high speed high precision x-y translation stage and piezo mount to real time adjust the focal position of objective lens allows us to achieve large area sub-micron resolved patterning with high speed (compared with e-beam lithography). It is determined in this study that to achieve high quality stitching of lithography patterns with raster scanning, a high-resolution rotation stage will be required to ensure the x and y directions of the projected pattern are in the same x and y translation directions of the nanometer precision x-y translation stage.

Method for extreme ultraviolet lithography

DOEpatents

Felter, T. E.; Kubiak, Glenn D.

1999-01-01

A method of producing a patterned array of features, in particular, gate apertures, in the size range 0.4-0.05 .mu.m using projection lithography and extreme ultraviolet (EUV) radiation. A high energy laser beam is used to vaporize a target material in order to produce a plasma which in turn, produces extreme ultraviolet radiation of a characteristic wavelength of about 13 nm for lithographic applications. The radiation is transmitted by a series of reflective mirrors to a mask which bears the pattern to be printed. The demagnified focused mask pattern is, in turn, transmitted by means of appropriate optics and in a single exposure, to a substrate coated with photoresists designed to be transparent to EUV radiation and also satisfy conventional processing methods.

3D-ICs created using oblique processing

NASA Astrophysics Data System (ADS)

Burckel, D. Bruce

2016-03-01

This paper demonstrates that another class of three-dimensional integrated circuits (3D-ICs) exists, distinct from through silicon via centric and monolithic 3D-ICs. Furthermore, it is possible to create devices that are 3D at the device level (i.e. with active channels oriented in each of the three coordinate axes), by performing standard CMOS fabrication operations at an angle with respect to the wafer surface into high aspect ratio silicon substrates using membrane projection lithography (MPL). MPL requires only minimal fixturing changes to standard CMOS equipment, and no change to current state-of-the-art lithography. Eliminating the constraint of 2D planar device architecture enables a wide range of new interconnect topologies which could help reduce interconnect resistance/capacitance, and potentially improve performance.

Programmable imprint lithography template

DOEpatents

Cardinale, Gregory F [Oakland, CA; Talin, Albert A [Livermore, CA

2006-10-31

A template for imprint lithography (IL) that reduces significantly template production costs by allowing the same template to be re-used for several technology generations. The template is composed of an array of spaced-apart moveable and individually addressable rods or plungers. Thus, the template can be configured to provide a desired pattern by programming the array of plungers such that certain of the plungers are in an "up" or actuated configuration. This arrangement of "up" and "down" plungers forms a pattern composed of protruding and recessed features which can then be impressed onto a polymer film coated substrate by applying a pressure to the template impressing the programmed configuration into the polymer film. The pattern impressed into the polymer film will be reproduced on the substrate by subsequent processing.

Method for extreme ultraviolet lithography

DOEpatents

Felter, T. E.; Kubiak, G. D.

2000-01-01

A method of producing a patterned array of features, in particular, gate apertures, in the size range 0.4-0.05 .mu.m using projection lithography and extreme ultraviolet (EUV) radiation. A high energy laser beam is used to vaporize a target material in order to produce a plasma which in turn, produces extreme ultraviolet radiation of a characteristic wavelength of about 13 nm for lithographic applications. The radiation is transmitted by a series of reflective mirrors to a mask which bears the pattern to be printed. The demagnified focused mask pattern is, in turn, transmitted by means of appropriate optics and in a single exposure, to a substrate coated with photoresists designed to be transparent to EUV radiation and also satisfy conventional processing methods.

Science & Technology Review September/October 2008

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bearinger, J P

2008-07-21

This issue has the following articles: (1) Answering Scientists Most Audacious Questions--Commentary by Dona Crawford; (2) Testing the Accuracy of the Supernova Yardstick--High-resolution simulations are advancing understanding of Type Ia supernovae to help uncover the mysteries of dark energy; (3) Developing New Drugs and Personalized Medical Treatment--Accelerator mass spectrometry is emerging as an essential tool for assessing the effects of drugs in humans; (4) Triage in a Patch--A painless skin patch and accompanying detector can quickly indicate human exposure to biological pathogens, chemicals, explosives, or radiation; and (5) Smoothing Out Defects for Extreme Ultraviolet Lithography--A process for smoothing mask defectsmore » helps move extreme ultraviolet lithography one step closer to creating smaller, more powerful computer chips.« less

Future reticle demand and next-generation lithography technologies

NASA Astrophysics Data System (ADS)

Behringer, Uwe F. W.; Ehrlich, Christian; Fortange, Olaf

1999-04-01

Mask technology has often been considered an enabling for semiconductor fabrication. But today photomasks have evolved to a bottle neck in the every increasing integration process of semiconductor circuits. Regarding to the 1997 SIA roadmap there are very stringent requirements for mask making. Even with the momentary weak Asian market the worldwide demand for reticles will continue to grow. The anticipation of larger reticles has been discussed over years. What ever the reason for the need of larger reticles, the move to the 230 mm X 230 mm reticle size will provide size will provide unique challenges to both the mask equipment manufacturers and mask fabricator. Next Generation Lithography together with their mask techniques are in development and try to come into the market.

Computational study on UV curing characteristics in nanoimprint lithography: Stochastic simulation

NASA Astrophysics Data System (ADS)

Koyama, Masanori; Shirai, Masamitsu; Kawata, Hiroaki; Hirai, Yoshihiko; Yasuda, Masaaki

2017-06-01

A computational simulation model of UV curing in nanoimprint lithography based on a simplified stochastic approach is proposed. The activated unit reacts with a randomly selected monomer within a critical reaction radius. Cluster units are chained to each other. Then, another monomer is activated and the next chain reaction occurs. This process is repeated until a virgin monomer disappears within the reaction radius or until the activated monomers react with each other. The simulation model well describes the basic UV curing characteristics, such as the molecular weight distributions of the reacted monomers and the effect of the initiator concentration on the conversion ratio. The effects of film thickness on UV curing characteristics are also studied by the simulation.

Fabrication of flexible oriented magnetic thin films with large in-plane uniaxial anisotropy by roll-to-roll nanoimprint lithography

NASA Astrophysics Data System (ADS)

Thantirige, Rukshan M.; John, Jacob; Pradhan, Nihar R.; Carter, Kenneth R.; Tuominen, Mark T.

2016-06-01

Here, we report wafer scale fabrication of densely packed Fe nanostripe-based magnetic thin films on a flexible substrate and their magnetic anisotropy properties. We find that Fe nanostripes exhibit large in-plane uniaxial anisotropy and nearly square hysteresis loops with energy products (BHmax) exceeding 3 MGOe at room temperature. High density Fe nanostripes were fabricated on 70 nm flexible polyethylene terephthalate (PET) gratings, which were made by a roll-to-roll (R2R) UV nanoimprint lithography technique. We observed large in-plane uniaxial anisotropies along the long dimension of nanostripes that can be attributed to the shape. Temperature dependent hysteresis measurements confirm that the magnetization reversal is driven by non-coherent rotation reversal processes.

Fabrication of Tunnel Junctions For Direct Detector Arrays With Single-Electron Transistor Readout Using Electron-Beam Lithography

NASA Technical Reports Server (NTRS)

Stevenson, T. R.; Hsieh, W.-T.; Li, M. J.; Stahle, C. M.; Rhee, K. W.; Teufel, J.; Schoelkopf, R. J.

2002-01-01

This paper will describe the fabrication of small aluminum tunnel junctions for applications in astronomy. Antenna-coupled superconducting tunnel junctions with integrated single-electron transistor readout have the potential for photon-counting sensitivity at sub-millimeter wavelengths. The junctions for the detector and single-electron transistor can be made with electron-beam lithography and a standard self-aligned double-angle deposition process. However, high yield and uniformity of the junctions is required for large-format detector arrays. This paper will describe how measurement and modification of the sensitivity ratio in the resist bilayer was used to greatly improve the reliability of forming devices with uniform, sub-micron size, low-leakage junctions.

High resolution imaging and lithography with hard x rays using parabolic compound refractive lenses

NASA Astrophysics Data System (ADS)

Schroer, C. G.; Benner, B.; Günzler, T. F.; Kuhlmann, M.; Zimprich, C.; Lengeler, B.; Rau, C.; Weitkamp, T.; Snigirev, A.; Snigireva, I.; Appenzeller, J.

2002-03-01

Parabolic compound refractive lenses are high quality optical components for hard x rays. They are particularly suited for full field imaging, with applications in microscopy and x-ray lithography. Taking advantage of the large penetration depth of hard x rays, the interior of opaque samples can be imaged with submicrometer resolution. To obtain the three-dimensional structure of a sample, microscopy is combined with tomographic techniques. In a first hard x-ray lithography experiment, parabolic compound refractive lenses have been used to project the reduced image of a lithography mask onto a resist. Future developments are discussed.

Amine control for DUV lithography: identifying hidden sources

NASA Astrophysics Data System (ADS)

Kishkovich, Oleg P.; Larson, Carl E.

2000-06-01

The impact of airborne basic molecular contamination (MB) on the performance of chemically amplified (CA) resist systems has been a long standing problem. Low ppb levels of MB may be sufficient for robust 0.25 micrometer lithography with today's advanced CA resist systems combined with adequate chemical air filtration. However, with minimum CD targets heading below 150 nm, the introduction of new resist chemistries for Next Generation Lithography, and the trend towards thinner resists, the impact of MB at low and sub-ppb levels again becomes a critical manufacturing issue. Maximizing process control at aggressive feature sizes requires that the level of MB be maintained below a certain limit, which depends on such parameters as the sensitivity of the CA resist, the type of production tools, product mix, and process characteristics. Three approaches have been identified to reduce the susceptibility of CA resists to MB: effective chemical air filtration, modifications to resist chemistry/processing and cleanroom protocols involving MB monitoring and removal of MB sources from the fab. The final MB concentration depends on the effectiveness of filtration resources and on the total pollution originating from different sources in and out of the cleanroom. There are many well-documented sources of MB. Among these are: ambient air; polluted exhaust from other manufacturing areas re-entering the cleanroom through make-up air handlers; manufacturing process chemicals containing volatile molecular bases; certain cleanroom construction materials, such as paint and ceiling tiles; and volatile, humidifier system boiler additives (corrosion inhibitors), such as morpholine, cyclohexylamine, and dimethylaminoethanol. However, there is also an indeterminate number of other 'hidden' pollution sources, which are neither obvious nor well-documented. None of these sources are new, but they had little impact on earlier semiconductor manufacturing processes because the contamination levels are low enough that they were tolerable. The purpose of this article is to investigate some of these frequently overlooked sources of basic molecular contamination and to thereby increase the reader's awareness of their potential risks.

Design and fabrication of nano-imprint templates using unique pattern transforms and primitives

NASA Astrophysics Data System (ADS)

MacDonald, Susan; Mellenthin, David; Rentzsch, Kevin; Kramer, Kenneth; Ellenson, James; Hostetler, Tim; Enck, Ron

2005-11-01

Increasing numbers of MEMS, photonic, and integrated circuit manufacturers are investigating the use of Nano-imprint Lithography or Step and Flash Imprint Lithography (SFIL) as a lithography choice for making various devices and products. Their main interests in using these technologies are the lack of aberrations inherent in traditional optical reduction lithography, and the relative low cost of imprint tools. Since imprint templates are at 1X scale, the small sizes of these structures have necessitated the use of high-resolution 50KeV, and 100KeV e-beam lithography tools to build these templates. For MEMS and photonic applications, the structures desired are often circles, arches, and other non-orthogonal shapes. It has long been known that both 50keV, and especially 100keV e-beam lithography tools are extremely accurate, and can produce very high resolution structures, but the trade off is long write times. The main drivers in write time are shot count and stage travel. This work will show how circles and other non-orthogonal shapes can be produced with a 50KeV Variable Shaped Beam (VSB) e-beam lithography system using unique pattern transforms and primitive shapes, while keeping the shot count and write times under control. The quality of shapes replicated into the resist on wafer using an SFIL tool will also be presented.

EUV multilayer defect compensation (MDC) by absorber pattern modification: from theory to wafer validation

NASA Astrophysics Data System (ADS)

Pang, Linyong; Hu, Peter; Satake, Masaki; Tolani, Vikram; Peng, Danping; Li, Ying; Chen, Dongxue

2011-11-01

According to the ITRS roadmap, mask defects are among the top technical challenges to introduce extreme ultraviolet (EUV) lithography into production. Making a multilayer defect-free extreme ultraviolet (EUV) blank is not possible today, and is unlikely to happen in the next few years. This means that EUV must work with multilayer defects present on the mask. The method proposed by Luminescent is to compensate effects of multilayer defects on images by modifying the absorber patterns. The effect of a multilayer defect is to distort the images of adjacent absorber patterns. Although the defect cannot be repaired, the images may be restored to their desired targets by changing the absorber patterns. This method was first introduced in our paper at BACUS 2010, which described a simple pixel-based compensation algorithm using a fast multilayer model. The fast model made it possible to complete the compensation calculations in seconds, instead of days or weeks required for rigorous Finite Domain Time Difference (FDTD) simulations. Our SPIE 2011 paper introduced an advanced compensation algorithm using the Level Set Method for 2D absorber patterns. In this paper the method is extended to consider process window, and allow repair tool constraints, such as permitting etching but not deposition. The multilayer defect growth model is also enhanced so that the multilayer defect can be "inverted", or recovered from the top layer profile using a calibrated model.

High Density Metamaterials for Visible Light

DTIC Science & Technology

2016-11-28

gold first and then extend the techniques to other metals for better characteristics. Bio -chemical sensors will be developed based on different split...metamaterials for Bio -chemical sensing. Using our sonicated cold development electron beam lithography process that has recently been shown to overcome

EUV patterning using CAR or MOX photoresist at low dose exposure for sub 36nm pitch

NASA Astrophysics Data System (ADS)

Thibaut, Sophie; Raley, Angélique; Lazarrino, Frederic; Mao, Ming; De Simone, Danilo; Piumi, Daniele; Barla, Kathy; Ko, Akiteru; Metz, Andrew; Kumar, Kaushik; Biolsi, Peter

2018-04-01

The semiconductor industry has been pushing the limits of scalability by combining 193nm immersion lithography with multi-patterning techniques for several years. Those integrations have been declined in a wide variety of options to lower their cost but retain their inherent variability and process complexity. EUV lithography offers a much desired path that allows for direct print of line and space at 36nm pitch and below and effectively addresses issues like cycle time, intra-level overlay and mask count costs associated with multi-patterning. However it also brings its own sets of challenges. One of the major barrier to high volume manufacturing implementation has been hitting the 250W power exposure required for adequate throughput [1]. Enabling patterning using a lower dose resist could help move us closer to the HVM throughput targets assuming required performance for roughness and pattern transfer can be met. As plasma etching is known to reduce line edge roughness on 193nm lithography printed features [2], we investigate in this paper the level of roughness that can be achieved on EUV photoresist exposed at a lower dose through etch process optimization into a typical back end of line film stack. We will study 16nm lines printed at 32 and 34nm pitch. MOX and CAR photoresist performance will be compared. We will review step by step etch chemistry development to reach adequate selectivity and roughness reduction to successfully pattern the target layer.

The impact of 14-nm photomask uncertainties on computational lithography solutions

NASA Astrophysics Data System (ADS)

Sturtevant, John; Tejnil, Edita; Lin, Tim; Schultze, Steffen; Buck, Peter; Kalk, Franklin; Nakagawa, Kent; Ning, Guoxiang; Ackmann, Paul; Gans, Fritz; Buergel, Christian

2013-04-01

Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, which must balance accuracy demands with simulation runtime boundary conditions, rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. While certain system input variables, such as scanner numerical aperture, can be empirically tuned to wafer CD data over a small range around the presumed set point, it can be dangerous to do so since CD errors can alias across multiple input variables. Therefore, many input variables for simulation are based upon designed or recipe-requested values or independent measurements. It is known, however, that certain measurement methodologies, while precise, can have significant inaccuracies. Additionally, there are known errors associated with the representation of certain system parameters. With shrinking total CD control budgets, appropriate accounting for all sources of error becomes more important, and the cumulative consequence of input errors to the computational lithography model can become significant. In this work, we examine with a simulation sensitivity study, the impact of errors in the representation of photomask properties including CD bias, corner rounding, refractive index, thickness, and sidewall angle. The factors that are most critical to be accurately represented in the model are cataloged. CD Bias values are based on state of the art mask manufacturing data and other variables changes are speculated, highlighting the need for improved metrology and awareness.

Model-based virtual VSB mask writer verification for efficient mask error checking and optimization prior to MDP

NASA Astrophysics Data System (ADS)

Pack, Robert C.; Standiford, Keith; Lukanc, Todd; Ning, Guo Xiang; Verma, Piyush; Batarseh, Fadi; Chua, Gek Soon; Fujimura, Akira; Pang, Linyong

2014-10-01

A methodology is described wherein a calibrated model-based `Virtual' Variable Shaped Beam (VSB) mask writer process simulator is used to accurately verify complex Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) mask designs prior to Mask Data Preparation (MDP) and mask fabrication. This type of verification addresses physical effects which occur in mask writing that may impact lithographic printing fidelity and variability. The work described here is motivated by requirements for extreme accuracy and control of variations for today's most demanding IC products. These extreme demands necessitate careful and detailed analysis of all potential sources of uncompensated error or variation and extreme control of these at each stage of the integrated OPC/ MDP/ Mask/ silicon lithography flow. The important potential sources of variation we focus on here originate on the basis of VSB mask writer physics and other errors inherent in the mask writing process. The deposited electron beam dose distribution may be examined in a manner similar to optical lithography aerial image analysis and image edge log-slope analysis. This approach enables one to catch, grade, and mitigate problems early and thus reduce the likelihood for costly long-loop iterations between OPC, MDP, and wafer fabrication flows. It moreover describes how to detect regions of a layout or mask where hotspots may occur or where the robustness to intrinsic variations may be improved by modification to the OPC, choice of mask technology, or by judicious design of VSB shots and dose assignment.

Ion beam deposition system for depositing low defect density extreme ultraviolet mask blanks

NASA Astrophysics Data System (ADS)

Jindal, V.; Kearney, P.; Sohn, J.; Harris-Jones, J.; John, A.; Godwin, M.; Antohe, A.; Teki, R.; Ma, A.; Goodwin, F.; Weaver, A.; Teora, P.

2012-03-01

Extreme ultraviolet lithography (EUVL) is the leading next-generation lithography (NGL) technology to succeed optical lithography at the 22 nm node and beyond. EUVL requires a low defect density reflective mask blank, which is considered to be one of the top two critical technology gaps for commercialization of the technology. At the SEMATECH Mask Blank Development Center (MBDC), research on defect reduction in EUV mask blanks is being pursued using the Veeco Nexus deposition tool. The defect performance of this tool is one of the factors limiting the availability of defect-free EUVL mask blanks. SEMATECH identified the key components in the ion beam deposition system that is currently impeding the reduction of defect density and the yield of EUV mask blanks. SEMATECH's current research is focused on in-house tool components to reduce their contributions to mask blank defects. SEMATECH is also working closely with the supplier to incorporate this learning into a next-generation deposition tool. This paper will describe requirements for the next-generation tool that are essential to realize low defect density EUV mask blanks. The goal of our work is to enable model-based predictions of defect performance and defect improvement for targeted process improvement and component learning to feed into the new deposition tool design. This paper will also highlight the defect reduction resulting from process improvements and the restrictions inherent in the current tool geometry and components that are an impediment to meeting HVM quality EUV mask blanks will be outlined.

Step-and-Repeat Nanoimprint-, Photo- and Laser Lithography from One Customised CNC Machine.

PubMed

Greer, Andrew Im; Della-Rosa, Benoit; Khokhar, Ali Z; Gadegaard, Nikolaj

2016-12-01

The conversion of a computer numerical control machine into a nanoimprint step-and-repeat tool with additional laser- and photolithography capacity is documented here. All three processes, each demonstrated on a variety of photoresists, are performed successfully and analysed so as to enable the reader to relate their known lithography process(es) to the findings. Using the converted tool, 1 cm(2) of nanopattern may be exposed in 6 s, over 3300 times faster than the electron beam equivalent. Nanoimprint tools are commercially available, but these can cost around 1000 times more than this customised computer numerical control (CNC) machine. The converted equipment facilitates rapid production and large area micro- and nanoscale research on small grants, ultimately enabling faster and more diverse growth in this field of science. In comparison to commercial tools, this converted CNC also boasts capacity to handle larger substrates, temperature control and active force control, up to ten times more curing dose and compactness. Actual devices are fabricated using the machine including an expanded nanotopographic array and microfluidic PDMS Y-channel mixers.

Advancing three-dimensional MEMS by complimentary laser micro manufacturing

NASA Astrophysics Data System (ADS)

Palmer, Jeremy A.; Williams, John D.; Lemp, Tom; Lehecka, Tom M.; Medina, Francisco; Wicker, Ryan B.

2006-01-01

This paper describes improvements that enable engineers to create three-dimensional MEMS in a variety of materials. It also provides a means for selectively adding three-dimensional, high aspect ratio features to pre-existing PMMA micro molds for subsequent LIGA processing. This complimentary method involves in situ construction of three-dimensional micro molds in a stand-alone configuration or directly adjacent to features formed by x-ray lithography. Three-dimensional micro molds are created by micro stereolithography (MSL), an additive rapid prototyping technology. Alternatively, three-dimensional features may be added by direct femtosecond laser micro machining. Parameters for optimal femtosecond laser micro machining of PMMA at 800 nanometers are presented. The technical discussion also includes strategies for enhancements in the context of material selection and post-process surface finish. This approach may lead to practical, cost-effective 3-D MEMS with the surface finish and throughput advantages of x-ray lithography. Accurate three-dimensional metal microstructures are demonstrated. Challenges remain in process planning for micro stereolithography and development of buried features following femtosecond laser micro machining.

Step-and-Repeat Nanoimprint-, Photo- and Laser Lithography from One Customised CNC Machine

NASA Astrophysics Data System (ADS)

Greer, Andrew IM; Della-Rosa, Benoit; Khokhar, Ali Z.; Gadegaard, Nikolaj

2016-03-01

The conversion of a computer numerical control machine into a nanoimprint step-and-repeat tool with additional laser- and photolithography capacity is documented here. All three processes, each demonstrated on a variety of photoresists, are performed successfully and analysed so as to enable the reader to relate their known lithography process(es) to the findings. Using the converted tool, 1 cm2 of nanopattern may be exposed in 6 s, over 3300 times faster than the electron beam equivalent. Nanoimprint tools are commercially available, but these can cost around 1000 times more than this customised computer numerical control (CNC) machine. The converted equipment facilitates rapid production and large area micro- and nanoscale research on small grants, ultimately enabling faster and more diverse growth in this field of science. In comparison to commercial tools, this converted CNC also boasts capacity to handle larger substrates, temperature control and active force control, up to ten times more curing dose and compactness. Actual devices are fabricated using the machine including an expanded nanotopographic array and microfluidic PDMS Y-channel mixers.

Comparison of line shortening assessed by aerial image and wafer measurements

NASA Astrophysics Data System (ADS)

Ziegler, Wolfram; Pforr, Rainer; Thiele, Joerg; Maurer, Wilhelm

1997-02-01

Increasing number of patterns per area and decreasing linewidth demand enhancement technologies for optical lithography. OPC, the correction of systematic non-linearity in the pattern transfer process by correction of design data is one possibility to tighten process control and to increase the lifetime of existing lithographic equipment. The two most prominent proximity effects to be corrected by OPC are CD variation and line shortening. Line shortening measured on a wafer is up to 2 times larger than full resist simulation results. Therefore, the influence of mask geometry to line shortening is a key item to parameterize lithography. The following paper discusses the effect of adding small serifs to line ends with 0.25 micrometer ground-rule design. For reticles produced on an ALTA 3000 with standard wet etch process, the corner rounding on them mask can be reduced by adding serifs of a certain size. The corner rounding was measured and the effect on line shortening on the wafer is determined. This was investigated by resist measurements on wafer, aerial image plus resist simulation and aerial image measurements on the AIMS microscope.

Science& Technology Review October 2003

DOE Office of Scientific and Technical Information (OSTI.GOV)

McMahon, D H

2003-10-01

The October 2003 issue of Science & Technology Review consists of the following articles: (1) Award-Winning Technologies from Collaborative Efforts--Commentary by Hal Graboske; (2) BASIS Counters Airborne Bioterrorism--The Biological Aerosol Sentry and Information System is the first integrated biodefense system; (3) In the Chips for the Coming Decade--A new system is the first full-field lithography tool for use at extreme ultraviolet wavelengths; (4) Smoothing the Way to Print the Next Generation of Computer Chips--With ion-beam thin-film planarization, the reticles and projection optics made for extreme ultraviolet lithography are nearly defect-free; (5) Eyes Can See Clearly Now--The MEMS-based adaptive optics phoroptermore » improves the process of measuring and correcting eyesight aberrations; (6) This Switch Takes the Heat--A thermally compensated Q-switch reduces the light leakage on high-average-power lasers; (7) Laser Process Forms Thick, Curved Metal Parts--A new process shapes parts to exact specifications, improving their resistance to fatigue and corrosion cracking; and (8) Characterizing Tiny Objects without Damaging Them--Livermore researchers are developing nondestructive techniques to probe the Lilliputian world of mesoscale objects.« less

Cracking-assisted fabrication of nanoscale patterns for micro/nanotechnological applications

NASA Astrophysics Data System (ADS)

Kim, Minseok; Kim, Dong-Joo; Ha, Dogyeong; Kim, Taesung

2016-05-01

Cracks are frequently observed in daily life, but they are rarely welcome and are considered as a material failure mode. Interestingly, cracks cause critical problems in various micro/nanofabrication processes such as colloidal assembly, thin film deposition, and even standard photolithography because they are hard to avoid or control. However, increasing attention has been given recently to control and use cracks as a facile, low-cost strategy for producing highly ordered nanopatterns. Specifically, cracking is the breakage of molecular bonds and occurs simultaneously over a large area, enabling fabrication of nanoscale patterns at both high resolution and high throughput, which are difficult to obtain simultaneously using conventional nanofabrication techniques. In this review, we discuss various cracking-assisted nanofabrication techniques, referred to as crack lithography, and summarize the fabrication principles, procedures, and characteristics of the crack patterns such as their position, direction, and dimensions. First, we categorize crack lithography techniques into three technical development levels according to the directional freedom of the crack patterns: randomly oriented, unidirectional, or multidirectional. Then, we describe a wide range of novel practical devices fabricated by crack lithography, including bioassay platforms, nanofluidic devices, nanowire sensors, and even biomimetic mechanosensors.

Studying electron-PAG interactions using electron-induced fluorescence

NASA Astrophysics Data System (ADS)

Narasimhan, Amrit; Grzeskowiak, Steven; Ostrander, Jonathan; Schad, Jonathon; Rebeyev, Eliran; Neisser, Mark; Ocola, Leonidas E.; Denbeaux, Gregory; Brainard, Robert L.

2016-03-01

In extreme ultraviolet (EUV) lithography, 92 eV photons are used to expose photoresists. Typical EUV resists are organic-based and chemically amplified using photoacid generators (PAGs). Upon exposure, PAGs produce acids which catalyze reactions that result in changes in solubility. In EUV lithography, photo- and secondary electrons (energies of 10- 80 eV) play a large role in PAG acid-production. Several mechanisms for electron-PAG interactions (e.g. electron trapping, and hole-initiated chemistry) have been proposed. The aim of this study is to explore another mechanism - internal excitation - in which a bound PAG electron can be excited by receiving energy from another energetic electron, causing a reaction that produces acid. This paper explores the mechanism of internal excitation through the analogous process of electron-induced fluorescence, in which an electron loses energy by transferring that energy to a molecule and that molecule emits a photon rather than decomposing. We will show and quantify electron-induced fluorescence of several fluorophores in polymer films to mimic resist materials, and use this information to refine our proposed mechanism. Relationships between the molecular structure of fluorophores and fluorescent quantum yield may aid in the development of novel PAGs for EUV lithography.

Fabrication of biomimetic dry-adhesion structures through nanosphere lithography

NASA Astrophysics Data System (ADS)

Kuo, P. C.; Chang, N. W.; Suen, Y.; Yang, S. Y.

2018-03-01

Components with surface nanostructures suitable for biomimetic dry adhesion have a great potential in applications such as gecko tape, climbing robots, and skin patches. In this study, a nanosphere lithography technique with self-assembly nanospheres was developed to achieve effective and efficient fabrication of dry-adhesion structures. Self-assembled monolayer nanospheres with high regularity were obtained through tilted dip-coating. Reactive-ion etching of the self-assembled nanospheres was used to fabricate nanostructures of different shapes and aspect ratios by varying the etching time. Thereafter, nickel molds with inverse nanostructures were replicated using the electroforming process. Polydimethylsiloxane (PDMS) nanostructures were fabricated through a gas-assisted hot-embossing method. The pulling test was performed to measure the shear adhesion on the glass substrate of a sample, and the static contact angle was measured to verify the hydrophobic property of the structure. The enhancement of the structure indicates that the adhesion force increased from 1.2 to 4.05 N/cm2 and the contact angle increased from 118.6° to 135.2°. This columnar structure can effectively enhance the adhesion ability of PDMS, demonstrating the potential of using nanosphere lithography for the fabrication of adhesive structures.

Status of EUVL mask development in Europe (Invited Paper)

NASA Astrophysics Data System (ADS)

Peters, Jan H.

2005-06-01

EUV lithography is the prime candidate for the next generation lithography technology after 193 nm immersion lithography. The commercial onset for this technology is expected for the 45 nm half-pitch technology or below. Several European and national projects and quite a large number of companies and research institutions in Europe work on various aspects of the technological challenges to make EUV a commercially viable technology in the not so far future. Here the development of EUV sources, the development of an EUV exposure tools, metrology tools dedicated for characterization of mask, the production of EUV mask blanks and the mask structuring itself are the key areas in which major activities can be found. In this talk we will primarily focus on those activities, which are related to establish an EUV mask supply chain with all its ingredients from substrate production, polishing, deposition of EUV layers, blank characterization, mask patterning process and the consecutive metrology and defect inspection as well as shipping and handling from blank supply to usage in the wafer fab. The EUV mask related projects on the national level are primarily supported by the French Ministry of Economics and Finance (MinEFi) and the German Ministry of Education and Research (BMBF).

Three techniques for the fabrication of high precision, mm-sized metal components based on two-photon lithography, applied for manufacturing horn antennas for THz transceivers

NASA Astrophysics Data System (ADS)

Standaert, Alexander; Brancato, Luigi; Lips, Bram; Ceyssens, Frederik; Puers, Robert; Reynaert, Patrick

2018-03-01

This paper proposes a novel packaging solution which integrates micro-machined 3D horn antennas with millimeter-wave and THz tranceivers. This packaging solution is shown to be a valid competitor to existing technologies like metallic split-block waveguides and low temperature cofired ceramics. Three different fabrication methods based on two-photon lithography are presented to form the horn antennas. The first uses two-photon lithography to form the bulk of the antenna. This structure is then metalised through physical vapor deposition (PVD) and copper plating. The second fabrication method makes use of a soft polydimethylsiloxane (PDMS) mold to easily replicate structures and the third method forms the horn antenna through electroforming. A prototype is accurately positioned on top of a 400 GHz 28 nm CMOS transmitter and glued in place with epoxy, thus providing a fully packaged solution. Measurement results show a 12 dB increase in the antenna gain when using the packaged solution. The fabrication processes are not limited to horn antennas alone and can be used to form a wide range of mm-sized metal components.

Registration performance on EUV masks using high-resolution registration metrology

NASA Astrophysics Data System (ADS)

Steinert, Steffen; Solowan, Hans-Michael; Park, Jinback; Han, Hakseung; Beyer, Dirk; Scherübl, Thomas

2016-10-01

Next-generation lithography based on EUV continues to move forward to high-volume manufacturing. Given the technical challenges and the throughput concerns a hybrid approach with 193 nm immersion lithography is expected, at least in the initial state. Due to the increasing complexity at smaller nodes a multitude of different masks, both DUV (193 nm) and EUV (13.5 nm) reticles, will then be required in the lithography process-flow. The individual registration of each mask and the resulting overlay error are of crucial importance in order to ensure proper functionality of the chips. While registration and overlay metrology on DUV masks has been the standard for decades, this has yet to be demonstrated on EUV masks. Past generations of mask registration tools were not necessarily limited in their tool stability, but in their resolution capabilities. The scope of this work is an image placement investigation of high-end EUV masks together with a registration and resolution performance qualification. For this we employ a new generation registration metrology system embedded in a production environment for full-spec EUV masks. This paper presents excellent registration performance not only on standard overlay markers but also on more sophisticated e-beam calibration patterns.

Fabrication of nanochannels on polyimide films using dynamic plowing lithography

NASA Astrophysics Data System (ADS)

Stoica, Iuliana; Barzic, Andreea Irina; Hulubei, Camelia

2017-12-01

Three distinct polyimide films were analyzed from the point of view of their morphology in order to determine if their surface features can be adapted for applications where surface anisotropy is mandatory. Channels of nanometric dimensions were created on surface of the specimens by using a less common atomic force microscopy (AFM) method, namely Dynamic Plowing Lithography (DPL). The changes generated by DPL procedure were monitored through the surface texture and other functional parameters, denoting the surface orientation degree and also bearing and fluid retention properties. The results revealed that in the same nanolithography conditions, the diamine and dianhydride moieties have affected the characteristics of the nanochannels. This was explained based on the aliphatic/aromatic nature of the monomers and the backbone flexibility. The reported data are of great importance in designing custom nanostructures with enhanced anisotropy on surface of polyimide films for liquid crystal orientation or guided cell growth purposes. At the end, to track the effect of the nanolithography process on the tip sharpness, degradation and contamination, the blind tip reconstruction was performed on AFM probe, before and after lithography experiments, using TGT1 test grating AFM image.

Conformal ALON® and spinel windows

NASA Astrophysics Data System (ADS)

Goldman, Lee M.; Smith, Mark; Ramisetty, Mohan; Jha, Santosh; Sastri, Suri

2017-05-01

The requirements for modern aircraft based reconnaissance systems are driving the need for conformal windows for future sensor systems. However, limitations on optical systems and the ability to produce windows in complex geometries currently limit the geometry of existing windows and window assemblies to faceted assemblies of flat windows. ALON consists primarily of aluminum and oxygen, similar to that of alumina, with a small amount of nitrogen added to help stabilize the cubic gamma-AlON phase. ALON's chemical similarity to alumina, translates into a robust manufacturing process. This ease of processing has allowed Surmet to produce ALON windows and domes in a wide variety of geometries and sizes. Spinel (MgAl2O4) contains equal molar amounts of MgO and Al2O3, and is a cubic material, that transmits further into the Infrared than ALON. Spinel is produced via powder processing techniques similar to those used to produce ALON. Surmet is now applying the lessons learned with ALON to produce conformal spinel windows and domes as well.

Defect reduction for semiconductor memory applications using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ye, Zhengmao; Luo, Kang; Irving, J. W.; Lu, Xiaoming; Zhang, Wei; Fletcher, Brian; Liu, Weijun; Xu, Frank; LaBrake, Dwayne; Resnick, Douglas; Sreenivasan, S. V.

2013-03-01

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned resist on the substrate. Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the defect specifications of high end memory devices. Typical defectivity targets are on the order of 0.10/cm2. In previous studies, we have focused on defects such as random non-fill defects occurring during the resist filling process and repeater defects caused by interactions with particles on the substrate. In this work, we attempted to identify the critical imprint defect types using a mask with NAND Flash-like patterns at dimensions as small as 26nm. The two key defect types identified were line break defects induced by small particulates and airborne contaminants which result in local adhesion failure. After identification, the root cause of the defect was determined, and corrective measures were taken to either eliminate or reduce the defect source. As a result, we have been able to reduce defectivity levels by more than three orders of magnitude in only 12 months and are now achieving defectivity adders as small as 2 adders per lot of wafers.

Design of the ultraprecision stage for lithography using VCM

NASA Astrophysics Data System (ADS)

Kim, Jung-Han; Kim, Mun-Su; Oh, Min-Taek

2007-12-01

This paper presents a new design of precision stage for the reticle in lithography process and a low hunting control method for the stage. The stage has three axes for X,Y, θ Z, those actuated by three voice coil motors individually. The proposed precision stage system has three gap sensors and voice coil motors, and supported by four air bearings, so it do not have any mechanical contact and nonlinear effect such as hysterisis which usually degrade performance in nano level movement. The reticle stage has cross coupled dynamics between X,Y,θ Z, axes, so the forward and inverse kinematics were solved to get an accurate reference position. When the stage is in regulating control mode, there always exist small fluctuations (stage hunting) in the stage movement. Because the low stage hunting characteristic is very important in recent lithography and nano-level applications, the proposed stage has a special regulating controller composed of digital filter, adjustor and switching algorithm. Another importance factor that generates hunting noise is the system noise inside the lithography machine such as EMI from another motor and solenoids. For reducing such system noises, the proposed controller has a two-port transmission system that transfers torque command signal from the DSP board to the amplifier. The low hunting control algorithm and two-port transmission system reduced hunting noise as 35nm(rms) when a conventional PID generates 77nm(rms) in the same mechanical system. The experimental results showed that the reticle system has 100nm linear accuracy and 1μ rad rotation accuracy at the control frequency of 8 kHz.

Computational approach on PEB process in EUV resist: multi-scale simulation

NASA Astrophysics Data System (ADS)

Kim, Muyoung; Moon, Junghwan; Choi, Joonmyung; Lee, Byunghoon; Jeong, Changyoung; Kim, Heebom; Cho, Maenghyo

2017-03-01

For decades, downsizing has been a key issue for high performance and low cost of semiconductor, and extreme ultraviolet lithography is one of the promising candidates to achieve the goal. As a predominant process in extreme ultraviolet lithography on determining resolution and sensitivity, post exposure bake has been mainly studied by experimental groups, but development of its photoresist is at the breaking point because of the lack of unveiled mechanism during the process. Herein, we provide theoretical approach to investigate underlying mechanism on the post exposure bake process in chemically amplified resist, and it covers three important reactions during the process: acid generation by photo-acid generator dissociation, acid diffusion, and deprotection. Density functional theory calculation (quantum mechanical simulation) was conducted to quantitatively predict activation energy and probability of the chemical reactions, and they were applied to molecular dynamics simulation for constructing reliable computational model. Then, overall chemical reactions were simulated in the molecular dynamics unit cell, and final configuration of the photoresist was used to predict the line edge roughness. The presented multiscale model unifies the phenomena of both quantum and atomic scales during the post exposure bake process, and it will be helpful to understand critical factors affecting the performance of the resulting photoresist and design the next-generation material.

Advances in deep-UV processing using cluster tools

NASA Astrophysics Data System (ADS)

Escher, Gary C.; Tepolt, Gary; Mohondro, Robert D.

1993-09-01

Deep-UV laser lithography has shown the capability of supporting the manufacture of multiple generations of integrated circuits (ICs) due to its wide process latitude and depth of focus (DOF) for 0.2 micrometers to 0.5 micrometers feature sizes. This capability has been attained through improvements in deep-UV wide field lens technology, excimer lasers, steppers and chemically amplified, positive deep-UV resists. Chemically amplified deep-UV resists are required for 248 nm lithography due to the poor absorption and sensitivity of conventional novolac resists. The acid catalyzation processes of the new resists requires control of the thermal history and environmental conditions of the lithographic process. Work is currently underway at several resist vendors to reduce the need for these controls, but practical manufacturing solutions exist today. One of these solutions is the integration of steppers and resist tracks into a `cluster tool' or `Lithocell' to insure a consistent thermal profile for the resist process and reduce the time the resist is exposed to atmospheric contamination. The work here reports processing and system integration results with a Machine Technology, Inc (MTI) post-exposure bake (PEB) track interfaced with an advanced GCA XLS 7800 deep-UV stepper [31 mm diameter, variable NA (0.35 - 0.53) and variable sigma (0.3 - 0.74)].

Improving 130nm node patterning using inverse lithography techniques for an analog process

NASA Astrophysics Data System (ADS)

Duan, Can; Jessen, Scott; Ziger, David; Watanabe, Mizuki; Prins, Steve; Ho, Chi-Chien; Shu, Jing

2018-03-01

Developing a new lithographic process routinely involves usage of lithographic toolsets and much engineering time to perform data analysis. Process transfers between fabs occur quite often. One of the key assumptions made is that lithographic settings are equivalent from one fab to another and that the transfer is fluid. In some cases, that is far from the truth. Differences in tools can change the proximity effect seen in low k1 imaging processes. If you use model based optical proximity correction (MBOPC), then a model built in one fab will not work under the same conditions at another fab. This results in many wafers being patterned to try and match a baseline response. Even if matching is achieved, there is no guarantee that optimal lithographic responses are met. In this paper, we discuss the approach used to transfer and develop new lithographic processes and define MBOPC builds for the new lithographic process in Fab B which was transferred from a similar lithographic process in Fab A. By using PROLITHTM simulations to match OPC models for each level, minimal downtime in wafer processing was observed. Source Mask Optimization (SMO) was also used to optimize lithographic processes using novel inverse lithography techniques (ILT) to simultaneously optimize mask bias, depth of focus (DOF), exposure latitude (EL) and mask error enhancement factor (MEEF) for critical designs for each level.

Consideration of correlativity between litho and etching shape

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Mito, Hiroaki; Shinoda, Shinichi; Toyoda, Yasutaka

2012-03-01

We developed an effective method for evaluating the correlation of shape of Litho and Etching pattern. The purpose of this method, makes the relations of the shape after that is the etching pattern an index in wafer same as a pattern shape on wafer made by a lithography process. Therefore, this method measures the characteristic of the shape of the wafer pattern by the lithography process and can predict the hotspot pattern shape by the etching process. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used wafer CD-SEM. Currently, as semiconductor manufacture moves towards even smaller feature size, this necessitates more aggressive optical proximity correction (OPC) to drive the super-resolution technology (RET). In other words, there is a trade-off between highly precise RET and lithography management, and this has a big impact on the semiconductor market that centers on the semiconductor business. 2-dimensional shape of wafer quantification is important as optimal solution over these problems. Although 1-dimensional shape measurement has been performed by the conventional technique, 2-dimensional shape management is needed in the mass production line under the influence of RET. We developed the technique of analyzing distribution of shape edge performance as the shape management technique. In this study, we conducted experiments for correlation method of the pattern (Measurement Based Contouring) as two-dimensional litho and etch evaluation technique. That is, observation of the identical position of a litho and etch was considered. It is possible to analyze variability of the edge of the same position with high precision.

A comprehensive simulation model of the performance of photochromic films in absorbance-modulation-optical-lithography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Majumder, Apratim; Helms, Phillip L.; Menon, Rajesh, E-mail: rmenon@eng.utah.edu

2016-03-15

Optical lithography is the most prevalent method of fabricating micro-and nano-scale structures in the semiconductor industry due to the fact that patterning using photons is fast, accurate and provides high throughput. However, the resolution of this technique is inherently limited by the physical phenomenon of diffraction. Absorbance-Modulation-Optical Lithography (AMOL), a recently developed technique has been successfully demonstrated to be able to circumvent this diffraction limit. AMOL employs a dual-wavelength exposure system in conjunction with spectrally selective reversible photo-transitions in thin films of photochromic molecules to achieve patterning of features with sizes beyond the far-field diffraction limit. We have developed amore » finite-element-method based full-electromagnetic-wave solution model that simulates the photo-chemical processes that occur within the thin film of the photochromic molecules under illumination by the exposure and confining wavelengths in AMOL. This model allows us to understand how the material characteristics influence the confinement to sub-diffraction dimensions, of the transmitted point spread function (PSF) of the exposure wavelength inside the recording medium. The model reported here provides the most comprehensive analysis of the AMOL process to-date, and the results show that the most important factors that govern the process, are the polarization of the two beams, the ratio of the intensities of the two wavelengths, the relative absorption coefficients and the concentration of the photochromic species, the thickness of the photochromic layer and the quantum yields of the photoreactions at the two wavelengths. The aim of this work is to elucidate the requirements of AMOL in successfully circumventing the far-field diffraction limit.« less

A study on EUV reticle surface molecular contamination under different storage conditions in a HVM foundry fab

NASA Astrophysics Data System (ADS)

Singh, SherJang; Yatzor, Brett; Taylor, Ron; Wood, Obert; Mangat, Pawitter

2017-03-01

The prospect of EUVL (Extreme Ultraviolet Lithography) insertion into HVM (High Volume Manufacturing) has never been this promising. As technology is prepared for "lab to fab" transition, it becomes important to comprehend challenges associated with integrating EUVL infrastructure within existing high volume chip fabrication processes in a foundry fab. The existing 193nm optical lithography process flow for reticle handling and storage in a fab atmosphere is well established and in-fab reticle contamination concerns are mitigated with the reticle pellicle. However EUVL reticle pellicle is still under development and if available, may only provide protection against particles but not molecular contamination. HVM fab atmosphere is known to be contaminated with trace amounts of AMC's (Atmospheric Molecular Contamination). If such contaminants are organic in nature and get absorbed on the reticle surface, EUV photon cause photo-dissociation resulting into carbon generation which is known to reduce multilayer reflectivity and also degrades exposure uniformity. Chemical diffusion and aggregation of other ions is also reported under the e-beam exposure of a EUV reticle which is known to cause haze issues in optical lithography. Therefore it becomes paramount to mitigate absorbed molecular contaminant concerns on EUVL reticle surface. In this paper, we have studied types of molecular contaminants that are absorbed on an EUVL reticle surface under HVM fab storage and handling conditions. Effect of storage conditions (gas purged vs atmospheric) in different storage pods (Dual pods, Reticle Clamshells) is evaluated. Absorption analysis is done both on ruthenium capping layer as well as TaBN absorber. Ru surface chemistry change as a result of storage is also studied. The efficacy of different reticle cleaning processes to remove absorbed contaminant is evaluated as well.

Remembering the Important Things: Semantic Importance in Stream Reasoning

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Rui; Greaves, Mark T.; Smith, William P.

Reasoning and querying over data streams rely on the abil- ity to deliver a sequence of stream snapshots to the processing algo- rithms. These snapshots are typically provided using windows as views into streams and associated window management strategies. Generally, the goal of any window management strategy is to preserve the most im- portant data in the current window and preferentially evict the rest, so that the retained data can continue to be exploited. A simple timestamp- based strategy is rst-in-rst-out (FIFO), in which items are replaced in strict order of arrival. All timestamp-based strategies implicitly assume that a temporalmore » ordering reliably re ects importance to the processing task at hand, and thus that window management using timestamps will maximize the ability of the processing algorithms to deliver accurate interpretations of the stream. In this work, we explore a general no- tion of semantic importance that can be used for window management for streams of RDF data using semantically-aware processing algorithms like deduction or semantic query. Semantic importance exploits the infor- mation carried in RDF and surrounding ontologies for ranking window data in terms of its likely contribution to the processing algorithms. We explore the general semantic categories of query contribution, prove- nance, and trustworthiness, as well as the contribution of domain-specic ontologies. We describe how these categories behave using several con- crete examples. Finally, we consider how a stream window management strategy based on semantic importance could improve overall processing performance, especially as available window sizes decrease.« less

Single-machine common/slack due window assignment problems with linear decreasing processing times

NASA Astrophysics Data System (ADS)

Zhang, Xingong; Lin, Win-Chin; Wu, Wen-Hsiang; Wu, Chin-Chia

2017-08-01

This paper studies linear non-increasing processing times and the common/slack due window assignment problems on a single machine, where the actual processing time of a job is a linear non-increasing function of its starting time. The aim is to minimize the sum of the earliness cost, tardiness cost, due window location and due window size. Some optimality results are discussed for the common/slack due window assignment problems and two O(n log n) time algorithms are presented to solve the two problems. Finally, two examples are provided to illustrate the correctness of the corresponding algorithms.

Progress and process improvements for multiple electron-beam direct write

NASA Astrophysics Data System (ADS)

Servin, Isabelle; Pourteau, Marie-Line; Pradelles, Jonathan; Essomba, Philippe; Lattard, Ludovic; Brandt, Pieter; Wieland, Marco

2017-06-01

Massively parallel electron beam direct write (MP-EBDW) lithography is a cost-effective patterning solution, complementary to optical lithography, for a variety of applications ranging from 200 to 14 nm. This paper will present last process/integration results to achieve targets for both 28 and 45 nm nodes. For 28 nm node, we mainly focus on line-width roughness (LWR) mitigation by playing with stack, new resist platform and bias design strategy. The lines roughness was reduced by using thicker spin-on-carbon (SOC) hardmask (-14%) or non-chemically amplified (non-CAR) resist with bias writing strategy implementation (-20%). Etch transfer into trilayer has been demonstrated by preserving pattern fidelity and profiles for both CAR and non-CAR resists. For 45 nm node, we demonstrate the electron-beam process integration within optical CMOS flows. Resists based on KrF platform show a full compatibility with multiple stacks to fit with conventional optical flow used for critical layers. Electron-beam resist performances have been optimized to fit the specifications in terms of resolution, energy latitude, LWR and stack compatibility. The patterning process overview showing the latest achievements is mature enough to enable starting the multi-beam technology pre-production mode.

Design of an integrated aerial image sensor

NASA Astrophysics Data System (ADS)

Xue, Jing; Spanos, Costas J.

2005-05-01

The subject of this paper is a novel integrated aerial image sensor (IAIS) system suitable for integration within the surface of an autonomous test wafer. The IAIS could be used as a lithography processing monitor, affording a "wafer's eye view" of the process, and therefore facilitating advanced process control and diagnostics without integrating (and dedicating) the sensor to the processing equipment. The IAIS is composed of an aperture mask and an array of photo-detectors. In order to retrieve nanometer scale resolution of the aerial image with a practical photo-detector pixel size, we propose a design of an aperture mask involving a series of spatial phase "moving" aperture groups. We demonstrate a design example aimed at the 65nm technology node through TEMPEST simulation. The optimized, key design parameters include an aperture width in the range of 30nm, aperture thickness in the range of 70nm, and offer a spatial resolution of about 5nm, all with comfortable fabrication tolerances. Our preliminary simulation work indicates the possibility of the IAIS being applied to the immersion lithography. A bench-top far-field experiment verifies that our approach of the spatial frequency down-shift through forming large Moire patterns is feasible.

Intelligent control system based on ARM for lithography tool

NASA Astrophysics Data System (ADS)

Chen, Changlong; Tang, Xiaoping; Hu, Song; Wang, Nan

2014-08-01

The control system of traditional lithography tool is based on PC and MCU. The PC handles the complex algorithm, human-computer interaction, and communicates with MCU via serial port; The MCU controls motors and electromagnetic valves, etc. This mode has shortcomings like big volume, high power consumption, and wasting of PC resource. In this paper, an embedded intelligent control system of lithography tool, based on ARM, is provided. The control system used S5PV210 as processor, completing the functions of PC in traditional lithography tool, and provided a good human-computer interaction by using LCD and capacitive touch screen. Using Android4.0.3 as operating system, the equipment provided a cool and easy UI which made the control more user-friendly, and implemented remote control and debug, pushing video information of product by network programming. As a result, it's convenient for equipment vendor to provide technical support for users. Finally, compared with traditional lithography tool, this design reduced the PC part, making the hardware resources efficiently used and reducing the cost and volume. Introducing embedded OS and the concepts in "The Internet of things" into the design of lithography tool can be a development trend.

Holographic lithography for biomedical applications

NASA Astrophysics Data System (ADS)

Stankevicius, E.; Balciunas, E.; Malinauskas, M.; Raciukaitis, G.; Baltriukiene, D.; Bukelskiene, V.

2012-06-01

Fabrication of scaffolds for cell growth with appropriate mechanical characteristics is top-most important for successful creation of tissue. Due to ability of fast fabrication of periodic structures with a different period, the holographic lithography technique is a suitable tool for scaffolds fabrication. The scaffolds fabricated by holographic lithography can be used in various biomedical investigations such as the cellular adhesion, proliferation and viability. These investigations allow selection of the suitable material and geometry of scaffolds which can be used in creation of tissue. Scaffolds fabricated from di-acrylated poly(ethylene glycol) (PEG-DA-258) over a large area by holographic lithography technique are presented in this paper. The PEG-DA scaffolds fabricated by holographic lithography showed good cytocompatibility for rabbit myogenic stem cells. It was observed that adult rabbit muscle-derived myogenic stem cells grew onto PEG-DA scaffolds. They were attached to the pillars and formed cell-cell interactions. It demonstrates that the fabricated structures have potential to be an interconnection channel network for cell-to-cell interactions, flow transport of nutrients and metabolic waste as well as vascular capillary ingrowth. These results are encouraging for further development of holographic lithography by improving its efficiency for microstructuring three-dimensional scaffolds out of biodegradable hydrogels

Fabrication of 3D nano-structures using reverse imprint lithography

NASA Astrophysics Data System (ADS)

Han, Kang-Soo; Hong, Sung-Hoon; Kim, Kang-In; Cho, Joong-Yeon; Choi, Kyung-woo; Lee, Heon

2013-02-01

In spite of the fact that the fabrication process of three-dimensional nano-structures is complicated and expensive, it can be applied to a range of devices to increase their efficiency and sensitivity. Simple and inexpensive fabrication of three-dimensional nano-structures is necessary. In this study, reverse imprint lithography (RIL) with UV-curable benzylmethacrylate, methacryloxypropyl terminated poly-dimethylsiloxane (M-PDMS) resin and ZnO-nano-particle-dispersed resin was used to fabricate three-dimensional nano-structures. UV-curable resins were placed between a silicon stamp and a PVA transfer template, followed by a UV curing process. Then, the silicon stamp was detached and a 2D pattern layer was transferred to the substrate using diluted UV-curable glue. Consequently, three-dimensional nano-structures were formed by stacking the two-dimensional nano-patterned layers. RIL was applied to a light-emitting diode (LED) to evaluate the optical effects of a nano-patterned layer. As a result, the light extraction of the patterned LED was increased by about 12% compared to an unpatterned LED.

Fabrication of 3D nano-structures using reverse imprint lithography.

PubMed

Han, Kang-Soo; Hong, Sung-Hoon; Kim, Kang-In; Cho, Joong-Yeon; Choi, Kyung-Woo; Lee, Heon

2013-02-01

In spite of the fact that the fabrication process of three-dimensional nano-structures is complicated and expensive, it can be applied to a range of devices to increase their efficiency and sensitivity. Simple and inexpensive fabrication of three-dimensional nano-structures is necessary. In this study, reverse imprint lithography (RIL) with UV-curable benzylmethacrylate, methacryloxypropyl terminated poly-dimethylsiloxane (M-PDMS) resin and ZnO-nano-particle-dispersed resin was used to fabricate three-dimensional nano-structures.UV-curable resins were placed between a silicon stamp and a PVA transfer template, followed by a UV curing process. Then, the silicon stamp was detached and a 2D pattern layer was transferred to the substrate using diluted UV-curable glue. Consequently, three-dimensional nano-structures were formed by stacking the two-dimensional nano-patterned layers. RIL was applied to a light-emitting diode (LED) to evaluate the optical effects of a nano-patterned layer. As a result, the light extraction of the patterned LED was increased by about 12% compared to an unpatterned LED.

Bringing order to the world of nanowire devices by phase shift lithography.

PubMed

Subannajui, Kittitat; Güder, Firat; Zacharias, Margit

2011-09-14

Semiconductor nanowire devices have several properties which match future requirements of scaling down the size of electronics. In typical microelectronics production, a number of microstructures are aligned precisely on top of each other during the fabrication process. In the case of nanowires, this mandatory condition is still hard to achieve. A technological breakthrough is needed to accurately place nanowires at any specific position and then form devices in mass production. In this article, an upscalable process combining conventional micromachining with phase shift lithography will be demonstrated as a suitable tool for nanowire device technology. Vertical Si and ZnO nanowires are demonstrated on very large (several cm(2)) areas. We demonstrate how the nanowire positions can be controlled, and the resulting nanowires are used for device fabrication. As an example Si/ZnO heterojunction diode arrays are fabricated. The electrical characterization of the produced devices has also been performed to confirm the functionality of the fabricated diodes.

Lithography-free glass surface modification by self-masking during dry etching

NASA Astrophysics Data System (ADS)

Hein, Eric; Fox, Dennis; Fouckhardt, Henning

2011-01-01

Glass surface morphologies with defined shapes and roughness are realized by a two-step lithography-free process: deposition of an ~10-nm-thin lithographically unstructured metallic layer onto the surface and reactive ion etching in an Ar/CF4 high-density plasma. Because of nucleation or coalescence, the metallic layer is laterally structured during its deposition. Its morphology exhibits islands with dimensions of several tens of nanometers. These metal spots cause a locally varying etch velocity of the glass substrate, which results in surface structuring. The glass surface gets increasingly rougher with further etching. The mechanism of self-masking results in the formation of surface structures with typical heights and lateral dimensions of several hundred nanometers. Several metals, such as Ag, Al, Au, Cu, In, and Ni, can be employed as the sacrificial layer in this technology. Choice of the process parameters allows for a multitude of different glass roughness morphologies with individual defined and dosed optical scattering.

Effects on electron scattering and resist characteristics using assisting underlayers for e-beam direct write lithography

NASA Astrophysics Data System (ADS)

Thrun, Xaver; Choi, Kang-Hoon; Hanisch, Norbert; Hohle, Christoph; Steidel, Katja; Guerrero, Douglas; Figueiro, Thiago; Bartha, Johann W.

2013-03-01

Resist processing for future technology nodes becomes more and more complex. The resist film thickness is getting thinner and hardmask concepts (trilayer) are needed for reproducible etch transfer into the stack. Additional layers between resist and substrate are influencing the electron scattering in e-beam lithography and may also improve sensitivity and resolution. In this study, bare silicon wafers with different assisting underlayers were processed in a 300 mm CMOS manufacturing environment and were exposed on a 50 keV VISTEC SB3050DW variable-shaped electron beam direct writer at Fraunhofer CNT. The underlayers are organic-inorganic hybrid coatings with different metal additives. The negative-tone resist was evaluated in terms of contrast, sensitivity, resolution and LWR/LER as a function of the stack. The interactions between resist and different assisting underlayers on e-beam direct writing will be investigated. These layers could be used to optimize the trade-off among resolution, LWR and sensitivity in future applications.

Porosity characteristics of ultra-low dielectric insulator films directly patterned by nano-imprint lithography

NASA Astrophysics Data System (ADS)

Ro, Hyun Wook; Jones, Ronald L.; Peng, Huagen; Lee, Hae-Jeong; Lin, Eric K.; Karim, Alamgir; Yoon, Do Y.; Gidley, David W.; Soles, Christopher L.

2008-03-01

Direct patterning of low-dielectric constant (low-k) materials via nanoimprint lithography (NIL) has the potential to simplify fabrication processes and significantly reduce the manufacturing costs for semiconductor devices. We report direct imprinting of sub-100 nm features into a high modulus methylsilsesquioxane-based organosilicate glass (OSG) material. An excellent fidelity of the pattern transfer process is quantified with nm precision using critical dimension small angle X-ray scattering (CD-SAXS) and specular X-ray reflectivity (SXR). X-ray porosimetry (XRP) and positron annihilation lifetime spectroscopy (PALS) measurements indicate that imprinting increases the inherent microporosity of the methylsilsequioxane-based OSG material. When a porogen (pore generating material) is added, imprinting decreases the population of mesopores associated with the porogen while retaining the enhanced microporosity. The net effect is a decrease the pore interconnectivity. There is also evidence for a sealing effect that is interpreted as an imprint induced dense skin at the surface of the porous pattern.

Comprehensive analysis of line-edge and line-width roughness for EUV lithography

NASA Astrophysics Data System (ADS)

Bonam, Ravi; Liu, Chi-Chun; Breton, Mary; Sieg, Stuart; Seshadri, Indira; Saulnier, Nicole; Shearer, Jeffrey; Muthinti, Raja; Patlolla, Raghuveer; Huang, Huai

2017-03-01

Pattern transfer fidelity is always a major challenge for any lithography process and needs continuous improvement. Lithographic processes in semiconductor industry are primarily driven by optical imaging on photosensitive polymeric material (resists). Quality of pattern transfer can be assessed by quantifying multiple parameters such as, feature size uniformity (CD), placement, roughness, sidewall angles etc. Roughness in features primarily corresponds to variation of line edge or line width and has gained considerable significance, particularly due to shrinking feature sizes and variations of features in the same order. This has caused downstream processes (Etch (RIE), Chemical Mechanical Polish (CMP) etc.) to reconsider respective tolerance levels. A very important aspect of this work is relevance of roughness metrology from pattern formation at resist to subsequent processes, particularly electrical validity. A major drawback of current LER/LWR metric (sigma) is its lack of relevance across multiple downstream processes which effects material selection at various unit processes. In this work we present a comprehensive assessment of Line Edge and Line Width Roughness at multiple lithographic transfer processes. To simulate effect of roughness a pattern was designed with periodic jogs on the edges of lines with varying amplitudes and frequencies. There are numerous methodologies proposed to analyze roughness and in this work we apply them to programmed roughness structures to assess each technique's sensitivity. This work also aims to identify a relevant methodology to quantify roughness with relevance across downstream processes.

75 FR 11889 - Request for Comments on Proposed NIH, AHRQ and CDC Process Change for Electronic Submission of...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-12

... impact of eliminating the correction window from the electronic grant application submission process on... process a temporary error correction window to ensure a smooth and successful transition for applicants. This window provides applicants a period of time beyond the grant application due date to correct any...

Recent developments in the fabrication of ordered nanostructure arrays based on nanosphere lithography.

PubMed

Wei, Xueyong

2010-11-01

Since it was invented two decades ago, Nanosphere Lithography (NSL) has been widely studied as a low cost and flexible technique to fabricate nanostructures. Based on the registered patents and some selected papers, this review will discuss recent developments of different NSL strategies for the fabrication of ordered nanostructure arrays. The mechanism of self-assembly process and the techniques for preparing the self-assembled nanosphere template are first briefly introduced. The nanosphere templates are used either as shadow masks or as moulds for pattern transfer. Much more work now combines NSL with other lithographic techniques and material growth methods to form novel nanostructures of complex shape or various materials. Hence, this review finally gives a discussion on some future directions in NSL study.

EUV lithography for 30nm half pitch and beyond: exploring resolution, sensitivity, and LWR tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Chandhok, Manish; Frasure, Kent

2009-03-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 32nm half-pitch node and beyond. Readiness of EUV materials is currently one high risk area according to assessments made at the 2008 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data is presented utilizing Intel's Micro-Exposure Tool (MET) examining the feasibility of establishing a resist process that simultaneously exhibits <=30nm half-pitch (HP) L/S resolution at <=10mJ/cm2 with <=4nm LWR.

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Caudillo, Roman; Chandhok, Manish

2010-04-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. Readiness of EUV materials is currently one high risk area according to recent assessments made at the 2009 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data collected utilizing Intel's Micro-Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits <=22nm half-pitch (HP) L/S resolution at <= 12.5mJ/cm2 with <= 4nm LWR.

Servo-integrated patterned media by hybrid directed self-assembly.

PubMed

Xiao, Shuaigang; Yang, Xiaomin; Steiner, Philip; Hsu, Yautzong; Lee, Kim; Wago, Koichi; Kuo, David

2014-11-25

A hybrid directed self-assembly approach is developed to fabricate unprecedented servo-integrated bit-patterned media templates, by combining sphere-forming block copolymers with 5 teradot/in.(2) resolution capability, nanoimprint and optical lithography with overlay control. Nanoimprint generates prepatterns with different dimensions in the data field and servo field, respectively, and optical lithography controls the selective self-assembly process in either field. Two distinct directed self-assembly techniques, low-topography graphoepitaxy and high-topography graphoepitaxy, are elegantly integrated to create bit-patterned templates with flexible embedded servo information. Spinstand magnetic test at 1 teradot/in.(2) shows a low bit error rate of 10(-2.43), indicating fully functioning bit-patterned media and great potential of this approach for fabricating future ultra-high-density magnetic storage media.

Aluminum Nanowire Arrays via Soft Nanoimprint Lithography

NASA Astrophysics Data System (ADS)

Naughton, Michael J.; Nesbitt, Nathan T.; Merlo, Juan M.; Rose, Aaron H.; Calm, Yitzi M.; D'Imperio, Luke A.; Courtney, Dave T.; Shepard, Steve; Kempa, Krzysztof; Burns, Michael J.

We have previously reported a method to fabricate freestanding, vertically-oriented, and lithographically-ordered Al nanowire arrays via directed assembly, and demonstrated their utility as a plasmonic waveguide. However, the process, a variation on the preparation of anodized aluminum oxide (AAO), involved imprinting Al with a hard stamp, which wore down the stamp and had a low yield of Al NWs. Here we show a new nanoimprint lithography (NIL) technique that uses a soft stamp to pattern a mask on the Al; it provides a greater yield of Al NWs and is less destructive to the stamp, providing a path to applications that require NW arrays over macroscopic areas. This material is based upon work supported by the National Science Foundation Graduate Research Fellowship under Grant No. (DGE-1258923).

Enhancing the photon-extraction efficiency of site-controlled quantum dots by deterministically fabricated microlenses

NASA Astrophysics Data System (ADS)

Kaganskiy, Arsenty; Fischbach, Sarah; Strittmatter, André; Rodt, Sven; Heindel, Tobias; Reitzenstein, Stephan

2018-04-01

We report on the realization of scalable single-photon sources (SPSs) based on single site-controlled quantum dots (SCQDs) and deterministically fabricated microlenses. The fabrication process comprises the buried-stressor growth technique complemented with low-temperature in-situ electron-beam lithography for the integration of SCQDs into microlens structures with high yield and high alignment accuracy. The microlens-approach leads to a broadband enhancement of the photon-extraction efficiency of up to (21 ± 2)% and a high suppression of multi-photon events with g (2)(τ = 0) < 0.06 without background subtraction. The demonstrated combination of site-controlled growth of QDs and in-situ electron-beam lithography is relevant for arrays of efficient SPSs which, can be applied in photonic quantum circuits and advanced quantum computation schemes.

Device-level and module-level three-dimensional integrated circuits created using oblique processing

NASA Astrophysics Data System (ADS)

Burckel, D. Bruce

2016-07-01

This paper demonstrates that another class of three-dimensional integrated circuits (3-D-ICs) exists, distinct from through-silicon-via-centric and monolithic 3-D-ICs. Furthermore, it is possible to create devices that are 3-D "at the device level" (i.e., with active channels oriented in each of the three coordinate axes), by performing standard CMOS fabrication operations at an angle with respect to the wafer surface into high aspect ratio silicon substrates using membrane projection lithography (MPL). MPL requires only minimal fixturing changes to standard CMOS equipment, and no change to current state-of-the-art lithography. Eliminating the constraint of two-dimensional planar device architecture enables a wide range of interconnect topologies which could help reduce interconnect resistance/capacitance, and potentially improve performance.

Formation of 2D-PhCs with missing holes based on Si-layers by EBL

NASA Astrophysics Data System (ADS)

Utkin, D. E.; Shklyev, A. A.; Tsarev, A. V.; Latyshev, A. V.

2017-11-01

The fabrication of the periodic structures, that is two-dimensional photonic crystals (2D PhCs) based on Si-materials by electron beam lithography (EBL) technique has been studied. We have investigated basic lithography processes such as designing, exposition, development, etching and others. The developed top-down approach allows close-packed arrays of elements and holes to be formed in nanometre range. This can be used to produce 2D PhCs with emitting micro-cavities (missing holes) with lateral size parameters with an accuracy of about 2% in the Si (100) substrate and in silicon-on-insulator structures. Such accuracy is expected to be sufficient for obtaining the cavities-coupling radiation interference from large areas of 2D PhCs.

Extreme ultraviolet resist materials for sub-7 nm patterning.

PubMed

Li, Li; Liu, Xuan; Pal, Shyam; Wang, Shulan; Ober, Christopher K; Giannelis, Emmanuel P

2017-08-14

Continuous ongoing development of dense integrated circuits requires significant advancements in nanoscale patterning technology. As a key process in semiconductor high volume manufacturing (HVM), high resolution lithography is crucial in keeping with Moore's law. Currently, lithography technology for the sub-7 nm node and beyond has been actively investigated approaching atomic level patterning. EUV technology is now considered to be a potential alternative to HVM for replacing in some cases ArF immersion technology combined with multi-patterning. Development of innovative resist materials will be required to improve advanced fabrication strategies. In this article, advancements in novel resist materials are reviewed to identify design criteria for establishment of a next generation resist platform. Development strategies and the challenges in next generation resist materials are summarized and discussed.

Direct nanopatterning of 100 nm metal oxide periodic structures by Deep-UV immersion lithography.

PubMed

Stehlin, Fabrice; Bourgin, Yannick; Spangenberg, Arnaud; Jourlin, Yves; Parriaux, Olivier; Reynaud, Stéphanie; Wieder, Fernand; Soppera, Olivier

2012-11-15

Deep-UV lithography using high-efficiency phase mask has been developed to print 100 nm period grating on sol-gel based thin layer. High efficiency phase mask has been designed to produce a high-contrast interferogram (periodic fringes) under water immersion conditions for 244 nm laser. The demonstration has been applied to a new developed immersion-compatible sol-gel layer. A sol-gel photoresist prepared from zirconium alkoxides caped with methacrylic acids was developed to achieve 50 nm resolution in a single step exposure. The nanostructures can be thermally annealed into ZrO(2). Such route considerably simplifies the process for elaborating nanopatterned surfaces of transition metal oxides, and opens new routes for integrating materials of interest for applications in the field of photocatalysis, photovoltaic, optics, photonics or microelectronics.

Fabrication of large-area nano-scale patterned sapphire substrate with laser interference lithography

NASA Astrophysics Data System (ADS)

Xuan, Ming-dong; Dai, Long-gui; Jia, Hai-qiang; Chen, Hong

2014-01-01

Periodic triangle truncated pyramid arrays are successfully fabricated on the sapphire substrate by a low-cost and high-efficiency laser interference lithography (LIL) system. Through the combination of dry etching and wet etching techniques, the nano-scale patterned sapphire substrate (NPSS) with uniform size is prepared. The period of the patterns is 460 nm as designed to match the wavelength of blue light emitting diode (LED). By improving the stability of the LIL system and optimizing the process parameters, well-defined triangle truncated pyramid arrays can be achieved on the sapphire substrate with diameter of 50.8 mm. The deviation of the bottom width of the triangle truncated pyramid arrays is 6.8%, which is close to the industrial production level of 3%.

Simulation of exposure and alignment for nanoimprint lithography

NASA Astrophysics Data System (ADS)

Deng, Yunfei; Neureuther, Andrew R.

2002-07-01

Rigorous electromagnetic simulation with TEMPEST is used to examine the exposure and alignment processes for nano-imprint lithography with attenuating thin-film molds. Parameters in the design of topographical features of the nano-imprint system and material choices of the components are analyzed. The small feature size limits light transmission through the feature. While little can be done with auxiliary structures to attract light into small holes, the use of an absorbing material with a low real part of the refractive index such as silver helps mitigates the problem. Results on complementary alignment marks shows that the small transmission through the metal layer and the vertical separation of two alignment marks create the leakage equivalent to 1 nm misalignment but satisfactory alignment can be obtained by measuring alignment signals over a +/- 30 nm range.

Patterning and templating for nanoelectronics.

PubMed

Galatsis, Kosmas; Wang, Kang L; Ozkan, Mihri; Ozkan, Cengiz S; Huang, Yu; Chang, Jane P; Monbouquette, Harold G; Chen, Yong; Nealey, Paul; Botros, Youssry

2010-02-09

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

Logic gate scanner focus control in high-volume manufacturing using scatterometry

NASA Astrophysics Data System (ADS)

Dare, Richard J.; Swain, Bryan; Laughery, Michael

2004-05-01

Tool matching and optimal process control are critical requirements for success in semiconductor manufacturing. It is imperative that a tool"s operating conditions are understood and controlled in order to create a process that is repeatable and produces devices within specifications. Likewise, it is important where possible to match multiple systems using some methodology, so that regardless of which tool is used the process remains in control. Agere Systems is currently using Timbre Technologies" Optical Digital Profilometry (ODP) scatterometry for controlling Nikon scanner focus at the most critical lithography layer; logic gate. By adjusting focus settings and verifying the resultant changes in resist profile shape using ODP, it becomes possible to actively control scanner focus to achieve a desired resist profile. Since many critical lithography processes are designed to produce slightly re-entrant resist profiles, this type of focus control is not possible via Critical Dimension Scanning Electron Microscopy (CDSEM) where reentrant profiles cannot be accurately determined. Additionally, the high throughput and non-destructive nature of this measurement technique saves both cycle time and wafer costs compared to cross-section SEM. By implementing an ODP daily process check and after any maintenance on a scanner, Agere successfully enabled focus drift control, i.e. making necessary focus or equipment changes in order to maintain a desired resist profile.

Method and apparatus for removing and preventing window deposition during photochemical vapor deposition (photo-CVD) processes

DOEpatents

Tsuo, S.; Langford, A.A.

1989-03-28

Unwanted build-up of the film deposited on the transparent light-transmitting window of a photochemical vacuum deposition (photo-CVD) chamber is eliminated by flowing an etchant into the part of the photolysis region in the chamber immediately adjacent the window and remote from the substrate and from the process gas inlet. The respective flows of the etchant and the process gas are balanced to confine the etchant reaction to the part of the photolysis region proximate to the window and remote from the substrate. The etchant is preferably one that etches film deposit on the window, does not etch or affect the window itself, and does not produce reaction by-products that are deleterious to either the desired film deposited on the substrate or to the photolysis reaction adjacent the substrate. 3 figs.

Method and apparatus for removing and preventing window deposition during photochemical vapor deposition (photo-CVD) processes

DOEpatents

Tsuo, Simon; Langford, Alison A.

1989-01-01

Unwanted build-up of the film deposited on the transparent light-transmitting window of a photochemical vacuum deposition (photo-CVD) chamber is eliminated by flowing an etchant into the part of the photolysis region in the chamber immediately adjacent the window and remote from the substrate and from the process gas inlet. The respective flows of the etchant and the process gas are balanced to confine the etchant reaction to the part of the photolysis region proximate to the window and remote from the substrate. The etchant is preferably one that etches film deposit on the window, does not etch or affect the window itself, and does not produce reaction by-products that are deleterious to either the desired film deposited on the substrate or to the photolysis reaction adjacent the substrate.

Potential Technology Transfer to the DoD Unmanned Ground Vehicle Program.

DTIC Science & Technology

1996-10-01

Germany. This process combines x-ray lithography, galvanic casting, and micromolding technology and can be used to produce a variety of sensors and...whether circulation is being obstructed by atherosclerosis . Finally, work is being done at the University of Minnesota on a microrobotic device

Recent developments of x-ray lithography in Canada

NASA Astrophysics Data System (ADS)

Chaker, Mohamed; Boily, Stephane; Ginovker, A.; Jean, Alain; Kieffer, Jean-Claude; Mercier, P. P.; Pepin, Henri; Leung, Pak; Currie, John F.; Lafontaine, Hugues

1991-08-01

An overview of current activities in Canada is reported, including x-ray lithography studies based on laser plasma sources and x-ray mask development. In particular, the application of laser plasma sources for x-ray lithography is discussed, taking into account the industrial requirement and the present state of laser technology. The authors describe the development of silicon carbide membranes for x-ray lithography application. SiC films were prepared using either a 100 kHz plasma-enhanced chemical vapor deposition (PECVD) system or a laser ablation technique. These membranes have a relatively large diameter (> 1 in.) and a high optical transparency (> 50%). Experimental studies on stresses in tungsten films deposited with triode sputtering are reported.

Polymer blend lithography: A versatile method to fabricate nanopatterned self-assembled monolayers.

PubMed

Huang, Cheng; Moosmann, Markus; Jin, Jiehong; Heiler, Tobias; Walheim, Stefan; Schimmel, Thomas

2012-01-01

A rapid and cost-effective lithographic method, polymer blend lithography (PBL), is reported to produce patterned self-assembled monolayers (SAM) on solid substrates featuring two or three different chemical functionalities. For the pattern generation we use the phase separation of two immiscible polymers in a blend solution during a spin-coating process. By controlling the spin-coating parameters and conditions, including the ambient atmosphere (humidity), the molar mass of the polystyrene (PS) and poly(methyl methacrylate) (PMMA), and the mass ratio between the two polymers in the blend solution, the formation of a purely lateral morphology (PS islands standing on the substrate while isolated in the PMMA matrix) can be reproducibly induced. Either of the formed phases (PS or PMMA) can be selectively dissolved afterwards, and the remaining phase can be used as a lift-off mask for the formation of a nanopatterned functional silane monolayer. This "monolayer copy" of the polymer phase morphology has a topographic contrast of about 1.3 nm. A demonstration of tuning of the PS island diameter is given by changing the molar mass of PS. Moreover, polymer blend lithography can provide the possibility of fabricating a surface with three different chemical components: This is demonstrated by inducing breath figures (evaporated condensed entity) at higher humidity during the spin-coating process. Here we demonstrate the formation of a lateral pattern consisting of regions covered with 1H,1H,2H,2H-perfluorodecyltrichlorosilane (FDTS) and (3-aminopropyl)triethoxysilane (APTES), and at the same time featuring regions of bare SiO(x). The patterning process could be applied even on meter-sized substrates with various functional SAM molecules, making this process suitable for the rapid preparation of quasi two-dimensional nanopatterned functional substrates, e.g., for the template-controlled growth of ZnO nanostructures [1].

Dynamically re-configurable CMOS imagers for an active vision system

NASA Technical Reports Server (NTRS)

Yang, Guang (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

A vision system is disclosed. The system includes a pixel array, at least one multi-resolution window operation circuit, and a pixel averaging circuit. The pixel array has an array of pixels configured to receive light signals from an image having at least one tracking target. The multi-resolution window operation circuits are configured to process the image. Each of the multi-resolution window operation circuits processes each tracking target within a particular multi-resolution window. The pixel averaging circuit is configured to sample and average pixels within the particular multi-resolution window.

Modeling of projection electron lithography

NASA Astrophysics Data System (ADS)

Mack, Chris A.

2000-07-01

Projection Electron Lithography (PEL) has recently become a leading candidate for the next generation of lithography systems after the successful demonstration of SCAPEL by Lucent Technologies and PREVAIL by IBM. These systems use a scattering membrane mask followed by a lens with limited angular acceptance range to form an image of the mask when illuminated by high energy electrons. This paper presents an initial modeling system for such types of projection electron lithography systems. Monte Carlo modeling of electron scattering within the mask structure creates an effective mask 'diffraction' pattern, to borrow the standard optical terminology. A cutoff of this scattered pattern by the imaging 'lens' provides an electron energy distribution striking the wafer. This distribution is then convolved with a 'point spread function,' the results of a Monte Carlo scattering calculation of a point beam of electrons striking the resist coated substrate and including the effects of beam blur. Resist exposure and development models from standard electron beam lithography simulation are used to simulate the final three-dimensional resist profile.

EB and EUV lithography using inedible cellulose-based biomass resist material

NASA Astrophysics Data System (ADS)

Takei, Satoshi; Hanabata, Makoto; Oshima, Akihiro; Kashiwakura, Miki; Kozawa, Takahiro; Tagawa, Seiichi

2016-03-01

The validity of our approach of inedible cellulose-based resist material derived from woody biomass has been confirmed experimentally for the use of pure water in organic solvent-free water spin-coating and tetramethylammonium hydroxide(TMAH)-free water-developable techniques of eco-conscious electron beam (EB) and extreme-ultraviolet (EUV) lithography. The water developable, non-chemically amplified, high sensitive, and negative tone resist material in EB and EUV lithography was developed for environmental affair, safety, easiness of handling, and health of the working people. The inedible cellulose-based biomass resist material was developed by replacing the hydroxyl groups in the beta-linked disaccharides with EB and EUV sensitive groups. The 50-100 nm line and space width, and little footing profiles of cellulose-based biomass resist material on hardmask and layer were resolved at the doses of 10-30 μC/cm2. The eco-conscious lithography techniques was referred to as green EB and EUV lithography using inedible cellulose-based biomass resist material.

Foundry Microfabrication of Deformable Mirrors for Adaptive Optics

DTIC Science & Technology

1998-04-28

radians) of deflection. The 25% amplitude modulation of the piston array is due to constructive and destructive interference of light reflecting off the...34 Lithographie Galvanoformung und Abformung" is frequently applied to these plating processes. In the LIGA process synchrotron x-ray radiation is used to... interference because the support structures were metallized. In addition, only 61 mirror elements were controlled. Two approaches to improved

Imprint process performance for patterned media at densities greater than 1Tb/in2

NASA Astrophysics Data System (ADS)

Ye, Zhengmao; Carden, Scott; Hellebrekers, Paul; LaBrake, Dwayne; Resnick, Douglas J.; Melliar-Smith, M.; Sreenivasan, S. V.

2012-03-01

The use of bit pattern media beyond densities of 1Tb/in2 requires the ability to pattern dimensions to sub 10nm. This paper describes the techniques used to reach these dimensions with imprint lithography and avoid such challenges as pattern collapse, by developing improved resist materials with higher strength, and utilizing a reverse tone J-FIL/R process.

Precision process calibration and CD predictions for low-k1 lithography

NASA Astrophysics Data System (ADS)

Chen, Ting; Park, Sangbong; Berger, Gabriel; Coskun, Tamer H.; de Vocht, Joep; Chen, Fung; Yu, Linda; Hsu, Stephen; van den Broeke, Doug; Socha, Robert; Park, Jungchul; Gronlund, Keith; Davis, Todd; Plachecki, Vince; Harris, Tom; Hansen, Steve; Lambson, Chuck

2005-06-01

Leading resist calibration for sub-0.3 k1 lithography demands accuracy <2nm for CD through pitch. An accurately calibrated resist process is the prerequisite for establishing production-worthy manufacturing under extreme low k1. From an integrated imaging point of view, the following key components must be simultaneously considered during the calibration - high numerical aperture (NA>0.8) imaging characteristics, customized illuminations (measured vs. modeled pupil profiles), resolution enhancement technology (RET) mask with OPC, reticle metrology, and resist thin film substrate. For imaging at NA approaching unity, polarized illumination can impact significantly the contrast formation in the resist film stack, and therefore it is an important factor to consider in the CD-based resist calibration. For aggressive DRAM memory core designs at k1<0.3, pattern-specific illumination optimization has proven to be critical for achieving the required imaging performance. Various optimization techniques from source profile optimization with fixed mask design to the combined source and mask optimization have been considered for customer designs and available imaging capabilities. For successful low-k1 process development, verification of the optimization results can only be made with a sufficiently tunable resist model that can predicate the wafer printing accurately under various optimized process settings. We have developed, for resist patterning under aggressive low-k1 conditions, a novel 3D diffusion model equipped with double-Gaussian convolution in each dimension. Resist calibration with the new diffusion model has demonstrated a fitness and CD predication accuracy that rival or outperform the traditional 3D physical resist models. In this work, we describe our empirical approach to achieving the nm-scale precision for advanced lithography process calibrations, using either measured 1D CD through-pitch or 2D memory core patterns. We show that for ArF imaging, the current resist development and diffusion modeling can readily achieve ~1-2nm max CD errors for common 1D through-pitch and aggressive 2D memory core resist patterns. Sensitivities of the calibrated models to various process parameters are analyzed, including the comparison between the measured and modeled (Gaussian or GRAIL) pupil profiles. We also report our preliminary calibration results under selected polarized illumination conditions.

A biological inspired fuzzy adaptive window median filter (FAWMF) for enhancing DNA signal processing.

PubMed

Ahmad, Muneer; Jung, Low Tan; Bhuiyan, Al-Amin

2017-10-01

Digital signal processing techniques commonly employ fixed length window filters to process the signal contents. DNA signals differ in characteristics from common digital signals since they carry nucleotides as contents. The nucleotides own genetic code context and fuzzy behaviors due to their special structure and order in DNA strand. Employing conventional fixed length window filters for DNA signal processing produce spectral leakage and hence results in signal noise. A biological context aware adaptive window filter is required to process the DNA signals. This paper introduces a biological inspired fuzzy adaptive window median filter (FAWMF) which computes the fuzzy membership strength of nucleotides in each slide of window and filters nucleotides based on median filtering with a combination of s-shaped and z-shaped filters. Since coding regions cause 3-base periodicity by an unbalanced nucleotides' distribution producing a relatively high bias for nucleotides' usage, such fundamental characteristic of nucleotides has been exploited in FAWMF to suppress the signal noise. Along with adaptive response of FAWMF, a strong correlation between median nucleotides and the Π shaped filter was observed which produced enhanced discrimination between coding and non-coding regions contrary to fixed length conventional window filters. The proposed FAWMF attains a significant enhancement in coding regions identification i.e. 40% to 125% as compared to other conventional window filters tested over more than 250 benchmarked and randomly taken DNA datasets of different organisms. This study proves that conventional fixed length window filters applied to DNA signals do not achieve significant results since the nucleotides carry genetic code context. The proposed FAWMF algorithm is adaptive and outperforms significantly to process DNA signal contents. The algorithm applied to variety of DNA datasets produced noteworthy discrimination between coding and non-coding regions contrary to fixed window length conventional filters. Copyright © 2017 Elsevier B.V. All rights reserved.

Window and Overlap Processing Effects on Power Estimates from Spectra

NASA Astrophysics Data System (ADS)

Trethewey, M. W.

2000-03-01

Fast Fourier transform (FFT) spectral processing is based on the assumption of stationary ergodic data. In engineering practice, the assumption is often violated and non-stationary data processed. Data windows are commonly used to reduce leakage by decreasing the signal amplitudes near the boundaries of the discrete samples. With certain combinations of non-stationary signals and windows, the temporal weighting may attenuate important signal characteristics to adversely affect any subsequent processing. In other words, the window artificially reduces a significant section of the time signal. Consequently, spectra and overall power estimated from the affected samples are unreliable. FFT processing can be particularly problematic when the signal consists of randomly occurring transients superimposed on a more continuous signal. Overlap processing is commonly used in this situation to improve the estimates. However, the results again depend on the temporal character of the signal in relation to the window weighting. A worst-case scenario, a short-duration half sine pulse, is used to illustrate the relationship between overlap percentage and resulting power estimates. The power estimates are shown to depend on the temporal behaviour of the square of overlapped window segments. An analysis shows that power estimates may be obtained to within 0.27 dB for the following windows and overlap combinations: rectangular (0% overlap), Hanning (62.5% overlap), Hamming (60.35% overlap) and flat-top (82.25% overlap).

Fabrication of Three-Dimensional Imprint Lithography Templates by Colloidal Dispersions

DTIC Science & Technology

2011-03-06

Dispersions A. Marcia Almanza-Workman, Taussig P. Carl, Albert H. Jeans, Robert L. Cobene HP Laboratories HPL-2011-32 Flexible displays, Self aligned...imprint lithography, stamps, fluorothermoplastics, latex Self -aligned imprint lithography (SAIL) enables patterning and alignment of submicron-sized...features on flexible substrates in the roll-to roll (R2R) environment. Soft molds made of elastomers have been used as stamps to pattern three

Intregrating metallic wiring with three-dimensional polystyrene colloidal crystals using electron-beam lithography and three-dimensional laser lithography

NASA Astrophysics Data System (ADS)

Tian, Yaolan; Isotalo, Tero J.; Konttinen, Mikko P.; Li, Jiawei; Heiskanen, Samuli; Geng, Zhuoran; Maasilta, Ilari J.

2017-02-01

We demonstrate a method to fabricate narrow, down to a few micron wide metallic leads on top of a three-dimensional (3D) colloidal crystal self-assembled from polystyrene (PS) nanospheres of diameter 260 nm, using electron-beam lithography. This fabrication is not straightforward due to the fact that PS nanospheres cannot usually survive the harsh chemical treatments required in the development and lift-off steps of electron-beam lithography. We solve this problem by increasing the chemical resistance of the PS nanospheres using an additional electron-beam irradiation step, which allows the spheres to retain their shape and their self-assembled structure, even after baking to a temperature of 160 °C, the exposure to the resist developer and the exposure to acetone, all of which are required for the electron-beam lithography step. Moreover, we show that by depositing an aluminum oxide capping layer on top of the colloidal crystal after the e-beam irradiation, the surface is smooth enough so that continuous metal wiring can be deposited by the electron-beam lithography. Finally, we also demonstrate a way to self-assemble PS colloidal crystals into a microscale container, which was fabricated using direct-write 3D laser-lithography. Metallic wiring was also successfully integrated with the combination of a container structure and a PS colloidal crystal. Our goal is to make a device for studies of thermal transport in 3D phononic crystals, but other phononic or photonic crystal applications could also be envisioned.

Letter-sound processing deficits in children with developmental dyslexia: An ERP study.

PubMed

Moll, Kristina; Hasko, Sandra; Groth, Katharina; Bartling, Jürgen; Schulte-Körne, Gerd

2016-04-01

The time course during letter-sound processing was investigated in children with developmental dyslexia (DD) and typically developing (TD) children using electroencephalography. Thirty-eight children with DD and 25 TD children participated in a visual-auditory oddball paradigm. Event-related potentials (ERPs) elicited by standard and deviant stimuli in an early (100-190 ms) and late (560-750 ms) time window were analysed. In the early time window, ERPs elicited by the deviant stimulus were delayed and less left lateralized over fronto-temporal electrodes for children with DD compared to TD children. In the late time window, children with DD showed higher amplitudes extending more over right frontal electrodes. Longer latencies in the early time window and stronger right hemispheric activation in the late time window were associated with slower reading and naming speed. Additionally, stronger right hemispheric activation in the late time window correlated with poorer phonological awareness skills. Deficits in early stages of letter-sound processing influence later more explicit cognitive processes during letter-sound processing. Identifying the neurophysiological correlates of letter-sound processing and their relation to reading related skills provides insight into the degree of automaticity during letter-sound processing beyond behavioural measures of letter-sound-knowledge. Copyright © 2016 International Federation of Clinical Neurophysiology. Published by Elsevier Ireland Ltd. All rights reserved.

Patterned self-assembled monolayers for nanoscale lithography and the control of catalytically produced electroosmosis

NASA Astrophysics Data System (ADS)

Subramanian, Shyamala

This thesis explores two applications of self-assembled monolayers (SAMs) (a) for developing novel molecular assembly based nanolithography techniques and (b) for tailoring zeta-potential of surfaces towards achieving directional control of catalytically induced fluid flow. The first half of the thesis develops the process of molecular ruler lithography using sacrificial host structures. This is a novel hybrid nanolithography technique which combines chemical self-assembly with conventional fabrication methods for improving the resolution of existing lithography tools to sub-50 nm. Previous work related to molecular ruler lithography have shown the use of thiol-SAMs, placed one on top of the other like a molecular resist, for scaling down feature sizes. In this thesis various engineering solutions for improving the reproducibility, yield, nanoscale roughness and overall manufacturability of the process are introduced. This is achieved by introducing a sacrificial inert layer underneath the gold parent structure. This bilayer sacrificial host allows for preferential, easy and quick removal of the parent structures, isolates the parent metal from the underlying substrate and improves reproducibility of the lift-off process. Also it opens avenues for fabrication of high aspect ratio features. Also molecular layer vapor deposition method is developed for building the multilayer molecular resist via vapor phase to reduce contaminations and yield issues associated with solution phase deposition. The smallest isolated metal features produced using this process were 40 nm in width. The second half of the thesis describes application of thiol-SAMs to tailor surface properties of gold, specifically the surface charge or zeta potential. Previous work has demonstrated that the direction of movement of fluid in the vicinity of a catalytically active bimetallic junction placed in a solution of dilute hydrogen peroxide depends on the charge of the gold surface. SAMs with different end-group functionality impart different surface zeta potential to the gold surface. Zeta-potential engineering via patterning various end-group functionalized SAMs on gold surface to control direction of catalytically induced electroosmotic fluid flow is demonstrated for the first time. This work also describes the application of catalytic power to produce controlled rotational motion. Gold gears-like structures made using conventional microfabrication techniques and propelled by catalytic power are shown to rotate at speeds of 1 rotation/sec in a dilute solution of hydrogen peroxide. Fabrication of a force sensor for detection and measurement of catalytic forces is also introduced. The force sensor, with sensitivity in the piconewton range, consists of a microcantilever with a catalytically active silver post patterned on the tip. Changes in cantilever displacement and resonance frequency due to the catalytic force were monitored as a function of concentration of hydrogen peroxide. Overall, this thesis integrates SAM deposition and patterning techniques with conventional fabrication methods to engineer and control nanoscale structures and devices. Possible future device designs are described including CMOS devices having channel width defined using molecular ruler lithography with sacrificial hosts, drug delivery device based on AFM force sensor and channeless pumps powered by catalytic reactions with SAM controlled electroosmotic fluid flow.

Replacement Windows for Existing Homes Homes | Efficient Windows

Science.gov Websites

Design Guidance Installation Replacement Windows Window Selection Tool Assessing Options Selection Process Design Guidance Installation Understanding Windows Benefits Design Considerations Measuring Selection Tool will take you through a series of design conditions pertaining to your design and location

Development of new resist materials for 193-nm dry and immersion lithography

NASA Astrophysics Data System (ADS)

Sasaki, Takashi; Shirota, Naoko; Takebe, Yoko; Yokokoji, Osamu

2006-03-01

We earlier developed new monocyclic fluoropolymers (FUGU) for F II resist materials. But, it is necessary for FUGU to improve of their characteristics, especially the dry-etching resistance, in order to apply for ArF lithography at fine design rules. We have tried to combine FUGUs with Adamntyl methacrylates based conventional ArF resist polymer. In this paper, we have investigated the role of cyclic fluorinated unit, FUGU, in 193 nm resist polymers by analyzing the dissolution behavior. We found that FGEAM showed high sensitivity and good dissolution contrast, compared with acrylate based conventional samples at low PEB temperature (100 °C). And this difference of sensitivity was clearly found when weak acidity PAGs were used. From the dissolution behaviors of FGEAM, FUGU unit can work to improve the resist sensitivity in acrylate based ArF resist polymers. And we also found that FGEAM showed long acid diffusion length on PEB process, compared with Conventional samples. These result show that FUGU unit has a unique characteristics of the sensitivity with 193nm exposure and the acid diffusion behavior. We also investigated a new series of fluorinated copolymers for 193-nm lithography, combination of FUGU monomer and acrylate units which are used in conventional ArF resist. Six ter-polymers of FUGU, combination of FUGU monomers and EAdMA, GBLMA and HAdMA were prepared. We found that FUGU ter-polymers had a good dry etching resistance keeping high transparency at 193nm. And FUGU ter-polymers showed high sensitivity toward 193nm exposure. FUGU ter-polymers also had a high hydrophobic properties compared conventional type ArF resist polymers. So we also expect FUGU ter-polymers to be useful for ArF dry and immersion lithography.

Programmable lithography engine (ProLE) grid-type supercomputer and its applications

NASA Astrophysics Data System (ADS)

Petersen, John S.; Maslow, Mark J.; Gerold, David J.; Greenway, Robert T.

2003-06-01

There are many variables that can affect lithographic dependent device yield. Because of this, it is not enough to make optical proximity corrections (OPC) based on the mask type, wavelength, lens, illumination-type and coherence. Resist chemistry and physics along with substrate, exposure, and all post-exposure processing must be considered too. Only a holistic approach to finding imaging solutions will accelerate yield and maximize performance. Since experiments are too costly in both time and money, accomplishing this takes massive amounts of accurate simulation capability. Our solution is to create a workbench that has a set of advanced user applications that utilize best-in-class simulator engines for solving litho-related DFM problems using distributive computing. Our product, ProLE (Programmable Lithography Engine), is an integrated system that combines Petersen Advanced Lithography Inc."s (PAL"s) proprietary applications and cluster management software wrapped around commercial software engines, along with optional commercial hardware and software. It uses the most rigorous lithography simulation engines to solve deep sub-wavelength imaging problems accurately and at speeds that are several orders of magnitude faster than current methods. Specifically, ProLE uses full vector thin-mask aerial image models or when needed, full across source 3D electromagnetic field simulation to make accurate aerial image predictions along with calibrated resist models;. The ProLE workstation from Petersen Advanced Lithography, Inc., is the first commercial product that makes it possible to do these intensive calculations at a fraction of a time previously available thus significantly reducing time to market for advance technology devices. In this work, ProLE is introduced, through model comparison to show why vector imaging and rigorous resist models work better than other less rigorous models, then some applications of that use our distributive computing solution are shown. Topics covered describe why ProLE solutions are needed from an economic and technical aspect, a high level discussion of how the distributive system works, speed benchmarking, and finally, a brief survey of applications including advanced aberrations for lens sensitivity and flare studies, optical-proximity-correction for a bitcell and an application that will allow evaluation of the potential of a design to have systematic failures during fabrication.

Sub-Optical Lithography With Nanometer Definition Masks

NASA Technical Reports Server (NTRS)

Hartley, Frank T.; Malek, Chantal Khan; Neogi, Jayant

2000-01-01

Nanometer feature size lithography represents a major paradigm shift for the electronics and micro-electro-mechanical industries. In this paper, we discuss the capacity of dynamic focused reactive ion beam (FIB) etching systems to undertake direct and highly anisotropic erosion of thick evaporated gold coatings on boron-doped silicon X-ray mask membranes. FIB offers a new level of flexibility in micro fabrication, allowing for fast fabrication of X-ray masks, where pattern definition and surface alteration are combined in the same step which eliminates the whole lithographic process, in particular resist, resist development, electro-deposition and resist removal. Focused ion beam diameters as small as 7 nm can be obtained enabling fabrication well into the sub-20 nm regime. In preliminary demonstrations of this X-ray mask fabrication technique 22 nm width lines were milled directly through 0.9 microns of gold and a miniature mass spectrometer pattern was milled through over 0.5 microns of gold. Also presented are the results of the shadow printing, using the large depth of field of synchrotron high energy parallel X-ray beam, of these and other sub-optical defined patterns in photoresist conformally coated over surfaces of extreme topographical variation. Assuming that electronic circuits and/or micro devices scale proportionally, the surface area of devices processed with X-ray lithography and 20 nm critical dimension X-ray masks would be 0.5% that of contemporary devices (350 nm CD). The 20 CD mask fabrication represents an initial effort - a further factor of three reduction is anticipated which represents a further order-of-magnitude reduction in die area.

The impact of 14nm photomask variability and uncertainty on computational lithography solutions

NASA Astrophysics Data System (ADS)

Sturtevant, John; Tejnil, Edita; Buck, Peter D.; Schulze, Steffen; Kalk, Franklin; Nakagawa, Kent; Ning, Guoxiang; Ackmann, Paul; Gans, Fritz; Buergel, Christian

2013-09-01

Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. Many input variables for simulation are based upon designed or recipe-requested values or independent measurements. It is known, however, that certain measurement methodologies, while precise, can have significant inaccuracies. Additionally, there are known errors associated with the representation of certain system parameters. With shrinking total CD control budgets, appropriate accounting for all sources of error becomes more important, and the cumulative consequence of input errors to the computational lithography model can become significant. In this work, we examine via simulation, the impact of errors in the representation of photomask properties including CD bias, corner rounding, refractive index, thickness, and sidewall angle. The factors that are most critical to be accurately represented in the model are cataloged. CD bias values are based on state of the art mask manufacturing data and other variables changes are speculated, highlighting the need for improved metrology and communication between mask and OPC model experts. The simulations are done by ignoring the wafer photoresist model, and show the sensitivity of predictions to various model inputs associated with the mask. It is shown that the wafer simulations are very dependent upon the 1D/2D representation of the mask and for 3D, that the mask sidewall angle is a very sensitive factor influencing simulated wafer CD results.

Sequential infiltration synthesis for enhancing multiple-patterning lithography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Darling, Seth B.; Elam, Jeffrey W.; Tseng, Yu-Chih

Simplified methods of multiple-patterning photolithography using sequential infiltration synthesis to modify the photoresist such that it withstands plasma etching better than unmodified resist and replaces one or more hard masks and/or a freezing step in MPL processes including litho-etch-litho-etch photolithography or litho-freeze-litho-etch photolithography.

Computed Tomography Window Blending: Feasibility in Thoracic Trauma.

PubMed

Mandell, Jacob C; Wortman, Jeremy R; Rocha, Tatiana C; Folio, Les R; Andriole, Katherine P; Khurana, Bharti

2018-02-07

This study aims to demonstrate the feasibility of processing computed tomography (CT) images with a custom window blending algorithm that combines soft-tissue, bone, and lung window settings into a single image; to compare the time for interpretation of chest CT for thoracic trauma with window blending and conventional window settings; and to assess diagnostic performance of both techniques. Adobe Photoshop was scripted to process axial DICOM images from retrospective contrast-enhanced chest CTs performed for trauma with a window-blending algorithm. Two emergency radiologists independently interpreted the axial images from 103 chest CTs with both blended and conventional windows. Interpretation time and diagnostic performance were compared with Wilcoxon signed-rank test and McNemar test, respectively. Agreement with Nexus CT Chest injury severity was assessed with the weighted kappa statistic. A total of 13,295 images were processed without error. Interpretation was faster with window blending, resulting in a 20.3% time saving (P < .001), with no difference in diagnostic performance, within the power of the study to detect a difference in sensitivity of 5% as determined by post hoc power analysis. The sensitivity of the window-blended cases was 82.7%, compared to 81.6% for conventional windows. The specificity of the window-blended cases was 93.1%, compared to 90.5% for conventional windows. All injuries of major clinical significance (per Nexus CT Chest criteria) were correctly identified in all reading sessions, and all negative cases were correctly classified. All readers demonstrated near-perfect agreement with injury severity classification with both window settings. In this pilot study utilizing retrospective data, window blending allows faster preliminary interpretation of axial chest CT performed for trauma, with no significant difference in diagnostic performance compared to conventional window settings. Future studies would be required to assess the utility of window blending in clinical practice. Copyright © 2018 The Association of University Radiologists. All rights reserved.