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Sample records for logic circuits predict

  1. Explicit Logic Circuits Predict Local Properties of the Neocortex's Physiology and Anatomy

    PubMed Central

    Yoder, Lane

    2010-01-01

    Background Two previous articles proposed an explicit model of how the brain processes information by its organization of synaptic connections. The family of logic circuits was shown to generate neural correlates of complex psychophysical phenomena in different sensory systems. Methodology/Principal Findings Here it is shown that the most cost-effective architectures for these networks produce correlates of electrophysiological brain phenomena and predict major aspects of the anatomical structure and physiological organization of the neocortex. The logic circuits are markedly efficient in several respects and provide the foundation for all of the brain's combinational processing of information. Conclusions/Significance At the local level, these networks account for much of the physical structure of the neocortex as well its organization of synaptic connections. Electronic implementations of the logic circuits may be more efficient than current electronic logic arrays in generating both Boolean and fuzzy logic. PMID:20169077

  2. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  3. Optically controllable molecular logic circuits

    SciTech Connect

    Nishimura, Takahiro Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  4. Molecular logic circuits.

    PubMed

    Balzani, Vincenzo; Credi, Alberto; Venturi, Margherita

    2003-01-13

    Miniaturization has been an essential ingredient in the outstanding progress of information technology over the past fifty years. The next, perhaps ultimate, limit of miniaturization is that of molecules, which are the smallest entities with definite size, shape, and properties. Recently, great effort has been devoted to design and investigate molecular-level systems that are capable of transferring, processing, and storing information in binary form. Some of these nanoscale devices can, in fact, perform logic operations of remarkable complexity. This research--although far from being transferred into technology--is attracting interest, as the nanometer realm seems to be out of reach for the "top-down" techniques currently available to microelectronics industry. Moreover, such studies introduce new concepts in the "old" field of chemistry and stimulate the ingenuity of researchers engaged in the "bottom-up" approach to nanotechnology.

  5. Molecular logic circuits.

    PubMed

    Balzani, Vincenzo; Credi, Alberto; Venturi, Margherita

    2003-01-13

    Miniaturization has been an essential ingredient in the outstanding progress of information technology over the past fifty years. The next, perhaps ultimate, limit of miniaturization is that of molecules, which are the smallest entities with definite size, shape, and properties. Recently, great effort has been devoted to design and investigate molecular-level systems that are capable of transferring, processing, and storing information in binary form. Some of these nanoscale devices can, in fact, perform logic operations of remarkable complexity. This research--although far from being transferred into technology--is attracting interest, as the nanometer realm seems to be out of reach for the "top-down" techniques currently available to microelectronics industry. Moreover, such studies introduce new concepts in the "old" field of chemistry and stimulate the ingenuity of researchers engaged in the "bottom-up" approach to nanotechnology. PMID:12596465

  6. Computerized logic design of digital circuits

    NASA Technical Reports Server (NTRS)

    Sussow, S.; Oglesby, R.

    1973-01-01

    This manual presents a computer program that performs all the work required for the logic design of digital counters or sequential circuits and the simplification of Boolean logic expressions. The program provides both the experienced and inexperienced logic designer with a comprehensive logic design capability. The manual contains Boolean simplification and sequential design theory, detailed instructions for use of the program, a large number of illustrative design examples, and complete program documentation.

  7. New Logic Circuit with DC Parametric Excitation

    NASA Astrophysics Data System (ADS)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  8. Faster Evolution of More Multifunctional Logic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Zebulum, Ricardo

    2005-01-01

    A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

  9. Tri-state logic circuit

    NASA Technical Reports Server (NTRS)

    Pryor, Richard Lee (Inventor)

    1977-01-01

    A line driver including a pair of complementary transistors having their conduction paths serially connected between an operating and a reference potential and their bases connected through a first switch to a signal input terminal. A second switch is connected between the common base connection and the common connection of the conduction paths. With the second switch open and the first closed, an output voltage, responsive to the input signal, corresponding to first or second binary values is obtained. When the second switch is closed and the first opened, the transistor pair is turned off, disconnecting the line driver from its load, thereby providing tri-state logic operation.

  10. Demonstrating Boolean Logic Using Simple Electrical Circuits

    ERIC Educational Resources Information Center

    McElhaney, Kevin W.

    2004-01-01

    While exploring the subject of geometric proofs, boolean logic operators AND and OR can be used to allow students to visualize their true-or-false patterns. An activity in the form of constructing electrical circuits is illustrated to explain the concept.

  11. Starting Circuit For Erasable Programmable Logic Device

    NASA Technical Reports Server (NTRS)

    Cole, Steven W.

    1990-01-01

    Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.

  12. Nonlinear dynamics based digital logic and circuits

    PubMed Central

    Kia, Behnam; Lindner, John. F.; Ditto, William L.

    2015-01-01

    We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two. PMID:26029096

  13. Nanoeletromechanical switch and logic circuits formed therefrom

    DOEpatents

    Nordquist, Christopher D.; Czaplewski, David A.

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  14. Explicit Logic Circuits Discriminate Neural States

    PubMed Central

    Yoder, Lane

    2009-01-01

    The magnitude and apparent complexity of the brain's connectivity have left explicit networks largely unexplored. As a result, the relationship between the organization of synaptic connections and how the brain processes information is poorly understood. A recently proposed retinal network that produces neural correlates of color vision is refined and extended here to a family of general logic circuits. For any combination of high and low activity in any set of neurons, one of the logic circuits can receive input from the neurons and activate a single output neuron whenever the input neurons have the given activity state. The strength of the output neuron's response is a measure of the difference between the smallest of the high inputs and the largest of the low inputs. The networks generate correlates of known psychophysical phenomena. These results follow directly from the most cost-effective architectures for specific logic circuits and the minimal cellular capabilities of excitation and inhibition. The networks function dynamically, making their operation consistent with the speed of most brain functions. The networks show that well-known psychophysical phenomena do not require extraordinarily complex brain structures, and that a single network architecture can produce apparently disparate phenomena in different sensory systems. PMID:19127299

  15. Predicting the reliability of electronic circuits.

    SciTech Connect

    Loescher, Douglas H.

    2004-06-01

    Procedures to predict the reliability of electrical circuits are discussed. Three cases are introduced and discussed. In Case 1, an analyst predicts the probability of any failure in the intended relations between circuit inputs and circuit outputs. In Case 2, an analyst predicts the probability that specified unintended outputs would occur. In Case 3, an analyst considers coupling between circuits. Logic models are given for the three cases, and sources of failure probabilities of components are mentioned. Methods of analysis are given, software tools are mentioned, and recommendations for presentation and review of results are discussed.

  16. Fluid logic control circuit operates nutator actuator motor

    NASA Technical Reports Server (NTRS)

    1966-01-01

    Fluid logic control circuit operates a pneumatic nutator actuator motor. It has no moving parts and consists of connected fluid interaction devices. The operation of this circuit demonstrates the ability of fluid interaction devices to operate in a complex combination of series and parallel logic sequence.

  17. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  18. Reprogrammable Logic Gate and Logic Circuit Based on Multistimuli-Responsive Raspberry-like Micromotors.

    PubMed

    Zhang, Lina; Zhang, Hui; Liu, Mei; Dong, Bin

    2016-06-22

    In this paper, we report a polymer-based raspberry-like micromotor. Interestingly, the resulting micromotor exhibits multistimuli-responsive motion behavior. Its on-off-on motion can be regulated by the application of stimuli such as H2O2, near-infrared light, NH3, or their combinations. Because of the versatility in motion control, the current micromotor has great potential in the application field of logic gate and logic circuit. With use of different stimuli as the inputs and the micromotor motion as the output, reprogrammable OR and INHIBIT logic gates or logic circuit consisting of OR, NOT, and AND logic gates can be achieved. PMID:27237969

  19. A transition calculus for Boolean functions. [logic circuit analysis

    NASA Technical Reports Server (NTRS)

    Tucker, J. H.; Bennett, A. W.

    1974-01-01

    A transition calculus is presented for analyzing the effect of input changes on the output of logic circuits. The method is closely related to the Boolean difference, but it is more powerful. Both differentiation and integration are considered.

  20. Logic Circuits as a Vehicle for Technological Literacy.

    ERIC Educational Resources Information Center

    Hazeltine, Barrett

    1985-01-01

    Provides basic information on logic circuits, points out that the topic is a good vehicle for developing technological literacy. The subject could be included in such courses as philosophy, computer science, communications, as well as in courses dealing with electronic circuits. (JN)

  1. Delay modeling of bipolar ECL/EFL (Emitter-Coupled Logic/Emitter-Follower-Logic) circuits

    NASA Astrophysics Data System (ADS)

    Yang, Andrew T.

    1986-08-01

    This report deals with the development of a delay-time model for timing simulation of large circuits consisting of Bipolar ECL(Emitter-Coupled Logic) and EFL (Emitter-Follower-Logic) networks. This model can provide adequate information on the performance of the circuits with a minimum expenditure of computation time. This goal is achieved by the use of proper circuit transient models on which analytical delay expressions can be derived with accurate results. The delay-model developed in this report is general enough to handle complex digital circuits with multiple inputs or/and multiple levels. The important effects of input slew rate are also included in the model.

  2. Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors

    PubMed Central

    Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C. P.; Gelinck, Gerwin H.; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

    2016-01-01

    Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics. PMID:27762321

  3. Logical and arithmetic circuits in Belousov-Zhabotinsky encapsulated disks

    NASA Astrophysics Data System (ADS)

    Holley, Julian; Jahan, Ishrat; de Lacy Costello, Ben; Bull, Larry; Adamatzky, Andrew

    2011-11-01

    Excitation waves on a subexcitable Belousov-Zhabotinsky (BZ) substrate can be manipulated by chemical variations in the substrate and by interactions with other waves. Symbolic assignment and interpretation of wave dynamics can be used to perform logical and arithmetic computations. We present chemical analogs of elementary logic and arithmetic circuits created entirely from interconnected arrangements of individual BZ encapsulated cell-like disk. Interdisk wave migration is confined in carefully positioned connecting pores. This connection limits wave expansion and unifies the input-output characteristic of the disks. Circuit designs derived from numeric simulations are optically encoded onto a homogeneous photosensitive BZ substrate.

  4. Integrated logic circuits using single-atom transistors.

    PubMed

    Mol, J A; Verduijn, J; Levine, R D; Remacle, F; Rogge, S

    2011-08-23

    Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal-oxide-semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch. PMID:21808050

  5. Controlling High Power Devices with Computers or TTL Logic Circuits

    ERIC Educational Resources Information Center

    Carlton, Kevin

    2002-01-01

    Computers are routinely used to control experiments in modern science laboratories. This should be reflected in laboratories in an educational setting. There is a mismatch between the power that can be delivered by a computer interfacing card or a TTL logic circuit and that required by many practical pieces of laboratory equipment. One common way…

  6. Efficient G(sup 4)FET-Based Logic Circuits

    NASA Technical Reports Server (NTRS)

    Vatan, Farrokh

    2008-01-01

    A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

  7. Mimicking the biological neural system using electronic logic circuits

    NASA Astrophysics Data System (ADS)

    Kirikera, Goutham R.; Shinde, Vishal; Kang, Inpil; Schulz, Mark J.; Shanov, Vesselin; Datta, Saurabh; Hurd, Doug; Westheider, Bo; Sundaresan, Mannur; Ghoshal, Anindya

    2004-07-01

    Detecting and locating cracks in structural components and joints that have high feature densities is a challenging problem in the field of Structural Health Monitoring. There have been advances in piezoelectric sensors, actuators, wave propagation, MEMS, and optical fiber sensors. However, few sensor-signal processing techniques have been applied to the monitoring of joints and complex structural geometries. This is in part because maintaining and analyzing a large amount of data obtained from a large number of sensors that may be needed to monitor joints for cracks is difficult. Reliable low cost assessment of the health of structures is crucial to maintain operational availability and productivity, reduce maintenance cost, and prevent catastrophic failure of large structures such as wind turbines, aircraft, and civil infrastructure. Recently, there have also been advances in development of simple passive techniques for health monitoring including a technique based on mimicking the biological neural system using electronic logic circuits. This technique aids in reducing the required number of data acquisition channels by a factor of ten or more and is able to predict the location of a crack within a rectangular grid or within an arbitrarily arranged network of continuous sensors or neurons. The current paper shows results obtained by implementing this method on an aluminum plate and joint. The plates were tested using simulated acoustic emissions and also loading via an MTS machine. The testing indicates that the neural system can monitor complex joints and detect acoustic emissions due to propagating cracks. High sensitivity of the neural system is needed, and further sensor development and testing on different types of joints is required. Also indicated is that sensor geometry, sensor location, signal filtering, and logic parameters of the neural system will be specific to the particular type of joint (material, thickness, geometry) being monitored. Also, a

  8. Interlocked DNA nanostructures controlled by a reversible logic circuit.

    PubMed

    Li, Tao; Lohmann, Finn; Famulok, Michael

    2014-09-17

    DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.

  9. Interlocked DNA nanostructures controlled by a reversible logic circuit

    PubMed Central

    Li, Tao; Lohmann, Finn; Famulok, Michael

    2014-01-01

    DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems. PMID:25229207

  10. G(sup 4)FET Implementations of Some Logic Circuits

    NASA Technical Reports Server (NTRS)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  11. Implementation of a genetic logic circuit: bio-register.

    PubMed

    Lin, Chun-Liang; Kuo, Ting-Yu; Chen, Yang-Yi

    2015-12-01

    We introduce an idea of synthesizing a class of genetic registers based on the existing sequential biological circuits, which are composed of fundamental biological gates. In the renowned literature, biological gates and genetic oscillator have been unveiled and experimentally realized in recent years. These biological circuits have formed a basis for realizing a primitive biocomputer. In the traditional computer architecture, there is an intermediate load-store section, i.e. a register, which serves as a part of the digital processor. With which, the processor can load data from a larger memory into it and proceed to conduct necessary arithmetic or logic operations. Then, manipulated data are stored back to the memory by instruction via the register. We propose here a class of bio-registers for the biocomputer. Four types of register structures are presented. In silicon experiments illustrate results of the proposed design. PMID:26702308

  12. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

  13. DOIND: a technique for leakage reduction in nanoscale domino logic circuits

    NASA Astrophysics Data System (ADS)

    Prasad Shah, Ambika; Neema, Vaibhav; Daulatabad, Shreeniwas

    2016-05-01

    A novel DOIND logic approach is proposed for domino logic, which reduces the leakage current with a minimum delay penalty. Simulation is performed at 70 nm technology node with supply voltage 1V for domino logic and DOIND logic based AND, OR, XOR and Half Adder circuits using the tanner EDA tool. Simulation results show that the proposed DOIND approach decreases the average leakage current by 68.83%, 66.6%, 77.86% and 74.34% for 2 input AND, OR, XOR and Half Adder respectively. The proposed approach also has 47.76% improvement in PDAP for the buffer circuit as compared to domino logic.

  14. A novel circuit design for complementary resistive switch-based stateful logic operations

    NASA Astrophysics Data System (ADS)

    Xiao-Ping, Wang; Lin, Chen; Yi, Shen; Bo-Wen, Xu

    2016-05-01

    Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch (CRS)-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits. Project supported by the National Natural Science Foundation of China (Grant Nos. 61374150 and 11271146), the State Key Program of the National Natural Science Foundation of China (Grant No. 61134012), the Doctoral Fund of Ministry of Education of China (Grant No. 20130142130012), and the Science and Technology Program of Shenzhen City, China (Grant No. JCYJ20140509162710496).

  15. Three-input majority logic gate and multiple input logic circuit based on DNA strand displacement.

    PubMed

    Li, Wei; Yang, Yang; Yan, Hao; Liu, Yan

    2013-06-12

    In biomolecular programming, the properties of biomolecules such as proteins and nucleic acids are harnessed for computational purposes. The field has gained considerable attention due to the possibility of exploiting the massive parallelism that is inherent in natural systems to solve computational problems. DNA has already been used to build complex molecular circuits, where the basic building blocks are logic gates that produce single outputs from one or more logical inputs. We designed and experimentally realized a three-input majority gate based on DNA strand displacement. One of the key features of a three-input majority gate is that the three inputs have equal priority, and the output will be true if any of the two inputs are true. Our design consists of a central, circular DNA strand with three unique domains between which are identical joint sequences. Before inputs are introduced to the system, each domain and half of each joint is protected by one complementary ssDNA that displays a toehold for subsequent displacement by the corresponding input. With this design the relationship between any two domains is analogous to the relationship between inputs in a majority gate. Displacing two or more of the protection strands will expose at least one complete joint and return a true output; displacing none or only one of the protection strands will not expose a complete joint and will return a false output. Further, we designed and realized a complex five-input logic gate based on the majority gate described here. By controlling two of the five inputs the complex gate can realize every combination of OR and AND gates of the other three inputs.

  16. Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators.

    PubMed

    Qiu, Ciyuan; Gao, Weilu; Soref, Richard; Robinson, Jacob T; Xu, Qianfan

    2014-12-15

    Here we demonstrate a reconfigurable electro-optical directed-logic circuit based on a regular array of integrated optical switches. Each 1×1 optical switch consists of a micro-ring resonator with an embedded lateral p-n junction and a micro-heater. We achieve high-speed on-off switching by applying electrical logic signals to the p-n junction. We can configure the operation mode of each switch by thermal tuning the resonance wavelength. The result is an integrated optical circuit that can be reconfigured to perform any combinational logic operation. As a proof-of-principle, we fabricated a multi-spectral directed-logic circuit based on a fourfold array of switches and showed that this circuit can be reconfigured to perform arbitrary two-input logic functions with speeds up to 3  GB/s.

  17. Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

    NASA Astrophysics Data System (ADS)

    Mitra, Kalyan Yoti; Sowade, Enrico; Martínez-Domingo, Carme; Ramon, Eloi; Carrabina, Jordi; Gomes, Henrique Leonel; Baumann, Reinhard R.

    2015-02-01

    Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as "Bridging Platform". This transfer to "Bridging Platform" from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

  18. Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

    SciTech Connect

    Mitra, Kalyan Yoti E-mail: enrico.sowade@mb.tu-chemnitz.de; Sowade, Enrico E-mail: enrico.sowade@mb.tu-chemnitz.de; Martínez-Domingo, Carme; Ramon, Eloi; Carrabina, Jordi; Gomes, Henrique Leonel; Baumann, Reinhard R.

    2015-02-17

    Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as 'Bridging Platform'. This transfer to 'Bridging Platform' from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

  19. Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

    PubMed

    LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

    2014-06-01

    We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

  20. Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

    SciTech Connect

    Lashin, A. V. Kozyrev, A. V.

    2015-09-15

    One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

  1. Feasibility study of logic circuits with a spin wave bus.

    PubMed

    Khitun, Alexander; Nikonov, Dmitri E; Bao, Mingqiang; Galatsis, Kosmas; Wang, Kang L

    2007-11-21

    We present a feasibility study of logic circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, logic circuits with a spin wave bus do not use charge as an information carrier. In this work we describe the general concept of logic circuits with a spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. The spin wave bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of a spin wave bus is, however, an interface between electronic circuits and integrated spintronics circuits. The logic circuits with a spin wave bus allow us to provide wireless read-in and read-out.

  2. Towards electromechanical computation: An alternative approach to realize complex logic circuits

    NASA Astrophysics Data System (ADS)

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-08-01

    Electromechanical computing based on micro/nano resonators has recently attracted significant attention. However, full implementation of this technology has been hindered by the difficulty in realizing complex logic circuits. We report here an alternative approach to realize complex logic circuits based on multiple MEMS resonators. As case studies, we report the construction of a single-bit binary comparator, a single-bit 4-to-2 encoder, and parallel XOR/XNOR and AND/NOT logic gates. Toward this, several microresonators are electrically connected and their resonance frequencies are tuned through an electrothermal modulation scheme. The microresonators operating in the linear regime do not require large excitation forces, and work at room temperature and at modest air pressure. This study demonstrates that by reconfiguring the same basic building block, tunable resonator, several essential complex logic functions can be achieved.

  3. Logic circuit prototypes for three-terminal magnetic tunnel junctions with mobile domain walls

    NASA Astrophysics Data System (ADS)

    Currivan-Incorvia, J. A.; Siddiqui, S.; Dutta, S.; Evarts, E. R.; Zhang, J.; Bono, D.; Ross, C. A.; Baldo, M. A.

    2016-01-01

    Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation.

  4. Logic circuit prototypes for three-terminal magnetic tunnel junctions with mobile domain walls

    PubMed Central

    Currivan-Incorvia, J. A.; Siddiqui, S.; Dutta, S.; Evarts, E. R.; Zhang, J.; Bono, D.; Ross, C. A.; Baldo, M. A.

    2016-01-01

    Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation. PMID:26754412

  5. Experimental investigation of a four-qubit linear-optical quantum logic circuit

    NASA Astrophysics Data System (ADS)

    Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.

    2016-09-01

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1>. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.

  6. Experimental investigation of a four-qubit linear-optical quantum logic circuit

    PubMed Central

    Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.

    2016-01-01

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses. PMID:27647176

  7. Experimental investigation of a four-qubit linear-optical quantum logic circuit.

    PubMed

    Stárek, R; Mičuda, M; Miková, M; Straka, I; Dušek, M; Ježek, M; Fiurášek, J

    2016-09-20

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C(3)Z gate and several two-qubit and single-qubit gates. The C(3)Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.

  8. Experimental investigation of a four-qubit linear-optical quantum logic circuit.

    PubMed

    Stárek, R; Mičuda, M; Miková, M; Straka, I; Dušek, M; Ježek, M; Fiurášek, J

    2016-01-01

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C(3)Z gate and several two-qubit and single-qubit gates. The C(3)Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses. PMID:27647176

  9. Energy-Efficient and Secure S-Box circuit using Symmetric Pass Gate Adiabatic Logic

    SciTech Connect

    Kumar, Dinesh; Mohammad, Azhar; Singh, Vijay; Perumalla, Kalyan S

    2016-01-01

    Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for lowpower portable electronic devices and Internet-of-Things (IoT) based electronic devices.

  10. Designing of Low-Power VLSI Circuits using Non-Clocked Logic Style

    NASA Astrophysics Data System (ADS)

    Sharma, Vishal; Srivastava, Jitendra Kaushal

    2012-08-01

    Due to the trade-off between power, area and performance, various efforts have been done. This work is also based to reduce the power dissipation of the vlsi circuits with the performance upto the acceptable level. The dominant term in a well designed vlsi circuit is the switching power and low-power design thus becomes the task of minimizing this switching power. So, to design a low-power vlsi circuit, it is preferable to use Nonclocked logic styles as they have less switching power. In this work various Non-clocked logic styles are compared by performing transistor level simulations for half adder circuit using TSMC 0.18 µm Technology and Eldo simulator of Mentor graphics.

  11. The universal fuzzy logical framework of neural circuits and its application in modeling primary visual cortex.

    PubMed

    Hu, Hong; Li, Su; Wang, YunJiu; Qi, XiangLin; Shi, ZhongZhi

    2008-10-01

    Analytical study of large-scale nonlinear neural circuits is a difficult task. Here we analyze the function of neural systems by probing the fuzzy logical framework of the neural cells' dynamical equations. Although there is a close relation between the theories of fuzzy logical systems and neural systems and many papers investigate this subject, most investigations focus on finding new functions of neural systems by hybridizing fuzzy logical and neural system. In this paper, the fuzzy logical framework of neural cells is used to understand the nonlinear dynamic attributes of a common neural system by abstracting the fuzzy logical framework of a neural cell. Our analysis enables the educated design of network models for classes of computation. As an example, a recurrent network model of the primary visual cortex has been built and tested using this approach.

  12. A hybrid nanomemristor/transistor logic circuit capable of self-programming.

    PubMed

    Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

    2009-02-10

    Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

  13. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    NASA Technical Reports Server (NTRS)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  14. Proposal for all-graphene monolithic logic circuits

    NASA Astrophysics Data System (ADS)

    Kang, Jiahao; Sarkar, Deblina; Khatami, Yasin; Banerjee, Kaustav

    2013-08-01

    Since the very inception of integrated circuits, dissimilar materials have been used for fabricating devices and interconnects. Typically, semiconductors are used for devices and metals are used for interconnecting them. This, however, leads to a "contact resistance" between them that degrades device and circuit performance, especially for nanoscale technologies. This letter introduces and explores an "all-graphene" device-interconnect co-design scheme, where a single 2-dimensional sheet of monolayer graphene is proposed to be monolithically patterned to form both active devices (graphene nanoribbon tunnel-field-effect-transistors) as well as interconnects in a seamless manner. Thereby, the use of external contacts is alleviated, resulting in substantial reduction in contact parasitics. Calculations based on tight-binding theory and Non-Equilibrium Green's Function (NEGF) formalism solved self-consistently with the Poisson's equation are used to analyze the intricate properties of the proposed structure. This constitutes the first NEGF simulation based demonstration that devices and interconnects can be built using the "same starting material" - graphene. Moreover, it is also shown that all-graphene circuits can surpass the static performances of the 22 nm complementary metal-oxide-semiconductor devices, including minimum operable supply voltage, static noise margin, and power consumption.

  15. Introduction to Number Systems, Boolean Algebra, Logic Circuits. Navy Electricity and Electronics Training Series. Module 13.

    ERIC Educational Resources Information Center

    Naval Education and Training Program Development Center, Pensacola, FL.

    This textbook is one of a series of publications designed to provide information needed by Navy personnel whose duties require an elementary and general knowledge of the fundamental concepts of number systems, logic circuits, and Boolean algebra. Topic 1, Number Systems, describes the radix; the positional notation; the decimal, binary, octal, and…

  16. Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

    NASA Astrophysics Data System (ADS)

    Crha, Adam; Růžička, Richard; Šimek, Václav

    2016-01-01

    Multifunctional logic continuously becomes an important way how to implement compact and cheap circuits with intrinsic reconfiguration features. Polymorphic electronics concept with its substantial technological independency opens a way to fulfil this objective through the adoption of emerging semiconductor technologies and advanced synthesis methods. The paper comes with a proposal of a novel synthesis method oriented on the exploitation of polymorphic electronics principles. Key part of it is based on Boolean divisor identification and function kernelling technique. The proposed method is evaluated with several test circuits.

  17. How Young Children Understand Electric Circuits: Prediction, Explanation and Exploration

    ERIC Educational Resources Information Center

    Glauert, Esme Bridget

    2009-01-01

    This paper reports findings from a study of young children's views about electric circuits. Twenty-eight children aged 5 and 6 years were interviewed. They were shown examples of circuits and asked to predict whether they would work and explain why. They were then invited to try out some of the circuit examples or make circuits of their own…

  18. Circuit Sense for Elementary Teachers and Students: Understanding and Building Simple Logic Circuits.

    ERIC Educational Resources Information Center

    Houghton, Janaye Matteson; Houghton, Robert S.

    Today and in the future, critical toolmaking advances will need to be made in the area of circuit design, construction, and implementation. Traditional school curriculum has sidestepped the area of tool design, especially at the elementary level. This publication addresses a calling for a new curriculum direction, based not only on the study of…

  19. Multistationarity, the basis of cell differentiation and memory. II. Logical analysis of regulatory networks in terms of feedback circuits.

    PubMed

    Thomas, R.; Kaufman, M.

    2001-03-01

    Circuits and their involvement in complex dynamics are described in differential terms in Part I of this work. Here, we first explain why it may be appropriate to use a logical description, either by itself or in symbiosis with the differential description. The major problem of a logical description is to find an adequate way to involve time. The procedure we adopted differs radically from the classical one by its fully asynchronous character. In Sec. II we describe our "naive" logical approach, and use it to illustrate the major laws of circuitry (namely, the involvement of positive circuits in multistationarity and of negative circuits in periodicity) and in a biological example. Already in the naive description, the major steps of the logical description are to: (i) describe a model as a set of logical equations, (ii) derive the state table from the equations, (iii) derive the graph of the sequences of states from the state table, and (iv) determine which of the possible pathways will be actually followed in terms of time delays. In the following sections we consider multivalued variables where required, the introduction of logical parameters and of logical values ascribed to the thresholds, and the concept of characteristic state of a circuit. This generalized logical description provides an image whose qualitative fit with the differential description is quite remarkable. A major interest of the generalized logical description is that it implies a limited and often quite small number of possible combinations of values of the logical parameters. The space of the logical parameters is thus cut into a limited number of boxes, each of which is characterized by a defined qualitative behavior of the system. Our analysis tells which constraints on the logical parameters must be fulfilled in order for any circuit (or combination of circuits) to be functional. Functionality of a circuit will result in multistationarity (in the case of a positive circuit) or in a cycle

  20. A new way of predicting cement strength -- Fuzzy logic

    SciTech Connect

    Gao Faliang

    1997-06-01

    This paper is to analyze the fuzzy logic method of predicting cement strength and to calculate some samples with fuzzy models. In order to compare, samples of them are calculated with regression method. All of results are shown in both root mean square error and scattered map.

  1. Implementation of Complex Biological Logic Circuits Using Spatially Distributed Multicellular Consortia

    PubMed Central

    Urrios, Arturo; de Nadal, Eulàlia; Solé, Ricard; Posas, Francesc

    2016-01-01

    Engineered synthetic biological devices have been designed to perform a variety of functions from sensing molecules and bioremediation to energy production and biomedicine. Notwithstanding, a major limitation of in vivo circuit implementation is the constraint associated to the use of standard methodologies for circuit design. Thus, future success of these devices depends on obtaining circuits with scalable complexity and reusable parts. Here we show how to build complex computational devices using multicellular consortia and space as key computational elements. This spatial modular design grants scalability since its general architecture is independent of the circuit’s complexity, minimizes wiring requirements and allows component reusability with minimal genetic engineering. The potential use of this approach is demonstrated by implementation of complex logical functions with up to six inputs, thus demonstrating the scalability and flexibility of this method. The potential implications of our results are outlined. PMID:26829588

  2. Architecture design of resistor/FET-logic demultiplexer for hybrid CMOS/nanodevice circuit interconnect.

    PubMed

    Li, Shu; Zhang, Tong

    2008-05-01

    Hybrid nanoelectronics consisting of nanodevice crossbars on top of CMOS backplane circuits is emerging as one viable option to sustain Moore's law after the CMOS scaling limit is reached. One main design challenge in such hybrid nanoelectronics is the interface between the highly dense nanowires in nanodevice crossbars and relatively coarse microwires in the CMOS domain. Such an interface can be realized through a logic circuit called a demultiplexer (demux). In this context, all the prior work on demux design uses a single type of device, such as resistor, diode or field effect transistor (FET), to realize the demultiplexing function. However, different types of devices have their own advantages and disadvantages in terms of functionality, manufacturability, speed and power consumption. This makes none of them provide a satisfactory solution. To tackle this challenge, this work proposes to combine resistor with FET to implement the demux, leading to the hybrid resistor/FET-logic demux. Such hybrid demux architecture can make these two types of devices complement each other well to improve the overall demux design effectiveness. Furthermore, due to the inevitable fabrication process variations at the nanoscale, the effects of resistor conductance and FET threshold voltage variability are analyzed and evaluated based on computer simulations. The simulation results provide the requirement on the fabrication process to ensure a high demux reliability, and promise the hybrid resistor/FET-logic demux an improved addressability and process variance tolerance.

  3. Mixed logic style adder circuit designed and fabricated using SOI substrate for irradiation-hardened experiment

    NASA Astrophysics Data System (ADS)

    Yuan, Shoucai; Liu, Yamei

    2016-08-01

    This paper proposed a rail to rail swing, mixed logic style 28-transistor 1-bit full adder circuit which is designed and fabricated using silicon-on-insulator (SOI) substrate with 90 nm gate length technology. The main goal of our design is space application where circuits may be damaged by outer space radiation; so the irradiation-hardened technique such as SOI structure should be used. The circuit's delay, power and power-delay product (PDP) of our proposed gate diffusion input (GDI)-based adder are HSPICE simulated and compared with other reported high-performance 1-bit adder. The GDI-based 1-bit adder has 21.61% improvement in delay and 18.85% improvement in PDP, over the reported 1-bit adder. However, its power dissipation is larger than that reported with 3.56% increased but is still comparable. The worst case performance of proposed 1-bit adder circuit is also seen to be less sensitive to variations in power supply voltage (VDD) and capacitance load (CL), over a wide range from 0.6 to 1.8 V and 0 to 200 fF, respectively. The proposed and reported 1-bit full adders are all layout designed and wafer fabricated with other circuits/systems together on one chip. The chip measurement and analysis has been done at VDD = 1.2 V, CL = 20 fF, and 200 MHz maximum input signal frequency with temperature of 300 K.

  4. Hyperbranched Hybridization Chain Reaction for Triggered Signal Amplification and Concatenated Logic Circuits.

    PubMed

    Bi, Sai; Chen, Min; Jia, Xiaoqiang; Dong, Ying; Wang, Zonghua

    2015-07-01

    A hyper-branched hybridization chain reaction (HB-HCR) is presented herein, which consists of only six species that can metastably coexist until the introduction of an initiator DNA to trigger a cascade of hybridization events, leading to the self-sustained assembly of hyper-branched and nicked double-stranded DNA structures. The system can readily achieve ultrasensitive detection of target DNA. Moreover, the HB-HCR principle is successfully applied to construct three-input concatenated logic circuits with excellent specificity and extended to design a security-mimicking keypad lock system. Significantly, the HB-HCR-based keypad lock can alarm immediately if the "password" is incorrect. Overall, the proposed HB-HCR with high amplification efficiency is simple, homogeneous, fast, robust, and low-cost, and holds great promise in the development of biosensing, in the programmable assembly of DNA architectures, and in molecular logic operations. PMID:26012841

  5. Plasmonic-multimode-interference-based logic circuit with simple phase adjustment

    PubMed Central

    Ota, Masashi; Sumimura, Asahi; Fukuhara, Masashi; Ishii, Yuya; Fukuda, Mitsuo

    2016-01-01

    All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques. PMID:27086694

  6. Plasmonic-multimode-interference-based logic circuit with simple phase adjustment

    NASA Astrophysics Data System (ADS)

    Ota, Masashi; Sumimura, Asahi; Fukuhara, Masashi; Ishii, Yuya; Fukuda, Mitsuo

    2016-04-01

    All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

  7. "The developmental and functional logic of neuronal circuits": commentary on the Kavli Prize in Neuroscience.

    PubMed

    Glover, J C

    2009-11-10

    The first Kavli Prize in Neuroscience recognizes a confluence of career achievements that together provide a fundamental understanding of how brain and spinal cord circuits are assembled during development and function in the adult. The members of the Kavli Neuroscience Prize Committee have decided to reward three scientists (Sten Grillner, Thomas Jessell, and Pasko Rakic) jointly "for discoveries on the developmental and functional logic of neuronal circuits". Pasko Rakic performed groundbreaking studies of the developing cerebral cortex, including the discovery of how radial glia guide the neuronal migration that establishes cortical layers and for the radial unit hypothesis and its implications for cortical connectivity and evolution. Thomas Jessell discovered molecular principles governing the specification and patterning of different neuron types and the development of their synaptic interconnection into sensorimotor circuits. Sten Grillner elucidated principles of network organization in the vertebrate locomotor central pattern generator, along with its command systems and sensory and higher order control. The discoveries of Rakic, Jessell and Grillner provide a framework for how neurons obtain their identities and ultimate locations, establish appropriate connections with each other, and how the resultant neuronal networks operate. Their work has significantly advanced our understanding of brain development and function and created new opportunities for the treatment of neurological disorders. Each has pioneered an important area of neuroscience research and left a legacy of exceptional scientific achievement, insight, communication, mentoring and leadership.

  8. Development of an optical parallel logic device and a half-adder circuit for digital optical processing

    NASA Technical Reports Server (NTRS)

    Athale, R. A.; Lee, S. H.

    1978-01-01

    The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.

  9. Proof of concept of directed OR/NOR and AND/NAND logic circuit consisting of two parallel microring resonators.

    PubMed

    Tian, Yonghui; Zhang, Lei; Ji, Ruiqiang; Yang, Lin; Zhou, Ping; Chen, Hongtao; Ding, Jianfeng; Zhu, Weiwei; Lu, Yangyang; Jia, Lianxi; Fang, Qing; Yu, Mingbin

    2011-05-01

    We propose and demonstrate a directed OR/NOR and AND/NAND logic circuit consisting of two parallel microring resonators (MRRs). We use two electrical signals representing the two operands of the logical operation to modulate the two MRRs through the thermo-optic effect, respectively. The final operation results are represented by the output optical signals. Both OR/NOR and AND/NAND operations at 10 kbps are demonstrated.

  10. Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

    NASA Astrophysics Data System (ADS)

    Ayala, Christopher L.; Grogg, Daniel; Bazigos, Antonios; Bleiker, Simon J.; Fernandez-Bolaños, Montserrat; Niklaus, Frank; Hagleitner, Christoph

    2015-11-01

    Nanoelectromechanical (NEM) switches have the potential to complement or replace traditional CMOS transistors in the area of ultra-low-power digital electronics. This paper reports the demonstration of prototype circuits including the first 3-stage ring oscillator built using cell-level digital logic elements based on curved NEM switches. The ring oscillator core occupies an area of 30 μm × 10 μm using 6 NEM switches. Each NEM switch device has a footprint of 5 μm × 3 μm, an air gap of 60 μm and is coated with amorphous carbon (a-C) for reliable operation. The ring oscillator operates at a frequency of 6.7 MHz, and confirms the simulated inverter propagation delay of 25 ns. The successful fabrication and measurement of this demonstrator are key milestones on the way towards an optimized, scaled technology with sub-nanosecond switching times, lower operating voltages and VLSI implementation.

  11. Electro-optic directed XOR logic circuits based on parallel-cascaded micro-ring resonators.

    PubMed

    Tian, Yonghui; Zhao, Yongpeng; Chen, Wenjie; Guo, Anqi; Li, Dezhao; Zhao, Guolin; Liu, Zilong; Xiao, Huifu; Liu, Guipeng; Yang, Jianhong

    2015-10-01

    We report an electro-optic photonic integrated circuit which can perform the exclusive (XOR) logic operation based on two silicon parallel-cascaded microring resonators (MRRs) fabricated on the silicon-on-insulator (SOI) platform. PIN diodes embedded around MRRs are employed to achieve the carrier injection modulation. Two electrical pulse sequences regarded as two operands of operations are applied to PIN diodes to modulate two MRRs through the free carrier dispersion effect. The final operation result of two operands is output at the Output port in the form of light. The scattering matrix method is employed to establish numerical model of the device, and numerical simulator SG-framework is used to simulate the electrical characteristics of the PIN diodes. XOR operation with the speed of 100Mbps is demonstrated successfully.

  12. A novel logic-based approach for quantitative toxicology prediction.

    PubMed

    Amini, Ata; Muggleton, Stephen H; Lodhi, Huma; Sternberg, Michael J E

    2007-01-01

    There is a pressing need for accurate in silico methods to predict the toxicity of molecules that are being introduced into the environment or are being developed into new pharmaceuticals. Predictive toxicology is in the realm of structure activity relationships (SAR), and many approaches have been used to derive such SAR. Previous work has shown that inductive logic programming (ILP) is a powerful approach that circumvents several major difficulties, such as molecular superposition, faced by some other SAR methods. The ILP approach reasons with chemical substructures within a relational framework and yields chemically understandable rules. Here, we report a general new approach, support vector inductive logic programming (SVILP), which extends the essentially qualitative ILP-based SAR to quantitative modeling. First, ILP is used to learn rules, the predictions of which are then used within a novel kernel to derive a support-vector generalization model. For a highly heterogeneous dataset of 576 molecules with known fathead minnow fish toxicity, the cross-validated correlation coefficients (R2CV) from a chemical descriptor method (CHEM) and SVILP are 0.52 and 0.66, respectively. The ILP, CHEM, and SVILP approaches correctly predict 55, 58, and 73%, respectively, of toxic molecules. In a set of 165 unseen molecules, the R2 values from the commercial software TOPKAT and SVILP are 0.26 and 0.57, respectively. In all calculations, SVILP showed significant improvements in comparison with the other methods. The SVILP approach has a major advantage in that it uses ILP automatically and consistently to derive rules, mostly novel, describing fragments that are toxicity alerts. The SVILP is a general machine-learning approach and has the potential of tackling many problems relevant to chemoinformatics including in silico drug design.

  13. Final report on LDRD project :leaky-mode VCSELs for photonic logic circuits.

    SciTech Connect

    Hargett, Terry W.; Hadley, G. Ronald; Serkland, Darwin Keith; Blansett, Ethan L.; Geib, Kent Martin; Sullivan, Charles Thomas; Keeler, Gordon Arthur; Bauer, Thomas; Ongstand, Andrea; Medrano, Melissa R.; Peake, Gregory Merwin; Montano, Victoria A.

    2005-11-01

    This report describes the research accomplishments achieved under the LDRD Project ''Leaky-mode VCSELs for photonic logic circuits''. Leaky-mode vertical-cavity surface-emitting lasers (VCSELs) offer new possibilities for integration of microcavity lasers to create optical microsystems. A leaky-mode VCSEL output-couples light laterally, in the plane of the semiconductor wafer, which allows the light to interact with adjacent lasers, modulators, and detectors on the same wafer. The fabrication of leaky-mode VCSELs based on effective index modification was proposed and demonstrated at Sandia in 1999 but was not adequately developed for use in applications. The aim of this LDRD has been to advance the design and fabrication of leaky-mode VCSELs to the point where initial applications can be attempted. In the first and second years of this LDRD we concentrated on overcoming previous difficulties in the epitaxial growth and fabrication of these advanced VCSELs. In the third year, we focused on applications of leaky-mode VCSELs, such as all-optical processing circuits based on gain quenching.

  14. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

    PubMed

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.

  15. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

    PubMed

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

  16. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

    PubMed Central

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

  17. Protein secondary structure prediction using logic-based machine learning.

    PubMed

    Muggleton, S; King, R D; Sternberg, M J

    1992-10-01

    Many attempts have been made to solve the problem of predicting protein secondary structure from the primary sequence but the best performance results are still disappointing. In this paper, the use of a machine learning algorithm which allows relational descriptions is shown to lead to improved performance. The Inductive Logic Programming computer program, Golem, was applied to learning secondary structure prediction rules for alpha/alpha domain type proteins. The input to the program consisted of 12 non-homologous proteins (1612 residues) of known structure, together with a background knowledge describing the chemical and physical properties of the residues. Golem learned a small set of rules that predict which residues are part of the alpha-helices--based on their positional relationships and chemical and physical properties. The rules were tested on four independent non-homologous proteins (416 residues) giving an accuracy of 81% (+/- 2%). This is an improvement, on identical data, over the previously reported result of 73% by King and Sternberg (1990, J. Mol. Biol., 216, 441-457) using the machine learning program PROMIS, and of 72% using the standard Garnier-Osguthorpe-Robson method. The best previously reported result in the literature for the alpha/alpha domain type is 76%, achieved using a neural net approach. Machine learning also has the advantage over neural network and statistical methods in producing more understandable results. PMID:1480619

  18. Path programmable logic: A structured design method for digital and/or mixed analog integrated circuits

    NASA Technical Reports Server (NTRS)

    Taylor, B.

    1990-01-01

    The design of Integrated Circuits has evolved past the black art practiced by a few semiconductor companies to a world wide community of users. This was basically accomplished by the development of computer aided design tools which were made available to this community. As the tools matured into different components of the design task they were accepted into the community at large. However, the next step in this evolution is being ignored by the large tool vendors hindering the continuation of this process. With system level definition and simulation through the logic specification well understood, why is the physical generation so blatantly ignored. This portion of the development is still treated as an isolated task with information being passed from the designer to the layout function. Some form of result given back but it severely lacks full definition of what has transpired. The level of integration in I.C.'s for tomorrow, whether through new processes or applications will require higher speeds, increased transistor density, and non-digital performance which can only be achieved through attention to the physical implementation.

  19. Logic circuit detects both present and missing negative pulses in superimposed wave trains

    NASA Technical Reports Server (NTRS)

    Rice, R. E.

    1967-01-01

    Pulse divide and determination network provides a logical determination of pulse presence within a data train. The network uses digital logic circuitry to divide positive and negative pulses, to shape the separated pulses, and to determine, by means of coincidence logic, if negative pulses are missing from the pulse train.

  20. Predicting the behavior of microfluidic circuits made from discrete elements

    PubMed Central

    Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-01-01

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand. PMID:26516059

  1. Four-way junction-driven DNA strand displacement and its application in building majority logic circuit.

    PubMed

    Zhu, Jinbo; Zhang, Libing; Dong, Shaojun; Wang, Erkang

    2013-11-26

    We introduced a four-way DNA junction-driven toehold-mediated strand displacement method. Separation of the different functional domains on different strands in the four-way junction structure and usage of glue strand to recombine them for different logic gates make the design more flexible. On the basis of this mechanism, a majority logic circuit fabricated by DNA strands was designed and constructed by assembling three AND gates and one OR gate together. The output strand drew the G-rich segments together to form a split G-quadruplex, which could specifically bind PPIX and enhance its fluorescence. Just like a poll with three voters, the high fluorescence signal would be given off only when two or three voters vote in favor. Upon slight modification, the majority circuit was utilized to select the composite number from 0 to 9 represented by excess-three code. It is a successful attempt to integrate the logic gates into a circuit and to achieve desired functions.

  2. Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits

    NASA Astrophysics Data System (ADS)

    Goudarzi, H.; Dousti, M. J.; Shafaei, A.; Pedram, M.

    2014-05-01

    This paper presents a physical mapping tool for quantum circuits, which generates the optimal universal logic block (ULB) that can, on average, perform any logical fault-tolerant (FT) quantum operations with the minimum latency. The operation scheduling, placement, and qubit routing problems tackled by the quantum physical mapper are highly dependent on one another. More precisely, the scheduling solution affects the quality of the achievable placement solution due to resource pressures that may be created as a result of operation scheduling, whereas the operation placement and qubit routing solutions influence the scheduling solution due to resulting distances between predecessor and current operations, which in turn determines routing latencies. The proposed flow for the quantum physical mapper captures these dependencies by applying (1) a loose scheduling step, which transforms an initial quantum data flow graph into one that explicitly captures the no-cloning theorem of the quantum computing and then performs instruction scheduling based on a modified force-directed scheduling approach to minimize the resource contention and quantum circuit latency, (2) a placement step, which uses timing-driven instruction placement to minimize the approximate routing latencies while making iterative calls to the aforesaid force-directed scheduler to correct scheduling levels of quantum operations as needed, and (3) a routing step that finds dynamic values of routing latencies for the qubits. In addition to the quantum physical mapper, an approach is presented to determine the single best ULB size for a target quantum circuit by examining the latency of different FT quantum operations mapped onto different ULB sizes and using information about the occurrence frequency of operations on critical paths of the target quantum algorithm to weigh these latencies. Experimental results show an average latency reduction of about 40 % compared to previous work.

  3. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    NASA Astrophysics Data System (ADS)

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V‑1 sec‑1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  4. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-09

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  5. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  6. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    PubMed Central

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  7. Toward scalable parts families for predictable design of biological circuits.

    PubMed

    Lucks, Julius B; Qi, Lei; Whitaker, Weston R; Arkin, Adam P

    2008-12-01

    Our current ability to engineer biological circuits is hindered by design cycles that are costly in terms of time and money, with constructs failing to operate as desired, or evolving away from the desired function once deployed. Synthetic biologists seek to understand biological design principles and use them to create technologies that increase the efficiency of the genetic engineering design cycle. Central to the approach is the creation of biological parts--encapsulated functions that can be composited together to create new pathways with predictable behaviors. We define five desirable characteristics of biological parts--independence, reliability, tunability, orthogonality and composability, and review studies of small natural and synthetic biological circuits that provide insights into each of these characteristics. We propose that the creation of appropriate sets of families of parts with these properties is a prerequisite for efficient, predictable engineering of new function in cells and will enable a large increase in the sophistication of genetic engineering applications. PMID:18983935

  8. New dynamic FET logic and serial memory circuits for VLSI GaAs technology

    NASA Technical Reports Server (NTRS)

    Eldin, A. G.

    1991-01-01

    The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

  9. Double gate (DG)-SOI ratioed logic with symmetric DG load??a novel approach for sub 50 nm low-voltage/low-power circuit design

    NASA Astrophysics Data System (ADS)

    Mitra, S.; Salman, A.; Ioannou, D. P.; Tretz, C.; Ioannou, D. E.

    2004-11-01

    In this paper we introduce a novel logic gate family based on Double Gate (DG) SOI MOSFETs for low voltage/low power circuits. The logic gates are based on ratioed logic with depletion-mode (i.e., intrinsically on) Symmetric DG (SDG) load transistors and inversion-mode Asymmetric DG (ADG) driver transistors. Using this technique a basic inverter was designed, with better performance compared to "classical" CMOS DG design. This technique was extended to create a complete set of basic logic gates including NOR2, NAND2 and XOR2 gates.

  10. Predicting recycling behaviour: Comparison of a linear regression model and a fuzzy logic model.

    PubMed

    Vesely, Stepan; Klöckner, Christian A; Dohnal, Mirko

    2016-03-01

    In this paper we demonstrate that fuzzy logic can provide a better tool for predicting recycling behaviour than the customarily used linear regression. To show this, we take a set of empirical data on recycling behaviour (N=664), which we randomly divide into two halves. The first half is used to estimate a linear regression model of recycling behaviour, and to develop a fuzzy logic model of recycling behaviour. As the first comparison, the fit of both models to the data included in estimation of the models (N=332) is evaluated. As the second comparison, predictive accuracy of both models for "new" cases (hold-out data not included in building the models, N=332) is assessed. In both cases, the fuzzy logic model significantly outperforms the regression model in terms of fit. To conclude, when accurate predictions of recycling and possibly other environmental behaviours are needed, fuzzy logic modelling seems to be a promising technique. PMID:26774211

  11. Predicting recycling behaviour: Comparison of a linear regression model and a fuzzy logic model.

    PubMed

    Vesely, Stepan; Klöckner, Christian A; Dohnal, Mirko

    2016-03-01

    In this paper we demonstrate that fuzzy logic can provide a better tool for predicting recycling behaviour than the customarily used linear regression. To show this, we take a set of empirical data on recycling behaviour (N=664), which we randomly divide into two halves. The first half is used to estimate a linear regression model of recycling behaviour, and to develop a fuzzy logic model of recycling behaviour. As the first comparison, the fit of both models to the data included in estimation of the models (N=332) is evaluated. As the second comparison, predictive accuracy of both models for "new" cases (hold-out data not included in building the models, N=332) is assessed. In both cases, the fuzzy logic model significantly outperforms the regression model in terms of fit. To conclude, when accurate predictions of recycling and possibly other environmental behaviours are needed, fuzzy logic modelling seems to be a promising technique.

  12. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric.

    PubMed

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-01-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm(2) V(-1) sec(-)1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 10(4)), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process. PMID:27184121

  13. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

    PubMed Central

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-01-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V−1 sec−1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process. PMID:27184121

  14. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

    NASA Astrophysics Data System (ADS)

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-05-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V‑1 sec‑1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

  15. Fault-tolerant computer study. [logic designs for building block circuits

    NASA Technical Reports Server (NTRS)

    Rennels, D. A.; Avizienis, A. A.; Ercegovac, M. D.

    1981-01-01

    A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

  16. Design of Reconfigurable Logic Circuits Based on Single-Layer Magnetic-Tunnel-Junction Elements

    NASA Astrophysics Data System (ADS)

    Lee, Seungyeon; Lee, Gamyoung; Lee, Hyunju; Lee, Seungjun; Shin, Hyungsoon

    2008-04-01

    Magnetologic using magnetic tunnel junction (MTJ) elements is one of the most promising logic technologies owing to its ease of integration and non-volatility. A magnetologic structure consisting of a single-layer MTJ and a current driver has been proposed by the same authors, which can provide enhanced functional flexibility and uniformity while requiring fewer fabrication steps. In this study, various merits of magnetologic using single-layer MTJ elements are fully exploited for the design of a reconfigurable logic device. A design of a reconfigurable 3-bit counter using single-layer MTJ is presented, which can be programmed to operate as a gray counter, an up counter, or a down counter. The functional correctness is verified by hspice simulation based on an hspice macromodel of MTJ that we have developed for a magnetologic design.

  17. Morphological elucidation of basal ganglia circuits contributing reward prediction

    PubMed Central

    Fujiyama, Fumino; Takahashi, Susumu; Karube, Fuyuki

    2015-01-01

    Electrophysiological studies in monkeys have shown that dopaminergic neurons respond to the reward prediction error. In addition, striatal neurons alter their responsiveness to cortical or thalamic inputs in response to the dopamine signal, via the mechanism of dopamine-regulated synaptic plasticity. These findings have led to the hypothesis that the striatum exhibits synaptic plasticity under the influence of the reward prediction error and conduct reinforcement learning throughout the basal ganglia circuits. The reinforcement learning model is useful; however, the mechanism by which such a process emerges in the basal ganglia needs to be anatomically explained. The actor–critic model has been previously proposed and extended by the existence of role sharing within the striatum, focusing on the striosome/matrix compartments. However, this hypothesis has been difficult to confirm morphologically, partly because of the complex structure of the striosome/matrix compartments. Here, we review recent morphological studies that elucidate the input/output organization of the striatal compartments. PMID:25698913

  18. Morphological elucidation of basal ganglia circuits contributing reward prediction.

    PubMed

    Fujiyama, Fumino; Takahashi, Susumu; Karube, Fuyuki

    2015-01-01

    Electrophysiological studies in monkeys have shown that dopaminergic neurons respond to the reward prediction error. In addition, striatal neurons alter their responsiveness to cortical or thalamic inputs in response to the dopamine signal, via the mechanism of dopamine-regulated synaptic plasticity. These findings have led to the hypothesis that the striatum exhibits synaptic plasticity under the influence of the reward prediction error and conduct reinforcement learning throughout the basal ganglia circuits. The reinforcement learning model is useful; however, the mechanism by which such a process emerges in the basal ganglia needs to be anatomically explained. The actor-critic model has been previously proposed and extended by the existence of role sharing within the striatum, focusing on the striosome/matrix compartments. However, this hypothesis has been difficult to confirm morphologically, partly because of the complex structure of the striosome/matrix compartments. Here, we review recent morphological studies that elucidate the input/output organization of the striatal compartments. PMID:25698913

  19. Do institutional logics predict interpretation of contract rules at the dental chair-side?

    PubMed

    Harris, Rebecca; Brown, Stephen; Holt, Robin; Perkins, Elizabeth

    2014-12-01

    In quasi-markets, contracts find purchasers influencing health care providers, although problems exist where providers use personal bias and heuristics to respond to written agreements, tending towards the moral hazard of opportunism. Previous research on quasi-market contracts typically understands opportunism as fully rational, individual responses selecting maximally efficient outcomes from a set of possibilities. We take a more emotive and collective view of contracting, exploring the influence of institutional logics in relation to the opportunistic behaviour of dentists. Following earlier qualitative work where we identified four institutional logics in English general dental practice, and six dental contract areas where there was scope for opportunism; in 2013 we surveyed 924 dentists to investigate these logics and whether they had predictive purchase over dentists' chair-side behaviour. Factor analysis involving 300 responses identified four logics entwined in (often technical) behaviour: entrepreneurial commercialism, duty to staff and patients, managerialism, public good. PMID:25441320

  20. Do institutional logics predict interpretation of contract rules at the dental chair-side?

    PubMed

    Harris, Rebecca; Brown, Stephen; Holt, Robin; Perkins, Elizabeth

    2014-12-01

    In quasi-markets, contracts find purchasers influencing health care providers, although problems exist where providers use personal bias and heuristics to respond to written agreements, tending towards the moral hazard of opportunism. Previous research on quasi-market contracts typically understands opportunism as fully rational, individual responses selecting maximally efficient outcomes from a set of possibilities. We take a more emotive and collective view of contracting, exploring the influence of institutional logics in relation to the opportunistic behaviour of dentists. Following earlier qualitative work where we identified four institutional logics in English general dental practice, and six dental contract areas where there was scope for opportunism; in 2013 we surveyed 924 dentists to investigate these logics and whether they had predictive purchase over dentists' chair-side behaviour. Factor analysis involving 300 responses identified four logics entwined in (often technical) behaviour: entrepreneurial commercialism, duty to staff and patients, managerialism, public good.

  1. Do institutional logics predict interpretation of contract rules at the dental chair-side?

    PubMed Central

    Harris, Rebecca; Brown, Stephen; Holt, Robin; Perkins, Elizabeth

    2014-01-01

    In quasi-markets, contracts find purchasers influencing health care providers, although problems exist where providers use personal bias and heuristics to respond to written agreements, tending towards the moral hazard of opportunism. Previous research on quasi-market contracts typically understands opportunism as fully rational, individual responses selecting maximally efficient outcomes from a set of possibilities. We take a more emotive and collective view of contracting, exploring the influence of institutional logics in relation to the opportunistic behaviour of dentists. Following earlier qualitative work where we identified four institutional logics in English general dental practice, and six dental contract areas where there was scope for opportunism; in 2013 we surveyed 924 dentists to investigate these logics and whether they had predictive purchase over dentists' chair-side behaviour. Factor analysis involving 300 responses identified four logics entwined in (often technical) behaviour: entrepreneurial commercialism, duty to staff and patients, managerialism, public good. PMID:25441320

  2. Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

    NASA Technical Reports Server (NTRS)

    Slaughter, D. W.

    1977-01-01

    A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

  3. Flexible logic circuits based on top-gate thin film transistors with printed semiconductor carbon nanotubes and top electrodes

    NASA Astrophysics Data System (ADS)

    Xu, Weiwei; Liu, Zhen; Zhao, Jianwen; Xu, Wenya; Gu, Weibing; Zhang, Xiang; Qian, Long; Cui, Zheng

    2014-11-01

    In this report printed thin film transistors and logic circuits on flexible substrates are reported. The top-gate thin film transistors were made of the sorted semiconducting single-walled carbon nanotubes (sc-SWCNTs) ink as channel material and printed silver lines as top electrodes and interconnect. 5 nm HfOx thin films pre-deposited on PET substrates by atomic layer deposition (ALD) act as the adhesion layers to significantly improve the immobilization efficiency of sc-SWCNTs and environmental stability. The immobilization mechanism was investigated in detail. The flexible partially-printed top-gate SWCNT TFTs display ambipolar characteristics with slightly strong p-type when using 50 nm HfOx thin films as dielectric layer, as well as the encapsulation layer by atomic layer deposition (ALD) at 120 °C. The hole mobility, on/off ratio and subthreshold swing (SS) are ~46.2 cm2 V-1 s-1, 105 and 109 mV per decade, respectively. Furthermore, partially-printed TFTs show small hysteresis, low operating voltage (2 V) and high stability in air. Flexible partially-printed inverters show good performance with voltage gain up to 33 with 1.25 V supply voltage, and can work at 10 kHz. The frequency of flexible partially-printed five-stage ring oscillators can reach 1.7 kHz at supply voltages of 2 V with per stage delay times of 58.8 μs. This work paves a way to achieve printed SWCNT advanced logic circuits and systems on flexible substrates.In this report printed thin film transistors and logic circuits on flexible substrates are reported. The top-gate thin film transistors were made of the sorted semiconducting single-walled carbon nanotubes (sc-SWCNTs) ink as channel material and printed silver lines as top electrodes and interconnect. 5 nm HfOx thin films pre-deposited on PET substrates by atomic layer deposition (ALD) act as the adhesion layers to significantly improve the immobilization efficiency of sc-SWCNTs and environmental stability. The immobilization mechanism

  4. All-metallic electrically gated 2H-TaSe{sub 2} thin-film switches and logic circuits

    SciTech Connect

    Renteria, J.; Jiang, C.; Yan, Z.; Samnakay, R.; Goli, P.; Pope, T. R.; Salguero, T. T.; Wickramaratne, D.; Lake, R. K.; Khitun, A. G.; Balandin, A. A.

    2014-01-21

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe{sub 2} were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe{sub 2}–Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

  5. Vibrational resonance and implementation of dynamic logic gate in a piecewise-linear Murali-Lakshmanan-Chua circuit

    NASA Astrophysics Data System (ADS)

    Venkatesh, P. R.; Venkatesan, A.

    2016-10-01

    We report the occurrence of vibrational resonance in piecewise-linear non-autonomous system. Especially, we show that an optimal amplitude of the high frequency second harmonic driving enhances the response of a piece-wise linear non-autonomous Murali-Lakshmanan-Chua (MLC) system to a low frequency first harmonic signal. This phenomenon is illustrated with the analytical solutions of circuit equations characterising the system and finally compared with the numerical method. Further, it has been enunciated explicitly, the implementation of the fundamental NOR/NAND gate via vibrational resonance, both by numerical and analytical solutions. In addition, these logical behaviours (AND/NAND/OR/NOR) can be decided by the amplitude of the input square waves without altering the system parameters.

  6. Nucleic acid based logical systems.

    PubMed

    Han, Da; Kang, Huaizhi; Zhang, Tao; Wu, Cuichen; Zhou, Cuisong; You, Mingxu; Chen, Zhuo; Zhang, Xiaobing; Tan, Weihong

    2014-05-12

    Researchers increasingly visualize a significant role for artificial biochemical logical systems in biological engineering, much like digital logic circuits in electrical engineering. Those logical systems could be utilized as a type of servomechanism to control nanodevices in vitro, monitor chemical reactions in situ, or regulate gene expression in vivo. Nucleic acids (NA), as carriers of genetic information with well-regulated and predictable structures, are promising materials for the design and engineering of biochemical circuits. A number of logical devices based on nucleic acids (NA) have been designed to handle various processes for technological or biotechnological purposes. This article focuses on the most recent and important developments in NA-based logical devices and their evolution from in vitro, through cellular, even towards in vivo biological applications.

  7. A fuzzy-logic based dual-purpose adaptive circuit for vibration control and energy harvesting using piezoelectric transducer

    NASA Astrophysics Data System (ADS)

    Liu, Zhe Peng; Li, Qing

    2013-04-01

    Due to their two-way electromechanical coupling effect, piezoelectric transducers can be used to synthesize passive vibration control schemes, e.g., RLC circuit with the integration of inductance and resistance elements that is conceptually similar to damped vibration absorber. Meanwhile, the wide usage of wireless sensors has led to the recent enthusiasm of developing piezoelectric-based energy harvesting devices that can convert ambient vibratory energy into useful electrical energy. It can be shown that the integration of circuitry elements such as resistance and inductance can benefit the energy harvesting capability. Here we explore a dual-purpose circuit that can facilitate simultaneous vibration suppression and energy harvesting. It is worth noting that the goal of vibration suppression and the goal of energy harvesting may not always complement each other. That is, the maximization of vibration suppression doesn't necessarily lead to the maximization of energy harvesting, and vice versa. In this research, we develop a fuzzy-logic based algorithm to decide the proper selection of circuitry elements to balance between the two goals. As the circuitry elements can be online tuned, this research yields an adaptive circuitry concept for the effective manipulation of system energy and vibration suppression. Comprehensive analyses are carried out to demonstrate the concept and operation.

  8. Ambipolar MoTe2 transistors and their applications in logic circuits.

    PubMed

    Lin, Yen-Fu; Xu, Yong; Wang, Sheng-Tsung; Li, Song-Lin; Yamamoto, Mahito; Aparecido-Ferreira, Alex; Li, Wenwu; Sun, Huabin; Nakaharai, Shu; Jian, Wen-Bin; Ueno, Keiji; Tsukagoshi, Kazuhito

    2014-05-28

    We report ambipolar charge transport in α-molybdenum ditelluride (MoTe2 ) flakes, whereby the temperature dependence of the electrical characteristics was systematically analyzed. The ambipolarity of the charge transport originated from the formation of Schottky barriers at the metal/MoTe2 contacts. The Schottky barrier heights as well as the current on/off ratio could be modified by modulating the electrostatic fields of the back-gate voltage (Vbg) and drain-source voltage (Vds). Using these ambipolar MoTe2 transistors we fabricated complementary inverters and amplifiers, demonstrating their feasibility for future digital and analog circuit applications. PMID:24692079

  9. Fuzzy logic-based prognostic score for outcome prediction in esophageal cancer.

    PubMed

    Wang, Chang-Yu; Lee, Tsair-Fwu; Fang, Chun-Hsiung; Chou, Jyh-Horng

    2012-11-01

    Given the poor prognosis of esophageal cancer and the invasiveness of combined modality treatment, improved prognostic scoring systems are needed. We developed a fuzzy logic-based system to improve the predictive performance of a risk score based on the serum concentrations of C-reactive protein (CRP) and albumin in a cohort of 271 patients with esophageal cancer before radiotherapy. Univariate and multivariate survival analyses were employed to validate the independent prognostic value of the fuzzy risk score. To further compare the predictive performance of the fuzzy risk score with other prognostic scoring systems, time-dependent receiver operating characteristic curve (ROC) analysis was used. Application of fuzzy logic to the serum values of CRP and albumin increased predictive performance for 1-year overall survival (AUC=0.773) compared with that of a single marker (AUC=0.743 and 0.700 for CRP and albumin, respectively), where the AUC denotes the area under curve. This fuzzy logic-based approach also performed consistently better than the Glasgow Prognostic Score (GPS) (AUC=0.745). Thus, application of fuzzy logic to the analysis of serum markers can more accurately predict the outcome for patients with esophageal cancer.

  10. Optical flip-flops and sequential logic circuits using a liquid crystal light valve

    NASA Technical Reports Server (NTRS)

    Fatehi, M. T.; Collins, S. A., Jr.; Wasmundt, K. C.

    1984-01-01

    This paper is concerned with the application of optics to digital computing. A Hughes liquid crystal light valve is used as an active optical element where a weak light beam can control a strong light beam with either a positive or negative gain characteristic. With this device as the central element the ability to produce bistable states from which different types of flip-flop can be implemented is demonstrated. In this paper, some general comments are first presented on digital computing as applied to optics. This is followed by a discussion of optical implementation of various types of flip-flop. These flip-flops are then used in the design of optical equivalents to a few simple sequential circuits such as shift registers and accumulators. As a typical sequential machine, a schematic layout for an optical binary temporal integrator is presented. Finally, a suggested experimental configuration for an optical master-slave flip-flop array is given.

  11. A hybrid magnetic/complementary metal oxide semiconductor process design kit for the design of low-power non-volatile logic circuits

    NASA Astrophysics Data System (ADS)

    Di Pendina, G.; Prenat, G.; Dieny, B.; Torki, K.

    2012-04-01

    Since the advent of the MOS transistor, the performance of microelectronic circuits has followed Moore's law, stating that their speed and density would double every 18 months. Today, this trend tends to get out of breath: the continuously decreasing size of devices and increasing operation frequency result in power consumption and heating issues. Among the solutions investigated to circumvent these limitations, the use of non-volatile devices appears particularly promising. It allows easing, for example, the power gating technique, which consists in cutting-off the power supply of inactive blocks without losing information, drastically reducing the standby power consumption. In this approach, the advantages of magnetic tunnel junctions (MTJs) compared with other non-volatile devices allow one to design hybrid CMOS/magnetic circuits with high performance and new functionalities. Designing such circuits requires integrating MTJs in standard microelectronics design suites. This is performed by means of a process design kit (PDK) for the hybrid CMOS/magnetic technology. We present here a full magnetic PDK, which contains a compact model of the MTJ for electrical simulation, technology files for layout and physical verifications, and standard cells for the design of complex logic circuits and which is compatible with standard design suites. This PDK allows designers to accurately and comfortably design high-performance hybrid CMOS/magnetic logic circuits in the same way as standard CMOS circuits.

  12. Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI

    NASA Astrophysics Data System (ADS)

    Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander

    2016-03-01

    In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.

  13. Causal Mathematical Logic as a guiding framework for the prediction of "Intelligence Signals" in brain simulations

    NASA Astrophysics Data System (ADS)

    Lanzalaco, Felix; Pissanetzky, Sergio

    2013-12-01

    A recent theory of physical information based on the fundamental principles of causality and thermodynamics has proposed that a large number of observable life and intelligence signals can be described in terms of the Causal Mathematical Logic (CML), which is proposed to encode the natural principles of intelligence across any physical domain and substrate. We attempt to expound the current definition of CML, the "Action functional" as a theory in terms of its ability to possess a superior explanatory power for the current neuroscientific data we use to measure the mammalian brains "intelligence" processes at its most general biophysical level. Brain simulation projects define their success partly in terms of the emergence of "non-explicitly programmed" complex biophysical signals such as self-oscillation and spreading cortical waves. Here we propose to extend the causal theory to predict and guide the understanding of these more complex emergent "intelligence Signals". To achieve this we review whether causal logic is consistent with, can explain and predict the function of complete perceptual processes associated with intelligence. Primarily those are defined as the range of Event Related Potentials (ERP) which include their primary subcomponents; Event Related Desynchronization (ERD) and Event Related Synchronization (ERS). This approach is aiming for a universal and predictive logic for neurosimulation and AGi. The result of this investigation has produced a general "Information Engine" model from translation of the ERD and ERS. The CML algorithm run in terms of action cost predicts ERP signal contents and is consistent with the fundamental laws of thermodynamics. A working substrate independent natural information logic would be a major asset. An information theory consistent with fundamental physics can be an AGi. It can also operate within genetic information space and provides a roadmap to understand the live biophysical operation of the phenotype

  14. Noise-Aided Logic in an Electronic Analog of Synthetic Genetic Networks

    PubMed Central

    Hellen, Edward H.; Dana, Syamal K.; Kurths, Jürgen; Kehler, Elizabeth; Sinha, Sudeshna

    2013-01-01

    We report the experimental verification of noise-enhanced logic behaviour in an electronic analog of a synthetic genetic network, composed of two repressors and two constitutive promoters. We observe good agreement between circuit measurements and numerical prediction, with the circuit allowing for robust logic operations in an optimal window of noise. Namely, the input-output characteristics of a logic gate is reproduced faithfully under moderate noise, which is a manifestation of the phenomenon known as Logical Stochastic Resonance. The two dynamical variables in the system yield complementary logic behaviour simultaneously. The system is easily morphed from AND/NAND to OR/NOR logic. PMID:24124531

  15. Simulation of the Predictive Control Algorithm for Container Crane Operation using Matlab Fuzzy Logic Tool Box

    NASA Technical Reports Server (NTRS)

    Richardson, Albert O.

    1997-01-01

    This research has investigated the use of fuzzy logic, via the Matlab Fuzzy Logic Tool Box, to design optimized controller systems. The engineering system for which the controller was designed and simulate was the container crane. The fuzzy logic algorithm that was investigated was the 'predictive control' algorithm. The plant dynamics of the container crane is representative of many important systems including robotic arm movements. The container crane that was investigated had a trolley motor and hoist motor. Total distance to be traveled by the trolley was 15 meters. The obstruction height was 5 meters. Crane height was 17.8 meters. Trolley mass was 7500 kilograms. Load mass was 6450 kilograms. Maximum trolley and rope velocities were 1.25 meters per sec. and 0.3 meters per sec., respectively. The fuzzy logic approach allowed the inclusion, in the controller model, of performance indices that are more effectively defined in linguistic terms. These include 'safety' and 'cargo swaying'. Two fuzzy inference systems were implemented using the Matlab simulation package, namely the Mamdani system (which relates fuzzy input variables to fuzzy output variables), and the Sugeno system (which relates fuzzy input variables to crisp output variable). It is found that the Sugeno FIS is better suited to including aspects of those plant dynamics whose mathematical relationships can be determined.

  16. Systematic Analysis of Quantitative Logic Model Ensembles Predicts Drug Combination Effects on Cell Signaling Networks

    PubMed Central

    Morris, MK; Clarke, DC; Osimiri, LC

    2016-01-01

    A major challenge in developing anticancer therapies is determining the efficacies of drugs and their combinations in physiologically relevant microenvironments. We describe here our application of “constrained fuzzy logic” (CFL) ensemble modeling of the intracellular signaling network for predicting inhibitor treatments that reduce the phospho‐levels of key transcription factors downstream of growth factors and inflammatory cytokines representative of hepatocellular carcinoma (HCC) microenvironments. We observed that the CFL models successfully predicted the effects of several kinase inhibitor combinations. Furthermore, the ensemble predictions revealed ambiguous predictions that could be traced to a specific structural feature of these models, which we resolved with dedicated experiments, finding that IL‐1α activates downstream signals through TAK1 and not MEKK1 in HepG2 cells. We conclude that CFL‐Q2LM (Querying Quantitative Logic Models) is a promising approach for predicting effective anticancer drug combinations in cancer‐relevant microenvironments. PMID:27567007

  17. Feasibility of using adaptive logic networks to predict compressor unit failure

    SciTech Connect

    Armstrong, W.W.; Chungying Chu; Thomas, M.M.

    1995-12-31

    In this feasibility study, an adaptive logic network (ALN) was trained to predict failures of turbine-driven compressor units using a large database of measurements. No expert knowledge about compressor systems was involved. The predictions used only the statistical properties of the measurements and the indications of failure types. A fuzzy set was used to model measurements typical of normal operation. It was constrained by a requirement imposed during ALN training, that it should have a shape similar to a Gaussian density, more precisely, that its logarithm should be convex-up. Initial results obtained using this approach to knowledge discovery in the database were encouraging.

  18. Discovery of Drug Synergies in Gastric Cancer Cells Predicted by Logical Modeling.

    PubMed

    Flobak, Åsmund; Baudot, Anaïs; Remy, Elisabeth; Thommesen, Liv; Thieffry, Denis; Kuiper, Martin; Lægreid, Astrid

    2015-08-01

    Discovery of efficient anti-cancer drug combinations is a major challenge, since experimental testing of all possible combinations is clearly impossible. Recent efforts to computationally predict drug combination responses retain this experimental search space, as model definitions typically rely on extensive drug perturbation data. We developed a dynamical model representing a cell fate decision network in the AGS gastric cancer cell line, relying on background knowledge extracted from literature and databases. We defined a set of logical equations recapitulating AGS data observed in cells in their baseline proliferative state. Using the modeling software GINsim, model reduction and simulation compression techniques were applied to cope with the vast state space of large logical models and enable simulations of pairwise applications of specific signaling inhibitory chemical substances. Our simulations predicted synergistic growth inhibitory action of five combinations from a total of 21 possible pairs. Four of the predicted synergies were confirmed in AGS cell growth real-time assays, including known effects of combined MEK-AKT or MEK-PI3K inhibitions, along with novel synergistic effects of combined TAK1-AKT or TAK1-PI3K inhibitions. Our strategy reduces the dependence on a priori drug perturbation experimentation for well-characterized signaling networks, by demonstrating that a model predictive of combinatorial drug effects can be inferred from background knowledge on unperturbed and proliferating cancer cells. Our modeling approach can thus contribute to preclinical discovery of efficient anticancer drug combinations, and thereby to development of strategies to tailor treatment to individual cancer patients.

  19. A novel prediction method about single components of analog circuits based on complex field modeling.

    PubMed

    Zhou, Jingyu; Tian, Shulin; Yang, Chenglin

    2014-01-01

    Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments. PMID:25147853

  20. A comparison of neural network models, fuzzy logic, and multiple linear regression for prediction of hatchability.

    PubMed

    Mehri, M

    2013-04-01

    Application of appropriate models to approximate the performance function warrants more precise prediction and helps to make the best decisions in the poultry industry. This study reevaluated the factors affecting hatchability in laying hens from 29 to 56 wk of age. Twenty-eight data lines representing 4 inputs consisting of egg weight, eggshell thickness, egg sphericity, and yolk/albumin ratio and 1 output, hatchability, were obtained from the literature and used to train an artificial neural network (ANN). The prediction ability of ANN was compared with that of fuzzy logic to evaluate the fitness of these 2 methods. The models were compared using R(2), mean absolute deviation (MAD), mean squared error (MSE), mean absolute percentage error (MAPE), and bias. The developed model was used to assess the relative importance of each variable on the hatchability by calculating the variable sensitivity ratio. The statistical evaluations showed that the ANN-based model predicted hatchability more accurately than fuzzy logic. The ANN-based model had a higher determination of coefficient (R(2) = 0.99) and lower residual distribution (MAD = 0.005; MSE = 0.00004; MAPE = 0.732; bias = 0.0012) than fuzzy logic (R(2) = 0.87; MAD = 0.014; MSE = 0.0004; MAPE = 2.095; bias = 0.0046). The sensitivity analysis revealed that the most important variable in the ANN-based model of hatchability was egg weight (variable sensitivity ratio, VSR = 283.11), followed by yolk/albumin ratio (VSR = 113.16), eggshell thickness (VSR = 16.23), and egg sphericity (VSR = 3.63). The results of this research showed that the universal approximation capability of ANN made it a powerful tool to approximate complex functions such as hatchability in the incubation process.

  1. Programmable logic controller implementation of an auto-tuned predictive control based on minimal plant information.

    PubMed

    Valencia-Palomo, G; Rossiter, J A

    2011-01-01

    This paper makes two key contributions. First, it tackles the issue of the availability of constrained predictive control for low-level control loops. Hence, it describes how the constrained control algorithm is embedded in an industrial programmable logic controller (PLC) using the IEC 61131-3 programming standard. Second, there is a definition and implementation of a novel auto-tuned predictive controller; the key novelty is that the modelling is based on relatively crude but pragmatic plant information. Laboratory experiment tests were carried out in two bench-scale laboratory systems to prove the effectiveness of the combined algorithm and hardware solution. For completeness, the results are compared with a commercial proportional-integral-derivative (PID) controller (also embedded in the PLC) using the most up to date auto-tuning rules.

  2. Discovery of Drug Synergies in Gastric Cancer Cells Predicted by Logical Modeling

    PubMed Central

    Flobak, Åsmund; Baudot, Anaïs; Remy, Elisabeth; Thommesen, Liv; Thieffry, Denis; Kuiper, Martin; Lægreid, Astrid

    2015-01-01

    Discovery of efficient anti-cancer drug combinations is a major challenge, since experimental testing of all possible combinations is clearly impossible. Recent efforts to computationally predict drug combination responses retain this experimental search space, as model definitions typically rely on extensive drug perturbation data. We developed a dynamical model representing a cell fate decision network in the AGS gastric cancer cell line, relying on background knowledge extracted from literature and databases. We defined a set of logical equations recapitulating AGS data observed in cells in their baseline proliferative state. Using the modeling software GINsim, model reduction and simulation compression techniques were applied to cope with the vast state space of large logical models and enable simulations of pairwise applications of specific signaling inhibitory chemical substances. Our simulations predicted synergistic growth inhibitory action of five combinations from a total of 21 possible pairs. Four of the predicted synergies were confirmed in AGS cell growth real-time assays, including known effects of combined MEK-AKT or MEK-PI3K inhibitions, along with novel synergistic effects of combined TAK1-AKT or TAK1-PI3K inhibitions. Our strategy reduces the dependence on a priori drug perturbation experimentation for well-characterized signaling networks, by demonstrating that a model predictive of combinatorial drug effects can be inferred from background knowledge on unperturbed and proliferating cancer cells. Our modeling approach can thus contribute to preclinical discovery of efficient anticancer drug combinations, and thereby to development of strategies to tailor treatment to individual cancer patients. PMID:26317215

  3. A logical learning theory explanation of why personality scales predict behavior.

    PubMed

    Gruba-McCallister, F P; Rychlak, J F

    1981-10-01

    An explanation of why personality scales predict is drawn from the tenets of logical learning theory (Rychlak, 1977). This theory holds that behavior is not only responsive in nature, but also telosponsive, i.e., enacted intentionally for the sake of premises. Personality scales tap the subject's premises concerning some aspect of behavior, the meanings of which are then extended in behavior telosponsively so that a prediction to some criterion performance becomes possible. The subject in effect creates the behavior based on his or her premises. An important telosponse inhuman learning is that of affective assessment, which is operationalized as reinforcement value (like-dislike). Two experiments establish the role of reinforcement value in scale measurement and prediction. The first demonstrates that subjects score higher on personality dimensions which they like very much than on dimensions which they greatly dislike. The second experiment then establishes that a personality dimension which a subject both likes and scores highly on is more predictive to an independently assessed manifestation of this personality characteristic than is a comparable dimension which is disliked.

  4. Interference Path Loss Prediction in A319/320 Airplanes Using Modulated Fuzzy Logic and Neural Networks

    NASA Technical Reports Server (NTRS)

    Jafri, Madiha J.; Ely, Jay J.; Vahala, Linda L.

    2007-01-01

    In this paper, neural network (NN) modeling is combined with fuzzy logic to estimate Interference Path Loss measurements on Airbus 319 and 320 airplanes. Interference patterns inside the aircraft are classified and predicted based on the locations of the doors, windows, aircraft structures and the communication/navigation system-of-concern. Modeled results are compared with measured data. Combining fuzzy logic and NN modeling is shown to improve estimates of measured data over estimates obtained with NN alone. A plan is proposed to enhance the modeling for better prediction of electromagnetic coupling problems inside aircraft.

  5. Temporal and Spatial prediction of groundwater levels using Artificial Neural Networks, Fuzzy logic and Kriging interpolation.

    NASA Astrophysics Data System (ADS)

    Tapoglou, Evdokia; Karatzas, George P.; Trichakis, Ioannis C.; Varouchakis, Emmanouil A.

    2014-05-01

    The purpose of this study is to examine the use of Artificial Neural Networks (ANN) combined with kriging interpolation method, in order to simulate the hydraulic head both spatially and temporally. Initially, ANNs are used for the temporal simulation of the hydraulic head change. The results of the most appropriate ANNs, determined through a fuzzy logic system, are used as an input for the kriging algorithm where the spatial simulation is conducted. The proposed algorithm is tested in an area located across Isar River in Bayern, Germany and covers an area of approximately 7800 km2. The available data extend to a time period from 1/11/2008 to 31/10/2012 (1460 days) and include the hydraulic head at 64 wells, temperature and rainfall at 7 weather stations and surface water elevation at 5 monitoring stations. One feedforward ANN was trained for each of the 64 wells, where hydraulic head data are available, using a backpropagation algorithm. The most appropriate input parameters for each wells' ANN are determined considering their proximity to the measuring station, as well as their statistical characteristics. For the rainfall, the data for two consecutive time lags for best correlated weather station, as well as a third and fourth input from the second best correlated weather station, are used as an input. The surface water monitoring stations with the three best correlations for each well are also used in every case. Finally, the temperature for the best correlated weather station is used. Two different architectures are considered and the one with the best results is used henceforward. The output of the ANNs corresponds to the hydraulic head change per time step. These predictions are used in the kriging interpolation algorithm. However, not all 64 simulated values should be used. The appropriate neighborhood for each prediction point is constructed based not only on the distance between known and prediction points, but also on the training and testing error of

  6. Active quench and reset integrated circuit with novel hold-off time control logic for Geiger-mode avalanche photodiodes.

    PubMed

    Deng, Shijie; Morrison, Alan P

    2012-09-15

    This Letter presents an active quench-and-reset circuit for Geiger-mode avalanche photodiodes (GM-APDs). The integrated circuit was fabricated using a conventional 0.35 μm complementary metal oxide semiconductor process. Experimental results show that the circuit is capable of linearly setting the hold-off time from several nanoseconds to microseconds with a resolution of 6.5 ns. This allows the selection of the optimal afterpulse-free hold-off time for the GM-APD via external digital inputs or additional signal processing circuitry. Moreover, this circuit resets the APD automatically following the end of the hold-off period, thus simplifying the control for the end user. Results also show that a minimum dead time of 28.4 ns is achieved, demonstrating a saturated photon-counting rate of 35.2 Mcounts/s.

  7. Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer.

    PubMed

    Dao, Toan Thanh; Sakai, Heisuke; Nguyen, Hai Thanh; Ohkubo, Kei; Fukuzumi, Shunichi; Murata, Hideyuki

    2016-07-20

    We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter. PMID:27348479

  8. Prediction of environmental impacts of quarry blasting operation using fuzzy logic.

    PubMed

    Fişne, Abdullah; Kuzu, Cengiz; Hüdaverdi, Türker

    2011-03-01

    Blast-induced ground vibration is one of the most important environmental impacts of blasting operations because it may cause severe damage to structures and plants in nearby environment. Estimation of ground vibration levels induced by blasting has vital importance for restricting the environmental effects of blasting operations. Several predictor equations have been proposed by various researchers to predict ground vibration prior to blasting, but these are site specific and not generally applicable beyond the specific conditions. In this study, an attempt has been made to predict the peak particle velocity (PPV) with the help of fuzzy logic approach using parameters of distance from blast face to vibration monitoring point and charge weight per delay. The PPV and charge weight per delay were recorded for 33 blast events at various distances and used for the validation of the proposed fuzzy model. The results of the fuzzy model were also compared with the values obtained from classical regression analysis. The root mean square error estimated for fuzzy-based model was 5.31, whereas it was 11.32 for classical regression-based model. Finally, the relationship between the measured and predicted values of PPV showed that the correlation coefficient for fuzzy model (0.96) is higher than that for regression model (0.82).

  9. Logic programming to predict cell fate patterns and retrodict genotypes in organogenesis.

    PubMed

    Hall, Benjamin A; Jackson, Ethan; Hajnal, Alex; Fisher, Jasmin

    2014-09-01

    Caenorhabditis elegans vulval development is a paradigm system for understanding cell differentiation in the process of organogenesis. Through temporal and spatial controls, the fate pattern of six cells is determined by the competition of the LET-23 and the Notch signalling pathways. Modelling cell fate determination in vulval development using state-based models, coupled with formal analysis techniques, has been established as a powerful approach in predicting the outcome of combinations of mutations. However, computing the outcomes of complex and highly concurrent models can become prohibitive. Here, we show how logic programs derived from state machines describing the differentiation of C. elegans vulval precursor cells can increase the speed of prediction by four orders of magnitude relative to previous approaches. Moreover, this increase in speed allows us to infer, or 'retrodict', compatible genomes from cell fate patterns. We exploit this technique to predict highly variable cell fate patterns resulting from dig-1 reduced-function mutations and let-23 mosaics. In addition to the new insights offered, we propose our technique as a platform for aiding the design and analysis of experimental data.

  10. Multi-input and -output logic circuits based on bioelectrocatalysis with horseradish peroxidase and glucose oxidase immobilized in multi-responsive copolymer films on electrodes.

    PubMed

    Yu, Xue; Lian, Wenjing; Zhang, Jiannan; Liu, Hongyun

    2016-06-15

    Herein, poly(N-isopropylacrylamide-co-N,N'-dimethylaminoethylmethacrylate) copolymer films were polymerized on electrode surface with a simple one-step method, and the enzyme horseradish peroxidase (HRP) was embedded in the films simultaneously, which were designated as P(NiPAAm-co-DMEM)-HRP. The films exhibited a reversible structure change with the external stimuli, such as pH, CO2, temperature and SO4(2-), causing the cyclic voltammetric (CV) response of electroactive K3Fe(CN)6 at the film electrodes to display the corresponding multi-stimuli sensitive ON-OFF behavior. Based on the switchable CV property of the system and the electrochemical reduction of H2O2 catalyzed by HRP in the films and mediated by Fe(CN)6(3-) in solution, a 5-input/3-output logic gate was established. To further increase the complexity of the logic system, another enzyme glucose oxidase (GOD) was added into the films, designated as P(NiPAAm-co-DMEM)-HRP-GOD. In the presence of oxygen, the oxidation of glucose in the solution was catalyzed by GOD in the films, and the produced H2O2 in situ was recognized and electrocatalytically reduced by HRP and mediated by Fe(CN)6(3-). Based on the bienzyme films, a cascaded or concatenated 4-input/3-output logic gate system was proposed. The present work combined the multi-responsive interface with bioelectrocatalysis to construct cascaded logic circuits, which might open a new avenue to develop biocomputing elements with more sophisticated functions and design novel glucose biosensors. PMID:26901460

  11. Multi-input and -output logic circuits based on bioelectrocatalysis with horseradish peroxidase and glucose oxidase immobilized in multi-responsive copolymer films on electrodes.

    PubMed

    Yu, Xue; Lian, Wenjing; Zhang, Jiannan; Liu, Hongyun

    2016-06-15

    Herein, poly(N-isopropylacrylamide-co-N,N'-dimethylaminoethylmethacrylate) copolymer films were polymerized on electrode surface with a simple one-step method, and the enzyme horseradish peroxidase (HRP) was embedded in the films simultaneously, which were designated as P(NiPAAm-co-DMEM)-HRP. The films exhibited a reversible structure change with the external stimuli, such as pH, CO2, temperature and SO4(2-), causing the cyclic voltammetric (CV) response of electroactive K3Fe(CN)6 at the film electrodes to display the corresponding multi-stimuli sensitive ON-OFF behavior. Based on the switchable CV property of the system and the electrochemical reduction of H2O2 catalyzed by HRP in the films and mediated by Fe(CN)6(3-) in solution, a 5-input/3-output logic gate was established. To further increase the complexity of the logic system, another enzyme glucose oxidase (GOD) was added into the films, designated as P(NiPAAm-co-DMEM)-HRP-GOD. In the presence of oxygen, the oxidation of glucose in the solution was catalyzed by GOD in the films, and the produced H2O2 in situ was recognized and electrocatalytically reduced by HRP and mediated by Fe(CN)6(3-). Based on the bienzyme films, a cascaded or concatenated 4-input/3-output logic gate system was proposed. The present work combined the multi-responsive interface with bioelectrocatalysis to construct cascaded logic circuits, which might open a new avenue to develop biocomputing elements with more sophisticated functions and design novel glucose biosensors.

  12. Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

    PubMed

    Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

    2016-02-23

    We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices. PMID:26768020

  13. Flip-flop logic circuit based on fully solution-processed organic thin film transistor devices with reduced variations in electrical performance

    NASA Astrophysics Data System (ADS)

    Takeda, Yasunori; Yoshimura, Yudai; Adib, Faiz Adi Ezarudin Bin; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2015-04-01

    Organic reset-set (RS) flip-flop logic circuits based on pseudo-CMOS inverters have been fabricated using full solution processing at a relatively low process temperatures of 150 °C or less. The work function for printed silver electrodes was increased from 4.7 to 5.4 eV through surface modification with a self-assembled monolayer (SAM) material. A bottom-gate, bottom-contact organic thin-film transistor (OTFT) device using a solution-processable small-molecular semiconductor material exhibited field-effect mobility of 0.40 cm2 V-1 s-1 in the saturation region and a threshold voltage (VTH) of -2.4 V in ambient air operation conditions. In order to reduce the variations in mobility and VTH, we designed a circuit with six transistors arranged in parallel, in order to average out their electrical characteristics. As a result, we have succeeded in reducing these variations without changing the absolute values of the mobility and VTH. The fabricated RS flip-flop circuits were functioned well and exhibited short delay times of 3.5 ms at a supply voltage of 20 V.

  14. Predicting the continuous values of breast cancer relapse time by type-2 fuzzy logic system.

    PubMed

    Mahmoodian, Hamid

    2012-06-01

    Microarray analysis and gene expression profile have been widely used in tumor classification, survival analysis and ER statues of breast cancer. Sample discrimination as well as identification of significant genes have been the focus of most previous studies. The aim of this research is to propose a fuzzy model to predict the relapse time of breast cancer by using breast cancer dataset published by van't Veer. Fuzzy rule mining based on support vector machine has been used in a hybrid method with rule pruning and shown its ability to divide the samples in many subgroups. To handle the existence of uncertainties in linguistic variables and fuzzy sets, the TSK model of Interval type-2 fuzzy logic system has been used and a new simple method is also developed to consider the uncertainties of the rules which have been optimized by genetic algorithm. B632 validation method is applied to estimate the error of the model. The results with 95 % confidence interval show a reasonable accuracy in prediction.

  15. A comparative study of fuzzy logic systems approach for river discharge prediction

    NASA Astrophysics Data System (ADS)

    Jayawardena, A. W.; Perera, E. D. P.; Zhu, Bing; Amarasekara, J. D.; Vereivalu, V.

    2014-06-01

    In recent years, flood disasters resulting from extreme rainfall have been on the increase in many regions of the world. In developed countries, the usual practice of mitigating flood disasters is by structural means which can reduce infrastructural damages as well as casualties but are unaffordable in most developing countries. The alternative then is to look for non-structural means that involve, among other things, early warning systems which can reduce casualties. The basic technical components of an early warning system involves a measurable input data set that trigger floods, a measurable output data set that quantify the extent of flood and an appropriate mathematical model that transforms the input data set into a corresponding output data set. There are many types of mathematical models that can be used to transform the input data into corresponding output data. The crux of this paper is on one type of data driven mathematical models, namely the use of fuzzy logic approach. The reliability and robustness of the approach are demonstrated with daily and 6-hourly discharge predictions in 4 rivers in 3 countries having contrasting climatological, geographical and land use characteristics. The first application is for two tropical rivers in Sri Lanka using daily upstream rainfall and discharge data to predict downstream discharge with the minimum implication function type Mamdani fuzzy inference system. The second application is for another tropical river in Fiji using similar type of data with daily and 6-h time scales. Both Mamdani type fuzzy inference system with minimum and product implication functions as well as Larsen type inference systems were used. In the third application, daily upstream and tributary discharges were used to predict downstream discharges in a temperate-climate river in China using the TSK type fuzzy inference system with clustering. The methods are robust and the results obtained are within reasonable agreement with observations.

  16. Low Power Consumption Complementary Inverters with n-MoS2 and p-WSe2 Dichalcogenide Nanosheets on Glass for Logic and Light-Emitting Diode Circuits.

    PubMed

    Jeon, Pyo Jin; Kim, Jin Sung; Lim, June Yeong; Cho, Youngsuk; Pezeshki, Atiye; Lee, Hee Sung; Yu, Sanghyuck; Min, Sung-Wook; Im, Seongil

    2015-10-14

    Two-dimensional (2D) semiconductor materials with discrete bandgap become important because of their interesting physical properties and potentials toward future nanoscale electronics. Many 2D-based field effect transistors (FETs) have thus been reported. Several attempts to fabricate 2D complementary (CMOS) logic inverters have been made too. However, those CMOS devices seldom showed the most important advantage of typical CMOS: low power consumption. Here, we adopted p-WSe2 and n-MoS2 nanosheets separately for the channels of bottom-gate-patterned FETs, to fabricate 2D dichalcogenide-based hetero-CMOS inverters on the same glass substrate. Our hetero-CMOS inverters with electrically isolated FETs demonstrate novel and superior device performances of a maximum voltage gain as ∼27, sub-nanowatt power consumption, almost ideal noise margin approaching 0.5VDD (supply voltage, VDD=5 V) with a transition voltage of 2.3 V, and ∼800 μs for switching delay. Moreover, our glass-substrate CMOS device nicely performed digital logic (NOT, OR, and AND) and push-pull circuits for organic light-emitting diode switching, directly displaying the prospective of practical applications.

  17. Prediction of Building Floorplans Using Logical and Stochastic Reasoning Based on Sparse Observations

    NASA Astrophysics Data System (ADS)

    Loch-Dehbi, S.; Dehbi, Y.; Gröger, G.; Plümer, L.

    2016-10-01

    This paper introduces a novel method for the automatic derivation of building floorplans and indoor models. Our approach is based on a logical and stochastic reasoning using sparse observations such as building room areas. No further sensor observations like 3D point clouds are needed. Our method benefits from an extensive prior knowledge of functional dependencies and probability density functions of shape and location parameters of rooms depending on their functional use. The determination of posterior beliefs is performed using Bayesian Networks. Stochastic reasoning is complex since the problem is characterized by a mixture of discrete and continuous parameters that are in turn correlated by non-linear constraints. To cope with this kind of complexity, the proposed reasoner combines statistical methods with constraint propagation. It generates a limited number of hypotheses in a model-based top-down approach. It predicts floorplans based on a-priori localised windows. The use of Gaussian mixture models, constraint solvers and stochastic models helps to cope with the a-priori infinite space of the possible floorplan instantiations.

  18. Model Based Predictive Control of Multivariable Hammerstein Processes with Fuzzy Logic Hypercube Interpolated Models

    PubMed Central

    Coelho, Antonio Augusto Rodrigues

    2016-01-01

    This paper introduces the Fuzzy Logic Hypercube Interpolator (FLHI) and demonstrates applications in control of multiple-input single-output (MISO) and multiple-input multiple-output (MIMO) processes with Hammerstein nonlinearities. FLHI consists of a Takagi-Sugeno fuzzy inference system where membership functions act as kernel functions of an interpolator. Conjunction of membership functions in an unitary hypercube space enables multivariable interpolation of N-dimensions. Membership functions act as interpolation kernels, such that choice of membership functions determines interpolation characteristics, allowing FLHI to behave as a nearest-neighbor, linear, cubic, spline or Lanczos interpolator, to name a few. The proposed interpolator is presented as a solution to the modeling problem of static nonlinearities since it is capable of modeling both a function and its inverse function. Three study cases from literature are presented, a single-input single-output (SISO) system, a MISO and a MIMO system. Good results are obtained regarding performance metrics such as set-point tracking, control variation and robustness. Results demonstrate applicability of the proposed method in modeling Hammerstein nonlinearities and their inverse functions for implementation of an output compensator with Model Based Predictive Control (MBPC), in particular Dynamic Matrix Control (DMC). PMID:27657723

  19. Plastic corollary discharge predicts sensory consequences of movements in a cerebellum-like circuit.

    PubMed

    Requarth, Tim; Sawtell, Nathaniel B

    2014-05-21

    The capacity to predict the sensory consequences of movements is critical for sensory, motor, and cognitive function. Though it is hypothesized that internal signals related to motor commands, known as corollary discharge, serve to generate such predictions, this process remains poorly understood at the neural circuit level. Here we demonstrate that neurons in the electrosensory lobe (ELL) of weakly electric mormyrid fish generate negative images of the sensory consequences of the fish's own movements based on ascending spinal corollary discharge signals. These results generalize previous findings describing mechanisms for generating negative images of the effects of the fish's specialized electric organ discharge (EOD) and suggest that a cerebellum-like circuit endowed with associative synaptic plasticity acting on corollary discharge can solve the complex and ubiquitous problem of predicting sensory consequences of movements. PMID:24853945

  20. Error-rate prediction for programmable circuits: methodology, tools and studied cases

    NASA Astrophysics Data System (ADS)

    Velazco, Raoul

    2013-05-01

    This work presents an approach to predict the error rates due to Single Event Upsets (SEU) occurring in programmable circuits as a consequence of the impact or energetic particles present in the environment the circuits operate. For a chosen application, the error-rate is predicted by combining the results obtained from radiation ground testing and the results of fault injection campaigns performed off-beam during which huge numbers of SEUs are injected during the execution of the studied application. The goal of this strategy is to obtain accurate results about different applications' error rates, without using particle accelerator facilities, thus significantly reducing the cost of the sensitivity evaluation. As a case study, this methodology was applied a complex processor, the Power PC 7448 executing a program issued from a real space application and a crypto-processor application implemented in an SRAM-based FPGA and accepted to be embedded in the payload of a scientific satellite of NASA. The accuracy of predicted error rates was confirmed by comparing, for the same circuit and application, predictions with measures issued from radiation ground testing performed at the cyclotron Cyclone cyclotron of HIF (Heavy Ion Facility) of Louvain-la-Neuve (Belgium).

  1. Implementation of sequential logic circuits using the Mach-Zehnder interferometer structure based on electro-optic effect

    NASA Astrophysics Data System (ADS)

    Kumar Raghuwanshi, Sanjeev; Kumar, Ajay; Chen, Nan-Kuang

    2014-12-01

    The electro-optic effect is one of the most important phenomena in Mach-Zehnder (MZI) interferometer structure. The Mach-Zehnder interferometer structure working on the principle of electro-optic effect behaves as the powerful optical switching device. The paper contains the discussion of electro-optic effect based MZI structure. The proper feedback mechanism with the delay unit provides the responses of optical clocked D flip-flop. The paper includes the detailed mathematical description of optical clocked D flip-flops with the MATLAB simulation result. Based on the proposed optical D-flip flop, it is possible to construct some sequential circuits such as synchronous shift registers and ripple counters. Finally, the paper includes the detailed discussion of optical sequential circuits such as synchronous shift register and ripple counter and its implementation using the MATLAB simulation. However, the concept of proposed optical clocked D flip-flop is implemented using the OptiBPM software for the proper verification of the discussed schemes. The Basic building block structures are analyzed to check the optimum performance parameters such as crosstalk, power imbalance, extinction ratio and transition losses, in order to obtain the appropriate Ti-thickness and switching voltage.

  2. A prediction technique for single-event effects on complex integrated circuits

    NASA Astrophysics Data System (ADS)

    Yuanfu, Zhao; Chunqing, Yu; Long, Fan; Suge, Yue; Maoxin, Chen; Shougang, Du; Hongchao, Zheng

    2015-11-01

    The sensitivity of complex integrated circuits to single-event effects is investigated. Sensitivity depends not only on the cross section of physical modules but also on the behavior of data patterns running on the system. A method dividing the main functional modules is proposed. The intrinsic cross section and the duty cycles of different sensitive modules are obtained during the execution of data patterns. A method for extracting the duty cycle is presented and a set of test patterns with different duty cycles are implemented experimentally. By combining the intrinsic cross section and the duty cycle of different sensitive modules, a universal method to predict SEE sensitivities of different test patterns is proposed, which is verified by experiments based on the target circuit of a microprocessor. Experimental results show that the deviation between prediction and experiment is less than 20%.

  3. Reversible logic gates on Physarum Polycephalum

    SciTech Connect

    Schumann, Andrew

    2015-03-10

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.

  4. Fundamentals of Digital Logic.

    ERIC Educational Resources Information Center

    Noell, Monica L.

    This course is designed to prepare electronics personnel for further training in digital techniques, presenting need to know information that is basic to any maintenance course on digital equipment. It consists of seven study units: (1) binary arithmetic; (2) boolean algebra; (3) logic gates; (4) logic flip-flops; (5) nonlogic circuits; (6)…

  5. Pore Pressure prediction in shale gas reservoirs using neural network and fuzzy logic with an application to Barnett Shale.

    NASA Astrophysics Data System (ADS)

    Aliouane, Leila; Ouadfeul, Sid-Ali; Boudella, Amar

    2015-04-01

    The main goal of the proposed idea is to use the artificial intelligence such as the neural network and fuzzy logic to predict the pore pressure in shale gas reservoirs. Pore pressure is a very important parameter that will be used or estimation of effective stress. This last is used to resolve well-bore stability problems, failure plan identification from Mohr-Coulomb circle and sweet spots identification. Many models have been proposed to estimate the pore pressure from well-logs data; we can cite for example the equivalent depth model, the horizontal model for undercompaction called the Eaton's model…etc. All these models require a continuous measurement of the slowness of the primary wave, some thing that is not easy during well-logs data acquisition in shale gas formtions. Here, we suggest the use the fuzzy logic and the multilayer perceptron neural network to predict the pore pressure in two horizontal wells drilled in the lower Barnett shale formation. The first horizontal well is used for the training of the fuzzy set and the multilayer perecptron, the input is the natural gamma ray, the neutron porosity, the slowness of the compression and shear wave, however the desired output is the estimated pore pressure using Eaton's model. Data of another horizontal well are used for generalization. Obtained results clearly show the power of the fuzzy logic system than the multilayer perceptron neural network machine to predict the pore pressure in shale gas reservoirs. Keywords: artificial intelligence, fuzzy logic, pore pressure, multilayer perecptron, Barnett shale.

  6. Predicting Input Impedance and Efficiency of Graphene Reconfigurable Dipoles Using a Simple Circuit Model

    NASA Astrophysics Data System (ADS)

    Tamagnone, Michele; Perruisseau-Carrier, Julien

    An analytical circuit model able to predict the input impedance of reconfigurable graphene plasmonic dipoles is presented. A suitable definition of plasmonic characteristic impedance, employing natural currents, is used to for consistent modeling of the antenna-load connection in the circuit. In its purely analytical form, the model shows good agreement with full-wave simulations, and explains the remarkable tuning properties of graphene antennas. Furthermore, using a single full-wave simulation and scaling laws, additional parasitic elements can be determined for a vast parametric space, leading to very accurate modeling. Finally, we also show that the modeling approach allows fair estimation of radiation efficiency as well. The approach also applies to thin plasmonic antennas realized using noble metals or semiconductors.

  7. Gallium Arsenide Domino Circuit

    NASA Technical Reports Server (NTRS)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

  8. Emergence of complex behaviour from simple circuit structures.

    PubMed

    Kaufman, Marcelle; Thomas, René

    2003-02-01

    The set of (feedback) circuits of a complex system is the machinery that allows the system to be aware of the levels of its crucial constituents. Circuits can be identified without ambiguity from the elements of the Jacobian matrix of the system. There are two types of circuits: positive if they comprise an even number of negative interactions, negative if this number is odd. The two types of circuits play deeply different roles: negative circuits are required for homeostasis, with or without oscillations, positive circuits are required for multistationarity, and hence, in biology, for differentiation and memory. In non-linear systems, a circuit can positive or negative (an 'ambiguous circuit', depending on the location in phase space. Full circuits are those circuits (or unions of disjoint circuits) that imply all the variables of the system. There is a tight relation between circuits and steady states. Each full circuit, if isolated, generates steady state(s) whose nature (eigenvalues) is determined by the structure of the circuit. Multistationarity requires the presence of at least two full circuits of opposite Eisenfeld signs, or else, an ambiguous circuit. We show how a significant part of the dynamical behaviour of a system can be predicted by a mere examination of its Jacobian matrix. We also show how extremely complex dynamics can be generated by such simple logical structures as a single (full and ambiguous) circuit.

  9. Optical programmable Boolean logic unit.

    PubMed

    Chattopadhyay, Tanay

    2011-11-10

    Logic units are the building blocks of many important computational operations likes arithmetic, multiplexer-demultiplexer, radix conversion, parity checker cum generator, etc. Multifunctional logic operation is very much essential in this respect. Here a programmable Boolean logic unit is proposed that can perform 16 Boolean logical operations from a single optical input according to the programming input without changing the circuit design. This circuit has two outputs. One output is complementary to the other. Hence no loss of data can occur. The circuit is basically designed by a 2×2 polarization independent optical cross bar switch. Performance of the proposed circuit has been achieved by doing numerical simulations. The binary logical states (0,1) are represented by the absence of light (null) and presence of light, respectively.

  10. An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

    PubMed

    Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

    2016-06-01

    The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. PMID:27067430

  11. An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

    PubMed

    Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

    2016-06-01

    The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling.

  12. Nanomagnetic Logic

    NASA Astrophysics Data System (ADS)

    Carlton, David Bryan

    The exponential improvements in speed, energy efficiency, and cost that the computer industry has relied on for growth during the last 50 years are in danger of ending within the decade. These improvements all have relied on scaling the size of the silicon-based transistor that is at the heart of every modern CPU down to smaller and smaller length scales. However, as the size of the transistor reaches scales that are measured in the number of atoms that make it up, it is clear that this scaling cannot continue forever. As a result of this, there has been a great deal of research effort directed at the search for the next device that will continue to power the growth of the computer industry. However, due to the billions of dollars of investment that conventional silicon transistors have received over the years, it is unlikely that a technology will emerge that will be able to beat it outright in every performance category. More likely, different devices will possess advantages over conventional transistors for certain applications and uses. One of these emerging computing platforms is nanomagnetic logic (NML). NML-based circuits process information by manipulating the magnetization states of single-domain nanomagnets coupled to their nearest neighbors through magnetic dipole interactions. The state variable is magnetization direction and computations can take place without passing an electric current. This makes them extremely attractive as a replacement for conventional transistor-based computing architectures for certain ultra-low power applications. In most work to date, nanomagnetic logic circuits have used an external magnetic clocking field to reset the system between computations. The clocking field is then subsequently removed very slowly relative to the magnetization dynamics, guiding the nanomagnetic logic circuit adiabatically into its magnetic ground state. In this dissertation, I will discuss the dynamics behind this process and show that it is greatly

  13. Engineered gene circuits

    NASA Astrophysics Data System (ADS)

    Hasty, Jeff; McMillen, David; Collins, J. J.

    2002-11-01

    A central focus of postgenomic research will be to understand how cellular phenomena arise from the connectivity of genes and proteins. This connectivity generates molecular network diagrams that resemble complex electrical circuits, and a systematic understanding will require the development of a mathematical framework for describing the circuitry. From an engineering perspective, the natural path towards such a framework is the construction and analysis of the underlying submodules that constitute the network. Recent experimental advances in both sequencing and genetic engineering have made this approach feasible through the design and implementation of synthetic gene networks amenable to mathematical modelling and quantitative analysis. These developments have signalled the emergence of a gene circuit discipline, which provides a framework for predicting and evaluating the dynamics of cellular processes. Synthetic gene networks will also lead to new logical forms of cellular control, which could have important applications in functional genomics, nanotechnology, and gene and cell therapy.

  14. ECG Prediction Based on Classification via Neural Networks and Linguistic Fuzzy Logic Forecaster.

    PubMed

    Volna, Eva; Kotyrba, Martin; Habiballa, Hashim

    2015-01-01

    The paper deals with ECG prediction based on neural networks classification of different types of time courses of ECG signals. The main objective is to recognise normal cycles and arrhythmias and perform further diagnosis. We proposed two detection systems that have been created with usage of neural networks. The experimental part makes it possible to load ECG signals, preprocess them, and classify them into given classes. Outputs from the classifiers carry a predictive character. All experimental results from both of the proposed classifiers are mutually compared in the conclusion. We also experimented with the new method of time series transparent prediction based on fuzzy transform with linguistic IF-THEN rules. Preliminary results show interesting results based on the unique capability of this approach bringing natural language interpretation of particular prediction, that is, the properties of time series. PMID:26221620

  15. ECG Prediction Based on Classification via Neural Networks and Linguistic Fuzzy Logic Forecaster

    PubMed Central

    Volna, Eva; Kotyrba, Martin; Habiballa, Hashim

    2015-01-01

    The paper deals with ECG prediction based on neural networks classification of different types of time courses of ECG signals. The main objective is to recognise normal cycles and arrhythmias and perform further diagnosis. We proposed two detection systems that have been created with usage of neural networks. The experimental part makes it possible to load ECG signals, preprocess them, and classify them into given classes. Outputs from the classifiers carry a predictive character. All experimental results from both of the proposed classifiers are mutually compared in the conclusion. We also experimented with the new method of time series transparent prediction based on fuzzy transform with linguistic IF-THEN rules. Preliminary results show interesting results based on the unique capability of this approach bringing natural language interpretation of particular prediction, that is, the properties of time series. PMID:26221620

  16. ECG Prediction Based on Classification via Neural Networks and Linguistic Fuzzy Logic Forecaster.

    PubMed

    Volna, Eva; Kotyrba, Martin; Habiballa, Hashim

    2015-01-01

    The paper deals with ECG prediction based on neural networks classification of different types of time courses of ECG signals. The main objective is to recognise normal cycles and arrhythmias and perform further diagnosis. We proposed two detection systems that have been created with usage of neural networks. The experimental part makes it possible to load ECG signals, preprocess them, and classify them into given classes. Outputs from the classifiers carry a predictive character. All experimental results from both of the proposed classifiers are mutually compared in the conclusion. We also experimented with the new method of time series transparent prediction based on fuzzy transform with linguistic IF-THEN rules. Preliminary results show interesting results based on the unique capability of this approach bringing natural language interpretation of particular prediction, that is, the properties of time series.

  17. Ageing increases reliance on sensorimotor prediction through structural and functional differences in frontostriatal circuits

    PubMed Central

    Wolpe, Noham; Ingram, James N.; Tsvetanov, Kamen A.; Geerligs, Linda; Kievit, Rogier A.; Henson, Richard N.; Wolpert, Daniel M.; Tyler, Lorraine K.; Brayne, Carol; Bullmore, Edward; Calder, Andrew; Cusack, Rhodri; Dalgleish, Tim; Duncan, John; Matthews, Fiona E.; Marslen-Wilson, William; Shafto, Meredith A.; Campbell, Karen; Cheung, Teresa; Davis, Simon; McCarrey, Anna; Mustafa, Abdur; Price, Darren; Samu, David; Taylor, Jason R.; Treder, Matthias; van Belle, Janna; Williams, Nitin; Bates, Lauren; Emery, Tina; Erzinçlioglu, Sharon; Gadie, Andrew; Gerbase, Sofia; Georgieva, Stanimira; Hanley, Claire; Parkin, Beth; Troy, David; Auer, Tibor; Correia, Marta; Gao, Lu; Green, Emma; Henriques, Rafael; Allen, Jodie; Amery, Gillian; Amunts, Liana; Barcroft, Anne; Castle, Amanda; Dias, Cheryl; Dowrick, Jonathan; Fair, Melissa; Fisher, Hayley; Goulding, Anna; Grewal, Adarsh; Hale, Geoff; Hilton, Andrew; Johnson, Frances; Johnston, Patricia; Kavanagh-Williamson, Thea; Kwasniewska, Magdalena; McMinn, Alison; Norman, Kim; Penrose, Jessica; Roby, Fiona; Rowland, Diane; Sargeant, John; Squire, Maggie; Stevens, Beth; Stoddart, Aldabra; Stone, Cheryl; Thompson, Tracy; Yazlik, Ozlem; Barnes, Dan; Dixon, Marie; Hillman, Jaya; Mitchell, Joanne; Villis, Laura; Rowe, James B.

    2016-01-01

    The control of voluntary movement changes markedly with age. A critical component of motor control is the integration of sensory information with predictions of the consequences of action, arising from internal models of movement. This leads to sensorimotor attenuation—a reduction in the perceived intensity of sensations from self-generated compared with external actions. Here we show that sensorimotor attenuation occurs in 98% of adults in a population-based cohort (n=325; 18–88 years; the Cambridge Centre for Ageing and Neuroscience). Importantly, attenuation increases with age, in proportion to reduced sensory sensitivity. This effect is associated with differences in the structure and functional connectivity of the pre-supplementary motor area (pre-SMA), assessed with magnetic resonance imaging. The results suggest that ageing alters the balance between the sensorium and predictive models, mediated by the pre-SMA and its connectivity in frontostriatal circuits. This shift may contribute to the motor and cognitive changes observed with age. PMID:27694879

  18. The Use of a Predictive Habitat Model and a Fuzzy Logic Approach for Marine Management and Planning

    PubMed Central

    Hattab, Tarek; Ben Rais Lasram, Frida; Albouy, Camille; Sammari, Chérif; Romdhane, Mohamed Salah; Cury, Philippe; Leprieur, Fabien; Le Loc’h, François

    2013-01-01

    Bottom trawl survey data are commonly used as a sampling technique to assess the spatial distribution of commercial species. However, this sampling technique does not always correctly detect a species even when it is present, and this can create significant limitations when fitting species distribution models. In this study, we aim to test the relevance of a mixed methodological approach that combines presence-only and presence-absence distribution models. We illustrate this approach using bottom trawl survey data to model the spatial distributions of 27 commercially targeted marine species. We use an environmentally- and geographically-weighted method to simulate pseudo-absence data. The species distributions are modelled using regression kriging, a technique that explicitly incorporates spatial dependence into predictions. Model outputs are then used to identify areas that met the conservation targets for the deployment of artificial anti-trawling reefs. To achieve this, we propose the use of a fuzzy logic framework that accounts for the uncertainty associated with different model predictions. For each species, the predictive accuracy of the model is classified as ‘high’. A better result is observed when a large number of occurrences are used to develop the model. The map resulting from the fuzzy overlay shows that three main areas have a high level of agreement with the conservation criteria. These results align with expert opinion, confirming the relevance of the proposed methodology in this study. PMID:24146867

  19. The use of a predictive habitat model and a fuzzy logic approach for marine management and planning.

    PubMed

    Hattab, Tarek; Ben Rais Lasram, Frida; Albouy, Camille; Sammari, Chérif; Romdhane, Mohamed Salah; Cury, Philippe; Leprieur, Fabien; Le Loc'h, François

    2013-01-01

    Bottom trawl survey data are commonly used as a sampling technique to assess the spatial distribution of commercial species. However, this sampling technique does not always correctly detect a species even when it is present, and this can create significant limitations when fitting species distribution models. In this study, we aim to test the relevance of a mixed methodological approach that combines presence-only and presence-absence distribution models. We illustrate this approach using bottom trawl survey data to model the spatial distributions of 27 commercially targeted marine species. We use an environmentally- and geographically-weighted method to simulate pseudo-absence data. The species distributions are modelled using regression kriging, a technique that explicitly incorporates spatial dependence into predictions. Model outputs are then used to identify areas that met the conservation targets for the deployment of artificial anti-trawling reefs. To achieve this, we propose the use of a fuzzy logic framework that accounts for the uncertainty associated with different model predictions. For each species, the predictive accuracy of the model is classified as 'high'. A better result is observed when a large number of occurrences are used to develop the model. The map resulting from the fuzzy overlay shows that three main areas have a high level of agreement with the conservation criteria. These results align with expert opinion, confirming the relevance of the proposed methodology in this study.

  20. Neural circuits underlying mother’s voice perception predict social communication abilities in children

    PubMed Central

    Abrams, Daniel A.; Chen, Tianwen; Odriozola, Paola; Cheng, Katherine M.; Baker, Amanda E.; Padmanabhan, Aarthi; Ryali, Srikanth; Kochalka, John; Feinstein, Carl; Menon, Vinod

    2016-01-01

    The human voice is a critical social cue, and listeners are extremely sensitive to the voices in their environment. One of the most salient voices in a child’s life is mother's voice: Infants discriminate their mother’s voice from the first days of life, and this stimulus is associated with guiding emotional and social function during development. Little is known regarding the functional circuits that are selectively engaged in children by biologically salient voices such as mother’s voice or whether this brain activity is related to children’s social communication abilities. We used functional MRI to measure brain activity in 24 healthy children (mean age, 10.2 y) while they attended to brief (<1 s) nonsense words produced by their biological mother and two female control voices and explored relationships between speech-evoked neural activity and social function. Compared to female control voices, mother’s voice elicited greater activity in primary auditory regions in the midbrain and cortex; voice-selective superior temporal sulcus (STS); the amygdala, which is crucial for processing of affect; nucleus accumbens and orbitofrontal cortex of the reward circuit; anterior insula and cingulate of the salience network; and a subregion of fusiform gyrus associated with face perception. The strength of brain connectivity between voice-selective STS and reward, affective, salience, memory, and face-processing regions during mother’s voice perception predicted social communication skills. Our findings provide a novel neurobiological template for investigation of typical social development as well as clinical disorders, such as autism, in which perception of biologically and socially salient voices may be impaired. PMID:27185915

  1. Neural circuits underlying mother's voice perception predict social communication abilities in children.

    PubMed

    Abrams, Daniel A; Chen, Tianwen; Odriozola, Paola; Cheng, Katherine M; Baker, Amanda E; Padmanabhan, Aarthi; Ryali, Srikanth; Kochalka, John; Feinstein, Carl; Menon, Vinod

    2016-05-31

    The human voice is a critical social cue, and listeners are extremely sensitive to the voices in their environment. One of the most salient voices in a child's life is mother's voice: Infants discriminate their mother's voice from the first days of life, and this stimulus is associated with guiding emotional and social function during development. Little is known regarding the functional circuits that are selectively engaged in children by biologically salient voices such as mother's voice or whether this brain activity is related to children's social communication abilities. We used functional MRI to measure brain activity in 24 healthy children (mean age, 10.2 y) while they attended to brief (<1 s) nonsense words produced by their biological mother and two female control voices and explored relationships between speech-evoked neural activity and social function. Compared to female control voices, mother's voice elicited greater activity in primary auditory regions in the midbrain and cortex; voice-selective superior temporal sulcus (STS); the amygdala, which is crucial for processing of affect; nucleus accumbens and orbitofrontal cortex of the reward circuit; anterior insula and cingulate of the salience network; and a subregion of fusiform gyrus associated with face perception. The strength of brain connectivity between voice-selective STS and reward, affective, salience, memory, and face-processing regions during mother's voice perception predicted social communication skills. Our findings provide a novel neurobiological template for investigation of typical social development as well as clinical disorders, such as autism, in which perception of biologically and socially salient voices may be impaired. PMID:27185915

  2. Electronic logic for enhanced switch reliability

    DOEpatents

    Cooper, J.A.

    1984-01-20

    A logic circuit is used to enhance redundant switch reliability. Two or more switches are monitored for logical high or low output. The output for the logic circuit produces a redundant and fail-safe representation of the switch outputs. When both switch outputs are high, the output is high. Similarly, when both switch outputs are low, the logic circuit's output is low. When the output states of the two switches do not agree, the circuit resolves the conflict by memorizing the last output state which both switches were simultaneously in and produces the logical complement of this output state. Thus, the logic circuit of the present invention allows the redundant switches to be treated as if they were in parallel when the switches are open and as if they were in series when the switches are closed. A failsafe system having maximum reliability is thereby produced.

  3. Assessment and prediction of air quality using fuzzy logic and autoregressive models

    NASA Astrophysics Data System (ADS)

    Carbajal-Hernández, José Juan; Sánchez-Fernández, Luis P.; Carrasco-Ochoa, Jesús A.; Martínez-Trinidad, José Fco.

    2012-12-01

    In recent years, artificial intelligence methods have been used for the treatment of environmental problems. This work, presents two models for assessment and prediction of air quality. First, we develop a new computational model for air quality assessment in order to evaluate toxic compounds that can harm sensitive people in urban areas, affecting their normal activities. In this model we propose to use a Sigma operator to statistically asses air quality parameters using their historical data information and determining their negative impact in air quality based on toxicity limits, frequency average and deviations of toxicological tests. We also introduce a fuzzy inference system to perform parameter classification using a reasoning process and integrating them in an air quality index describing the pollution levels in five stages: excellent, good, regular, bad and danger, respectively. The second model proposed in this work predicts air quality concentrations using an autoregressive model, providing a predicted air quality index based on the fuzzy inference system previously developed. Using data from Mexico City Atmospheric Monitoring System, we perform a comparison among air quality indices developed for environmental agencies and similar models. Our results show that our models are an appropriate tool for assessing site pollution and for providing guidance to improve contingency actions in urban areas.

  4. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  5. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  6. Radiation tolerant combinational logic cell

    NASA Technical Reports Server (NTRS)

    Maki, Gary R. (Inventor); Gambles, Jody W. (Inventor); Whitaker, Sterling (Inventor)

    2009-01-01

    A system has a reduced sensitivity to Single Event Upset and/or Single Event Transient(s) compared to traditional logic devices. In a particular embodiment, the system includes an input, a logic block, a bias stage, a state machine, and an output. The logic block is coupled to the input. The logic block is for implementing a logic function, receiving a data set via the input, and generating a result f by applying the data set to the logic function. The bias stage is coupled to the logic block. The bias stage is for receiving the result from the logic block and presenting it to the state machine. The state machine is coupled to the bias stage. The state machine is for receiving, via the bias stage, the result generated by the logic block. The state machine is configured to retain a state value for the system. The state value is typically based on the result generated by the logic block. The output is coupled to the state machine. The output is for providing the value stored by the state machine. Some embodiments of the invention produce dual rail outputs Q and Q'. The logic block typically contains combinational logic and is similar, in size and transistor configuration, to a conventional CMOS combinational logic design. However, only a very small portion of the circuits of these embodiments, is sensitive to Single Event Upset and/or Single Event Transients.

  7. Boolean modeling: a logic-based dynamic approach for understanding signaling and regulatory networks and for making useful predictions.

    PubMed

    Albert, Réka; Thakar, Juilee

    2014-01-01

    The biomolecules inside or near cells form a complex interacting system. Cellular phenotypes and behaviors arise from the totality of interactions among the components of this system. A fruitful way of modeling interacting biomolecular systems is by network-based dynamic models that characterize each component by a state variable, and describe the change in the state variables due to the interactions in the system. Dynamic models can capture the stable state patterns of this interacting system and can connect them to different cell fates or behaviors. A Boolean or logic model characterizes each biomolecule by a binary state variable that relates the abundance of that molecule to a threshold abundance necessary for downstream processes. The regulation of this state variable is described in a parameter free manner, making Boolean modeling a practical choice for systems whose kinetic parameters have not been determined. Boolean models integrate the body of knowledge regarding the components and interactions of biomolecular systems, and capture the system's dynamic repertoire, for example the existence of multiple cell fates. These models were used for a variety of systems and led to important insights and predictions. Boolean models serve as an efficient exploratory model, a guide for follow-up experiments, and as a foundation for more quantitative models.

  8. Soap Bubbles and Logic.

    ERIC Educational Resources Information Center

    Levine, Shellie-helane; And Others

    1986-01-01

    Introduces questions and activities involving soap bubbles which provide students with experiences in prediction and logic. Examines commonly held false conceptions related to the shapes that bubbles take and provides correct explanations for the phenomenon. (ML)

  9. Electronics. Module 3: Digital Logic Application. Instructor's Guide.

    ERIC Educational Resources Information Center

    Carter, Ed; Murphy, Mark

    This guide contains instructor's materials for a 10-unit secondary school course on digital logic application. The units are introduction to digital, logic gates, digital integrated circuits, combination logic, flip-flops, counters and shift registers, encoders and decoders, arithmetic circuits, memory, and analog/digital and digital/analog…

  10. Benchmarking emerging logic devices

    NASA Astrophysics Data System (ADS)

    Nikonov, Dmitri

    2014-03-01

    As complementary metal-oxide-semiconductor field-effect transistors (CMOS FET) are being scaled to ever smaller sizes by the semiconductor industry, the demand is growing for emerging logic devices to supplement CMOS in various special functions. Research directions and concepts of such devices are overviewed. They include tunneling, graphene based, spintronic devices etc. The methodology to estimate future performance of emerging (beyond CMOS) devices and simple logic circuits based on them is explained. Results of benchmarking are used to identify more promising concepts and to map pathways for improvement of beyond CMOS computing.

  11. A logical state model of circus movement atrial flutter role of anatomic obstacles, anisotropic conduction and slow conduction zones on induction, sustenance, and overdrive paced modulation of reentrant circuits.

    PubMed

    Yang, H; el-Sherif, N; Isber, N; Restivo, M

    1994-06-01

    Mapping studies of atrial flutter in both the canine sterile pericarditis model and the right atrial enlargement model commonly reveal single loop reentrant circuits in the lower posterior part of the right atrium. Functional bidirectional conduction block and natural anatomical obstacles comprise the central obstacle for reentrant impulse during circus movement atrial flutter. Because the relative roles of anatomical obstacles, in combination with functional barriers, anisotropic conduction, and slow conduction can not be readily assessed with current electrophysiological techniques, an atrial activation model was developed to study the mechanisms of circus movement atrial flutter. A discrete state model consisting of 4096 logically connected cardiac elements was used to simulate atrial activation; an inexcitable region simulating the inferior vena cava (IVC) was also incorporated in the model. Atrial flutter was induced by programmed premature stimulation. Anisotropic conduction velocity properties, regional variations in slow conduction, regional refractory gradients and stimulation parameters were specified for each simulation. The reentrant circuit generally consisted of a single reentrant impulse which circulated around a continuous line of functional bidirectional conduction block joined to the IVC. Rapid pacing, 5-30 ms shorter than the spontaneous reentrant cycle length, was applied to entrain and/or terminate the rhythm. The results of this study demonstrate that patterns of initiation, entrainment, termination and reinitiation of circus movement atrial flutter mimic results from in vivo activation mapping studies. We find that sustained circus movement atrial flutter circuits depend on: 1) natural anatomical obstacles to stabilize reentrant circuits, and 2) anisotropic conduction properties to reduce the degree of functional conduction block needed to maintain circus movement. Rapid pacing of simulated circus movement atrial flutter demonstrated that the

  12. Coupled mechanical-electrical-thermal modeling for short-circuit prediction in a lithium-ion cell under mechanical abuse

    NASA Astrophysics Data System (ADS)

    Zhang, Chao; Santhanagopalan, Shriram; Sprague, Michael A.; Pesaran, Ahmad A.

    2015-09-01

    In order to better understand the behavior of lithium-ion batteries under mechanical abuse, a coupled modeling methodology encompassing the mechanical, electrical and thermal response is presented for predicting short-circuit under external crush. The combined mechanical-electrical-thermal response is simulated in a commercial finite element software LS-DYNA® using a representative-sandwich finite-element model, where electrical-thermal modeling is conducted after an instantaneous mechanical crush. The model includes an explicit representation of each individual component such as the active material, current collector, separator, etc., and predicts their mechanical deformation under quasi-static indentation. Model predictions show good agreement with experiments: the fracture of the battery structure under an indentation test is accurately predicted. The electrical-thermal simulation predicts the current density and temperature distribution in a reasonable manner. Whereas previously reported models consider the mechanical response exclusively, we use the electrical contact between active materials following the failure of the separator as a criterion for short-circuit. These results are used to build a lumped representative sandwich model that is computationally efficient and captures behavior at the cell level without resolving the individual layers.

  13. The universal magnetic tunnel junction logic gates representing 16 binary Boolean logic operations

    NASA Astrophysics Data System (ADS)

    Lee, Junwoo; Suh, Dong Ik; Park, Wanjun

    2015-05-01

    The novel devices are expected to shift the paradigm of a logic operation by their own nature, replacing the conventional devices. In this study, the nature of our fabricated magnetic tunnel junction (MTJ) that responds to the two external inputs, magnetic field and voltage bias, demonstrated seven basic logic operations. The seven operations were obtained by the electric-field-assisted switching characteristics, where the surface magnetoelectric effect occurs due to a sufficiently thin free layer. The MTJ was transformed as a universal logic gate combined with three supplementary circuits: A multiplexer (MUX), a Wheatstone bridge, and a comparator. With these circuits, the universal logic gates demonstrated 16 binary Boolean logic operations in one logic stage. A possible further approach is parallel computations through a complimentary of MUX and comparator, capable of driving multiple logic gates. A reconfigurable property can also be realized when different logic operations are produced from different level of voltages applying to the same configuration of the logic gate.

  14. Magnetic Circuit Model of PM Motor-Generator to Predict Radial Forces

    NASA Technical Reports Server (NTRS)

    McLallin, Kerry (Technical Monitor); Kascak, Peter E.; Dever, Timothy P.; Jansen, Ralph H.

    2004-01-01

    A magnetic circuit model is developed for a PM motor for flywheel applications. A sample motor is designed and modeled. Motor configuration and selection of materials is discussed, and the choice of winding configuration is described. A magnetic circuit model is described, which includes the stator back iron, rotor yoke, permanent magnets, air gaps and the stator teeth. Iterative solution of this model yields flux linkages, back EMF, torque, power, and radial force at the rotor caused by eccentricity. Calculated radial forces are then used to determine motor negative stiffness.

  15. A fuzzy-logic-based model to predict biogas and methane production rates in a pilot-scale mesophilic UASB reactor treating molasses wastewater.

    PubMed

    Turkdogan-Aydinol, F Ilter; Yetilmezsoy, Kaan

    2010-10-15

    A MIMO (multiple inputs and multiple outputs) fuzzy-logic-based model was developed to predict biogas and methane production rates in a pilot-scale 90-L mesophilic up-flow anaerobic sludge blanket (UASB) reactor treating molasses wastewater. Five input variables such as volumetric organic loading rate (OLR), volumetric total chemical oxygen demand (TCOD) removal rate (R(V)), influent alkalinity, influent pH and effluent pH were fuzzified by the use of an artificial intelligence-based approach. Trapezoidal membership functions with eight levels were conducted for the fuzzy subsets, and a Mamdani-type fuzzy inference system was used to implement a total of 134 rules in the IF-THEN format. The product (prod) and the centre of gravity (COG, centroid) methods were employed as the inference operator and defuzzification methods, respectively. Fuzzy-logic predicted results were compared with the outputs of two exponential non-linear regression models derived in this study. The UASB reactor showed a remarkable performance on the treatment of molasses wastewater, with an average TCOD removal efficiency of 93 (+/-3)% and an average volumetric TCOD removal rate of 6.87 (+/-3.93) kg TCOD(removed)/m(3)-day, respectively. Findings of this study clearly indicated that, compared to non-linear regression models, the proposed MIMO fuzzy-logic-based model produced smaller deviations and exhibited a superior predictive performance on forecasting of both biogas and methane production rates with satisfactory determination coefficients over 0.98.

  16. Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

    NASA Technical Reports Server (NTRS)

    1972-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

  17. An Exploratory Study Examining the Feasibility of Using Bayesian Networks to Predict Circuit Analysis Understanding

    ERIC Educational Resources Information Center

    Chung, Gregory K. W. K.; Dionne, Gary B.; Kaiser, William J.

    2006-01-01

    Our research question was whether we could develop a feasible technique, using Bayesian networks, to diagnose gaps in student knowledge. Thirty-four college-age participants completed tasks designed to measure conceptual knowledge, procedural knowledge, and problem-solving skills related to circuit analysis. A Bayesian network was used to model…

  18. Lithium-ion battery cell-level control using constrained model predictive control and equivalent circuit models

    SciTech Connect

    Xavier, MA; Trimboli, MS

    2015-07-01

    This paper introduces a novel application of model predictive control (MPC) to cell-level charging of a lithium-ion battery utilizing an equivalent circuit model of battery dynamics. The approach employs a modified form of the MPC algorithm that caters for direct feed-though signals in order to model near-instantaneous battery ohmic resistance. The implementation utilizes a 2nd-order equivalent circuit discrete-time state-space model based on actual cell parameters; the control methodology is used to compute a fast charging profile that respects input, output, and state constraints. Results show that MPC is well-suited to the dynamics of the battery control problem and further suggest significant performance improvements might be achieved by extending the result to electrochemical models. (C) 2015 Elsevier B.V. All rights reserved.

  19. Flexible programmable logic module

    DOEpatents

    Robertson, Perry J.; Hutchinson, Robert L.; Pierson, Lyndon G.

    2001-01-01

    The circuit module of this invention is a VME board containing a plurality of programmable logic devices (PLDs), a controlled impedance clock tree, and interconnecting buses. The PLDs are arranged to permit systolic processing of a problem by offering wide data buses and a plurality of processing nodes. The board contains a clock reference and clock distribution tree that can drive each of the PLDs with two critically timed clock references. External clock references can be used to drive additional circuit modules all operating from the same synchronous clock reference.

  20. Implementation of Complete Boolean Logic Functions in Single Complementary Resistive Switch.

    PubMed

    Gao, Shuang; Zeng, Fei; Wang, Minjuan; Wang, Guangyue; Song, Cheng; Pan, Feng

    2015-01-01

    The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implementation of complete Boolean logic functions in a single CRS cell. The first method is based on the intrinsic switchable diode of a peculiar CRS cell that is composed of two anti-serial bipolar resistive switches with a rectifying high resistance state, while the second method is based directly on the complementary switching behaviour itself of any single CRS cell. The feasibilities of both methods have been theoretically predicted and then experimentally demonstrated on the basis of a Ta/Ta2O5/Pt/Ta2O5/Ta CRS cell. Therefore, these two methods-in particular the complementary switching behaviour itself-based method, which has natural immunity to the sneak-path issue of crossbar logic circuits-are believed to be capable of significantly advancing both our understanding and commercialization of related logic circuits. Moreover, peculiar CRS cells have been demonstrated to be feasible for tri-level storage, which can serve as an alternative method of realising ultra-high-density data storage.

  1. Dispositional logic

    SciTech Connect

    Zadeh, L.A.

    1988-01-01

    The applicability of conventional mathematical analysis (based on the combination of two-valued logic and probability theory) to problems in which human judgment, perception, or emotions play significant roles is considered theoretically. It is shown that dispositional logic, a branch of fuzzy logic, has particular relevance to the common-sense reasoning typical of human decision-making. The concepts of dispositionality and usuality are defined analytically, and a dispositional conjunctive rule and dispositional modus ponens are derived. 7 references.

  2. Dispositional logic

    NASA Technical Reports Server (NTRS)

    Le Balleur, J. C.

    1988-01-01

    The applicability of conventional mathematical analysis (based on the combination of two-valued logic and probability theory) to problems in which human judgment, perception, or emotions play significant roles is considered theoretically. It is shown that dispositional logic, a branch of fuzzy logic, has particular relevance to the common-sense reasoning typical of human decision-making. The concepts of dispositionality and usuality are defined analytically, and a dispositional conjunctive rule and dispositional modus ponens are derived.

  3. Logical error rate in the Pauli twirling approximation.

    PubMed

    Katabarwa, Amara; Geller, Michael R

    2015-09-30

    The performance of error correction protocols are necessary for understanding the operation of potential quantum computers, but this requires physical error models that can be simulated efficiently with classical computers. The Gottesmann-Knill theorem guarantees a class of such error models. Of these, one of the simplest is the Pauli twirling approximation (PTA), which is obtained by twirling an arbitrary completely positive error channel over the Pauli basis, resulting in a Pauli channel. In this work, we test the PTA's accuracy at predicting the logical error rate by simulating the 5-qubit code using a 9-qubit circuit with realistic decoherence and unitary gate errors. We find evidence for good agreement with exact simulation, with the PTA overestimating the logical error rate by a factor of 2 to 3. Our results suggest that the PTA is a reliable predictor of the logical error rate, at least for low-distance codes.

  4. Short circuit protection for a power distribution system

    NASA Technical Reports Server (NTRS)

    Owen, J. R., III

    1969-01-01

    Sensing circuit detects when the output from a matrix is present and when it should be present. The circuit provides short circuit protection for a power distribution system where the selection of the driven load is accomplished by digital logic.

  5. A bit serial sequential circuit

    NASA Technical Reports Server (NTRS)

    Hu, S.; Whitaker, S.

    1990-01-01

    Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

  6. Prediction of multiple resonance characteristics by an extended resistor-inductor-capacitor circuit model for plasmonic metamaterials absorbers in infrared.

    PubMed

    Xu, Xiaolun; Li, Yongqian; Wang, Binbin; Zhou, Zili

    2015-10-01

    The resonance characteristics of plasmonic metamaterials absorbers (PMAs) are strongly dependent on geometric parameters. A resistor-inductor-capacitor (RLC) circuit model has been extended to predict the resonance wavelengths and the bandwidths of multiple magnetic polaritons modes in PMAs. For a typical metallic-dielectric-metallic structure absorber working in the infrared region, the developed model describes the correlation between the resonance characteristics and the dimensional sizes. In particular, the RLC model is suitable for not only the fundamental resonance mode, but also for the second- and third-order resonance modes. The prediction of the resonance characteristics agrees fairly well with those calculated by the finite-difference time-domain simulation and the experimental results. The developed RLC model enables the facilitation of designing multi-band PMAs for infrared radiation detectors and thermal emitters. PMID:26421549

  7. All-optical symmetric ternary logic gate

    NASA Astrophysics Data System (ADS)

    Chattopadhyay, Tanay

    2010-09-01

    Symmetric ternary number (radix=3) has three logical states (1¯, 0, 1). It is very much useful in carry free arithmetical operation. Beside this, the logical operation using this type of number system is also effective in high speed computation and communication in multi-valued logic. In this literature all-optical circuits for three basic symmetrical ternary logical operations (inversion, MIN and MAX) are proposed and described. Numerical simulation verifies the theoretical model. In this present scheme the different ternary logical states are represented by different polarized state of light. Terahertz optical asymmetric demultiplexer (TOAD) based interferometric switch has been used categorically in this manuscript.

  8. CADAT integrated circuit mask analysis

    NASA Technical Reports Server (NTRS)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  9. Optical logic using electrically connected quantum well PIN diode modulators and detectors.

    PubMed

    Lentine, A L; Miller, D A; Henry, J E; Cunningham, J E; Chirovsky, L M; D'Asaro, L A

    1990-05-10

    We present new optoelectronic logic devices or circuits consisting of electrically connected quantum well PIN diodes capable of implementing any boolean logic function. One class of circuits uses single beams to represent the logic levels and compares their intensities to a locally generated reference signal. A second class of circuits routes signals as differential pairs. The connections of diodes in these circuits resemble the transistor connections in NMOS and CMOS logic families. We demonstrate simple optical programmable logic arrays (e.g., E = AB + CD) using both of these classes of circuits. PMID:20563144

  10. Avoidant symptoms in PTSD predict fear circuit activation during multimodal fear extinction.

    PubMed

    Sripada, Rebecca K; Garfinkel, Sarah N; Liberzon, Israel

    2013-01-01

    Convergent evidence suggests that individuals with posttraumatic stress disorder (PTSD) exhibit exaggerated avoidance behaviors as well as abnormalities in Pavlonian fear conditioning. However, the link between the two features of this disorder is not well understood. In order to probe the brain basis of aberrant extinction learning in PTSD, we administered a multimodal classical fear conditioning/extinction paradigm that incorporated affectively relevant information from two sensory channels (visual and tactile) while participants underwent fMRI scanning. The sample consisted of fifteen OEF/OIF veterans with PTSD. In response to conditioned cues and contextual information, greater avoidance symptomatology was associated with greater activation in amygdala, hippocampus, vmPFC, dmPFC, and insula, during both fear acquisition and fear extinction. Heightened responses to previously conditioned stimuli in individuals with more severe PTSD could indicate a deficiency in safety learning, consistent with PTSD symptomatology. The close link between avoidance symptoms and fear circuit activation suggests that this symptom cluster may be a key component of fear extinction deficits in PTSD and/or may be particularly amenable to change through extinction-based therapies.

  11. Miniaturization of magnetic logic circuitry

    NASA Technical Reports Server (NTRS)

    Baba, P. D.

    1969-01-01

    Magnetic logic circuit design features two ferrite materials, with different formulation and magnetic characteristics, which are bonded into a continuous structure by preparing the materials as a slurry and using the doctor blade method to form flexible ferrite sheets. After firing, the sintering process was continuous across the bond.

  12. Activity levels in the left hemisphere caudate–fusiform circuit predict how well a second language will be learned

    PubMed Central

    Tan, Li Hai; Chen, Lin; Yip, Virginia; Chan, Alice H. D.; Yang, Jing; Gao, Jia-Hong; Siok, Wai Ting

    2011-01-01

    How second language (L2) learning is achieved in the human brain remains one of the fundamental questions of neuroscience and linguistics. Previous neuroimaging studies with bilinguals have consistently shown overlapping cortical organization of the native language (L1) and L2, leading to a prediction that a common neurobiological marker may be responsible for the development of the two languages. Here, by using functional MRI, we show that later skills to read in L2 are predicted by the activity level of the fusiform–caudate circuit in the left hemisphere, which nonetheless is not predictive of the ability to read in the native language. We scanned 10-y-old children while they performed a lexical decision task on L2 (and L1) stimuli. The subjects’ written language (reading) skills were behaviorally assessed twice, the first time just before we performed the fMRI scan (time 1 reading) and the second time 1 y later (time 2 reading). A whole-brain based analysis revealed that activity levels in left caudate and left fusiform gyrus correlated with L2 literacy skills at time 1. After controlling for the effects of time 1 reading and nonverbal IQ, or the effect of in-scanner lexical performance, the development in L2 literacy skills (time 2 reading) was also predicted by activity in left caudate and fusiform regions that are thought to mediate language control functions and resolve competition arising from L1 during L2 learning. Our findings suggest that the activity level of left caudate and fusiform regions serves as an important neurobiological marker for predicting accomplishment in reading skills in a new language. PMID:21262807

  13. Activity levels in the left hemisphere caudate-fusiform circuit predict how well a second language will be learned.

    PubMed

    Tan, Li Hai; Chen, Lin; Yip, Virginia; Chan, Alice H D; Yang, Jing; Gao, Jia-Hong; Siok, Wai Ting

    2011-02-01

    How second language (L2) learning is achieved in the human brain remains one of the fundamental questions of neuroscience and linguistics. Previous neuroimaging studies with bilinguals have consistently shown overlapping cortical organization of the native language (L1) and L2, leading to a prediction that a common neurobiological marker may be responsible for the development of the two languages. Here, by using functional MRI, we show that later skills to read in L2 are predicted by the activity level of the fusiform-caudate circuit in the left hemisphere, which nonetheless is not predictive of the ability to read in the native language. We scanned 10-y-old children while they performed a lexical decision task on L2 (and L1) stimuli. The subjects' written language (reading) skills were behaviorally assessed twice, the first time just before we performed the fMRI scan (time 1 reading) and the second time 1 y later (time 2 reading). A whole-brain based analysis revealed that activity levels in left caudate and left fusiform gyrus correlated with L2 literacy skills at time 1. After controlling for the effects of time 1 reading and nonverbal IQ, or the effect of in-scanner lexical performance, the development in L2 literacy skills (time 2 reading) was also predicted by activity in left caudate and fusiform regions that are thought to mediate language control functions and resolve competition arising from L1 during L2 learning. Our findings suggest that the activity level of left caudate and fusiform regions serves as an important neurobiological marker for predicting accomplishment in reading skills in a new language.

  14. Implementation of Complete Boolean Logic Functions in Single Complementary Resistive Switch

    PubMed Central

    Gao, Shuang; Zeng, Fei; Wang, Minjuan; Wang, Guangyue; Song, Cheng; Pan, Feng

    2015-01-01

    The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implementation of complete Boolean logic functions in a single CRS cell. The first method is based on the intrinsic switchable diode of a peculiar CRS cell that is composed of two anti-serial bipolar resistive switches with a rectifying high resistance state, while the second method is based directly on the complementary switching behaviour itself of any single CRS cell. The feasibilities of both methods have been theoretically predicted and then experimentally demonstrated on the basis of a Ta/Ta2O5/Pt/Ta2O5/Ta CRS cell. Therefore, these two methods—in particular the complementary switching behaviour itself-based method, which has natural immunity to the sneak-path issue of crossbar logic circuits—are believed to be capable of significantly advancing both our understanding and commercialization of related logic circuits. Moreover, peculiar CRS cells have been demonstrated to be feasible for tri-level storage, which can serve as an alternative method of realising ultra-high-density data storage. PMID:26486231

  15. Nanowire NMOS Logic Inverter Characterization.

    PubMed

    Hashim, Yasir

    2016-06-01

    This study is the first to demonstrate characteristics optimization of nanowire N-Channel Metal Oxide Semiconductor (NW-MOS) logic inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. A computer-based model used to produce static characteristics of NW-NMOS logic inverter. In this research two circuit configuration of NW-NMOS inverter was studied, in first NW-NMOS circuit, the noise margin for (low input-high output) condition was very low. For second NMOS circuit gives excellent noise margins, and results indicate that optimization depends on applied voltage to the inverter. Increasing gate to source voltage with (2/1) nanowires ratio results better noise margins. Increasing of applied DC load transistor voltage tends to increasing in decreasing noise margins; decreasing this voltage will improve noise margins significantly. PMID:27427653

  16. Contingencies, logic, and learning.

    PubMed

    Bower, T G

    1997-01-01

    A logical analysis of operant learning is presented. In total, the analysis makes a number of predictions that are different from the predictions of any other theory. Individual predictions can be explained by other theories, but the pattern of predictions is unique. Some tests of the predictions of the analysis with human newborns are described. The analysis predicts increased variance in sucking with the introduction of continuous reinforcement. This does occur. The analysis predicts a decreased rate of sucking with a shift from continuous to partial reinforcement. This does occur. The analysis predicts an increased rate of sucking with a shift from continuous reinforcement to continuous plus noncontingent reinforcement. Due to methodological deficiencies, we have been unable to test this prediction. However, it has been confirmed by others. The most exciting prediction of the analysis is a rapid way of producing extinction. That has not been tested with newborns; however, there is confirmatory evidence in the literature.

  17. Adaptive parallel logic networks

    NASA Technical Reports Server (NTRS)

    Martinez, Tony R.; Vidal, Jacques J.

    1988-01-01

    Adaptive, self-organizing concurrent systems (ASOCS) that combine self-organization with massive parallelism for such applications as adaptive logic devices, robotics, process control, and system malfunction management, are presently discussed. In ASOCS, an adaptive network composed of many simple computing elements operating in combinational and asynchronous fashion is used and problems are specified by presenting if-then rules to the system in the form of Boolean conjunctions. During data processing, which is a different operational phase from adaptation, the network acts as a parallel hardware circuit.

  18. Nanoelectronic circuit design and test

    NASA Astrophysics Data System (ADS)

    Simsir, Muzaffer Orkun

    Controlling power consumption in CMOS integrated circuits (ICs) during normal mode of operation is becoming one of the limiting factors to further scaling. In addition, it is a well known fact that during testing of a complex IC, power consumption can far exceed the values reached during its normal operation. High power consumption, combined with limited cooling support, leads to overheating of ICs. This can cause permanent damage to the chip or can invalidate test results due to the fact that extreme temperature variations lead to changes in path delays. Therefore, even good chips can fail the test. For these reasons, thermal problems during test need to be identified to prevent the loss of yield in CMOS ICs. In this thesis, we propose a methodology for thermally characterizing circuits under test. Using this methodology, it is possible to simulate the thermal profiles of the chips during test and prevent possible yield loss because of thermal problems. In addition to the problems associated with power and temperature, a more important barrier is the scaling limitations of the CMOS technology. It has been predicted that in next decade, it will not be possible to scale it further. In the near future, rather than a transition to a completely new technology, extensions to CMOS seem to be more realistic. Double-gate CMOS technology is one of the most promising alternatives that offers a simple extension to CMOS. The transistors of this technology are formed by adding a second gate across the conventional CMOS transistor gate. Designing circuits using this technology has attracted a lot of attention. However, as circuit design methods mature, there is a need to identify how these circuits can be tested. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model all defects in double-gate CMOS circuits. Therefore, fault models of this technology need to be defined to enable manufacturing-time testing. In this thesis, we

  19. Modifications in CMOS Dynamic Logic Style: A Review Paper

    NASA Astrophysics Data System (ADS)

    Meher, Preetisudha; Mahapatra, Kamalakanta

    2015-12-01

    Dynamic logic style is used in high performance circuit design because of its fast speed and less transistors requirement as compared to CMOS logic style. But it is not widely accepted for all types of circuit implementations due to its less noise tolerance and charge sharing problems. A small noise at the input of the dynamic logic can change the desired output. Domino logic uses one static CMOS inverter at the output of dynamic node which is more noise immune and consuming very less power as compared to other proposed circuit. In this paper, an overview and classification of these techniques are first presented and then compared according to their performance.

  20. A verification logic representation of indeterministic signal states

    NASA Technical Reports Server (NTRS)

    Gambles, J. W.; Windley, P. J.

    1991-01-01

    The integration of modern CAD tools with formal verification environments require translation from hardware description language to verification logic. A signal representation including both unknown state and a degree of strength indeterminacy is essential for the correct modeling of many VLSI circuit designs. A higher-order logic theory of indeterministic logic signals is presented.

  1. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    SciTech Connect

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  2. An evaluation of logic regression-based biomarker discovery across multiple intergenic regions for predicting host specificity in Escherichia coli.

    PubMed

    Zhi, Shuai; Li, Qiaozhi; Yasui, Yutaka; Banting, Graham; Edge, Thomas A; Topp, Edward; McAllister, Tim A; Neumann, Norman F

    2016-10-01

    Several studies have demonstrated that E. coli appears to display some level of host adaptation and specificity. Recent studies in our laboratory support these findings as determined by logic regression modeling of single nucleotide polymorphisms (SNP) in intergenic regions (ITGRs). We sought to determine the degree of host-specific information encoded in various ITGRs across a library of animal E. coli isolates using both whole genome analysis and a targeted ITGR sequencing approach. Our findings demonstrated that ITGRs across the genome encode various degrees of host-specific information. Incorporating multiple ITGRs (i.e., concatenation) into logic regression model building resulted in greater host-specificity and sensitivity outcomes in biomarkers, but the overall level of polymorphism in an ITGR did not correlate with the degree of host-specificity encoded in the ITGR. This suggests that distinct SNPs in ITGRs may be more important in defining host-specificity than overall sequence variation, explaining why traditional unsupervised learning phylogenetic approaches may be less informative in terms of revealing host-specific information encoded in DNA sequence. In silico analysis of 80 candidate ITGRs from publically available E. coli genomes was performed as a tool for discovering highly host-specific ITGRs. In one ITGR (ydeR-yedS) we identified a SNP biomarker that was 98% specific for cattle and for which 92% of all E. coli isolates originating from cattle carried this unique biomarker. In the case of humans, a host-specific biomarker (98% specificity) was identified in the concatenated ITGR sequences of rcsD-ompC, ydeR-yedS, and rclR-ykgE, and for which 78% of E. coli originating from humans carried this biomarker. Interestingly, human-specific biomarkers were dominant in ITGRs regulating antibiotic resistance, whereas in cattle host-specific biomarkers were found in ITGRs involved in stress regulation. These data suggest that evolution towards host

  3. An evaluation of logic regression-based biomarker discovery across multiple intergenic regions for predicting host specificity in Escherichia coli.

    PubMed

    Zhi, Shuai; Li, Qiaozhi; Yasui, Yutaka; Banting, Graham; Edge, Thomas A; Topp, Edward; McAllister, Tim A; Neumann, Norman F

    2016-10-01

    Several studies have demonstrated that E. coli appears to display some level of host adaptation and specificity. Recent studies in our laboratory support these findings as determined by logic regression modeling of single nucleotide polymorphisms (SNP) in intergenic regions (ITGRs). We sought to determine the degree of host-specific information encoded in various ITGRs across a library of animal E. coli isolates using both whole genome analysis and a targeted ITGR sequencing approach. Our findings demonstrated that ITGRs across the genome encode various degrees of host-specific information. Incorporating multiple ITGRs (i.e., concatenation) into logic regression model building resulted in greater host-specificity and sensitivity outcomes in biomarkers, but the overall level of polymorphism in an ITGR did not correlate with the degree of host-specificity encoded in the ITGR. This suggests that distinct SNPs in ITGRs may be more important in defining host-specificity than overall sequence variation, explaining why traditional unsupervised learning phylogenetic approaches may be less informative in terms of revealing host-specific information encoded in DNA sequence. In silico analysis of 80 candidate ITGRs from publically available E. coli genomes was performed as a tool for discovering highly host-specific ITGRs. In one ITGR (ydeR-yedS) we identified a SNP biomarker that was 98% specific for cattle and for which 92% of all E. coli isolates originating from cattle carried this unique biomarker. In the case of humans, a host-specific biomarker (98% specificity) was identified in the concatenated ITGR sequences of rcsD-ompC, ydeR-yedS, and rclR-ykgE, and for which 78% of E. coli originating from humans carried this biomarker. Interestingly, human-specific biomarkers were dominant in ITGRs regulating antibiotic resistance, whereas in cattle host-specific biomarkers were found in ITGRs involved in stress regulation. These data suggest that evolution towards host

  4. Analysis and prediction of aperiodic hydrodynamic oscillatory time series by feed-forward neural networks, fuzzy logic, and a local nonlinear predictor

    SciTech Connect

    Gentili, Pier Luigi; Gotoda, Hiroshi; Dolnik, Milos; Epstein, Irving R.

    2015-01-15

    Forecasting of aperiodic time series is a compelling challenge for science. In this work, we analyze aperiodic spectrophotometric data, proportional to the concentrations of two forms of a thermoreversible photochromic spiro-oxazine, that are generated when a cuvette containing a solution of the spiro-oxazine undergoes photoreaction and convection due to localized ultraviolet illumination. We construct the phase space for the system using Takens' theorem and we calculate the Lyapunov exponents and the correlation dimensions to ascertain the chaotic character of the time series. Finally, we predict the time series using three distinct methods: a feed-forward neural network, fuzzy logic, and a local nonlinear predictor. We compare the performances of these three methods.

  5. HDL to verification logic translator

    NASA Technical Reports Server (NTRS)

    Gambles, J. W.; Windley, P. J.

    1992-01-01

    The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

  6. Fuzzy logic

    NASA Technical Reports Server (NTRS)

    Zadeh, Lofti A.

    1988-01-01

    The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. The discussion covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control.

  7. Towards programmable plant genetic circuits.

    PubMed

    Medford, June I; Prasad, Ashok

    2016-07-01

    Synthetic biology enables the construction of genetic circuits with predictable gene functions in plants. Detailed quantitative descriptions of the transfer function or input-output function for genetic parts (promoters, 5' and 3' untranslated regions, etc.) are collected. These data are then used in computational simulations to determine their robustness and desired properties, thereby enabling the best components to be selected for experimental testing in plants. In addition, the process forms an iterative workflow which allows vast improvement to validated elements with sub-optimal function. These processes enable computational functions such as digital logic in living plants and follow the pathway of technological advances which took us from vacuum tubes to cell phones. PMID:27297052

  8. GMAG Dissertation Award Talk: All Spin Logic -- Multimagnet Networks interacting via Spin currents

    NASA Astrophysics Data System (ADS)

    Srinivasan, Srikant

    2012-02-01

    Digital logic circuits have traditionally been based on storing information as charge on capacitors, and the stored information is transferred by controlling the flow of charge. However, electrons carry both charge and spin, the latter being responsible for magnetic phenomena. In the last few decades, there has been a significant improvement in our ability to control spins and their interaction with magnets. All Spin Logic (ASL) represents a new approach to information processing where spins and magnets now mirror the roles of charges and capacitors in conventional logic circuits. In this talk I first present a model [1] that couples non-collinear spin transport with magnet-dynamics to predict the switching behavior of the basic ASL device. This model is based on established physics and is benchmarked against available experimental data that demonstrate spin-torque switching in lateral structures. Next, the model is extended to simulate multi-magnet networks coupled with spin transport channels. The simulations suggest ASL devices have the essential characteristics for building logic circuits. In particular, (1) the example of an ASL ring oscillator [2, 3] is used to provide a clear signature of directed information transfer in cascaded ASL devices without the need for external control circuitry and (2) a simulated NAND [4] gate with fan-out of 2 suggests that ASL can implement universal logic and drive subsequent stages. Finally I will discuss how ASL based circuits could also have potential use in the design of neuromorphic circuits suitable for hybrid analog/digital information processing because of the natural mapping of ASL devices to neurons [4]. [4pt] [1] B. Behin-Aein, A. Sarkar, S. Srinivasan, and S. Datta, ``Switching Energy-Delay of All-Spin Logic devices,'' Appl. Phys. Lett., 98, 123510 (2011).[0pt] [2] S. Srinivasan, A. Sarkar, B. Behin-Aein, and S. Datta, ``All Spin Logic Device with Inbuilt Non-reciprocity,'' IEEE Trans. Magn., 47, 10 (2011).[0pt] [3

  9. Fuzzy logic for fault diagnosis

    NASA Astrophysics Data System (ADS)

    Comly, James B.; Bonissone, Piero P.; Dausch, Mark E.

    1991-02-01

    Advanced real-time digital controls for complex plants or processes will use a model (an " Observer" ) which predicts the values for sensor readings expected from the actual plant these vote as alternate " sensors" if the real ones fail. We are exploring further use of the Observer for real-time embedded diagnostics based on high speed fuzzy logic chips just becoming available. We have established a Fuzzy Inferencing Test Bed for fuzzy logic applications. It uses a set of development tools which allow applications to be built and tested against simulated systems and then ported directly to a high speed fuzzy logic chip. With the Fuzzy Inferencing Test we investigate very high speed fuzzy logic to: isolate faults using static information and early fault information that evolves rapidly in time validate and smooth readings from redundant sensors and smoothly select alternate control modes in intelligent controllers. This paper reports our experience with fuzzy logic in these kinds of applications.

  10. Use of fuzzy logic models for prediction of taste and odor compounds in algal bloom-affected inland water bodies.

    PubMed

    Bruder, Slawa; Babbar-Sebens, Meghna; Tedesco, Lenore; Soyeux, Emmanuel

    2014-03-01

    Mechanistic modeling of how algal species produce metabolites (e.g., taste and odor compounds geosmin and 2-methyl isoborneol (2-MIB)) as a biological response is currently not well understood. However, water managers and water utilities using these reservoirs often need methods for predicting metabolite production, so that appropriate water treatment procedures can be implemented. In this research, a heuristic approach using Adaptive Network-based Fuzzy Inference System (ANFIS) was developed to determine the underlying nonlinear and uncertain quantitative relationship between observed cyanobacterial metabolites (2-MIB and geosmin), various algal species, and physical and chemical variables. The model is proposed to be used in conjunction with numerical water quality models that can predict spatial-temporal distribution of flows, velocities, water quality parameters, and algal functional groups. The coupling of the proposed metabolite model with the numerical water quality models would assist various utilities which use mechanistic water quality models to also be able to predict distribution of taste and odor metabolites, especially when monitoring of metabolites is limited. The proposed metabolite model was developed and tested for the Eagle Creek Reservoir in Indiana (USA) using observations over a 3-year period (2008-2010). Results show that the developed models performed well for geosmin (R (2) = 0.83 for all training data and R (2) = 0.78 for validation of all 10 data points in the validation dataset) and reasonably well for the 2-MIB (R (2) = 0.82 for all training data and R (2) = 0.70 for 7 out of 10 data points in the validation dataset). PMID:24242080

  11. Physical synthesis of quantum circuits using templates

    NASA Astrophysics Data System (ADS)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-06-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of "physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  12. Physical synthesis of quantum circuits using templates

    NASA Astrophysics Data System (ADS)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-10-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of " physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  13. Development of ferrite logic devices for an arithmetic processor

    NASA Technical Reports Server (NTRS)

    Heckler, C. H., Jr.

    1972-01-01

    A number of fundamentally ultra-reliable, all-magnetic logic circuits are developed using as a basis a single element ferrite structure wired as a logic delay element. By making minor additions or changes to the basic wiring pattern of the delay element other logic functions such as OR, AND, NEGATION, MAJORITY, EXCLUSIVE-OR, and FAN-OUT are developed. These logic functions are then used in the design of a full-adder, a set/reset flip-flop, and an edge detector. As a demonstration of the utility of all the developed devices, an 8-bit, all-magnetic, logic arithmetic unit capable of controlled addition, subtraction, and multiplication is designed. A new basic ferrite logic element and associated complementary logic scheme with the potential of improved performance is also described. Finally, an improved batch process for fabricating joint-free power drive and logic interconnect conductors for this basic class of all-magnetic logic is presented.

  14. Design automation for integrated circuits

    NASA Astrophysics Data System (ADS)

    Newell, S. B.; de Geus, A. J.; Rohrer, R. A.

    1983-04-01

    Consideration is given to the development status of the use of computers in automated integrated circuit design methods, which promise the minimization of both design time and design error incidence. Integrated circuit design encompasses two major tasks: error specification, in which the goal is a logic diagram that accurately represents the desired electronic function, and physical specification, in which the goal is an exact description of the physical locations of all circuit elements and their interconnections on the chip. Design automation not only saves money by reducing design and fabrication time, but also helps the community of systems and logic designers to work more innovatively. Attention is given to established design automation methodologies, programmable logic arrays, and design shortcuts.

  15. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  16. Accuracy of prediction of infarct-related arrhythmic circuits from image-based models reconstructed from low and high resolution MRI.

    PubMed

    Deng, Dongdong; Arevalo, Hermenegild; Pashakhanloo, Farhad; Prakosa, Adityo; Ashikaga, Hiroshi; McVeigh, Elliot; Halperin, Henry; Trayanova, Natalia

    2015-01-01

    Identification of optimal ablation sites in hearts with infarct-related ventricular tachycardia (VT) remains difficult to achieve with the current catheter-based mapping techniques. Limitations arise from the ambiguities in determining the reentrant pathways location(s). The goal of this study was to develop experimentally validated, individualized computer models of infarcted swine hearts, reconstructed from high-resolution ex-vivo MRI and to examine the accuracy of the reentrant circuit location prediction when models of the same hearts are instead reconstructed from low clinical-resolution MRI scans. To achieve this goal, we utilized retrospective data obtained from four pigs ~10 weeks post infarction that underwent VT induction via programmed stimulation and epicardial activation mapping via a multielectrode epicardial sock. After the experiment, high-resolution ex-vivo MRI with late gadolinium enhancement was acquired. The Hi-res images were downsampled into two lower resolutions (Med-res and Low-res) in order to replicate image quality obtainable in the clinic. The images were segmented and models were reconstructed from the three image stacks for each pig heart. VT induction similar to what was performed in the experiment was simulated. Results of the reconstructions showed that the geometry of the ventricles including the infarct could be accurately obtained from Med-res and Low-res images. Simulation results demonstrated that induced VTs in the Med-res and Low-res models were located close to those in Hi-res models. Importantly, all models, regardless of image resolution, accurately predicted the VT morphology and circuit location induced in the experiment. These results demonstrate that MRI-based computer models of hearts with ischemic cardiomyopathy could provide a unique opportunity to predict and analyze VT resulting for from specific infarct architecture, and thus may assist in clinical decisions to identify and ablate the reentrant circuit(s). PMID

  17. Bilayer avalanche spin-diode logic

    SciTech Connect

    Friedman, Joseph S. Querlioz, Damien; Fadel, Eric R.; Wessels, Bruce W.; Sahakian, Alan V.

    2015-11-15

    A novel spintronic computing paradigm is proposed and analyzed in which InSb p-n bilayer avalanche spin-diodes are cascaded to efficiently perform complex logic operations. This spin-diode logic family uses control wires to generate magnetic fields that modulate the resistance of the spin-diodes, and currents through these devices control the resistance of cascaded devices. Electromagnetic simulations are performed to demonstrate the cascading mechanism, and guidelines are provided for the development of this innovative computing technology. This cascading scheme permits compact logic circuits with switching speeds determined by electromagnetic wave propagation rather than electron motion, enabling high-performance spintronic computing.

  18. Bilayer avalanche spin-diode logic

    NASA Astrophysics Data System (ADS)

    Friedman, Joseph S.; Fadel, Eric R.; Wessels, Bruce W.; Querlioz, Damien; Sahakian, Alan V.

    2015-11-01

    A novel spintronic computing paradigm is proposed and analyzed in which InSb p-n bilayer avalanche spin-diodes are cascaded to efficiently perform complex logic operations. This spin-diode logic family uses control wires to generate magnetic fields that modulate the resistance of the spin-diodes, and currents through these devices control the resistance of cascaded devices. Electromagnetic simulations are performed to demonstrate the cascading mechanism, and guidelines are provided for the development of this innovative computing technology. This cascading scheme permits compact logic circuits with switching speeds determined by electromagnetic wave propagation rather than electron motion, enabling high-performance spintronic computing.

  19. Product Łukasiewicz Quantum Logic

    NASA Astrophysics Data System (ADS)

    Bertini, Cesarino; Leporini, Roberto

    2011-02-01

    The theory of logical gates in quantum computation has suggested new forms of quantum logic, called quantum computational logics. The basic semantic idea is the following: the meaning of a sentence is identified with a density operator (called qumix). In this framework, any sentence α of the language gives rise to a quantum circuit that transforms the qumix associated to the atomic subformulas of α into the qumix associated to α. In this paper we enrich the language by adding a new connective which expresses truncated sum.

  20. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  1. Engineering genetic circuits that compute and remember.

    PubMed

    Siuti, Piro; Yazbek, John; Lu, Timothy K

    2014-01-01

    Memory and logic are central to complex state-dependent computing, and state-dependent behaviors are a feature of natural biological systems. Recently, we created a platform for integrated logic and memory by using synthetic gene circuits, and we demonstrated the implementation of all two-input logic gates with memory in living cells. Here we provide a detailed protocol for the construction of two-input Boolean logic functions with concomitant DNA-based memory. This technology platform allows for straightforward assembly of integrated logic-and-memory circuits that implement desired behaviors within a couple of weeks. It should enable the encoding of advanced computational operations in living cells, including sequential-logic and biological-state machines, for a broad range of applications in biotechnology, basic science and biosensing. PMID:24810038

  2. Engineering genetic circuits that compute and remember.

    PubMed

    Siuti, Piro; Yazbek, John; Lu, Timothy K

    2014-01-01

    Memory and logic are central to complex state-dependent computing, and state-dependent behaviors are a feature of natural biological systems. Recently, we created a platform for integrated logic and memory by using synthetic gene circuits, and we demonstrated the implementation of all two-input logic gates with memory in living cells. Here we provide a detailed protocol for the construction of two-input Boolean logic functions with concomitant DNA-based memory. This technology platform allows for straightforward assembly of integrated logic-and-memory circuits that implement desired behaviors within a couple of weeks. It should enable the encoding of advanced computational operations in living cells, including sequential-logic and biological-state machines, for a broad range of applications in biotechnology, basic science and biosensing.

  3. Simple digital pulse-programing circuit

    NASA Technical Reports Server (NTRS)

    Langston, J. L.

    1979-01-01

    Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.

  4. Interface Circuits for Self-Checking Microprocessors

    NASA Technical Reports Server (NTRS)

    Rennels, D. A.; Chandramouli, R.

    1986-01-01

    Fault-tolerant-microcomputer concept based on enhancing "simple" computer with redundancy and self-checking logic circuits detect hardware faults. Interface and checking logic and redundant processors confer on 16-bit microcomputer ability to check itself for hardware faults. Checking circuitry also checks itself. Concept of self-checking complementary pairs (SCCP's) employed throughout ICL unit.

  5. Digital system provides superregulation of nanosecond amplifier-discriminator circuit

    NASA Technical Reports Server (NTRS)

    Forges, K. G.

    1966-01-01

    Feedback system employing a digital logic comparator to detect and correct amplifier drift provides stable gain characteristics for nanosecond amplifiers used in counting applications. Additional anticoincidence logic enables application of the regulation circuit to the amplifier and discriminator while they are mounted in an operable circuit.

  6. Electronic logic to enhance switch reliability in detecting openings and closures of redundant switches

    DOEpatents

    Cooper, James A.

    1986-01-01

    A logic circuit is used to enhance redundant switch reliability. Two or more switches are monitored for logical high or low output. The output for the logic circuit produces a redundant and failsafe representation of the switch outputs. When both switch outputs are high, the output is high. Similarly, when both switch outputs are low, the logic circuit's output is low. When the output states of the two switches do not agree, the circuit resolves the conflict by memorizing the last output state which both switches were simultaneously in and produces the logical complement of this output state. Thus, the logic circuit of the present invention allows the redundant switches to be treated as if they were in parallel when the switches are open and as if they were in series when the switches are closed. A failsafe system having maximum reliability is thereby produced.

  7. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    SciTech Connect

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S.

    2013-12-21

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  8. Attenuation of single event induced pulses in CMOS combinational logic

    SciTech Connect

    Baze, M.P.; Buchner, S.P.

    1997-12-01

    Results are presented of a study of SEU generated transient pulse attenuation in combinational logic structures built using common digital CMOS design practices. SPICE circuit analysis, heavy ion tests, and pulsed, focused laser simulations were used to examine the response characteristics of transient pulse behavior in long logic strings. Results show that while there is an observable effect, it cannot be generally assumed that attenuation will significantly reduce observed circuit bit error rates.

  9. Implementation of field programmable logic arrays. Final report

    SciTech Connect

    Anderson, J.D.

    1981-03-01

    Field Programmable Logic Arrays (FPLAs) were incorporated into a fire set tester and a development tester used to test a signal generator's logic boards. Other circuits were designed using the FPLA in code conversion and sequential control applications. A Curtiss Electro Devices FPLA programmer was purchased to program Signetics 82S100 and 82S101 devices.

  10. Synthetic Aperture Radar Image Formation in Reconfigurable Logic

    SciTech Connect

    DUDLEY,PETER A.

    2001-06-01

    This paper studies the implementation of polar format, synthetic aperture radar image formation in modern Field Programmable Gate Arrays (FPGA's). The polar format algorithm is described in rough terms and each of the processing steps is mapped to FPGA logic. This FPGA logic is analyzed with respect to throughput and circuit size for compatibility with airborne image formation.

  11. Driver circuit

    NASA Technical Reports Server (NTRS)

    Matsumoto, Raymond T. (Inventor); Higashi, Stanley T. (Inventor)

    1976-01-01

    A driver circuit which has low power requirements, a relatively small number of components and provides flexibility in output voltage setting. The driver circuit comprises, essentially, two portions which are selectively activated by the application of input signals. The output signal is determined by which of the two circuit portions is activated. While each of the two circuit portions operates in a manner similar to silicon controlled rectifiers (SCR), the circuit portions are on only when an input signal is supplied thereto.

  12. Giving Programming Students a Logical Step Up.

    ERIC Educational Resources Information Center

    Brown, David W.

    1990-01-01

    Presents a method to enhance the teaching of computer programing to secondary students that establishes a connection between logic, truth tables, switching circuits, gating symbols, flow charts, and pseudocode. The author asserts that the method prepares students for thinking processes related to programing. (MDH)

  13. Quantum logic gates for superconducting resonator qudits

    SciTech Connect

    Strauch, Frederick W.

    2011-11-15

    We study quantum information processing using superpositions of Fock states in superconducting resonators as quantum d-level systems (qudits). A universal set of single and coupled logic gates is theoretically proposed for resonators coupled by superconducting circuits of Josephson junctions. These gates use experimentally demonstrated interactions and provide an attractive route to quantum information processing using harmonic oscillator modes.

  14. Development of CMOS integrated circuits

    NASA Technical Reports Server (NTRS)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  15. Digital Circuit Analysis Using an 8080 Processor.

    ERIC Educational Resources Information Center

    Greco, John; Stern, Kenneth

    1983-01-01

    Presents the essentials of a program written in Intel 8080 assembly language for the steady state analysis of a combinatorial logic gate circuit. Program features and potential modifications are considered. For example, the program could also be extended to include clocked/unclocked sequential circuits. (JN)

  16. Introduction to lethal circuit transformations

    NASA Astrophysics Data System (ADS)

    Fišer, Petr; Schmidt, Jan

    2015-12-01

    Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.

  17. Multi-input regulation and logic with T7 promoters in cells and cell free systems

    SciTech Connect

    Iyer, Sukanya; Karig, David K; Norred, Sarah E; Simpson, Michael L; Doktycz, Mitchel John

    2014-01-01

    Engineered gene circuits offer an opportunity to harness biological systems for biotechnological and biomedical applications. However, reliance on host E. coli promoters for the construction of circuit elements, such as logic gates, makes implementation of predictable, independently functioning circuits difficult. In contrast, T7 promoters offer a simple orthogonal expression system for use in a variety of cellular backgrounds and even in cell free systems. Here we develop a T7 promoter system that can be regulated by two different transcriptional repressors for the construction of a logic gate that functions in cells and in cell free systems. We first present LacI repressible T7lacO promoters that are regulated from a distal lac operator site for repression. We next explore the positioning of a tet operator site within the T7lacO framework to create T7 promoters that respond to tet and lac repressors and realize an IMPLIES gate. Finally, we demonstrate that these dual input sensitive promoters function in a commercially available E. coli cell-free protein expression system. Together, our results contribute to the first demonstration of multi-input regulation of T7 promoters and expand the utility of T7 promoters in cell based as well as cell-free gene circuits.

  18. Integrated-Circuit Pseudorandom-Number Generator

    NASA Technical Reports Server (NTRS)

    Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

    1992-01-01

    Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

  19. Gas-Sensing Flip-Flop Circuits

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G.; Blaes, Brent R.; Williams, Roger; Ryan, Margaret A.

    1995-01-01

    Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

  20. Genetic Dissection of Neural Circuits

    PubMed Central

    Luo, Liqun; Callaway, Edward M.; Svoboda, Karel

    2009-01-01

    Understanding the principles of information processing in neural circuits requires systematic characterization of the participating cell types and their connections, and the ability to measure and perturb their activity. Genetic approaches promise to bring experimental access to complex neural systems, including genetic stalwarts such as the fly and mouse, but also to nongenetic systems such as primates. Together with anatomical and physiological methods, cell-type-specific expression of protein markers and sensors and transducers will be critical to construct circuit diagrams and to measure the activity of genetically defined neurons. Inactivation and activation of genetically defined cell types will establish causal relationships between activity in specific groups of neurons, circuit function, and animal behavior. Genetic analysis thus promises to reveal the logic of the neural circuits in complex brains that guide behaviors. Here we review progress in the genetic analysis of neural circuits and discuss directions for future research and development. PMID:18341986

  1. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization.

  2. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. PMID:27034378

  3. Optical reversible programmable Boolean logic unit.

    PubMed

    Chattopadhyay, Tanay

    2012-07-20

    Computing with reversibility is the only way to avoid dissipation of energy associated with bit erase. So, a reversible microprocessor is required for future computing. In this paper, a design of a simple all-optical reversible programmable processor is proposed using a polarizing beam splitter, liquid crystal-phase spatial light modulators, a half-wave plate, and plane mirrors. This circuit can perform 16 logical operations according to three programming inputs. Also, inputs can be easily recovered from the outputs. It is named the "reversible programmable Boolean logic unit (RPBLU)." The logic unit is the basic building block of many complex computational operations. Hence the design is important in sense. Two orthogonally polarized lights are defined here as two logical states, respectively.

  4. Implementing neural nets with programmable logic

    NASA Technical Reports Server (NTRS)

    Vidal, Jacques J.

    1988-01-01

    Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.

  5. CMOS Interface Circuits for Spin Tunneling Junction Based Magnetic Random Access Memories

    SciTech Connect

    Ganesh Saripalli

    2002-12-31

    Magneto resistive memories (MRAM) are non-volatile memories which use magnetic instead of electrical structures to store data. These memories, apart from being non-volatile, offer a possibility to achieve densities better than DRAMs and speeds faster than SRAMs. MRAMs could potentially replace all computer memory RAM technologies in use today, leading to future applications like instan-on computers and longer battery life for pervasive devices. Such rapid development was made possible due to the recent discovery of large magnetoresistance in Spin tunneling junction devices. Spin tunneling junctions (STJ) are composite structures consisting of a thin insulating layer sandwiched between two magnetic layers. This thesis research is targeted towards these spin tunneling junction based Magnetic memories. In any memory, some kind of an interface circuit is needed to read the logic states. In this thesis, four such circuits are proposed and designed for Magnetic memories (MRAM). These circuits interface to the Spin tunneling junctions and act as sense amplifiers to read their magnetic states. The physical structure and functional characteristics of these circuits are discussed in this thesis. Mismatch effects on the circuits and proper design techniques are also presented. To demonstrate the functionality of these interface structures, test circuits were designed and fabricated in TSMC 0.35{micro} CMOS process. Also circuits to characterize the process mismatches were fabricated and tested. These results were then used in Matlab programs to aid in design process and to predict interface circuit's yields.

  6. Interfacing synthetic DNA logic operations with protein outputs.

    PubMed

    Prokup, Alexander; Deiters, Alexander

    2014-11-24

    DNA logic gates are devices composed entirely of DNA that perform Boolean logic operations on one or more oligonucleotide inputs. Typical outputs of DNA logic gates are oligonucleotides or fluorescent signals. Direct activation of protein function has not been engineered as an output of a DNA-based computational circuit. Explicit control of protein activation enables the immediate triggering of enzyme function and could yield DNA computation outputs that are otherwise difficult to generate. By using zinc-finger proteins, AND, OR, and NOR logic gates were created that respond to short oligonucleotide inputs and lead to the activation or deactivation of a split-luciferase enzyme. The gate designs are simple and modular, thus enabling integration with larger multigate circuits, and the modular structure gives flexibility in the choice of protein output. The gates were also modified with translator circuits to provide protein activation in response to microRNA inputs as potential cellular cancer markers. PMID:25283524

  7. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  8. A method for predicting gamma-radiation dose rates in the premises of the multiple forced circulation circuit of an RBMK-1000 reactor from the data of chemical and radiospectrometric monitoring of coolant

    NASA Astrophysics Data System (ADS)

    Chernikov, O. G.; Kovalev, S. M.; Epikhin, A. I.; Kozlov, E. P.; Petrov, S. I.; Rodionov, Yu. A.; Kritskii, V. G.; Styazhkin, P. S.

    2009-05-01

    A mathematical model for predicting gamma-radiation dose rate in the premises of the multiple forced circulation circuit is developed, which is based on the data of water chemistry in the circuit, radionuclide composition of coolant, and hydraulic characteristics of equipment. Data on approbation of the model are presented that were obtained during the shutdown of power units at the Leningrad and Smolensk nuclear power stations.

  9. Pattern recognition using linguistic fuzzy logic predictors

    NASA Astrophysics Data System (ADS)

    Habiballa, Hashim

    2016-06-01

    The problem of pattern recognition has been solved with numerous methods in the Artificial Intelligence field. We present an unconventional method based on Lingustic Fuzzy Logic Forecaster which is primarily used for the task of time series analysis and prediction through logical deduction wtih linguistic variables. This method should be used not only to the time series prediction itself, but also for recognition of patterns in a signal with seasonal component.

  10. Fail safe logic design

    NASA Astrophysics Data System (ADS)

    Shield, I.

    1983-03-01

    Ideally, a circuit is said to be fail safe, if for every possible failure configuration, the circuit results in a safe side output. In order to guarantee safe side failures, it is imperative that the circuit detects any faults within it. A suitable procedure for doing this can be based on an error detecting code, such as the K out of N code. A number of circuit types are considered, taking into account a fault tolerant circuit, a fault secure circuit, a self testing circuit, a self checking circuit, a self checking checker, and a fail safe circuit. Attention is given to the realization of combinational circuits, aspects of safety and reliability, sequential circuits, the realization of sequential circuits, the occurrence of clock failure, and the design procedure.

  11. A circuit design for multi-inputs stateful OR gate

    NASA Astrophysics Data System (ADS)

    Chen, Qiao; Wang, Xiaoping; Wan, Haibo; Yang, Ran; Zheng, Jian

    2016-09-01

    The in situ logic operation on memristor memory has attracted researchers' attention. In this brief, a new circuit structure that performs a stateful OR logic operation is proposed. When our OR logic is operated in series with other logic operations (IMP, AND), only two voltages should to be changed while three voltages are necessary in the previous one-step OR logic operation. In addition, this circuit structure can be extended to multi-inputs OR operation to perfect the family of logic operations on memristive memory in nanocrossbar based networks. The proposed OR gate can enable fast logic operation, reduce the number of required memristors and the sequential steps. Through analysis and simulation, the feasibility of OR operation is demonstrated and the appropriate parameters are obtained.

  12. Fuzzy logic controller optimization

    DOEpatents

    Sepe, Jr., Raymond B; Miller, John Michael

    2004-03-23

    A method is provided for optimizing a rotating induction machine system fuzzy logic controller. The fuzzy logic controller has at least one input and at least one output. Each input accepts a machine system operating parameter. Each output produces at least one machine system control parameter. The fuzzy logic controller generates each output based on at least one input and on fuzzy logic decision parameters. Optimization begins by obtaining a set of data relating each control parameter to at least one operating parameter for each machine operating region. A model is constructed for each machine operating region based on the machine operating region data obtained. The fuzzy logic controller is simulated with at least one created model in a feedback loop from a fuzzy logic output to a fuzzy logic input. Fuzzy logic decision parameters are optimized based on the simulation.

  13. Universal programmable logic gate and routing method

    NASA Technical Reports Server (NTRS)

    Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)

    2009-01-01

    An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

  14. High-speed dynamic domino circuit implemented with gaas mesfets

    NASA Technical Reports Server (NTRS)

    Yang, Long (Inventor); Long, Stephen I. (Inventor)

    1990-01-01

    A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implementing the logic function. A pair of FETs are connected to provide an output inverter with two series diodes for level shift. A coupling capacitor may be employed with a further FET to provide level shifting required between the inverter and the logic circuit output terminal. These circuits may be cascaded to form a domino chain.

  15. Design of a Ferroelectric Programmable Logic Gate Array

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Ho, Fat Duen

    2003-01-01

    A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

  16. Auto-programmable impulse neural circuits

    NASA Technical Reports Server (NTRS)

    Watula, D.; Meador, J.

    1990-01-01

    Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.

  17. Digital circuits for computer applications: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  18. Fuzzy branching temporal logic.

    PubMed

    Moon, Seong-ick; Lee, Kwang H; Lee, Doheon

    2004-04-01

    Intelligent systems require a systematic way to represent and handle temporal information containing uncertainty. In particular, a logical framework is needed that can represent uncertain temporal information and its relationships with logical formulae. Fuzzy linear temporal logic (FLTL), a generalization of propositional linear temporal logic (PLTL) with fuzzy temporal events and fuzzy temporal states defined on a linear time model, was previously proposed for this purpose. However, many systems are best represented by branching time models in which each state can have more than one possible future path. In this paper, fuzzy branching temporal logic (FBTL) is proposed to address this problem. FBTL adopts and generalizes concurrent tree logic (CTL*), which is a classical branching temporal logic. The temporal model of FBTL is capable of representing fuzzy temporal events and fuzzy temporal states, and the order relation among them is represented as a directed graph. The utility of FBTL is demonstrated using a fuzzy job shop scheduling problem as an example. PMID:15376850

  19. A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

    PubMed Central

    Keshavarzian, Peiman; Mirzaee, Mahla Mohammad

    2012-01-01

    This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption. PMID:24198492

  20. A novel, efficient CNTFET Galois design as a basic ternary-valued logic field.

    PubMed

    Keshavarzian, Peiman; Mirzaee, Mahla Mohammad

    2012-01-01

    This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption.

  1. A novel, efficient CNTFET Galois design as a basic ternary-valued logic field.

    PubMed

    Keshavarzian, Peiman; Mirzaee, Mahla Mohammad

    2012-01-01

    This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption. PMID:24198492

  2. Logic gates based on ion transistors.

    PubMed

    Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus

    2012-01-01

    Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits. PMID:22643898

  3. Logic gates based on ion transistors

    NASA Astrophysics Data System (ADS)

    Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus

    2012-05-01

    Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits.

  4. Automated ILA design for synchronous sequential circuits

    NASA Technical Reports Server (NTRS)

    Liu, M. N.; Liu, K. Z.; Maki, G. K.; Whitaker, S. R.

    1991-01-01

    An iterative logic array (ILA) architecture for synchronous sequential circuits is presented. This technique utilizes linear algebra to produce the design equations. The ILA realization of synchronous sequential logic can be fully automated with a computer program. A programmable design procedure is proposed to fullfill the design task and layout generation. A software algorithm in the C language has been developed and tested to generate 1 micron CMOS layouts using the Hewlett-Packard FUNGEN module generator shell.

  5. Logic Design Pathology and Space Flight Electronics

    NASA Technical Reports Server (NTRS)

    Katz, Richard; Barto, Rod L.; Erickson, K.

    1997-01-01

    Logic design errors have been observed in space flight missions and the final stages of ground test. The technologies used by designers and their design/analysis methodologies will be analyzed. This will give insight to the root causes of the failures. These technologies include discrete integrated circuit based systems, systems based on field and mask programmable logic, and the use computer aided engineering (CAE) systems. State-of-the-art (SOTA) design tools and methodologies will be analyzed with respect to high-reliability spacecraft design and potential pitfalls are discussed. Case studies of faults from large expensive programs to "smaller, faster, cheaper" missions will be used to explore the fundamental reasons for logic design problems.

  6. Design Techniques for Power-Aware Combinational Logic SER Mitigation

    NASA Astrophysics Data System (ADS)

    Mahatme, Nihaar N.

    The history of modern semiconductor devices and circuits suggests that technologists have been able to maintain scaling at the rate predicted by Moore's Law [Moor-65]. With improved performance, speed and lower area, technology scaling has also exacerbated reliability issues such as soft errors. Soft errors are transient errors that occur in microelectronic circuits due to ionizing radiation particle strikes on reverse biased semiconductor junctions. These radiation induced errors at the terrestrial-level are caused due to radiation particle strikes by (1) alpha particles emitted as decay products of packing material (2) cosmic rays that produce energetic protons and neutrons, and (3) thermal neutrons [Dodd-03], [Srou-88] and more recently muons and electrons [Ma-79] [Nara-08] [Siew-10] [King-10]. In the space environment radiation induced errors are a much bigger threat and are mainly caused by cosmic heavy-ions, protons etc. The effects of radiation exposure on circuits and measures to protect against them have been studied extensively for the past 40 years, especially for parts operating in space. Radiation particle strikes can affect memory as well as combinational logic. Typically when these particles strike semiconductor junctions of transistors that are part of feedback structures such as SRAM memory cells or flip-flops, it can lead to an inversion of the cell content. Such a failure is formally called a bit-flip or single-event upset (SEU). When such particles strike sensitive junctions part of combinational logic gates they produce transient voltage spikes or glitches called single-event transients (SETs) that could be latched by receiving flip-flops. As the circuits are clocked faster, there are more number of clocking edges which increases the likelihood of latching these transients. In older technology generations the probability of errors in flip-flops due to SETs being latched was much lower compared to direct strikes on flip-flops or SRAMs leading to

  7. "Glitch Logic" and Applications to Computing and Information Security

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Katkoori, Srinivas

    2009-01-01

    This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

  8. Predictive lethal proarrhythmic risk evaluation using a closed-loop-circuit cell network with human induced pluripotent stem cells derived cardiomyocytes

    NASA Astrophysics Data System (ADS)

    Nomura, Fumimasa; Hattori, Akihiro; Terazono, Hideyuki; Kim, Hyonchol; Odaka, Masao; Sugio, Yoshihiro; Yasuda, Kenji

    2016-06-01

    For the prediction of lethal arrhythmia occurrence caused by abnormality of cell-to-cell conduction, we have developed a next-generation in vitro cell-to-cell conduction assay, i.e., a quasi in vivo assay, in which the change in spatial cell-to-cell conduction is quantitatively evaluated from the change in waveforms of the convoluted electrophysiological signals from lined-up cardiomyocytes on a single closed loop of a microelectrode of 1 mm diameter and 20 µm width in a cultivation chip. To evaluate the importance of the closed-loop arrangement of cardiomyocytes for prediction, we compared the change in waveforms of convoluted signals of the responses in the closed-loop circuit arrangement with that of the response of cardiomyocyte clusters using a typical human ether a go-go related gene (hERG) ion channel blocker, E-4031. The results showed that (1) waveform prolongation and fluctuation both in the closed loops and clusters increased depending on the E-4031 concentration increase. However, (2) only the waveform signals in closed loops showed an apparent temporal change in waveforms from ventricular tachycardia (VT) to ventricular fibrillation (VF), which is similar to the most typical cell-to-cell conductance abnormality. The results indicated the usefulness of convoluted waveform signals of a closed-loop cell network for acquiring reproducible results acquisition and more detailed temporal information on cell-to-cell conduction.

  9. Reliability concerns with logical constants in Xilinx FPGA designs

    SciTech Connect

    Quinn, Heather M; Graham, Paul; Morgan, Keith; Ostler, Patrick; Allen, Greg; Swift, Gary; Tseng, Chen W

    2009-01-01

    In Xilinx Field Programmable Gate Arrays logical constants, which ground unused inputs and provide constants for designs, are implemented in SEU-susceptible logic. In the past, these logical constants have been shown to cause the user circuit to output bad data and were not resetable through off-line rcconfiguration. In the more recent devices, logical constants are less problematic, though mitigation should still be considered for high reliability applications. In conclusion, we have presented a number of reliability concerns with logical constants in the Xilinx Virtex family. There are two main categories of logical constants: implicit and explicit logical constants. In all of the Virtex devices, the implicit logical constants are implemented using half latches, which in the most recent devices are several orders of magnitudes smaller than configuration bit cells. Explicit logical constants are implemented exclusively using constant LUTs in the Virtex-I and Virtex-II, and use a combination of constant LUTs and architectural posts to the ground plane in the Virtex-4. We have also presented mitigation methods and options for these devices. While SEUs in implicit and some types of explicit logical constants can cause data corrupt, the chance of failure from these components is now much smaller than it was in the Virtex-I device. Therefore, for many cases, mitigation might not be necessary, except under extremely high reliability situations.

  10. Impact of river stage prediction methods on stream-aquifer exchanges in a hydro(geo)logical model at the regional scale

    NASA Astrophysics Data System (ADS)

    Saleh, F.; Flipo, N.; de Fouquet, C.

    2012-04-01

    The main objective of this study is to provide a realistic simulation of river stage in regional river networks in order to improve the quantification of stream-aquifer exchanges and better assess the associated aquifer responses that are often impacted by the magnitude and the frequency of the river stage fluctuations. The study focuses on the Oise basin (17 000 km2, part of the 65 000 km2 Seine basin in Northern France) where stream-aquifer exchanges cannot be assessed directly by experimental methods. Nowadays numerical methods are the most appropriate approaches for assessing stream-aquifer exchanges at this scale. A regional distributed process-based hydro(geo)logical model, Eau-Dyssée, is used, which aims at the integrated modeling of the hydrosystem to manage the various elements involved in the quantitative and qualitative aspects of water resources. Eau-Dyssée simulates pseudo 3D flow in aquifer systems solving the diffusivity equation with a finite difference numerical scheme. River flow is simulated with a Muskingum model. In addition to the in-stream discharge, a river stage estimate is needed to calculate the water exchange at the stream-aquifer interface using the Darcy law. Three methods for assessing in-stream river stages are explored to determine the most appropriate representation at regional scale over 25 years (1980-2005). The first method consists in defining rating curves for each cell of a 1D Saint-Venant hydraulic model. The second method consists in interpolating observed rating curves (at gauging stations) onto the river cells of the hydro(geo)logical model. The interpolation technique is based on geostatistics. The last method assesses river stage using Manning equation with a simplified rectangular cross-section (water depth equals the hydraulic radius). Compared to observations, the geostatistical and the Manning methodologies lead to slightly less accurate (but still acceptable) results offering a low computational cost opportunity

  11. Ternary logic and mass quantum numbers

    SciTech Connect

    Sheppeard, M. D.

    2010-06-15

    Koide's prediction of the tau mass may be formulated as a condition on the three eigenvalues of a quantum Fourier series, using simple parameters, and similar triplets have been found for neutrino and hadron masses [2]. Assuming these parameters arise from quantum gravity, one would like to understand them from the more abstract context of category theory. In particular, whereas the logic of lepton spin is a linear analogue of the ordinary Boolean logic of the category of sets, mass triplets suggest an analogous ternary logic, requiring higher dimensional categorical structures.

  12. Gallium arsenide digital integrated circuits - A systems perspective

    NASA Astrophysics Data System (ADS)

    Kanopoulos, Nick

    The characteristics of GaAs electronic components and their integration into digital circuits are examined in an introduction for graduate engineering students. Chapters are devoted to GaAs components, GaAs logic-gate design, GaAs logic circuits, GaAs digital-IC design principles, packaging, high-speed testing and design for testability, and GaAs insertion into system design. Diagrams, drawings, and exercises for each chapter are included.

  13. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  14. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  15. Digital Holographic Logic

    NASA Technical Reports Server (NTRS)

    Preston, K., Jr.

    1972-01-01

    The characteristics of the holographic logic computer are discussed. The holographic operation is reviewed from the Fourier transform viewpoint, and the formation of holograms for use in performing digital logic are described. The operation of the computer with an experiment in which the binary identity function is calculated is discussed along with devices for achieving real-time performance. An application in pattern recognition using neighborhood logic is presented.

  16. Foundations of logic programming

    SciTech Connect

    Lloyd, J.W.

    1987-01-01

    This is the second edition of the first book to give an account of the mathematical foundations of Logic Programming. Its purpose is to collect the basic theoretical results of Logic Programming, which have previously only been available in widely scattered research papers. In addition to presenting the technical results, the book also contains many illustrative examples. Many of the examples and problems are part of the folklore of Logic Programming and are not easily obtainable elsewhere.

  17. Fuzzy Logic Engine

    NASA Technical Reports Server (NTRS)

    Howard, Ayanna

    2005-01-01

    The Fuzzy Logic Engine is a software package that enables users to embed fuzzy-logic modules into their application programs. Fuzzy logic is useful as a means of formulating human expert knowledge and translating it into software to solve problems. Fuzzy logic provides flexibility for modeling relationships between input and output information and is distinguished by its robustness with respect to noise and variations in system parameters. In addition, linguistic fuzzy sets and conditional statements allow systems to make decisions based on imprecise and incomplete information. The user of the Fuzzy Logic Engine need not be an expert in fuzzy logic: it suffices to have a basic understanding of how linguistic rules can be applied to the user's problem. The Fuzzy Logic Engine is divided into two modules: (1) a graphical-interface software tool for creating linguistic fuzzy sets and conditional statements and (2) a fuzzy-logic software library for embedding fuzzy processing capability into current application programs. The graphical- interface tool was developed using the Tcl/Tk programming language. The fuzzy-logic software library was written in the C programming language.

  18. Optical Circuit Switched Protocol

    NASA Technical Reports Server (NTRS)

    Monacos, Steve P. (Inventor)

    2000-01-01

    The present invention is a system and method embodied in an optical circuit switched protocol for the transmission of data through a network. The optical circuit switched protocol is an all-optical circuit switched network and includes novel optical switching nodes for transmitting optical data packets within a network. Each optical switching node comprises a detector for receiving the header, header detection logic for translating the header into routing information and eliminating the header, and a controller for receiving the routing information and configuring an all optical path within the node. The all optical path located within the node is solely an optical path without having electronic storage of the data and without having optical delay of the data. Since electronic storage of the header is not necessary and the initial header is eliminated by the first detector of the first switching node. multiple identical headers are sent throughout the network so that subsequent switching nodes can receive and read the header for setting up an optical data path.

  19. Integrated-Circuit Controller For Brushless dc Motor

    NASA Technical Reports Server (NTRS)

    Le, Dong Tuan

    1994-01-01

    Generic circuit performs commutation-logic and power-switching functions for control of brushless dc motor. Controller includes commutation-logic and associated control circuitry, power supply, and inverters containing power transistors. Major advantages of controller are size, weight, and power consumption can be made less than other brushless-dc-motor controllers.

  20. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  1. Photonic encryption using all optical logic.

    SciTech Connect

    Blansett, Ethan L.; Schroeppel, Richard Crabtree; Tang, Jason D.; Robertson, Perry J.; Vawter, Gregory Allen; Tarman, Thomas David; Pierson, Lyndon George

    2003-12-01

    With the build-out of large transport networks utilizing optical technologies, more and more capacity is being made available. Innovations in Dense Wave Division Multiplexing (DWDM) and the elimination of optical-electrical-optical conversions have brought on advances in communication speeds as we move into 10 Gigabit Ethernet and above. Of course, there is a need to encrypt data on these optical links as the data traverses public and private network backbones. Unfortunately, as the communications infrastructure becomes increasingly optical, advances in encryption (done electronically) have failed to keep up. This project examines the use of optical logic for implementing encryption in the photonic domain to achieve the requisite encryption rates. In order to realize photonic encryption designs, technology developed for electrical logic circuits must be translated to the photonic regime. This paper examines two classes of all optical logic (SEED, gain competition) and how each discrete logic element can be interconnected and cascaded to form an optical circuit. Because there is no known software that can model these devices at a circuit level, the functionality of the SEED and gain competition devices in an optical circuit were modeled in PSpice. PSpice allows modeling of the macro characteristics of the devices in context of a logic element as opposed to device level computational modeling. By representing light intensity as voltage, 'black box' models are generated that accurately represent the intensity response and logic levels in both technologies. By modeling the behavior at the systems level, one can incorporate systems design tools and a simulation environment to aid in the overall functional design. Each black box model of the SEED or gain competition device takes certain parameters (reflectance, intensity, input response), and models the optical ripple and time delay characteristics. These 'black box' models are interconnected and cascaded in an

  2. Principles of Intelligence: On Evolutionary Logic of the Brain

    PubMed Central

    Tsien, Joe Z.

    2016-01-01

    Humans and animals may encounter numerous events, objects, scenes, foods and countless social interactions in a lifetime. This means that the brain is constructed by evolution to deal with uncertainties and various possibilities. What is the architectural abstraction of intelligence that enables the brain to discover various possible patterns and knowledge about complex, evolving worlds? Here, I discuss the Theory of Connectivity–a “power-of-two” based, operational principle that can serve as a unified wiring and computational logic for organizing and constructing cell assemblies into the microcircuit-level building block, termed as functional connectivity motif (FCM). Defined by the power-of-two based equation, N = 2i−1, each FCM consists of the principal projection neuron cliques (N), ranging from those specific cliques receiving specific information inputs (i) to those general and sub-general cliques receiving various combinatorial convergent inputs. As the evolutionarily conserved logic, its validation requires experimental demonstrations of the following three major properties: (1) Anatomical prevalence—FCMs are prevalent across neural circuits, regardless of gross anatomical shapes; (2) Species conservancy—FCMs are conserved across different animal species; and (3) Cognitive universality—FCMs serve as a universal computational logic at the cell assembly level for processing a variety of cognitive experiences and flexible behaviors. More importantly, this Theory of Connectivity further predicts that the specific-to-general combinatorial connectivity pattern within FCMs should be preconfigured by evolution, and emerge innately from development as the brain’s computational primitives. This proposed design-principle can also explain the general purpose of the layered cortex and serves as its core computational algorithm. PMID:26869892

  3. Principles of Intelligence: On Evolutionary Logic of the Brain.

    PubMed

    Tsien, Joe Z

    2015-01-01

    Humans and animals may encounter numerous events, objects, scenes, foods and countless social interactions in a lifetime. This means that the brain is constructed by evolution to deal with uncertainties and various possibilities. What is the architectural abstraction of intelligence that enables the brain to discover various possible patterns and knowledge about complex, evolving worlds? Here, I discuss the Theory of Connectivity-a "power-of-two" based, operational principle that can serve as a unified wiring and computational logic for organizing and constructing cell assemblies into the microcircuit-level building block, termed as functional connectivity motif (FCM). Defined by the power-of-two based equation, N = 2 (i) -1, each FCM consists of the principal projection neuron cliques (N), ranging from those specific cliques receiving specific information inputs (i) to those general and sub-general cliques receiving various combinatorial convergent inputs. As the evolutionarily conserved logic, its validation requires experimental demonstrations of the following three major properties: (1) Anatomical prevalence-FCMs are prevalent across neural circuits, regardless of gross anatomical shapes; (2) Species conservancy-FCMs are conserved across different animal species; and (3) Cognitive universality-FCMs serve as a universal computational logic at the cell assembly level for processing a variety of cognitive experiences and flexible behaviors. More importantly, this Theory of Connectivity further predicts that the specific-to-general combinatorial connectivity pattern within FCMs should be preconfigured by evolution, and emerge innately from development as the brain's computational primitives. This proposed design-principle can also explain the general purpose of the layered cortex and serves as its core computational algorithm. PMID:26869892

  4. Bi-directional homogenization equivalent modeling for the prediction of thermo-mechanical properties of a multi-layered printed circuit board (PCB)

    NASA Astrophysics Data System (ADS)

    Joo, Sung-Jun; Park, Buhm; Kim, Do-Hyoung; Kwak, Dong-Ok; Park, Junhong; Kim, Hak-Sung

    2016-04-01

    Warpage of multi-layered printed circuit boards (PCB) during the reflow process is a serious problem which affects the reliability of solder ball connections between the PCB and the mounted semi-conductor packages in electronic devices. It is essential to predict the warpage of the PCB accurately; however, the complicated copper patterns in multi-layered PCBs render a full modeling analysis impossible due to the excessive computing time required. To overcome this problem, we have developed analytical equations of three Cu patterns (line, square, and grid) for the application of thermo-mechanical properties simply by equivalent modeling of Cu patterns. In the proposed equations, the effect of thermo-viscoelastic properties as well as the influence of surrounding layers such as woven glass fabric/BT (bismaleimide triazine), composite laminate (BT core), and photoimageable solder resist (PSR) were considered. To verify the developed equations, vibration tests based on the wave propagation approach were performed at various temperatures. Good agreement was observed between the equivalent model and the experimental results.

  5. Magnetic tunnel junction based spintronic logic devices

    NASA Astrophysics Data System (ADS)

    Lyle, Andrew Paul

    The International Technology Roadmap for Semiconductors (ITRS) predicts that complimentary metal oxide semiconductor (CMOS) based technologies will hit their last generation on or near the 16 nm node, which we expect to reach by the year 2025. Thus future advances in computational power will not be realized from ever-shrinking device sizes, but rather by 'outside the box' designs and new physics, including molecular or DNA based computation, organics, magnonics, or spintronic. This dissertation investigates magnetic logic devices for post-CMOS computation. Three different architectures were studied, each relying on a different magnetic mechanism to compute logic functions. Each design has it benefits and challenges that must be overcome. This dissertation focuses on pushing each design from the drawing board to a realistic logic technology. The first logic architecture is based on electrically connected magnetic tunnel junctions (MTJs) that allow direct communication between elements without intermediate sensing amplifiers. Two and three input logic gates, which consist of two and three MTJs connected in parallel, respectively were fabricated and are compared. The direct communication is realized by electrically connecting the output in series with the input and applying voltage across the series connections. The logic gates rely on the fact that a change in resistance at the input modulates the voltage that is needed to supply the critical current for spin transfer torque switching the output. The change in resistance at the input resulted in a voltage margin of 50--200 mV and 250--300 mV for the closest input states for the three and two input designs, respectively. The two input logic gate realizes the AND, NAND, NOR, and OR logic functions. The three input logic function realizes the Majority, AND, NAND, NOR, and OR logic operations. The second logic architecture utilizes magnetostatically coupled nanomagnets to compute logic functions, which is the basis of

  6. Structure-activity relationships derived by machine learning: the use of atoms and their bond connectivities to predict mutagenicity by inductive logic programming.

    PubMed Central

    King, R D; Muggleton, S H; Srinivasan, A; Sternberg, M J

    1996-01-01

    We present a general approach to forming structure-activity relationships (SARs). This approach is based on representing chemical structure by atoms and their bond connectivities in combination with the inductive logic programming (ILP) algorithm PROGOL. Existing SAR methods describe chemical structure by using attributes which are general properties of an object. It is not possible to map chemical structure directly to attribute-based descriptions, as such descriptions have no internal organization. A more natural and general way to describe chemical structure is to use a relational description, where the internal construction of the description maps that of the object described. Our atom and bond connectivities representation is a relational description. ILP algorithms can form SARs with relational descriptions. We have tested the relational approach by investigating the SARs of 230 aromatic and heteroaromatic nitro compounds. These compounds had been split previously into two subsets, 188 compounds that were amenable to regression and 42 that were not. For the 188 compounds, a SAR was found that was as accurate as the best statistical or neural network-generated SARs. The PROGOL SAR has the advantages that it did not need the use of any indicator variables handcrafted by an expert, and the generated rules were easily comprehensible. For the 42 compounds, PROGOL formed a SAR that was significantly (P < 0.025) more accurate than linear regression, quadratic regression, and back-propagation. This SAR is based on an automatically generated structural alert for mutagenicity. PMID:8552655

  7. Identifying Logical Necessity

    ERIC Educational Resources Information Center

    Yopp, David

    2010-01-01

    Understanding logical necessity is an important component of proof and reasoning for teachers of grades K-8. The ability to determine exactly where young students' arguments are faulty offers teachers the chance to give youngsters feedback as they progress toward writing mathematically valid deductive proofs. As defined, logical necessity is the…

  8. Logic Programming: PROLOG.

    ERIC Educational Resources Information Center

    Lopez, Antonio M., Jr.

    1989-01-01

    Provides background material on logic programing and presents PROLOG as a high-level artificial intelligence programing language that borrows its basic constructs from logic. Suggests the language is one which will help the educator to achieve various goals, particularly the promotion of problem solving ability. (MVL)

  9. Programmable Logic Controllers.

    ERIC Educational Resources Information Center

    Insolia, Gerard; Anderson, Kathleen

    This document contains a 40-hour course in programmable logic controllers (PLC), developed for a business-industry technology resource center for firms in eastern Pennsylvania by Northampton Community College. The 10 units of the course cover the following: (1) introduction to programmable logic controllers; (2) DOS primer; (3) prerequisite…

  10. Logic via Computer Programming.

    ERIC Educational Resources Information Center

    Wieschenberg, Agnes A.

    This paper proposed the question "How do we teach logical thinking and sophisticated mathematics to unsophisticated college students?" One answer among many is through the writing of computer programs. The writing of computer algorithms is mathematical problem solving and logic in disguise and it may attract students who would otherwise stop…

  11. Optical logic: an overview

    NASA Astrophysics Data System (ADS)

    Caulfield, H. John

    2005-05-01

    Progress of optical logic has been anything but uniform or even monotonic. The hope for "all optical computers" was largely abandoned after devastating critiques by Keyes. Over time, optical logic transformed into a very viable niche activity by the needs of optical communication for "all optical" logic and the advent of a critical component: the SOA or Semiconductor Optical Amplifier. I argue that a new phase in this uneven history can be defined - linear (single photon, not multiple entangled photon) quantum optical logic. These can perform conservative, reversible logic operations without energy or time penalties, but cascading requires the irreversible act of measurement, so only single devices or single layers can deliver those advantages.

  12. Microelectromechanical reprogrammable logic device

    PubMed Central

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-01-01

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme. PMID:27021295

  13. Fuzziness in abacus logic

    NASA Astrophysics Data System (ADS)

    Malhas, Othman Qasim

    1993-10-01

    The concept of “abacus logic” has recently been developed by the author (Malhas, n.d.). In this paper the relation of abacus logic to the concept of fuzziness is explored. It is shown that if a certain “regularity” condition is met, concepts from fuzzy set theory arise naturally within abacus logics. In particular it is shown that every abacus logic then has a “pre-Zadeh orthocomplementation”. It is also shown that it is then possible to associate a fuzzy set with every proposition of abacus logic and that the collection of all such sets satisfies natural conditions expected in systems of fuzzy logic. Finally, the relevance to quantum mechanics is discussed.

  14. Microelectromechanical reprogrammable logic device

    NASA Astrophysics Data System (ADS)

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-03-01

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme.

  15. Regulatory Conformance Checking: Logic and Logical Form

    ERIC Educational Resources Information Center

    Dinesh, Nikhil

    2010-01-01

    We consider the problem of checking whether an organization conforms to a body of regulation. Conformance is studied in a runtime verification setting. The regulation is translated to a logic, from which we synthesize monitors. The monitors are evaluated as the state of an organization evolves over time, raising an alarm if a violation is…

  16. Weighted sum threshold logic operation of MOBILE (monostable-bistable transition logic element) using resonant-tunneling transistors

    NASA Astrophysics Data System (ADS)

    Akeyoshi, Tomoyuki; Maezawa, Koichi; Mizutani, Takashi

    1993-10-01

    The functional operation of MOBILE (monostable-bistable transition logic element) has been studied using multiple-input logic gates. MOBILE uses two resonant-tunneling transistors (RTT's), connected in series and driven by oscillating bias voltage to produce a mono-to-bistable transition of the circuit. A fabricated MOBILE having three-input gates with a 1:2:4 width ratio can distinguish all 8 (2(exp 3)) input patterns corresponding to each weighted sum, depending on the threshold value selected by the control gate. The results signify the realization of the weighted sum threshold logic operation of input signals.

  17. Surface-confined assemblies and polymers for molecular logic.

    PubMed

    de Ruiter, Graham; van der Boom, Milko E

    2011-08-16

    Stimuli responsive materials are capable of mimicking the operation characteristics of logic gates such as AND, OR, NOR, and even flip-flops. Since the development of molecular sensors and the introduction of the first AND gate in solution by de Silva in 1993, Molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. In this Account, we present recent research activities that focus on MBLC with electrochromic polymers and metal polypyridyl complexes on a solid support. Metal polypyridyl complexes act as useful sensors to a variety of analytes in solution (i.e., H(2)O, Fe(2+/3+), Cr(6+), NO(+)) and in the gas phase (NO(x) in air). This information transfer, whether the analyte is present, is based on the reversible redox chemistry of the metal complexes, which are stable up to 200 °C in air. The concurrent changes in the optical properties are nondestructive and fast. In such a setup, the input is directly related to the output and, therefore, can be represented by one-input logic gates. These input-output relationships are extendable for mimicking the diverse functions of essential molecular logic gates and circuits within a set of Boolean algebraic operations. Such a molecular approach towards Boolean logic has yielded a series of proof-of-concept devices: logic gates, multiplexers, half-adders, and flip-flop logic circuits. MBLC is a versatile and, potentially, a parallel approach to silicon circuits: assemblies of these molecular gates can perform a wide variety of logic tasks through reconfiguration of their inputs. Although these developments do not require a semiconductor blueprint, similar guidelines such as signal propagation, gate-to-gate communication, propagation delay, and combinatorial and sequential logic will play a critical role in allowing this field to mature. For instance, gate-to-gate communication by chemical wiring of the gates with metal ions as electron carriers results in the integration of stand-alone systems: the

  18. Logical Thinking in College Students

    ERIC Educational Resources Information Center

    O'Brien, Thomas C.

    1973-01-01

    College students' responses to conditional syllogisms are used to analyze the students' interpretations of implication. Child's Logic'' was used much more frequently than Math Logic'' even after a one-semester course in logic. (JP)

  19. Assigning functional meaning to digital circuits

    SciTech Connect

    Eckmann, S.T.; Chisholm, G.H.

    1997-07-01

    During computer-aided design, the problem of how to determine the logical function of a digital circuit arises in many contexts. For example, assigning functional meaning to a circuit is a fundamental operation in both reverse engineering and implementation validation. This report describes such a determination by discussing how a higher-level functional representation is constructed from a detailed circuit description (i.e., a gate-level netlist, which is a list of logic gates and their interconnections). The approach used involves transforming parts of the netlist into a functional representation and then manipulating this representation. Two types of functional representations are described: (1) a mathematical representation based on the logical operators ``exor`` and ``and`` and (2) a directed acyclic graph representation based on binary decision trees. Each representation provides a canonical form of the logical function being implemented (i.e., a form that is independent of implementation details). Such forms, however, have a well-known problem associated with the ordering of inputs: for each order, a unique form exists. A solution to this problem is given for both representations. Experimental results that demonstrate the use of these representations in the process of assigning functional meaning to a circuit are provided. The report also identifies and discusses issues critical to the performance required of this fundamental operation.

  20. Computer circuit will fit on single silicon chip

    NASA Technical Reports Server (NTRS)

    Smith, C.

    1964-01-01

    A simplified computer logic circuit of two NAND/NOR gates and three additional inputs to accomplish the count and shift function is described. The circuit has capacity for parallel read-in, counting, serial shiftout, complement input and set and reset.

  1. MULTIPLIER CIRCUIT

    DOEpatents

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  2. A Decision Support System Coupling Fuzzy Logic and Probabilistic Graphical Approaches for the Agri-Food Industry: Prediction of Grape Berry Maturity.

    PubMed

    Perrot, Nathalie; Baudrit, Cédric; Brousset, Jean Marie; Abbal, Philippe; Guillemin, Hervé; Perret, Bruno; Goulet, Etienne; Guerin, Laurence; Barbeau, Gérard; Picque, Daniel

    2015-01-01

    Agri-food is one of the most important sectors of the industry and a major contributor to the global warming potential in Europe. Sustainability issues pose a huge challenge for this sector. In this context, a big issue is to be able to predict the multiscale dynamics of those systems using computing science. A robust predictive mathematical tool is implemented for this sector and applied to the wine industry being easily able to be generalized to other applications. Grape berry maturation relies on complex and coupled physicochemical and biochemical reactions which are climate dependent. Moreover one experiment represents one year and the climate variability could not be covered exclusively by the experiments. Consequently, harvest mostly relies on expert predictions. A big challenge for the wine industry is nevertheless to be able to anticipate the reactions for sustainability purposes. We propose to implement a decision support system so called FGRAPEDBN able to (1) capitalize the heterogeneous fragmented knowledge available including data and expertise and (2) predict the sugar (resp. the acidity) concentrations with a relevant RMSE of 7 g/l (resp. 0.44 g/l and 0.11 g/kg). FGRAPEDBN is based on a coupling between a probabilistic graphical approach and a fuzzy expert system. PMID:26230334

  3. A Decision Support System Coupling Fuzzy Logic and Probabilistic Graphical Approaches for the Agri-Food Industry: Prediction of Grape Berry Maturity.

    PubMed

    Perrot, Nathalie; Baudrit, Cédric; Brousset, Jean Marie; Abbal, Philippe; Guillemin, Hervé; Perret, Bruno; Goulet, Etienne; Guerin, Laurence; Barbeau, Gérard; Picque, Daniel

    2015-01-01

    Agri-food is one of the most important sectors of the industry and a major contributor to the global warming potential in Europe. Sustainability issues pose a huge challenge for this sector. In this context, a big issue is to be able to predict the multiscale dynamics of those systems using computing science. A robust predictive mathematical tool is implemented for this sector and applied to the wine industry being easily able to be generalized to other applications. Grape berry maturation relies on complex and coupled physicochemical and biochemical reactions which are climate dependent. Moreover one experiment represents one year and the climate variability could not be covered exclusively by the experiments. Consequently, harvest mostly relies on expert predictions. A big challenge for the wine industry is nevertheless to be able to anticipate the reactions for sustainability purposes. We propose to implement a decision support system so called FGRAPEDBN able to (1) capitalize the heterogeneous fragmented knowledge available including data and expertise and (2) predict the sugar (resp. the acidity) concentrations with a relevant RMSE of 7 g/l (resp. 0.44 g/l and 0.11 g/kg). FGRAPEDBN is based on a coupling between a probabilistic graphical approach and a fuzzy expert system.

  4. A Decision Support System Coupling Fuzzy Logic and Probabilistic Graphical Approaches for the Agri-Food Industry: Prediction of Grape Berry Maturity

    PubMed Central

    Brousset, Jean Marie; Abbal, Philippe; Guillemin, Hervé; Perret, Bruno; Goulet, Etienne; Guerin, Laurence; Barbeau, Gérard; Picque, Daniel

    2015-01-01

    Agri-food is one of the most important sectors of the industry and a major contributor to the global warming potential in Europe. Sustainability issues pose a huge challenge for this sector. In this context, a big issue is to be able to predict the multiscale dynamics of those systems using computing science. A robust predictive mathematical tool is implemented for this sector and applied to the wine industry being easily able to be generalized to other applications. Grape berry maturation relies on complex and coupled physicochemical and biochemical reactions which are climate dependent. Moreover one experiment represents one year and the climate variability could not be covered exclusively by the experiments. Consequently, harvest mostly relies on expert predictions. A big challenge for the wine industry is nevertheless to be able to anticipate the reactions for sustainability purposes. We propose to implement a decision support system so called FGRAPEDBN able to (1) capitalize the heterogeneous fragmented knowledge available including data and expertise and (2) predict the sugar (resp. the acidity) concentrations with a relevant RMSE of 7 g/l (resp. 0.44 g/l and 0.11 g/kg). FGRAPEDBN is based on a coupling between a probabilistic graphical approach and a fuzzy expert system. PMID:26230334

  5. Circuit Training.

    ERIC Educational Resources Information Center

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  6. A coherent RC circuit

    NASA Astrophysics Data System (ADS)

    Gabelli, J.; Fève, G.; Berroir, J.-M.; Plaçais, B.

    2012-12-01

    We review the first experiment on dynamic transport in a phase-coherent quantum conductor. In our discussion, we highlight the use of time-dependent transport as a means of gaining insight into charge relaxation on a mesoscopic scale. For this purpose, we studied the ac conductance of a model quantum conductor, i.e. the quantum RC circuit. Prior to our experimental work, Büttiker et al (1993 Phys. Lett. A 180 364-9) first worked on dynamic mesoscopic transport in the 1990s. They predicted that the mesoscopic RC circuit can be described by a quantum capacitance related to the density of states in the capacitor and a constant charge-relaxation resistance equal to half of the resistance quantum h/2e2, when a single mode is transmitted between the capacitance and a reservoir. By applying a microwave excitation to a gate located on top of a coherent submicronic quantum dot that is coupled to a reservoir, we validate this theoretical prediction on the ac conductance of the quantum RC circuit. Our study demonstrates that the ac conductance is directly related to the dwell time of electrons in the capacitor. Thereby, we observed a counterintuitive behavior of a quantum origin: as the transmission of the single conducting mode decreases, the resistance of the quantum RC circuit remains constant while the capacitance oscillates.

  7. N channel JFET based digital logic gate structure

    NASA Technical Reports Server (NTRS)

    Krasowski, Michael J. (Inventor)

    2010-01-01

    A circuit topography is presented which is used to create usable digital logic gates using N (negatively doped) channel Junction Field Effect Transistors (JFETs) and load resistors, level shifting resistors, and supply rails whose values are based on the direct current (DC) parametric distributions of those JFETs. This method has direct application to the current state of the art in high temperature, for example 300.degree. C. to 500.degree. C. and higher, silicon carbide (SiC) device production. The ability to produce inverting and combinatorial logic enables the production of pulse and edge triggered latches. This scale of logic synthesis would bring digital logic and state machine capabilities to devices operating in extremely hot environments, such as the surface of Venus, near hydrothermal vents, within nuclear reactors (SiC is inherently radiation hardened), and within internal combustion engines. The basic logic gate can be configured as a driver for oscillator circuits allowing for time bases and simple digitizers for resistive or reactive sensors. The basic structure of this innovation, the inverter, can be reconfigured into various analog circuit topographies through the use of feedback structures.

  8. Reasoning, logic, and psychology.

    PubMed

    Stenning, Keith; van Lambalgen, Michiel

    2011-09-01

    We argue that reasoning has been conceptualized so narrowly in what is known as 'psychology of reasoning' that reasoning's relevance to cognitive science has become well-nigh invisible. Reasoning is identified with determining whether a conclusion follows validly from given premises, where 'valid' is taken to mean 'valid according to classical logic'. We show that there are other ways to conceptualize reasoning, more in line with current logical theorizing, which give it a role in psychological processes ranging from (verbal) discourse comprehension to (nonverbal) planning. En route we show that formal logic, at present marginalized in cognitive science, can be an extremely valuable modeling tool. In particular, there are cases in which probabilistic modeling must fail, whereas logical models do well. WIREs Cogni Sci 2011 2 555-567 DOI: 10.1002/wcs.134 For further resources related to this article, please visit the WIREs website.

  9. Gallium arsenide processing for gate array logic

    NASA Technical Reports Server (NTRS)

    Cole, Eric D.

    1989-01-01

    The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

  10. Circuit for high resolution decoding of multi-anode microchannel array detectors

    NASA Technical Reports Server (NTRS)

    Kasle, David B. (Inventor)

    1995-01-01

    A circuit for high resolution decoding of multi-anode microchannel array detectors consisting of input registers accepting transient inputs from the anode array; anode encoding logic circuits connected to the input registers; midpoint pipeline registers connected to the anode encoding logic circuits; and pixel decoding logic circuits connected to the midpoint pipeline registers is described. A high resolution algorithm circuit operates in parallel with the pixel decoding logic circuit and computes a high resolution least significant bit to enhance the multianode microchannel array detector's spatial resolution by halving the pixel size and doubling the number of pixels in each axis of the anode array. A multiplexer is connected to the pixel decoding logic circuit and allows a user selectable pixel address output according to the actual multi-anode microchannel array detector anode array size. An output register concatenates the high resolution least significant bit onto the standard ten bit pixel address location to provide an eleven bit pixel address, and also stores the full eleven bit pixel address. A timing and control state machine is connected to the input registers, the anode encoding logic circuits, and the output register for managing the overall operation of the circuit.

  11. Design Techniques for Power-Aware Combinational Logic SER Mitigation

    NASA Astrophysics Data System (ADS)

    Mahatme, Nihaar N.

    The history of modern semiconductor devices and circuits suggests that technologists have been able to maintain scaling at the rate predicted by Moore's Law [Moor-65]. With improved performance, speed and lower area, technology scaling has also exacerbated reliability issues such as soft errors. Soft errors are transient errors that occur in microelectronic circuits due to ionizing radiation particle strikes on reverse biased semiconductor junctions. These radiation induced errors at the terrestrial-level are caused due to radiation particle strikes by (1) alpha particles emitted as decay products of packing material (2) cosmic rays that produce energetic protons and neutrons, and (3) thermal neutrons [Dodd-03], [Srou-88] and more recently muons and electrons [Ma-79] [Nara-08] [Siew-10] [King-10]. In the space environment radiation induced errors are a much bigger threat and are mainly caused by cosmic heavy-ions, protons etc. The effects of radiation exposure on circuits and measures to protect against them have been studied extensively for the past 40 years, especially for parts operating in space. Radiation particle strikes can affect memory as well as combinational logic. Typically when these particles strike semiconductor junctions of transistors that are part of feedback structures such as SRAM memory cells or flip-flops, it can lead to an inversion of the cell content. Such a failure is formally called a bit-flip or single-event upset (SEU). When such particles strike sensitive junctions part of combinational logic gates they produce transient voltage spikes or glitches called single-event transients (SETs) that could be latched by receiving flip-flops. As the circuits are clocked faster, there are more number of clocking edges which increases the likelihood of latching these transients. In older technology generations the probability of errors in flip-flops due to SETs being latched was much lower compared to direct strikes on flip-flops or SRAMs leading to

  12. The Development of a Digital Logic Concept Inventory

    ERIC Educational Resources Information Center

    Herman, Geoffrey Lindsay

    2011-01-01

    Instructors in electrical and computer engineering and in computer science have developed innovative methods to teach digital logic circuits. These methods attempt to increase student learning, satisfaction, and retention. Although there are readily accessible and accepted means for measuring satisfaction and retention, there are no widely…

  13. Trinary arithmetic and logic unit (TALU) using savart plate and spatial light modulator (SLM) suitable for optical computation in multivalued logic

    NASA Astrophysics Data System (ADS)

    Ghosh, Amal K.; Bhattacharya, Animesh; Raul, Moumita; Basuray, Amitabha

    2012-07-01

    Arithmetic logic unit (ALU) is the most important unit in any computing system. Optical computing is becoming popular day-by-day because of its ultrahigh processing speed and huge data handling capability. Obviously for the fast processing we need the optical TALU compatible with the multivalued logic. In this regard we are communicating the trinary arithmetic and logic unit (TALU) in modified trinary number (MTN) system, which is suitable for the optical computation and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.

  14. Boolean logic tree of graphene-based chemical system for molecular computation and intelligent molecular search query.

    PubMed

    Huang, Wei Tao; Luo, Hong Qun; Li, Nian Bing

    2014-05-01

    The most serious, and yet unsolved, problem of constructing molecular computing devices consists in connecting all of these molecular events into a usable device. This report demonstrates the use of Boolean logic tree for analyzing the chemical event network based on graphene, organic dye, thrombin aptamer, and Fenton reaction, organizing and connecting these basic chemical events. And this chemical event network can be utilized to implement fluorescent combinatorial logic (including basic logic gates and complex integrated logic circuits) and fuzzy logic computing. On the basis of the Boolean logic tree analysis and logic computing, these basic chemical events can be considered as programmable "words" and chemical interactions as "syntax" logic rules to construct molecular search engine for performing intelligent molecular search query. Our approach is helpful in developing the advanced logic program based on molecules for application in biosensing, nanotechnology, and drug delivery.

  15. Implementation of PFC (Predictive Functional Control) in a PLC (Programmable Logic Controller) for a HVAC (Heating, Ventilation and Air Conditioning) system

    NASA Astrophysics Data System (ADS)

    Kreutz, M.; Richalet, J.; Mocha, K.; Haber, R.

    2014-12-01

    HVAC systems of industrial buildings consume a lot of energy. Therefore it is important to know the performance of these systems and strategies to optimize the hardware and the control. Tackling the temperature control of the HVAC system promises quick savings by tuning the control within specified tolerance limits, which mostly can be done by low investment. This paper mainly deals with the implementation strategy of a new controller in a PLC using the predictive functional control for temperature control. The different stages of the implementation from the simulation over the SCL code till to the real-time operation are presented. A bumpless switch between the PI(D) and the PFC control was realized, as well.

  16. Teleology as Logical Phenomenology: Some Therapeutic Implications.

    ERIC Educational Resources Information Center

    Rychlak, Joseph F.

    Phenomenology is an important force in the development of psychological theory, rather than a variant type of counseling method. A distinction must be drawn between the sensory phenomenology in which gestaltists focus on sensory receptors, and logical pheomenology in which the grounding of belief or self-identity is viewed as a prediction or…

  17. A Simple Memristor Model for Circuit Simulations

    NASA Astrophysics Data System (ADS)

    Fullerton, Farrah-Amoy; Joe, Aaleyah; Gergel-Hackett, Nadine; Department of Chemistry; Physics Team

    This work describes the development of a model for the memristor, a novel nanoelectronic technology. The model was designed to replicate the real-world electrical characteristics of previously fabricated memristor devices, but was constructed with basic circuit elements using a free widely available circuit simulator, LT Spice. The modeled memrsistors were then used to construct a circuit that performs material implication. Material implication is a digital logic that can be used to perform all of the same basic functions as traditional CMOS gates, but with fewer nanoelectronic devices. This memristor-based digital logic could enable memristors' use in new paradigms of computer architecture with advantages in size, speed, and power over traditional computing circuits. Additionally, the ability to model the real-world electrical characteristics of memristors in a free circuit simulator using its standard library of elements could enable not only the development of memristor material implication, but also the development of a virtually unlimited array of other memristor-based circuits.

  18. Irradiation of MOS-FET devices to provide desired logic functions

    NASA Technical Reports Server (NTRS)

    Danchenko, V.; Schaefer, D. H.

    1972-01-01

    Gamma, X-ray, electron, or other radiation is used to shift threshold potentials of MOS devices on logic circuits. Before irradiation MOS gates to be shifted are biased positive and other gates are grounded to substrate. Threshold lasts 10 years. Thermal annealing brings circuit back to original configuration.

  19. Genetic programs constructed from layered logic gates in single cells

    PubMed Central

    Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

    2014-01-01

    Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

  20. Design and implementation of a delay-optimized universal programmable routing circuit for FPGAs

    NASA Astrophysics Data System (ADS)

    Fang, Wu; Huowen, Zhang; Jinmei, Lai; Yuan, Wang; Liguang, Chen; Lei, Duan; Jiarong, Tong

    2009-06-01

    This paper presents a universal field programmable gate array (FPGA) programmable routing circuit, focusing primarily on a delay optimization. Under the precondition of the routing resource's flexibility and routability, the number of programmable interconnect points (PIP) is reduced, and a multiplexer (MUX) plus a BUFFER structure is adopted as the programmable switch. Also, the method of offset lines and the method of complementary hanged end-lines are applied to the TILE routing circuit and the I/O routing circuit, respectively. All of the above features ensure that the whole FPGA chip is highly repeatable, and the signal delay is uniform and predictable over the total chip. Meanwhile, the BUFFER driver is optimized to decrease the signal delay by up to 5%. The proposed routing circuit is applied to the Fudan programmable device (FDP) FPGA, which has been taped out with an SMIC 0.18-μm logic 1P6M process. The test result shows that the programmable routing resource works correctly, and the signal delay over the chip is highly uniform and predictable.

  1. Diagnosable structured logic array

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling (Inventor); Miles, Lowell (Inventor); Gambles, Jody (Inventor); Maki, Gary K. (Inventor)

    2009-01-01

    A diagnosable structured logic array and associated process is provided. A base cell structure is provided comprising a logic unit comprising a plurality of input nodes, a plurality of selection nodes, and an output node, a plurality of switches coupled to the selection nodes, where the switches comprises a plurality of input lines, a selection line and an output line, a memory cell coupled to the output node, and a test address bus and a program control bus coupled to the plurality of input lines and the selection line of the plurality of switches. A state on each of the plurality of input nodes is verifiably loaded and read from the memory cell. A trusted memory block is provided. The associated process is provided for testing and verifying a plurality of truth table inputs of the logic unit.

  2. OptCircuit: An optimization based method for computational design of genetic circuits

    PubMed Central

    Dasika, Madhukar S; Maranas, Costas D

    2008-01-01

    Background Recent years has witnessed an increasing number of studies on constructing simple synthetic genetic circuits that exhibit desired properties such as oscillatory behavior, inducer specific activation/repression, etc. It has been widely acknowledged that that task of building circuits to meet multiple inducer-specific requirements is a challenging one. This is because of the incomplete description of component interactions compounded by the fact that the number of ways in which one can chose and interconnect components, increases exponentially with the number of components. Results In this paper we introduce OptCircuit, an optimization based framework that automatically identifies the circuit components from a list and connectivity that brings about the desired functionality. Multiple literature sources are used to compile a comprehensive compilation of kinetic descriptions of promoter-protein pairs. The dynamics that govern the interactions between the elements of the genetic circuit are currently modeled using deterministic ordinary differential equations but the framework is general enough to accommodate stochastic simulations. The desired circuit response is abstracted as the maximization/minimization of an appropriately constructed objective function. Computational results for a toggle switch example demonstrate the ability of the framework to generate the complete list of circuit designs of varying complexity that exhibit the desired response. Designs identified for a genetic decoder highlight the ability of OptCircuit to suggest circuit configurations that go beyond the ones compatible with digital logic-based design principles. Finally, the results obtained from the concentration band detector example demonstrate the ability of OptCircuit to design circuits whose responses are contingent on the level of external inducer as well as pinpoint parameters for modification to rectify an existing (non-functional) biological circuit and restore

  3. Fuzzy logic and neural network technologies

    NASA Technical Reports Server (NTRS)

    Villarreal, James A.; Lea, Robert N.; Savely, Robert T.

    1992-01-01

    Applications of fuzzy logic technologies in NASA projects are reviewed to examine their advantages in the development of neural networks for aerospace and commercial expert systems and control. Examples of fuzzy-logic applications include a 6-DOF spacecraft controller, collision-avoidance systems, and reinforcement-learning techniques. The commercial applications examined include a fuzzy autofocusing system, an air conditioning system, and an automobile transmission application. The practical use of fuzzy logic is set in the theoretical context of artificial neural systems (ANSs) to give the background for an overview of ANS research programs at NASA. The research and application programs include the Network Execution and Training Simulator and faster training algorithms such as the Difference Optimized Training Scheme. The networks are well suited for pattern-recognition applications such as predicting sunspots, controlling posture maintenance, and conducting adaptive diagnoses.

  4. Energy-Efficient Wide Datapath Integer Arithmetic Logic Units Using Superconductor Logic

    NASA Astrophysics Data System (ADS)

    Ayala, Christopher Lawrence

    Complementary Metal-Oxide-Semiconductor (CMOS) technology is currently the most widely used integrated circuit technology today. As CMOS approaches the physical limitations of scaling, it is unclear whether or not it can provide long-term support for niche areas such as high-performance computing and telecommunication infrastructure, particularly with the emergence of cloud computing. Alternatively, superconductor technologies based on Josephson junction (JJ) switching elements such as Rapid Single Flux Quantum (RSFQ) logic and especially its new variant, Energy-Efficient Rapid Single Flux Quantum (ERSFQ) logic have the capability to provide an ultra-high-speed, low power platform for digital systems. The objective of this research is to design and evaluate energy-efficient, high-speed 32-bit integer Arithmetic Logic Units (ALUs) implemented using RSFQ and ERSFQ logic as the first steps towards achieving practical Very-Large-Scale-Integration (VLSI) complexity in digital superconductor electronics. First, a tunable VHDL superconductor cell library is created to provide a mechanism to conduct design exploration and evaluation of superconductor digital circuits from the perspectives of functionality, complexity, performance, and energy-efficiency. Second, hybrid wave-pipelining techniques developed earlier for wide datapath RSFQ designs have been used for efficient arithmetic and logic circuit implementations. To develop the core foundation of the ALU, the ripple-carry adder and the Kogge-Stone parallel prefix carry look-ahead adder are studied as representative candidates on opposite ends of the design spectrum. By combining the high-performance features of the Kogge-Stone structure and the low complexity of the ripple-carry adder, a 32-bit asynchronous wave-pipelined hybrid sparse-tree ALU has been designed and evaluated using the VHDL cell library tuned to HYPRES' gate-level characteristics. The designs and techniques from this research have been implemented using

  5. A Very Small Logical Qubit

    NASA Astrophysics Data System (ADS)

    Kapit, Eliot

    Superconducting qubits are among the most promising platforms for building a quantum computer. However, individual qubit coherence times are not far past the scalability threshold for quantum error correction, meaning that millions of physical devices would be required to construct a useful quantum computer. Consequently, further increases in coherence time are very desirable. In this letter, we blueprint a simple circuit consisting of two transmon qubits and two additional lossy qubits or resonators, which is passively protected against all single qubit quantum error channels through a combination of continuous driving and engineered dissipation. Photon losses are rapidly corrected through two-photon drive fields implemented with driven SQUID couplings, and dephasing from random potential fluctuations is heavily suppressed by the drive fields used to implement the multi-qubit Hamiltonian. Comparing our theoretical model to published noise estimates from recent experiments on flux and transmon qubits, we find that logical state coherence could be improved by a factor of forty or more compared to the individual qubit T1 and T2 using this technique.

  6. Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations

    NASA Astrophysics Data System (ADS)

    Fukazawa, Mitsuya; Kurimoto, Masanori; Akiyama, Rei; Takata, Hidehiro; Nagata, Makoto

    Logical operations in CMOS digital integration are highly prone to fail as the amount of power supply (PS) drop approaches to failure threshold. PS voltage variation is characterized by built-in noise monitors in a 32-bit microprocessor of 90-nm CMOS technology, and related with operation failures by instruction-level programming for logical failure analysis. Combination of voltage drop size and activated logic path determines failure sensitivity and class of failures. Experimental observation as well as simplified simulation is applied for the detailed understanding of the impact of PS noise on logical operations of digital integrated circuits.

  7. Fluorescent nanoparticle beacon for logic gate operation regulated by strand displacement.

    PubMed

    Yang, Jing; Shen, Lingjing; Ma, Jingjing; Schlaberg, H Inaki; Liu, Shi; Xu, Jin; Zhang, Cheng

    2013-06-26

    A mechanism is developed to construct a logic system by employing DNA/gold nanoparticle (AuNP) conjugates as a basic work unit, utilizing a fluorescent beacon probe to detect output signals. To implement the logic circuit, a self-assembly DNA structure is attached onto nanoparticles to form the fluorescent beacon. Moreover, assisted by regulation of multilevel strand displacement, cascaded logic gates are achieved. The computing results are detected by methods using fluorescent signals, gel electrophoresis and transmission electron microscope (TEM). This work is expected to demonstrate the feasibility of the cascaded logic system based on fluorescent nanoparticle beacons, suggesting applications in DNA computation and biotechnology.

  8. Logical Graphics Design Technique for Drawing Distribution Networks

    NASA Astrophysics Data System (ADS)

    Al-A`Ali, Mansoor

    Electricity distribution networks normally consist of tens of primary feeders, thousands of substations and switching stations spread over large geographical areas and thus require a complex system in order to manage them properly from within the distribution control centre. We show techniques for using Delphi Object Oriented components to automatically generate, display and manage graphically and logically the circuits of the network. The graphics components are dynamically interactive and thus the system allows switching operations as well as displays. The object oriented approach was developed to replace an older system, which used Microstation with MDL as the programming language and ORACLE as the DBMS. Before this, the circuits could only be displayed schematically, which has many inherent problems in speed and readability of large displays. Schematic graphics displays were cumbersome when adding or deleting stations; this problem is now resolved using our approach by logically generating the graphics from the database connectivity information. This paper demonstrates the method of designing these Object Oriented components and how they can be used in specially created algorithms to generate the necessary interactive graphics. Four different logical display algorithms were created and in this study we present samples of the four different outputs of these algorithms which prove that distribution engineers can work with logical display of the circuits which are aimed to speed up the switching operations and for better clarity of the display.

  9. Logic and Simulation.

    ERIC Educational Resources Information Center

    Straumanis, Joan

    A major problem in teaching symbolic logic is that of providing individualized and early feedback to students who are learning to do proofs. To overcome this difficulty, a computer program was developed which functions as a line-by-line proof checker in Sentential Calculus. The program, DEMON, first evaluates any statement supplied by the student…

  10. Temporal logics meet telerobotics

    NASA Technical Reports Server (NTRS)

    Rutten, Eric; Marce, Lionel

    1989-01-01

    The specificity of telerobotics being the presence of a human operator, decision assistance tools are necessary for the operator, especially in hostile environments. In order to reduce execution hazards due to a degraded ability for quick and efficient recovery of unexpected dangerous situations, it is of importance to have the opportunity, amongst others, to simulate the possible consequences of a plan before its actual execution, in order to detect these problematic situations. Hence the idea of providing the operator with a simulator enabling him to verify the temporal and logical coherence of his plans. Therefore, the power of logical formalisms is used for representation and deduction purposes. Starting from the class of situations that are represented, a STRIPS (the STanford Research Institute Problem Solver)-like formalism and its underlying logic are adapted to the simulation of plans of actions in time. The choice of a temporal logic enables to build a world representation, on which the effects of plans, grouping actions into control structures, will be transcribed by the simulation, resulting in a verdict and information about the plan's coherence.

  11. Quantum probabilistic logic programming

    NASA Astrophysics Data System (ADS)

    Balu, Radhakrishnan

    2015-05-01

    We describe a quantum mechanics based logic programming language that supports Horn clauses, random variables, and covariance matrices to express and solve problems in probabilistic logic. The Horn clauses of the language wrap random variables, including infinite valued, to express probability distributions and statistical correlations, a powerful feature to capture relationship between distributions that are not independent. The expressive power of the language is based on a mechanism to implement statistical ensembles and to solve the underlying SAT instances using quantum mechanical machinery. We exploit the fact that classical random variables have quantum decompositions to build the Horn clauses. We establish the semantics of the language in a rigorous fashion by considering an existing probabilistic logic language called PRISM with classical probability measures defined on the Herbrand base and extending it to the quantum context. In the classical case H-interpretations form the sample space and probability measures defined on them lead to consistent definition of probabilities for well formed formulae. In the quantum counterpart, we define probability amplitudes on Hinterpretations facilitating the model generations and verifications via quantum mechanical superpositions and entanglements. We cast the well formed formulae of the language as quantum mechanical observables thus providing an elegant interpretation for their probabilities. We discuss several examples to combine statistical ensembles and predicates of first order logic to reason with situations involving uncertainty.

  12. Effective Methods for Logic.

    ERIC Educational Resources Information Center

    Moore, Tim; Goldstein, Laurence

    1984-01-01

    Describes computer assisted instruction programs for teaching logic during first year philosophy courses at the University of Hong Kong. These programs include JOHN, which introduces Venn-diagrams for evaluating syllogistic arguments; LUDWIG, which introduces techniques for evaluating arguments in propositional calculus; and TIARA, which provides…

  13. Programmable Logic Application Notes

    NASA Technical Reports Server (NTRS)

    Katz, Richard; Day, John H. (Technical Monitor)

    2001-01-01

    This report will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing the use of Root-Sum-Square calculations for digital delays.

  14. The Logic of Bundles

    NASA Astrophysics Data System (ADS)

    Harding, John; Yang, Taewon

    2015-12-01

    Since the work of Crown (J. Natur. Sci. Math. 15(1-2), 11-25 1975) in the 1970's, it has been known that the projections of a finite-dimensional vector bundle E form an orthomodular poset ( omp) {P}(E). This result lies in the intersection of a number of current topics, including the categorical quantum mechanics of Abramsky and Coecke (2004), and the approach via decompositions of Harding (Trans. Amer. Math. Soc. 348(5), 1839-1862 1996). Moreover, it provides a source of omps for the quantum logic program close to the Hilbert space setting, and admitting a version of tensor products, yet having important differences from the standard logics of Hilbert spaces. It is our purpose here to initiate a basic investigation of the quantum logic program in the vector bundle setting. This includes observations on the structure of the omps obtained as {P}(E) for a vector bundle E, methods to obtain states on these omps, and automorphisms of these omps. Key theorems of quantum logic in the Hilbert setting, such as Gleason's theorem and Wigner's theorem, provide natural and quite challenging problems in the vector bundle setting.

  15. The Logic of Evaluation.

    ERIC Educational Resources Information Center

    Welty, Gordon A.

    The logic of the evaluation of educational and other action programs is discussed from a methodological viewpoint. However, no attempt is made to develop methods of evaluating programs. In Part I, the structure of an educational program is viewed as a system with three components--inputs, transformation of inputs into outputs, and outputs. Part II…

  16. 'Memristive' switches enable 'stateful' logic operations via material implication.

    PubMed

    Borghetti, Julien; Snider, Gregory S; Kuekes, Philip J; Yang, J Joshua; Stewart, Duncan R; Williams, R Stanley

    2010-04-01

    The authors of the International Technology Roadmap for Semiconductors-the industry consensus set of goals established for advancing silicon integrated circuit technology-have challenged the computing research community to find new physical state variables (other than charge or voltage), new devices, and new architectures that offer memory and logic functions beyond those available with standard transistors. Recently, ultra-dense resistive memory arrays built from various two-terminal semiconductor or insulator thin film devices have been demonstrated. Among these, bipolar voltage-actuated switches have been identified as physical realizations of 'memristors' or memristive devices, combining the electrical properties of a memory element and a resistor. Such devices were first hypothesized by Chua in 1971 (ref. 15), and are characterized by one or more state variables that define the resistance of the switch depending upon its voltage history. Here we show that this family of nonlinear dynamical memory devices can also be used for logic operations: we demonstrate that they can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq. Incorporated within an appropriate circuit, memristive switches can thus perform 'stateful' logic operations for which the same devices serve simultaneously as gates (logic) and latches (memory) that use resistance instead of voltage or charge as the physical state variable. PMID:20376145

  17. Automatic ranging circuit for a digital panel meter

    DOEpatents

    Mueller, Theodore R.; Ross, Harley H.

    1976-01-01

    This invention relates to a range changing circuit that operates in conjunction with a digital panel meter of fixed sensitivity. The circuit decodes the output of the panel meter and uses that information to change the gain of an input amplifier to the panel meter in order to insure that the maximum number of significant figures is always displayed in the meter. The circuit monitors five conditions in the meter and responds to any of four combinations of these conditions by means of logic elements to carry out the function of the circuit.

  18. Synthesis of Genetic Clock with Combinational Biologic Circuits.

    PubMed

    Chen, Po-Kuei; Lin, Chun-Liang

    2015-01-01

    The potential of genetic clock lies in its role to triggering logic reaction for sequential biological circuits. In general, biochemical reaction of the biological system is extremely slow. However, a square wave generator used as a genetic clock the transient response should be fast enough to catch the reaction change between two logic levels. Therefore, the requirement for instantaneous changes in logic status is not likely to exist in biological systems. This paper presents a method of synthesizing a genetic clock generator based on the combination of a toggle switch with two biological logic gates. A dual repressor is used to connect the two fundamental biologic circuits. Analysis of the characteristic responses of this genetic clock with its relation to the key parameters is provided. PMID:26451832

  19. Sandia ATM SONET Interface Logic

    1994-07-21

    SASIL is used to program the EPLD's (Erasable Programmable Logic Devices) and PAL's (Programmable Array Logic) that make up a large percentage of the Sandia ATM SONET Interface (OC3 version) for the INTEL Paragon.

  20. Photonic encryption : modeling and functional analysis of all optical logic.

    SciTech Connect

    Tang, Jason D.; Schroeppel, Richard Crabtree; Robertson, Perry J.

    2004-10-01

    With the build-out of large transport networks utilizing optical technologies, more and more capacity is being made available. Innovations in Dense Wave Division Multiplexing (DWDM) and the elimination of optical-electrical-optical conversions have brought on advances in communication speeds as we move into 10 Gigabit Ethernet and above. Of course, there is a need to encrypt data on these optical links as the data traverses public and private network backbones. Unfortunately, as the communications infrastructure becomes increasingly optical, advances in encryption (done electronically) have failed to keep up. This project examines the use of optical logic for implementing encryption in the photonic domain to achieve the requisite encryption rates. This paper documents the innovations and advances of work first detailed in 'Photonic Encryption using All Optical Logic,' [1]. A discussion of underlying concepts can be found in SAND2003-4474. In order to realize photonic encryption designs, technology developed for electrical logic circuits must be translated to the photonic regime. This paper examines S-SEED devices and how discrete logic elements can be interconnected and cascaded to form an optical circuit. Because there is no known software that can model these devices at a circuit level, the functionality of S-SEED devices in an optical circuit was modeled in PSpice. PSpice allows modeling of the macro characteristics of the devices in context of a logic element as opposed to device level computational modeling. By representing light intensity as voltage, 'black box' models are generated that accurately represent the intensity response and logic levels in both technologies. By modeling the behavior at the systems level, one can incorporate systems design tools and a simulation environment to aid in the overall functional design. Each black box model takes certain parameters (reflectance, intensity, input response), and models the optical ripple and time delay

  1. Conditional Logic and Primary Children.

    ERIC Educational Resources Information Center

    Ennis, Robert H.

    Conditional logic, as interpreted in this paper, means deductive logic characterized by "if-then" statements. This study sought to investigate the knowledge of conditional logic possessed by primary children and to test their readiness to learn such concepts. Ninety students were designated the experimental group and participated in a 15-week…

  2. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  3. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  4. Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell

    NASA Astrophysics Data System (ADS)

    Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

    2016-06-01

    Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis

  5. The Logic of Life

    NASA Astrophysics Data System (ADS)

    Pascal, Robert; Pross, Addy

    2016-04-01

    In this paper we propose a logical connection between the physical and biological worlds, one resting on a broader understanding of the stability concept. We propose that stability manifests two facets - time and energy, and that stability's time facet, expressed as persistence, is more general than its energy facet. That insight leads to the logical formulation of the Persistence Principle, which describes the general direction of material change in the universe, and which can be stated most simply as: nature seeks persistent forms. Significantly, the principle is found to express itself in two mathematically distinct ways: in the replicative world through Malthusian exponential growth, and in the `regular' physical/chemical world through Boltzmann's probabilistic considerations. By encompassing both `regular' and replicative worlds, the principle appears to be able to help reconcile two of the major scientific theories of the 19th century - the Second Law of Thermodynamics and Darwin's theory of evolution - within a single conceptual framework.

  6. The Logic of Life

    NASA Astrophysics Data System (ADS)

    Pascal, Robert; Pross, Addy

    2016-11-01

    In this paper we propose a logical connection between the physical and biological worlds, one resting on a broader understanding of the stability concept. We propose that stability manifests two facets - time and energy, and that stability's time facet, expressed as persistence, is more general than its energy facet. That insight leads to the logical formulation of the Persistence Principle, which describes the general direction of material change in the universe, and which can be stated most simply as: nature seeks persistent forms. Significantly, the principle is found to express itself in two mathematically distinct ways: in the replicative world through Malthusian exponential growth, and in the `regular' physical/chemical world through Boltzmann's probabilistic considerations. By encompassing both `regular' and replicative worlds, the principle appears to be able to help reconcile two of the major scientific theories of the 19th century - the Second Law of Thermodynamics and Darwin's theory of evolution - within a single conceptual framework.

  7. Nanomagnet Logic: Architectures, design, and benchmarking

    NASA Astrophysics Data System (ADS)

    Kurtz, Steven J.

    Nanomagnet Logic (NML) is an emerging technology being studied as a possible replacement or supplementary device for Complimentary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FET) by the year 2020. NML devices offer numerous potential advantages including: low energy operation, steady state non-volatility, radiation hardness and a clear path to fabrication and integration with CMOS. However, maintaining both low-energy operation and non-volatility while scaling from the device to the architectural level is non-trivial as (i) nearest neighbor interactions within NML circuits complicate the modeling of ensemble nanomagnet behavior and (ii) the energy intensive clock structures required for re-evaluation and NML's relatively high latency challenge its ability to offer system-level performance wins against other emerging nanotechnologies. Thus, further research efforts are required to model more complex circuits while also identifying circuit design techniques that balance low-energy operation with steady state non-volatility. In addition, further work is needed to design and model low-power on-chip clocks while simultaneously identifying application spaces where NML systems (including clock overhead) offer sufficient energy savings to merit their inclusion in future processors. This dissertation presents research advancing the understanding and modeling of NML at all levels including devices, circuits, and line clock structures while also benchmarking NML against both scaled CMOS and tunneling FETs (TFET) devices. This is accomplished through the development of design tools and methodologies for (i) quantifying both energy and stability in NML circuits and (ii) evaluating line-clocked NML system performance. The application of these newly developed tools improves the understanding of ideal design criteria (i.e., magnet size, clock wire geometry, etc.) for NML architectures. Finally, the system-level performance evaluation tool offers the ability to

  8. A programmable heater control circuit for spacecraft

    NASA Technical Reports Server (NTRS)

    Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

    1994-01-01

    Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

  9. A programming language for composable DNA circuits

    PubMed Central

    Phillips, Andrew; Cardelli, Luca

    2009-01-01

    Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing. PMID:19535415

  10. A programming language for composable DNA circuits.

    PubMed

    Phillips, Andrew; Cardelli, Luca

    2009-08-01

    Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

  11. Programmable Logic Application Notes

    NASA Technical Reports Server (NTRS)

    Katz, Richard

    1998-01-01

    This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter's column will include some announcements and some recent radiation test results and evaluations of interest. Specifically, the following topics will be covered: the Military and Aerospace Applications of Programmable Devices and Technologies Conference to be held at GSFC in September, 1998, proton test results, heavy ion test results, and some total dose results.

  12. Innovative Bimolecular-Based Advanced Logic Operations: A Prime Discriminator and An Odd Parity Checker.

    PubMed

    Zhou, Chunyang; Liu, Dali; Dong, Shaojun

    2016-08-17

    Herein, a novel logic operation of prime discriminator is first performed for the function of identifying the prime numbers from natural numbers less than 10. The prime discriminator logic operation is developed by DNA hybridizations and the conjugation of graphene oxide and single-stranded DNA as a reacting platform. On the basis of the similar reaction principle, an odd parity checker is also developed. The odd parity checker logic operation can identify the even numbers and odd numbers from natural numbers less than 10. Such advanced logic operations with digital recognition ability can provide a new field of vision toward prototypical DNA-based logic operations and promote the development of advanced logic circuits. PMID:27459592

  13. LOGSIM user's manual. [Logic Simulation Program for computer aided design of logic circuits

    NASA Technical Reports Server (NTRS)

    Mitchell, C. L.; Taylor, J. F.

    1972-01-01

    The user's manual for the LOGSIM Program is presented. All program options are explained and a detailed definition of the format of each input card is given. LOGSIM Program operations, and the preparation of LOGSIM input data are discused along with data card formats, postprocessor data cards, and output interpretation.

  14. A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

    NASA Astrophysics Data System (ADS)

    Sharma, Vijay Kumar; Pattanaik, Manisha

    2015-11-01

    Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-VTH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-VTH transistors in place of high-VTH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-VTH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.

  15. A simple tachometer circuit

    NASA Technical Reports Server (NTRS)

    Dimeff, J.

    1972-01-01

    Electric circuit to measure frequency of repetitive sinusoidal or rectangular wave is presented. Components of electric circuit and method of operation are explained. Application of circuit as tachometer for automobile is discussed.

  16. Photomultiplier blanking circuit

    NASA Technical Reports Server (NTRS)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  17. Characteristics Of Ferroelectric Logic Gates Using a Spice-Based Model

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2005-01-01

    A SPICE-based model of an n-channel ferroelectric field effect transistor has been developed based on both theoretical and empirical data. This model was used to generate the I-V characteristic of several logic gates. The use of ferroelectric field effect transistors in memory circuits is being developed by several organizations. The use of FFETs in other circuits, both analog and digital needs to be better understood. The ability of FFETs to have different characteristics depending on the initial polarization can be used to create logic gates. These gates can have properties not available to standard CMOS logic gates, such as memory, reconfigurability and memory. This paper investigates basic properties of FFET logic gates. It models FFET inverter, NAND gate and multi-input NAND gate. The I-V characteristics of the gates are presented as well as transfer characteristics and timing. The model used is a SPICE-based model developed from empirical data from actual Ferroelectric transistors. It simulates all major characteristics of the ferroelectric transistor, including polarization, hysteresis and decay. Contrasts are made of the differences between FFET logic gates and CMOS logic gates. FFET parameters are varied to show the effect on the overall gate. A recodigurable gate is investigated which is not possible with CMOS circuits. The paper concludes that FFETs can be used in logic gates and have several advantages over standard CMOS gates.

  18. Fuzzy forecasting based on fuzzy-trend logical relationship groups.

    PubMed

    Chen, Shyi-Ming; Wang, Nai-Yi

    2010-10-01

    In this paper, we present a new method to predict the Taiwan Stock Exchange Capitalization Weighted Stock Index (TAIEX) based on fuzzy-trend logical relationship groups (FTLRGs). The proposed method divides fuzzy logical relationships into FTLRGs based on the trend of adjacent fuzzy sets appearing in the antecedents of fuzzy logical relationships. First, we apply an automatic clustering algorithm to cluster the historical data into intervals of different lengths. Then, we define fuzzy sets based on these intervals of different lengths. Then, the historical data are fuzzified into fuzzy sets to derive fuzzy logical relationships. Then, we divide the fuzzy logical relationships into FTLRGs for forecasting the TAIEX. Moreover, we also apply the proposed method to forecast the enrollments and the inventory demand, respectively. The experimental results show that the proposed method gets higher average forecasting accuracy rates than the existing methods.

  19. Logic as Marr's Computational Level: Four Case Studies.

    PubMed

    Baggio, Giosuè; van Lambalgen, Michiel; Hagoort, Peter

    2015-04-01

    We sketch four applications of Marr's levels-of-analysis methodology to the relations between logic and experimental data in the cognitive neuroscience of language and reasoning. The first part of the paper illustrates the explanatory power of computational level theories based on logic. We show that a Bayesian treatment of the suppression task in reasoning with conditionals is ruled out by EEG data, supporting instead an analysis based on defeasible logic. Further, we describe how results from an EEG study on temporal prepositions can be reanalyzed using formal semantics, addressing a potential confound. The second part of the article demonstrates the predictive power of logical theories drawing on EEG data on processing progressive constructions and on behavioral data on conditional reasoning in people with autism. Logical theories can constrain processing hypotheses all the way down to neurophysiology, and conversely neuroscience data can guide the selection of alternative computational level models of cognition. PMID:25417838

  20. Logic as Marr's Computational Level: Four Case Studies.

    PubMed

    Baggio, Giosuè; van Lambalgen, Michiel; Hagoort, Peter

    2015-04-01

    We sketch four applications of Marr's levels-of-analysis methodology to the relations between logic and experimental data in the cognitive neuroscience of language and reasoning. The first part of the paper illustrates the explanatory power of computational level theories based on logic. We show that a Bayesian treatment of the suppression task in reasoning with conditionals is ruled out by EEG data, supporting instead an analysis based on defeasible logic. Further, we describe how results from an EEG study on temporal prepositions can be reanalyzed using formal semantics, addressing a potential confound. The second part of the article demonstrates the predictive power of logical theories drawing on EEG data on processing progressive constructions and on behavioral data on conditional reasoning in people with autism. Logical theories can constrain processing hypotheses all the way down to neurophysiology, and conversely neuroscience data can guide the selection of alternative computational level models of cognition.

  1. Bit-systolic arithmetic arrays using dynamic differential gallium arsenide circuits

    NASA Technical Reports Server (NTRS)

    Beagles, Grant; Winters, Kel; Eldin, A. G.

    1992-01-01

    A new family of gallium arsenide circuits for fine grained bit-systolic arithmetic arrays is introduced. This scheme combines features of two recent techniques of dynamic gallium arsenide FET logic and differential dynamic single-clock CMOS logic. The resulting circuits are fast and compact, with tightly constrained series FET propagation paths, low fanout, no dc power dissipation, and depletion FET implementation without level shifting diodes.

  2. Use of Fuzzy Logic Systems for Assessment of Primary Faults

    NASA Astrophysics Data System (ADS)

    Petrović, Ivica; Jozsa, Lajos; Baus, Zoran

    2015-09-01

    In electric power systems, grid elements are often subjected to very complex and demanding disturbances or dangerous operating conditions. Determining initial fault or cause of those states is a difficult task. When fault occurs, often it is an imperative to disconnect affected grid element from the grid. This paper contains an overview of possibilities for using fuzzy logic in an assessment of primary faults in the transmission grid. The tool for this task is SCADA system, which is based on information of currents, voltages, events of protection devices and status of circuit breakers in the grid. The function model described with the membership function and fuzzy logic systems will be presented in the paper. For input data, diagnostics system uses information of protection devices tripping, states of circuit breakers and measurements of currents and voltages before and after faults.

  3. Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

    NASA Astrophysics Data System (ADS)

    Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

    2015-03-01

    This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

  4. Programming a Pavlovian-like conditioning circuit in Escherichia coli

    NASA Astrophysics Data System (ADS)

    Zhang, Haoqian; Lin, Min; Shi, Handuo; Ji, Weiyue; Huang, Longwen; Zhang, Xiaomeng; Shen, Shan; Gao, Rencheng; Wu, Shuke; Tian, Chengzhe; Yang, Zhenglin; Zhang, Guosheng; He, Siheng; Wang, Hao; Saw, Tiffany; Chen, Yiwei; Ouyang, Qi

    2014-01-01

    Synthetic genetic circuits are programmed in living cells to perform predetermined cellular functions. However, designing higher-order genetic circuits for sophisticated cellular activities remains a substantial challenge. Here we program a genetic circuit that executes Pavlovian-like conditioning, an archetypical sequential-logic function, in Escherichia coli. The circuit design is first specified by the subfunctions that are necessary for the single simultaneous conditioning, and is further genetically implemented using four function modules. During this process, quantitative analysis is applied to the optimization of the modules and fine-tuning of the interconnections. Analogous to classical Pavlovian conditioning, the resultant circuit enables the cells to respond to a certain stimulus only after a conditioning process. We show that, although the conditioning is digital in single cells, a dynamically progressive conditioning process emerges at the population level. This circuit, together with its rational design strategy, is a key step towards the implementation of more sophisticated cellular computing.

  5. Surface confined assemblies and polymers for sensing and molecular logic

    NASA Astrophysics Data System (ADS)

    de Ruiter, Graham; Altman, Marc; Motiei, Leila; Lahav, Michal; van der Boom, Milko E.

    2013-05-01

    Since the development of molecule-based sensors and the introduction of molecules mimicking the behavior of the AND gate in solution by de Silva in 1993, molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. The molecular approach toward Boolean logic resulted in intriguing proofs of concepts in solution including logic gates, half-adders, multiplexers, and flip-flop logic circuits. Molecular assemblies can perform diverse logic tasks by reconfiguring their inputs. Our recent research activities focus on MBLC with electrochromic polymers and immobilized polypyridyl complexes on solid support. We have designed a series of coordination-based thin films that are formed linearly by stepwise wet-chemical deposition or by self-propagating molecular assembly. The electrochromic properties of these films can be used for (i) detecting various analytes in solution and in the air, (ii) MBLC, (iii) electron-transfer studies, and (iv) interlayers for efficient inverted bulk-heterojunction solar cells. Our concept toward MBLC with functionalized surfaces is applicable to electrochemical and chemical inputs coupled with optical readout. Using this approach, we demonstrated various logic architectures with redox-active functionalized surfaces. Electrochemically operated sequential logic systems (e.g., flip-flops), multi-valued logic, and multi-state memory have been designed, which can improve computational power without increasing spatial requirements. Applying multi-valued digits in data storage and information processing could exponentially increase memory capacity. Our approach is applicable to highly diverse electrochromic thin films that operate at practical voltages (< 1.5 V).

  6. Feasibility study for a generalized gate logic software simulator

    NASA Technical Reports Server (NTRS)

    Mcgough, J. G.

    1983-01-01

    Unit-delay simulation, event driven simulation, zero-delay simulation, simulation techniques, 2-valued versus multivalued logic, network initialization, gate operations and alternate network representations, parallel versus serial mode simulation fault modelling, extension of multiprocessor systems, and simulation timing are discussed. Functional level networks, gate equivalent circuits, the prototype BDX-930 network model, fault models, identifying detected faults for BGLOSS are discussed. Preprocessor tasks, postprocessor tasks, executive tasks, and a library of bliss coded macros for GGLOSS are also discussed.

  7. Modeling of single event transients with dual double-exponential current sources: Implications for logic cell characterization

    DOE PAGES

    Black, Dolores Archuleta; Robinson, William H.; Wilcox, Ian Zachary; Limbrick, Daniel B.; Black, Jeffrey D.

    2015-08-07

    Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. Likewise, an accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventionalmore » model based on one double-exponential source can be incomplete. Furthermore, a small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. As a result, the parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.« less

  8. Modeling of single event transients with dual double-exponential current sources: Implications for logic cell characterization

    SciTech Connect

    Black, Dolores Archuleta; Robinson, William H.; Wilcox, Ian Zachary; Limbrick, Daniel B.; Black, Jeffrey D.

    2015-08-07

    Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. Likewise, an accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventional model based on one double-exponential source can be incomplete. Furthermore, a small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. As a result, the parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.

  9. Modeling of single event transients with dual double-exponential current sources: Implications for logic cell characterization

    SciTech Connect

    Black, Dolores A.; Robinson, William H.; Limbrick, Daniel B.; Black, Jeffrey D.; Wilcox, Ian Z.

    2015-08-07

    Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. An accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventional model based on one double-exponential source can be incomplete. A small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. Furthermore, the parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.

  10. Modeling of single event transients with dual double-exponential current sources: Implications for logic cell characterization

    DOE PAGES

    Black, Dolores A.; Robinson, William H.; Limbrick, Daniel B.; Black, Jeffrey D.; Wilcox, Ian Z.

    2015-08-07

    Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. An accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventional modelmore » based on one double-exponential source can be incomplete. A small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. Furthermore, the parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.« less

  11. Learning Probabilistic Logic Models from Probabilistic Examples.

    PubMed

    Chen, Jianzhong; Muggleton, Stephen; Santos, José

    2008-10-01

    We revisit an application developed originally using abductive Inductive Logic Programming (ILP) for modeling inhibition in metabolic networks. The example data was derived from studies of the effects of toxins on rats using Nuclear Magnetic Resonance (NMR) time-trace analysis of their biofluids together with background knowledge representing a subset of the Kyoto Encyclopedia of Genes and Genomes (KEGG). We now apply two Probabilistic ILP (PILP) approaches - abductive Stochastic Logic Programs (SLPs) and PRogramming In Statistical modeling (PRISM) to the application. Both approaches support abductive learning and probability predictions. Abductive SLPs are a PILP framework that provides possible worlds semantics to SLPs through abduction. Instead of learning logic models from non-probabilistic examples as done in ILP, the PILP approach applied in this paper is based on a general technique for introducing probability labels within a standard scientific experimental setting involving control and treated data. Our results demonstrate that the PILP approach provides a way of learning probabilistic logic models from probabilistic examples, and the PILP models learned from probabilistic examples lead to a significant decrease in error accompanied by improved insight from the learned results compared with the PILP models learned from non-probabilistic examples.

  12. Managing Medical Logic Modules.

    PubMed Central

    Aguirre, A. R.; Roderer, N. K.

    1991-01-01

    A key element of IAIMS development at the Columbia Presbyterian Medical Center (CPMC) is the Medical Logic Module (MLM), designed to provide decision support to clinical users. A standard has been established for MLMs, and a number of institutions have agreed in principle to share them. At CPMC, MLMs are under development and MLMs from other institutions are being reviewed. The Columbia Health Sciences Library has developed a management system for MLMs which supports both internal development and sharing of MLMs among institutions. This paper describes the elements of the MLM management system. PMID:1807599

  13. Programmable Logic Application Notes

    NASA Technical Reports Server (NTRS)

    Katz, Richard

    1999-01-01

    This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter the focus is on some experimental data on low voltage drop out regulators to support mixed 5 and 3.3 volt systems. A discussion of the Small Explorer WIRE spacecraft will also be given. Lastly, we show take a first look at robust state machines in Hardware Description Languages (VHDL) and their use in critical systems. If you have information that you would like to submit or an area you would like discussed or researched, please give me a call or e-mail.

  14. Function does not follow form in gene regulatory circuits

    PubMed Central

    Payne, Joshua L.; Wagner, Andreas

    2015-01-01

    Gene regulatory circuits are to the cell what arithmetic logic units are to the chip: fundamental components of information processing that map an input onto an output. Gene regulatory circuits come in many different forms, distinct structural configurations that determine who regulates whom. Studies that have focused on the gene expression patterns (functions) of circuits with a given structure (form) have examined just a few structures or gene expression patterns. Here, we use a computational model to exhaustively characterize the gene expression patterns of nearly 17 million three-gene circuits in order to systematically explore the relationship between circuit form and function. Three main conclusions emerge. First, function does not follow form. A circuit of any one structure can have between twelve and nearly thirty thousand distinct gene expression patterns. Second, and conversely, form does not follow function. Most gene expression patterns can be realized by more than one circuit structure. And third, multifunctionality severely constrains circuit form. The number of circuit structures able to drive multiple gene expression patterns decreases rapidly with the number of these patterns. These results indicate that it is generally not possible to infer circuit function from circuit form, or vice versa. PMID:26290154

  15. Rational Design of a Fusion Protein to Exhibit Disulfide-Mediated Logic Gate Behavior

    PubMed Central

    2015-01-01

    Synthetic cellular logic gates are primarily built from gene circuits owing to their inherent modularity. Single proteins can also possess logic gate functions and offer the potential to be simpler, quicker, and less dependent on cellular resources than gene circuits. However, the design of protein logic gates that are modular and integrate with other cellular components is a considerable challenge. As a step toward addressing this challenge, we describe the design, construction, and characterization of AND, ORN, and YES logic gates built by introducing disulfide bonds into RG13, a fusion of maltose binding protein and TEM-1 β-lactamase for which maltose is an allosteric activator of enzyme activity. We rationally designed these disulfide bonds to manipulate RG13’s allosteric regulation mechanism such that the gating had maltose and reducing agents as input signals, and the gates could be toggled between different gating functions using redox agents, although some gates performed suboptimally. PMID:25144732

  16. Fine-Grained Power Gating Based on the Controlling Value of Logic Elements

    NASA Astrophysics Data System (ADS)

    Chen, Lei; Horiyama, Takashi; Nakamura, Yuichi; Kimura, Shinji

    Leakage power consumption of logic elements has become a serious problem, especially in the sub-100-nanometer process. In this paper, a novel power gating approach by using the controlling value of logic elements is proposed. In the proposed method, sleep signals of the power-gated blocks are extracted completely from the original circuits without any extra logic element. A basic algorithm and a probability-based heuristic algorithm have been developed to implement the basic idea. The steady maximum delay constraint has also been introduced to handle the delay issues. Experiments on the ISCAS'85 benchmarks show that averagely 15-36% of logic elements could be power gated at a time for random input patterns, and 3-31% of elements could be stopped under the steady maximum delay constraints. We also show a power optimization method for AND/OR tree circuits, in which more than 80% of gates can be power-gated.

  17. FPGA-based gating and logic for multichannel single photon counting

    SciTech Connect

    Pooser, Raphael C; Earl, Dennis Duncan; Evans, Philip G; Williams, Brian P; Schaake, Jason; Humble, Travis S

    2012-01-01

    We present results characterizing multichannel InGaAs single photon detectors utilizing gated passive quenching circuits (GPQC), self-differencing techniques, and field programmable gate array (FPGA)-based logic for both diode gating and coincidence counting. Utilizing FPGAs for the diode gating frontend and the logic counting backend has the advantage of low cost compared to custom built logic circuits and current off-the-shelf detector technology. Further, FPGA logic counters have been shown to work well in quantum key distribution (QKD) test beds. Our setup combines multiple independent detector channels in a reconfigurable manner via an FPGA backend and post processing in order to perform coincidence measurements between any two or more detector channels simultaneously. Using this method, states from a multi-photon polarization entangled source are detected and characterized via coincidence counting on the FPGA. Photons detection events are also processed by the quantum information toolkit for application testing (QITKAT)

  18. 2D photonic crystal logic gates based on self-collimated effect

    NASA Astrophysics Data System (ADS)

    Fan, Ranran; Yang, Xiulun; Meng, Xiangfeng; Sun, Xiaowen

    2016-08-01

    Four kinds of logic gates are proposed using interference between the self-collimated beams in photonic crystals, namely NOT, OR, AND and XOR gates, which can be used in the design of photonic integrated circuits. The radius of the splitter and the optical path difference between splitters are adjusted to produce certain phase difference between the reflected and transmitted beams, which may interfere constructively or destructively to realize logical operation. They have high contrast ratios and low power consumption, the extinction ratio between logic 1 and logic 0 for NOT and AND gates can reach 24.7 dB, 30 dB and 12.6 dB for the wavelength used by optical communication (1550 nm), respectively, which makes it potentially applicable for photonic integrated circuits.

  19. Thermionic integrated circuit program: Final report

    SciTech Connect

    Wilde, D.K.; Lynn, D.K.; Hamilton, D.

    1988-05-01

    This report describes the development of an operational amplifier using radiation hardened Thermionic Integrated Circuits (TICs). The report is written as a tutorial to cover all aspects of the fabrication process and circuit development as well as the process and circuit modifications required to meet the integration requirements of the operational amplifier. Recent experimental results are discussed in which both devices and test circuit data are compared to theoretical computer code predictions. The development of compatible high-temperature thin-film resistors is also presented. Because the project is being terminated prior to the completion of the amplifier, suggestions are made for additional advance development.

  20. Design of Logic Module Based on Magnetic-Tunnel-Junction Elements for Nonvolatile Field-Programmable Gate Array

    NASA Astrophysics Data System (ADS)

    Lee, Hyunjoo; Kim, Sojeong; Lee, Seungyeon; Lee, Seungjun; Shin, Hyungsoon

    2009-04-01

    Magnetologic using a magnetic-tunnel-junction (MTJ) element is a very hopeful candidate for universal logic technology because it can be used to build both logic circuits and nonvolatile memories. A structure of single-layer (SL) MTJ with a novel current driver previously presented by the authors improved both functional flexibility and uniformity of magnetologic. In this paper, the design of a nonvolatile logic module using SL MTJ is presented, which can be used as a basic logic cell for nonvolatile field-programmable gate arrays (FPGAs). The S-module is a basic logic cell for Act3 family of FPGAs by Actel, which can implement arbitrary five-input logic functions. We designed an S-module using SL MTJ elements such that it can work as a programmable logic module with nonvolatility. The functional verification has been carried out by HSPICE simulator on the basis of a macro-model of SL MTJ.

  1. Parallel algorithm strategies for circuit simulation.

    SciTech Connect

    Thornquist, Heidi K.; Schiek, Richard Louis; Keiter, Eric Richard

    2010-01-01

    Circuit simulation tools (e.g., SPICE) have become invaluable in the development and design of electronic circuits. However, they have been pushed to their performance limits in addressing circuit design challenges that come from the technology drivers of smaller feature scales and higher integration. Improving the performance of circuit simulation tools through exploiting new opportunities in widely-available multi-processor architectures is a logical next step. Unfortunately, not all traditional simulation applications are inherently parallel, and quickly adapting mature application codes (even codes designed to parallel applications) to new parallel paradigms can be prohibitively difficult. In general, performance is influenced by many choices: hardware platform, runtime environment, languages and compilers used, algorithm choice and implementation, and more. In this complicated environment, the use of mini-applications small self-contained proxies for real applications is an excellent approach for rapidly exploring the parameter space of all these choices. In this report we present a multi-core performance study of Xyce, a transistor-level circuit simulation tool, and describe the future development of a mini-application for circuit simulation.

  2. Energy efficient circuit design using nanoelectromechanical relays

    NASA Astrophysics Data System (ADS)

    Venkatasubramanian, Ramakrishnan

    Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS

  3. Realization of a quantum Hamiltonian Boolean logic gate on the Si(001):H surface.

    PubMed

    Kolmer, Marek; Zuzak, Rafal; Dridi, Ghassen; Godlewski, Szymon; Joachim, Christian; Szymonski, Marek

    2015-08-01

    The design and construction of the first prototypical QHC (Quantum Hamiltonian Computing) atomic scale Boolean logic gate is reported using scanning tunnelling microscope (STM) tip-induced atom manipulation on an Si(001):H surface. The NOR/OR gate truth table was confirmed by dI/dU STS (Scanning Tunnelling Spectroscopy) tracking how the surface states of the QHC quantum circuit on the Si(001):H surface are shifted according to the input logical status. PMID:26144212

  4. An SEU immune logic family

    NASA Technical Reports Server (NTRS)

    Canaris, J.

    1991-01-01

    A new logic family, which is immune to single event upsets, is described. Members of the logic family are capable of recovery, regardless of the shape of the upsetting event. Glitch propagation from an upset node is also blocked. Logic diagrams for an Inverter, Nor, Nand, and Complex Gates are provided. The logic family can be implemented in a standard, commercial CMOS process with no additional masks. DC, transient, static power, upset recovery and layout characteristics of the new family, based on a commercial 1 micron CMOS N-Well process, are described.

  5. A qualitative approach to teaching capacitive circuits

    NASA Astrophysics Data System (ADS)

    Smith, David P.; Kampen, Paul van

    2013-05-01

    We have investigated students' qualitative understanding of dc circuits containing resistors and a capacitor. We found that a year after traditional lecture instruction as part of an introductory physics course, most students were unable to predict the behavior of a series circuit consisting of a battery, a bulb, and a capacitor. Among the difficulties identified we found that almost half of the students implicitly abandoned the idea that a complete circuit is necessary for a bulb to light when a capacitor is introduced into the circuit. We have developed curriculum that enables students to construct a phenomenological model in which they liken the behavior of a capacitor to that of a wire, a switch, and a battery; this allows them to qualitatively describe circuits with batteries, bulbs, and capacitors. We have also developed curriculum on the determination of RC times. Post-test results show a significant increase in understanding of capacitive circuits.

  6. Logic elements for reactor period meter

    DOEpatents

    McDowell, William P.; Bobis, James P.

    1976-01-01

    Logic elements are provided for a reactor period meter trip circuit. For one element, first and second inputs are applied to first and second chopper comparators, respectively. The output of each comparator is O if the input applied to it is greater than or equal to a trip level associated with each input and each output is a square wave of frequency f if the input applied to it is less than the associated trip level. The outputs of the comparators are algebraically summed and applied to a bandpass filter tuned to f. For another element, the output of each comparator is applied to a bandpass filter which is tuned to f to give a sine wave of frequency f. The outputs of the filters are multiplied by an analog multiplier whose output is 0 if either input is 0 and a sine wave of frequency 2f if both inputs are a frequency f.

  7. Fuzzy logic and coarse coding using programmable logic devices

    NASA Astrophysics Data System (ADS)

    Brooks, Geoffrey

    2009-05-01

    Naturally-occurring sensory signal processing algorithms, such as those that inspired fuzzy-logic control, can be integrated into non-naturally-occurring high-performance technology, such as programmable logic devices, to realize novel bio-inspired designs. Research is underway concerning an investigation into using field programmable logic devices (FPLD's) to implement fuzzy logic sensory processing. A discussion is provided concerning the commonality between bio-inspired fuzzy logic algorithms and coarse coding that is prevalent in naturally-occurring sensory systems. Undergraduate design projects using fuzzy logic for an obstacle-avoidance robot has been accomplished at our institution and other places; numerous other successful fuzzy logic applications can be found as well. The long-term goal is to leverage such biomimetic algorithms for future applications. This paper outlines a design approach for implementing fuzzy-logic algorithms into reconfigurable computing devices. This paper is presented in an effort to connect with others who may be interested in collaboration as well as to establish a starting point for future research.

  8. Sequential power-up circuit

    DOEpatents

    Kronberg, J.W.

    1992-06-02

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable. 2 figs.

  9. Sequential power-up circuit

    DOEpatents

    Kronberg, James W.

    1992-01-01

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable.

  10. Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell.

    PubMed

    Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

    2016-07-01

    Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.

  11. Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell.

    PubMed

    Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

    2016-07-01

    Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future. PMID:27297542

  12. Fuzzy Logic Particle Tracking

    NASA Technical Reports Server (NTRS)

    2005-01-01

    A new all-electronic Particle Image Velocimetry technique that can efficiently map high speed gas flows has been developed in-house at the NASA Lewis Research Center. Particle Image Velocimetry is an optical technique for measuring the instantaneous two component velocity field across a planar region of a seeded flow field. A pulsed laser light sheet is used to illuminate the seed particles entrained in the flow field at two instances in time. One or more charged coupled device (CCD) cameras can be used to record the instantaneous positions of particles. Using the time between light sheet pulses and determining either the individual particle displacements or the average displacement of particles over a small subregion of the recorded image enables the calculation of the fluid velocity. Fuzzy logic minimizes the required operator intervention in identifying particles and computing velocity. Using two cameras that have the same view of the illumination plane yields two single exposure image frames. Two competing techniques that yield unambiguous velocity vector direction information have been widely used for reducing the single-exposure, multiple image frame data: (1) cross-correlation and (2) particle tracking. Correlation techniques yield averaged velocity estimates over subregions of the flow, whereas particle tracking techniques give individual particle velocity estimates. For the correlation technique, the correlation peak corresponding to the average displacement of particles across the subregion must be identified. Noise on the images and particle dropout result in misidentification of the true correlation peak. The subsequent velocity vector maps contain spurious vectors where the displacement peaks have been improperly identified. Typically these spurious vectors are replaced by a weighted average of the neighboring vectors, thereby decreasing the independence of the measurements. In this work, fuzzy logic techniques are used to determine the true

  13. Two- and three-input TALE-based AND logic computation in embryonic stem cells.

    PubMed

    Lienert, Florian; Torella, Joseph P; Chen, Jan-Hung; Norsworthy, Michael; Richardson, Ryan R; Silver, Pamela A

    2013-11-01

    Biological computing circuits can enhance our ability to control cellular functions and have potential applications in tissue engineering and medical treatments. Transcriptional activator-like effectors (TALEs) represent attractive components of synthetic gene regulatory circuits, as they can be designed de novo to target a given DNA sequence. We here demonstrate that TALEs can perform Boolean logic computation in mammalian cells. Using a split-intein protein-splicing strategy, we show that a functional TALE can be reconstituted from two inactive parts, thus generating two-input AND logic computation. We further demonstrate three-piece intein splicing in mammalian cells and use it to perform three-input AND computation. Using methods for random as well as targeted insertion of these relatively large genetic circuits, we show that TALE-based logic circuits are functional when integrated into the genome of mouse embryonic stem cells. Comparing construct variants in the same genomic context, we modulated the strength of the TALE-responsive promoter to improve the output of these circuits. Our work establishes split TALEs as a tool for building logic computation with the potential of controlling expression of endogenous genes or transgenes in response to a combination of cellular signals.

  14. Ultra-low-power carbon nanotube FET-based quaternary logic gates

    NASA Astrophysics Data System (ADS)

    Sharifi, Fazel; Moaiyeri, Mohammad Hossein; Navi, Keivan; Bagherzadeh, Nader

    2016-09-01

    This paper presents low-power carbon nanotube field-effect transistor (CNTFET)-based quaternary logic circuits. The proposed quaternary circuits are designed based on the CNTFET unique properties, such as the same carrier mobility for N- and P-type devices and also providing desirable threshold voltages by adopting proper diameters for the nanotubes. In addition, no paths exist between supply and ground rails in the steady states of the proposed designs, which eliminates the ON state static current and also the stacking technique is utilised in order to significantly reduce the leakage currents. The results of the simulations, conducted using Synopsys HSPICE with the standard 32 nm CNTFET technology, confirm the significantly lower power consumption, higher energy efficiency and lower sensitivity to process variation of the proposed designs compared to the state-of-the-art quaternary logic circuits. The proposed quaternary logic circuits have on average 92, 99 and 91% less total power, static power and PDP, respectively, compared with the most low-power and energy-efficient CNTFET-based quaternary logic circuits, recently presented in the literature.

  15. Quantificational logic of context

    SciTech Connect

    Buvac, Sasa

    1996-12-31

    In this paper we extend the Propositional Logic of Context, to the quantificational (predicate calculus) case. This extension is important in the declarative representation of knowledge for two reasons. Firstly, since contexts are objects in the semantics which can be denoted by terms in the language and which can be quantified over, the extension enables us to express arbitrary first-order properties of contexts. Secondly, since the extended language is no longer only propositional, we can express that an arbitrary predicate calculus formula is true in a context. The paper describes the syntax and the semantics of a quantificational language of context, gives a Hilbert style formal system, and outlines a proof of the system`s completeness.

  16. A Logical Process Calculus

    NASA Technical Reports Server (NTRS)

    Cleaveland, Rance; Luettgen, Gerald; Bushnell, Dennis M. (Technical Monitor)

    2002-01-01

    This paper presents the Logical Process Calculus (LPC), a formalism that supports heterogeneous system specifications containing both operational and declarative subspecifications. Syntactically, LPC extends Milner's Calculus of Communicating Systems with operators from the alternation-free linear-time mu-calculus (LT(mu)). Semantically, LPC is equipped with a behavioral preorder that generalizes Hennessy's and DeNicola's must-testing preorder as well as LT(mu's) satisfaction relation, while being compositional for all LPC operators. From a technical point of view, the new calculus is distinguished by the inclusion of: (1) both minimal and maximal fixed-point operators and (2) an unimple-mentability predicate on process terms, which tags inconsistent specifications. The utility of LPC is demonstrated by means of an example highlighting the benefits of heterogeneous system specification.

  17. The New Quantum Logic

    NASA Astrophysics Data System (ADS)

    Griffiths, Robert B.

    2014-06-01

    It is shown how all the major conceptual difficulties of standard (textbook) quantum mechanics, including the two measurement problems and the (supposed) nonlocality that conflicts with special relativity, are resolved in the consistent or decoherent histories interpretation of quantum mechanics by using a modified form of quantum logic to discuss quantum properties (subspaces of the quantum Hilbert space), and treating quantum time development as a stochastic process. The histories approach in turn gives rise to some conceptual difficulties, in particular the correct choice of a framework (probabilistic sample space) or family of histories, and these are discussed. The central issue is that the principle of unicity, the idea that there is a unique single true description of the world, is incompatible with our current understanding of quantum mechanics.

  18. Logic-gate devices based on printed polymer semiconducting nanostripes.

    PubMed

    Gentili, Denis; Sonar, Prashant; Liscio, Fabiola; Cramer, Tobias; Ferlauto, Laura; Leonardi, Francesca; Milita, Silvia; Dodabalapur, Ananth; Cavallini, Massimiliano

    2013-08-14

    The applications of organic semiconductors in complex circuitry such as printed CMOS-like logic circuits demand miniaturization of the active structures to the submicrometric and nanoscale level while enhancing or at least preserving the charge transport properties upon processing. Here, we addressed this issue by using a wet lithographic technique, which exploits and enhances the molecular order in polymers by spatial confinement, to fabricate ambipolar organic field effect transistors and inverter circuits based on nanostructured single component ambipolar polymeric semiconductor. In our devices, the current flows through a precisely defined array of nanostripes made of a highly ordered diketopyrrolopyrrole-benzothiadiazole copolymer with high charge carrier mobility (1.45 cm(2) V(-1) s(-1) for electrons and 0.70 cm(2) V(-1) s(-1) for holes). Finally, we demonstrated the functionality of the ambipolar nanostripe transistors by assembling them into an inverter circuit that exhibits a gain (105) comparable to inverters based on single crystal semiconductors.

  19. Hidden circuits and argumentation

    NASA Astrophysics Data System (ADS)

    Leinonen, Risto; Kesonen, Mikko H. P.; Hirvonen, Pekka E.

    2016-11-01

    Despite the relevance of DC circuits in everyday life and schools, they have been shown to cause numerous learning difficulties at various school levels. In the course of this article, we present a flexible method for teaching DC circuits at lower secondary level. The method is labelled as hidden circuits, and the essential idea underlying hidden circuits is in hiding the actual wiring of DC circuits, but to make their behaviour evident for pupils. Pupils are expected to find out the wiring of the circuit which should enhance their learning of DC circuits. We present two possible ways to utilise hidden circuits in a classroom. First, they can be used to test and enhance pupils’ conceptual understanding when pupils are expected to find out which one of the offered circuit diagram options corresponds to the actual circuit shown. This method aims to get pupils to evaluate the circuits holistically rather than locally, and as a part of that aim this method highlights any learning difficulties of pupils. Second, hidden circuits can be used to enhance pupils’ argumentation skills with the aid of argumentation sheet that illustrates the main elements of an argument. Based on the findings from our co-operating teachers and our own experiences, hidden circuits offer a flexible and motivating way to supplement teaching of DC circuits.

  20. Simple Cell Balance Circuit

    NASA Technical Reports Server (NTRS)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  1. Effects of smoke on functional circuits

    SciTech Connect

    Tanaka, T.J.

    1997-10-01

    Nuclear power plants are converting to digital instrumentation and control systems; however, the effects of abnormal environments such as fire and smoke on such systems are not known. There are no standard tests for smoke, but previous smoke exposure tests at Sandia National Laboratories have shown that digital communications can be temporarily interrupted during a smoke exposure. Another concern is the long-term corrosion of metals exposed to the acidic gases produced by a cable fire. This report documents measurements of basic functional circuits during and up to 1 day after exposure to smoke created by burning cable insulation. Printed wiring boards were exposed to the smoke in an enclosed chamber for 1 hour. For high-resistance circuits, the smoke lowered the resistance of the surface of the board and caused the circuits to short during the exposure. These circuits recovered after the smoke was vented. For low-resistance circuits, the smoke caused their resistance to increase slightly. A polyurethane conformal coating substantially reduced the effects of smoke. A high-speed digital circuit was unaffected. A second experiment on different logic chip technologies showed that the critical shunt resistance that would cause failure was dependent on the chip technology and that the components used in the smoke exposures were some of the most smoke tolerant. The smoke densities in these tests were high enough to cause changes in high impedance (resistance) circuits during exposure, but did not affect most of the other circuits. Conformal coatings and the characteristics of chip technologies should be considered when designing circuitry for nuclear power plant safety systems, which must be highly reliable under a variety of operating and accident conditions. 10 refs., 34 figs., 18 tabs.

  2. Programmable Logic Controllers. Teacher Edition.

    ERIC Educational Resources Information Center

    Rauh, Bob; Kaltwasser, Stan

    These materials were developed for a seven-unit secondary or postsecondary education course on programmable logic controllers (PLCs) that treats most of the skills needed to work effectively with PLCs as programming skills. The seven units of the course cover the following topics: fundamentals of programmable logic controllers; contracts, timers,…

  3. Japanese Logic Puzzles and Proof

    ERIC Educational Resources Information Center

    Wanko, Jeffrey J.

    2009-01-01

    An understanding of proof does not start in a high school geometry course. Rather, attention to logical reasoning throughout a student's school experience can help the development of proof readiness. In the spirit of problem solving, the author has begun to use some Japanese logic puzzles other than sudoku to help students develop additional…

  4. Biosensors with Built-In Biomolecular Logic Gates for Practical Applications

    PubMed Central

    Lai, Yu-Hsuan; Sun, Sin-Cih; Chuang, Min-Chieh

    2014-01-01

    Molecular logic gates, designs constructed with biological and chemical molecules, have emerged as an alternative computing approach to silicon-based logic operations. These molecular computers are capable of receiving and integrating multiple stimuli of biochemical significance to generate a definitive output, opening a new research avenue to advanced diagnostics and therapeutics which demand handling of complex factors and precise control. In molecularly gated devices, Boolean logic computations can be activated by specific inputs and accurately processed via bio-recognition, bio-catalysis, and selective chemical reactions. In this review, we survey recent advances of the molecular logic approaches to practical applications of biosensors, including designs constructed with proteins, enzymes, nucleic acids, nanomaterials, and organic compounds, as well as the research avenues for future development of digitally operating “sense and act” schemes that logically process biochemical signals through networked circuits to implement intelligent control systems. PMID:25587423

  5. Reconfigurable magnetic logic combined with non-volatile memory in silicon

    NASA Astrophysics Data System (ADS)

    Luo, Zhaochu; Zhang, Xiaozhong

    Silicon-based complementary metal-oxide-semiconductor (CMOS) transistors have achieved great success and become the mainstream of integrated logic circuits. However, the traditional pathway to enhance computational performance and decrease cost by continuous miniaturization is approaching its fundamental limits. The recent emergence of magnetic logic devices, especially magnetic-field-based semiconductor logic devices, shows promise for surpassing the development limits of CMOS logic and arouses profound attentions. Based on our Si based magnetoresistance (MR) device, we proposed a Si based reconfigurable magnetic logic device by coupling nonlinear transport effect and Hall effect in Si, which could do all four basic Boolean logic operations including AND, OR, NOR and NAND combined with non-volatile memory. Further, we developed a Si based current-mode magnetic logic device, which allowed direct communication between different logic devices by current-induced magnetization switch effect without external intermediate magnetic-electric converters. This may result in a memory-logic integrated system leading to a non von Neumann computer.

  6. Slime mould logic gates based on frequency changes of electrical potential oscillation.

    PubMed

    Whiting, James G H; de Lacy Costello, Ben P J; Adamatzky, Andrew

    2014-10-01

    Physarum polycephalum is a large single amoeba cell, which in its plasmodial phase, forages and connects nearby food sources with protoplasmic tubes. The organism forages for food by growing these tubes towards detected foodstuff, this foraging behaviour is governed by simple rules of photoavoidance and chemotaxis. The electrical activity of the tubes oscillates, creating a peristaltic like action within the tubes, forcing cytoplasm along the lumen; the frequency of this oscillation controls the speed and direction of growth. External stimuli such as light and food cause changes in the oscillation frequency. We demonstrate that using these stimuli as logical inputs we can approximate logic gates using these tubes and derive combinational logic circuits by cascading the gates, with software analysis providing the output of each gate and determining the input of the following gate. Basic gates OR, AND and NOT were correct 90%, 77.8% and 91.7% of the time respectively. Derived logic circuits XOR, half adder and full adder were 70.8%, 65% and 58.8% accurate respectively. Accuracy of the combinational logic decreases as the number of gates is increased, however they are at least as accurate as previous logic approximations using spatial growth of P. polycephalum and up to 30 times as fast at computing the logical output. The results shown here demonstrate a significant advancement in organism-based computing, providing a solid basis for hybrid computers of the future.

  7. Spintronic logic design methodology based on spin Hall effect-driven magnetic tunnel junctions

    NASA Astrophysics Data System (ADS)

    Kang, Wang; Wang, Zhaohao; Zhang, Youguang; Klein, Jacques-Olivier; Lv, Weifeng; Zhao, Weisheng

    2016-02-01

    Conventional complementary metal-oxide-semiconductor (CMOS) technology is now approaching its physical scaling limits to enable Moore’s law to continue. Spintronic devices, as one of the potential alternatives, show great promise to replace CMOS technology for next-generation low-power integrated circuits in nanoscale technology nodes. Until now, spintronic memory has been successfully commercialized. However spintronic logic still faces many critical challenges (e.g. direct cascading capability and small operation gain) before it can be practically applied. In this paper, we propose a standard complimentary spintronic logic (CSL) design methodology to form a CMOS-like logic design paradigm. Using the spin Hall effect (SHE)-driven magnetic tunnel junction (MTJ) device as an example, we demonstrate CSL implementation, functionality and performance. This logic family provides a unified design methodology for spintronic logic circuits and partly solves the challenges of direct cascading capability and small operation gain in the previously proposed spintronic logic designs. By solving a modified Landau-Lifshitz-Gilbert equation, the magnetization dynamics in the free layer of the MTJ is theoretically described and a compact electrical model is developed. With this electrical model, numerical simulations have been performed to evaluate the functionality and performance of the proposed CSL design. Simulation results demonstrate that the proposed CSL design paradigm is rather promising for low-power logic computing.

  8. Simple and universal platform for logic gate operations based on molecular beacon probes.

    PubMed

    Park, Ki Soo; Seo, Myung Wan; Jung, Cheulhee; Lee, Joon Young; Park, Hyun Gyu

    2012-07-23

    A new platform technology is herein described with which to construct molecular logic gates by employing the hairpin-structured molecular beacon probe as a basic work unit. In this logic gate operation system, single-stranded DNA is used as the input to induce a conformational change in a molecular beacon probe through a sequence-specific interaction. The fluorescent signal resulting from the opening of the molecular beacon probe is then used as the output readout. Importantly, because the logic gates are based on DNA, thus permitting input/output homogeneity to be preserved, their wiring into multi-level circuits can be achieved by combining separately operated logic gates or by designing the DNA output of one gate as the input to the other. With this novel strategy, a complete set of two-input logic gates is successfully constructed at the molecular level, including OR, AND, XOR, INHIBIT, NOR, NAND, XNOR, and IMPLICATION. The logic gates developed herein can be reversibly operated to perform the set-reset function by applying an additional input or a removal strand. Together, these results introduce a new platform technology for logic gate operation that enables the higher-order circuits required for complex communication between various computational elements.

  9. Power optimization in logic isomers

    NASA Technical Reports Server (NTRS)

    Panwar, Ramesh; Rennels, David; Alkalaj, Leon

    1993-01-01

    Logic isomers are labeled, 2-isomorphic graphs that implement the same logic function. Logic isomers may have significantly different power requirements even though they have the same number of transistors in the implementation. The power requirements of the isomers depend on the transition activity of the input signals. The power requirements of isomorphic graph isomers of n-input NAND and NOR gates are shown. Choosing the less power-consuming isomer instead of the others can yield significant power savings. Experimental results on a ripple-carry adder are presented to show that the implementation using the least power-consuming isomers requires approximately 10 percent less power than the implementation using the most power-consuming isomers. Simulations of other random logic designs also confirm that designs using less power-consuming isomers can reduce the logic power demand by approximately 10 percent as compared to designs using more power-consuming isomers.

  10. Closed terminologies in description logics

    SciTech Connect

    Weida, R.A. |

    1996-12-31

    We introduce a predictive concept recognition methodology for description logics based on a new closed terminology assumption. During knowledge engineering, our system adopts the standard open terminology assumption as it automatically classifies concept descriptions into a taxonomy via subsumption inferences. However, for applications like configuration, the terminology becomes fixed during problem solving. Then, closed terminology reasoning is more appropriate. In our interactive configuration application, a user incrementally specifies an individual computer system in collaboration with a configuration engine. Choices can be made in any order and at any level of abstraction. We distinguish between abstract and concrete concepts to formally define when an individual`s description may be considered finished. We also take advantage of the closed terminology assumption, together with the terminology`s subsumption-based organization, to efficiently track the types of systems and components consistent with current choices, infer additional constraints on current choices, and appropriately guide future choices. Thus, we can help focus the efforts of both user and configuration engine.

  11. G4-FETs as Universal and Programmable Logic Gates

    NASA Technical Reports Server (NTRS)

    Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin

    2007-01-01

    An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

  12. Prediction of enteric methane emissions from sheep offered fresh perennial ryegrass () using data measured in indirect open-circuit respiration chambers.

    PubMed

    Zhao, Y G; O'Connell, N E; Yan, T

    2016-06-01

    Development of effective methane (CH) mitigation strategies for grazing sheep requires accurate prediction tools. The present study aimed to identify key parameters influencing enteric CH emissions and develop prediction equations for enteric CH emissions from sheep offered fresh grass. The data used were collected from 82 sheep offered fresh perennial ryegrass () as sole diets in 6 metabolism experiments (data from non-grass-only diets were not used). Sheep were from breeds of Highlander, Texel, Scottish Blackface, and Swaledale at the age of 5 to 18 mo and weighing from 24.5 to 62.7 kg. Grass was harvested daily from 6 swards on contrasting harvest dates (May to December). Before the commencement of each study, the experimental sward was harvested at a residual height of 4 cm and allowed to grow for 2 to 4 wk. The feeding trials commenced when the grass sward was suitable to zero grazing (average grass height = 15 cm), thus offering grass of a quality similar to what grazing animals would receive under routine grazing management. Sheep were housed in individual pens for 14 d and then moved to individual calorimeter chambers for 4 d. Feed intake, fecal and urine outputs, and CH emissions were measured during the final 4 d. Data were analyzed using the REML procedure to develop prediction equations for CH emissions. Linear and multiple prediction equations were developed using BW, DMI, GE intake (GEI), and grass chemical concentrations (DM, OM, water-soluble carbohydrates [WSC], NDF, ADF, nitrogen [N], GE, DE, and ME) as explanatory variables. The mean CH production was 21.1 g/kg DMI or 0.062 MJ/MJ GEI. Dry matter intake and GEI were much more accurate predictors for CH emissions than BW ( < 0.001, = 0.86 and = 0.87 vs. = 0.09, respectively). Adding grass DE and ME concentrations and grass nutrient concentrations (e.g., OM, N, GE, NDF, and WSC) to the relationships between DMI or GEI and CH emissions improved prediction accuracy with values increased to 0

  13. Generalized Majority Logic Criterion to Analyze the Statistical Strength of S-Boxes

    NASA Astrophysics Data System (ADS)

    Hussain, Iqtadar; Shah, Tariq; Gondal, Muhammad Asif; Mahmood, Hasan

    2012-05-01

    The majority logic criterion is applicable in the evaluation process of substitution boxes used in the advanced encryption standard (AES). The performance of modified or advanced substitution boxes is predicted by processing the results of statistical analysis by the majority logic criteria. In this paper, we use the majority logic criteria to analyze some popular and prevailing substitution boxes used in encryption processes. In particular, the majority logic criterion is applied to AES, affine power affine (APA), Gray, Lui J, residue prime, S8 AES, Skipjack, and Xyi substitution boxes. The majority logic criterion is further extended into a generalized majority logic criterion which has a broader spectrum of analyzing the effectiveness of substitution boxes in image encryption applications. The integral components of the statistical analyses used for the generalized majority logic criterion are derived from results of entropy analysis, contrast analysis, correlation analysis, homogeneity analysis, energy analysis, and mean of absolute deviation (MAD) analysis.

  14. Logical and symbolic analysis of robust biological dynamics.

    PubMed

    Glass, Leon; Siegelmann, Hava T

    2010-12-01

    Logical models provide insight about key control elements of biological networks. Based solely on the logical structure, we can determine state transition diagrams that give the allowed possible transitions in a coarse grained phase space. Attracting pathways and stable nodes in the state transition diagram correspond to robust attractors that would be found in several different types of dynamical systems that have the same logical structure. Attracting nodes in the state transition diagram correspond to stable steady states. Furthermore, the sequence of logical states appearing in biological networks with robust attracting pathways would be expected to appear also in Boolean networks, asynchronous switching networks, and differential equations having the same underlying structure. This provides a basis for investigating naturally occurring and synthetic systems, both to predict the dynamics if the structure is known, and to determine the structure if the transitions are known.

  15. Charge regulation circuit

    DOEpatents

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  16. Electrical Circuits and Water Analogies

    ERIC Educational Resources Information Center

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  17. Preparation and measurement of three-qubit entanglement in a superconducting circuit.

    PubMed

    Dicarlo, L; Reed, M D; Sun, L; Johnson, B R; Chow, J M; Gambetta, J M; Frunzio, L; Girvin, S M; Devoret, M H; Schoelkopf, R J

    2010-09-30

    Traditionally, quantum entanglement has been central to foundational discussions of quantum mechanics. The measurement of correlations between entangled particles can have results at odds with classical behaviour. These discrepancies grow exponentially with the number of entangled particles. With the ample experimental confirmation of quantum mechanical predictions, entanglement has evolved from a philosophical conundrum into a key resource for technologies such as quantum communication and computation. Although entanglement in superconducting circuits has been limited so far to two qubits, the extension of entanglement to three, eight and ten qubits has been achieved among spins, ions and photons, respectively. A key question for solid-state quantum information processing is whether an engineered system could display the multi-qubit entanglement necessary for quantum error correction, which starts with tripartite entanglement. Here, using a circuit quantum electrodynamics architecture, we demonstrate deterministic production of three-qubit Greenberger-Horne-Zeilinger (GHZ) states with fidelity of 88 per cent, measured with quantum state tomography. Several entanglement witnesses detect genuine three-qubit entanglement by violating biseparable bounds by 830 ± 80 per cent. We demonstrate the first step of basic quantum error correction, namely the encoding of a logical qubit into a manifold of GHZ-like states using a repetition code. The integration of this encoding with decoding and error-correcting steps in a feedback loop will be the next step for quantum computing with integrated circuits.

  18. Fuzzy logic in control systems: Fuzzy logic controller. I, II

    NASA Technical Reports Server (NTRS)

    Lee, Chuen Chien

    1990-01-01

    Recent advances in the theory and applications of fuzzy-logic controllers (FLCs) are examined in an analytical review. The fundamental principles of fuzzy sets and fuzzy logic are recalled; the basic FLC components (fuzzification and defuzzification interfaces, knowledge base, and decision-making logic) are described; and the advantages of FLCs for incorporating expert knowledge into a control system are indicated. Particular attention is given to fuzzy implication functions, the interpretation of sentence connectives (and, also), compositional operators, and inference mechanisms. Applications discussed include the FLC-guided automobile developed by Sugeno and Nishida (1985), FLC hardware systems, FLCs for subway trains and ship-loading cranes, fuzzy-logic chips, and fuzzy computers.

  19. The Logic of Reachability

    NASA Technical Reports Server (NTRS)

    Smith, David E.; Jonsson, Ari K.; Clancy, Daniel (Technical Monitor)

    2001-01-01

    In recent years, Graphplan style reachability analysis and mutual exclusion reasoning have been used in many high performance planning systems. While numerous refinements and extensions have been developed, the basic plan graph structure and reasoning mechanisms used in these systems are tied to the very simple STRIPS model of action. In 1999, Smith and Weld generalized the Graphplan methods for reachability and mutex reasoning to allow actions to have differing durations. However, the representation of actions still has some severe limitations that prevent the use of these techniques for many real-world planning systems. In this paper, we 1) separate the logic of reachability from the particular representation and inference methods used in Graphplan, and 2) extend the notions of reachability and mutual exclusion to more general notions of time and action. As it turns out, the general rules for mutual exclusion reasoning take on a remarkably clean and simple form. However, practical instantiations of them turn out to be messy, and require that we make representation and reasoning choices.

  20. Suicide as social logic.

    PubMed

    Kral, M J

    1994-01-01

    Although suicide is not viewed as a mental disorder per se, it is viewed by many if not most clinicians, researchers, and lay people as a real or natural symptom of depression. It is at least most typically seen as the unfortunate, severe, yet logical end result of a chain of negative self-appraisals, negative events, and hopelessness. Extending an approach articulated by the early French sociologist Gabriel Tarde, in this paper I argue that suicide is merely an idea, albeit a very bad one, having more in common with societal beliefs and norms regarding such things as divorce, abortion, sex, politics, consumer behavior, and fashion. I make a sharp contrast between perturbation and lethality, concepts central to Edwin S. Shneidman's theory of suicide. Evidence supportive of suicide as an idea is discussed based on what we are learning from the study of history and culture, and about contagion/cluster phenomena, media/communication, and choice of method. It is suggested that certain individuals are more vulnerable to incorporate the idea and act of suicide into their concepts of self, based on the same principles by which ideas are spread throughout society. Just as suicide impacts on society, so does society impact on suicide.

  1. Electrical Circuit Simulation Code

    SciTech Connect

    Wix, Steven D.; Waters, Arlon J.; Shirley, David

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  2. Piezoelectric drive circuit

    DOEpatents

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  3. Piezoelectric drive circuit

    DOEpatents

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  4. Formalized Epistemology, Logic, and Grammar

    NASA Astrophysics Data System (ADS)

    Bitbol, Michel

    The task of a formal epistemology is defined. It appears that a formal epistemology must be a generalization of "logic" in the sense of Wittgenstein's Tractatus. The generalization is required because, whereas logic presupposes a strict relation between activity and language, this relation may be broken in some domains of experimental enquiry (e.g., in microscopic physics). However, a formal epistemology should also retain a major feature of Wittgenstein's "logic": It must not be a discourse about scientific knowledge, but rather a way of making manifest the structures usually implicit in knowledge-gaining activity. This strategy is applied to the formalism of quantum mechanics.

  5. Periodic binary sequence generators: VLSI circuits considerations

    NASA Technical Reports Server (NTRS)

    Perlman, M.

    1984-01-01

    Feedback shift registers are efficient periodic binary sequence generators. Polynomials of degree r over a Galois field characteristic 2(GF(2)) characterize the behavior of shift registers with linear logic feedback. The algorithmic determination of the trinomial of lowest degree, when it exists, that contains a given irreducible polynomial over GF(2) as a factor is presented. This corresponds to embedding the behavior of an r-stage shift register with linear logic feedback into that of an n-stage shift register with a single two-input modulo 2 summer (i.e., Exclusive-OR gate) in its feedback. This leads to Very Large Scale Integrated (VLSI) circuit architecture of maximal regularity (i.e., identical cells) with intercell communications serialized to a maximal degree.

  6. Capacity-loss diagnostic and life-time prediction in lithium-ion batteries: Part 1. Development of a capacity-loss diagnostic method based on open-circuit voltage analysis

    NASA Astrophysics Data System (ADS)

    Wang, Tiansi; Pei, Lei; Wang, Tingting; Lu, Rengui; Zhu, Chunbo

    2016-01-01

    Effective capacity-loss diagnosis and life-time prediction are the foundations of battery second-use technology and will play an important role in the development of the new energy industry. Of the two, the capacity-loss diagnostic, as a precondition of the life-time prediction, needs to be studied first. Performing a capacity-loss diagnosis for an aging cell consists of finding the decisive degradation mechanisms for the cell's capacity degradation. Because a cell's capacity just equals the span of the open-circuit voltage (OCV), when suspect degradation mechanisms affect a cell's capacity, they will leave corresponding and particular clues in the OCV curve. Taking a cell's OCV as the diagnostic indicator, a multi-mechanistic and non-destructive diagnostic method is developed in this paper. To establish an unambiguous relationship between OCV changes and the combinations of the decisive mechanisms, all the possible OCV changes under various aging situations are systematically analyzed based on a novel simultaneous coordinate system, in which the effects of each suspect capacity-loss mechanism on the OCV curve can be clearly represented. As a summary of the analysis results, a straightforward diagnostic flowchart is presented. By following the flowchart, an aging cell can be diagnosed within three steps by observation of the OCV changes.

  7. CIRCUITS FOR CURRENT MEASUREMENTS

    DOEpatents

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  8. Knowledge representation in fuzzy logic

    NASA Technical Reports Server (NTRS)

    Zadeh, Lotfi A.

    1989-01-01

    The author presents a summary of the basic concepts and techniques underlying the application of fuzzy logic to knowledge representation. He then describes a number of examples relating to its use as a computational system for dealing with uncertainty and imprecision in the context of knowledge, meaning, and inference. It is noted that one of the basic aims of fuzzy logic is to provide a computational framework for knowledge representation and inference in an environment of uncertainty and imprecision. In such environments, fuzzy logic is effective when the solutions need not be precise and/or it is acceptable for a conclusion to have a dispositional rather than categorical validity. The importance of fuzzy logic derives from the fact that there are many real-world applications which fit these conditions, especially in the realm of knowledge-based systems for decision-making and control.

  9. Smart Detector Cell: A Scalable All-Spin Circuit for Low Power Non-Boolean Pattern Recognition

    NASA Astrophysics Data System (ADS)

    Aghasi, Hamidreza; Iraei, Rouhollah Mousavi; Naeemi, Azad; Afshari, Ehsan

    2016-05-01

    We present a new circuit for non-Boolean recognition of binary images. Employing all-spin logic (ASL) devices, we design logic comparators and non-Boolean decision blocks for compact and efficient computation. By manipulation of fan-in number in different stages of the circuit, the structure can be extended for larger training sets or larger images. Operating based on the mainly similarity idea, the system is capable of constructing a mean image and compare it with a separate input image within a short decision time. Taking advantage of the non-volatility of ASL devices, the proposed circuit is capable of hybrid memory/logic operation. Compared with existing CMOS pattern recognition circuits, this work achieves a smaller footprint, lower power consumption, faster decision time and a lower operational voltage. To the best of our knowledge, this is the first fully spin-based complete pattern recognition circuit demonstrated using spintronic devices.

  10. Realistic Display of Simulated Dynamic Response Using the Analog/Logic Computer.

    ERIC Educational Resources Information Center

    Cutchins, Malcolm A.

    1982-01-01

    Illustrates use of analog/logic computer to produce realistic display of the actual motion of computer simulations in addition to the usual variable-versus-time solution. An arbitrary vector-generating circuit is postulated and utilized in several examples, the most general of which shows vector length, angle, and position all changing with time.…

  11. Molecular aptamer beacon tuned DNA strand displacement to transform small molecules into DNA logic outputs.

    PubMed

    Zhu, Jinbo; Zhang, Libing; Zhou, Zhixue; Dong, Shaojun; Wang, Erkang

    2014-03-28

    A molecular aptamer beacon tuned DNA strand displacement reaction was introduced in this work. This strand displacement mode can be used to transform the adenosine triphosphate (ATP) input into a DNA strand output signal for the downstream gates to process. A simple logic circuit was built on the basis of this mechanism.

  12. Heat exchanger expert system logic

    NASA Technical Reports Server (NTRS)

    Cormier, R.

    1988-01-01

    The reduction is described of the operation and fault diagnostics of a Deep Space Network heat exchanger to a rule base by the application of propositional calculus to a set of logic statements. The value of this approach lies in the ease of converting the logic and subsequently implementing it on a computer as an expert system. The rule base was written in Process Intelligent Control software.

  13. Fuzzy logic and neural networks

    SciTech Connect

    Loos, J.R.

    1994-11-01

    Combine fuzzy logic`s fuzzy sets, fuzzy operators, fuzzy inference, and fuzzy rules - like defuzzification - with neural networks and you can arrive at very unfuzzy real-time control. Fuzzy logic, cursed with a very whimsical title, simply means multivalued logic, which includes not only the conventional two-valued (true/false) crisp logic, but also the logic of three or more values. This means one can assign logic values of true, false, and somewhere in between. This is where fuzziness comes in. Multi-valued logic avoids the black-and-white, all-or-nothing assignment of true or false to an assertion. Instead, it permits the assignment of shades of gray. When assigning a value of true or false to an assertion, the numbers typically used are {open_quotes}1{close_quotes} or {open_quotes}0{close_quotes}. This is the case for programmed systems. If {open_quotes}0{close_quotes} means {open_quotes}false{close_quotes} and {open_quotes}1{close_quotes} means {open_quotes}true,{close_quotes} then {open_quotes}shades of gray{close_quotes} are any numbers between 0 and 1. Therefore, {open_quotes}nearly true{close_quotes} may be represented by 0.8 or 0.9, {open_quotes}nearly false{close_quotes} may be represented by 0.1 or 0.2, and {close_quotes}your guess is as good as mine{close_quotes} may be represented by 0.5. The flexibility available to one is limitless. One can associate any meaning, such as {open_quotes}nearly true{close_quotes}, to any value of any granularity, such as 0.9999. 2 figs.

  14. Predicting the conditions under which vibroacoustic resonances with external periodic loads occur in the primary coolant circuits of VVER-based NPPs

    NASA Astrophysics Data System (ADS)

    Proskuryakov, K. N.; Fedorov, A. I.; Zaporozhets, M. V.

    2015-08-01

    The accident at the Japanese Fukushima Daiichi nuclear power plant (NPP) caused by an earthquake showed the need of taking further efforts aimed at improving the design and engineering solutions for ensuring seismic resistance of NPPs with due regard to mutual influence of the dynamic processes occurring in the NPP building structures and process systems. Resonance interaction between the vibrations of NPP equipment and coolant pressure pulsations leads to an abnormal growth of dynamic stresses in structural materials, accelerated exhaustion of equipment service life, and increased number of sudden equipment failures. The article presents the results from a combined calculation-theoretical and experimental substantiation of mutual amplification of two kinds of external periodic loads caused by rotation of the reactor coolant pump (RCP) rotor and an earthquake. The data of vibration measurements at an NPP are presented, which confirm the predicted multiple amplification of vibrations in the steam generator and RCP at a certain combination of coolant thermal-hydraulic parameters. It is shown that the vibration frequencies of the main equipment may fall in the frequency band corresponding to the maximal values in the envelope response spectra constructed on the basis of floor accelerograms. The article presents the results from prediction of conditions under which vibroacoustic resonances with external periodic loads take place, which confirm the occurrence of additional earthquake-induced multiple growth of pressure pulsation intensity in the steam generator at the 8.3 Hz frequency and additional multiple growth of vibrations of the RCP and the steam generator cold header at the 16.6 Hz frequency. It is shown that at the elastic wave frequency equal to 8.3 Hz in the coolant, resonance occurs with the frequency of forced vibrations caused by the rotation of the RCP rotor. A conclusion is drawn about the possibility of exceeding the design level of equipment vibrations

  15. Logic implementations using a single nanoparticle-protein hybrid

    NASA Astrophysics Data System (ADS)

    Medalsy, Izhar; Klein, Michael; Heyman, Arnon; Shoseyov, Oded; Remacle, F.; Levine, R. D.; Porath, Danny

    2010-06-01

    A Set-Reset machine is the simplest logic circuit with a built-in memory. Its output is a (nonlinear) function of the input and of the state stored in the machine's memory. Here, we report a nanoscale Set-Reset machine operating at room temperature that is based on a 5-nm silicon nanoparticle attached to the inner pore of a stable circular protein. The nanoparticle-protein hybrid can also function as a balanced ternary multiplier. Conductive atomic force microscopy is used to implement the logic input and output operations, and the processing of the logic Set and Reset operations relies on the finite capacitance of the nanoparticle provided by the good electrical isolation given by the protein, thus enabling stability of the logic device states. We show that the machine can be cycled, such that in every successive cycle, the previous state in the memory is retained as the present state. The energy cost of one cycle of computation is minimized to the cost of charging this state.

  16. Material Targets for Scaling All-Spin Logic

    NASA Astrophysics Data System (ADS)

    Manipatruni, Sasikanth; Nikonov, Dmitri E.; Young, Ian A.

    2016-01-01

    All-spin-logic devices are promising candidates to augment and complement beyond-CMOS integrated circuit computing due to nonvolatility, ultralow operating voltages, higher logical efficiency, and high density integration. However, the path to reach lower energy-delay product performance compared to CMOS transistors currently is not clear. We show that scaling and engineering the nanoscale magnetic materials and interfaces is the key to realizing spin-logic devices that can surpass the energy-delay performance of CMOS transistors. With validated stochastic nanomagnetic and vector spin-transport numerical models, we derive the target material and interface properties for the nanomagnets and channels. We identify promising directions for material engineering and discovery focusing on the systematic scaling of magnetic anisotropy (Hk ) and saturation magnetization (Ms ), the use of perpendicular magnetic anisotropy, and the interface spin-mixing conductance of the ferromagnet-spin-channel interface (Gmix ). We provide systematic targets for scaling a spin-logic energy-delay product toward 2 aJ ns, comprehending the stochastic noise for nanomagnets.

  17. Equivalent Circuits as Related to Ionic Systems

    PubMed Central

    Finkelstein, Alan; Mauro, Alexander

    1963-01-01

    The purpose of this paper is to clarify the relationship between certain “equivalent circuits” and the fundamental flux equations of Nernst and Planck. It is shown that as a direct algebraic consequence of these equations one may construct two types of equivalent circuits for a homogeneous (charged or uncharged) membrane. The one, which we term the “pure electrical equivalent circuit,” correctly predicts all of the electrical properties of the membrane for both steady and transient states. The other, which we call the “mixed equivalent circuit,” predicts the steady state I, Ψ characteristics of the membrane and the steady state ionic fluxes; it is not applicable to non-steady state properties or measurements. We emphasize that with regard to the portrayal of the physical basis of the properties of a homogeneous membrane, the mixed equivalent circuit can be misleading. This is particularly significant because this same circuit can also be used to depict a mosaic membrane, in which case the circuit gives a realistic pictorialization of the physical origin of the membrane properties. It is hoped that our analysis will be of aid to workers in electrophysiology who make use of equivalent circuit terminology in discussing the behavior of the plasma membrane. PMID:19431324

  18. An efficient current-based logic cell model for crosstalk delay analysis

    NASA Astrophysics Data System (ADS)

    Nazarian, Shahin; Das, Debasish

    2013-04-01

    Logic cell modelling is an important component in the analysis and design of CMOS integrated circuits, mostly due to nonlinear behaviour of CMOS cells with respect to the voltage signal at their input and output pins. A current-based model for CMOS logic cells is presented, which can be used for effective crosstalk noise and delta delay analysis in CMOS VLSI circuits. Existing current source models are expensive and need a new set of Spice-based characterisation, which is not compatible with typical EDA tools. In this article we present Imodel, a simple nonlinear logic cell model that can be derived from the typical cell libraries such as NLDM, with accuracy much higher than NLDM-based cell delay models. In fact, our experiments show an average error of 3% compared to Spice. This level of accuracy comes with a maximum runtime penalty of 19% compared to NLDM-based cell delay models on medium-sized industrial designs.

  19. Wavelet analysis and HHG in nanorings: their applications in logic gates and memory mass devices

    NASA Astrophysics Data System (ADS)

    Cricchio, Dario; Fiordilino, Emilio

    2016-01-01

    We study the application of one nanoring driven by a laser field in different states of polarization in logic circuits. In particular we show that assigning Boolean values to different states of the incident laser field and to the emitted signals, we can create logic gates such as OR, XOR and AND. We also show the possibility of making logic circuits such as half-adder and full-adder using one and two nanorings respectively. Using two nanorings we made the Toffoli gate. Finally we use the final angular momentum acquired by the electron to store information and hence show the possibility of using an array of nanorings as a mass memory device.

  20. An unsolved electric circuit: a common misconception

    NASA Astrophysics Data System (ADS)

    Sree Harsha, N. R.; Sreedevi, A.; Prakash, Anupama

    2015-08-01

    Despite a number of theories in circuit analysis, little is known about the behaviour of ideal equal voltage sources in parallel, connected across a resistive load. We neither have any theory that can predict the voltage source that provides the load current, nor is there any method to test it experimentally. In a series of experiments performed on 100 students, it was found that this circuit is often misunderstood on symmetry grounds. This paper addresses this issue by showing how different circuit analysis methods fail to provide an answer.

  1. Memristive Sisyphus circuit for clock signal generation.

    PubMed

    Pershin, Yuriy V; Shevchenko, Sergey N; Nori, Franco

    2016-05-20

    Frequency generators are widely used in electronics. Here, we report the design and experimental realization of a memristive frequency generator employing a unique combination of only digital logic gates, a single-supply voltage and a realistic thresholdtype memristive device. In our circuit, the oscillator frequency and duty cycle are defined by the switching characteristics of the memristive device and external resistors. We demonstrate the circuit operation both experimentally, using a memristor emulator, and theoretically, using a model memristive device with threshold. Importantly, nanoscale realizations of memristive devices offer small-size alternatives to conventional quartz-based oscillators. In addition, the suggested approach can be used for mimicking some cyclic (Sisyphus) processes in nature, such as "dripping ants" or drops from leaky faucets.

  2. Synthesis of higher order nonlinear circuit elements

    NASA Astrophysics Data System (ADS)

    Chua, L. O.; Szeto, E. W.

    1984-02-01

    Higher and mixed-order n-port circuit elements were introduced recently to provide a logically complete formulation for nonlinear circuit theory. In this paper, higher order mutators are defined and used to synthesize these elements. The class of all higher order mutators is shown to form a group under cascade interconnections. Each mutator is realized using only linear capacitors, linear inductors and linear controlled sources. An upper bound on each type of element needed to realize a mutator is also given. Each higher or mixed-order n-port element is realized by cascading approprimate mutators across each port of a nonlinear n-port resistor. The main theorem shows that any higher or mixed-order nonlinear n-port element with a constitutive relation defined on a compact set can be realized using linear capacitors, inductors, and controlled sources, and 2-terminal nonlinear resistors.

  3. Memristive Sisyphus circuit for clock signal generation

    PubMed Central

    Pershin, Yuriy V.; Shevchenko, Sergey N.; Nori, Franco

    2016-01-01

    Frequency generators are widely used in electronics. Here, we report the design and experimental realization of a memristive frequency generator employing a unique combination of only digital logic gates, a single-supply voltage and a realistic thresholdtype memristive device. In our circuit, the oscillator frequency and duty cycle are defined by the switching characteristics of the memristive device and external resistors. We demonstrate the circuit operation both experimentally, using a memristor emulator, and theoretically, using a model memristive device with threshold. Importantly, nanoscale realizations of memristive devices offer small-size alternatives to conventional quartz-based oscillators. In addition, the suggested approach can be used for mimicking some cyclic (Sisyphus) processes in nature, such as “dripping ants” or drops from leaky faucets. PMID:27199243

  4. Memristive Sisyphus circuit for clock signal generation

    NASA Astrophysics Data System (ADS)

    Pershin, Yuriy V.; Shevchenko, Sergey N.; Nori, Franco

    2016-05-01

    Frequency generators are widely used in electronics. Here, we report the design and experimental realization of a memristive frequency generator employing a unique combination of only digital logic gates, a single-supply voltage and a realistic thresholdtype memristive device. In our circuit, the oscillator frequency and duty cycle are defined by the switching characteristics of the memristive device and external resistors. We demonstrate the circuit operation both experimentally, using a memristor emulator, and theoretically, using a model memristive device with threshold. Importantly, nanoscale realizations of memristive devices offer small-size alternatives to conventional quartz-based oscillators. In addition, the suggested approach can be used for mimicking some cyclic (Sisyphus) processes in nature, such as “dripping ants” or drops from leaky faucets.

  5. TRIAC/SCR proportional control circuit

    DOEpatents

    Hughes, W.J.

    1999-04-06

    A power controller device is disclosed which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the ``reset`` input of a R-S flip flop, while an ``0`` crossing detector controls the ``set`` input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the ``reset`` and ``set`` inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations. 9 figs.

  6. TRIAC/SCR proportional control circuit

    DOEpatents

    Hughes, Wallace J.

    1999-01-01

    A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the "reset" input of a R-S flip flop, while an "0" crossing detector controls the "set" input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the "reset" and "set" inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.

  7. Chain Of Test Contacts For Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Lieneweg, Udo

    1989-01-01

    Test structure forms chain of "cross" contacts fabricated together with large-scale integrated circuits. If necessary, number of such chains incorporated at suitable locations in integrated-circuit wafer for determination of fabrication yield of contacts. In new structure, resistances of individual contacts determined: In addition to making it possible to identify local defects, enables generation of statistical distributions of contact resistances for prediction of "parametric" contact yield of fabrication process.

  8. Equivalent Circuit Modeling of Hysteresis Motors

    SciTech Connect

    Nitao, J J; Scharlemann, E T; Kirkendall, B A

    2009-08-31

    We performed a literature review and found that many equivalent circuit models of hysteresis motors in use today are incorrect. The model by Miyairi and Kataoka (1965) is the correct one. We extended the model by transforming it to quadrature coordinates, amenable to circuit or digital simulation. 'Hunting' is an oscillatory phenomenon often observed in hysteresis motors. While several works have attempted to model the phenomenon with some partial success, we present a new complete model that predicts hunting from first principles.

  9. Design structure for in-system redundant array repair in integrated circuits

    DOEpatents

    Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

    2008-11-25

    A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

  10. Application of linear logic to simulation

    NASA Astrophysics Data System (ADS)

    Clarke, Thomas L.

    1998-08-01

    Linear logic, since its introduction by Girard in 1987 has proven expressive and powerful. Linear logic has provided natural encodings of Turing machines, Petri nets and other computational models. Linear logic is also capable of naturally modeling resource dependent aspects of reasoning. The distinguishing characteristic of linear logic is that it accounts for resources; two instances of the same variable are considered differently from a single instance. Linear logic thus must obey a form of the linear superposition principle. A proportion can be reasoned with only once, unless a special operator is applied. Informally, linear logic distinguishes two kinds of conjunction, two kinds of disjunction, and also introduces a modal storage operator that explicitly indicates propositions that can be reused. This paper discuses the application of linear logic to simulation. A wide variety of logics have been developed; in addition to classical logic, there are fuzzy logics, affine logics, quantum logics, etc. All of these have found application in simulations of one sort or another. The special characteristics of linear logic and its benefits for simulation will be discussed. Of particular interest is a connection that can be made between linear logic and simulated dynamics by using the concept of Lie algebras and Lie groups. Lie groups provide the connection between the exponential modal storage operators of linear logic and the eigen functions of dynamic differential operators. Particularly suggestive are possible relations between complexity result for linear logic and non-computability results for dynamical systems.

  11. Nanowire spintronics for storage class memories and logic.

    PubMed

    Hrkac, G; Dean, J; Allwood, D A

    2011-08-13

    Patterned magnetic nanowires are extremely well suited for data storage and logic devices. They offer non-volatile storage, fast switching times, efficient operation and a bistable magnetic configuration that are convenient for representing digital information. Key to this is the high level of control that is possible over the position and behaviour of domain walls (DWs) in magnetic nanowires. Magnetic random access memory based on the propagation of DWs in nanowires has been released commercially, while more dynamic shift register memory and logic circuits have been demonstrated. Here, we discuss the present standing of this technology as well as reviewing some of the basic DW effects that have been observed and the underlying physics of DW motion. We also discuss the future direction of magnetic nanowire technology to look at possible developments, hurdles to overcome and what nanowire devices may appear in the future, both in classical information technology and beyond into quantum computation and biology.

  12. Novel latch for adiabatic quantum-flux-parametron logic

    SciTech Connect

    Takeuchi, Naoki Yamanashi, Yuki; Yoshikawa, Nobuyuki; Ortlepp, Thomas

    2014-03-14

    We herein propose the quantum-flux-latch (QFL) as a novel latch for adiabatic quantum-flux-parametron (AQFP) logic. A QFL is very compact and compatible with AQFP logic gates and can be read out in one clock cycle. Simulation results revealed that the QFL operates at 5 GHz with wide parameter margins of more than ±22%. The calculated energy dissipation was only ∼0.1 aJ/bit, which yields a small energy delay product of 20 aJ·ps. We also designed shift registers using QFLs to demonstrate more complex circuits with QFLs. Finally, we experimentally demonstrated correct operations of the QFL and a 1-bit shift register (a D flip-flop)

  13. Source circuit design considerations

    NASA Technical Reports Server (NTRS)

    Noel, G. T.

    1983-01-01

    The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

  14. Fuzzy diagnostic system for oleo-pneumatic drive mechanism of high-voltage circuit breakers.

    PubMed

    Nicolau, Viorel

    2013-01-01

    Many oil-based high-voltage circuit breakers are still in use in national power networks of developing countries, like those in Eastern Europe. Changing these breakers with new more reliable ones is not an easy task, due to their implementing costs. The acting device, called oleo-pneumatic mechanism (MOP), presents the highest fault rate from all components of circuit breaker. Therefore, online predictive diagnosis and early detection of the MOP fault tendencies are very important for their good functioning state. In this paper, fuzzy logic approach is used for the diagnosis of MOP-type drive mechanisms. Expert rules are generated to estimate the MOP functioning state, and a fuzzy system is proposed for predictive diagnosis. The fuzzy inputs give information about the number of starts and time of functioning per hour, in terms of short-term components, and their mean values. Several fuzzy systems were generated, using different sets of membership functions and rule bases, and their output performances are studied. Simulation results are presented based on an input data set, which contains hourly records of operating points for a time horizon of five years. The fuzzy systems work well, making an early detection of the MOP fault tendencies.

  15. A four-colour optical detector circuit

    NASA Astrophysics Data System (ADS)

    Yohannes, Israel; Assaad, Maher

    2013-02-01

    In this article, a new architecture for a four-colour optical detector circuit is presented. The proposed detector uses a photodiode as its basic light transducing element and a mixed signal readout circuit for signal processing and decision making. The readout circuit requires only two comparators, two multiplexers and a few logic gates to produce a digital 4 bit output that represents the right colour detected. The proposed detector is advantageous because the number of required components is fixed even if the number of detected colours is increased. The feature of having a fixed number of elements while increasing the number of detected colours is important especially in component count (i.e. low cost) and low power consumption. The proposed detector can be used as an autonomous and portable real-time pH monitoring applications. The objective of this article is to present a validation of a novel four colour sensor architecture using simulation and experiment as a proof of concept for a future implementation as a CMOS integrated circuit using the Austria Microsystems 350 nm technology.

  16. Applying analog integrated circuits for HERO protection

    NASA Technical Reports Server (NTRS)

    Willis, Kenneth E.; Blachowski, Thomas J.

    1994-01-01

    One of the most efficient methods for protecting electro-explosive devices (EED's) from HERO and ESD is to shield the EED in a conducting shell (Faraday cage). Electrical energy is transferred to the bridge by means of a magnetic coupling which passes through a portion of the conducting shell that is made from a magnetically permeable but electrically conducting material. This technique was perfected by ML Aviation, a U.K. company, in the early 80's, and was called a Radio Frequency Attenuation Connector (RFAC). It is now in wide use in the U.K. Previously, the disadvantage of RFAC over more conventional methods was its relatively high cost, largely driven by a thick film hybrid circuit used to switch the primary of the transformer. Recently, through a licensing agreement, this technology has been transferred to the U.S. and significant cost reductions and performance improvements have been achieved by the introduction of analog integrated circuits. An integrated circuit performs the following functions: (1) Chops the DC input to a signal suitable for driving the primary of the transformer; (2) Verifies the input voltage is above a threshold; (3) Verifies the input voltage is valid for a pre set time before enabling the device; (4) Provides thermal protection of the circuit; and (5) Provides an external input for independent logic level enabling of the power transfer mechanism. This paper describes the new RFAC product and its applications.

  17. Multi-input distributed classifiers for synthetic genetic circuits.

    PubMed

    Kanakov, Oleg; Kotelnikov, Roman; Alsaedi, Ahmed; Tsimring, Lev; Huerta, Ramón; Zaikin, Alexey; Ivanchenko, Mikhail

    2015-01-01

    For practical construction of complex synthetic genetic networks able to perform elaborate functions it is important to have a pool of relatively simple modules with different functionality which can be compounded together. To complement engineering of very different existing synthetic genetic devices such as switches, oscillators or logical gates, we propose and develop here a design of synthetic multi-input classifier based on a recently introduced distributed classifier concept. A heterogeneous population of cells acts as a single classifier, whose output is obtained by summarizing the outputs of individual cells. The learning ability is achieved by pruning the population, instead of tuning parameters of an individual cell. The present paper is focused on evaluating two possible schemes of multi-input gene classifier circuits. We demonstrate their suitability for implementing a multi-input distributed classifier capable of separating data which are inseparable for single-input classifiers, and characterize performance of the classifiers by analytical and numerical results. The simpler scheme implements a linear classifier in a single cell and is targeted at separable classification problems with simple class borders. A hard learning strategy is used to train a distributed classifier by removing from the population any cell answering incorrectly to at least one training example. The other scheme implements a circuit with a bell-shaped response in a single cell to allow potentially arbitrary shape of the classification border in the input space of a distributed classifier. Inseparable classification problems are addressed using soft learning strategy, characterized by probabilistic decision to keep or discard a cell at each training iteration. We expect that our classifier design contributes to the development of robust and predictable synthetic biosensors, which have the potential to affect applications in a lot of fields, including that of medicine and industry.

  18. Quantitative transformation for implementation of adder circuits in physical systems.

    PubMed

    Jones, Jeff; Whiting, James G H; Adamatzky, Andrew

    2015-08-01

    Computing devices are composed of spatial arrangements of simple fundamental logic gates. These gates may be combined to form more complex adding circuits and, ultimately, complete computer systems. Implementing classical adding circuits using unconventional, or even living substrates such as slime mould Physarum polycephalum, is made difficult and often impractical by the challenges of branching fan-out of inputs and regions where circuit lines must cross without interference. In this report we explore whether it is possible to avoid spatial propagation, branching and crossing completely in the design of adding circuits. We analyse the input and output patterns of a single-bit full adder circuit. A simple quantitative transformation of the input patterns which considers the total number of bits in the input string allows us to map the respective input combinations to the correct outputs patterns of the full adder circuit, reducing the circuit combinations from a 2:1 mapping to a 1:1 mapping. The mapping of inputs to outputs also shows an incremental linear progression, suggesting its implementation in a range of physical systems. We demonstrate an example implementation, first in simulation, inspired by self-oscillatory dynamics of the acellular slime mould P. polycephalum. We then assess the potential implementation using plasmodium of slime mould itself. This simple transformation may enrich the potential for using unconventional computing substrates to implement digital circuits.

  19. Quantitative transformation for implementation of adder circuits in physical systems.

    PubMed

    Jones, Jeff; Whiting, James G H; Adamatzky, Andrew

    2015-08-01

    Computing devices are composed of spatial arrangements of simple fundamental logic gates. These gates may be combined to form more complex adding circuits and, ultimately, complete computer systems. Implementing classical adding circuits using unconventional, or even living substrates such as slime mould Physarum polycephalum, is made difficult and often impractical by the challenges of branching fan-out of inputs and regions where circuit lines must cross without interference. In this report we explore whether it is possible to avoid spatial propagation, branching and crossing completely in the design of adding circuits. We analyse the input and output patterns of a single-bit full adder circuit. A simple quantitative transformation of the input patterns which considers the total number of bits in the input string allows us to map the respective input combinations to the correct outputs patterns of the full adder circuit, reducing the circuit combinations from a 2:1 mapping to a 1:1 mapping. The mapping of inputs to outputs also shows an incremental linear progression, suggesting its implementation in a range of physical systems. We demonstrate an example implementation, first in simulation, inspired by self-oscillatory dynamics of the acellular slime mould P. polycephalum. We then assess the potential implementation using plasmodium of slime mould itself. This simple transformation may enrich the potential for using unconventional computing substrates to implement digital circuits. PMID:26007225

  20. Heuristics and criteria for constructing logical patterns in data

    NASA Astrophysics Data System (ADS)

    Antamoshkin, A. N.; Masich, I. S.; Kuzmich, R. I.

    2015-10-01

    The article considers various optimization models for constructing patterns in the method of logical analysis of data. Application techniques of the proposed models are specified and comparison of their classification against the accuracy on the task of predicting complications of myocardial infarction is provided

  1. A Rhizobium radiobacter Histidine Kinase Can Employ Both Boolean AND and OR Logic Gates to Initiate Pathogenesis.

    PubMed

    Fang, Fang; Lin, Yi-Han; Pierce, B Daniel; Lynn, David G

    2015-10-12

    The molecular logic gates that regulate gene circuits are necessarily intricate and highly regulated, particularly in the critical commitments necessary for pathogenesis. We now report simple AND and OR logic gates to be accessible within a single protein receptor. Pathogenesis by the bacterium Rhizobium radiobacter is mediated by a single histidine kinase, VirA, which processes multiple small molecule host signals (phenol and sugar). Mutagenesis analyses converged on a single signal integration node, and finer functional analyses revealed that a single residue could switch VirA from a functional AND logic gate to an OR gate where each of two signals activate independently. Host range preferences among natural strains of R. radiobacter correlate with these gate logic strategies. Although the precise mechanism for the signal integration node requires further analyses, long-range signal transmission through this histidine kinase can now be exploited for synthetic signaling circuits.

  2. Pausing and activating thread state upon pin assertion by external logic monitoring polling loop exit time condition

    SciTech Connect

    Chen, Dong; Giampapa, Mark; Heidelberger, Philip; Ohmacht, Martin; Satterfield, David L; Steinmacher-Burow, Burkhard; Sugavanam, Krishnan

    2013-05-21

    A system and method for enhancing performance of a computer which includes a computer system including a data storage device. The computer system includes a program stored in the data storage device and steps of the program are executed by a processer. The processor processes instructions from the program. A wait state in the processor waits for receiving specified data. A thread in the processor has a pause state wherein the processor waits for specified data. A pin in the processor initiates a return to an active state from the pause state for the thread. A logic circuit is external to the processor, and the logic circuit is configured to detect a specified condition. The pin initiates a return to the active state of the thread when the specified condition is detected using the logic circuit.

  3. Regenerative feedback resonant circuit

    DOEpatents

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  4. Remote reset circuit

    DOEpatents

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  5. Remote reset circuit

    DOEpatents

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  6. Construction of a fuzzy and Boolean logic gates based on DNA.

    PubMed

    Zadegan, Reza M; Jepsen, Mette D E; Hildebrandt, Lasse L; Birkedal, Victoria; Kjems, Jørgen

    2015-04-17

    Logic gates are devices that can perform logical operations by transforming a set of inputs into a predictable single detectable output. The hybridization properties, structure, and function of nucleic acids can be used to make DNA-based logic gates. These devices are important modules in molecular computing and biosensing. The ideal logic gate system should provide a wide selection of logical operations, and be integrable in multiple copies into more complex structures. Here we show the successful construction of a small DNA-based logic gate complex that produces fluorescent outputs corresponding to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive DNA locks on one DNA origami box structure enabled fuzzy logical operation that allows biosensing of complex molecular signals. Integrating logic gates with DNA origami systems opens a vast avenue to applications in the fields of nanomedicine for diagnostics and therapeutics.

  7. Partitioning structural VHDL circuits for parallel execution on hypercubes

    NASA Astrophysics Data System (ADS)

    Kapp, Kevin L.

    1993-12-01

    Distributing simulations among multiple processors is one approach to reducing VHDL simulation time for large VLSI circuit designs. However, parallel simulation introduces the problem of how to partition the logic gates and system behaviors among the available processors in order to obtain maximum speedup. This research investigates deliberate partitioning algorithms that account for the complex inter-dependency structure of the circuit behaviors. Once an initial partition has been obtained, a border annealing algorithm is used to iteratively improve the partition. In addition, methods of measuring the cost of a partition and relating it to the resulting simulation performance are investigated. Structural circuits ranging from one thousand to over four thousand behaviors are simulated. The deliberate partitions consistently provided superior speedup to a random distribution of the circuit behaviors.

  8. Elements configuration of the open lead test circuit

    NASA Astrophysics Data System (ADS)

    Fukuzaki, Yumi; Ono, Akira

    2016-07-01

    In the field of electronics, small electronic devices are widely utilized because they are easy to carry. The devices have various functions by user's request. Therefore, the lead's pitch or the ball's pitch have been narrowed and high-density printed circuit board has been used in the devices. Use of the ICs which have narrow lead pitch makes normal connection difficult. When logic circuits in the devices are fabricated with the state-of-the-art technology, some faults have occurred more frequently. It can be divided into types of open faults and short faults. We have proposed a new test method using a test circuit in the past. This paper propose elements configuration of the test circuit.

  9. Improved Classical Simulation of Quantum Circuits Dominated by Clifford Gates

    NASA Astrophysics Data System (ADS)

    Bravyi, Sergey; Gosset, David

    2016-06-01

    We present a new algorithm for classical simulation of quantum circuits over the Clifford+T gate set. The runtime of the algorithm is polynomial in the number of qubits and the number of Clifford gates in the circuit but exponential in the number of T gates. The exponential scaling is sufficiently mild that the algorithm can be used in practice to simulate medium-sized quantum circuits dominated by Clifford gates. The first demonstrations of fault-tolerant quantum circuits based on 2D topological codes are likely to be dominated by Clifford gates due to a high implementation cost associated with logical T gates. Thus our algorithm may serve as a verification tool for near-term quantum computers which cannot in practice be simulated by other means. To demonstrate the power of the new method, we performed a classical simulation of a hidden shift quantum algorithm with 40 qubits, a few hundred Clifford gates, and nearly 50 T gates.

  10. Multiple logic functions from extended blockade region in a silicon quantum-dot transistor

    SciTech Connect

    Lee, Youngmin; Lee, Sejoon Im, Hyunsik; Hiramoto, Toshiro

    2015-02-14

    We demonstrate multiple logic-functions at room temperature on a unit device of the Si single electron transistor (SET). Owing to the formation of the multi-dot system, the device exhibits the enhanced Coulomb blockade characteristics (e.g., large peak-to-valley current ratio ∼200) that can improve the reliability of the SET-based logic circuits. The SET displays a unique feature useful for the logic applications; namely, the Coulomb oscillation peaks are systematically shifted by changing either of only the gate or the drain voltage. This enables the SET to act as a multi-functional one-transistor logic gate with AND, OR, NAND, and XOR functions.

  11. New configuration of photonic logic gates based on single hexagonal-lattice photonic crystal ring resonator

    NASA Astrophysics Data System (ADS)

    Jiang, JunZhen; Wang, Junqin; Xu, Xiaofu; Li, Junjun; Chen, Xiyao; Qiu, Yishen; Qiang, Zexuan

    2010-10-01

    We report a new configuration of logic gates based on single hexagonal-lattice PCRR composed of cylindrical silicon rods in air. Two types of inner ring including regular hexagonal and circular are numerically discussed by using 2D finite-difference time-domain (FDTD) technique. The impact of surrounding periods and scatterers like size and relative phase at each input port was investigated. The logic '0' and '1' of hexagonal ring can be defined as less than 17% and greater than 85%, respectively, much better than early reported square-lattice results. The simulation results also proved that photonic logic gates based on this new single PCRR can really function as NOT and NOR gates, respectively. These findings make PCRRs potential applications for all-optical logic circuits and ultra-compact high density photonic integration.

  12. Block QCA Fault-Tolerant Logic Gates

    NASA Technical Reports Server (NTRS)

    Firjany, Amir; Toomarian, Nikzad; Modarres, Katayoon

    2003-01-01

    Suitably patterned arrays (blocks) of quantum-dot cellular automata (QCA) have been proposed as fault-tolerant universal logic gates. These block QCA gates could be used to realize the potential of QCA for further miniaturization, reduction of power consumption, increase in switching speed, and increased degree of integration of very-large-scale integrated (VLSI) electronic circuits. The limitations of conventional VLSI circuitry, the basic principle of operation of QCA, and the potential advantages of QCA-based VLSI circuitry were described in several NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35; and Hybrid VLSI/QCA Architecture for Computing FFTs (NPO-20923), which follows this article. To recapitulate the principle of operation (greatly oversimplified because of the limitation on space available for this article): A quantum-dot cellular automata contains four quantum dots positioned at or between the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantummechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Heretofore, researchers have recognized two major obstacles to realization of QCA

  13. Fast Overcurrent Tripping Circuit

    NASA Technical Reports Server (NTRS)

    Sullender, Craig C.; Davies, Bryan L.; Osborn, Stephen H.

    1993-01-01

    Fast overcurrent tripping circuit designed for incorporation into power metal oxide/semiconductor field-effect transistor (MOSFET) switching circuit. Serves as fast electronic circuit breaker by sensing voltage across MOSFET's during conduction and switching MOSFET's off within 1 microsecond after voltage exceeds reference value corresponding to tripping current. Acts more quickly than Hall-effect current sensor and, in comparison with shunt current-measuring circuits, smaller and consumes less power. Also ignores initial transient overcurrents during first 5 microseconds of switching cycle.

  14. Printed circuit board industry.

    PubMed

    LaDou, Joseph

    2006-05-01

    The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts. PMID:16580876

  15. Target-triggered cascade recycling amplification for label-free detection of microRNA and molecular logic operations.

    PubMed

    Bi, Sai; Ye, Jiayan; Dong, Ying; Li, Haoting; Cao, Wei

    2016-01-01

    A cascade recycling amplification (CRA) that implements cascade logic circuits with feedback amplification function is developed for label-free chemiluminescence detection of microRNA-122 with an ultrahigh sensitivity of 0.82 fM and excellent specificity, which is applied to construct a series of molecular-scale two-input logic gates by using microRNAs as inputs and CRA products as outputs.

  16. Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

    NASA Astrophysics Data System (ADS)

    Chang, S. S. L.

    State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

  17. Logic, probability, and human reasoning.

    PubMed

    Johnson-Laird, P N; Khemlani, Sangeet S; Goodwin, Geoffrey P

    2015-04-01

    This review addresses the long-standing puzzle of how logic and probability fit together in human reasoning. Many cognitive scientists argue that conventional logic cannot underlie deductions, because it never requires valid conclusions to be withdrawn - not even if they are false; it treats conditional assertions implausibly; and it yields many vapid, although valid, conclusions. A new paradigm of probability logic allows conclusions to be withdrawn and treats conditionals more plausibly, although it does not address the problem of vapidity. The theory of mental models solves all of these problems. It explains how people reason about probabilities and postulates that the machinery for reasoning is itself probabilistic. Recent investigations accordingly suggest a way to integrate probability and deduction.

  18. Fuzzy logic particle tracking velocimetry

    NASA Technical Reports Server (NTRS)

    Wernet, Mark P.

    1993-01-01

    Fuzzy logic has proven to be a simple and robust method for process control. Instead of requiring a complex model of the system, a user defined rule base is used to control the process. In this paper the principles of fuzzy logic control are applied to Particle Tracking Velocimetry (PTV). Two frames of digitally recorded, single exposure particle imagery are used as input. The fuzzy processor uses the local particle displacement information to determine the correct particle tracks. Fuzzy PTV is an improvement over traditional PTV techniques which typically require a sequence (greater than 2) of image frames for accurately tracking particles. The fuzzy processor executes in software on a PC without the use of specialized array or fuzzy logic processors. A pair of sample input images with roughly 300 particle images each, results in more than 200 velocity vectors in under 8 seconds of processing time.

  19. A Logical Approach to Entanglement

    NASA Astrophysics Data System (ADS)

    Das, Abhishek

    2016-05-01

    In this paper we innovate a logical approach to develop an intuition regarding the phenomenon of quantum entanglement. In the vein of the logic introduced we substantiate that particles that were entangled in the past will be entangled in perpetuity and thereby abide a rule that restricts them to act otherwise. We also introduce a game and by virtue of the concept of Nash equilibrium we have been able to show that entangled particles will mutually correspond to an experiment that is performed on any one of the particle.

  20. The semantics of fuzzy logic

    NASA Technical Reports Server (NTRS)

    Ruspini, Enrique H.

    1991-01-01

    Summarized here are the results of recent research on the conceptual foundations of fuzzy logic. The focus is primarily on the principle characteristics of a model that quantifies resemblance between possible worlds by means of a similarity function that assigns a number between 0 and 1 to every pair of possible worlds. Introduction of such a function permits one to interpret the major constructs and methods of fuzzy logic: conditional and unconditional possibility and necessity distributions and the generalized modus ponens of Zadeh on the basis of related metric relationships between subsets of possible worlds.

  1. A Logical Approach to Entanglement

    NASA Astrophysics Data System (ADS)

    Das, Abhishek

    2016-10-01

    In this paper we innovate a logical approach to develop an intuition regarding the phenomenon of quantum entanglement. In the vein of the logic introduced we substantiate that particles that were entangled in the past will be entangled in perpetuity and thereby abide a rule that restricts them to act otherwise. We also introduce a game and by virtue of the concept of Nash equilibrium we have been able to show that entangled particles will mutually correspond to an experiment that is performed on any one of the particle.

  2. Logic programming and metadata specifications

    NASA Technical Reports Server (NTRS)

    Lopez, Antonio M., Jr.; Saacks, Marguerite E.

    1992-01-01

    Artificial intelligence (AI) ideas and techniques are critical to the development of intelligent information systems that will be used to collect, manipulate, and retrieve the vast amounts of space data produced by 'Missions to Planet Earth.' Natural language processing, inference, and expert systems are at the core of this space application of AI. This paper presents logic programming as an AI tool that can support inference (the ability to draw conclusions from a set of complicated and interrelated facts). It reports on the use of logic programming in the study of metadata specifications for a small problem domain of airborne sensors, and the dataset characteristics and pointers that are needed for data access.

  3. Add/Compare/Select Circuit For Rapid Decoding

    NASA Technical Reports Server (NTRS)

    Budinger, James M.; Becker, Neal D.; Johnson, Peter N.

    1993-01-01

    Prototype decoding system operates at 200 Mb/s. ACS (add/compare/select) gate array is highly integrated emitter-coupled-logic circuit implementing arithmetic operations essential to Viterbi decoding of convolutionally encoded data signals. Principal advantage of circuit is speed. Operates as single unit performing eight additions and finds minimum of eight sums, or operates as two independent units, each performing four additions and finding minimum of four sums. Flexibility enables application to variety of different codes. Includes built-in self-testing circuitry, enabling unit to be tested at full speed with help of only simple test fixture.

  4. GaAs VLSI technology and circuit elements for DSP

    NASA Astrophysics Data System (ADS)

    Mikkelson, James M.

    1990-10-01

    . For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

  5. A Virtual Circuits Lab

    ERIC Educational Resources Information Center

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  6. Computer circuit card puller

    NASA Technical Reports Server (NTRS)

    Sawyer, R. V.; Szuwalski, B. (Inventor)

    1981-01-01

    The invention generally relates to hand tools, and more particularly to an improved device for facilitating removal of printed circuit cards from a card rack characterized by longitudinal side rails arranged in a mutually spaced parallelism and a plurality of printed circuit cards extended between the rails of the rack.

  7. Completing a Simple Circuit.

    ERIC Educational Resources Information Center

    Slater, Timothy F.; Adams, Jeffrey P.; Brown, Thomas R.

    2000-01-01

    Students have problems successfully arranging an electric circuit to make the bulb produce light. Investigates the percentage of students able to complete a circuit with a given apparatus, and the effects of prior experience on student success. Recommends hands-on activities at the elementary and secondary school levels. (Contains 14 references.)…

  8. Understanding Simple Circuits

    ERIC Educational Resources Information Center

    Mant, Jenny; Wilson, Helen

    2007-01-01

    Many envisage electricity as the "power" to "do things." They know that electricity needs "circuits" and that something is "flowing" in the circuits, but they are not sure what or why. Words such as "current" and "voltage" are part of electricity but their meaning, and the difference between them, is not always clear. In this article, the authors…

  9. Interconnections for fluidic circuits

    NASA Technical Reports Server (NTRS)

    Mangion, C.

    1972-01-01

    Circuit elements are grouped on functional basis in rectangular two-dimensional planar arrays or modules. Another interconnection method brings all connections out to module edge. For smaller fluidic circuits, manifold and interconnections are fabricated as single blocks. Advantages of methods are given.

  10. Liquid detection circuit

    DOEpatents

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  11. Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

    NASA Astrophysics Data System (ADS)

    Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

    2016-07-01

    Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

  12. Designing Experiments to Discriminate Families of Logic Models

    PubMed Central

    Videla, Santiago; Konokotina, Irina; Alexopoulos, Leonidas G.; Saez-Rodriguez, Julio; Schaub, Torsten; Siegel, Anne; Guziolowski, Carito

    2015-01-01

    Logic models of signaling pathways are a promising way of building effective in silico functional models of a cell, in particular of signaling pathways. The automated learning of Boolean logic models describing signaling pathways can be achieved by training to phosphoproteomics data, which is particularly useful if it is measured upon different combinations of perturbations in a high-throughput fashion. However, in practice, the number and type of allowed perturbations are not exhaustive. Moreover, experimental data are unavoidably subjected to noise. As a result, the learning process results in a family of feasible logical networks rather than in a single model. This family is composed of logic models implementing different internal wirings for the system and therefore the predictions of experiments from this family may present a significant level of variability, and hence uncertainty. In this paper, we introduce a method based on Answer Set Programming to propose an optimal experimental design that aims to narrow down the variability (in terms of input–output behaviors) within families of logical models learned from experimental data. We study how the fitness with respect to the data can be improved after an optimal selection of signaling perturbations and how we learn optimal logic models with minimal number of experiments. The methods are applied on signaling pathways in human liver cells and phosphoproteomics experimental data. Using 25% of the experiments, we obtained logical models with fitness scores (mean square error) 15% close to the ones obtained using all experiments, illustrating the impact that our approach can have on the design of experiments for efficient model calibration. PMID:26389116

  13. Designing Experiments to Discriminate Families of Logic Models.

    PubMed

    Videla, Santiago; Konokotina, Irina; Alexopoulos, Leonidas G; Saez-Rodriguez, Julio; Schaub, Torsten; Siegel, Anne; Guziolowski, Carito

    2015-01-01

    Logic models of signaling pathways are a promising way of building effective in silico functional models of a cell, in particular of signaling pathways. The automated learning of Boolean logic models describing signaling pathways can be achieved by training to phosphoproteomics data, which is particularly useful if it is measured upon different combinations of perturbations in a high-throughput fashion. However, in practice, the number and type of allowed perturbations are not exhaustive. Moreover, experimental data are unavoidably subjected to noise. As a result, the learning process results in a family of feasible logical networks rather than in a single model. This family is composed of logic models implementing different internal wirings for the system and therefore the predictions of experiments from this family may present a significant level of variability, and hence uncertainty. In this paper, we introduce a method based on Answer Set Programming to propose an optimal experimental design that aims to narrow down the variability (in terms of input-output behaviors) within families of logical models learned from experimental data. We study how the fitness with respect to the data can be improved after an optimal selection of signaling perturbations and how we learn optimal logic models with minimal number of experiments. The methods are applied on signaling pathways in human liver cells and phosphoproteomics experimental data. Using 25% of the experiments, we obtained logical models with fitness scores (mean square error) 15% close to the ones obtained using all experiments, illustrating the impact that our approach can have on the design of experiments for efficient model calibration.

  14. Brain Circuits Encoding Reward from Pain Relief

    PubMed Central

    Navratilova, Edita; Atcherley, Christopher; Porreca, Frank

    2015-01-01

    Relief from pain in humans is rewarding and pleasurable. Primary rewards, or reward predictive cues, are encoded in brain reward/motivational circuits. While considerable advances have been made in our understanding of reward circuits underlying positive reinforcement, less is known about the circuits underlying the hedonic and reinforcing actions of pain relief. We review findings from electrophysiological, neuroimaging and behavioral studies supporting the concept that the rewarding effect of pain relief requires opioid signaling in the anterior cingulate cortex, activation of midbrain dopamine neurons and release of dopamine in the nucleus accumbens. Understanding of circuits that govern the reward of pain relief may allow the discovery of more effective and satisfying therapies for patients with acute and chronic pain. PMID:26603560

  15. Electronic textiles: A logical step

    NASA Astrophysics Data System (ADS)

    de Rossi, Danilo

    2007-05-01

    The integration of electronics and clothing promises a variety of new technologies, but constructing electronic circuits on fabrics is complex. Coating fibres to create electrodes and forming transistors at their crossing points offers an elegant solution.

  16. Reasoning about logical propositions and success in science

    NASA Astrophysics Data System (ADS)

    Piburn, Michael D.

    1990-12-01

    Students display a number of misconceptions when asked to reason about logical propositions. Rather than being random, these misconceptions are stereotypic, and relate to age, ability, and success in science. The grades in science achieved by tenth-grade general science students from two parochial single-sex schools in Australia correlated with their scores on the Propositional Logic Test. The students' ability level was consistently related to the pattern of errors they committed on that measure. Mean scores were lowest on a subtest of ability to use the biconditional and implication, higher on the disjunction, and highest on the conjunction. Success in science was predicted most strongly by the disjunction and biconditional subtests. Knowledge of the way in which a person reasons about logical propositions provides additional insights into the transformations information is subjected to as it is integrated into mental schemata.

  17. Towards woven logic from organic electronic fibres

    NASA Astrophysics Data System (ADS)

    Hamedi, Mahiar; Forchheimer, Robert; Inganäs, Olle

    2007-05-01

    The use of organic polymers for electronic functions is mainly motivated by the low-end applications, where low cost rather than advanced performance is a driving force. Materials and processing methods must allow for cheap production. Printing of electronics using inkjets or classical printing methods has considerable potential to deliver this. Another technology that has been around for millennia is weaving using fibres. Integration of electronic functions within fabrics, with production methods fully compatible with textiles, is therefore of current interest, to enhance performance and extend functions of textiles. Standard polymer field-effect transistors require well defined insulator thickness and high voltage, so they have limited suitability for electronic textiles. Here we report a novel approach through the construction of wire electrochemical transistor (WECT) devices, and show that textile monofilaments with 10-100μm diameters can be coated with continuous thin films of the conducting polythiophene poly(3,4-ethylenedioxythiophene), and used to create micro-scale WECTs on single fibres. We also demonstrate inverters and multiplexers for digital logic. This opens an avenue for three-dimensional polymer micro-electronics, where large-scale circuits can be designed and integrated directly into the three-dimensional structure of woven fibres.

  18. Emergent bistability by a growth-modulating positive feedback circuit.

    PubMed

    Tan, Cheemeng; Marguet, Philippe; You, Lingchong

    2009-11-01

    Synthetic gene circuits are often engineered by considering the host cell as an invariable 'chassis'. Circuit activation, however, may modulate host physiology, which in turn can substantially impact circuit behavior. We illustrate this point by a simple circuit consisting of mutant T7 RNA polymerase (T7 RNAP*) that activates its own expression in the bacterium Escherichia coli. Although activation by the T7 RNAP* is noncooperative, the circuit caused bistable gene expression. This counterintuitive observation can be explained by growth retardation caused by circuit activation, which resulted in nonlinear dilution of T7 RNAP* in individual bacteria. Predictions made by models accounting for such effects were verified by further experimental measurements. Our results reveal a new mechanism of generating bistability and underscore the need to account for host physiology modulation when engineering gene circuits.

  19. Ion implanted dielectric elastomer circuits

    NASA Astrophysics Data System (ADS)

    O'Brien, Benjamin M.; Rosset, Samuel; Anderson, Iain A.; Shea, Herbert R.

    2013-06-01

    Starfish and octopuses control their infinite degree-of-freedom arms with panache—capabilities typical of nature where the distribution of reflex-like intelligence throughout soft muscular networks greatly outperforms anything hard, heavy, and man-made. Dielectric elastomer actuators show great promise for soft artificial muscle networks. One way to make them smart is with piezo-resistive Dielectric Elastomer Switches (DES) that can be combined with artificial muscles to create arbitrary digital logic circuits. Unfortunately there are currently no reliable materials or fabrication process. Thus devices typically fail within a few thousand cycles. As a first step in the search for better materials we present a preliminary exploration of piezo-resistors made with filtered cathodic vacuum arc metal ion implantation. DES were formed on polydimethylsiloxane silicone membranes out of ion implanted gold nano-clusters. We propose that there are four distinct regimes (high dose, above percolation, on percolation, low dose) in which gold ion implanted piezo-resistors can operate and present experimental results on implanted piezo-resistors switching high voltages as well as a simple artificial muscle inverter. While gold ion implanted DES are limited by high hysteresis and low sensitivity, they already show promise for a range of applications including hysteretic oscillators and soft generators. With improvements to implanter process control the promise of artificial muscle circuitry for soft smart actuator networks could become a reality.

  20. Test generation and fault detection for VLSI PPL circuits

    SciTech Connect

    Amin, A.A.M.

    1987-01-01

    The problem of design for testability of PPL logic circuits is addressed. A test-generation package was developed which utilizes the special features of PPL logic to generate high fault coverage test vectors at a reduced computational cost. The test strategy assumes that one of the scan design techniques is used. A new methodology for test-vectors compaction without compromising the fault coverage is also proposed. A fault-oriented test-generation algorithm combined with a heuristic test-generation algorithm are the essential ingredients of this package. The fault-oriented algorithm uses a modified D-algorithm which includes look-ahead features and a new seven-valued logic to improve the average speed of the test-generation process. Fault coverages in the 90% range were obtained using the test sequences generated by this package.