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Sample records for logic circuits predict

  1. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  2. The evolution of logic circuits for the purpose of protein contact map prediction.

    PubMed

    Chapman, Samuel D; Adami, Christoph; Wilke, Claus O; B Kc, Dukka

    2017-01-01

    Predicting protein structure from sequence remains a major open problem in protein biochemistry. One component of predicting complete structures is the prediction of inter-residue contact patterns (contact maps). Here, we discuss protein contact map prediction by machine learning. We describe a novel method for contact map prediction that uses the evolution of logic circuits. These logic circuits operate on feature data and output whether or not two amino acids in a protein are in contact or not. We show that such a method is feasible, and in addition that evolution allows the logic circuits to be trained on the dataset in an unbiased manner so that it can be used in both contact map prediction and the selection of relevant features in a dataset.

  3. The evolution of logic circuits for the purpose of protein contact map prediction

    PubMed Central

    Chapman, Samuel D.; Adami, Christoph; Wilke, Claus O.

    2017-01-01

    Predicting protein structure from sequence remains a major open problem in protein biochemistry. One component of predicting complete structures is the prediction of inter-residue contact patterns (contact maps). Here, we discuss protein contact map prediction by machine learning. We describe a novel method for contact map prediction that uses the evolution of logic circuits. These logic circuits operate on feature data and output whether or not two amino acids in a protein are in contact or not. We show that such a method is feasible, and in addition that evolution allows the logic circuits to be trained on the dataset in an unbiased manner so that it can be used in both contact map prediction and the selection of relevant features in a dataset. PMID:28439455

  4. Explicit Logic Circuits Predict Local Properties of the Neocortex's Physiology and Anatomy

    PubMed Central

    Yoder, Lane

    2010-01-01

    Background Two previous articles proposed an explicit model of how the brain processes information by its organization of synaptic connections. The family of logic circuits was shown to generate neural correlates of complex psychophysical phenomena in different sensory systems. Methodology/Principal Findings Here it is shown that the most cost-effective architectures for these networks produce correlates of electrophysiological brain phenomena and predict major aspects of the anatomical structure and physiological organization of the neocortex. The logic circuits are markedly efficient in several respects and provide the foundation for all of the brain's combinational processing of information. Conclusions/Significance At the local level, these networks account for much of the physical structure of the neocortex as well its organization of synaptic connections. Electronic implementations of the logic circuits may be more efficient than current electronic logic arrays in generating both Boolean and fuzzy logic. PMID:20169077

  5. Explicit logic circuits predict local properties of the neocortex's physiology and anatomy.

    PubMed

    Yoder, Lane

    2010-02-16

    Two previous articles proposed an explicit model of how the brain processes information by its organization of synaptic connections. The family of logic circuits was shown to generate neural correlates of complex psychophysical phenomena in different sensory systems. Here it is shown that the most cost-effective architectures for these networks produce correlates of electrophysiological brain phenomena and predict major aspects of the anatomical structure and physiological organization of the neocortex. The logic circuits are markedly efficient in several respects and provide the foundation for all of the brain's combinational processing of information. At the local level, these networks account for much of the physical structure of the neocortex as well its organization of synaptic connections. Electronic implementations of the logic circuits may be more efficient than current electronic logic arrays in generating both Boolean and fuzzy logic.

  6. Optically controllable molecular logic circuits

    SciTech Connect

    Nishimura, Takahiro Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  7. Computerized logic design of digital circuits

    NASA Technical Reports Server (NTRS)

    Gussow, S.; Oglesby, R.

    1974-01-01

    Procedure performs all work required for logic design of digital counters or sequential circuits and simplification of Boolean expressions. Program provides simple, accurate, and comprehensive logic design capability to users both experienced and totally inexperienced in logic design

  8. Logic circuits from zero forcing.

    PubMed

    Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael

    We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

  9. Reconfigurable Optical Directed-Logic Circuits

    DTIC Science & Technology

    2015-11-20

    routing-table lookup. 2. Integrated Photonics for Directed-Logic Circuits As a proof-of-concept demonstration we developed a 2×2-arrayed directed...improved electro-optic directed-logic circuit with increased operational speed by using integrated optical switches based on the carrier depletion effect... circuit . In this project, we will develop a new cellular DL architecture based on large-scale integrated silicon photonic circuits . The circuit is

  10. Tribotronic Logic Circuits and Basic Operations.

    PubMed

    Zhang, Chi; Zhang, Li Min; Tang, Wei; Han, Chang Bao; Wang, Zhong Lin

    2015-06-17

    A tribotronic logic device is fabricated to convert external mechanical stimuli into logic level signals, and tribotronic logic circuits such as NOT, AND, OR, NAND, NOR, XOR, and XNOR gates are demonstrated for performing mechanical-electrical coupled tribotronic logic operations, which realize the direct interaction between the external environment and the current silicon integrated circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Computerized logic design of digital circuits

    NASA Technical Reports Server (NTRS)

    Sussow, S.; Oglesby, R.

    1973-01-01

    This manual presents a computer program that performs all the work required for the logic design of digital counters or sequential circuits and the simplification of Boolean logic expressions. The program provides both the experienced and inexperienced logic designer with a comprehensive logic design capability. The manual contains Boolean simplification and sequential design theory, detailed instructions for use of the program, a large number of illustrative design examples, and complete program documentation.

  12. Reversible logic circuits made of DNA.

    PubMed

    Genot, Anthony J; Bath, Jonathan; Turberfield, Andrew J

    2011-12-21

    We report reversible logic circuits made of DNA. The circuits are based on an AND gate that is designed to be thermodynamically and kinetically reversible and to respond nonlinearly to the concentrations of its input molecules. The circuits continuously recompute their outputs, allowing them to respond to changing inputs. They are robust to imperfections in their inputs. © 2011 American Chemical Society

  13. New Logic Circuit with DC Parametric Excitation

    NASA Astrophysics Data System (ADS)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  14. Faster Evolution of More Multifunctional Logic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Zebulum, Ricardo

    2005-01-01

    A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

  15. Detection of Floating Inputs in Logic Circuits

    NASA Technical Reports Server (NTRS)

    Cash, B.; Thornton, M. G.

    1984-01-01

    Simple modification of oscilloscope probe allows easy detection of floating inputs or tristate outputs in digital-IC's. Oscilloscope probe easily modified with 1/4 W resistor and switch for detecting floating inputs in CMOS logic circuits.

  16. Detection of Floating Inputs in Logic Circuits

    NASA Technical Reports Server (NTRS)

    Cash, B.; Thornton, M. G.

    1984-01-01

    Simple modification of oscilloscope probe allows easy detection of floating inputs or tristate outputs in digital-IC's. Oscilloscope probe easily modified with 1/4 W resistor and switch for detecting floating inputs in CMOS logic circuits.

  17. Logic circuit exhibits optimum performance

    NASA Technical Reports Server (NTRS)

    Husson, C.

    1965-01-01

    Performance of circuits are compared to determine the optimum circuit configuration for implementation into microelectronic functions. Comparison is made in terms of power drain, propagation time, and component variations with temperature and load.

  18. Enzyme-free nucleic acid logic circuits.

    PubMed

    Seelig, Georg; Soloveichik, David; Zhang, David Yu; Winfree, Erik

    2006-12-08

    Biological organisms perform complex information processing and control tasks using sophisticated biochemical circuits, yet the engineering of such circuits remains ineffective compared with that of electronic circuits. To systematically create complex yet reliable circuits, electrical engineers use digital logic, wherein gates and subcircuits are composed modularly and signal restoration prevents signal degradation. We report the design and experimental implementation of DNA-based digital logic circuits. We demonstrate AND, OR, and NOT gates, signal restoration, amplification, feedback, and cascading. Gate design and circuit construction is modular. The gates use single-stranded nucleic acids as inputs and outputs, and the mechanism relies exclusively on sequence recognition and strand displacement. Biological nucleic acids such as microRNAs can serve as inputs, suggesting applications in biotechnology and bioengineering.

  19. A Survey of Memristive Threshold Logic Circuits.

    PubMed

    Maan, Akshay Kumar; Jayadevi, Deepthi Anirudhan; James, Alex Pappachen

    2017-08-01

    In this paper, we review different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of the flow of neurotransmitters in the biological brain. The brainlike generalization ability and the area minimization of these threshold logic circuits aim toward crossing Moore's law boundaries at device, circuits, and systems levels. Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognition are identified as some of the potential applications of MTL systems. The physical realization of nanoscale devices with memristive behavior from materials, such as TiO2, ferroelectrics, silicon, and polymers, has accelerated research effort in these application areas, inspiring the scientific community to pursue the design of high-speed, low-cost, low-power, and high-density neuromorphic architectures.

  20. Logic circuits based on molecular spider systems.

    PubMed

    Mo, Dandan; Lakin, Matthew R; Stefanovic, Darko

    2016-08-01

    Spatial locality brings the advantages of computation speed-up and sequence reuse to molecular computing. In particular, molecular walkers that undergo localized reactions are of interest for implementing logic computations at the nanoscale. We use molecular spider walkers to implement logic circuits. We develop an extended multi-spider model with a dynamic environment wherein signal transmission is triggered via localized reactions, and use this model to implement three basic gates (AND, OR, NOT) and a cascading mechanism. We develop an algorithm to automatically generate the layout of the circuit. We use a kinetic Monte Carlo algorithm to simulate circuit computations, and we analyze circuit complexity: our design scales linearly with formula size and has a logarithmic time complexity.

  1. Tri-state logic circuit

    NASA Technical Reports Server (NTRS)

    Pryor, Richard Lee (Inventor)

    1977-01-01

    A line driver including a pair of complementary transistors having their conduction paths serially connected between an operating and a reference potential and their bases connected through a first switch to a signal input terminal. A second switch is connected between the common base connection and the common connection of the conduction paths. With the second switch open and the first closed, an output voltage, responsive to the input signal, corresponding to first or second binary values is obtained. When the second switch is closed and the first opened, the transistor pair is turned off, disconnecting the line driver from its load, thereby providing tri-state logic operation.

  2. Demonstrating Boolean Logic Using Simple Electrical Circuits

    ERIC Educational Resources Information Center

    McElhaney, Kevin W.

    2004-01-01

    While exploring the subject of geometric proofs, boolean logic operators AND and OR can be used to allow students to visualize their true-or-false patterns. An activity in the form of constructing electrical circuits is illustrated to explain the concept.

  3. Demonstrating Boolean Logic Using Simple Electrical Circuits

    ERIC Educational Resources Information Center

    McElhaney, Kevin W.

    2004-01-01

    While exploring the subject of geometric proofs, boolean logic operators AND and OR can be used to allow students to visualize their true-or-false patterns. An activity in the form of constructing electrical circuits is illustrated to explain the concept.

  4. Starting Circuit For Erasable Programmable Logic Device

    NASA Technical Reports Server (NTRS)

    Cole, Steven W.

    1990-01-01

    Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.

  5. Starting Circuit For Erasable Programmable Logic Device

    NASA Technical Reports Server (NTRS)

    Cole, Steven W.

    1990-01-01

    Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.

  6. Synthesis of logic circuits with evolutionary algorithms

    SciTech Connect

    JONES,JAKE S.; DAVIDSON,GEORGE S.

    2000-01-26

    In the last decade there has been interest and research in the area of designing circuits with genetic algorithms, evolutionary algorithms, and genetic programming. However, the ability to design circuits of the size and complexity required by modern engineering design problems, simply by specifying required outputs for given inputs has as yet eluded researchers. This paper describes current research in the area of designing logic circuits using an evolutionary algorithm. The goal of the research is to improve the effectiveness of this method and make it a practical aid for design engineers. A novel method of implementing the algorithm is introduced, and results are presented for various multiprocessing systems. In addition to evolving standard arithmetic circuits, work in the area of evolving circuits that perform digital signal processing tasks is described.

  7. Nonlinear dynamics based digital logic and circuits

    PubMed Central

    Kia, Behnam; Lindner, John. F.; Ditto, William L.

    2015-01-01

    We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two. PMID:26029096

  8. Nonlinear dynamics based digital logic and circuits.

    PubMed

    Kia, Behnam; Lindner, John F; Ditto, William L

    2015-01-01

    We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two.

  9. MicroRNA circuits for transcriptional logic.

    PubMed

    Leisner, Madeleine; Bleris, Leonidas; Lohmueller, Jason; Xie, Zhen; Benenson, Yaakov

    2012-01-01

    One of the longstanding challenges in synthetic biology is rational design of complex regulatory circuitry with multiple biological inputs, complex internal processing, and physiologically active outputs. We have previously proposed how to address this challenge in the case of transcription factor inputs. Here we describe the methods used to construct these synthetic circuits, capable of performing logic integration of transcription factor inputs using microRNA expression vectors and RNA interference (RNAi). The circuits operate in mammalian cells and they can serve as starting point for more complex synthetic information processing networks in these cells.

  10. Nanoeletromechanical switch and logic circuits formed therefrom

    DOEpatents

    Nordquist, Christopher D.; Czaplewski, David A.

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  11. Explicit logic circuits discriminate neural states.

    PubMed

    Yoder, Lane

    2009-01-01

    The magnitude and apparent complexity of the brain's connectivity have left explicit networks largely unexplored. As a result, the relationship between the organization of synaptic connections and how the brain processes information is poorly understood. A recently proposed retinal network that produces neural correlates of color vision is refined and extended here to a family of general logic circuits. For any combination of high and low activity in any set of neurons, one of the logic circuits can receive input from the neurons and activate a single output neuron whenever the input neurons have the given activity state. The strength of the output neuron's response is a measure of the difference between the smallest of the high inputs and the largest of the low inputs. The networks generate correlates of known psychophysical phenomena. These results follow directly from the most cost-effective architectures for specific logic circuits and the minimal cellular capabilities of excitation and inhibition. The networks function dynamically, making their operation consistent with the speed of most brain functions. The networks show that well-known psychophysical phenomena do not require extraordinarily complex brain structures, and that a single network architecture can produce apparently disparate phenomena in different sensory systems.

  12. Scaling of pneumatic digital logic circuits.

    PubMed

    Duncan, Philip N; Ahrar, Siavash; Hui, Elliot E

    2015-03-07

    The scaling of integrated circuits to smaller dimensions is critical for achieving increased system complexity and speed. Digital logic circuits composed of pneumatic microfluidic components have to this point been limited to a circuit density of 2-4 gates cm(-2), constraining the complexity of the digital systems that can be achieved. We explored the use of precision machining techniques to reduce the size of pneumatic valves and resistors, and to achieve more accurate and efficient placement of ports and vias. In this way, we attained an order of magnitude increase in circuit density, reaching as high as 36 gates cm(-2). A 12-bit binary counter circuit composed of 96 gates was realized in an area of 360 mm(2). The reduction in size also brought an order of magnitude increase in speed. The frequency of a 13-stage ring oscillator increased from 2.6 Hz to 22.1 Hz, and the maximum clock frequency of a binary counter increased from 1/3 Hz to 6 Hz.

  13. Simulation Approach for Timing Analysis of Genetic Logic Circuits.

    PubMed

    Baig, Hasan; Madsen, Jan

    2017-07-21

    Constructing genetic logic circuits is an application of synthetic biology in which parts of the DNA of a living cell are engineered to perform a dedicated Boolean function triggered by an appropriate concentration of certain proteins or by different genetic components. These logic circuits work in a manner similar to electronic logic circuits, but they are much more stochastic and hence much harder to characterize. In this article, we introduce an approach to analyze the threshold value and timing of genetic logic circuits. We show how this approach can be used to analyze the timing behavior of single and cascaded genetic logic circuits. We further analyze the timing sensitivity of circuits by varying the degradation rates and concentrations. Our approach can be used not only to characterize the timing behavior but also to analyze the timing constraints of cascaded genetic logic circuits, a capability that we believe will be important for design automation in synthetic biology.

  14. Superconductive combinational logic circuit using magnetically coupled SQUID array

    NASA Astrophysics Data System (ADS)

    Yamanashi, Y.; Umeda, K.; Sai, K.

    2010-11-01

    In this paper, we propose the development of superconductive combinational logic circuits. One of the difficulties in designing superconductive single-flux-quantum (SFQ) digital circuits can be attributed to the fundamental nature of the SFQ circuits, in which all logic gates have latching functions and are based on sequential logic. The design of ultralow-power superconductive digital circuits can be facilitated by the development of superconductive combinational logic circuits in which the output is a function of only the present input. This is because superconductive combinational logic circuits do not require determination of the timing adjustment and clocking scheme. Moreover, semiconductor design tools can be used to design digital circuits because CMOS logic gates are based on combinational logic. The proposed superconductive combinational logic circuits comprise a magnetically coupled SQUID array. By adjusting the circuit parameters and coupling strengths between neighboring SQUIDs, fundamental combinational logic gates, including the AND, OR, and NOT gates, can be built. We have verified the accuracy of the operations of the fundamental logic gates by analog circuit simulations.

  15. Exclusive-or logic circuit has useful properties

    NASA Technical Reports Server (NTRS)

    Batte, W. G.

    1966-01-01

    Single, simple exclusive-or logic connective eliminates excessive hardware and the number of interconnections between logic modules. This circuit performs the necessary switching for the exclusive-or operation and amplifies, restores, and inverts the signal.

  16. A parity checker circuit based on microelectromechanical resonator logic elements

    NASA Astrophysics Data System (ADS)

    Hafiz, Md Abdullah Al; Li, Ren; Younis, Mohammad I.; Fariborzi, Hossein

    2017-03-01

    Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro-resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.

  17. Predicting the reliability of electronic circuits.

    SciTech Connect

    Loescher, Douglas H.

    2004-06-01

    Procedures to predict the reliability of electrical circuits are discussed. Three cases are introduced and discussed. In Case 1, an analyst predicts the probability of any failure in the intended relations between circuit inputs and circuit outputs. In Case 2, an analyst predicts the probability that specified unintended outputs would occur. In Case 3, an analyst considers coupling between circuits. Logic models are given for the three cases, and sources of failure probabilities of components are mentioned. Methods of analysis are given, software tools are mentioned, and recommendations for presentation and review of results are discussed.

  18. Fluid logic control circuit operates nutator actuator motor

    NASA Technical Reports Server (NTRS)

    1966-01-01

    Fluid logic control circuit operates a pneumatic nutator actuator motor. It has no moving parts and consists of connected fluid interaction devices. The operation of this circuit demonstrates the ability of fluid interaction devices to operate in a complex combination of series and parallel logic sequence.

  19. Synthesizing genetic sequential logic circuit with clock pulse generator.

    PubMed

    Chuang, Chia-Hua; Lin, Chun-Liang

    2014-05-28

    Rhythmic clock widely occurs in biological systems which controls several aspects of cell physiology. For the different cell types, it is supplied with various rhythmic frequencies. How to synthesize a specific clock signal is a preliminary but a necessary step to further development of a biological computer in the future. This paper presents a genetic sequential logic circuit with a clock pulse generator based on a synthesized genetic oscillator, which generates a consecutive clock signal whose frequency is an inverse integer multiple to that of the genetic oscillator. An analogous electronic waveform-shaping circuit is constructed by a series of genetic buffers to shape logic high/low levels of an oscillation input in a basic sinusoidal cycle and generate a pulse-width-modulated (PWM) output with various duty cycles. By controlling the threshold level of the genetic buffer, a genetic clock pulse signal with its frequency consistent to the genetic oscillator is synthesized. A synchronous genetic counter circuit based on the topology of the digital sequential logic circuit is triggered by the clock pulse to synthesize the clock signal with an inverse multiple frequency to the genetic oscillator. The function acts like a frequency divider in electronic circuits which plays a key role in the sequential logic circuit with specific operational frequency. A cascaded genetic logic circuit generating clock pulse signals is proposed. Based on analogous implement of digital sequential logic circuits, genetic sequential logic circuits can be constructed by the proposed approach to generate various clock signals from an oscillation signal.

  20. Design of synthetic biological logic circuits based on evolutionary algorithm.

    PubMed

    Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

    2013-08-01

    The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

  1. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  2. Ambipolar Barristors for Reconfigurable Logic Circuits.

    PubMed

    Liu, Yuan; Zhang, Guo; Zhou, Hailong; Li, Zheng; Cheng, Rui; Xu, Yang; Gambin, Vincent; Huang, Yu; Duan, Xiangfeng

    2017-03-08

    Vertical heterostructures based on graphene have emerged as a unique architecture for novel electronic devices with unusual characteristics. Here we report a new design of vertical ambipolar barristors based on metal-graphene-silicon-graphene sandwich structure, using the bottom graphene as a gate-tunable "active contact", the top graphene as an adaptable Ohmic contact, and the low doping thin silicon layer as the switchable channel. Importantly, with finite density of states and weak screening effect of graphene, we demonstrate, for the first time, that both the carrier concentration and majority carrier type in the sandwiched silicon can be readily modulated by gate potential penetrating through graphene. It can thus enable a new type of ambipolar barristors with an ON-OFF ratio exceeding 10(3). Significantly, these ambipolar barristors can be flexibly configured into either p-type or n-type transistors and used to create integrated circuits with reconfigurable logic functions. This unconventional device structure and ambipolar reconfigurable characteristics can open up exciting opportunities in future electronics based on graphene or two-dimensional van der Waals heterostructures.

  3. A transition calculus for Boolean functions. [logic circuit analysis

    NASA Technical Reports Server (NTRS)

    Tucker, J. H.; Bennett, A. W.

    1974-01-01

    A transition calculus is presented for analyzing the effect of input changes on the output of logic circuits. The method is closely related to the Boolean difference, but it is more powerful. Both differentiation and integration are considered.

  4. A transition calculus for Boolean functions. [logic circuit analysis

    NASA Technical Reports Server (NTRS)

    Tucker, J. H.; Bennett, A. W.

    1974-01-01

    A transition calculus is presented for analyzing the effect of input changes on the output of logic circuits. The method is closely related to the Boolean difference, but it is more powerful. Both differentiation and integration are considered.

  5. Synthesizing genetic sequential logic circuit with clock pulse generator

    PubMed Central

    2014-01-01

    Background Rhythmic clock widely occurs in biological systems which controls several aspects of cell physiology. For the different cell types, it is supplied with various rhythmic frequencies. How to synthesize a specific clock signal is a preliminary but a necessary step to further development of a biological computer in the future. Results This paper presents a genetic sequential logic circuit with a clock pulse generator based on a synthesized genetic oscillator, which generates a consecutive clock signal whose frequency is an inverse integer multiple to that of the genetic oscillator. An analogous electronic waveform-shaping circuit is constructed by a series of genetic buffers to shape logic high/low levels of an oscillation input in a basic sinusoidal cycle and generate a pulse-width-modulated (PWM) output with various duty cycles. By controlling the threshold level of the genetic buffer, a genetic clock pulse signal with its frequency consistent to the genetic oscillator is synthesized. A synchronous genetic counter circuit based on the topology of the digital sequential logic circuit is triggered by the clock pulse to synthesize the clock signal with an inverse multiple frequency to the genetic oscillator. The function acts like a frequency divider in electronic circuits which plays a key role in the sequential logic circuit with specific operational frequency. Conclusions A cascaded genetic logic circuit generating clock pulse signals is proposed. Based on analogous implement of digital sequential logic circuits, genetic sequential logic circuits can be constructed by the proposed approach to generate various clock signals from an oscillation signal. PMID:24884665

  6. Logic Circuits as a Vehicle for Technological Literacy.

    ERIC Educational Resources Information Center

    Hazeltine, Barrett

    1985-01-01

    Provides basic information on logic circuits, points out that the topic is a good vehicle for developing technological literacy. The subject could be included in such courses as philosophy, computer science, communications, as well as in courses dealing with electronic circuits. (JN)

  7. Logic Circuits as a Vehicle for Technological Literacy.

    ERIC Educational Resources Information Center

    Hazeltine, Barrett

    1985-01-01

    Provides basic information on logic circuits, points out that the topic is a good vehicle for developing technological literacy. The subject could be included in such courses as philosophy, computer science, communications, as well as in courses dealing with electronic circuits. (JN)

  8. Novel Ferroelectric CMOS Circuits as a Nonvolatile Logic

    NASA Astrophysics Data System (ADS)

    Takahashi, M.; Horiuchi, T.; Li, Q.-H.; Wang, S.; Yun, K. Y.; Sakai, S.

    2008-03-01

    We propose a novel and promising nonvolatile-logic circuit constructed by p channel type (Pch) and n channel type (Nch) ferroelectric gate field effect transistors (FeFETs), which we named a ferroelectric CMOS (FeCMOS) circuit. The circuit works as both logic and memory. We fabricated a NOT logic FeCMOS device which have Pt metal gates and gate oxides of ferroelectric SrBi2Ta2O9 (SBT) and high-k HfAlO on Si. Key technology was adjusting threshold voltages of the FeFETs as well as preparing those of high quality. We demonstrate basic operations of the NOT-logic response, memory writing, holding and non-destructive reading. The memory writing is done by amplifying the input node voltage to a higher level when the node was logically high and to a lower one when it was logically low just before the writing operation. The data retention was also measured. The retained high and low voltages were almost unchanged for 1.2 days. The idea of this FeCMOS will enhance flexibility of circuit designing by merging logic and memory functions. This work was partially supported by NEDO.

  9. Delay modeling of bipolar ECL/EFL (Emitter-Coupled Logic/Emitter-Follower-Logic) circuits

    NASA Astrophysics Data System (ADS)

    Yang, Andrew T.

    1986-08-01

    This report deals with the development of a delay-time model for timing simulation of large circuits consisting of Bipolar ECL(Emitter-Coupled Logic) and EFL (Emitter-Follower-Logic) networks. This model can provide adequate information on the performance of the circuits with a minimum expenditure of computation time. This goal is achieved by the use of proper circuit transient models on which analytical delay expressions can be derived with accurate results. The delay-model developed in this report is general enough to handle complex digital circuits with multiple inputs or/and multiple levels. The important effects of input slew rate are also included in the model.

  10. Synthetic circuits integrating logic and memory in living cells.

    PubMed

    Siuti, Piro; Yazbek, John; Lu, Timothy K

    2013-05-01

    Logic and memory are essential functions of circuits that generate complex, state-dependent responses. Here we describe a strategy for efficiently assembling synthetic genetic circuits that use recombinases to implement Boolean logic functions with stable DNA-encoded memory of events. Application of this strategy allowed us to create all 16 two-input Boolean logic functions in living Escherichia coli cells without requiring cascades comprising multiple logic gates. We demonstrate long-term maintenance of memory for at least 90 cell generations and the ability to interrogate the states of these synthetic devices with fluorescent reporters and PCR. Using this approach we created two-bit digital-to-analog converters, which should be useful in biotechnology applications for encoding multiple stable gene expression outputs using transient inputs of inducers. We envision that this integrated logic and memory system will enable the implementation of complex cellular state machines, behaviors and pathways for therapeutic, diagnostic and basic science applications.

  11. Asynchronous sequential circuit design using pass transistor iterative logic arrays

    NASA Technical Reports Server (NTRS)

    Liu, M. N.; Maki, G. K.; Whitaker, S. R.

    1991-01-01

    The iterative logic array (ILA) is introduced as a new architecture for asynchronous sequential circuits. This is the first ILA architecture for sequential circuits reported in the literature. The ILA architecture produces a very regular circuit structure. Moreover, it is immune to both 1-1 and 0-0 crossovers and is free of hazards. This paper also presents a new critical race free STT state assignment which produces a simple form of design equations that greatly simplifies the ILA realizations.

  12. Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors.

    PubMed

    Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C P; Gelinck, Gerwin H; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

    2016-10-20

    Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics.

  13. Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors

    PubMed Central

    Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C. P.; Gelinck, Gerwin H.; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

    2016-01-01

    Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics. PMID:27762321

  14. Programmed DNA Self-Assembly and Logic Circuits

    NASA Astrophysics Data System (ADS)

    Li, Wei

    DNA is a unique, highly programmable and addressable biomolecule. Due to its reliable and predictable base recognition behavior, uniform structural properties, and extraordinary stability, DNA molecules are desirable substrates for biological computation and nanotechnology. The field of DNA computation has gained considerable attention due to the possibility of exploiting the massive parallelism that is inherent in natural systems to solve computational problems. This dissertation focuses on building novel types of computational DNA systems based on both DNA reaction networks and DNA nanotechnology. A series of related research projects are presented here. First, a novel, three-input majority logic gate based on DNA strand displacement reactions was constructed. Here, the three inputs in the majority gate have equal priority, and the output will be true if any two of the inputs are true. We subsequently designed and realized a complex, 5-input majority logic gate. By controlling two of the five inputs, the complex gate is capable of realizing every combination of OR and AND gates of the other 3 inputs. Next, we constructed a half adder, which is a basic arithmetic unit, from DNA strand operated XOR and AND gates. The aim of these two projects was to develop novel types of DNA logic gates to enrich the DNA computation toolbox, and to examine plausible ways to implement large scale DNA logic circuits. The third project utilized a two dimensional DNA origami frame shaped structure with a hollow interior where DNA hybridization seeds were selectively positioned to control the assembly of small DNA tile building blocks. The small DNA tiles were directed to fill the hollow interior of the DNA origami frame, guided through sticky end interactions at prescribed positions. This research shed light on the fundamental behavior of DNA based self-assembling systems, and provided the information necessary to build programmed nanodisplays based on the self-assembly of DNA.

  15. Complementary MOS four-phase logic circuits

    NASA Technical Reports Server (NTRS)

    Petersen, H. L.; Kinell, D. K.

    1973-01-01

    Technique can provide four-phase clock signal from single-phase clock and requires only one power supply voltage. This arrangement saves considerable power compared to circuits having load resistor between power supply and ground.

  16. Fast frequency divider circuit using combinational logic

    DOEpatents

    Helinski, Ryan

    2017-05-30

    The various technologies presented herein relate to performing on-chip frequency division of an operating frequency of a ring oscillator (RO). Per the various embodiments herein, a conflict between RO size versus operational frequency can be addressed by dividing the output frequency of the RO to a frequency that can be measured on-chip. A frequency divider circuit (comprising NOR gates and latches, for example) can be utilized in conjunction with the RO on the chip. In an embodiment, the frequency divider circuit can include a pair of latches coupled to the RO to facilitate dividing the oscillating frequency of the RO by 2. In another embodiment, the frequency divider circuit can include four latches (operating in pairs) coupled to the RO to facilitate dividing the oscillating frequency of the RO by 4. A plurality of ROs can be MUXed to the plurality of ROs by a single oscillation-counting circuit.

  17. Mechanically Flexible and High-Performance CMOS Logic Circuits.

    PubMed

    Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

    2015-10-13

    Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal-oxide-semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices.

  18. Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits

    NASA Astrophysics Data System (ADS)

    Ogawa, Taichi; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, Yoshihito

    A threshold-logic gate device consisting of subthreshold MOSFET circuits is proposed. The gate device performs threshold-logic operation, using the technique of current-mode addition and subtraction. Sample digital subsystems, i.e., adders and morphological operation cells based on threshold logic, are designed using the gate devices, and their operations are confirmed by computer simulation. The device has a simple structure and operates at low power dissipation, so it is suitable for constructing cell-based, parallel processing LSIs such as cellular-automaton and neural-network LSIs.

  19. Integrated logic circuits using single-atom transistors.

    PubMed

    Mol, J A; Verduijn, J; Levine, R D; Remacle, F; Rogge, S

    2011-08-23

    Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal-oxide-semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch.

  20. Integrated logic circuits using single-atom transistors

    PubMed Central

    Mol, J. A.; Verduijn, J.; Levine, R. D.; Remacle, F.

    2011-01-01

    Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal–oxide–semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch. PMID:21808050

  1. Majority-voted logic fail-sense circuit

    NASA Technical Reports Server (NTRS)

    Mclyman, W. T.

    1977-01-01

    Fail-sense circuit has majority-voted logic component which receives three error voltage signals that are sensed at single point by three error amplifiers. If transistor shorts, only one signal is required to operate; if transistor opens, two signals are required.

  2. Controlling High Power Devices with Computers or TTL Logic Circuits

    ERIC Educational Resources Information Center

    Carlton, Kevin

    2002-01-01

    Computers are routinely used to control experiments in modern science laboratories. This should be reflected in laboratories in an educational setting. There is a mismatch between the power that can be delivered by a computer interfacing card or a TTL logic circuit and that required by many practical pieces of laboratory equipment. One common way…

  3. Majority-voted logic fail-sense circuit

    NASA Technical Reports Server (NTRS)

    Mclyman, W. T.

    1977-01-01

    Fail-sense circuit has majority-voted logic component which receives three error voltage signals that are sensed at single point by three error amplifiers. If transistor shorts, only one signal is required to operate; if transistor opens, two signals are required.

  4. Controlling High Power Devices with Computers or TTL Logic Circuits

    ERIC Educational Resources Information Center

    Carlton, Kevin

    2002-01-01

    Computers are routinely used to control experiments in modern science laboratories. This should be reflected in laboratories in an educational setting. There is a mismatch between the power that can be delivered by a computer interfacing card or a TTL logic circuit and that required by many practical pieces of laboratory equipment. One common way…

  5. Programmable resistive-switch nanowire transistor logic circuits.

    PubMed

    Shim, Wooyoung; Yao, Jun; Lieber, Charles M

    2014-09-10

    Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a well-defined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.

  6. Efficient G(sup 4)FET-Based Logic Circuits

    NASA Technical Reports Server (NTRS)

    Vatan, Farrokh

    2008-01-01

    A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

  7. Interlocked DNA nanostructures controlled by a reversible logic circuit

    PubMed Central

    Li, Tao; Lohmann, Finn; Famulok, Michael

    2014-01-01

    DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems. PMID:25229207

  8. Interlocked DNA nanostructures controlled by a reversible logic circuit.

    PubMed

    Li, Tao; Lohmann, Finn; Famulok, Michael

    2014-09-17

    DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.

  9. Magnonic interferometric switch for multi-valued logic circuits

    NASA Astrophysics Data System (ADS)

    Balynsky, Michael; Kozhevnikov, Alexander; Khivintsev, Yuri; Bhowmick, Tonmoy; Gutierrez, David; Chiang, Howard; Dudko, Galina; Filimonov, Yuri; Liu, Guanxiong; Jiang, Chenglong; Balandin, Alexander A.; Lake, Roger; Khitun, Alexander

    2017-01-01

    We investigated a possible use of the magnonic interferometric switches in multi-valued logic circuits. The switch is a three-terminal device consisting of two spin channels where input, control, and output signals are spin waves. Signal modulation is achieved via the interference between the source and gate spin waves. We report experimental data on a micrometer scale prototype based on the Y3Fe2(FeO4)3 structure. The output characteristics are measured at different angles of the bias magnetic field. The On/Off ratio of the prototype exceeds 13 dB at room temperature. Experimental data are complemented by the theoretical analysis and the results of micro magnetic simulations showing spin wave propagation in a micrometer size magnetic junction. We also present the results of numerical modeling illustrating the operation of a nanometer-size switch consisting of just 20 spins in the source-drain channel. The utilization of spin wave interference as a switching mechanism makes it possible to build nanometer-scale logic gates, and minimize energy per operation, which is limited only by the noise margin. The utilization of phase in addition to amplitude for information encoding offers an innovative route towards multi-state logic circuits. We describe possible implementation of the three-value logic circuits based on the magnonic interferometric switches. The advantages and shortcomings inherent in interferometric switches are also discussed.

  10. G(sup 4)FET Implementations of Some Logic Circuits

    NASA Technical Reports Server (NTRS)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  11. Customizing cell signaling using engineered genetic logic circuits.

    PubMed

    Wang, Baojun; Buck, Martin

    2012-08-01

    Cells live in an ever-changing environment and continuously sense, process and react to environmental signals using their inherent signaling and gene regulatory networks. Recently, there have been great advances on rewiring the native cell signaling and gene networks to program cells to sense multiple noncognate signals and integrate them in a logical manner before initiating a desired response. Here, we summarize the current state-of-the-art of engineering synthetic genetic logic circuits to customize cellular signaling behaviors, and discuss their promising applications in biocomputing, environmental, biotechnological and biomedical areas as well as the remaining challenges in this growing field. Copyright © 2012 Elsevier Ltd. All rights reserved.

  12. Confinement-modulated junctionless nanowire transistors for logic circuits.

    PubMed

    Vaurette, François; Leturcq, Renaud; Lepilliet, Sylvie; Grandidier, Bruno; Stiévenard, Didier

    2014-11-21

    We report the controlled formation of nanoscale constrictions in junctionless nanowire field-effect transistors that efficiently modulate the flow of the current in the nanowire. The constrictions act as potential barriers and the height of the barriers can be selectively tuned by gates, making the device concept compatible with the crossbar geometry in order to create logic circuits. The functionality of the architecture and the reliability of the fabrication process are demonstrated by designing decoder devices.

  13. Integration of DNA and graphene oxide for the construction of various advanced logic circuits.

    PubMed

    Zhou, Chunyang; Liu, Dali; Wu, Changtong; Liu, Yaqing; Wang, Erkang

    2016-10-14

    Multiple advanced logic circuits including the full-adder, full-subtract and majority logic gate have been successfully realized on a DNA/GO platform for the first time. All the logic gates were implemented in an enzyme-free condition. The investigation provides a wider field of vision towards prototypical DNA-based algebra logical operations and promotes the development of advanced logic circuits.

  14. Complex logic functions implemented with quantum dot bionanophotonic circuits.

    PubMed

    Claussen, Jonathan C; Hildebrandt, Niko; Susumu, Kimihiro; Ancona, Mario G; Medintz, Igor L

    2014-03-26

    We combine quantum dots (QDs) with long-lifetime terbium complexes (Tb), a near-IR Alexa Fluor dye (A647), and self-assembling peptides to demonstrate combinatorial and sequential bionanophotonic logic devices that function by time-gated Förster resonance energy transfer (FRET). Upon excitation, the Tb-QD-A647 FRET-complex produces time-dependent photoluminescent signatures from multi-FRET pathways enabled by the capacitor-like behavior of the Tb. The unique photoluminescent signatures are manipulated by ratiometrically varying dye/Tb inputs and collection time. Fluorescent output is converted into Boolean logic states to create complex arithmetic circuits including the half-adder/half-subtractor, 2:1 multiplexer/1:2 demultiplexer, and a 3-digit, 16-combination keypad lock.

  15. Implementation of a genetic logic circuit: bio-register.

    PubMed

    Lin, Chun-Liang; Kuo, Ting-Yu; Chen, Yang-Yi

    2015-12-01

    We introduce an idea of synthesizing a class of genetic registers based on the existing sequential biological circuits, which are composed of fundamental biological gates. In the renowned literature, biological gates and genetic oscillator have been unveiled and experimentally realized in recent years. These biological circuits have formed a basis for realizing a primitive biocomputer. In the traditional computer architecture, there is an intermediate load-store section, i.e. a register, which serves as a part of the digital processor. With which, the processor can load data from a larger memory into it and proceed to conduct necessary arithmetic or logic operations. Then, manipulated data are stored back to the memory by instruction via the register. We propose here a class of bio-registers for the biocomputer. Four types of register structures are presented. In silicon experiments illustrate results of the proposed design.

  16. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

  17. Adaptive logic circuits with doping-free ambipolar carbon nanotube transistors.

    PubMed

    Yu, Woo Jong; Kim, Un Jeong; Kang, Bo Ram; Lee, Il Ha; Lee, Eun-Hong; Lee, Young Hee

    2009-04-01

    A CMOS-like inverter was integrated by using ambipolar carbon nanotube (CNT) transistors without doping. The ambipolar CNT transistors automatically configure themselves to play a role as an n-type or p-type transistor in a logic circuit depending on the supply voltage (V(DD)) and ground. A NOR (NAND) gate is adaptively converted to a NAND (NOR) gate. This adaptiveness of logic gates exhibiting two logic gate functions in a single logic circuit offers a new opportunity for designing logic circuits with high integration density for next generation applications.

  18. Demonstration of reconfigurable electro-optical logic with silicon photonic integrated circuits.

    PubMed

    Qiu, Ciyuan; Ye, Xin; Soref, Richard; Yang, Lin; Xu, Qianfan

    2012-10-01

    We demonstrate a scalable and reconfigurable optical directed-logic architecture consisting of a regular array of integrated optical switches based on microring resonators. The switches are controlled by electrical input logic signals through embedded p-i-n junctions. The circuit can be reconfigured to perform any combinational logic operation by thermally tuning the operation modes of the switches. Here we show experimentally a directed logic circuit based on a 2×2 array of switches. The circuit is reconfigured to perform arbitrary two-input logic functions.

  19. THRESHOLD LOGIC IN ARTIFICIAL INTELLIGENCE

    DTIC Science & Technology

    COMPUTER LOGIC, ARTIFICIAL INTELLIGENCE , BIONICS, GEOMETRY, INPUT OUTPUT DEVICES, LINEAR PROGRAMMING, MATHEMATICAL LOGIC, MATHEMATICAL PREDICTION, NETWORKS, PATTERN RECOGNITION, PROBABILITY, SWITCHING CIRCUITS, SYNTHESIS

  20. Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates

    NASA Astrophysics Data System (ADS)

    Choi, Jinyong; Yun, Junggwon; Cho, Kyoungah; Kim, Sangsig

    2014-08-01

    In this study, a NOR-logic circuit is constructed by the vertical stacking of three individual thin-film transistors (TFTs) with the channels of solution-processed chalcogenide nanoparticle (NP) films on a plastic substrate. The NOR-logic circuit consists of two p-type HgTe NP-based TFTs, which act as drivers, and one n-type HgSe NP-based TFT, which plays the role of an active load. The logic operation is observed with a substantial difference in Vout between the logic state of “00” and the other logic states, and the logic swing is ˜60%.

  1. Complementary symmetry nanowire logic circuits: experimental demonstrations and in silico optimizations.

    PubMed

    Sheriff, Bonnie A; Wang, Dunwei; Heath, James R; Kurtin, Juanita N

    2008-09-23

    Complementary symmetry (CS) Boolean logic utilizes both p- and n-type field-effect transistors (FETs) so that an input logic voltage signal will turn one or more p- or n-type FETs on, while turning an equal number of n- or p-type FETs off. The voltage powering the circuit is prevented from having a direct pathway to ground, making the circuit energy efficient. CS circuits are thus attractive for nanowire logic, although they are challenging to implement. CS logic requires a relatively large number of FETs per logic gate, the output logic levels must be fully restored to the input logic voltage level, and the logic gates must exhibit high gain and robust noise margins. We report on CS logic circuits constructed from arrays of 16 nm wide silicon nanowires. Gates up to a complexity of an XOR gate (6 p-FETs and 6 n-FETs) containing multiple nanowires per transistor exhibit signal restoration and can drive other logic gates, implying that large scale logic can be implemented using nanowires. In silico modeling of CS inverters, using experimentally derived look-up tables of individual FET properties, is utilized to provide feedback for optimizing the device fabrication process. Based upon this feedback, CS inverters with a gain approaching 50 and robust noise margins are demonstrated. Single nanowire-based logic gates are also demonstrated, but are found to exhibit significant device-to-device fluctuations.

  2. DOIND: a technique for leakage reduction in nanoscale domino logic circuits

    NASA Astrophysics Data System (ADS)

    Prasad Shah, Ambika; Neema, Vaibhav; Daulatabad, Shreeniwas

    2016-05-01

    A novel DOIND logic approach is proposed for domino logic, which reduces the leakage current with a minimum delay penalty. Simulation is performed at 70 nm technology node with supply voltage 1V for domino logic and DOIND logic based AND, OR, XOR and Half Adder circuits using the tanner EDA tool. Simulation results show that the proposed DOIND approach decreases the average leakage current by 68.83%, 66.6%, 77.86% and 74.34% for 2 input AND, OR, XOR and Half Adder respectively. The proposed approach also has 47.76% improvement in PDAP for the buffer circuit as compared to domino logic.

  3. Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

    PubMed

    Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

    2014-03-01

    Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.

  4. Digital logic circuits in yeast with CRISPR-dCas9 NOR gates.

    PubMed

    Gander, Miles W; Vrana, Justin D; Voje, William E; Carothers, James M; Klavins, Eric

    2017-05-25

    Natural genetic circuits enable cells to make sophisticated digital decisions. Building equally complex synthetic circuits in eukaryotes remains difficult, however, because commonly used components leak transcriptionally, do not arbitrarily interconnect or do not have digital responses. Here, we designed dCas9-Mxi1-based NOR gates in Saccharomyces cerevisiae that allow arbitrary connectivity and large genetic circuits. Because we used the chromatin remodeller Mxi1, our gates showed minimal leak and digital responses. We built a combinatorial library of NOR gates that directly convert guide RNA (gRNA) inputs into gRNA outputs, enabling the gates to be 'wired' together. We constructed logic circuits with up to seven gRNAs, including repression cascades with up to seven layers. Modelling predicted the NOR gates have effectively zero transcriptional leak explaining the limited signal degradation in the circuits. Our approach enabled the largest, eukaryotic gene circuits to date and will form the basis for large, synthetic, cellular decision-making systems.

  5. Digital logic circuits in yeast with CRISPR-dCas9 NOR gates

    PubMed Central

    Gander, Miles W.; Vrana, Justin D.; Voje, William E.; Carothers, James M.; Klavins, Eric

    2017-01-01

    Natural genetic circuits enable cells to make sophisticated digital decisions. Building equally complex synthetic circuits in eukaryotes remains difficult, however, because commonly used components leak transcriptionally, do not arbitrarily interconnect or do not have digital responses. Here, we designed dCas9-Mxi1-based NOR gates in Saccharomyces cerevisiae that allow arbitrary connectivity and large genetic circuits. Because we used the chromatin remodeller Mxi1, our gates showed minimal leak and digital responses. We built a combinatorial library of NOR gates that directly convert guide RNA (gRNA) inputs into gRNA outputs, enabling the gates to be ‘wired' together. We constructed logic circuits with up to seven gRNAs, including repression cascades with up to seven layers. Modelling predicted the NOR gates have effectively zero transcriptional leak explaining the limited signal degradation in the circuits. Our approach enabled the largest, eukaryotic gene circuits to date and will form the basis for large, synthetic, cellular decision-making systems. PMID:28541304

  6. Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators.

    PubMed

    Qiu, Ciyuan; Gao, Weilu; Soref, Richard; Robinson, Jacob T; Xu, Qianfan

    2014-12-15

    Here we demonstrate a reconfigurable electro-optical directed-logic circuit based on a regular array of integrated optical switches. Each 1×1 optical switch consists of a micro-ring resonator with an embedded lateral p-n junction and a micro-heater. We achieve high-speed on-off switching by applying electrical logic signals to the p-n junction. We can configure the operation mode of each switch by thermal tuning the resonance wavelength. The result is an integrated optical circuit that can be reconfigured to perform any combinational logic operation. As a proof-of-principle, we fabricated a multi-spectral directed-logic circuit based on a fourfold array of switches and showed that this circuit can be reconfigured to perform arbitrary two-input logic functions with speeds up to 3  GB/s.

  7. Interconnect-free parallel logic circuits in a single mechanical resonator

    PubMed Central

    Mahboob, I.; Flurin, E.; Nishiguchi, K.; Fujiwara, A.; Yamaguchi, H.

    2011-01-01

    In conventional computers, wiring between transistors is required to enable the execution of Boolean logic functions. This has resulted in processors in which billions of transistors are physically interconnected, which limits integration densities, gives rise to huge power consumption and restricts processing speeds. A method to eliminate wiring amongst transistors by condensing Boolean logic into a single active element is thus highly desirable. Here, we demonstrate a novel logic architecture using only a single electromechanical parametric resonator into which multiple channels of binary information are encoded as mechanical oscillations at different frequencies. The parametric resonator can mix these channels, resulting in new mechanical oscillation states that enable the construction of AND, OR and XOR logic gates as well as multibit logic circuits. Moreover, the mechanical logic gates and circuits can be executed simultaneously, giving rise to the prospect of a parallel logic processor in just a single mechanical resonator. PMID:21326230

  8. Interconnect-free parallel logic circuits in a single mechanical resonator.

    PubMed

    Mahboob, I; Flurin, E; Nishiguchi, K; Fujiwara, A; Yamaguchi, H

    2011-02-15

    In conventional computers, wiring between transistors is required to enable the execution of Boolean logic functions. This has resulted in processors in which billions of transistors are physically interconnected, which limits integration densities, gives rise to huge power consumption and restricts processing speeds. A method to eliminate wiring amongst transistors by condensing Boolean logic into a single active element is thus highly desirable. Here, we demonstrate a novel logic architecture using only a single electromechanical parametric resonator into which multiple channels of binary information are encoded as mechanical oscillations at different frequencies. The parametric resonator can mix these channels, resulting in new mechanical oscillation states that enable the construction of AND, OR and XOR logic gates as well as multibit logic circuits. Moreover, the mechanical logic gates and circuits can be executed simultaneously, giving rise to the prospect of a parallel logic processor in just a single mechanical resonator.

  9. Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

    SciTech Connect

    Mitra, Kalyan Yoti E-mail: enrico.sowade@mb.tu-chemnitz.de; Sowade, Enrico E-mail: enrico.sowade@mb.tu-chemnitz.de; Martínez-Domingo, Carme; Ramon, Eloi; Carrabina, Jordi; Gomes, Henrique Leonel; Baumann, Reinhard R.

    2015-02-17

    Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as 'Bridging Platform'. This transfer to 'Bridging Platform' from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

  10. Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

    NASA Astrophysics Data System (ADS)

    Mitra, Kalyan Yoti; Sowade, Enrico; Martínez-Domingo, Carme; Ramon, Eloi; Carrabina, Jordi; Gomes, Henrique Leonel; Baumann, Reinhard R.

    2015-02-01

    Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as "Bridging Platform". This transfer to "Bridging Platform" from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

  11. Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

    PubMed

    LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

    2014-06-02

    We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

  12. Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model.

    PubMed

    Fadl, Omnia S; Abu-Elyazeed, Mohamed F; Abdelhalim, Mohamed B; Amer, Hassanein H; Madian, Ahmed H

    2016-01-01

    Dynamic power estimation is essential in designing VLSI circuits where many parameters are involved but the only circuit parameter that is related to the circuit operation is the nodes' toggle rate. This paper discusses a deterministic and fast method to estimate the dynamic power consumption for CMOS combinational logic circuits using gate-level descriptions based on the Logic Pictures concept to obtain the circuit nodes' toggle rate. The delay model for the logic gates is the real-delay model. To validate the results, the method is applied to several circuits and compared against exhaustive, as well as Monte Carlo, simulations. The proposed technique was shown to save up to 96% processing time compared to exhaustive simulation.

  13. A differential ICT based molecular probe for multi-ions and multifunction logic circuits.

    PubMed

    Luxami, Vijay; Kumar, Subodh

    2012-04-21

    This paper presents anthraquinone and benzimidazole based hybrid molecular architect as the state of the art for multifunctional molecular logic circuits. The moleculator exhibits differential output behavior towards F(-), Zn(2+) and Cu(2+) ions to provide opportunities for elaboration of XOR, INHIBIT, XNOR, AND, OR, NOR, logic functions and their integrated logic functions half-adder, half-subtractor and comparator within a single molecule. These integral logic functions can be reprogrammed by self-annihilation or by another additional input in the same cell. This single molecule behaves uniquely where different logic functions can be operated and reset by using different inputs and outputs.

  14. Investigation of single-event transient mitigation via pulse quenching in logic circuits

    NASA Astrophysics Data System (ADS)

    Luo, Sheng; He, Wei; Zhang, Zhun; He, Lingxiang; Cao, Jianmin; Wu, Qingyang

    2017-06-01

    A layout technique which can mitigate single-event effect via pulse quenching is tested in this paper. The new limitation of application of this layout technique is affirmed in 65nm technology. The layout design via pulse quenching has no effects in PMOS, but it can work in NMOS in basic logical circuits. Combinational logic circuits still can use this method to defense single-event effect.

  15. An RNAi-enhanced Logic Circuit for Cancer Specific Detection and Destruction

    DTIC Science & Technology

    2010-07-01

    Bcl-2 family: mBax ( Mus musculus ), hBax (Homo sapiens), and its mutant hBax-S184A [4]. A plasmid containing the tested gene was transfected into HEK...0240 TITLE: An RNAi-enhanced logic circuit for cancer specific detection and destruction PRINCIPAL INVESTIGATOR: Ron Weiss...From - To) 1 Jul 2009 – 30 Jun 2010 4. TITLE AND SUBTITLE An RNAi-enhanced logic circuit for cancer specific detection and destruction

  16. Modular multi-level circuits from immobilized DNA-based logic gates.

    PubMed

    Frezza, Brian M; Cockroft, Scott L; Ghadiri, M Reza

    2007-12-05

    One of the fundamental goals of molecular computing is to reproduce the tenets of digital logic, such as component modularity and hierarchical circuit design. An important step toward this goal is the creation of molecular logic gates that can be rationally wired into multi-level circuits. Here we report the design and functional characterization of a complete set of modular DNA-based Boolean logic gates (AND, OR, and AND-NOT) and further demonstrate their wiring into a three-level circuit that exhibits Boolean XOR (exclusive OR) function. The approach is based on solid-supported DNA logic gates that are designed to operate with single-stranded DNA inputs and outputs. Since the solution-phase serves as the communication medium between gates, circuit wiring can be achieved by designating the DNA output of one gate as the input to another. Solid-supported logic gates provide enhanced gate modularity versus solution-phase systems by significantly simplifying the task of choosing appropriate DNA input and output sequences used in the construction of multi-level circuits. The molecular logic gates and circuits reported here were characterized by coupling DNA outputs to a single-input REPORT gate and monitoring the resulting fluorescent output signals.

  17. Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

    SciTech Connect

    Lashin, A. V. Kozyrev, A. V.

    2015-09-15

    One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

  18. Integrated circuits and logic operations based on single-layer MoS2.

    PubMed

    Radisavljevic, Branimir; Whitwick, Michael Brian; Kis, Andras

    2011-12-27

    Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS(2) represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS(2). Our integrated circuits are capable of operating as inverters, converting logical "1" into logical "0", with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS(2) transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.

  19. Monolithic three-dimensional tunnel FET–nanoelectromechanical hybrid reconfigurable logic circuits

    NASA Astrophysics Data System (ADS)

    Kim, Seung Kyu; Choi, Woo Young

    2017-04-01

    Monolithic three-dimensional (M3D) reconfigurable logic (RL) circuits of tunnel field-effect transistors (TFETs)–nanoelectromechanical (NEM) memory switches have been proposed, simulated and demonstrated in order to overcome the limitations of CMOS-only RL circuits. A TFET is considered as one of the most promising extremely-low-power logic devices thanks to its abrupt on–off transition as well as low off-current (I off) and a NEM memory switch is a good solution to signal path routing thanks to its nonvolatile storage of data signal paths and stable rail-to-rail voltage swing. In our proposed RL circuits, NEM memory switch routing parts are integrated over complementary TFET logic circuits by using conventional CMOS backend process.

  20. Cellular signaling circuits interfaced with synthetic, post-translational, negating Boolean logic devices.

    PubMed

    Razavi, Shiva; Su, Steven; Inoue, Takanari

    2014-09-19

    A negating functionality is fundamental to information processing of logic circuits within cells and computers. Aiming to adapt unutilized electronic concepts to the interrogation of signaling circuits in cells, we first took a bottom-up strategy whereby we created protein-based devices that perform negating Boolean logic operations such as NOT, NOR, NAND, and N-IMPLY. These devices function in living cells within a minute by precisely commanding the localization of an activator molecule among three subcellular spaces. We networked these synthetic gates to an endogenous signaling circuit and devised a physiological output. In search of logic functions in signal transduction, we next took a top-down approach and computationally screened 108 signaling pathways to identify commonalities and differences between these biological pathways and electronic circuits. This combination of synthetic and systems approaches will guide us in developing foundations for deconstruction of intricate cell signaling, as well as construction of biomolecular computers.

  1. Cellular Signaling Circuits Interfaced with Synthetic, Post-Translational, Negating Boolean Logic Devices

    PubMed Central

    2014-01-01

    A negating functionality is fundamental to information processing of logic circuits within cells and computers. Aiming to adapt unutilized electronic concepts to the interrogation of signaling circuits in cells, we first took a bottom-up strategy whereby we created protein-based devices that perform negating Boolean logic operations such as NOT, NOR, NAND, and N-IMPLY. These devices function in living cells within a minute by precisely commanding the localization of an activator molecule among three subcellular spaces. We networked these synthetic gates to an endogenous signaling circuit and devised a physiological output. In search of logic functions in signal transduction, we next took a top–down approach and computationally screened 108 signaling pathways to identify commonalities and differences between these biological pathways and electronic circuits. This combination of synthetic and systems approaches will guide us in developing foundations for deconstruction of intricate cell signaling, as well as construction of biomolecular computers. PMID:25000210

  2. Realization of reliable and flexible logic gates using noisy nonlinear circuits

    NASA Astrophysics Data System (ADS)

    Murali, K.; Rajamohamed, I.; Sinha, Sudeshna; Ditto, William L.; Bulsara, Adi R.

    2009-11-01

    It was shown recently [Murali et al., Phys. Rev. Lett. 102, 104101 (2009)] that when one presents two square waves as input to a two-state system, the response of the system can produce a logical output (NOR/OR) with a probability controlled by the interplay between the system noise and the nonlinearity (that characterizes the bistable dynamics). One can switch or "morph" the output into another logic operation (NAND/AND) whose probability displays analogous behavior; the switching is accomplished via a controlled symmetry-breaking dc input. Thus, the interplay of nonlinearity and noise yields flexible and reliable logic behavior, and the natural outcome is, effectively, a logic gate. This "logical stochastic resonance" is demonstrated here via a circuit implementation using a linear resistor, a linear capacitor and four CMOS-transistors with a battery to produce a cubiclike nonlinearity. This circuit is simple, robust, and capable of operating in very high frequency regimes; further, its ease of implementation with integrated circuits and nanoelectronic devices should prove very useful in the context of reliable logic gate implementation in the presence of circuit noise.

  3. Redox Active Binary Logic Gate Circuit for Homeland Security.

    PubMed

    Gaikwad, Pramod; Kadlag, Kavita; Nambiar, Manasa; Devendrachari, Mruthyunjayachari Chattanahalli; Aralekallu, Shambhulinga; Kottaichamy, Alagar Raja; Manzoor Bhat, Zahid; Thimmappa, Ravikumar; Shafi, Shahid Pottachola; Thotiyl, Musthafa Ottakam

    2017-08-01

    Bipolar junction transistors are at the frontiers of modern electronics owing to their discrete voltage regulated operational levels. Here we report a redox active binary logic gate (RLG) which can store a "0" and "1" with distinct operational levels, albeit without an external voltage stimuli. In the RLG, a shorted configuration of half-cell electrodes provided the logic low level and decoupled configuration relaxed the system to the logic high level due to self-charge injection into the redox active polymeric system. Galvanostatic intermittent titration and electrochemical quartz crystal microbalance studies indicate the kinetics of self-charge injection are quite faster and sustainable in polypyrrole based RLG, recovering more than 70% signal in just 14 s with minor signal reduction at the end of 10000 cycles. These remarkable properties of RLGs are extended to design a security sensor which can detect and count intruders in a locality with decent precision and switching speed.

  4. Feasibility study of logic circuits with a spin wave bus.

    PubMed

    Khitun, Alexander; Nikonov, Dmitri E; Bao, Mingqiang; Galatsis, Kosmas; Wang, Kang L

    2007-11-21

    We present a feasibility study of logic circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, logic circuits with a spin wave bus do not use charge as an information carrier. In this work we describe the general concept of logic circuits with a spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. The spin wave bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of a spin wave bus is, however, an interface between electronic circuits and integrated spintronics circuits. The logic circuits with a spin wave bus allow us to provide wireless read-in and read-out.

  5. Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

    PubMed

    Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-27

    Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

  6. Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

    PubMed Central

    Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-01

    Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits. PMID:24463956

  7. Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

    NASA Astrophysics Data System (ADS)

    Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-01

    Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

  8. Logic circuit prototypes for three-terminal magnetic tunnel junctions with mobile domain walls

    NASA Astrophysics Data System (ADS)

    Currivan-Incorvia, J. A.; Siddiqui, S.; Dutta, S.; Evarts, E. R.; Zhang, J.; Bono, D.; Ross, C. A.; Baldo, M. A.

    2016-01-01

    Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation.

  9. Logic circuit prototypes for three-terminal magnetic tunnel junctions with mobile domain walls

    PubMed Central

    Currivan-Incorvia, J. A.; Siddiqui, S.; Dutta, S.; Evarts, E. R.; Zhang, J.; Bono, D.; Ross, C. A.; Baldo, M. A.

    2016-01-01

    Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation. PMID:26754412

  10. Logic circuit prototypes for three-terminal magnetic tunnel junctions with mobile domain walls.

    PubMed

    Currivan-Incorvia, J A; Siddiqui, S; Dutta, S; Evarts, E R; Zhang, J; Bono, D; Ross, C A; Baldo, M A

    2016-01-12

    Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation.

  11. Towards electromechanical computation: An alternative approach to realize complex logic circuits

    NASA Astrophysics Data System (ADS)

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-08-01

    Electromechanical computing based on micro/nano resonators has recently attracted significant attention. However, full implementation of this technology has been hindered by the difficulty in realizing complex logic circuits. We report here an alternative approach to realize complex logic circuits based on multiple MEMS resonators. As case studies, we report the construction of a single-bit binary comparator, a single-bit 4-to-2 encoder, and parallel XOR/XNOR and AND/NOT logic gates. Toward this, several microresonators are electrically connected and their resonance frequencies are tuned through an electrothermal modulation scheme. The microresonators operating in the linear regime do not require large excitation forces, and work at room temperature and at modest air pressure. This study demonstrates that by reconfiguring the same basic building block, tunable resonator, several essential complex logic functions can be achieved.

  12. Quaternary Galois field adder based all-optical multivalued logic circuits.

    PubMed

    Chattopadhyay, Tanay; Taraphdar, Chinmoy; Roy, Jitendra Nath

    2009-08-01

    Galois field (GF) algebraic expressions have been found to be promising choices for reversible and quantum implementation of multivalued logic. For the first time to our knowledge, we developed GF(4) adder multivalued (four valued) logic circuits in an all-optical domain. The principle and possibilities of an all-optical GF(4) adder circuit are described. The theoretical model is presented and verified through numerical simulation. The quaternary inverter, successor, clockwise cycle, and counterclockwise cycle gates are proposed with the help of the all-optical GF(4) adder circuit. In this scheme different quaternary logical states are represented by different polarized light. A terahertz optical asymmetric demultiplexer interferometric switch plays an important role in this scheme.

  13. Experimental investigation of a four-qubit linear-optical quantum logic circuit

    PubMed Central

    Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.

    2016-01-01

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses. PMID:27647176

  14. CMOS-based carbon nanotube pass-transistor logic integrated circuits

    PubMed Central

    Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

    2012-01-01

    Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

  15. Energy-Efficient and Secure S-Box circuit using Symmetric Pass Gate Adiabatic Logic

    SciTech Connect

    Kumar, Dinesh; Thapliyal, Himanshu; Mohammad, Azhar; Singh, Vijay; Perumalla, Kalyan S

    2016-01-01

    Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for lowpower portable electronic devices and Internet-of-Things (IoT) based electronic devices.

  16. CMOS-based carbon nanotube pass-transistor logic integrated circuits.

    PubMed

    Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

    2012-02-14

    Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration.

  17. Logic circuits based on individual semiconducting and metallic carbon-nanotube devices.

    PubMed

    Ryu, Hyeyeon; Kälblein, Daniel; Weitz, R Thomas; Ante, Frederik; Zschieschang, Ute; Kern, Klaus; Schmidt, Oliver G; Klauk, Hagen

    2010-11-26

    Nanoscale transistors employing an individual semiconducting carbon nanotube as the channel hold great potential for logic circuits with large integration densities that can be manufactured on glass or plastic substrates. Carbon nanotubes are usually produced as a mixture of semiconducting and metallic nanotubes. Since only semiconducting nanotubes yield transistors, the metallic nanotubes are typically not utilized. However, integrated circuits often require not only transistors, but also resistive load devices. Here we show that many of the metallic carbon nanotubes that are deposited on the substrate along with the semiconducting nanotubes can be conveniently utilized as load resistors with favorable characteristics for the design of integrated circuits. We also demonstrate the fabrication of arrays of transistors and resistors, each based on an individual semiconducting or metallic carbon nanotube, and their integration on glass substrates into logic circuits with switching frequencies of up to 500 kHz using a custom-designed metal interconnect layer.

  18. Designing of Low-Power VLSI Circuits using Non-Clocked Logic Style

    NASA Astrophysics Data System (ADS)

    Sharma, Vishal; Srivastava, Jitendra Kaushal

    2012-08-01

    Due to the trade-off between power, area and performance, various efforts have been done. This work is also based to reduce the power dissipation of the vlsi circuits with the performance upto the acceptable level. The dominant term in a well designed vlsi circuit is the switching power and low-power design thus becomes the task of minimizing this switching power. So, to design a low-power vlsi circuit, it is preferable to use Nonclocked logic styles as they have less switching power. In this work various Non-clocked logic styles are compared by performing transistor level simulations for half adder circuit using TSMC 0.18 µm Technology and Eldo simulator of Mentor graphics.

  19. A hybrid nanomemristor/transistor logic circuit capable of self-programming.

    PubMed

    Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

    2009-02-10

    Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

  20. Off-Line Testing for Bridge Faults in CMOS Domino Logic Circuits

    NASA Technical Reports Server (NTRS)

    Bennett, K.; Lala, P. K.; Busaba, F.

    1997-01-01

    Bridge faults, especially in CMOS circuits, have unique characteristics which make them difficult to detect during testing. This paper presents a technique for detecting bridge faults which have an effect on the output of CMOS Domino logic circuits. The faults are modeled at the transistor level and this technique is based on analyzing the off-set of the function during off-line testing.

  1. Novel shift register eliminates logic gates and power switching circuits

    NASA Technical Reports Server (NTRS)

    Cliff, R. A.

    1971-01-01

    Register requiring two integrated circuits per stage has nominal power dissipation of 3.5 mW per stage, its use eliminates reset pulse, allowing data transfer to occur in less than 1 microsecond, and eliminates power application to both right and left portions of the register simultaneously.

  2. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    NASA Technical Reports Server (NTRS)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  3. Quantum Approaches to Logic Circuit Synthesis and Testing

    DTIC Science & Technology

    2006-06-01

    STATEMENT APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED. PA#06-445 13. SUPPLEMENTARY NOTES 14 . ABSTRACT The overall objective of this...i Table of Contents 1. Executive Summary 1 2. Introduction 2 3. Synthesis of Quantum Circuits 14 4...used by the Apply operation with xi = Var( vf ), xj = Var(vg) and xi < xj meaning that that xi precedes xj in the variable ordering. 11

  4. Microfluidic Pneumatic Logic Circuits and Digital Pneumatic Microprocessors for Integrated Microfluidic Systems

    PubMed Central

    Rhee, Minsoung

    2010-01-01

    We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprecessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner. PMID:19823730

  5. Microfluidic pneumatic logic circuits and digital pneumatic microprocessors for integrated microfluidic systems.

    PubMed

    Rhee, Minsoung; Burns, Mark A

    2009-11-07

    We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprocessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner.

  6. The fundamental Fuzzy logic operators and some complex boolean logic circuits implemented by the chromogenism of a spirooxazine.

    PubMed

    Gentili, Pier Luigi

    2011-12-07

    1,3-Dihydro-1,3,3-trimethyl-8'-nitro-spiro[2H-indole-2,3'-[3H]naphth[2,1-b][1,4]oxazine] (SpO) is a photochromic, acidichromic and metallochromic compound. Its chromogenic properties are characterized in acetonitrile, at room temperature. They are exploited to process both boolean and Fuzzy logic. By using HClO(4), AlCl(3) and Cu(ClO(4))(2) as chemical inputs, UV radiation as power supply, and the absorbance at specific wavelengths in the visible as optical output, SpO results in a five-states molecular switch whereby some complex boolean logic circuits are implemented. If the chemical inputs are varied in an analog manner, the solution of SpO assumes an infinite number of colours. Therefore, by choosing the RGB colour coordinates as optical outputs, the fundamental operators of the "infinite-valued" Fuzzy logic are implemented. Particularly, two Fuzzy logic systems are built upon a new defuzzification procedure imitating the way humans perceive colours.

  7. Enzyme-based logic gates and circuits-analytical applications and interfacing with electronics.

    PubMed

    Katz, Evgeny; Poghossian, Arshak; Schöning, Michael J

    2017-01-01

    The paper is an overview of enzyme-based logic gates and their short circuits, with specific examples of Boolean AND and OR gates, and concatenated logic gates composed of multi-step enzyme-biocatalyzed reactions. Noise formation in the biocatalytic reactions and its decrease by adding a "filter" system, converting convex to sigmoid response function, are discussed. Despite the fact that the enzyme-based logic gates are primarily considered as components of future biomolecular computing systems, their biosensing applications are promising for immediate practical use. Analytical use of the enzyme logic systems in biomedical and forensic applications is discussed and exemplified with the logic analysis of biomarkers of various injuries, e.g., liver injury, and with analysis of biomarkers characteristic of different ethnicity found in blood samples on a crime scene. Interfacing of enzyme logic systems with modified electrodes and semiconductor devices is discussed, giving particular attention to the interfaces functionalized with signal-responsive materials. Future perspectives in the design of the biomolecular logic systems and their applications are discussed in the conclusion. Graphical Abstract Various applications and signal-transduction methods are reviewed for enzyme-based logic systems.

  8. Effectiveness of Computer Simulation versus Lab and Sequencing of Instruction in Teaching Logic Circuits.

    ERIC Educational Resources Information Center

    Gokhale, Anu A.

    1991-01-01

    Four groups of 24 undergraduates each received the following instruction on logic circuits: (1) lab, then readings; (2) computer simulation, then readings; (3) readings, then lab; and (4) readings, then simulation. Results showed that advance exposure to experiential activity (lab or simulation) aided the learning of unfamiliar technical material…

  9. Effectiveness of Computer Simulation versus Lab, and Sequencing of Instruction, in Teaching Logic Circuits.

    ERIC Educational Resources Information Center

    Gokhale, Anu A.

    The effectiveness of computer simulation versus laboratory procedures in teaching logic circuits was compared. Also investigated was the sequencing of these activities with a reading assignment. Subjects were 96 undergraduates who were tested using different pretests and posttests. An analysis of variance on the data gathered showed that sequence…

  10. Introduction to Number Systems, Boolean Algebra, Logic Circuits. Navy Electricity and Electronics Training Series. Module 13.

    ERIC Educational Resources Information Center

    Naval Education and Training Program Development Center, Pensacola, FL.

    This textbook is one of a series of publications designed to provide information needed by Navy personnel whose duties require an elementary and general knowledge of the fundamental concepts of number systems, logic circuits, and Boolean algebra. Topic 1, Number Systems, describes the radix; the positional notation; the decimal, binary, octal, and…

  11. Designing reversible arithmetic, logic circuit to implement micro-operation in quantum computation

    NASA Astrophysics Data System (ADS)

    Kalita, Gunajit; Saikia, Navajit

    2016-10-01

    The futuristic computing is desired to be more power full with low-power consumption. That is why quantum computing has been a key area of research for quite some time and is getting more and more attention. Quantum logic being reversible, a significant amount of contributions has been reported on reversible logic in recent times. Reversible circuits are essential parts of quantum computers, and hence their designs are of great importance. In this paper, designs of reversible circuits are proposed using a recently proposed reversible gate for arithmetic and logic operations to implement various micro-operations (simple add and subtract, add with carry, subtract with borrow, transfer, incrementing, decrementing etc., and logic operations like XOR, XNOR, complementing etc.) in a reversible computer like quantum computer. The two new reversible designs proposed here for half adder and full adders are also used in the presented reversible circuits to implement various microoperations. The quantum costs of these designs are comparable. Many of the implemented micro-operations are not seen in previous literatures. The performances of the proposed circuits are compared with existing designs wherever available.

  12. An RNAi-Enhanced Logic Circuit for Cancer Specific Detection and Destruction

    DTIC Science & Technology

    2013-02-01

    cancer specific detection and destruction. PRINCIPAL INVESTIGATOR: Ron Weiss...2013 4. TITLE AND SUBTITLE 5a. CONTRACT NUMBER An RNAi-enhanced logic circuit for cancer specific detection and destruction. 5b. GRANT NUMBER...ABSTRACT Modern breast cancer therapies utilize non-specific approaches to kill or remove cancerous cells, inflicting significant collateral damage to

  13. Single-flux-quantum logic circuits exploiting collision-based fusion gates

    NASA Astrophysics Data System (ADS)

    Asai, T.; Yamada, K.; Amemiya, Y.

    2008-09-01

    We propose a single-flux-quantum (SFQ) logic circuit based on the fusion computing systems--collision-based and reaction-diffusion fusion computers. A fusion computing system consists of regularly arrayed unit cells (fusion gates), where each unit has two input arms and two output arms and is connected to its neighboring cells with the arms. We designed functional SFQ circuits that implemented the fusion computation. The unit cell was able to be made with ten Josephson junctions. Circuit simulation with standard Nb/Al-AlOx/Nb 2.5-kA/cm 2 process parameters showed that the SFQ fusion computing systems could operate at 10 GHz clock.

  14. Statistical analysis of error rate of large-scale single flux quantum logic circuit by considering fluctuation of timing parameters

    NASA Astrophysics Data System (ADS)

    Yamanashi, Yuki; Masubuchi, Kota; Yoshikawa, Nobuyuki

    2016-11-01

    The relationship between the timing margin and the error rate of the large-scale single flux quantum logic circuits is quantitatively investigated to establish a timing design guideline. We observed that the fluctuation in the set-up/hold time of single flux quantum logic gates caused by thermal noises is the most probable origin of the logical error of the large-scale single flux quantum circuit. The appropriate timing margin for stable operation of the large-scale logic circuit is discussed by taking the fluctuation of setup/hold time and the timing jitter in the single flux quantum circuits. As a case study, the dependence of the error rate of the 1-million-bit single flux quantum shift register on the timing margin is statistically analyzed. The result indicates that adjustment of timing margin and the bias voltage is important for stable operation of a large-scale SFQ logic circuit.

  15. Peptide logic circuits based on chemoenzymatic ligation for programmable cell apoptosis.

    PubMed

    Li, Yong; Sun, Sujuan; Fan, Lin; Hu, Shanfang; Huan, Yan; Zhang, Ke; Nie, Zhou; Yao, Shouzhuo

    2017-10-03

    A novel and versatile peptide-based bio-logic system capable of regulating cell function is developed using sortase A (SrtA), a peptide ligation enzyme, as a generic processor. By modular peptide design, we demonstrate that mammalian cells apoptosis can be programmed by peptide-based logic operations, including binary and combination gates (AND, INHIBIT, OR, and AND-INHIBIT), and a complex sequential logic circuit (multi-input keypad lock). Moreover, a proof-of-concept peptide regulatory circuit was developed to analyze the expression profile of cell-secreted protein biomarkers and trigger cancer-cell-specific apoptosis. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Graphene-based non-Boolean logic circuits

    NASA Astrophysics Data System (ADS)

    Liu, Guanxiong; Ahsan, Sonia; Khitun, Alexander G.; Lake, Roger K.; Balandin, Alexander A.

    2013-10-01

    Graphene revealed a number of unique properties beneficial for electronics. However, graphene does not have an energy band-gap, which presents a serious hurdle for its applications in digital logic gates. The efforts to induce a band-gap in graphene via quantum confinement or surface functionalization have not resulted in a breakthrough. Here we show that the negative differential resistance experimentally observed in graphene field-effect transistors of "conventional" design allows for construction of viable non-Boolean computational architectures with the gapless graphene. The negative differential resistance—observed under certain biasing schemes—is an intrinsic property of graphene, resulting from its symmetric band structure. Our atomistic modeling shows that the negative differential resistance appears not only in the drift-diffusion regime but also in the ballistic regime at the nanometer-scale—although the physics changes. The obtained results present a conceptual change in graphene research and indicate an alternative route for graphene's applications in information processing.

  17. Solution of radio-electronic circuit design problems by means of logic programming methods

    NASA Astrophysics Data System (ADS)

    Norenkov, I. P.; Fedoruk, V. G.; Chermoshentsev, S. F.

    1989-02-01

    It is shown that circuit-design problems involving the solution of systems of logic equations can be treated by logic programming methods using PROLOG or analogous systems executing a specific search strategy. The adaptation of the system to the problem to be solved is realized not only by the appropriate choice of the representation of the input data in the forms of facts or rules, but also by an appropriate choice of the sequence of the computation of the facts in the data base and conjunctions in the body of the rule.

  18. Placing prediction into the fear circuit

    PubMed Central

    McNally, Gavan P.; Johansen, Joshua P.; Blair, Hugh T.

    2011-01-01

    Pavlovian fear conditioning depends on synaptic plasticity at amygdala neurons. Here we review recent electrophysiological, molecular, and behavioral evidence suggesting the existence of a distributed neural circuitry regulating amygdala synaptic plasticity during fear learning. This circuitry, which involves projections from the midbrain periaqueductal gray (PAG) region, can be linked to prediction error and expectation modulation of fear learning as described by associative and computational learning models. It controls whether, and how much, fear learning occurs by signalling aversive events when they are unexpected. Functional neuroimaging and clinical studies indicate that this prediction circuit is recruited in humans during fear learning and contributes to exposure-based treatments for clinical anxiety. This aversive prediction error circuit may represent a conserved mechanism for regulating fear learning in mammals. PMID:21549434

  19. Implementation of Complex Biological Logic Circuits Using Spatially Distributed Multicellular Consortia.

    PubMed

    Macia, Javier; Manzoni, Romilde; Conde, Núria; Urrios, Arturo; de Nadal, Eulàlia; Solé, Ricard; Posas, Francesc

    2016-02-01

    Engineered synthetic biological devices have been designed to perform a variety of functions from sensing molecules and bioremediation to energy production and biomedicine. Notwithstanding, a major limitation of in vivo circuit implementation is the constraint associated to the use of standard methodologies for circuit design. Thus, future success of these devices depends on obtaining circuits with scalable complexity and reusable parts. Here we show how to build complex computational devices using multicellular consortia and space as key computational elements. This spatial modular design grants scalability since its general architecture is independent of the circuit's complexity, minimizes wiring requirements and allows component reusability with minimal genetic engineering. The potential use of this approach is demonstrated by implementation of complex logical functions with up to six inputs, thus demonstrating the scalability and flexibility of this method. The potential implications of our results are outlined.

  20. Defect-tolerant demultiplexer circuits based on threshold logic and coding.

    PubMed

    Roth, Ron M; Robinett, Warren; Kuekes, Philip J; Williams, R Stanley

    2009-04-01

    A defect-tolerant design is presented for a demultiplexer circuit that is based on threshold logic. The design uses coding both to handle (i.e., tolerate) defects in the circuit and to improve the voltage margin in its gates. The following model is assumed for the defects: configured junctions can become either stuck open or stuck closed, and non-configured junctions can become shorted. Two realizations of the circuit are presented: one using conventional transistor circuitry, and the other using nanoscale components and wiring. The design presented in this paper demonstrates how a standard digital building-block circuit-a demultiplexer-can be efficiently protected against several types of defect simultaneously.

  1. Synthesizing a novel genetic sequential logic circuit: a push-on push-off switch

    PubMed Central

    Lou, Chunbo; Liu, Xili; Ni, Ming; Huang, Yiqi; Huang, Qiushi; Huang, Longwen; Jiang, Lingli; Lu, Dan; Wang, Mingcong; Liu, Chang; Chen, Daizhuo; Chen, Chongyi; Chen, Xiaoyue; Yang, Le; Ma, Haisu; Chen, Jianguo; Ouyang, Qi

    2010-01-01

    Design and synthesis of basic functional circuits are the fundamental tasks of synthetic biologists. Before it is possible to engineer higher-order genetic networks that can perform complex functions, a toolkit of basic devices must be developed. Among those devices, sequential logic circuits are expected to be the foundation of the genetic information-processing systems. In this study, we report the design and construction of a genetic sequential logic circuit in Escherichia coli. It can generate different outputs in response to the same input signal on the basis of its internal state, and ‘memorize' the output. The circuit is composed of two parts: (1) a bistable switch memory module and (2) a double-repressed promoter NOR gate module. The two modules were individually rationally designed, and they were coupled together by fine-tuning the interconnecting parts through directed evolution. After fine-tuning, the circuit could be repeatedly, alternatively triggered by the same input signal; it functions as a push-on push-off switch. PMID:20212522

  2. Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

    NASA Astrophysics Data System (ADS)

    Crha, Adam; Růžička, Richard; Šimek, Václav

    2016-01-01

    Multifunctional logic continuously becomes an important way how to implement compact and cheap circuits with intrinsic reconfiguration features. Polymorphic electronics concept with its substantial technological independency opens a way to fulfil this objective through the adoption of emerging semiconductor technologies and advanced synthesis methods. The paper comes with a proposal of a novel synthesis method oriented on the exploitation of polymorphic electronics principles. Key part of it is based on Boolean divisor identification and function kernelling technique. The proposed method is evaluated with several test circuits.

  3. Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates

    NASA Astrophysics Data System (ADS)

    Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei

    2017-04-01

    Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.

  4. Fully Printed Stretchable Thin-Film Transistors and Integrated Logic Circuits.

    PubMed

    Cai, Le; Zhang, Suoming; Miao, Jinshui; Yu, Zhibin; Wang, Chuan

    2016-12-27

    This paper reports intrinsically stretchable thin-film transistors (TFTs) and integrated logic circuits directly printed on elastomeric polydimethylsiloxane (PDMS) substrates. The printed devices utilize carbon nanotubes and a type of hybrid gate dielectric comprising PDMS and barium titanate (BaTiO3) nanoparticles. The BaTiO3/PDMS composite simultaneously provides high dielectric constant, superior stretchability, low leakage, as well as good printability and compatibility with the elastomeric substrate. Both TFTs and logic circuits can be stretched beyond 50% strain along either channel length or channel width directions for thousands of cycles while showing no significant degradation in electrical performance. This work may offer an entry into more sophisticated stretchable electronic systems with monolithically integrated sensors, actuators, and displays, fabricated by scalable and low-cost methods for real life applications.

  5. Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates

    NASA Astrophysics Data System (ADS)

    Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei

    2016-12-01

    Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.

  6. Multi-valued logic circuits using hybrid circuit consisting of three gates single-electron transistors (TG-SETs) and MOSFETs.

    PubMed

    Shin, SeungJun; Yu, YunSeop; Choi, JungBum

    2008-10-01

    New multi-valued logic (MVL) families using the hybrid circuits consisting of three gates single-electron transistors (TG-SETs) and a metal-oxide-semiconductor field-effect transistor (MOSFET) are proposed. The use of SETs offers periodic literal characteristics due to Coulomb oscillation of SET, which allows a realization of binary logic (BL) circuits as well as multi-valued logic (MVL) circuits. The basic operations of the proposed MVL families are successfully confirmed through SPICE circuit simulation based on the physical device model of a TG-SET. The proposed MVL circuits are found to be much faster, but much larger power consumption than a previously reported MVL, and they have a trade-off between speed and power consumption. As an example to apply the newly developed MVL families, a half-adder is introduced.

  7. Flux qubit interaction with rapid single-flux quantum logic circuits: Control and readout

    NASA Astrophysics Data System (ADS)

    Klenov, N. V.; Kuznetsov, A. V.; Soloviev, I. I.; Bakurskiy, S. V.; Denisenko, M. V.; Satanin, A. M.

    2017-07-01

    We present the results of an analytical study and numerical simulation of the dynamics of a superconducting three-Josephson-junction (3JJ) flux qubit magnetically coupled with rapid single-flux quantum (RSFQ) logic circuit, which demonstrate the fundamental possibility of implementing the simplest logic operations at picosecond times, as well as rapid non-destructive readout. It is shown that when solving optimization problems, the qubit dynamics can be conveniently interpreted as a precession of the magnetic moment vector around the direction of the magnetic field. In this case, the role of magnetic field components is played by combinations of the Hamiltonian matrix elements, and the role of the magnetic moment is played by the Bloch vector. Features of the 3JJ qubit model are discussed during the analysis of how the qubit is affected by exposure to a short control pulse, as are the similarities between the Bloch and Landau-Lifshitz-Gilbert equations. An analysis of solutions to the Bloch equations made it possible to develop recommendations for the use of readout RSFQ circuits in implementing an optimal interface between the classical and quantum parts of the computer system, as well as to justify the use of single-quantum logic in order to control superconducting quantum circuits on a chip.

  8. Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

    NASA Astrophysics Data System (ADS)

    Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

    2017-05-01

    A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

  9. Catalytic nucleic acids (DNAzymes) as functional units for logic gates and computing circuits: from basic principles to practical applications.

    PubMed

    Orbach, Ron; Willner, Bilha; Willner, Itamar

    2015-03-11

    This feature article addresses the implementation of catalytic nucleic acids as functional units for the construction of logic gates and computing circuits, and discusses the future applications of these systems. The assembly of computational modules composed of DNAzymes has led to the operation of a universal set of logic gates, to field programmable logic gates and computing circuits, to the development of multiplexers/demultiplexers, and to full-adder systems. Also, DNAzyme cascades operating as logic gates and computing circuits were demonstrated. DNAzyme logic systems find important practical applications. These include the use of DNAzyme-based systems for sensing and multiplexed analyses, for the development of controlled release and drug delivery systems, for regulating intracellular biosynthetic pathways, and for the programmed synthesis and operation of cascades.

  10. Circuit Sense for Elementary Teachers and Students: Understanding and Building Simple Logic Circuits.

    ERIC Educational Resources Information Center

    Houghton, Janaye Matteson; Houghton, Robert S.

    Today and in the future, critical toolmaking advances will need to be made in the area of circuit design, construction, and implementation. Traditional school curriculum has sidestepped the area of tool design, especially at the elementary level. This publication addresses a calling for a new curriculum direction, based not only on the study of…

  11. Circuit Sense for Elementary Teachers and Students: Understanding and Building Simple Logic Circuits.

    ERIC Educational Resources Information Center

    Houghton, Janaye Matteson; Houghton, Robert S.

    Today and in the future, critical toolmaking advances will need to be made in the area of circuit design, construction, and implementation. Traditional school curriculum has sidestepped the area of tool design, especially at the elementary level. This publication addresses a calling for a new curriculum direction, based not only on the study of…

  12. Implementation of Complex Biological Logic Circuits Using Spatially Distributed Multicellular Consortia

    PubMed Central

    Urrios, Arturo; de Nadal, Eulàlia; Solé, Ricard; Posas, Francesc

    2016-01-01

    Engineered synthetic biological devices have been designed to perform a variety of functions from sensing molecules and bioremediation to energy production and biomedicine. Notwithstanding, a major limitation of in vivo circuit implementation is the constraint associated to the use of standard methodologies for circuit design. Thus, future success of these devices depends on obtaining circuits with scalable complexity and reusable parts. Here we show how to build complex computational devices using multicellular consortia and space as key computational elements. This spatial modular design grants scalability since its general architecture is independent of the circuit’s complexity, minimizes wiring requirements and allows component reusability with minimal genetic engineering. The potential use of this approach is demonstrated by implementation of complex logical functions with up to six inputs, thus demonstrating the scalability and flexibility of this method. The potential implications of our results are outlined. PMID:26829588

  13. Cell-to-Cell Communication Circuits: Quantitative Analysis of Synthetic Logic Gates.

    PubMed

    Hoffman-Sommer, Marta; Supady, Adriana; Klipp, Edda

    2012-01-01

    One of the goals in the field of synthetic biology is the construction of cellular computation devices that could function in a manner similar to electronic circuits. To this end, attempts are made to create biological systems that function as logic gates. In this work we present a theoretical quantitative analysis of a synthetic cellular logic-gates system, which has been implemented in cells of the yeast Saccharomyces cerevisiae (Regot et al., 2011). It exploits endogenous MAP kinase signaling pathways. The novelty of the system lies in the compartmentalization of the circuit where all basic logic gates are implemented in independent single cells that can then be cultured together to perform complex logic functions. We have constructed kinetic models of the multicellular IDENTITY, NOT, OR, and IMPLIES logic gates, using both deterministic and stochastic frameworks. All necessary model parameters are taken from literature or estimated based on published kinetic data, in such a way that the resulting models correctly capture important dynamic features of the included mitogen-activated protein kinase pathways. We analyze the models in terms of parameter sensitivity and we discuss possible ways of optimizing the system, e.g., by tuning the culture density. We apply a stochastic modeling approach, which simulates the behavior of whole populations of cells and allows us to investigate the noise generated in the system; we find that the gene expression units are the major sources of noise. Finally, the model is used for the design of system modifications: we show how the current system could be transformed to operate on three discrete values.

  14. How Young Children Understand Electric Circuits: Prediction, Explanation and Exploration

    ERIC Educational Resources Information Center

    Glauert, Esme Bridget

    2009-01-01

    This paper reports findings from a study of young children's views about electric circuits. Twenty-eight children aged 5 and 6 years were interviewed. They were shown examples of circuits and asked to predict whether they would work and explain why. They were then invited to try out some of the circuit examples or make circuits of their own…

  15. How Young Children Understand Electric Circuits: Prediction, Explanation and Exploration

    ERIC Educational Resources Information Center

    Glauert, Esme Bridget

    2009-01-01

    This paper reports findings from a study of young children's views about electric circuits. Twenty-eight children aged 5 and 6 years were interviewed. They were shown examples of circuits and asked to predict whether they would work and explain why. They were then invited to try out some of the circuit examples or make circuits of their own…

  16. A modular cell-based biosensor using engineered genetic logic circuits to detect and integrate multiple environmental signals.

    PubMed

    Wang, Baojun; Barahona, Mauricio; Buck, Martin

    2013-02-15

    Cells perceive a wide variety of cellular and environmental signals, which are often processed combinatorially to generate particular phenotypic responses. Here, we employ both single and mixed cell type populations, pre-programmed with engineered modular cell signalling and sensing circuits, as processing units to detect and integrate multiple environmental signals. Based on an engineered modular genetic AND logic gate, we report the construction of a set of scalable synthetic microbe-based biosensors comprising exchangeable sensory, signal processing and actuation modules. These cellular biosensors were engineered using distinct signalling sensory modules to precisely identify various chemical signals, and combinations thereof, with a quantitative fluorescent output. The genetic logic gate used can function as a biological filter and an amplifier to enhance the sensing selectivity and sensitivity of cell-based biosensors. In particular, an Escherichia coli consortium-based biosensor has been constructed that can detect and integrate three environmental signals (arsenic, mercury and copper ion levels) via either its native two-component signal transduction pathways or synthetic signalling sensors derived from other bacteria in combination with a cell-cell communication module. We demonstrate how a modular cell-based biosensor can be engineered predictably using exchangeable synthetic gene circuit modules to sense and integrate multiple-input signals. This study illustrates some of the key practical design principles required for the future application of these biosensors in broad environmental and healthcare areas. Copyright © 2012 Elsevier B.V. All rights reserved.

  17. A modular cell-based biosensor using engineered genetic logic circuits to detect and integrate multiple environmental signals

    PubMed Central

    Wang, Baojun; Barahona, Mauricio; Buck, Martin

    2013-01-01

    Cells perceive a wide variety of cellular and environmental signals, which are often processed combinatorially to generate particular phenotypic responses. Here, we employ both single and mixed cell type populations, pre-programmed with engineered modular cell signalling and sensing circuits, as processing units to detect and integrate multiple environmental signals. Based on an engineered modular genetic AND logic gate, we report the construction of a set of scalable synthetic microbe-based biosensors comprising exchangeable sensory, signal processing and actuation modules. These cellular biosensors were engineered using distinct signalling sensory modules to precisely identify various chemical signals, and combinations thereof, with a quantitative fluorescent output. The genetic logic gate used can function as a biological filter and an amplifier to enhance the sensing selectivity and sensitivity of cell-based biosensors. In particular, an Escherichia coli consortium-based biosensor has been constructed that can detect and integrate three environmental signals (arsenic, mercury and copper ion levels) via either its native two-component signal transduction pathways or synthetic signalling sensors derived from other bacteria in combination with a cell-cell communication module. We demonstrate how a modular cell-based biosensor can be engineered predictably using exchangeable synthetic gene circuit modules to sense and integrate multiple-input signals. This study illustrates some of the key practical design principles required for the future application of these biosensors in broad environmental and healthcare areas. PMID:22981411

  18. Designing sequential transcription logic: a simple genetic circuit for conditional memory.

    PubMed

    Fritz, Georg; Buchler, Nicolas E; Hwa, Terence; Gerland, Ulrich

    2007-04-01

    The ability to learn and respond to recurrent events depends on the capacity to remember transient biological signals received in the past. Moreover, it may be desirable to remember or ignore these transient signals conditioned upon other signals that are active at specific points in time or in unique environments. Here, we propose a simple genetic circuit in bacteria that is capable of conditionally memorizing a signal in the form of a transcription factor concentration. The circuit behaves similarly to a "data latch" in an electronic circuit, i.e. it reads and stores an input signal only when conditioned to do so by a "read command." Our circuit is of the same size as the well-known genetic toggle switch (an unconditional latch) which consists of two mutually repressing genes, but is complemented with a "regulatory front end" involving protein heterodimerization as a simple way to implement conditional control. Deterministic and stochastic analysis of the circuit dynamics indicate that an experimental implementation is feasible based on well-characterized genes and proteins. It is not known, to which extent molecular networks are able to conditionally store information in natural contexts for bacteria. However, our results suggest that such sequential logic elements may be readily implemented by cells through the combination of existing protein-protein interactions and simple transcriptional regulation.

  19. Mixed logic style adder circuit designed and fabricated using SOI substrate for irradiation-hardened experiment

    NASA Astrophysics Data System (ADS)

    Yuan, Shoucai; Liu, Yamei

    2016-08-01

    This paper proposed a rail to rail swing, mixed logic style 28-transistor 1-bit full adder circuit which is designed and fabricated using silicon-on-insulator (SOI) substrate with 90 nm gate length technology. The main goal of our design is space application where circuits may be damaged by outer space radiation; so the irradiation-hardened technique such as SOI structure should be used. The circuit's delay, power and power-delay product (PDP) of our proposed gate diffusion input (GDI)-based adder are HSPICE simulated and compared with other reported high-performance 1-bit adder. The GDI-based 1-bit adder has 21.61% improvement in delay and 18.85% improvement in PDP, over the reported 1-bit adder. However, its power dissipation is larger than that reported with 3.56% increased but is still comparable. The worst case performance of proposed 1-bit adder circuit is also seen to be less sensitive to variations in power supply voltage (VDD) and capacitance load (CL), over a wide range from 0.6 to 1.8 V and 0 to 200 fF, respectively. The proposed and reported 1-bit full adders are all layout designed and wafer fabricated with other circuits/systems together on one chip. The chip measurement and analysis has been done at VDD = 1.2 V, CL = 20 fF, and 200 MHz maximum input signal frequency with temperature of 300 K.

  20. A new way of predicting cement strength -- Fuzzy logic

    SciTech Connect

    Gao Faliang

    1997-06-01

    This paper is to analyze the fuzzy logic method of predicting cement strength and to calculate some samples with fuzzy models. In order to compare, samples of them are calculated with regression method. All of results are shown in both root mean square error and scattered map.

  1. Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

    PubMed

    Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

    2013-05-01

    ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

  2. Si-nanowire-array-based NOT-logic circuits constructed on plastic substrates using top-down methods.

    PubMed

    Jeon, Youngin; Kang, Jeongmin; Lee, Myeongwon; Moon, Taeho; Kim, Sangsig

    2013-05-01

    Si-nanowire (NW)-array-based NOT-logic circuits were constructed on plastic substrates. The Si-NW arrays were fabricated on a Si wafer through top-down methods, including conventional photolithography and crystallographic wet etching, and transferred onto the plastic substrates. Two field-effect transistors were fabricated on a single Si-NW array composed of five nanowires aligned in parallel and connected in series to form NOT-logic circuits. The excellent flexibility of the fabricated device was confirmed by bending-cycling tests. The voltage-transfer curve of the NOT-logic circuits showed an inverting operation with a logic swing of -92% and voltage gain of -2.5.

  3. Theory, design, and micron-scale implementation of fully optical logic gates and optical clock circuits

    NASA Astrophysics Data System (ADS)

    Rahmani Nejad, Akbar

    2009-08-01

    In this paper, it is tried to provide an innovative method to overcome several limitations of state of the art of logical gates and microprocessors, by implementation of micron-scaled optical gates. This technology can overcome such limitations, i.e. processing speed, heat dissipation, electromagnetic radiation and electrical noise immunity. This technology can be fully or partially feasible by substitution of common semiconductor technology with optical logic gates. By implementation of micron-scale optical fiber, optical couplers, fiber optical amplifiers, or fiber lasers, optical attenuators, optical fiber brag grating, femto-second optical lasers, and implementation of fundamental properties of optical coherent light, e.g. superposition, interference, phase delay, etc, it is possible to fabricate micron-scale universal logical gates, i.e. optical NAND gates, optical NOR gates, optical Exclusive-OR, optical exclusive-NOR gates and subsequently fabrication of sequential circuits (optical flip-flops), that all are fundamental blocks of microprocessors. Optical coherent light is produced by femtosecond lasers and is supplied to a network of micron-scaled fiber optics, fiber optical lasers, attenuators, fiber optical couplers, and finally are supplied to opto-couplers that change optical signals to electrical signals to be read by output console or to be written on memory cells. It is also possible to implement a combination of optical and semiconductor gates to decrease above mentioned limitations. The method of fabrication of optical gates is discussed in details and all necessary logical and technical aspects are provided too. The fundamental implemented aspect is superposition of coherent lights in fiber optic couplers. By implementation of femtosecond laser pulses, it is possible to reach to much higher frequencies of about hundreds to thousands of terahertz. Alternative optical method is provided here, e.g. implementation of fiber loops as clock circuit or

  4. High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes.

    PubMed

    Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

    2017-09-01

    As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

  5. High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

    NASA Astrophysics Data System (ADS)

    Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

    2017-09-01

    As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

  6. Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

    NASA Astrophysics Data System (ADS)

    Geier, Michael

    Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and

  7. Plasmonic-multimode-interference-based logic circuit with simple phase adjustment

    NASA Astrophysics Data System (ADS)

    Ota, Masashi; Sumimura, Asahi; Fukuhara, Masashi; Ishii, Yuya; Fukuda, Mitsuo

    2016-04-01

    All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

  8. Plasmonic-multimode-interference-based logic circuit with simple phase adjustment.

    PubMed

    Ota, Masashi; Sumimura, Asahi; Fukuhara, Masashi; Ishii, Yuya; Fukuda, Mitsuo

    2016-04-18

    All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

  9. Development of an optical parallel logic device and a half-adder circuit for digital optical processing

    NASA Technical Reports Server (NTRS)

    Athale, R. A.; Lee, S. H.

    1978-01-01

    The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.

  10. Development of an optical parallel logic device and a half-adder circuit for digital optical processing

    NASA Technical Reports Server (NTRS)

    Athale, R. A.; Lee, S. H.

    1978-01-01

    The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.

  11. Proof of concept of directed OR/NOR and AND/NAND logic circuit consisting of two parallel microring resonators.

    PubMed

    Tian, Yonghui; Zhang, Lei; Ji, Ruiqiang; Yang, Lin; Zhou, Ping; Chen, Hongtao; Ding, Jianfeng; Zhu, Weiwei; Lu, Yangyang; Jia, Lianxi; Fang, Qing; Yu, Mingbin

    2011-05-01

    We propose and demonstrate a directed OR/NOR and AND/NAND logic circuit consisting of two parallel microring resonators (MRRs). We use two electrical signals representing the two operands of the logical operation to modulate the two MRRs through the thermo-optic effect, respectively. The final operation results are represented by the output optical signals. Both OR/NOR and AND/NAND operations at 10 kbps are demonstrated.

  12. "The developmental and functional logic of neuronal circuits": commentary on the Kavli Prize in Neuroscience.

    PubMed

    Glover, J C

    2009-11-10

    The first Kavli Prize in Neuroscience recognizes a confluence of career achievements that together provide a fundamental understanding of how brain and spinal cord circuits are assembled during development and function in the adult. The members of the Kavli Neuroscience Prize Committee have decided to reward three scientists (Sten Grillner, Thomas Jessell, and Pasko Rakic) jointly "for discoveries on the developmental and functional logic of neuronal circuits". Pasko Rakic performed groundbreaking studies of the developing cerebral cortex, including the discovery of how radial glia guide the neuronal migration that establishes cortical layers and for the radial unit hypothesis and its implications for cortical connectivity and evolution. Thomas Jessell discovered molecular principles governing the specification and patterning of different neuron types and the development of their synaptic interconnection into sensorimotor circuits. Sten Grillner elucidated principles of network organization in the vertebrate locomotor central pattern generator, along with its command systems and sensory and higher order control. The discoveries of Rakic, Jessell and Grillner provide a framework for how neurons obtain their identities and ultimate locations, establish appropriate connections with each other, and how the resultant neuronal networks operate. Their work has significantly advanced our understanding of brain development and function and created new opportunities for the treatment of neurological disorders. Each has pioneered an important area of neuroscience research and left a legacy of exceptional scientific achievement, insight, communication, mentoring and leadership.

  13. Regression Models and Fuzzy Logic Prediction of TBM Penetration Rate

    NASA Astrophysics Data System (ADS)

    Minh, Vu Trieu; Katushin, Dmitri; Antonov, Maksim; Veinthal, Renno

    2017-03-01

    This paper presents statistical analyses of rock engineering properties and the measured penetration rate of tunnel boring machine (TBM) based on the data of an actual project. The aim of this study is to analyze the influence of rock engineering properties including uniaxial compressive strength (UCS), Brazilian tensile strength (BTS), rock brittleness index (BI), the distance between planes of weakness (DPW), and the alpha angle (Alpha) between the tunnel axis and the planes of weakness on the TBM rate of penetration (ROP). Four (4) statistical regression models (two linear and two nonlinear) are built to predict the ROP of TBM. Finally a fuzzy logic model is developed as an alternative method and compared to the four statistical regression models. Results show that the fuzzy logic model provides better estimations and can be applied to predict the TBM performance. The R-squared value (R2) of the fuzzy logic model scores the highest value of 0.714 over the second runner-up of 0.667 from the multiple variables nonlinear regression model.

  14. Device study, chemical doping, and logic circuits based on transferred aligned single-walled carbon nanotubes

    NASA Astrophysics Data System (ADS)

    Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Patil, Nishant; Lin, Albert; Mitra, Subhasish; Wong, H.-S. Philip; Zhou, Chongwu

    2008-07-01

    In this paper, high-performance back-gated carbon nanotube field-effect transistors based on transferred aligned carbon nanotubes were fabricated and studies found that the on/off ratio can reach 107 and the current density can reach 1.6μA/μm after electrical breakdown. In addition, chemical doping with hydrazine was used to convert the p-type aligned nanotube devices into n-type. These devices were further utilized to demonstrate various logic circuits, including p-type metal-oxide-semiconductor inverters, diode-loaded inverters, complementary metal-oxide-semiconductor inverters, NAND, and NOR gates. This approach could work as the platform for future nanotube-based nanoelectronics.

  15. Electro-optic directed XOR logic circuits based on parallel-cascaded micro-ring resonators.

    PubMed

    Tian, Yonghui; Zhao, Yongpeng; Chen, Wenjie; Guo, Anqi; Li, Dezhao; Zhao, Guolin; Liu, Zilong; Xiao, Huifu; Liu, Guipeng; Yang, Jianhong

    2015-10-05

    We report an electro-optic photonic integrated circuit which can perform the exclusive (XOR) logic operation based on two silicon parallel-cascaded microring resonators (MRRs) fabricated on the silicon-on-insulator (SOI) platform. PIN diodes embedded around MRRs are employed to achieve the carrier injection modulation. Two electrical pulse sequences regarded as two operands of operations are applied to PIN diodes to modulate two MRRs through the free carrier dispersion effect. The final operation result of two operands is output at the Output port in the form of light. The scattering matrix method is employed to establish numerical model of the device, and numerical simulator SG-framework is used to simulate the electrical characteristics of the PIN diodes. XOR operation with the speed of 100Mbps is demonstrated successfully.

  16. A logical molecular circuit for programmable and autonomous regulation of protein activity using DNA aptamer-protein interactions.

    PubMed

    Han, Da; Zhu, Zhi; Wu, Cuichen; Peng, Lu; Zhou, Leiji; Gulbakan, Basri; Zhu, Guizhi; Williams, Kathryn R; Tan, Weihong

    2012-12-26

    Researchers increasingly envision an important role for artificial biochemical circuits in biological engineering, much like electrical circuits in electrical engineering. Similar to electrical circuits, which control electromechanical devices, biochemical circuits could be utilized as a type of servomechanism to control nanodevices in vitro, monitor chemical reactions in situ, or regulate gene expressions in vivo. (1) As a consequence of their relative robustness and potential applicability for controlling a wide range of in vitro chemistries, synthetic cell-free biochemical circuits promise to be useful in manipulating the functions of biological molecules. Here, we describe the first logical circuit based on DNA-protein interactions with accurate threshold control, enabling autonomous, self-sustained and programmable manipulation of protein activity in vitro. Similar circuits made previously were based primarily on DNA hybridization and strand displacement reactions. This new design uses the diverse nucleic acid interactions with proteins. The circuit can precisely sense the local enzymatic environment, such as the concentration of thrombin, and when it is excessively high, a coagulation inhibitor is automatically released by a concentration-adjusted circuit module. To demonstrate the programmable and autonomous modulation, a molecular circuit with different threshold concentrations of thrombin was tested as a proof of principle. In the future, owing to tunable regulation, design modularity and target specificity, this prototype could lead to the development of novel DNA biochemical circuits to control the delivery of aptamer-based drugs in smart and personalized medicine, providing a more efficient and safer therapeutic strategy.

  17. Hyperbranched Hybridization Chain Reaction for Triggered Signal Amplification and Concatenated Logic Circuits.

    PubMed

    Bi, Sai; Chen, Min; Jia, Xiaoqiang; Dong, Ying; Wang, Zonghua

    2015-07-06

    A hyper-branched hybridization chain reaction (HB-HCR) is presented herein, which consists of only six species that can metastably coexist until the introduction of an initiator DNA to trigger a cascade of hybridization events, leading to the self-sustained assembly of hyper-branched and nicked double-stranded DNA structures. The system can readily achieve ultrasensitive detection of target DNA. Moreover, the HB-HCR principle is successfully applied to construct three-input concatenated logic circuits with excellent specificity and extended to design a security-mimicking keypad lock system. Significantly, the HB-HCR-based keypad lock can alarm immediately if the "password" is incorrect. Overall, the proposed HB-HCR with high amplification efficiency is simple, homogeneous, fast, robust, and low-cost, and holds great promise in the development of biosensing, in the programmable assembly of DNA architectures, and in molecular logic operations. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  18. The University of Minnesota pathway prediction system: predicting metabolic logic.

    PubMed

    Ellis, Lynda B M; Gao, Junfeng; Fenner, Kathrin; Wackett, Lawrence P

    2008-07-01

    The University of Minnesota pathway prediction system (UM-PPS, http://umbbd.msi.umn.edu/predict/) recognizes functional groups in organic compounds that are potential targets of microbial catabolic reactions, and predicts transformations of these groups based on biotransformation rules. Rules are based on the University of Minnesota biocatalysis/biodegradation database (http://umbbd.msi.umn.edu/) and the scientific literature. As rules were added to the UM-PPS, more of them were triggered at each prediction step. The resulting combinatorial explosion is being addressed in four ways. Biodegradation experts give each rule an aerobic likelihood value of Very Likely, Likely, Neutral, Unlikely or Very Unlikely. Users now can choose whether they view all, or only the more aerobically likely, predicted transformations. Relative reasoning, allowing triggering of some rules to inhibit triggering of others, was implemented. Rules were initially assigned to individual chemical reactions. In selected cases, these have been replaced by super rules, which include two or more contiguous reactions that form a small pathway of their own. Rules are continually modified to improve the prediction accuracy; increasing rule stringency can improve predictions and reduce extraneous choices. The UM-PPS is freely available to all without registration. Its value to the scientific community, for academic, industrial and government use, is good and will only increase.

  19. Final report on LDRD project :leaky-mode VCSELs for photonic logic circuits.

    SciTech Connect

    Hargett, Terry W.; Hadley, G. Ronald; Serkland, Darwin Keith; Blansett, Ethan L.; Geib, Kent Martin; Sullivan, Charles Thomas; Keeler, Gordon Arthur; Bauer, Thomas; Ongstand, Andrea; Medrano, Melissa R.; Peake, Gregory Merwin; Montano, Victoria A.

    2005-11-01

    This report describes the research accomplishments achieved under the LDRD Project ''Leaky-mode VCSELs for photonic logic circuits''. Leaky-mode vertical-cavity surface-emitting lasers (VCSELs) offer new possibilities for integration of microcavity lasers to create optical microsystems. A leaky-mode VCSEL output-couples light laterally, in the plane of the semiconductor wafer, which allows the light to interact with adjacent lasers, modulators, and detectors on the same wafer. The fabrication of leaky-mode VCSELs based on effective index modification was proposed and demonstrated at Sandia in 1999 but was not adequately developed for use in applications. The aim of this LDRD has been to advance the design and fabrication of leaky-mode VCSELs to the point where initial applications can be attempted. In the first and second years of this LDRD we concentrated on overcoming previous difficulties in the epitaxial growth and fabrication of these advanced VCSELs. In the third year, we focused on applications of leaky-mode VCSELs, such as all-optical processing circuits based on gain quenching.

  20. Large scale MoS2 nanosheet logic circuits integrated by photolithography on glass

    NASA Astrophysics Data System (ADS)

    Kwon, Hyeokjae; Jeon, Pyo Jin; Kim, Jin Sung; Kim, Tae-Young; Yun, Hoyeol; Lee, Sang Wook; Lee, Takhee; Im, Seongil

    2016-12-01

    We demonstrate 500 × 500 μm2 large scale polygrain MoS2 nanosheets and field effect transistor (FET) circuits integrated using those nanosheets, which are initially grown on SiO2/p+-Si by chemical vapor deposition but transferred onto glass substrate to be patterned by photolithography. In fact, large scale growth of two-dimensional MoS2 and its conventional way of patterning for integrated devices have remained as one of the unresolved important issues. In the present study, we achieved maximum linear mobility of ˜9 cm2 V-1 s-1 from single-domain MoS2 FET on SiO2/p+-Si substrate and 0.5˜3.0 cm2 V-1 s-1 from large scale MoS2 sheet transferred onto glass. Such reduced mobility is attributed to the transfer process-induced wrinkles and crevices, domain boundaries, residue on MoS2, and loss of the back gate-charging effects that might exist due to SiO2/p+-Si substrate. Among 16 MoS2-based FETs, 13 devices successfully work (yield was more than 80%) producing NOT, NOR, and NAND logic circuits. Inverter (NOT gate) shows quite a high voltage gain over 12 at a supply voltage of 5 V, also displaying 60 μs switching speed in kilohertz dynamics.

  1. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

    PubMed Central

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

  2. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

    PubMed

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-04-13

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.

  3. Reconfigurable optical directed-logic circuits using microresonator-based optical switches.

    PubMed

    Xu, Qianfan; Soref, Richard

    2011-03-14

    We present a reconfigurable optical directed logic architecture that offers several significant improvements over the original directed logic presented by Hardy and Shamir. Specific embodiments of on-chip, waveguided, large-scale-integrated, cellular optical directed logic fabrics are proposed and analyzed. Five important logic functions are presented as examples to show that the same switch fabric can be reconfigured to perform different logic functions.

  4. Demonstration of a directed XNOR/XOR optical logic circuit based on silicon Mach-Zehnder interferometer

    NASA Astrophysics Data System (ADS)

    Ding, Jianfeng; Yang, Lin; Chen, Qiaoshan; Zhang, Lei; Zhou, Ping

    2017-07-01

    We demonstrate a directed XNOR/XOR optical logic circuit based on silicon Mach-Zehnder interferometer. The device with the symmetric arm design is wavelength-insensitive in a wavelength range of 40 nm. The device has an electro-optical bandwidth of around 20 GHz. When the device is optically biased at the maximum or minimum transmission points by tuning the heater on one of its arms, it can perform the XNOR or XOR operations respectively at a speed up to 20 Gbps. The high-speed and reconfigurable abilities of the device make it suitable for the future programmable optical logic array.

  5. Fuzzy logic applications for failure analysis and diagnosis of a primary circuit of the HTR nuclear power plant

    NASA Astrophysics Data System (ADS)

    Kitowski, J.; Ksiażek, E.

    1985-10-01

    The paper presents some preliminary results of diagnostic analysis of the stimulated primary circuit of the THTR-300 nuclear power plant, based on the fuzzy sets theory. Two methods are used: the solution of the fuzzy relational equations and its extension to fuzzy logic. The first stage of the diagnostic system is the identification of the plant in the sense of fuzzy relations and the second stage is the failure or disturbance recognition. According to the fuzzy logic, lower and upper bounds of the failure vectors are obtained. Such an expert system can supply the operator in a correct recognition of the current state of the complex plant.

  6. Path programmable logic: A structured design method for digital and/or mixed analog integrated circuits

    NASA Technical Reports Server (NTRS)

    Taylor, B.

    1990-01-01

    The design of Integrated Circuits has evolved past the black art practiced by a few semiconductor companies to a world wide community of users. This was basically accomplished by the development of computer aided design tools which were made available to this community. As the tools matured into different components of the design task they were accepted into the community at large. However, the next step in this evolution is being ignored by the large tool vendors hindering the continuation of this process. With system level definition and simulation through the logic specification well understood, why is the physical generation so blatantly ignored. This portion of the development is still treated as an isolated task with information being passed from the designer to the layout function. Some form of result given back but it severely lacks full definition of what has transpired. The level of integration in I.C.'s for tomorrow, whether through new processes or applications will require higher speeds, increased transistor density, and non-digital performance which can only be achieved through attention to the physical implementation.

  7. A synergistic DNA logic predicts genome-wide chromatin accessibility

    PubMed Central

    Hashimoto, Tatsunori; Sherwood, Richard I.; Kang, Daniel D.; Rajagopal, Nisha; Barkal, Amira A.; Zeng, Haoyang; Emons, Bart J.M.; Srinivasan, Sharanya; Jaakkola, Tommi; Gifford, David K.

    2016-01-01

    Enhancers and promoters commonly occur in accessible chromatin characterized by depleted nucleosome contact; however, it is unclear how chromatin accessibility is governed. We show that log-additive cis-acting DNA sequence features can predict chromatin accessibility at high spatial resolution. We develop a new type of high-dimensional machine learning model, the Synergistic Chromatin Model (SCM), which when trained with DNase-seq data for a cell type is capable of predicting expected read counts of genome-wide chromatin accessibility at every base from DNA sequence alone, with the highest accuracy at hypersensitive sites shared across cell types. We confirm that a SCM accurately predicts chromatin accessibility for thousands of synthetic DNA sequences using a novel CRISPR-based method of highly efficient site-specific DNA library integration. SCMs are directly interpretable and reveal that a logic based on local, nonspecific synergistic effects, largely among pioneer TFs, is sufficient to predict a large fraction of cellular chromatin accessibility in a wide variety of cell types. PMID:27456004

  8. Long single ZnO nanowire for logic and memory circuits: NOT, NAND, NOR gate, and SRAM.

    PubMed

    Lee, Young Tack; Ali Raza, Syed Raza; Jeon, Pyo Jin; Ha, Ryong; Choi, Heon-Jin; Im, Seongil

    2013-05-21

    We demonstrate logic and static random access memory (SRAM) circuits using a 100 μm long and 100 nm thin single ZnO nanowire (NW), which acts as a channel of field-effect transistors (FETs) with Al2O3 dielectrics. NW FETs are thus arrayed in one dimension to consist of NOT, NAND, and NOR gate logic, and SRAM circuits. Two respective top-gate NW FETs with Au and indium-tin-oxide (ITO) were connected to form an inverter, the basic NOT gate component, since the former gate leads to an enhanced mode FET while the latter to depletion mode due to their work function difference. Our inverters showed a high voltage gain of 22 under a 5 V operational voltage, resulting in successful operation of all other devices. We thus conclude that our long single NW approach is quite promising to extend the field of nano-electronics.

  9. Carbon nanotube field-effect transistors for use as pass transistors in integrated logic gates and full subtractor circuits.

    PubMed

    Ding, Li; Zhang, Zhiyong; Pei, Tian; Liang, Shibo; Wang, Sheng; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

    2012-05-22

    The use of carbon nanotube (CNT)-based field-effect transistors (FETs) as pass transistors is investigated. Logic gates are designed and constructed with these CNT FETs in the pass-transistor logic (PTL) style. Because two of the three terminals of every CNT FET are used as inputs, the efficiency per transistor in PTL circuits is significantly improved. With the PTL style, a single pair of FETS, one n-type and one p-type, is sufficient to construct high-performance AND or OR gates in which the measured output voltages are consistent with those quantitatively derived using the characteristics of the pair of the constituent n- and p-FETs. A one-bit full subtractor, which requires a total of 28 FETs to construct in the usual CMOS circuit, is realized on individual CNTs for the first time using the PTL style with only three pairs of n- and p-FETs.

  10. Logic circuit detects both present and missing negative pulses in superimposed wave trains

    NASA Technical Reports Server (NTRS)

    Rice, R. E.

    1967-01-01

    Pulse divide and determination network provides a logical determination of pulse presence within a data train. The network uses digital logic circuitry to divide positive and negative pulses, to shape the separated pulses, and to determine, by means of coincidence logic, if negative pulses are missing from the pulse train.

  11. Predictive computation of genomic logic processing functions in embryonic development

    PubMed Central

    Peter, Isabelle S.; Faure, Emmanuel; Davidson, Eric H.

    2012-01-01

    Gene regulatory networks (GRNs) control the dynamic spatial patterns of regulatory gene expression in development. Thus, in principle, GRN models may provide system-level, causal explanations of developmental process. To test this assertion, we have transformed a relatively well-established GRN model into a predictive, dynamic Boolean computational model. This Boolean model computes spatial and temporal gene expression according to the regulatory logic and gene interactions specified in a GRN model for embryonic development in the sea urchin. Additional information input into the model included the progressive embryonic geometry and gene expression kinetics. The resulting model predicted gene expression patterns for a large number of individual regulatory genes each hour up to gastrulation (30 h) in four different spatial domains of the embryo. Direct comparison with experimental observations showed that the model predictively computed these patterns with remarkable spatial and temporal accuracy. In addition, we used this model to carry out in silico perturbations of regulatory functions and of embryonic spatial organization. The model computationally reproduced the altered developmental functions observed experimentally. Two major conclusions are that the starting GRN model contains sufficiently complete regulatory information to permit explanation of a complex developmental process of gene expression solely in terms of genomic regulatory code, and that the Boolean model provides a tool with which to test in silico regulatory circuitry and developmental perturbations. PMID:22927416

  12. Selective remanent ambipolar charge transport in polymeric field-effect transistors for high-performance logic circuits fabricated in ambient.

    PubMed

    Fabiano, Simone; Usta, Hakan; Forchheimer, Robert; Crispin, Xavier; Facchetti, Antonio; Berggren, Magnus

    2014-11-26

    Ambipolar polymeric field-effect transistors can be programmed into a p- or n-type mode by using the remanent polarization of a ferroelectric gate insulator. Due to the remanent polarity, the device architecture is suited as a building block in complementary logic circuits and in CMOS-compatible memory cells for non-destructive read-out operations. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  13. Four-way junction-driven DNA strand displacement and its application in building majority logic circuit.

    PubMed

    Zhu, Jinbo; Zhang, Libing; Dong, Shaojun; Wang, Erkang

    2013-11-26

    We introduced a four-way DNA junction-driven toehold-mediated strand displacement method. Separation of the different functional domains on different strands in the four-way junction structure and usage of glue strand to recombine them for different logic gates make the design more flexible. On the basis of this mechanism, a majority logic circuit fabricated by DNA strands was designed and constructed by assembling three AND gates and one OR gate together. The output strand drew the G-rich segments together to form a split G-quadruplex, which could specifically bind PPIX and enhance its fluorescence. Just like a poll with three voters, the high fluorescence signal would be given off only when two or three voters vote in favor. Upon slight modification, the majority circuit was utilized to select the composite number from 0 to 9 represented by excess-three code. It is a successful attempt to integrate the logic gates into a circuit and to achieve desired functions.

  14. All-optical logic circuits based on the polarization properties of non-degenerate four-wave mixing

    NASA Astrophysics Data System (ADS)

    Bhardwaj, Ashish Ishwar Singh

    2001-10-01

    This thesis investigates a new class of all-optical logic circuits that are based on the polarization properties of non-degenerate Four-Wave Mixing. Such circuits would be used in conjunction with a data modulation format where the information is coded on the states of polarization of the electric field. Schemes to perform multiple triple- product logic functions are discussed and it is shown that higher-level Boolean operations involving several bits can be implemented without resorting to the standard 2-input gates that are based on some form of switching. Instead, an entire hierarchy of more complex Boolean functions can be derived based on the selection rules of multi-photon scattering processes that can form a new classes of primitive building blocks for digital circuits. Possible applications of these circuits could involve some front-end signal processing to be performed all- optically in shared computer back-planes. As a simple illustration of this idea, a circuit performing error correction on a (3,1) Hamming Code is demonstrated. Error-free performance (Bit Error Rate of <10-9) at 2.5 Gbit/s is achieved after single-error correction on the Hamming word with 50 percent errors. The bit-rate is only limited by the bandwidth of available resources. Since Four-Wave Mixing is an ultrafast nonlinearity, these circuits offer the potential of computing at several terabits per second. Furthermore, it is shown that several Boolean functions can be performed in parallel in the same set of devices using different multi-photon scattering processes. The main objective of this thesis is to motivate a new paradigm of thought in digital circuit design. Challenges pertaining to the feasibility of these ideas are discussed.

  15. Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits

    NASA Astrophysics Data System (ADS)

    Goudarzi, H.; Dousti, M. J.; Shafaei, A.; Pedram, M.

    2014-05-01

    This paper presents a physical mapping tool for quantum circuits, which generates the optimal universal logic block (ULB) that can, on average, perform any logical fault-tolerant (FT) quantum operations with the minimum latency. The operation scheduling, placement, and qubit routing problems tackled by the quantum physical mapper are highly dependent on one another. More precisely, the scheduling solution affects the quality of the achievable placement solution due to resource pressures that may be created as a result of operation scheduling, whereas the operation placement and qubit routing solutions influence the scheduling solution due to resulting distances between predecessor and current operations, which in turn determines routing latencies. The proposed flow for the quantum physical mapper captures these dependencies by applying (1) a loose scheduling step, which transforms an initial quantum data flow graph into one that explicitly captures the no-cloning theorem of the quantum computing and then performs instruction scheduling based on a modified force-directed scheduling approach to minimize the resource contention and quantum circuit latency, (2) a placement step, which uses timing-driven instruction placement to minimize the approximate routing latencies while making iterative calls to the aforesaid force-directed scheduler to correct scheduling levels of quantum operations as needed, and (3) a routing step that finds dynamic values of routing latencies for the qubits. In addition to the quantum physical mapper, an approach is presented to determine the single best ULB size for a target quantum circuit by examining the latency of different FT quantum operations mapped onto different ULB sizes and using information about the occurrence frequency of operations on critical paths of the target quantum algorithm to weigh these latencies. Experimental results show an average latency reduction of about 40 % compared to previous work.

  16. The Rocky Road to Logical Thinking.

    ERIC Educational Resources Information Center

    Burch, Fern; Aaronson, Tim

    1985-01-01

    Presents offline logic activities to extend concepts in "Rocky's Boots." Activities focus on: (1) building logic circuits; (2) recognizing logic in language; (3) playing logic games; and (4) testing logic circuits. Detailed procedures accompanied by illustrative examples are included. (JN)

  17. Predicting the behavior of microfluidic circuits made from discrete elements

    NASA Astrophysics Data System (ADS)

    Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-10-01

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand.

  18. Predicting the behavior of microfluidic circuits made from discrete elements.

    PubMed

    Bhargava, Krisna C; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-10-30

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand.

  19. Predicting the behavior of microfluidic circuits made from discrete elements

    PubMed Central

    Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-01-01

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand. PMID:26516059

  20. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    PubMed Central

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  1. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    NASA Astrophysics Data System (ADS)

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V‑1 sec‑1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  2. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-09

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  3. Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers.

    PubMed

    Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

    2017-01-01

    Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlO[Formula: see text]), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers.

  4. Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers

    PubMed Central

    Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

    2017-01-01

    Abstract Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlOx), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers. PMID:28634499

  5. New dynamic FET logic and serial memory circuits for VLSI GaAs technology

    NASA Technical Reports Server (NTRS)

    Eldin, A. G.

    1991-01-01

    The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

  6. Reconfigurable Nonvolatile Logic Operations in Resistance Switching Crossbar Array for Large-Scale Circuits.

    PubMed

    Huang, Peng; Kang, Jinfeng; Zhao, Yudi; Chen, Sijie; Han, Runze; Zhou, Zheng; Chen, Zhe; Ma, Wenjia; Li, Mu; Liu, Lifeng; Liu, Xiaoyan

    2016-11-01

    Resistance switching (RS) devices have potential to offer computing and memory function. A new computer unit is built of RS array, where processing and storing of information occur on same devices. Resistance states stored in devices located in arbitrary positions of RS array can be performed various nonvolatile logic operations. Logic functions can be reconfigured by altering trigger signals. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. A behavioral-level HDL description of SFQ logic circuits for quantitative performance analysis of large-scale SFQ digital systems

    NASA Astrophysics Data System (ADS)

    Matsuzaki, F.; Yoshikawa, N.; Tanaka, M.; Fujimaki, A.; Takai, Y.

    2003-10-01

    Recently many single flux quantum (SFQ) logic circuits containing several thousands of Josephson junctions have been designed successfully by using digital domain simulation based on the hard ware description language (HDL). In the present HDL-based design of SFQ circuits, a structure-level HDL description has been used, where circuits are made up of basic gate cells. However, in order to analyze large-scale SFQ digital systems, such as a microprocessor, more higher-level circuit abstraction is necessary to reduce the circuit simulation time. In this paper we have investigated the way to describe functionality of the large-scale SFQ digital circuits by a behavior-level HDL description. In this method, the functionality and the timing of the circuit block is defined directly by describing their behavior by the HDL. Using this method, we can dramatically reduce the simulation time of large-scale SFQ digital circuits.

  8. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric.

    PubMed

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-05-17

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm(2) V(-1) sec(-)1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 10(4)), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

  9. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

    NASA Astrophysics Data System (ADS)

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-05-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V‑1 sec‑1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

  10. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

    PubMed Central

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-01-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V−1 sec−1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process. PMID:27184121

  11. Fault-tolerant computer study. [logic designs for building block circuits

    NASA Technical Reports Server (NTRS)

    Rennels, D. A.; Avizienis, A. A.; Ercegovac, M. D.

    1981-01-01

    A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

  12. Effects of a Laboratory Design Course on Strategies for Troubleshooting Logic Circuits.

    ERIC Educational Resources Information Center

    Steinberg, Esther R.; Baskin, A. B.

    1987-01-01

    Reports on a study which investigated the effects of having students analyze circuits in the laboratory compared with troubleshooting from homework problems. Results indicated that laboratory experiences provide a richer learning experience than lecture and homework alone. (TW)

  13. Cardiopulmonary Circuit Models for Predicting Injury to the Heart

    NASA Astrophysics Data System (ADS)

    Ward, Richard; Wing, Sarah; Bassingthwaighte, James; Neal, Maxwell

    2004-11-01

    Circuit models have been used extensively in physiology to describe cardiopulmonary function. Such models are being used in the DARPA Virtual Soldier (VS) Project* to predict the response to injury or physiological stress. The most complex model consists of systemic circulation, pulmonary circulation, and a four-chamber heart sub-model. This model also includes baroreceptor feedback, airway mechanics, gas exchange, and pleural pressure influence on the circulation. As part of the VS Project, Oak Ridge National Laboratory has been evaluating various cardiopulmonary circuit models for predicting the effects of injury to the heart. We describe, from a physicist's perspective, the concept of building circuit models, discuss both unstressed and stressed models, and show how the stressed models are used to predict effects of specific wounds. *This work was supported by a grant from the DARPA, executed by the U.S. Army Medical Research and Materiel Command/TATRC Cooperative Agreement, Contract # W81XWH-04-2-0012. The submitted manuscript has been authored by the U.S. Department of Energy, Office of Science of the Oak Ridge National Laboratory, managed for the U.S. DOE by UT-Battelle, LLC, under contract No. DE-AC05-00OR22725. Accordingly, the U.S. Government retains a non-exclusive, royalty-free license to publish or reproduce the published form of this contribution, or allow others to do so, for U.S. Government purpose.

  14. Technological dispersion in CNTFET: Impact of the presence of metallic carbon nanotubes in logic circuits

    NASA Astrophysics Data System (ADS)

    Frégonèse, Sébastien; Maneux, Cristell; Zimmer, Thomas

    2009-10-01

    This paper investigates the impact of the metallic nanotube (M-NT) presence within CNTFET circuits: circuit yield and performances are analyzed using calibrated compact models for both the CNTFET and the M-NT. The major cause of technological dispersion in CNTFET technology comes from the control of the carbon nanotube chirality. This lack of control may lead to the presence of metallic nanotubes in the transistor. These M-NTs create shorts which dramatically increase the source-drain leakage current. The random presence and position of M-NT in the ring oscillator circuit is analyzed using Monte Carlo simulation. Two inverter layout configurations are considered in the study and we deduce that a strong improvement in term of yield and power consumption can be obtained using a specific layout configuration where the tubes are shared for the P-CNTFET and the N-CNTFET.

  15. Application of Error Correcting Codes in Fault-Tolerant Logic Design for VLSI Circuits

    DTIC Science & Technology

    1992-08-14

    Difference between par Erroneous bit( s ) expected and actual (do) (unidirectional) residue(dr) 8(5) 0 d7d6 10 (3) 0 d5d4 3( 10 ) 0 d4d3 4(9) 0 d2dl 9(4) 0...indicating the presence of the s -on transistor. Since C for any fault, the circuit never produces an incorrect code word i.e. 10 instead of 01 or vice...way that P2 82 P for any defect (break or s -on) in the circuit the outputs 1 P4 -- will assume a value of 01 or 10 . For a fault-free circuit the

  16. Enzyme-free unlabeled DNA logic circuits based on toehold-mediated strand displacement and split G-quadruplex enhanced fluorescence.

    PubMed

    Zhu, Jinbo; Zhang, Libing; Li, Tao; Dong, Shaojun; Wang, Erkang

    2013-05-07

    Adopting fluorescence of PPIX enhanced by a split G-quadruplex and toehold mediated strand displacement reaction, a series of unlabeled fluorescent logic gates is set up and some of them are cascaded into circuits. Controlled release of PPIX, which is also a photosensitizer in photodynamic diagnosis and therapy, is realized by this circuit, making it a wise choice for DNA computing. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Nucleic acid based logical systems.

    PubMed

    Han, Da; Kang, Huaizhi; Zhang, Tao; Wu, Cuichen; Zhou, Cuisong; You, Mingxu; Chen, Zhuo; Zhang, Xiaobing; Tan, Weihong

    2014-05-12

    Researchers increasingly visualize a significant role for artificial biochemical logical systems in biological engineering, much like digital logic circuits in electrical engineering. Those logical systems could be utilized as a type of servomechanism to control nanodevices in vitro, monitor chemical reactions in situ, or regulate gene expression in vivo. Nucleic acids (NA), as carriers of genetic information with well-regulated and predictable structures, are promising materials for the design and engineering of biochemical circuits. A number of logical devices based on nucleic acids (NA) have been designed to handle various processes for technological or biotechnological purposes. This article focuses on the most recent and important developments in NA-based logical devices and their evolution from in vitro, through cellular, even towards in vivo biological applications.

  18. Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

    NASA Technical Reports Server (NTRS)

    Slaughter, D. W.

    1977-01-01

    A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

  19. Structural Computer-Aided Design of Current-Mode CMOS Logic Circuits

    DTIC Science & Technology

    1988-01-01

    Circuits Based on the Truncated-Difference operator., In Roc. 1987 ISXVL, pp. 188-195, Wash1ngton.D.C.. may 1987. Kawahito , S., M. Kameyama. and T...Washington, DC, May 1986. Kawahito . T.S., M. Kameyama, T. Higuchi, and H. Yamada, "A High-speed Compact Multiplier Based on Multiple-Valued Bi

  20. Flexible logic circuits based on top-gate thin film transistors with printed semiconductor carbon nanotubes and top electrodes

    NASA Astrophysics Data System (ADS)

    Xu, Weiwei; Liu, Zhen; Zhao, Jianwen; Xu, Wenya; Gu, Weibing; Zhang, Xiang; Qian, Long; Cui, Zheng

    2014-11-01

    In this report printed thin film transistors and logic circuits on flexible substrates are reported. The top-gate thin film transistors were made of the sorted semiconducting single-walled carbon nanotubes (sc-SWCNTs) ink as channel material and printed silver lines as top electrodes and interconnect. 5 nm HfOx thin films pre-deposited on PET substrates by atomic layer deposition (ALD) act as the adhesion layers to significantly improve the immobilization efficiency of sc-SWCNTs and environmental stability. The immobilization mechanism was investigated in detail. The flexible partially-printed top-gate SWCNT TFTs display ambipolar characteristics with slightly strong p-type when using 50 nm HfOx thin films as dielectric layer, as well as the encapsulation layer by atomic layer deposition (ALD) at 120 °C. The hole mobility, on/off ratio and subthreshold swing (SS) are ~46.2 cm2 V-1 s-1, 105 and 109 mV per decade, respectively. Furthermore, partially-printed TFTs show small hysteresis, low operating voltage (2 V) and high stability in air. Flexible partially-printed inverters show good performance with voltage gain up to 33 with 1.25 V supply voltage, and can work at 10 kHz. The frequency of flexible partially-printed five-stage ring oscillators can reach 1.7 kHz at supply voltages of 2 V with per stage delay times of 58.8 μs. This work paves a way to achieve printed SWCNT advanced logic circuits and systems on flexible substrates.In this report printed thin film transistors and logic circuits on flexible substrates are reported. The top-gate thin film transistors were made of the sorted semiconducting single-walled carbon nanotubes (sc-SWCNTs) ink as channel material and printed silver lines as top electrodes and interconnect. 5 nm HfOx thin films pre-deposited on PET substrates by atomic layer deposition (ALD) act as the adhesion layers to significantly improve the immobilization efficiency of sc-SWCNTs and environmental stability. The immobilization mechanism

  1. Vibrational resonance and implementation of dynamic logic gate in a piecewise-linear Murali-Lakshmanan-Chua circuit

    NASA Astrophysics Data System (ADS)

    Venkatesh, P. R.; Venkatesan, A.

    2016-10-01

    We report the occurrence of vibrational resonance in piecewise-linear non-autonomous system. Especially, we show that an optimal amplitude of the high frequency second harmonic driving enhances the response of a piece-wise linear non-autonomous Murali-Lakshmanan-Chua (MLC) system to a low frequency first harmonic signal. This phenomenon is illustrated with the analytical solutions of circuit equations characterising the system and finally compared with the numerical method. Further, it has been enunciated explicitly, the implementation of the fundamental NOR/NAND gate via vibrational resonance, both by numerical and analytical solutions. In addition, these logical behaviours (AND/NAND/OR/NOR) can be decided by the amplitude of the input square waves without altering the system parameters.

  2. Flexible logic circuits based on top-gate thin film transistors with printed semiconductor carbon nanotubes and top electrodes.

    PubMed

    Xu, Weiwei; Liu, Zhen; Zhao, Jianwen; Xu, Wenya; Gu, Weibing; Zhang, Xiang; Qian, Long; Cui, Zheng

    2014-12-21

    In this report printed thin film transistors and logic circuits on flexible substrates are reported. The top-gate thin film transistors were made of the sorted semiconducting single-walled carbon nanotubes (sc-SWCNTs) ink as channel material and printed silver lines as top electrodes and interconnect. 5 nm HfOx thin films pre-deposited on PET substrates by atomic layer deposition (ALD) act as the adhesion layers to significantly improve the immobilization efficiency of sc-SWCNTs and environmental stability. The immobilization mechanism was investigated in detail. The flexible partially-printed top-gate SWCNT TFTs display ambipolar characteristics with slightly strong p-type when using 50 nm HfO(x) thin films as dielectric layer, as well as the encapsulation layer by atomic layer deposition (ALD) at 120 °C. The hole mobility, on/off ratio and subthreshold swing (SS) are ∼ 46.2 cm(2) V(-1) s(-1), 10(5) and 109 mV per decade, respectively. Furthermore, partially-printed TFTs show small hysteresis, low operating voltage (2 V) and high stability in air. Flexible partially-printed inverters show good performance with voltage gain up to 33 with 1.25 V supply voltage, and can work at 10 kHz. The frequency of flexible partially-printed five-stage ring oscillators can reach 1.7 kHz at supply voltages of 2 V with per stage delay times of 58.8 μs. This work paves a way to achieve printed SWCNT advanced logic circuits and systems on flexible substrates.

  3. DNA Domino-Based Nanoscale Logic Circuit: A Versatile Strategy for Ultrasensitive Multiplexed Analysis of Nucleic Acids.

    PubMed

    Ravan, Hadi; Amandadi, Mojdeh; Esmaeili-Mahani, Saeed

    2017-06-06

    In recent years, the analytical application of logical nanodevices has attracted much attention for making accurate decisions on molecular diagnosis. Herein, a DNA domino-based nanoscale logic circuit has been constructed by integrating three logic gates (AND-AND-YES) for simultaneous analysis of multiple nucleic acid biomarkers. In the first AND gate, a chimeric target DNA comprising of four biomarkers was hybridized to three biomarker-specific oligonucleotides (TRs) via their 5'-end regions and to a capture probe-magnetic microparticle. After harvesting the complex, 3' overhang regions of the TRs were labeled with three distinct monolayer double-stranded (ds) DNA-gold nanoparticles (DNA-AuNPs). Upon gleaning the complex and addition of initiator oligonucleotide, a series of toehold-mediated strand displacement reactions, which are reminiscent of a domino chain, spontaneously occurred between the confined dsDNAs on the nanoparticles' surface in the second AND gate. The output of the second gate entered into the last gate and triggered an exponential hairpin assembly to form four-way junction nanostructures. The resulting nanostructures bear split parts of DNAzyme at each end of the four arms which, in the presence of hemin, form catalytic hemin/G-quadruplex DNAzymes with peroxidase activity. The smart biosensor has exhibited a turn-on signal when all biomarkers are present in the sample. In fact, should any of the biomarkers be nonexistent, the signal remains turned-off. The biosensor can detect the biomarkers with a LOD value of 100 aM and a noticeable capability to discriminate single-nucleotide substitutions.

  4. A Leakage-Tolerant 16 – Bit Comparator using Lector Technique Based Footless Domino Logic Circuit

    NASA Astrophysics Data System (ADS)

    Rani Ghimiray, Sapna; Meher, Preetisudha; Kumar, Manish

    2017-08-01

    The continuous scaling has resulted in increased sub-threshold leakage current due to decreased threshold voltage. LECTOR is a technique to decrease the problem of leakage in CMOS circuits, it includes a p-type and n-type leakage controlled transistors (LCTs), which are self-controlled, between supply to ground which offers the extra resistance which will reduce the problem of leakage current in the CMOS circuits. In this paper 16-bit Lector based standard foot-less domino (SFLD) comparator is introduced, which provides 74% efficient reduction in leakage and is also efficient in terms of performance compared to basic 16-bit SFLD comparator. Simulations are performed in gpdk_90 nm CMOS technology using cadence virtuoso tool.

  5. Multiple atomic scale solid surface interconnects for atom circuits and molecule logic gates.

    PubMed

    Joachim, C; Martrou, D; Rezeq, M; Troadec, C; Jie, Deng; Chandrasekhar, N; Gauthier, S

    2010-03-05

    The scientific and technical challenges involved in building the planar electrical connection of an atomic scale circuit to N electrodes (N > 2) are discussed. The practical, laboratory scale approach explored today to assemble a multi-access atomic scale precision interconnection machine is presented. Depending on the surface electronic properties of the targeted substrates, two types of machines are considered: on moderate surface band gap materials, scanning tunneling microscopy can be combined with scanning electron microscopy to provide an efficient navigation system, while on wide surface band gap materials, atomic force microscopy can be used in conjunction with optical microscopy. The size of the planar part of the circuit should be minimized on moderate band gap surfaces to avoid current leakage, while this requirement does not apply to wide band gap surfaces. These constraints impose different methods of connection, which are thoroughly discussed, in particular regarding the recent progress in single atom and molecule manipulations on a surface.

  6. SET Characterization in Logic Gates Circuits Fabricated in a 3DIC Technology

    DTIC Science & Technology

    2011-08-22

    characterized simultaneously on each tier during exposure to krypton heavy ions. The difference in SET pulse width and cross-section between the three tiers...were characterized simultaneously on each tier during exposure to krypton heavy Ions. The difference In SET pulse width and cross-section between...test circuits was performed at Lawrence Berkeley National Laboratory with the 16 MeV ion cocktail using krypton (Kr) at normal incidence and in air

  7. Boolean Reasoning and Informed Search in the Minimization of Logic Circuits

    DTIC Science & Technology

    1992-03-01

    niques are characterized by the simultaneous identification and extraction of function implicants. (Rhyne 77) and ( Areva 78) describe methods which...has been updated to handle multiple-output circuits (Perki 88). The primary difference between Arevalo’s method ( Areva 78) and Rhyne’s is that only a...PIs of individual functions ( Areva 78:1032). This technique is faster than Rhyne’s, but does not produce as good results (Brayt 84:9). MINI, PRESTO

  8. Do institutional logics predict interpretation of contract rules at the dental chair-side?

    PubMed Central

    Harris, Rebecca; Brown, Stephen; Holt, Robin; Perkins, Elizabeth

    2014-01-01

    In quasi-markets, contracts find purchasers influencing health care providers, although problems exist where providers use personal bias and heuristics to respond to written agreements, tending towards the moral hazard of opportunism. Previous research on quasi-market contracts typically understands opportunism as fully rational, individual responses selecting maximally efficient outcomes from a set of possibilities. We take a more emotive and collective view of contracting, exploring the influence of institutional logics in relation to the opportunistic behaviour of dentists. Following earlier qualitative work where we identified four institutional logics in English general dental practice, and six dental contract areas where there was scope for opportunism; in 2013 we surveyed 924 dentists to investigate these logics and whether they had predictive purchase over dentists' chair-side behaviour. Factor analysis involving 300 responses identified four logics entwined in (often technical) behaviour: entrepreneurial commercialism, duty to staff and patients, managerialism, public good. PMID:25441320

  9. Six-input lookup table circuit with 62% fewer transistors using nonvolatile logic-in-memory architecture with series/parallel-connected magnetic tunnel junctions

    NASA Astrophysics Data System (ADS)

    Suzuki, D.; Natsui, M.; Endoh, T.; Ohno, H.; Hanyu, T.

    2012-04-01

    A compact 6-input lookup table (LUT) circuit using nonvolatile logic-in-memory (LIM) architecture with series/parallel-connected magnetic tunnel junction (MTJ) devices is proposed for a standby-power-free field-programmable gate array. Series/parallel connections of MTJ devices make it possible not only to reduce the effect of resistance variation, but also to enhance the programmability of resistance values, which achieves a sufficient sensing margin even when process variation is serious in the recent nanometer-scaled VLSI. Moreover, the additional MTJ devices do not increase the effective chip area because the configuration circuit using MTJ devices is simplified and these devices are stacked over the CMOS plane. As a result, the transistor counts of the proposed circuit are reduced by 62% in comparison with those of a conventional nonvolatile LUT circuit where CMOS-only-based volatile static random access memory cell circuits are replaced by MTJ-based nonvolatile ones.

  10. Morphological elucidation of basal ganglia circuits contributing reward prediction

    PubMed Central

    Fujiyama, Fumino; Takahashi, Susumu; Karube, Fuyuki

    2015-01-01

    Electrophysiological studies in monkeys have shown that dopaminergic neurons respond to the reward prediction error. In addition, striatal neurons alter their responsiveness to cortical or thalamic inputs in response to the dopamine signal, via the mechanism of dopamine-regulated synaptic plasticity. These findings have led to the hypothesis that the striatum exhibits synaptic plasticity under the influence of the reward prediction error and conduct reinforcement learning throughout the basal ganglia circuits. The reinforcement learning model is useful; however, the mechanism by which such a process emerges in the basal ganglia needs to be anatomically explained. The actor–critic model has been previously proposed and extended by the existence of role sharing within the striatum, focusing on the striosome/matrix compartments. However, this hypothesis has been difficult to confirm morphologically, partly because of the complex structure of the striosome/matrix compartments. Here, we review recent morphological studies that elucidate the input/output organization of the striatal compartments. PMID:25698913

  11. Optical flip-flops and sequential logic circuits using a liquid crystal light valve

    NASA Technical Reports Server (NTRS)

    Fatehi, M. T.; Collins, S. A., Jr.; Wasmundt, K. C.

    1984-01-01

    This paper is concerned with the application of optics to digital computing. A Hughes liquid crystal light valve is used as an active optical element where a weak light beam can control a strong light beam with either a positive or negative gain characteristic. With this device as the central element the ability to produce bistable states from which different types of flip-flop can be implemented is demonstrated. In this paper, some general comments are first presented on digital computing as applied to optics. This is followed by a discussion of optical implementation of various types of flip-flop. These flip-flops are then used in the design of optical equivalents to a few simple sequential circuits such as shift registers and accumulators. As a typical sequential machine, a schematic layout for an optical binary temporal integrator is presented. Finally, a suggested experimental configuration for an optical master-slave flip-flop array is given.

  12. Optical flip-flops and sequential logic circuits using a liquid crystal light valve

    NASA Technical Reports Server (NTRS)

    Fatehi, M. T.; Collins, S. A., Jr.; Wasmundt, K. C.

    1984-01-01

    This paper is concerned with the application of optics to digital computing. A Hughes liquid crystal light valve is used as an active optical element where a weak light beam can control a strong light beam with either a positive or negative gain characteristic. With this device as the central element the ability to produce bistable states from which different types of flip-flop can be implemented is demonstrated. In this paper, some general comments are first presented on digital computing as applied to optics. This is followed by a discussion of optical implementation of various types of flip-flop. These flip-flops are then used in the design of optical equivalents to a few simple sequential circuits such as shift registers and accumulators. As a typical sequential machine, a schematic layout for an optical binary temporal integrator is presented. Finally, a suggested experimental configuration for an optical master-slave flip-flop array is given.

  13. Flexible logic circuits composed of chalcogenide-nanocrystal-based thin film transistors.

    PubMed

    Yun, Junggwon; Cho, Kyoungah; Kim, Sangsig

    2010-06-11

    Complementary NAND and NOR gates composed of p-channel HgTe-nanocrystal (NC) films and n-channel HgSe-NC films were constructed on back-gate patterned plastic substrates. The NAND gate was made of two HgTe-p-channel thin film transistors (TFTs) in parallel and two HgSe-n-channel TFTs in series. The NOR gate was built up with both two HgSe-n-channel TFTs in parallel and two HgTe-p-channel TFTs in series. The mobility and on/off ratio for the p-channel TFTs were estimated to be 0.9 cm(2) V(-1) s(-1) and 10, respectively, and those for the n-channel TFTs were measured to be 1.8 cm(2) V(-1) s(-1) and 10(2), respectively. The NAND and NOR gates were operated with gains of 1.45 and 1.63 and transition widths of 7.8 and 6.2 V, respectively, at room temperature in air. In addition, the operations of the NAND and NOR logics are reproducible for up to 1000 strain cycles.

  14. A hybrid magnetic/complementary metal oxide semiconductor process design kit for the design of low-power non-volatile logic circuits

    NASA Astrophysics Data System (ADS)

    Di Pendina, G.; Prenat, G.; Dieny, B.; Torki, K.

    2012-04-01

    Since the advent of the MOS transistor, the performance of microelectronic circuits has followed Moore's law, stating that their speed and density would double every 18 months. Today, this trend tends to get out of breath: the continuously decreasing size of devices and increasing operation frequency result in power consumption and heating issues. Among the solutions investigated to circumvent these limitations, the use of non-volatile devices appears particularly promising. It allows easing, for example, the power gating technique, which consists in cutting-off the power supply of inactive blocks without losing information, drastically reducing the standby power consumption. In this approach, the advantages of magnetic tunnel junctions (MTJs) compared with other non-volatile devices allow one to design hybrid CMOS/magnetic circuits with high performance and new functionalities. Designing such circuits requires integrating MTJs in standard microelectronics design suites. This is performed by means of a process design kit (PDK) for the hybrid CMOS/magnetic technology. We present here a full magnetic PDK, which contains a compact model of the MTJ for electrical simulation, technology files for layout and physical verifications, and standard cells for the design of complex logic circuits and which is compatible with standard design suites. This PDK allows designers to accurately and comfortably design high-performance hybrid CMOS/magnetic logic circuits in the same way as standard CMOS circuits.

  15. Fuzzy logic-based prognostic score for outcome prediction in esophageal cancer.

    PubMed

    Wang, Chang-Yu; Lee, Tsair-Fwu; Fang, Chun-Hsiung; Chou, Jyh-Horng

    2012-11-01

    Given the poor prognosis of esophageal cancer and the invasiveness of combined modality treatment, improved prognostic scoring systems are needed. We developed a fuzzy logic-based system to improve the predictive performance of a risk score based on the serum concentrations of C-reactive protein (CRP) and albumin in a cohort of 271 patients with esophageal cancer before radiotherapy. Univariate and multivariate survival analyses were employed to validate the independent prognostic value of the fuzzy risk score. To further compare the predictive performance of the fuzzy risk score with other prognostic scoring systems, time-dependent receiver operating characteristic curve (ROC) analysis was used. Application of fuzzy logic to the serum values of CRP and albumin increased predictive performance for 1-year overall survival (AUC=0.773) compared with that of a single marker (AUC=0.743 and 0.700 for CRP and albumin, respectively), where the AUC denotes the area under curve. This fuzzy logic-based approach also performed consistently better than the Glasgow Prognostic Score (GPS) (AUC=0.745). Thus, application of fuzzy logic to the analysis of serum markers can more accurately predict the outcome for patients with esophageal cancer.

  16. Hardness assurance testing and radiation hardening by design techniques for silicon-germanium heterojunction bipolar transistors and digital logic circuits

    NASA Astrophysics Data System (ADS)

    Sutton, Akil K.

    Hydrocarbon exploration, global navigation satellite systems, computed tomography, and aircraft avionics are just a few examples of applications that require system operation at an ambient temperature, pressure, or radiation level outside the range covered by military specifications. The electronics employed in these applications are known as "extreme environment electronics." On account of the increased cost resulting from both process modifications and the use of exotic substrate materials, only a handful of semiconductor foundries have specialized in the production of extreme environment electronics. Protection of these electronic systems in an extreme environment may be attained by encapsulating sensitive circuits in a controlled environment, which provides isolation from the hostile ambient, often at a significant cost and performance penalty. In a significant departure from this traditional approach, system designers have begun to use commercial off-the-shelf technology platforms with built in mitigation techniques for extreme environment applications. Such an approach simultaneously leverages the state of the art in technology performance with significant savings in project cost. Silicon-germanium is one such commercial technology platform that demonstrates potential for deployment into extreme environment applications as a result of its excellent performance at cryogenic temperatures, remarkable tolerance to radiation-induced degradation, and monolithic integration with silicon-based manufacturing. In this dissertation the radiation response of silicon-germanium technology is investigated, and novel transistor-level layout-based techniques are implemented to improve the radiation tolerance of HBT digital logic.

  17. Predicting recycling behaviour: Comparison of a linear regression model and a fuzzy logic model.

    PubMed

    Vesely, Stepan; Klöckner, Christian A; Dohnal, Mirko

    2016-03-01

    In this paper we demonstrate that fuzzy logic can provide a better tool for predicting recycling behaviour than the customarily used linear regression. To show this, we take a set of empirical data on recycling behaviour (N=664), which we randomly divide into two halves. The first half is used to estimate a linear regression model of recycling behaviour, and to develop a fuzzy logic model of recycling behaviour. As the first comparison, the fit of both models to the data included in estimation of the models (N=332) is evaluated. As the second comparison, predictive accuracy of both models for "new" cases (hold-out data not included in building the models, N=332) is assessed. In both cases, the fuzzy logic model significantly outperforms the regression model in terms of fit. To conclude, when accurate predictions of recycling and possibly other environmental behaviours are needed, fuzzy logic modelling seems to be a promising technique. Copyright © 2015 Elsevier Ltd. All rights reserved.

  18. Development of fuzzy logic system to predict the SAW weldment shape profiles

    NASA Astrophysics Data System (ADS)

    Narang, H. K.; Mahapatra, M. M.; Jha, P. K.; Biswas, P.

    2012-09-01

    A fuzzy model was presented to predict the weldment shape profile of submerged arc welds (SAW) including the shape of heat affected zone (HAZ). The SAW bead-on-plates were welded by following a full factorial design matrix. The design matrix consisted of three levels of input welding process parameters. The welds were cross-sectioned and etched, and the zones were measured. A mapping technique was used to measure the various segments of the weld zones. These mapped zones were used to build a fuzzy logic model. The membership functions of the fuzzy model were chosen for the accurate prediction of the weld zone. The fuzzy model was further tested for a set of test case data. The weld zone predicted by the fuzzy logic model was compared with the experimentally obtained shape profiles and close agreement between the two was noted. The mapping technique developed for the weld zones and the fuzzy logic model can be used for on-line control of the SAW process. From the SAW fuzzy logic model an estimation of the fusion and HAZ can also be developed.

  19. Noise-Aided Logic in an Electronic Analog of Synthetic Genetic Networks

    PubMed Central

    Hellen, Edward H.; Dana, Syamal K.; Kurths, Jürgen; Kehler, Elizabeth; Sinha, Sudeshna

    2013-01-01

    We report the experimental verification of noise-enhanced logic behaviour in an electronic analog of a synthetic genetic network, composed of two repressors and two constitutive promoters. We observe good agreement between circuit measurements and numerical prediction, with the circuit allowing for robust logic operations in an optimal window of noise. Namely, the input-output characteristics of a logic gate is reproduced faithfully under moderate noise, which is a manifestation of the phenomenon known as Logical Stochastic Resonance. The two dynamical variables in the system yield complementary logic behaviour simultaneously. The system is easily morphed from AND/NAND to OR/NOR logic. PMID:24124531

  20. Postoperative vomiting in pediatric oncologic patients: prediction by a fuzzy logic model.

    PubMed

    Bassanezi, Betina S B; de Oliveira-Filho, Antônio G; Jafelice, Rosana S M; Bustorff-Silva, Joaquim M; Udelsmann, Artur

    2013-01-01

    To report a fuzzy logic mathematical model to predict postoperative vomiting (POV) in pediatric oncologic patients and compare with preexisting scores. Although POV has a high incidence in children and may decrease parental satisfaction after surgeries, there is only one specific score that predicts POV in children: the Eberhart's score. In this study, we report a fuzzy model that intends to predict the probability of POV in pediatric oncologic patients. Fuzzy logic is a mathematical theory that recognizes more than simple true and false values and takes into account levels of continuous variables such as age or duration of the surgery. The fuzzy model tries to account for subjectiveness in the variables. Preoperative potential risk factors for POV in 198 children (0-19 year old) with malignancies were collected and analyzed. Data analysis was performed with the chi-square test and logistic regression to evaluate probable risk factors for POV. A system based on fuzzy logic was developed with the risk factors found in the logistic regression, and a computational interface was created to calculate the probability of POV. The model showed a good performance in predicting POV. After the analysis, the model was compared with Eberhart's score in the same population and showed a better performance. The fuzzy score can predict the chance of POV in children with cancer with good accuracy, allowing better planning for postoperative prophylaxis of vomiting. The computational interface is available for free download at the internet and is very easy to use. © 2012 Blackwell Publishing Ltd.

  1. Poly-4-vinylphenol (PVP) and Poly(melamine-co-formaldehyde) (PMF)-Based Atomic Switching Device and Its Application to Logic Gate Circuits with Low Operating Voltage.

    PubMed

    Kang, Dong-Ho; Choi, Woo-Young; Woo, Hyunsuk; Jang, Sungkyu; Park, Hyung-Youl; Shim, Jaewoo; Choi, Jae-Woong; Kim, Sungho; Jeon, Sanghun; Lee, Sungjoo; Park, Jin-Hong

    2017-08-16

    In this study, we demonstrate a high-performance solid polymer electrolyte (SPE) atomic switching device with low SET/RESET voltages (0.25 and -0.5 V, respectively), high on/off-current ratio (10(5)), excellent cyclic endurance (>10(3)), and long retention time (>10(4) s), where poly-4-vinylphenol (PVP)/poly(melamine-co-formaldehyde) (PMF) is used as an SPE layer. To accomplish these excellent device performance parameters, we reduce the off-current level of the PVP/PMF atomic switching device by improving the electrical insulating property of the PVP/PMF electrolyte through adjustment of the number of cross-linked chains. We then apply a titanium buffer layer to the PVP/PMF switching device for further improvement of bipolar switching behavior and device stability. In addition, we first implement SPE atomic switch-based logic AND and OR circuits with low operating voltages below 2 V by integrating 5 × 5 arrays of PVP/PMF switching devices on the flexible substrate. In particular, this low operating voltage of our logic circuits was much lower than that (>5 V) of the circuits configured by polymer resistive random access memory. This research successfully presents the feasibility of PVP/PMF atomic switches for flexible integrated circuits for next-generation electronic applications.

  2. Causal Mathematical Logic as a guiding framework for the prediction of "Intelligence Signals" in brain simulations

    NASA Astrophysics Data System (ADS)

    Lanzalaco, Felix; Pissanetzky, Sergio

    2013-12-01

    A recent theory of physical information based on the fundamental principles of causality and thermodynamics has proposed that a large number of observable life and intelligence signals can be described in terms of the Causal Mathematical Logic (CML), which is proposed to encode the natural principles of intelligence across any physical domain and substrate. We attempt to expound the current definition of CML, the "Action functional" as a theory in terms of its ability to possess a superior explanatory power for the current neuroscientific data we use to measure the mammalian brains "intelligence" processes at its most general biophysical level. Brain simulation projects define their success partly in terms of the emergence of "non-explicitly programmed" complex biophysical signals such as self-oscillation and spreading cortical waves. Here we propose to extend the causal theory to predict and guide the understanding of these more complex emergent "intelligence Signals". To achieve this we review whether causal logic is consistent with, can explain and predict the function of complete perceptual processes associated with intelligence. Primarily those are defined as the range of Event Related Potentials (ERP) which include their primary subcomponents; Event Related Desynchronization (ERD) and Event Related Synchronization (ERS). This approach is aiming for a universal and predictive logic for neurosimulation and AGi. The result of this investigation has produced a general "Information Engine" model from translation of the ERD and ERS. The CML algorithm run in terms of action cost predicts ERP signal contents and is consistent with the fundamental laws of thermodynamics. A working substrate independent natural information logic would be a major asset. An information theory consistent with fundamental physics can be an AGi. It can also operate within genetic information space and provides a roadmap to understand the live biophysical operation of the phenotype

  3. Do institutional logics predict interpretation of contract rules at the dental chair-side?

    PubMed

    Harris, Rebecca; Brown, Stephen; Holt, Robin; Perkins, Elizabeth

    2014-12-01

    In quasi-markets, contracts find purchasers influencing health care providers, although problems exist where providers use personal bias and heuristics to respond to written agreements, tending towards the moral hazard of opportunism. Previous research on quasi-market contracts typically understands opportunism as fully rational, individual responses selecting maximally efficient outcomes from a set of possibilities. We take a more emotive and collective view of contracting, exploring the influence of institutional logics in relation to the opportunistic behaviour of dentists. Following earlier qualitative work where we identified four institutional logics in English general dental practice, and six dental contract areas where there was scope for opportunism; in 2013 we surveyed 924 dentists to investigate these logics and whether they had predictive purchase over dentists' chair-side behaviour. Factor analysis involving 300 responses identified four logics entwined in (often technical) behaviour: entrepreneurial commercialism, duty to staff and patients, managerialism, public good. Copyright © 2014 The Authors. Published by Elsevier Ltd.. All rights reserved.

  4. Simulation of the Predictive Control Algorithm for Container Crane Operation using Matlab Fuzzy Logic Tool Box

    NASA Technical Reports Server (NTRS)

    Richardson, Albert O.

    1997-01-01

    This research has investigated the use of fuzzy logic, via the Matlab Fuzzy Logic Tool Box, to design optimized controller systems. The engineering system for which the controller was designed and simulate was the container crane. The fuzzy logic algorithm that was investigated was the 'predictive control' algorithm. The plant dynamics of the container crane is representative of many important systems including robotic arm movements. The container crane that was investigated had a trolley motor and hoist motor. Total distance to be traveled by the trolley was 15 meters. The obstruction height was 5 meters. Crane height was 17.8 meters. Trolley mass was 7500 kilograms. Load mass was 6450 kilograms. Maximum trolley and rope velocities were 1.25 meters per sec. and 0.3 meters per sec., respectively. The fuzzy logic approach allowed the inclusion, in the controller model, of performance indices that are more effectively defined in linguistic terms. These include 'safety' and 'cargo swaying'. Two fuzzy inference systems were implemented using the Matlab simulation package, namely the Mamdani system (which relates fuzzy input variables to fuzzy output variables), and the Sugeno system (which relates fuzzy input variables to crisp output variable). It is found that the Sugeno FIS is better suited to including aspects of those plant dynamics whose mathematical relationships can be determined.

  5. Simulation of the Predictive Control Algorithm for Container Crane Operation using Matlab Fuzzy Logic Tool Box

    NASA Technical Reports Server (NTRS)

    Richardson, Albert O.

    1997-01-01

    This research has investigated the use of fuzzy logic, via the Matlab Fuzzy Logic Tool Box, to design optimized controller systems. The engineering system for which the controller was designed and simulate was the container crane. The fuzzy logic algorithm that was investigated was the 'predictive control' algorithm. The plant dynamics of the container crane is representative of many important systems including robotic arm movements. The container crane that was investigated had a trolley motor and hoist motor. Total distance to be traveled by the trolley was 15 meters. The obstruction height was 5 meters. Crane height was 17.8 meters. Trolley mass was 7500 kilograms. Load mass was 6450 kilograms. Maximum trolley and rope velocities were 1.25 meters per sec. and 0.3 meters per sec., respectively. The fuzzy logic approach allowed the inclusion, in the controller model, of performance indices that are more effectively defined in linguistic terms. These include 'safety' and 'cargo swaying'. Two fuzzy inference systems were implemented using the Matlab simulation package, namely the Mamdani system (which relates fuzzy input variables to fuzzy output variables), and the Sugeno system (which relates fuzzy input variables to crisp output variable). It is found that the Sugeno FIS is better suited to including aspects of those plant dynamics whose mathematical relationships can be determined.

  6. Logic models to predict continuous outputs based on binary inputs with an application to personalized cancer therapy

    PubMed Central

    Knijnenburg, Theo A.; Klau, Gunnar W.; Iorio, Francesco; Garnett, Mathew J.; McDermott, Ultan; Shmulevich, Ilya; Wessels, Lodewyk F. A.

    2016-01-01

    Mining large datasets using machine learning approaches often leads to models that are hard to interpret and not amenable to the generation of hypotheses that can be experimentally tested. We present ‘Logic Optimization for Binary Input to Continuous Output’ (LOBICO), a computational approach that infers small and easily interpretable logic models of binary input features that explain a continuous output variable. Applying LOBICO to a large cancer cell line panel, we find that logic combinations of multiple mutations are more predictive of drug response than single gene predictors. Importantly, we show that the use of the continuous information leads to robust and more accurate logic models. LOBICO implements the ability to uncover logic models around predefined operating points in terms of sensitivity and specificity. As such, it represents an important step towards practical application of interpretable logic models. PMID:27876821

  7. Logic models to predict continuous outputs based on binary inputs with an application to personalized cancer therapy

    NASA Astrophysics Data System (ADS)

    Knijnenburg, Theo A.; Klau, Gunnar W.; Iorio, Francesco; Garnett, Mathew J.; McDermott, Ultan; Shmulevich, Ilya; Wessels, Lodewyk F. A.

    2016-11-01

    Mining large datasets using machine learning approaches often leads to models that are hard to interpret and not amenable to the generation of hypotheses that can be experimentally tested. We present ‘Logic Optimization for Binary Input to Continuous Output’ (LOBICO), a computational approach that infers small and easily interpretable logic models of binary input features that explain a continuous output variable. Applying LOBICO to a large cancer cell line panel, we find that logic combinations of multiple mutations are more predictive of drug response than single gene predictors. Importantly, we show that the use of the continuous information leads to robust and more accurate logic models. LOBICO implements the ability to uncover logic models around predefined operating points in terms of sensitivity and specificity. As such, it represents an important step towards practical application of interpretable logic models.

  8. Ferrite logic reliability study

    NASA Technical Reports Server (NTRS)

    Baer, J. A.; Clark, C. B.

    1973-01-01

    Development and use of digital circuits called all-magnetic logic are reported. In these circuits the magnetic elements and their windings comprise the active circuit devices in the logic portion of a system. The ferrite logic device belongs to the all-magnetic class of logic circuits. The FLO device is novel in that it makes use of a dual or bimaterial ferrite composition in one physical ceramic body. This bimaterial feature, coupled with its potential for relatively high speed operation, makes it attractive for high reliability applications. (Maximum speed of operation approximately 50 kHz.)

  9. Feasibility of using adaptive logic networks to predict compressor unit failure

    SciTech Connect

    Armstrong, W.W.; Chungying Chu; Thomas, M.M.

    1995-12-31

    In this feasibility study, an adaptive logic network (ALN) was trained to predict failures of turbine-driven compressor units using a large database of measurements. No expert knowledge about compressor systems was involved. The predictions used only the statistical properties of the measurements and the indications of failure types. A fuzzy set was used to model measurements typical of normal operation. It was constrained by a requirement imposed during ALN training, that it should have a shape similar to a Gaussian density, more precisely, that its logarithm should be convex-up. Initial results obtained using this approach to knowledge discovery in the database were encouraging.

  10. Low latency asynchronous interface circuits

    DOEpatents

    Sadowski, Greg

    2017-06-20

    In one form, a logic circuit includes an asynchronous logic circuit, a synchronous logic circuit, and an interface circuit coupled between the asynchronous logic circuit and the synchronous logic circuit. The asynchronous logic circuit has a plurality of asynchronous outputs for providing a corresponding plurality of asynchronous signals. The synchronous logic circuit has a plurality of synchronous inputs corresponding to the plurality of asynchronous outputs, a stretch input for receiving a stretch signal, and a clock output for providing a clock signal. The synchronous logic circuit provides the clock signal as a periodic signal but prolongs a predetermined state of the clock signal while the stretch signal is active. The asynchronous interface detects whether metastability could occur when latching any of the plurality of the asynchronous outputs of the asynchronous logic circuit using said clock signal, and activates the stretch signal while the metastability could occur.

  11. COED Transactions, Vol. XI, No. 6, June 1979. A Take-Home Laboratory Approach for Logic Circuits Courses.

    ERIC Educational Resources Information Center

    Mitchell, Eugene E., Ed.

    Presented is an integration of laboratory and lecture results in special homework problems for this logic design course. The Bit Bucket, a compact logic trainer, is the basis for the program. A discussion is presented of the reasons for changing to the new method. Experiences are included. (SA)

  12. NOT and NAND logic circuits composed of top-gate ZnO nanowire field-effect transistors with high-k Al(2)O(3) gate layers.

    PubMed

    Yeom, Donghyuk; Keem, Kihyun; Kang, Jeongmin; Jeong, Dong-Young; Yoon, Changjoon; Kim, Dongseung; Kim, Sangsig

    2008-07-02

    Electrical characteristics of NOT and NAND logic circuits fabricated using top-gate ZnO nanowire field-effect transistors (FETs) with high-k Al(2)O(3) gate layers were investigated in this study. To form a NOT logic circuit, two identical FETs whose I(on)/I(off) ratios were as high as ∼10(8) were connected in series in a single ZnO nanowire channel, sharing a common source electrode. Its voltage transfer characteristics exhibited an inverting operation and its logic swing was 98%. In addition, the characteristics of a NAND logic circuit composed of three top-gate FETs connected in series in a single nanowire channel are discussed in this paper.

  13. Discovery of Drug Synergies in Gastric Cancer Cells Predicted by Logical Modeling.

    PubMed

    Flobak, Åsmund; Baudot, Anaïs; Remy, Elisabeth; Thommesen, Liv; Thieffry, Denis; Kuiper, Martin; Lægreid, Astrid

    2015-08-01

    Discovery of efficient anti-cancer drug combinations is a major challenge, since experimental testing of all possible combinations is clearly impossible. Recent efforts to computationally predict drug combination responses retain this experimental search space, as model definitions typically rely on extensive drug perturbation data. We developed a dynamical model representing a cell fate decision network in the AGS gastric cancer cell line, relying on background knowledge extracted from literature and databases. We defined a set of logical equations recapitulating AGS data observed in cells in their baseline proliferative state. Using the modeling software GINsim, model reduction and simulation compression techniques were applied to cope with the vast state space of large logical models and enable simulations of pairwise applications of specific signaling inhibitory chemical substances. Our simulations predicted synergistic growth inhibitory action of five combinations from a total of 21 possible pairs. Four of the predicted synergies were confirmed in AGS cell growth real-time assays, including known effects of combined MEK-AKT or MEK-PI3K inhibitions, along with novel synergistic effects of combined TAK1-AKT or TAK1-PI3K inhibitions. Our strategy reduces the dependence on a priori drug perturbation experimentation for well-characterized signaling networks, by demonstrating that a model predictive of combinatorial drug effects can be inferred from background knowledge on unperturbed and proliferating cancer cells. Our modeling approach can thus contribute to preclinical discovery of efficient anticancer drug combinations, and thereby to development of strategies to tailor treatment to individual cancer patients.

  14. A Novel Prediction Method about Single Components of Analog Circuits Based on Complex Field Modeling

    PubMed Central

    Tian, Shulin; Yang, Chenglin

    2014-01-01

    Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments. PMID:25147853

  15. A novel prediction method about single components of analog circuits based on complex field modeling.

    PubMed

    Zhou, Jingyu; Tian, Shulin; Yang, Chenglin

    2014-01-01

    Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments.

  16. Logic-based models in systems biology: a predictive and parameter-free network analysis method†

    PubMed Central

    Wynn, Michelle L.; Consul, Nikita; Merajver, Sofia D.

    2012-01-01

    Highly complex molecular networks, which play fundamental roles in almost all cellular processes, are known to be dysregulated in a number of diseases, most notably in cancer. As a consequence, there is a critical need to develop practical methodologies for constructing and analysing molecular networks at a systems level. Mathematical models built with continuous differential equations are an ideal methodology because they can provide a detailed picture of a network’s dynamics. To be predictive, however, differential equation models require that numerous parameters be known a priori and this information is almost never available. An alternative dynamical approach is the use of discrete logic-based models that can provide a good approximation of the qualitative behaviour of a biochemical system without the burden of a large parameter space. Despite their advantages, there remains significant resistance to the use of logic-based models in biology. Here, we address some common concerns and provide a brief tutorial on the use of logic-based models, which we motivate with biological examples. PMID:23072820

  17. Clinical outcome prediction in aneurysmal subarachnoid hemorrhage using Bayesian neural networks with fuzzy logic inferences.

    PubMed

    Lo, Benjamin W Y; Macdonald, R Loch; Baker, Andrew; Levine, Mitchell A H

    2013-01-01

    The novel clinical prediction approach of Bayesian neural networks with fuzzy logic inferences is created and applied to derive prognostic decision rules in cerebral aneurysmal subarachnoid hemorrhage (aSAH). The approach of Bayesian neural networks with fuzzy logic inferences was applied to data from five trials of Tirilazad for aneurysmal subarachnoid hemorrhage (3551 patients). Bayesian meta-analyses of observational studies on aSAH prognostic factors gave generalizable posterior distributions of population mean log odd ratios (ORs). Similar trends were noted in Bayesian and linear regression ORs. Significant outcome predictors include normal motor response, cerebral infarction, history of myocardial infarction, cerebral edema, history of diabetes mellitus, fever on day 8, prior subarachnoid hemorrhage, admission angiographic vasospasm, neurological grade, intraventricular hemorrhage, ruptured aneurysm size, history of hypertension, vasospasm day, age and mean arterial pressure. Heteroscedasticity was present in the nontransformed dataset. Artificial neural networks found nonlinear relationships with 11 hidden variables in 1 layer, using the multilayer perceptron model. Fuzzy logic decision rules (centroid defuzzification technique) denoted cut-off points for poor prognosis at greater than 2.5 clusters. This aSAH prognostic system makes use of existing knowledge, recognizes unknown areas, incorporates one's clinical reasoning, and compensates for uncertainty in prognostication.

  18. A comparison of neural network models, fuzzy logic, and multiple linear regression for prediction of hatchability.

    PubMed

    Mehri, M

    2013-04-01

    Application of appropriate models to approximate the performance function warrants more precise prediction and helps to make the best decisions in the poultry industry. This study reevaluated the factors affecting hatchability in laying hens from 29 to 56 wk of age. Twenty-eight data lines representing 4 inputs consisting of egg weight, eggshell thickness, egg sphericity, and yolk/albumin ratio and 1 output, hatchability, were obtained from the literature and used to train an artificial neural network (ANN). The prediction ability of ANN was compared with that of fuzzy logic to evaluate the fitness of these 2 methods. The models were compared using R(2), mean absolute deviation (MAD), mean squared error (MSE), mean absolute percentage error (MAPE), and bias. The developed model was used to assess the relative importance of each variable on the hatchability by calculating the variable sensitivity ratio. The statistical evaluations showed that the ANN-based model predicted hatchability more accurately than fuzzy logic. The ANN-based model had a higher determination of coefficient (R(2) = 0.99) and lower residual distribution (MAD = 0.005; MSE = 0.00004; MAPE = 0.732; bias = 0.0012) than fuzzy logic (R(2) = 0.87; MAD = 0.014; MSE = 0.0004; MAPE = 2.095; bias = 0.0046). The sensitivity analysis revealed that the most important variable in the ANN-based model of hatchability was egg weight (variable sensitivity ratio, VSR = 283.11), followed by yolk/albumin ratio (VSR = 113.16), eggshell thickness (VSR = 16.23), and egg sphericity (VSR = 3.63). The results of this research showed that the universal approximation capability of ANN made it a powerful tool to approximate complex functions such as hatchability in the incubation process.

  19. Hybrid intelligent systems for time series prediction using neural networks, fuzzy logic, and fractal theory.

    PubMed

    Castillo, O; Melin, P

    2002-01-01

    In this paper, we describe a new method for the estimation of the fractal dimension of a geometrical object using fuzzy logic techniques. The fractal dimension is a mathematical concept, which measures the geometrical complexity of an object. The algorithms for estimating the fractal dimension calculate a numerical value using as data a time series for the specific problem. This numerical (crisp) value gives an idea of the complexity of the geometrical object (or time series). However, there is an underlying uncertainty in the estimation of the fractal dimension because we use only a sample of points of the object, and also because the numerical algorithms for the fractal dimension are not completely accurate. For this reason, we have proposed a new definition of the fractal dimension that incorporates the concept of a fuzzy set. This new definition can be considered a weaker definition (but more realistic) of the fractal dimension, and we have named this the "fuzzy fractal dimension." We can apply this new definition of the fractal dimension in conjunction with soft computing techniques for the problem of time series prediction. We have developed hybrid intelligent systems combining neural networks, fuzzy logic, and the fractal dimension, for the problem of time series prediction, and we have achieved very good results.

  20. Prediction of protein function improving sequence remote alignment search by a fuzzy logic algorithm.

    PubMed

    Gómez, Antonio; Cedano, Juan; Espadaler, Jordi; Hermoso, Antonio; Piñol, Jaume; Querol, Enrique

    2008-02-01

    The functional annotation of the new protein sequences represents a major drawback for genomic science. The best way to suggest the function of a protein from its sequence is by finding a related one for which biological information is available. Current alignment algorithms display a list of protein sequence stretches presenting significant similarity to different protein targets, ordered by their respective mathematical scores. However, statistical and biological significance do not always coincide, therefore, the rearrangement of the program output according to more biological characteristics than the mathematical scoring would help functional annotation. A new method that predicts the putative function for the protein integrating the results from the PSI-BLAST program and a fuzzy logic algorithm is described. Several protein sequence characteristics have been checked in their ability to rearrange a PSI-BLAST profile according more to their biological functions. Four of them: amino acid content, matched segment length and hydropathic and flexibility profiles positively contributed, upon being integrated by a fuzzy logic algorithm into a program, BYPASS, to the accurate prediction of the function of a protein from its sequence.

  1. Programmable logic controller implementation of an auto-tuned predictive control based on minimal plant information.

    PubMed

    Valencia-Palomo, G; Rossiter, J A

    2011-01-01

    This paper makes two key contributions. First, it tackles the issue of the availability of constrained predictive control for low-level control loops. Hence, it describes how the constrained control algorithm is embedded in an industrial programmable logic controller (PLC) using the IEC 61131-3 programming standard. Second, there is a definition and implementation of a novel auto-tuned predictive controller; the key novelty is that the modelling is based on relatively crude but pragmatic plant information. Laboratory experiment tests were carried out in two bench-scale laboratory systems to prove the effectiveness of the combined algorithm and hardware solution. For completeness, the results are compared with a commercial proportional-integral-derivative (PID) controller (also embedded in the PLC) using the most up to date auto-tuning rules.

  2. Active quench and reset integrated circuit with novel hold-off time control logic for Geiger-mode avalanche photodiodes.

    PubMed

    Deng, Shijie; Morrison, Alan P

    2012-09-15

    This Letter presents an active quench-and-reset circuit for Geiger-mode avalanche photodiodes (GM-APDs). The integrated circuit was fabricated using a conventional 0.35 μm complementary metal oxide semiconductor process. Experimental results show that the circuit is capable of linearly setting the hold-off time from several nanoseconds to microseconds with a resolution of 6.5 ns. This allows the selection of the optimal afterpulse-free hold-off time for the GM-APD via external digital inputs or additional signal processing circuitry. Moreover, this circuit resets the APD automatically following the end of the hold-off period, thus simplifying the control for the end user. Results also show that a minimum dead time of 28.4 ns is achieved, demonstrating a saturated photon-counting rate of 35.2 Mcounts/s.

  3. Prediction of rodent carcinogenicity bioassays from molecular structure using inductive logic programming.

    PubMed Central

    King, R D; Srinivasan, A

    1996-01-01

    The machine learning program Progol was applied to the problem of forming the structure-activity relationship (SAR) for a set of compounds tested for carcinogenicity in rodent bioassays by the U.S. National Toxicology Program (NTP). Progol is the first inductive logic programming (ILP) algorithm to use a fully relational method for describing chemical structure in SARs, based on using atoms and their bond connectivities. Progol is well suited to forming SARs for carcinogenicity as it is designed to produce easily understandable rules (structural alerts) for sets of noncongeneric compounds. The Progol SAR method was tested by prediction of a set of compounds that have been widely predicted by other SAR methods (the compounds used in the NTP's first round of carcinogenesis predictions). For these compounds no method (human or machine) was significantly more accurate than Progol. Progol was the most accurate method that did not use data from biological tests on rodents (however, the difference in accuracy is not significant). The Progol predictions were based solely on chemical structure and the results of tests for Salmonella mutagenicity. Using the full NTP database, the prediction accuracy of Progol was estimated to be 63% (+/- 3%) using 5-fold cross validation. A set of structural alerts for carcinogenesis was automatically generated and the chemical rationale for them investigated- these structural alerts are statistically independent of the Salmonella mutagenicity. Carcinogenicity is predicted for the compounds used in the NTP's second round of carcinogenesis predictions. The results for prediction of carcinogenesis, taken together with the previous successful applications of predicting mutagenicity in nitroaromatic compounds, and inhibition of angiogenesis by suramin analogues, show that Progol has a role to play in understanding the SARs of cancer-related compounds. PMID:8933051

  4. Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer.

    PubMed

    Dao, Toan Thanh; Sakai, Heisuke; Nguyen, Hai Thanh; Ohkubo, Kei; Fukuzumi, Shunichi; Murata, Hideyuki

    2016-07-20

    We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.

  5. Multi-input and -output logic circuits based on bioelectrocatalysis with horseradish peroxidase and glucose oxidase immobilized in multi-responsive copolymer films on electrodes.

    PubMed

    Yu, Xue; Lian, Wenjing; Zhang, Jiannan; Liu, Hongyun

    2016-06-15

    Herein, poly(N-isopropylacrylamide-co-N,N'-dimethylaminoethylmethacrylate) copolymer films were polymerized on electrode surface with a simple one-step method, and the enzyme horseradish peroxidase (HRP) was embedded in the films simultaneously, which were designated as P(NiPAAm-co-DMEM)-HRP. The films exhibited a reversible structure change with the external stimuli, such as pH, CO2, temperature and SO4(2-), causing the cyclic voltammetric (CV) response of electroactive K3Fe(CN)6 at the film electrodes to display the corresponding multi-stimuli sensitive ON-OFF behavior. Based on the switchable CV property of the system and the electrochemical reduction of H2O2 catalyzed by HRP in the films and mediated by Fe(CN)6(3-) in solution, a 5-input/3-output logic gate was established. To further increase the complexity of the logic system, another enzyme glucose oxidase (GOD) was added into the films, designated as P(NiPAAm-co-DMEM)-HRP-GOD. In the presence of oxygen, the oxidation of glucose in the solution was catalyzed by GOD in the films, and the produced H2O2 in situ was recognized and electrocatalytically reduced by HRP and mediated by Fe(CN)6(3-). Based on the bienzyme films, a cascaded or concatenated 4-input/3-output logic gate system was proposed. The present work combined the multi-responsive interface with bioelectrocatalysis to construct cascaded logic circuits, which might open a new avenue to develop biocomputing elements with more sophisticated functions and design novel glucose biosensors. Copyright © 2016 Elsevier B.V. All rights reserved.

  6. Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

    PubMed

    Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

    2016-02-23

    We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

  7. Computer-aided prediction of high-frequency performance limits in silicon bipolar integrated circuits

    NASA Technical Reports Server (NTRS)

    Burns, J. L.; Choma, J., Jr.

    1982-01-01

    A circuit model for an existing silicon integrated bipolar junction transistor (IBJT) is used to evaluate presently achievable high frequency circuit performance. The relationship between circuit model and processing parameters are semi-quantitatively explored to make predictions on the frequency response, which can be achieved through realistic device fabrication modifications. A new figure of merit is introduced, which is defined as the signal frequency at which an integrated bipolar junction transistor can deliver a power gain of G. The most sensitive parameter influencing attainable high frequency IBJT performance is base resistance.

  8. A reconfigurable NAND/NOR genetic logic gate

    PubMed Central

    2012-01-01

    Background Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates. While electronics is a highly standardized science, genetic logic is still in its infancy, with few agreed standards. In this paper we focus on the interpretation of logical values in terms of molecular concentrations. Results We describe the results of computational investigations of a novel circuit that is able to trigger specific differential responses depending on the input standard used. The circuit can therefore be dynamically reconfigured (without modification) to serve as both a NAND/NOR logic gate. This multi-functional behaviour is achieved by a) varying the meanings of inputs, and b) using branch predictions (as in computer science) to display a constrained output. A thorough computational study is performed, which provides valuable insights for the future laboratory validation. The simulations focus on both single-cell and population behaviours. The latter give particular insights into the spatial behaviour of our engineered cells on a surface with a non-homogeneous distribution of inputs. Conclusions We present a dynamically-reconfigurable NAND/NOR genetic logic circuit that can be switched between modes of operation via a simple shift in input signal concentration. The circuit addresses important issues in genetic logic that will have significance for more complex synthetic biology applications. PMID:22989145

  9. A reconfigurable NAND/NOR genetic logic gate.

    PubMed

    Goñi-Moreno, Angel; Amos, Martyn

    2012-09-18

    Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates. While electronics is a highly standardized science, genetic logic is still in its infancy, with few agreed standards. In this paper we focus on the interpretation of logical values in terms of molecular concentrations. We describe the results of computational investigations of a novel circuit that is able to trigger specific differential responses depending on the input standard used. The circuit can therefore be dynamically reconfigured (without modification) to serve as both a NAND/NOR logic gate. This multi-functional behaviour is achieved by a) varying the meanings of inputs, and b) using branch predictions (as in computer science) to display a constrained output. A thorough computational study is performed, which provides valuable insights for the future laboratory validation. The simulations focus on both single-cell and population behaviours. The latter give particular insights into the spatial behaviour of our engineered cells on a surface with a non-homogeneous distribution of inputs. We present a dynamically-reconfigurable NAND/NOR genetic logic circuit that can be switched between modes of operation via a simple shift in input signal concentration. The circuit addresses important issues in genetic logic that will have significance for more complex synthetic biology applications.

  10. Simulated Laboratory in Digital Logic.

    ERIC Educational Resources Information Center

    Cleaver, Thomas G.

    Design of computer circuits used to be a pencil and paper task followed by laboratory tests, but logic circuit design can now be done in half the time as the engineer accesses a program which simulates the behavior of real digital circuits, and does all the wiring and testing on his computer screen. A simulated laboratory in digital logic has been…

  11. Simulated Laboratory in Digital Logic.

    ERIC Educational Resources Information Center

    Cleaver, Thomas G.

    Design of computer circuits used to be a pencil and paper task followed by laboratory tests, but logic circuit design can now be done in half the time as the engineer accesses a program which simulates the behavior of real digital circuits, and does all the wiring and testing on his computer screen. A simulated laboratory in digital logic has been…

  12. Interference Path Loss Prediction in A319/320 Airplanes Using Modulated Fuzzy Logic and Neural Networks

    NASA Technical Reports Server (NTRS)

    Jafri, Madiha J.; Ely, Jay J.; Vahala, Linda L.

    2007-01-01

    In this paper, neural network (NN) modeling is combined with fuzzy logic to estimate Interference Path Loss measurements on Airbus 319 and 320 airplanes. Interference patterns inside the aircraft are classified and predicted based on the locations of the doors, windows, aircraft structures and the communication/navigation system-of-concern. Modeled results are compared with measured data. Combining fuzzy logic and NN modeling is shown to improve estimates of measured data over estimates obtained with NN alone. A plan is proposed to enhance the modeling for better prediction of electromagnetic coupling problems inside aircraft.

  13. High-performance top-gated monolayer SnS2 field-effect transistors and their integrated logic circuits.

    PubMed

    Song, H S; Li, S L; Gao, L; Xu, Y; Ueno, K; Tang, J; Cheng, Y B; Tsukagoshi, K

    2013-10-21

    Two-dimensional (2D) layered semiconductors are very promising for post-silicon ultrathin channels and flexible electronics due to the remarkable dimensional and mechanical properties. Besides molybdenum disulfide (MoS2), the first recognized 2D semiconductor, it is also important to explore the wide spectrum of layered metal chalcogenides (LMCs) and to identify possible compounds with high performance. Here we report the fabrication of high-performance top-gated field-effect transistors (FETs) and related logic gates from monolayer tin disulfide (SnS2), a non-transition metal dichalcogenide. The measured carrier mobility of our monolayer devices reaches 50 cm(2) V(-1) s(-1), much higher than that of the back-gated counterparts (~1 cm(2) V(-1) s(-1)). Based on a direct-coupled FET logic technique, advanced Boolean logic gates and operations are also implemented, with a voltage gain of 3.5 and output swing of >90% for the NOT and NOR gates, respectively. The superior electrical and integration properties make monolayer SnS2 a strong candidate for next-generation atomic electronics.

  14. Temporal and Spatial prediction of groundwater levels using Artificial Neural Networks, Fuzzy logic and Kriging interpolation.

    NASA Astrophysics Data System (ADS)

    Tapoglou, Evdokia; Karatzas, George P.; Trichakis, Ioannis C.; Varouchakis, Emmanouil A.

    2014-05-01

    The purpose of this study is to examine the use of Artificial Neural Networks (ANN) combined with kriging interpolation method, in order to simulate the hydraulic head both spatially and temporally. Initially, ANNs are used for the temporal simulation of the hydraulic head change. The results of the most appropriate ANNs, determined through a fuzzy logic system, are used as an input for the kriging algorithm where the spatial simulation is conducted. The proposed algorithm is tested in an area located across Isar River in Bayern, Germany and covers an area of approximately 7800 km2. The available data extend to a time period from 1/11/2008 to 31/10/2012 (1460 days) and include the hydraulic head at 64 wells, temperature and rainfall at 7 weather stations and surface water elevation at 5 monitoring stations. One feedforward ANN was trained for each of the 64 wells, where hydraulic head data are available, using a backpropagation algorithm. The most appropriate input parameters for each wells' ANN are determined considering their proximity to the measuring station, as well as their statistical characteristics. For the rainfall, the data for two consecutive time lags for best correlated weather station, as well as a third and fourth input from the second best correlated weather station, are used as an input. The surface water monitoring stations with the three best correlations for each well are also used in every case. Finally, the temperature for the best correlated weather station is used. Two different architectures are considered and the one with the best results is used henceforward. The output of the ANNs corresponds to the hydraulic head change per time step. These predictions are used in the kriging interpolation algorithm. However, not all 64 simulated values should be used. The appropriate neighborhood for each prediction point is constructed based not only on the distance between known and prediction points, but also on the training and testing error of

  15. Application of Multi-Threshold NULL Convention Logic to Adaptive Beamforming Circuits for Ultra-Low Power

    DTIC Science & Technology

    2016-03-31

    MTNCL design showed substantial improvements in terms of active energy and leakage power compared to the equivalent synchronous design. Keywords...Introduction In recent decades, power consumption has become a major consideration in integrated circuit design. In high speed systems, clock...switching could use a large portion of power. Additionally, leakage power has come to dominate power consumption as process sizes shrink. Adaptive

  16. Logic programming to predict cell fate patterns and retrodict genotypes in organogenesis.

    PubMed

    Hall, Benjamin A; Jackson, Ethan; Hajnal, Alex; Fisher, Jasmin

    2014-09-06

    Caenorhabditis elegans vulval development is a paradigm system for understanding cell differentiation in the process of organogenesis. Through temporal and spatial controls, the fate pattern of six cells is determined by the competition of the LET-23 and the Notch signalling pathways. Modelling cell fate determination in vulval development using state-based models, coupled with formal analysis techniques, has been established as a powerful approach in predicting the outcome of combinations of mutations. However, computing the outcomes of complex and highly concurrent models can become prohibitive. Here, we show how logic programs derived from state machines describing the differentiation of C. elegans vulval precursor cells can increase the speed of prediction by four orders of magnitude relative to previous approaches. Moreover, this increase in speed allows us to infer, or 'retrodict', compatible genomes from cell fate patterns. We exploit this technique to predict highly variable cell fate patterns resulting from dig-1 reduced-function mutations and let-23 mosaics. In addition to the new insights offered, we propose our technique as a platform for aiding the design and analysis of experimental data.

  17. Logic programming to predict cell fate patterns and retrodict genotypes in organogenesis

    PubMed Central

    Hall, Benjamin A.; Jackson, Ethan; Hajnal, Alex; Fisher, Jasmin

    2014-01-01

    Caenorhabditis elegans vulval development is a paradigm system for understanding cell differentiation in the process of organogenesis. Through temporal and spatial controls, the fate pattern of six cells is determined by the competition of the LET-23 and the Notch signalling pathways. Modelling cell fate determination in vulval development using state-based models, coupled with formal analysis techniques, has been established as a powerful approach in predicting the outcome of combinations of mutations. However, computing the outcomes of complex and highly concurrent models can become prohibitive. Here, we show how logic programs derived from state machines describing the differentiation of C. elegans vulval precursor cells can increase the speed of prediction by four orders of magnitude relative to previous approaches. Moreover, this increase in speed allows us to infer, or ‘retrodict’, compatible genomes from cell fate patterns. We exploit this technique to predict highly variable cell fate patterns resulting from dig-1 reduced-function mutations and let-23 mosaics. In addition to the new insights offered, we propose our technique as a platform for aiding the design and analysis of experimental data. PMID:24966232

  18. Concatenated logic circuits based on a three-way DNA junction: a keypad-lock security system with visible readout and an automatic reset function.

    PubMed

    Chen, Junhua; Zhou, Shungui; Wen, Junlin

    2015-01-07

    Concatenated logic circuits operating as a biocomputing keypad-lock security system with an automatic reset function have been successfully constructed on the basis of toehold-mediated strand displacement and three-way-DNA-junction architecture. In comparison with previously reported keypad locks, the distinctive advantage of the proposed security system is that it can be reset and cycled spontaneously a large number of times without an external stimulus, thus making practical applications possible. By the use of a split-G-quadruplex DNAzyme as the signal reporter, the output of the keypad lock can be recognized readily by the naked eye. The "lock" is opened only when the inputs are introduced in an exact order. This requirement provides defense against illegal invasion to protect information at the molecular scale. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. Electrically reconfigurable logic array

    NASA Technical Reports Server (NTRS)

    Agarwal, R. K.

    1982-01-01

    To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the available programmable logic array (PLA) and the logic circuit elements used in such arrays was conducted. Based on this survey some recommendations are made for ERLA devices.

  20. Low Power Consumption Complementary Inverters with n-MoS2 and p-WSe2 Dichalcogenide Nanosheets on Glass for Logic and Light-Emitting Diode Circuits.

    PubMed

    Jeon, Pyo Jin; Kim, Jin Sung; Lim, June Yeong; Cho, Youngsuk; Pezeshki, Atiye; Lee, Hee Sung; Yu, Sanghyuck; Min, Sung-Wook; Im, Seongil

    2015-10-14

    Two-dimensional (2D) semiconductor materials with discrete bandgap become important because of their interesting physical properties and potentials toward future nanoscale electronics. Many 2D-based field effect transistors (FETs) have thus been reported. Several attempts to fabricate 2D complementary (CMOS) logic inverters have been made too. However, those CMOS devices seldom showed the most important advantage of typical CMOS: low power consumption. Here, we adopted p-WSe2 and n-MoS2 nanosheets separately for the channels of bottom-gate-patterned FETs, to fabricate 2D dichalcogenide-based hetero-CMOS inverters on the same glass substrate. Our hetero-CMOS inverters with electrically isolated FETs demonstrate novel and superior device performances of a maximum voltage gain as ∼27, sub-nanowatt power consumption, almost ideal noise margin approaching 0.5VDD (supply voltage, VDD=5 V) with a transition voltage of 2.3 V, and ∼800 μs for switching delay. Moreover, our glass-substrate CMOS device nicely performed digital logic (NOT, OR, and AND) and push-pull circuits for organic light-emitting diode switching, directly displaying the prospective of practical applications.

  1. Spatiotemporal prediction applying fuzzy logic in a sequence of satellite images

    NASA Astrophysics Data System (ADS)

    Mezzadri-Centeno, Tania; Selleron, Gilles

    2002-01-01

    Spatial evolutions of anthropized ecosystems and the progressive transformation of spaces in the course of time emerge more and more as a special interest issue in researches about the environment. This evolution constitutes one of the major concerns in the domain of environmental space management. The landscape evolution of a region area and the perspectives for a future state rises an issue particularly important. What will be the state of the region in 15, 30 or 50 years? Time can produce transformations over a region area like emergence, disappearance or union of spatial entities... These transformations are called temporal phenomena. We propose to predict the forestry evolution in the forthcoming years on an experimental area, which reveals these spatial transformations. The proposed method is based on the analysis of terrain landscape given a sequence of n satellite images, which represent the state of a region area in different years. For these purposes, we have developed a specific spatio-temporal prediction approach, linking results of forestry evolution analysis and fuzzy logic. The method is supported by the analysis of the landscape dynamics of a test-site located in a tropical rain country: the oriental piedmont of Andes Mountain in Venezuela. This large area - at the scale of a spot satellite image - is typical of tropical deforestation in a pioneer front. The presented approach allows the geographer interested in environmental prospective problems to get type cartographical documents showing future conditions of a landscape. The experimental tests have showed promising results.

  2. Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

    PubMed

    Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

    2017-10-02

    The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

  3. Prediction of photoperiodic regulators from quantitative gene circuit models.

    PubMed

    Salazar, José Domingo; Saithong, Treenut; Brown, Paul E; Foreman, Julia; Locke, James C W; Halliday, Karen J; Carré, Isabelle A; Rand, David A; Millar, Andrew J

    2009-12-11

    Photoperiod sensors allow physiological adaptation to the changing seasons. The prevalent hypothesis is that day length perception is mediated through coupling of an endogenous rhythm with an external light signal. Sufficient molecular data are available to test this quantitatively in plants, though not yet in mammals. In Arabidopsis, the clock-regulated genes CONSTANS (CO) and FLAVIN, KELCH, F-BOX (FKF1) and their light-sensitive proteins are thought to form an external coincidence sensor. Here, we model the integration of light and timing information by CO, its target gene FLOWERING LOCUS T (FT), and the circadian clock. Among other predictions, our models show that FKF1 activates FT. We demonstrate experimentally that this effect is independent of the known activation of CO by FKF1, thus we locate a major, novel controller of photoperiodism. External coincidence is part of a complex photoperiod sensor: modeling makes this complexity explicit and may thus contribute to crop improvement.

  4. Thread-Like CMOS Logic Circuits Enabled by Reel-Processed Single-Walled Carbon Nanotube Transistors via Selective Doping.

    PubMed

    Heo, Jae Sang; Kim, Taehoon; Ban, Seok-Gyu; Kim, Daesik; Lee, Jun Ho; Jur, Jesse S; Kim, Myung-Gil; Kim, Yong-Hoon; Hong, Yongtaek; Park, Sung Kyu

    2017-08-01

    The realization of large-area electronics with full integration of 1D thread-like devices may open up a new era for ultraflexible and human adaptable electronic systems because of their potential advantages in demonstrating scalable complex circuitry by a simply integrated weaving technology. More importantly, the thread-like fiber electronic devices can be achieved using a simple reel-to-reel process, which is strongly required for low-cost and scalable manufacturing technology. Here, high-performance reel-processed complementary metal-oxide-semiconductor (CMOS) integrated circuits are reported on 1D fiber substrates by using selectively chemical-doped single-walled carbon nanotube (SWCNT) transistors. With the introduction of selective n-type doping and a nonrelief photochemical patterning process, p- and n-type SWCNT transistors are successfully implemented on cylindrical fiber substrates under air ambient, enabling high-performance and reliable thread-like CMOS inverter circuits. In addition, it is noteworthy that the optimized reel-coating process can facilitate improvement in the arrangement of SWCNTs, building uniformly well-aligned SWCNT channels, and enhancement of the electrical performance of the devices. The p- and n-type SWCNT transistors exhibit field-effect mobility of 4.03 and 2.15 cm(2) V(-1) s(-1) , respectively, with relatively narrow distribution. Moreover, the SWCNT CMOS inverter circuits demonstrate a gain of 6.76 and relatively good dynamic operation at a supply voltage of 5.0 V. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Reversible logic gates on Physarum Polycephalum

    SciTech Connect

    Schumann, Andrew

    2015-03-10

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.

  6. Prediction of Building Floorplans Using Logical and Stochastic Reasoning Based on Sparse Observations

    NASA Astrophysics Data System (ADS)

    Loch-Dehbi, S.; Dehbi, Y.; Gröger, G.; Plümer, L.

    2016-10-01

    This paper introduces a novel method for the automatic derivation of building floorplans and indoor models. Our approach is based on a logical and stochastic reasoning using sparse observations such as building room areas. No further sensor observations like 3D point clouds are needed. Our method benefits from an extensive prior knowledge of functional dependencies and probability density functions of shape and location parameters of rooms depending on their functional use. The determination of posterior beliefs is performed using Bayesian Networks. Stochastic reasoning is complex since the problem is characterized by a mixture of discrete and continuous parameters that are in turn correlated by non-linear constraints. To cope with this kind of complexity, the proposed reasoner combines statistical methods with constraint propagation. It generates a limited number of hypotheses in a model-based top-down approach. It predicts floorplans based on a-priori localised windows. The use of Gaussian mixture models, constraint solvers and stochastic models helps to cope with the a-priori infinite space of the possible floorplan instantiations.

  7. Model Based Predictive Control of Multivariable Hammerstein Processes with Fuzzy Logic Hypercube Interpolated Models.

    PubMed

    Jeronymo, Daniel Cavalcanti; Coelho, Antonio Augusto Rodrigues

    This paper introduces the Fuzzy Logic Hypercube Interpolator (FLHI) and demonstrates applications in control of multiple-input single-output (MISO) and multiple-input multiple-output (MIMO) processes with Hammerstein nonlinearities. FLHI consists of a Takagi-Sugeno fuzzy inference system where membership functions act as kernel functions of an interpolator. Conjunction of membership functions in an unitary hypercube space enables multivariable interpolation of N-dimensions. Membership functions act as interpolation kernels, such that choice of membership functions determines interpolation characteristics, allowing FLHI to behave as a nearest-neighbor, linear, cubic, spline or Lanczos interpolator, to name a few. The proposed interpolator is presented as a solution to the modeling problem of static nonlinearities since it is capable of modeling both a function and its inverse function. Three study cases from literature are presented, a single-input single-output (SISO) system, a MISO and a MIMO system. Good results are obtained regarding performance metrics such as set-point tracking, control variation and robustness. Results demonstrate applicability of the proposed method in modeling Hammerstein nonlinearities and their inverse functions for implementation of an output compensator with Model Based Predictive Control (MBPC), in particular Dynamic Matrix Control (DMC).

  8. Model Based Predictive Control of Multivariable Hammerstein Processes with Fuzzy Logic Hypercube Interpolated Models

    PubMed Central

    Coelho, Antonio Augusto Rodrigues

    2016-01-01

    This paper introduces the Fuzzy Logic Hypercube Interpolator (FLHI) and demonstrates applications in control of multiple-input single-output (MISO) and multiple-input multiple-output (MIMO) processes with Hammerstein nonlinearities. FLHI consists of a Takagi-Sugeno fuzzy inference system where membership functions act as kernel functions of an interpolator. Conjunction of membership functions in an unitary hypercube space enables multivariable interpolation of N-dimensions. Membership functions act as interpolation kernels, such that choice of membership functions determines interpolation characteristics, allowing FLHI to behave as a nearest-neighbor, linear, cubic, spline or Lanczos interpolator, to name a few. The proposed interpolator is presented as a solution to the modeling problem of static nonlinearities since it is capable of modeling both a function and its inverse function. Three study cases from literature are presented, a single-input single-output (SISO) system, a MISO and a MIMO system. Good results are obtained regarding performance metrics such as set-point tracking, control variation and robustness. Results demonstrate applicability of the proposed method in modeling Hammerstein nonlinearities and their inverse functions for implementation of an output compensator with Model Based Predictive Control (MBPC), in particular Dynamic Matrix Control (DMC). PMID:27657723

  9. Fundamentals of Digital Logic.

    ERIC Educational Resources Information Center

    Noell, Monica L.

    This course is designed to prepare electronics personnel for further training in digital techniques, presenting need to know information that is basic to any maintenance course on digital equipment. It consists of seven study units: (1) binary arithmetic; (2) boolean algebra; (3) logic gates; (4) logic flip-flops; (5) nonlogic circuits; (6)…

  10. Fundamentals of Digital Logic.

    ERIC Educational Resources Information Center

    Noell, Monica L.

    This course is designed to prepare electronics personnel for further training in digital techniques, presenting need to know information that is basic to any maintenance course on digital equipment. It consists of seven study units: (1) binary arithmetic; (2) boolean algebra; (3) logic gates; (4) logic flip-flops; (5) nonlogic circuits; (6)…

  11. Plastic corollary discharge predicts sensory consequences of movements in a cerebellum-like circuit.

    PubMed

    Requarth, Tim; Sawtell, Nathaniel B

    2014-05-21

    The capacity to predict the sensory consequences of movements is critical for sensory, motor, and cognitive function. Though it is hypothesized that internal signals related to motor commands, known as corollary discharge, serve to generate such predictions, this process remains poorly understood at the neural circuit level. Here we demonstrate that neurons in the electrosensory lobe (ELL) of weakly electric mormyrid fish generate negative images of the sensory consequences of the fish's own movements based on ascending spinal corollary discharge signals. These results generalize previous findings describing mechanisms for generating negative images of the effects of the fish's specialized electric organ discharge (EOD) and suggest that a cerebellum-like circuit endowed with associative synaptic plasticity acting on corollary discharge can solve the complex and ubiquitous problem of predicting sensory consequences of movements.

  12. Plastic corollary discharge predicts sensory consequences of movements in a cerebellum-like circuit

    PubMed Central

    Requarth, Tim; Sawtell, Nathaniel B.

    2014-01-01

    SUMMARY The capacity to predict the sensory consequences of movements is critical for sensory, motor, and cognitive function. Though it is hypothesized that internal signals related to motor commands, known as corollary discharge, serve to generate such predictions, this process remains poorly understood at the neural circuit level. Here we demonstrate that neurons in the electrosensory lobe (ELL) of weakly electric mormyrid fish generate negative images of the sensory consequences of the fish’s own movements based on ascending spinal corollary discharge signals. These results generalize previous findings describing mechanisms for generating negative images of the effects of the fish’s specialized electric organ discharge (EOD) and suggest that a cerebellum-like circuit endowed with associative synaptic plasticity acting on corollary discharge can solve the complex and ubiquitous problem of predicting sensory consequences of movements. PMID:24853945

  13. Short-term prediction of solar energy in Saudi Arabia using automated-design fuzzy logic systems.

    PubMed

    Almaraashi, Majid

    2017-01-01

    Solar energy is considered as one of the main sources for renewable energy in the near future. However, solar energy and other renewable energy sources have a drawback related to the difficulty in predicting their availability in the near future. This problem affects optimal exploitation of solar energy, especially in connection with other resources. Therefore, reliable solar energy prediction models are essential to solar energy management and economics. This paper presents work aimed at designing reliable models to predict the global horizontal irradiance (GHI) for the next day in 8 stations in Saudi Arabia. The designed models are based on computational intelligence methods of automated-design fuzzy logic systems. The fuzzy logic systems are designed and optimized with two models using fuzzy c-means clustering (FCM) and simulated annealing (SA) algorithms. The first model uses FCM based on the subtractive clustering algorithm to automatically design the predictor fuzzy rules from data. The second model is using FCM followed by simulated annealing algorithm to enhance the prediction accuracy of the fuzzy logic system. The objective of the predictor is to accurately predict next-day global horizontal irradiance (GHI) using previous-day meteorological and solar radiation observations. The proposed models use observations of 10 variables of measured meteorological and solar radiation data to build the model. The experimentation and results of the prediction are detailed where the root mean square error of the prediction was approximately 88% for the second model tuned by simulated annealing compared to 79.75% accuracy using the first model. This results demonstrate a good modeling accuracy of the second model despite that the training and testing of the proposed models were carried out using spatially and temporally independent data.

  14. Short-term prediction of solar energy in Saudi Arabia using automated-design fuzzy logic systems

    PubMed Central

    2017-01-01

    Solar energy is considered as one of the main sources for renewable energy in the near future. However, solar energy and other renewable energy sources have a drawback related to the difficulty in predicting their availability in the near future. This problem affects optimal exploitation of solar energy, especially in connection with other resources. Therefore, reliable solar energy prediction models are essential to solar energy management and economics. This paper presents work aimed at designing reliable models to predict the global horizontal irradiance (GHI) for the next day in 8 stations in Saudi Arabia. The designed models are based on computational intelligence methods of automated-design fuzzy logic systems. The fuzzy logic systems are designed and optimized with two models using fuzzy c-means clustering (FCM) and simulated annealing (SA) algorithms. The first model uses FCM based on the subtractive clustering algorithm to automatically design the predictor fuzzy rules from data. The second model is using FCM followed by simulated annealing algorithm to enhance the prediction accuracy of the fuzzy logic system. The objective of the predictor is to accurately predict next-day global horizontal irradiance (GHI) using previous-day meteorological and solar radiation observations. The proposed models use observations of 10 variables of measured meteorological and solar radiation data to build the model. The experimentation and results of the prediction are detailed where the root mean square error of the prediction was approximately 88% for the second model tuned by simulated annealing compared to 79.75% accuracy using the first model. This results demonstrate a good modeling accuracy of the second model despite that the training and testing of the proposed models were carried out using spatially and temporally independent data. PMID:28806754

  15. A prediction technique for single-event effects on complex integrated circuits

    NASA Astrophysics Data System (ADS)

    Yuanfu, Zhao; Chunqing, Yu; Long, Fan; Suge, Yue; Maoxin, Chen; Shougang, Du; Hongchao, Zheng

    2015-11-01

    The sensitivity of complex integrated circuits to single-event effects is investigated. Sensitivity depends not only on the cross section of physical modules but also on the behavior of data patterns running on the system. A method dividing the main functional modules is proposed. The intrinsic cross section and the duty cycles of different sensitive modules are obtained during the execution of data patterns. A method for extracting the duty cycle is presented and a set of test patterns with different duty cycles are implemented experimentally. By combining the intrinsic cross section and the duty cycle of different sensitive modules, a universal method to predict SEE sensitivities of different test patterns is proposed, which is verified by experiments based on the target circuit of a microprocessor. Experimental results show that the deviation between prediction and experiment is less than 20%.

  16. Pore Pressure prediction in shale gas reservoirs using neural network and fuzzy logic with an application to Barnett Shale.

    NASA Astrophysics Data System (ADS)

    Aliouane, Leila; Ouadfeul, Sid-Ali; Boudella, Amar

    2015-04-01

    The main goal of the proposed idea is to use the artificial intelligence such as the neural network and fuzzy logic to predict the pore pressure in shale gas reservoirs. Pore pressure is a very important parameter that will be used or estimation of effective stress. This last is used to resolve well-bore stability problems, failure plan identification from Mohr-Coulomb circle and sweet spots identification. Many models have been proposed to estimate the pore pressure from well-logs data; we can cite for example the equivalent depth model, the horizontal model for undercompaction called the Eaton's model…etc. All these models require a continuous measurement of the slowness of the primary wave, some thing that is not easy during well-logs data acquisition in shale gas formtions. Here, we suggest the use the fuzzy logic and the multilayer perceptron neural network to predict the pore pressure in two horizontal wells drilled in the lower Barnett shale formation. The first horizontal well is used for the training of the fuzzy set and the multilayer perecptron, the input is the natural gamma ray, the neutron porosity, the slowness of the compression and shear wave, however the desired output is the estimated pore pressure using Eaton's model. Data of another horizontal well are used for generalization. Obtained results clearly show the power of the fuzzy logic system than the multilayer perceptron neural network machine to predict the pore pressure in shale gas reservoirs. Keywords: artificial intelligence, fuzzy logic, pore pressure, multilayer perecptron, Barnett shale.

  17. Gallium Arsenide Domino Circuit

    NASA Technical Reports Server (NTRS)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

  18. Emergence of complex behaviour from simple circuit structures.

    PubMed

    Kaufman, Marcelle; Thomas, René

    2003-02-01

    The set of (feedback) circuits of a complex system is the machinery that allows the system to be aware of the levels of its crucial constituents. Circuits can be identified without ambiguity from the elements of the Jacobian matrix of the system. There are two types of circuits: positive if they comprise an even number of negative interactions, negative if this number is odd. The two types of circuits play deeply different roles: negative circuits are required for homeostasis, with or without oscillations, positive circuits are required for multistationarity, and hence, in biology, for differentiation and memory. In non-linear systems, a circuit can positive or negative (an 'ambiguous circuit', depending on the location in phase space. Full circuits are those circuits (or unions of disjoint circuits) that imply all the variables of the system. There is a tight relation between circuits and steady states. Each full circuit, if isolated, generates steady state(s) whose nature (eigenvalues) is determined by the structure of the circuit. Multistationarity requires the presence of at least two full circuits of opposite Eisenfeld signs, or else, an ambiguous circuit. We show how a significant part of the dynamical behaviour of a system can be predicted by a mere examination of its Jacobian matrix. We also show how extremely complex dynamics can be generated by such simple logical structures as a single (full and ambiguous) circuit.

  19. Distributed Logics

    DTIC Science & Technology

    2014-10-03

    introduce distributed logics. Distributed logics lift the distribution structure of a distributed system directly into the logic, thereby parameterizing...the logic by the distribution structure itself. Each domain supports a “local modal logic.” The connections between domains are realized as...There are also multi- agent logic systems [12]. What distinguishes distributed logics from these are that the morphisms, i.e., the nbd maps, have

  20. Ageing increases reliance on sensorimotor prediction through structural and functional differences in frontostriatal circuits.

    PubMed

    Wolpe, Noham; Ingram, James N; Tsvetanov, Kamen A; Geerligs, Linda; Kievit, Rogier A; Henson, Richard N; Wolpert, Daniel M; Rowe, James B

    2016-10-03

    The control of voluntary movement changes markedly with age. A critical component of motor control is the integration of sensory information with predictions of the consequences of action, arising from internal models of movement. This leads to sensorimotor attenuation-a reduction in the perceived intensity of sensations from self-generated compared with external actions. Here we show that sensorimotor attenuation occurs in 98% of adults in a population-based cohort (n=325; 18-88 years; the Cambridge Centre for Ageing and Neuroscience). Importantly, attenuation increases with age, in proportion to reduced sensory sensitivity. This effect is associated with differences in the structure and functional connectivity of the pre-supplementary motor area (pre-SMA), assessed with magnetic resonance imaging. The results suggest that ageing alters the balance between the sensorium and predictive models, mediated by the pre-SMA and its connectivity in frontostriatal circuits. This shift may contribute to the motor and cognitive changes observed with age.

  1. An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

    PubMed

    Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

    2016-06-01

    The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling.

  2. Using LogicWorks to Teach Logic Design.

    ERIC Educational Resources Information Center

    Spoerri, Peter

    1988-01-01

    Discusses a computer simulation to teach logic design using a Macintosh computer which allows circuits to be built piece by piece. Describes features of the simulation and presents several schematics drawn by the software. (MVL)

  3. Using LogicWorks to Teach Logic Design.

    ERIC Educational Resources Information Center

    Spoerri, Peter

    1988-01-01

    Discusses a computer simulation to teach logic design using a Macintosh computer which allows circuits to be built piece by piece. Describes features of the simulation and presents several schematics drawn by the software. (MVL)

  4. Electronic logic for enhanced switch reliability

    DOEpatents

    Cooper, J.A.

    1984-01-20

    A logic circuit is used to enhance redundant switch reliability. Two or more switches are monitored for logical high or low output. The output for the logic circuit produces a redundant and fail-safe representation of the switch outputs. When both switch outputs are high, the output is high. Similarly, when both switch outputs are low, the logic circuit's output is low. When the output states of the two switches do not agree, the circuit resolves the conflict by memorizing the last output state which both switches were simultaneously in and produces the logical complement of this output state. Thus, the logic circuit of the present invention allows the redundant switches to be treated as if they were in parallel when the switches are open and as if they were in series when the switches are closed. A failsafe system having maximum reliability is thereby produced.

  5. PredyCLU: a prediction system for chronic leg ulcers based on fuzzy logic; part I - exploring the venous side.

    PubMed

    de Franciscis, Stefano; Fregola, Salvatore; Gallo, Alessandro; Argirò, Giuseppe; Barbetta, Andrea; Buffone, Gianluca; Caliò, Francesco G; De Caridi, Giovanni; Amato, Bruno; Serra, Raffaele

    2016-12-01

    Chronic leg ulcers (CLUs) are a common occurrence in the western population and are associated with a negative impact on the quality of life of patients. They also cause a substantial burden on the health budget. The pathogenesis of leg ulceration is quite heterogeneous, and chronic venous ulceration (CVU) is the most common manifestation representing the main complication of chronic venous disease (CVD). Prevention strategies and early identification of the risk represent the best form of management. Fuzzy logic is a flexible mathematical system that has proved to be a powerful tool for decision-making systems and pattern classification systems in medicine. In this study, we have elaborated a computerised prediction system for chronic leg ulcers (PredyCLU) based on fuzzy logic, which was retrospectively applied on a multicentre population of 77 patients with CVD. This evaluation system produced reliable risk score patterns and served effectively as a stratification risk tool in patients with CVD who were at the risk of developing CVUs. © 2015 Medicalhelplines.com Inc and John Wiley & Sons Ltd.

  6. A Model for Predicting Integrated Man-Machine System Reliability: Model Logic and Description

    DTIC Science & Technology

    1974-11-01

    A MODEL FOR PREDICTING INTEGRATED MAN-MACHINE SYSTEMS RELIABILITY prepared for Naval Si nand Deparrmem aw nr. Con :’III’lit UNCLASSIFIED...was substantially modified so as to allow its use for system reliability and system availability predictive purposes. The resultant new model is...from 4 to 20 members was substantially modified so as to allow its use for system reliability and system availability predictive purposes. The

  7. Exchange circuits for FASTBUS slaves

    SciTech Connect

    Bratskii, A.A.; Matseev, M.Y.; Rybakov, V.G.

    1985-09-01

    This paper describes general-purpose circuits for FASTBUS interfacing of the functional part of a slave device. The circuits contain buffered receivers and transmitters, addressrecognition and data-transfer logic, and the required control/status registers. The described circuits are implemented with series-K500 integrated circuits.

  8. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  9. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  10. Radiation tolerant combinational logic cell

    NASA Technical Reports Server (NTRS)

    Maki, Gary R. (Inventor); Gambles, Jody W. (Inventor); Whitaker, Sterling (Inventor)

    2009-01-01

    A system has a reduced sensitivity to Single Event Upset and/or Single Event Transient(s) compared to traditional logic devices. In a particular embodiment, the system includes an input, a logic block, a bias stage, a state machine, and an output. The logic block is coupled to the input. The logic block is for implementing a logic function, receiving a data set via the input, and generating a result f by applying the data set to the logic function. The bias stage is coupled to the logic block. The bias stage is for receiving the result from the logic block and presenting it to the state machine. The state machine is coupled to the bias stage. The state machine is for receiving, via the bias stage, the result generated by the logic block. The state machine is configured to retain a state value for the system. The state value is typically based on the result generated by the logic block. The output is coupled to the state machine. The output is for providing the value stored by the state machine. Some embodiments of the invention produce dual rail outputs Q and Q'. The logic block typically contains combinational logic and is similar, in size and transistor configuration, to a conventional CMOS combinational logic design. However, only a very small portion of the circuits of these embodiments, is sensitive to Single Event Upset and/or Single Event Transients.

  11. The Use of a Predictive Habitat Model and a Fuzzy Logic Approach for Marine Management and Planning

    PubMed Central

    Hattab, Tarek; Ben Rais Lasram, Frida; Albouy, Camille; Sammari, Chérif; Romdhane, Mohamed Salah; Cury, Philippe; Leprieur, Fabien; Le Loc’h, François

    2013-01-01

    Bottom trawl survey data are commonly used as a sampling technique to assess the spatial distribution of commercial species. However, this sampling technique does not always correctly detect a species even when it is present, and this can create significant limitations when fitting species distribution models. In this study, we aim to test the relevance of a mixed methodological approach that combines presence-only and presence-absence distribution models. We illustrate this approach using bottom trawl survey data to model the spatial distributions of 27 commercially targeted marine species. We use an environmentally- and geographically-weighted method to simulate pseudo-absence data. The species distributions are modelled using regression kriging, a technique that explicitly incorporates spatial dependence into predictions. Model outputs are then used to identify areas that met the conservation targets for the deployment of artificial anti-trawling reefs. To achieve this, we propose the use of a fuzzy logic framework that accounts for the uncertainty associated with different model predictions. For each species, the predictive accuracy of the model is classified as ‘high’. A better result is observed when a large number of occurrences are used to develop the model. The map resulting from the fuzzy overlay shows that three main areas have a high level of agreement with the conservation criteria. These results align with expert opinion, confirming the relevance of the proposed methodology in this study. PMID:24146867

  12. Neural circuits underlying mother's voice perception predict social communication abilities in children.

    PubMed

    Abrams, Daniel A; Chen, Tianwen; Odriozola, Paola; Cheng, Katherine M; Baker, Amanda E; Padmanabhan, Aarthi; Ryali, Srikanth; Kochalka, John; Feinstein, Carl; Menon, Vinod

    2016-05-31

    The human voice is a critical social cue, and listeners are extremely sensitive to the voices in their environment. One of the most salient voices in a child's life is mother's voice: Infants discriminate their mother's voice from the first days of life, and this stimulus is associated with guiding emotional and social function during development. Little is known regarding the functional circuits that are selectively engaged in children by biologically salient voices such as mother's voice or whether this brain activity is related to children's social communication abilities. We used functional MRI to measure brain activity in 24 healthy children (mean age, 10.2 y) while they attended to brief (<1 s) nonsense words produced by their biological mother and two female control voices and explored relationships between speech-evoked neural activity and social function. Compared to female control voices, mother's voice elicited greater activity in primary auditory regions in the midbrain and cortex; voice-selective superior temporal sulcus (STS); the amygdala, which is crucial for processing of affect; nucleus accumbens and orbitofrontal cortex of the reward circuit; anterior insula and cingulate of the salience network; and a subregion of fusiform gyrus associated with face perception. The strength of brain connectivity between voice-selective STS and reward, affective, salience, memory, and face-processing regions during mother's voice perception predicted social communication skills. Our findings provide a novel neurobiological template for investigation of typical social development as well as clinical disorders, such as autism, in which perception of biologically and socially salient voices may be impaired.

  13. Neural circuits underlying mother’s voice perception predict social communication abilities in children

    PubMed Central

    Abrams, Daniel A.; Chen, Tianwen; Odriozola, Paola; Cheng, Katherine M.; Baker, Amanda E.; Padmanabhan, Aarthi; Ryali, Srikanth; Kochalka, John; Feinstein, Carl; Menon, Vinod

    2016-01-01

    The human voice is a critical social cue, and listeners are extremely sensitive to the voices in their environment. One of the most salient voices in a child’s life is mother's voice: Infants discriminate their mother’s voice from the first days of life, and this stimulus is associated with guiding emotional and social function during development. Little is known regarding the functional circuits that are selectively engaged in children by biologically salient voices such as mother’s voice or whether this brain activity is related to children’s social communication abilities. We used functional MRI to measure brain activity in 24 healthy children (mean age, 10.2 y) while they attended to brief (<1 s) nonsense words produced by their biological mother and two female control voices and explored relationships between speech-evoked neural activity and social function. Compared to female control voices, mother’s voice elicited greater activity in primary auditory regions in the midbrain and cortex; voice-selective superior temporal sulcus (STS); the amygdala, which is crucial for processing of affect; nucleus accumbens and orbitofrontal cortex of the reward circuit; anterior insula and cingulate of the salience network; and a subregion of fusiform gyrus associated with face perception. The strength of brain connectivity between voice-selective STS and reward, affective, salience, memory, and face-processing regions during mother’s voice perception predicted social communication skills. Our findings provide a novel neurobiological template for investigation of typical social development as well as clinical disorders, such as autism, in which perception of biologically and socially salient voices may be impaired. PMID:27185915

  14. Model-based predictions of solid state intermetallic compound layer growth in hybrid microelectronic circuits

    SciTech Connect

    Vianco, P.T.; Erickson, K.L.; Hopkins, P.L.

    1997-12-31

    A mathematical model was developed to quantitatively describe the intermetallic compound (IMC) layer growth that takes place between a Sn-based solder and a noble metal thick film conductor material used in hybrid microcircuit (HMC) assemblies. The model combined the reaction kinetics of the solder/substrate interaction, as determined from ancillary isothermal aging experiments, with a 2-D finite element mesh that took account of the porous morphology of the thick film coating. The effect of the porous morphology on the IMC layer growth when compared to the traditional 1-D computations was significant. The previous 1-D calculations under-predicted the nominal IMC layer thickness relative to the 2-D case. The 2-D model showed greater substrate consumption by IMC growth and lesser solder consumption that was determined with the 1-D computation. The new 2-D model allows the design engineer to better predict circuit aging and hence, the reliability of HMC hardware that is placed in the field.

  15. Ageing increases reliance on sensorimotor prediction through structural and functional differences in frontostriatal circuits

    PubMed Central

    Wolpe, Noham; Ingram, James N.; Tsvetanov, Kamen A.; Geerligs, Linda; Kievit, Rogier A.; Henson, Richard N.; Wolpert, Daniel M.; Tyler, Lorraine K.; Brayne, Carol; Bullmore, Edward; Calder, Andrew; Cusack, Rhodri; Dalgleish, Tim; Duncan, John; Matthews, Fiona E.; Marslen-Wilson, William; Shafto, Meredith A.; Campbell, Karen; Cheung, Teresa; Davis, Simon; McCarrey, Anna; Mustafa, Abdur; Price, Darren; Samu, David; Taylor, Jason R.; Treder, Matthias; van Belle, Janna; Williams, Nitin; Bates, Lauren; Emery, Tina; Erzinçlioglu, Sharon; Gadie, Andrew; Gerbase, Sofia; Georgieva, Stanimira; Hanley, Claire; Parkin, Beth; Troy, David; Auer, Tibor; Correia, Marta; Gao, Lu; Green, Emma; Henriques, Rafael; Allen, Jodie; Amery, Gillian; Amunts, Liana; Barcroft, Anne; Castle, Amanda; Dias, Cheryl; Dowrick, Jonathan; Fair, Melissa; Fisher, Hayley; Goulding, Anna; Grewal, Adarsh; Hale, Geoff; Hilton, Andrew; Johnson, Frances; Johnston, Patricia; Kavanagh-Williamson, Thea; Kwasniewska, Magdalena; McMinn, Alison; Norman, Kim; Penrose, Jessica; Roby, Fiona; Rowland, Diane; Sargeant, John; Squire, Maggie; Stevens, Beth; Stoddart, Aldabra; Stone, Cheryl; Thompson, Tracy; Yazlik, Ozlem; Barnes, Dan; Dixon, Marie; Hillman, Jaya; Mitchell, Joanne; Villis, Laura; Rowe, James B.

    2016-01-01

    The control of voluntary movement changes markedly with age. A critical component of motor control is the integration of sensory information with predictions of the consequences of action, arising from internal models of movement. This leads to sensorimotor attenuation—a reduction in the perceived intensity of sensations from self-generated compared with external actions. Here we show that sensorimotor attenuation occurs in 98% of adults in a population-based cohort (n=325; 18–88 years; the Cambridge Centre for Ageing and Neuroscience). Importantly, attenuation increases with age, in proportion to reduced sensory sensitivity. This effect is associated with differences in the structure and functional connectivity of the pre-supplementary motor area (pre-SMA), assessed with magnetic resonance imaging. The results suggest that ageing alters the balance between the sensorium and predictive models, mediated by the pre-SMA and its connectivity in frontostriatal circuits. This shift may contribute to the motor and cognitive changes observed with age. PMID:27694879

  16. A Formalized Design Process for Bacterial Consortia That Perform Logic Computing

    PubMed Central

    Sun, Rui; Xi, Jingyi; Wen, Dingqiao; Feng, Jingchen; Chen, Yiwei; Qin, Xiao; Ma, Yanrong; Luo, Wenhan; Deng, Linna; Lin, Hanchi; Yu, Ruofan; Ouyang, Qi

    2013-01-01

    The concept of microbial consortia is of great attractiveness in synthetic biology. Despite of all its benefits, however, there are still problems remaining for large-scaled multicellular gene circuits, for example, how to reliably design and distribute the circuits in microbial consortia with limited number of well-behaved genetic modules and wiring quorum-sensing molecules. To manage such problem, here we propose a formalized design process: (i) determine the basic logic units (AND, OR and NOT gates) based on mathematical and biological considerations; (ii) establish rules to search and distribute simplest logic design; (iii) assemble assigned basic logic units in each logic operating cell; and (iv) fine-tune the circuiting interface between logic operators. We in silico analyzed gene circuits with inputs ranging from two to four, comparing our method with the pre-existing ones. Results showed that this formalized design process is more feasible concerning numbers of cells required. Furthermore, as a proof of principle, an Escherichia coli consortium that performs XOR function, a typical complex computing operation, was designed. The construction and characterization of logic operators is independent of “wiring” and provides predictive information for fine-tuning. This formalized design process provides guidance for the design of microbial consortia that perform distributed biological computation. PMID:23468999

  17. A formalized design process for bacterial consortia that perform logic computing.

    PubMed

    Ji, Weiyue; Shi, Handuo; Zhang, Haoqian; Sun, Rui; Xi, Jingyi; Wen, Dingqiao; Feng, Jingchen; Chen, Yiwei; Qin, Xiao; Ma, Yanrong; Luo, Wenhan; Deng, Linna; Lin, Hanchi; Yu, Ruofan; Ouyang, Qi

    2013-01-01

    The concept of microbial consortia is of great attractiveness in synthetic biology. Despite of all its benefits, however, there are still problems remaining for large-scaled multicellular gene circuits, for example, how to reliably design and distribute the circuits in microbial consortia with limited number of well-behaved genetic modules and wiring quorum-sensing molecules. To manage such problem, here we propose a formalized design process: (i) determine the basic logic units (AND, OR and NOT gates) based on mathematical and biological considerations; (ii) establish rules to search and distribute simplest logic design; (iii) assemble assigned basic logic units in each logic operating cell; and (iv) fine-tune the circuiting interface between logic operators. We in silico analyzed gene circuits with inputs ranging from two to four, comparing our method with the pre-existing ones. Results showed that this formalized design process is more feasible concerning numbers of cells required. Furthermore, as a proof of principle, an Escherichia coli consortium that performs XOR function, a typical complex computing operation, was designed. The construction and characterization of logic operators is independent of "wiring" and provides predictive information for fine-tuning. This formalized design process provides guidance for the design of microbial consortia that perform distributed biological computation.

  18. Assessment and prediction of air quality using fuzzy logic and autoregressive models

    NASA Astrophysics Data System (ADS)

    Carbajal-Hernández, José Juan; Sánchez-Fernández, Luis P.; Carrasco-Ochoa, Jesús A.; Martínez-Trinidad, José Fco.

    2012-12-01

    In recent years, artificial intelligence methods have been used for the treatment of environmental problems. This work, presents two models for assessment and prediction of air quality. First, we develop a new computational model for air quality assessment in order to evaluate toxic compounds that can harm sensitive people in urban areas, affecting their normal activities. In this model we propose to use a Sigma operator to statistically asses air quality parameters using their historical data information and determining their negative impact in air quality based on toxicity limits, frequency average and deviations of toxicological tests. We also introduce a fuzzy inference system to perform parameter classification using a reasoning process and integrating them in an air quality index describing the pollution levels in five stages: excellent, good, regular, bad and danger, respectively. The second model proposed in this work predicts air quality concentrations using an autoregressive model, providing a predicted air quality index based on the fuzzy inference system previously developed. Using data from Mexico City Atmospheric Monitoring System, we perform a comparison among air quality indices developed for environmental agencies and similar models. Our results show that our models are an appropriate tool for assessing site pollution and for providing guidance to improve contingency actions in urban areas.

  19. Membrane pressures predict clotting of pediatric continuous renal replacement therapy circuits.

    PubMed

    Kakajiwala, Aadil; Jemielita, Thomas; Hughes, John Z; Windt, Kimberly; Denburg, Michelle; Goldstein, Stuart L; Laskin, Benjamin

    2017-07-01

    Clotting of continuous renal replacement therapy (CRRT) circuits leads to inadequate clearance, decreased ultrafiltration, and increased resource use. We identified factors associated with premature clotting of circuits during CRRT in children. In a retrospective cohort of 26 children (median age 11.8 years) receiving 79 CRRT circuits (51 heparin, 22 citrate, 6 using no anticoagulation), we captured hourly pressure, flow, and fluid removal rates along with all activated clotting time (ACT) and circuit ionized calcium measurements. Cox and logistic regression models were used to examine factors associated with premature circuit clotting before the scheduled 3-day circuit change. Of the 79 circuits, 51 (64.6%) underwent unplanned filter change due to filter clotting (median duration 18.25 h, interquartile range [IQR] 9.25, 33.5 h), and 28 (35.4%) underwent scheduled change (median duration 66 h, IQR 61.00, 69.00 h). Patient age, catheter size and location, blood flow rate, and the percentage of pre-filter replacement fluid were not associated with premature clotting. Heparin circuits were less likely than citrate circuits to clot prematurely. Each 1-mmHg increase in the transmembrane or filter pressure was independently associated with a 1.5% (95% confidence interval [CI] 1.0-2.0%) and 1.5% (95% CI 1.0-2.0%) higher risk of clotting, respectively. Higher ACTs were associated with lower transmembrane (p = 0.03) and filter (p < 0.001) pressures. The majority of circuits in our cohort were subject to unplanned filter changes. Elevated transmembrane and filter pressures were associated with clotting. Our results suggest that maintaining higher ACT may decrease the risk of circuit clotting. Larger studies are needed to examine other factors that may prolong the lifespan of the CRRT circuit in this high-risk population.

  20. Research in computer simulation of integrated circuits

    NASA Astrophysics Data System (ADS)

    Newton, A. R.; Pdederson, D. O.

    1983-07-01

    The performance of the new LSI simulator CLASSIE is evaluated on several circuits with a few hundred to over one thousand semiconductor devices. A more accurate run time prediction formula has been found to be appropriate for circuit simulators. The design decisions for optimal performance under the constraints of the hardware (CRAY-1) are presented. Vector computers have an increased potential for fast, accurate simulation at the transistor level of Large-Scale-Integrated Circuits. Design considerations for a new circuit simulator are developed based on the specifics of the vector computer architecture and of LSI circuits. The simulation of Large-Scale-Integrated (LSI) circuits requires very long run time on conventional circuit analysis programs such as SPICE2 and super-mini computers. A new simulator for LSI circuits, CLASSIE, which takes advantage of circuit hierarchy and repetitiveness, and array processors capable of high-speed floating-point computation are a promising combination. While a large number of powerful design verfication tools have been developed for IC design at the transistor and logic gate levels, there are very few silicon-oriented tools for architectural design and evaluation.

  1. Electronics. Module 3: Digital Logic Application. Instructor's Guide.

    ERIC Educational Resources Information Center

    Carter, Ed; Murphy, Mark

    This guide contains instructor's materials for a 10-unit secondary school course on digital logic application. The units are introduction to digital, logic gates, digital integrated circuits, combination logic, flip-flops, counters and shift registers, encoders and decoders, arithmetic circuits, memory, and analog/digital and digital/analog…

  2. Electronics. Module 3: Digital Logic Application. Instructor's Guide.

    ERIC Educational Resources Information Center

    Carter, Ed; Murphy, Mark

    This guide contains instructor's materials for a 10-unit secondary school course on digital logic application. The units are introduction to digital, logic gates, digital integrated circuits, combination logic, flip-flops, counters and shift registers, encoders and decoders, arithmetic circuits, memory, and analog/digital and digital/analog…

  3. Corrosion of silicon integrated circuits and lifetime predictions in implantable electronic devices

    NASA Astrophysics Data System (ADS)

    Vanhoestenberghe, A.; Donaldson, N.

    2013-06-01

    Corrosion is a prime concern for active implantable devices. In this paper we review the principles underlying the concepts of hermetic packages and encapsulation, used to protect implanted electronics, some of which remain widely overlooked. We discuss how technological advances have created a need to update the way we evaluate the suitability of both protection methods. We demonstrate how lifetime predictability is lost for very small hermetic packages and introduce a single parameter to compare different packages, with an equation to calculate the minimum sensitivity required from a test method to guarantee a given lifetime. In the second part of this paper, we review the literature on the corrosion of encapsulated integrated circuits (ICs) and, following a new analysis of published data, we propose an equation for the pre-corrosion lifetime of implanted ICs, and discuss the influence of the temperature, relative humidity, encapsulation and field-strength. As any new protection will be tested under accelerated conditions, we demonstrate the sensitivity of acceleration factors to some inaccurately known parameters. These results are relevant for any application of electronics working in a moist environment. Our comparison of encapsulation and hermetic packages suggests that both concepts may be suitable for future implants.

  4. Solid state remote circuit selector switch

    NASA Technical Reports Server (NTRS)

    Peterson, V. S.

    1970-01-01

    Remote switching circuit utilizes voltage logic to switch on desired circuit. Circuit controls rotating multi-range pressure transducers in jet engine testing and can be used in coded remote circuit activator where sequence of switching has to occur in defined length of time to prevent false or undesired circuit activation.

  5. Connectable DNA logic gates: OR and XOR logics.

    PubMed

    Gerasimova, Yulia V; Kolpashchikov, Dmitry M

    2012-03-05

    Modern computer processors are based on semiconductor logic gates connected to each other in complex circuits. This study contributes to the development of a new class of connectable logic gates made of DNA in which the transfer of oligonucleotide fragments as input/output signals occurs upon hybridization of DNA sequences. The DNA strands responsible for a logic function form associates containing immobile DNA four-way junction structures when the signal is high and dissociate into separate strands when the signal is low. A basic set of logic gates (NOT, AND, and OR) was designed. Two NOT gates, two AND gates, and an OR gate were connected in a network that corresponds to an XOR logic function. The design of the logic gates presented here may contribute to the development of the first biocompatible molecular computer. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  6. The universal magnetic tunnel junction logic gates representing 16 binary Boolean logic operations

    NASA Astrophysics Data System (ADS)

    Lee, Junwoo; Suh, Dong Ik; Park, Wanjun

    2015-05-01

    The novel devices are expected to shift the paradigm of a logic operation by their own nature, replacing the conventional devices. In this study, the nature of our fabricated magnetic tunnel junction (MTJ) that responds to the two external inputs, magnetic field and voltage bias, demonstrated seven basic logic operations. The seven operations were obtained by the electric-field-assisted switching characteristics, where the surface magnetoelectric effect occurs due to a sufficiently thin free layer. The MTJ was transformed as a universal logic gate combined with three supplementary circuits: A multiplexer (MUX), a Wheatstone bridge, and a comparator. With these circuits, the universal logic gates demonstrated 16 binary Boolean logic operations in one logic stage. A possible further approach is parallel computations through a complimentary of MUX and comparator, capable of driving multiple logic gates. A reconfigurable property can also be realized when different logic operations are produced from different level of voltages applying to the same configuration of the logic gate.

  7. Complex cellular logic computation using ribocomputing devices.

    PubMed

    Green, Alexander A; Kim, Jongmin; Ma, Duo; Silver, Pamela A; Collins, James J; Yin, Peng

    2017-08-03

    Synthetic biology aims to develop engineering-driven approaches to the programming of cellular functions that could yield transformative technologies. Synthetic gene circuits that combine DNA, protein, and RNA components have demonstrated a range of functions such as bistability, oscillation, feedback, and logic capabilities. However, it remains challenging to scale up these circuits owing to the limited number of designable, orthogonal, high-performance parts, the empirical and often tedious composition rules, and the requirements for substantial resources for encoding and operation. Here, we report a strategy for constructing RNA-only nanodevices to evaluate complex logic in living cells. Our 'ribocomputing' systems are composed of de-novo-designed parts and operate through predictable and designable base-pairing rules, allowing the effective in silico design of computing devices with prescribed configurations and functions in complex cellular environments. These devices operate at the post-transcriptional level and use an extended RNA transcript to co-localize all circuit sensing, computation, signal transduction, and output elements in the same self-assembled molecular complex, which reduces diffusion-mediated signal losses, lowers metabolic cost, and improves circuit reliability. We demonstrate that ribocomputing devices in Escherichia coli can evaluate two-input logic with a dynamic range up to 900-fold and scale them to four-input AND, six-input OR, and a complex 12-input expression (A1 AND A2 AND NOT A1*) OR (B1 AND B2 AND NOT B2*) OR (C1 AND C2) OR (D1 AND D2) OR (E1 AND E2). Successful operation of ribocomputing devices based on programmable RNA interactions suggests that systems employing the same design principles could be implemented in other host organisms or in extracellular settings.

  8. Binary Arithmetic Using Optical Symbolic Substitution and Cascadable Surface-Emitting Laser Logic Devices,

    DTIC Science & Technology

    LOGIC DEVICES, *OPTICAL CIRCUITS, *OPTICAL SWITCHING, HETEROJUNCTIONS, PHOTOTRANSISTORS, ELECTROOPTICS, LASER CAVITIES, OPTICAL PROCESSING, PARALLEL PROCESSING, BISTABLE DEVICES, GATES(CIRCUITS), VOLTAGE, BINARY ARITHMETIC .

  9. Flexible programmable logic module

    DOEpatents

    Robertson, Perry J.; Hutchinson, Robert L.; Pierson, Lyndon G.

    2001-01-01

    The circuit module of this invention is a VME board containing a plurality of programmable logic devices (PLDs), a controlled impedance clock tree, and interconnecting buses. The PLDs are arranged to permit systolic processing of a problem by offering wide data buses and a plurality of processing nodes. The board contains a clock reference and clock distribution tree that can drive each of the PLDs with two critically timed clock references. External clock references can be used to drive additional circuit modules all operating from the same synchronous clock reference.

  10. Implementation of Complete Boolean Logic Functions in Single Complementary Resistive Switch.

    PubMed

    Gao, Shuang; Zeng, Fei; Wang, Minjuan; Wang, Guangyue; Song, Cheng; Pan, Feng

    2015-10-21

    The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implementation of complete Boolean logic functions in a single CRS cell. The first method is based on the intrinsic switchable diode of a peculiar CRS cell that is composed of two anti-serial bipolar resistive switches with a rectifying high resistance state, while the second method is based directly on the complementary switching behaviour itself of any single CRS cell. The feasibilities of both methods have been theoretically predicted and then experimentally demonstrated on the basis of a Ta/Ta2O5/Pt/Ta2O5/Ta CRS cell. Therefore, these two methods-in particular the complementary switching behaviour itself-based method, which has natural immunity to the sneak-path issue of crossbar logic circuits-are believed to be capable of significantly advancing both our understanding and commercialization of related logic circuits. Moreover, peculiar CRS cells have been demonstrated to be feasible for tri-level storage, which can serve as an alternative method of realising ultra-high-density data storage.

  11. A systematic review of methods to predict maximal oxygen uptake from submaximal, open circuit spirometry in healthy adults.

    PubMed

    Evans, Harrison J L; Ferrar, Katia E; Smith, Ashleigh E; Parfitt, Gaynor; Eston, Roger G

    2015-03-01

    This systematic review aimed to (i) report the accuracy of submaximal exercise-based predictive equations that incorporate oxygen uptake (measured via open circuit spirometry) to predict maximal oxygen uptake (VO₂max) and (ii) provide a critical reflection of the data to inform health professionals and researchers when selecting a prediction equation. Systematic review. A systematic search of MEDLINE, EMBASE (via OvidSP), CINAHL, SPORTDiscus (via EBSCO Host) and Scopus databases was undertaken in February 2013. Studies were required to report data on healthy participants aged 18-65y. Following tabulation of extracted data, a narrative synthesis was conducted. From a total of 7597 articles screened, 19 studies were included, from which a total of 43 prediction equations were extracted. No significant difference was reported between the measured and predicted VO₂max in 28 equations. Pearson's correlation coefficient between the predicted and measured VO₂max ranged from r=0.92 to r=0.57. The variables most commonly used in predictive equations were heart rate (n=19) and rating of perceived exertion (n=24). Overall, submaximal exercise-based equations using open circuit spirometry to predict VO₂max are moderately to highly accurate. The heart rate and rating of perceived exertion methods of predicting VO₂max were of similar accuracy. Important factors to consider when selecting a predictive equation include: the level of exertion required; participant medical conditions or medications; the validation population; mode of ergometry; time and resources available for familiarisation trials; and the level of bias of the study from which equations are derived. Copyright © 2014 Sports Medicine Australia. Published by Elsevier Ltd. All rights reserved.

  12. A fuzzy-logic-based model to predict biogas and methane production rates in a pilot-scale mesophilic UASB reactor treating molasses wastewater.

    PubMed

    Turkdogan-Aydinol, F Ilter; Yetilmezsoy, Kaan

    2010-10-15

    A MIMO (multiple inputs and multiple outputs) fuzzy-logic-based model was developed to predict biogas and methane production rates in a pilot-scale 90-L mesophilic up-flow anaerobic sludge blanket (UASB) reactor treating molasses wastewater. Five input variables such as volumetric organic loading rate (OLR), volumetric total chemical oxygen demand (TCOD) removal rate (R(V)), influent alkalinity, influent pH and effluent pH were fuzzified by the use of an artificial intelligence-based approach. Trapezoidal membership functions with eight levels were conducted for the fuzzy subsets, and a Mamdani-type fuzzy inference system was used to implement a total of 134 rules in the IF-THEN format. The product (prod) and the centre of gravity (COG, centroid) methods were employed as the inference operator and defuzzification methods, respectively. Fuzzy-logic predicted results were compared with the outputs of two exponential non-linear regression models derived in this study. The UASB reactor showed a remarkable performance on the treatment of molasses wastewater, with an average TCOD removal efficiency of 93 (+/-3)% and an average volumetric TCOD removal rate of 6.87 (+/-3.93) kg TCOD(removed)/m(3)-day, respectively. Findings of this study clearly indicated that, compared to non-linear regression models, the proposed MIMO fuzzy-logic-based model produced smaller deviations and exhibited a superior predictive performance on forecasting of both biogas and methane production rates with satisfactory determination coefficients over 0.98.

  13. Coupled mechanical-electrical-thermal modeling for short-circuit prediction in a lithium-ion cell under mechanical abuse

    NASA Astrophysics Data System (ADS)

    Zhang, Chao; Santhanagopalan, Shriram; Sprague, Michael A.; Pesaran, Ahmad A.

    2015-09-01

    In order to better understand the behavior of lithium-ion batteries under mechanical abuse, a coupled modeling methodology encompassing the mechanical, electrical and thermal response is presented for predicting short-circuit under external crush. The combined mechanical-electrical-thermal response is simulated in a commercial finite element software LS-DYNA® using a representative-sandwich finite-element model, where electrical-thermal modeling is conducted after an instantaneous mechanical crush. The model includes an explicit representation of each individual component such as the active material, current collector, separator, etc., and predicts their mechanical deformation under quasi-static indentation. Model predictions show good agreement with experiments: the fracture of the battery structure under an indentation test is accurately predicted. The electrical-thermal simulation predicts the current density and temperature distribution in a reasonable manner. Whereas previously reported models consider the mechanical response exclusively, we use the electrical contact between active materials following the failure of the separator as a criterion for short-circuit. These results are used to build a lumped representative sandwich model that is computationally efficient and captures behavior at the cell level without resolving the individual layers.

  14. Dispositional logic

    NASA Technical Reports Server (NTRS)

    Le Balleur, J. C.

    1988-01-01

    The applicability of conventional mathematical analysis (based on the combination of two-valued logic and probability theory) to problems in which human judgment, perception, or emotions play significant roles is considered theoretically. It is shown that dispositional logic, a branch of fuzzy logic, has particular relevance to the common-sense reasoning typical of human decision-making. The concepts of dispositionality and usuality are defined analytically, and a dispositional conjunctive rule and dispositional modus ponens are derived.

  15. Magnetic Circuit Model of PM Motor-Generator to Predict Radial Forces

    NASA Technical Reports Server (NTRS)

    McLallin, Kerry (Technical Monitor); Kascak, Peter E.; Dever, Timothy P.; Jansen, Ralph H.

    2004-01-01

    A magnetic circuit model is developed for a PM motor for flywheel applications. A sample motor is designed and modeled. Motor configuration and selection of materials is discussed, and the choice of winding configuration is described. A magnetic circuit model is described, which includes the stator back iron, rotor yoke, permanent magnets, air gaps and the stator teeth. Iterative solution of this model yields flux linkages, back EMF, torque, power, and radial force at the rotor caused by eccentricity. Calculated radial forces are then used to determine motor negative stiffness.

  16. Large-scale circuit simulation

    NASA Astrophysics Data System (ADS)

    Wei, Y. P.

    1982-12-01

    The simulation of VLSI (Very Large Scale Integration) circuits falls beyond the capabilities of conventional circuit simulators like SPICE. On the other hand, conventional logic simulators can only give the results of logic levels 1 and 0 with the attendent loss of detail in the waveforms. The aim of developing large-scale circuit simulation is to bridge the gap between conventional circuit simulation and logic simulation. This research is to investigate new approaches for fast and relatively accurate time-domain simulation of MOS (Metal Oxide Semiconductors), LSI (Large Scale Integration) and VLSI circuits. New techniques and new algorithms are studied in the following areas: (1) analysis sequencing (2) nonlinear iteration (3) modified Gauss-Seidel method (4) latency criteria and timestep control scheme. The developed methods have been implemented into a simulation program PREMOS which could be used as a design verification tool for MOS circuits.

  17. A bit serial sequential circuit

    NASA Technical Reports Server (NTRS)

    Hu, S.; Whitaker, S.

    1990-01-01

    Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

  18. Lithium-ion battery cell-level control using constrained model predictive control and equivalent circuit models

    SciTech Connect

    Xavier, MA; Trimboli, MS

    2015-07-01

    This paper introduces a novel application of model predictive control (MPC) to cell-level charging of a lithium-ion battery utilizing an equivalent circuit model of battery dynamics. The approach employs a modified form of the MPC algorithm that caters for direct feed-though signals in order to model near-instantaneous battery ohmic resistance. The implementation utilizes a 2nd-order equivalent circuit discrete-time state-space model based on actual cell parameters; the control methodology is used to compute a fast charging profile that respects input, output, and state constraints. Results show that MPC is well-suited to the dynamics of the battery control problem and further suggest significant performance improvements might be achieved by extending the result to electrochemical models. (C) 2015 Elsevier B.V. All rights reserved.

  19. Lithium-ion battery cell-level control using constrained model predictive control and equivalent circuit models

    NASA Astrophysics Data System (ADS)

    Xavier, Marcelo A.; Trimboli, M. Scott

    2015-07-01

    This paper introduces a novel application of model predictive control (MPC) to cell-level charging of a lithium-ion battery utilizing an equivalent circuit model of battery dynamics. The approach employs a modified form of the MPC algorithm that caters for direct feed-though signals in order to model near-instantaneous battery ohmic resistance. The implementation utilizes a 2nd-order equivalent circuit discrete-time state-space model based on actual cell parameters; the control methodology is used to compute a fast charging profile that respects input, output, and state constraints. Results show that MPC is well-suited to the dynamics of the battery control problem and further suggest significant performance improvements might be achieved by extending the result to electrochemical models.

  20. An Exploratory Study Examining the Feasibility of Using Bayesian Networks to Predict Circuit Analysis Understanding

    ERIC Educational Resources Information Center

    Chung, Gregory K. W. K.; Dionne, Gary B.; Kaiser, William J.

    2006-01-01

    Our research question was whether we could develop a feasible technique, using Bayesian networks, to diagnose gaps in student knowledge. Thirty-four college-age participants completed tasks designed to measure conceptual knowledge, procedural knowledge, and problem-solving skills related to circuit analysis. A Bayesian network was used to model…

  1. Logic programming

    SciTech Connect

    Lusk, E.L.; Overbeek, R.A.

    1989-01-01

    This book contains the proceedings of the 1989 North American Conference on Logic Programming. Included are the following papers: Expanding query power in constrain logic programming languages, Investigating the linguistics of DNA with definite clause grammars, An intermediate language to support prolog's unification.

  2. All-optical symmetric ternary logic gate

    NASA Astrophysics Data System (ADS)

    Chattopadhyay, Tanay

    2010-09-01

    Symmetric ternary number (radix=3) has three logical states (1¯, 0, 1). It is very much useful in carry free arithmetical operation. Beside this, the logical operation using this type of number system is also effective in high speed computation and communication in multi-valued logic. In this literature all-optical circuits for three basic symmetrical ternary logical operations (inversion, MIN and MAX) are proposed and described. Numerical simulation verifies the theoretical model. In this present scheme the different ternary logical states are represented by different polarized state of light. Terahertz optical asymmetric demultiplexer (TOAD) based interferometric switch has been used categorically in this manuscript.

  3. Nonvolatile ``AND,'' ``OR,'' and ``NOT'' Boolean logic gates based on phase-change memory

    NASA Astrophysics Data System (ADS)

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S.

    2013-12-01

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  4. Integrated Circuit Wear out Prediction and Recycling Detection using Radio Frequency Distinct Native Attribute Features

    DTIC Science & Technology

    2016-12-22

    exceed the design margin. RF-DNA utilizes the unique variations of an electrical system /component im- parted to the device during its manufacturing...std883.pdf. 18. DeJean, G. and Kirovski, D. Rf-dna: Radio-frequency certificates of authenticity. Cryptographic Hardware and Embedded Systems - CHES 2007...path. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 29(2):211–222, 2010. 118 38. Luo, H., Chen, X., Velamala, J., et al

  5. Cerebellar Neural Circuits Involving Executive Control Network Predict Response to Group Cognitive Behavior Therapy in Social Anxiety Disorder.

    PubMed

    MinlanYuan; Meng, Yajing; Zhang, Yan; Nie, Xiaojing; Ren, Zhengjia; Zhu, Hongru; Li, Yuchen; Lui, Su; Gong, Qiyong; Qiu, Changjian; Zhang, Wei

    2017-06-01

    Some intrinsic connectivity networks including the default mode network (DMN) and executive control network (ECN) may underlie social anxiety disorder (SAD). Although the cerebellum has been implicated in the pathophysiology of SAD and several networks relevant to higher-order cognition, it remains unknown whether cerebellar areas involved in DMN and ECN exhibit altered resting-state functional connectivity (rsFC) with cortical networks in SAD. Forty-six patients with SAD and 64 healthy controls (HC) were included and submitted to the baseline resting-state functional magnetic resonance imaging (fMRI). Seventeen SAD patients who completed post-treatment clinical assessments were included after group cognitive behavior therapy (CBT). RsFC of three cerebellar subregions in both groups was assessed respectively in a voxel-wise way, and these rsFC maps were compared by two-sample t tests between groups. Whole-brain voxel-wise regression was performed to examine whether cerebellar connectivity networks can predict response to CBT. Lower rsFC circuits of cerebellar subregions compared with HC at baseline (p < 0.05, corrected by false discovery rate) were revealed. The left Crus I rsFC with dorsal medial prefrontal cortex was negatively correlated with symptom severity. The clinical assessments in SAD patients were significantly decreased after CBT. Higher pretreatment cerebellar rsFC with angular gyrus and dorsal lateral frontal cortex corresponded with greater symptom improvement following CBT. Cerebellar rsFC circuits involving DMN and ECN are possible neuropathologic mechanisms of SAD. Stronger pretreatment cerebellar rsFC circuits involving ECN suggest potential neural markers to predict CBT response.

  6. Air-stable conversion of separated carbon nanotube thin-film transistors from p-type to n-type using atomic layer deposition of high-κ oxide and its application in CMOS logic circuits.

    PubMed

    Zhang, Jialu; Wang, Chuan; Fu, Yue; Che, Yuchi; Zhou, Chongwu

    2011-04-26

    Due to extraordinary electrical properties, preseparated, high purity semiconducting carbon nanotubes hold great potential for thin-film transistors (TFTs) and integrated circuit applications. One of the main challenges it still faces is the fabrication of air-stable n-type nanotube TFTs with industry-compatible techniques. Here in this paper, we report a novel and highly reliable method of converting the as-made p-type TFTs using preseparated semiconducting nanotubes into air-stable n-type transistors by adding a high-κ oxide passivation layer using atomic layer deposition (ALD). The n-type devices exhibit symmetric electrical performance compared with the p-type devices in terms of on-current, on/off ratio, and device mobility. Various factors affecting the conversion process, including ALD temperature, metal contact material, and channel length, have also been systematically studied by a series of designed experiments. A complementary metal-oxide-semiconductor (CMOS) inverter with rail-to-rail output, symmetric input/output behavior, and large noise margin has been further demonstrated. The excellent performance gives us the feasibility of cascading multiple stages of logic blocks and larger scale integration. Our approach can serve as the critical foundation for future nanotube-based thin-film macroelectronics.

  7. Prediction of multiple resonance characteristics by an extended resistor-inductor-capacitor circuit model for plasmonic metamaterials absorbers in infrared.

    PubMed

    Xu, Xiaolun; Li, Yongqian; Wang, Binbin; Zhou, Zili

    2015-10-01

    The resonance characteristics of plasmonic metamaterials absorbers (PMAs) are strongly dependent on geometric parameters. A resistor-inductor-capacitor (RLC) circuit model has been extended to predict the resonance wavelengths and the bandwidths of multiple magnetic polaritons modes in PMAs. For a typical metallic-dielectric-metallic structure absorber working in the infrared region, the developed model describes the correlation between the resonance characteristics and the dimensional sizes. In particular, the RLC model is suitable for not only the fundamental resonance mode, but also for the second- and third-order resonance modes. The prediction of the resonance characteristics agrees fairly well with those calculated by the finite-difference time-domain simulation and the experimental results. The developed RLC model enables the facilitation of designing multi-band PMAs for infrared radiation detectors and thermal emitters.

  8. Implementation of Complete Boolean Logic Functions in Single Complementary Resistive Switch

    PubMed Central

    Gao, Shuang; Zeng, Fei; Wang, Minjuan; Wang, Guangyue; Song, Cheng; Pan, Feng

    2015-01-01

    The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implementation of complete Boolean logic functions in a single CRS cell. The first method is based on the intrinsic switchable diode of a peculiar CRS cell that is composed of two anti-serial bipolar resistive switches with a rectifying high resistance state, while the second method is based directly on the complementary switching behaviour itself of any single CRS cell. The feasibilities of both methods have been theoretically predicted and then experimentally demonstrated on the basis of a Ta/Ta2O5/Pt/Ta2O5/Ta CRS cell. Therefore, these two methods—in particular the complementary switching behaviour itself-based method, which has natural immunity to the sneak-path issue of crossbar logic circuits—are believed to be capable of significantly advancing both our understanding and commercialization of related logic circuits. Moreover, peculiar CRS cells have been demonstrated to be feasible for tri-level storage, which can serve as an alternative method of realising ultra-high-density data storage. PMID:26486231

  9. Implementation of Complete Boolean Logic Functions in Single Complementary Resistive Switch

    NASA Astrophysics Data System (ADS)

    Gao, Shuang; Zeng, Fei; Wang, Minjuan; Wang, Guangyue; Song, Cheng; Pan, Feng

    2015-10-01

    The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implementation of complete Boolean logic functions in a single CRS cell. The first method is based on the intrinsic switchable diode of a peculiar CRS cell that is composed of two anti-serial bipolar resistive switches with a rectifying high resistance state, while the second method is based directly on the complementary switching behaviour itself of any single CRS cell. The feasibilities of both methods have been theoretically predicted and then experimentally demonstrated on the basis of a Ta/Ta2O5/Pt/Ta2O5/Ta CRS cell. Therefore, these two methods—in particular the complementary switching behaviour itself-based method, which has natural immunity to the sneak-path issue of crossbar logic circuits—are believed to be capable of significantly advancing both our understanding and commercialization of related logic circuits. Moreover, peculiar CRS cells have been demonstrated to be feasible for tri-level storage, which can serve as an alternative method of realising ultra-high-density data storage.

  10. A novel approach to predict the pin load distribution of multiple bolt-jointed composite laminate based on the circuit model

    NASA Astrophysics Data System (ADS)

    Yang, Xiankun; Chen, Haoyuan; Cheng, Linan; Zheng, Xitao

    2011-11-01

    The circuit model was applied to predict the pin load distribution of composite multiple bolt-joint structure. The load, flexibility and deformation of the mechanics model were equivalent to the current, resistance and voltage of the circuit model, respectively. Based on the above assumption, it could be found that the Hooke's law and the deformation compatibility equation in the origin mechanics model transformed into the Ohm's law and the voltage balance equation in the new circuit model. This approach translated the complex model of composite multiple bolt-jointed into a simple circuit model which consisted of some series circuits and parallel circuits. The analysis of the new circuit model had formed n-1 independence voltage balance equations and a current balance equation, thus, the current and load of each bolt could be calculated. In the new model, power sources which were added as required in some branch circuits could also simulate the clearance or interference in the origin model. Compared with the result of the multiple bolt-joints composite laminate test, the new approach could make an excellent performance to estimate the load distribution.

  11. A novel approach to predict the pin load distribution of multiple bolt-jointed composite laminate based on the circuit model

    NASA Astrophysics Data System (ADS)

    Yang, Xiankun; Chen, Haoyuan; Cheng, Linan; Zheng, Xitao

    2012-04-01

    The circuit model was applied to predict the pin load distribution of composite multiple bolt-joint structure. The load, flexibility and deformation of the mechanics model were equivalent to the current, resistance and voltage of the circuit model, respectively. Based on the above assumption, it could be found that the Hooke's law and the deformation compatibility equation in the origin mechanics model transformed into the Ohm's law and the voltage balance equation in the new circuit model. This approach translated the complex model of composite multiple bolt-jointed into a simple circuit model which consisted of some series circuits and parallel circuits. The analysis of the new circuit model had formed n-1 independence voltage balance equations and a current balance equation, thus, the current and load of each bolt could be calculated. In the new model, power sources which were added as required in some branch circuits could also simulate the clearance or interference in the origin model. Compared with the result of the multiple bolt-joints composite laminate test, the new approach could make an excellent performance to estimate the load distribution.

  12. Nanowire NMOS Logic Inverter Characterization.

    PubMed

    Hashim, Yasir

    2016-06-01

    This study is the first to demonstrate characteristics optimization of nanowire N-Channel Metal Oxide Semiconductor (NW-MOS) logic inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. A computer-based model used to produce static characteristics of NW-NMOS logic inverter. In this research two circuit configuration of NW-NMOS inverter was studied, in first NW-NMOS circuit, the noise margin for (low input-high output) condition was very low. For second NMOS circuit gives excellent noise margins, and results indicate that optimization depends on applied voltage to the inverter. Increasing gate to source voltage with (2/1) nanowires ratio results better noise margins. Increasing of applied DC load transistor voltage tends to increasing in decreasing noise margins; decreasing this voltage will improve noise margins significantly.

  13. Modifications in CMOS Dynamic Logic Style: A Review Paper

    NASA Astrophysics Data System (ADS)

    Meher, Preetisudha; Mahapatra, Kamalakanta

    2015-12-01

    Dynamic logic style is used in high performance circuit design because of its fast speed and less transistors requirement as compared to CMOS logic style. But it is not widely accepted for all types of circuit implementations due to its less noise tolerance and charge sharing problems. A small noise at the input of the dynamic logic can change the desired output. Domino logic uses one static CMOS inverter at the output of dynamic node which is more noise immune and consuming very less power as compared to other proposed circuit. In this paper, an overview and classification of these techniques are first presented and then compared according to their performance.

  14. Adaptive parallel logic networks

    NASA Technical Reports Server (NTRS)

    Martinez, Tony R.; Vidal, Jacques J.

    1988-01-01

    Adaptive, self-organizing concurrent systems (ASOCS) that combine self-organization with massive parallelism for such applications as adaptive logic devices, robotics, process control, and system malfunction management, are presently discussed. In ASOCS, an adaptive network composed of many simple computing elements operating in combinational and asynchronous fashion is used and problems are specified by presenting if-then rules to the system in the form of Boolean conjunctions. During data processing, which is a different operational phase from adaptation, the network acts as a parallel hardware circuit.

  15. Digital logic testing and testability

    NASA Astrophysics Data System (ADS)

    Debany, Warren H., Jr.

    1991-02-01

    Electronic hardware is subject to defects that are introduced at the time of manufacture and failures that occur in the field. Because of the complexity of digital logic circuits, they are difficult to test. This report provides an overview of digital logic testing. It provides access to the literature and unifies terminology and concepts that have evolved in this field. It discusses the types and causes of failures in digital logic. This report presents the topics of logic and fault simulation, fault grading, test generation algorithms, and fault isolation. The discussion of testability measurement is useful for understanding testability requirements and analysis techniques. Design-for-testability and built in test techniques are presented.

  16. A verification logic representation of indeterministic signal states

    NASA Technical Reports Server (NTRS)

    Gambles, J. W.; Windley, P. J.

    1991-01-01

    The integration of modern CAD tools with formal verification environments require translation from hardware description language to verification logic. A signal representation including both unknown state and a degree of strength indeterminacy is essential for the correct modeling of many VLSI circuit designs. A higher-order logic theory of indeterministic logic signals is presented.

  17. Implementing conventional logic unconventionally: photochromic molecular populations as registers and logic gates.

    PubMed

    Chaplin, J C; Russell, N A; Krasnogor, N

    2012-07-01

    In this paper we detail experimental methods to implement registers, logic gates and logic circuits using populations of photochromic molecules exposed to sequences of light pulses. Photochromic molecules are molecules with two or more stable states that can be switched reversibly between states by illuminating with appropriate wavelengths of radiation. Registers are implemented by using the concentration of molecules in each state in a given sample to represent an integer value. The register's value can then be read using the intensity of a fluorescence signal from the sample. Logic gates have been implemented using a register with inputs in the form of light pulses to implement 1-input/1-output and 2-input/1-output logic gates. A proof of concept logic circuit is also demonstrated; coupled with the software workflow describe the transition from a circuit design to the corresponding sequence of light pulses. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.

  18. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    SciTech Connect

    Clark, Lawrence T; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  19. Starter circuit for an ion engine

    NASA Technical Reports Server (NTRS)

    Cardwell, Jr., Gilbert I. (Inventor); Phelps, Thomas K. (Inventor)

    2002-01-01

    A starter circuit particularly suitable for a plasma of an ion engine for a spacecraft includes a power supply having an output inductor with a tap. A switch is coupled to the tap. The switch has a control input. A pulse control logic circuit is coupled to said control input, said pulse control logic circuit controlling said switch to an off state to generate a high voltage discharge.

  20. Starter circuit for an ion engine

    NASA Technical Reports Server (NTRS)

    Cardwell, Jr., Gilbert I. (Inventor); Phelps, Thomas K. (Inventor)

    2001-01-01

    A starter circuit particularly suitable for a plasma of an ion engine for a spacecraft includes a power supply having an output inductor with a tap. A switch is coupled to the tap. The switch has a control input. A pulse control logic circuit is coupled to said control input, said pulse control logic circuit controlling said switch to an off state to generate a high voltage discharge.

  1. HDL to verification logic translator

    NASA Astrophysics Data System (ADS)

    Gambles, J. W.; Windley, P. J.

    The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

  2. HDL to verification logic translator

    NASA Technical Reports Server (NTRS)

    Gambles, J. W.; Windley, P. J.

    1992-01-01

    The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

  3. Fuzzy logic

    NASA Technical Reports Server (NTRS)

    Zadeh, Lofti A.

    1988-01-01

    The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. The discussion covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control.

  4. Fuzzy logic

    NASA Technical Reports Server (NTRS)

    Zadeh, Lofti A.

    1988-01-01

    The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. The discussion covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control.

  5. Activity levels in the left hemisphere caudate–fusiform circuit predict how well a second language will be learned

    PubMed Central

    Tan, Li Hai; Chen, Lin; Yip, Virginia; Chan, Alice H. D.; Yang, Jing; Gao, Jia-Hong; Siok, Wai Ting

    2011-01-01

    How second language (L2) learning is achieved in the human brain remains one of the fundamental questions of neuroscience and linguistics. Previous neuroimaging studies with bilinguals have consistently shown overlapping cortical organization of the native language (L1) and L2, leading to a prediction that a common neurobiological marker may be responsible for the development of the two languages. Here, by using functional MRI, we show that later skills to read in L2 are predicted by the activity level of the fusiform–caudate circuit in the left hemisphere, which nonetheless is not predictive of the ability to read in the native language. We scanned 10-y-old children while they performed a lexical decision task on L2 (and L1) stimuli. The subjects’ written language (reading) skills were behaviorally assessed twice, the first time just before we performed the fMRI scan (time 1 reading) and the second time 1 y later (time 2 reading). A whole-brain based analysis revealed that activity levels in left caudate and left fusiform gyrus correlated with L2 literacy skills at time 1. After controlling for the effects of time 1 reading and nonverbal IQ, or the effect of in-scanner lexical performance, the development in L2 literacy skills (time 2 reading) was also predicted by activity in left caudate and fusiform regions that are thought to mediate language control functions and resolve competition arising from L1 during L2 learning. Our findings suggest that the activity level of left caudate and fusiform regions serves as an important neurobiological marker for predicting accomplishment in reading skills in a new language. PMID:21262807

  6. Back to Basics: Making Predictions in the Orbitofrontal-Amygdala Circuit

    PubMed Central

    Sharpe, Melissa J.; Schoenbaum, Geoffrey

    2017-01-01

    Underlying many complex behaviors are simple learned associations that allow humans and animals to anticipate the consequences of their actions. The orbitofrontal cortex and basolateral amygdala are two regions which are crucial to this process. In this review, we go back to basics and discuss the literature implicating both these regions in simple paradigms requiring the development of associations between stimuli and the motivationally-significant outcomes they predict. Much of the functional research surrounding this ability has suggested that the orbitofrontal cortex and basolateral amygdala play very similar roles in making these predictions. However, electrophysiological data demonstrates critical differences in the way neurons in these regions respond to predictive cues, revealing a difference in their functional role. On the basis of these data and theories that have come before, we propose that the basolateral amygdala is integral to updating information about cue-outcome contingencies whereas the orbitofrontal cortex is critical to forming a wider network of past and present associations that are called upon by the basolateral amygdala to benefit future learning episodes. The tendency for orbitofrontal neurons to encode past and present contingencies in distinct neuronal populations may facilitate its role in the formation of complex, high-dimensional state-specific associations. PMID:27112314

  7. Efficient digital comparison technique for logic circuits

    NASA Technical Reports Server (NTRS)

    Mccarthy, C. E.

    1971-01-01

    Tolerance compare technique indicates discompare only when numerical difference value exceeds prescribed limit. Algorithm involving binary number properties is defined, in lieu of arithmetic operation which requires relatively complex circuitry. Extension of algorithm may be made to encompass tolerances other than one unit.

  8. Logic Programming in Digital Circuit Design

    DTIC Science & Technology

    1991-12-01

    facts. Computers using AI software can be useful in discovering design mistakes before they become a problem [46]. AFIT currently supports research ...and the objectives of this research along with an overall view of assumptions and methodologies are stated. Chapter 2 presents a brief history of...chapter, Chapter 7, discusses the strengths and weaknesses of the algorithms presented and makes recommendations for the direction of future research

  9. Optical design of programmable logic arrays

    NASA Astrophysics Data System (ADS)

    Murdocca, Miles J.; Huang, Alan; Jahns, Jurgen; Streibl, Norbert

    1988-05-01

    Regular free-space interconnects such as the perfect shuffle and banyan provided by beam splitters, lenses, and mirrors connect optical logic gates arranged in two-dimensional arrays. An algorithmic design technique transforms arbitrary logic equations into a near-optimal depth circuit. Analysis shows that an arbitrary interconnect makes little or no improvement in circuit depth and can even reduce throughput. Gate count is normally higher with a regular interconnect, and cost bounds are shown. It is concluded that regularly interconnected circuits will have a higher gate count compared with arbitrarily interconnected circuits using the design techniques presented here and that regular free-space interconnects are comparable with arbitrary interconnects in terms of circuit depth and are preferred to arbitrary interconnects for maximizing throughput.

  10. GMAG Dissertation Award Talk: All Spin Logic -- Multimagnet Networks interacting via Spin currents

    NASA Astrophysics Data System (ADS)

    Srinivasan, Srikant

    2012-02-01

    Digital logic circuits have traditionally been based on storing information as charge on capacitors, and the stored information is transferred by controlling the flow of charge. However, electrons carry both charge and spin, the latter being responsible for magnetic phenomena. In the last few decades, there has been a significant improvement in our ability to control spins and their interaction with magnets. All Spin Logic (ASL) represents a new approach to information processing where spins and magnets now mirror the roles of charges and capacitors in conventional logic circuits. In this talk I first present a model [1] that couples non-collinear spin transport with magnet-dynamics to predict the switching behavior of the basic ASL device. This model is based on established physics and is benchmarked against available experimental data that demonstrate spin-torque switching in lateral structures. Next, the model is extended to simulate multi-magnet networks coupled with spin transport channels. The simulations suggest ASL devices have the essential characteristics for building logic circuits. In particular, (1) the example of an ASL ring oscillator [2, 3] is used to provide a clear signature of directed information transfer in cascaded ASL devices without the need for external control circuitry and (2) a simulated NAND [4] gate with fan-out of 2 suggests that ASL can implement universal logic and drive subsequent stages. Finally I will discuss how ASL based circuits could also have potential use in the design of neuromorphic circuits suitable for hybrid analog/digital information processing because of the natural mapping of ASL devices to neurons [4]. [4pt] [1] B. Behin-Aein, A. Sarkar, S. Srinivasan, and S. Datta, ``Switching Energy-Delay of All-Spin Logic devices,'' Appl. Phys. Lett., 98, 123510 (2011).[0pt] [2] S. Srinivasan, A. Sarkar, B. Behin-Aein, and S. Datta, ``All Spin Logic Device with Inbuilt Non-reciprocity,'' IEEE Trans. Magn., 47, 10 (2011).[0pt] [3

  11. Analysis and prediction of aperiodic hydrodynamic oscillatory time series by feed-forward neural networks, fuzzy logic, and a local nonlinear predictor

    SciTech Connect

    Gentili, Pier Luigi; Gotoda, Hiroshi; Dolnik, Milos; Epstein, Irving R.

    2015-01-15

    Forecasting of aperiodic time series is a compelling challenge for science. In this work, we analyze aperiodic spectrophotometric data, proportional to the concentrations of two forms of a thermoreversible photochromic spiro-oxazine, that are generated when a cuvette containing a solution of the spiro-oxazine undergoes photoreaction and convection due to localized ultraviolet illumination. We construct the phase space for the system using Takens' theorem and we calculate the Lyapunov exponents and the correlation dimensions to ascertain the chaotic character of the time series. Finally, we predict the time series using three distinct methods: a feed-forward neural network, fuzzy logic, and a local nonlinear predictor. We compare the performances of these three methods.

  12. Dynamic Divisive Normalization Predicts Time-Varying Value Coding in Decision-Related Circuits

    PubMed Central

    LoFaro, Thomas; Webb, Ryan; Glimcher, Paul W.

    2014-01-01

    Normalization is a widespread neural computation, mediating divisive gain control in sensory processing and implementing a context-dependent value code in decision-related frontal and parietal cortices. Although decision-making is a dynamic process with complex temporal characteristics, most models of normalization are time-independent and little is known about the dynamic interaction of normalization and choice. Here, we show that a simple differential equation model of normalization explains the characteristic phasic-sustained pattern of cortical decision activity and predicts specific normalization dynamics: value coding during initial transients, time-varying value modulation, and delayed onset of contextual information. Empirically, we observe these predicted dynamics in saccade-related neurons in monkey lateral intraparietal cortex. Furthermore, such models naturally incorporate a time-weighted average of past activity, implementing an intrinsic reference-dependence in value coding. These results suggest that a single network mechanism can explain both transient and sustained decision activity, emphasizing the importance of a dynamic view of normalization in neural coding. PMID:25429145

  13. Do Skilled Elementary Teachers Hold Scientific Conceptions and Can They Accurately Predict the Type and Source of Students' Preconceptions of Electric Circuits?

    ERIC Educational Resources Information Center

    Lin, Jing-Wen

    2016-01-01

    Holding scientific conceptions and having the ability to accurately predict students' preconceptions are a prerequisite for science teachers to design appropriate constructivist-oriented learning experiences. This study explored the types and sources of students' preconceptions of electric circuits. First, 438 grade 3 (9 years old) students were…

  14. Do Skilled Elementary Teachers Hold Scientific Conceptions and Can They Accurately Predict the Type and Source of Students' Preconceptions of Electric Circuits?

    ERIC Educational Resources Information Center

    Lin, Jing-Wen

    2016-01-01

    Holding scientific conceptions and having the ability to accurately predict students' preconceptions are a prerequisite for science teachers to design appropriate constructivist-oriented learning experiences. This study explored the types and sources of students' preconceptions of electric circuits. First, 438 grade 3 (9 years old) students were…

  15. Development of ferrite logic devices for an arithmetic processor

    NASA Technical Reports Server (NTRS)

    Heckler, C. H., Jr.

    1972-01-01

    A number of fundamentally ultra-reliable, all-magnetic logic circuits are developed using as a basis a single element ferrite structure wired as a logic delay element. By making minor additions or changes to the basic wiring pattern of the delay element other logic functions such as OR, AND, NEGATION, MAJORITY, EXCLUSIVE-OR, and FAN-OUT are developed. These logic functions are then used in the design of a full-adder, a set/reset flip-flop, and an edge detector. As a demonstration of the utility of all the developed devices, an 8-bit, all-magnetic, logic arithmetic unit capable of controlled addition, subtraction, and multiplication is designed. A new basic ferrite logic element and associated complementary logic scheme with the potential of improved performance is also described. Finally, an improved batch process for fabricating joint-free power drive and logic interconnect conductors for this basic class of all-magnetic logic is presented.

  16. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  17. Boolean network model for GPR142 against Type 2 diabetes and relative dynamic change ratio analysis using systems and biological circuits approach.

    PubMed

    Kaushik, Aman Chandra; Sahi, Shakti

    2015-06-01

    Systems biology addresses challenges in the analysis of genomics data, especially for complex genes and protein interactions using Meta data approach on various signaling pathways. In this paper, we report systems biology and biological circuits approach to construct pathway and identify early gene and protein interactions for predicting GPR142 responses in Type 2 diabetes. The information regarding genes, proteins and other molecules involved in Type 2 diabetes were retrieved from literature and kinetic simulation of GPR142 was carried out in order to determine the dynamic interactions. The major objective of this work was to design a GPR142 biochemical pathway using both systems biology as well as biological circuits synthetically. The term 'synthetically' refers to building biological circuits for cell signaling pathway especially for hormonal pathway disease. The focus of the paper is on logical components and logical circuits whereby using these applications users can create complex virtual circuits. Logic gates process represents only true or false and investigates whether biological regulatory circuits are active or inactive. The basic gates used are AND, NAND, OR, XOR and NOT gates and Integrated circuit composition of many such basic gates and some derived gates. Biological circuits may have a futuristic application in biomedical sciences which may involve placing a micro chip in human cells to modulate the down or up regulation of hormonal disease.

  18. Nanoparticle Based Logic Gates

    NASA Astrophysics Data System (ADS)

    Berven, Christopher; Wybourne, Martin; Longstreth, Lydia

    2003-05-01

    Ligand stabilized gold nanoparticles have novel properties that can be exploited for their use as possible building blocks for room-temperature single electron devices. With a core of 70 gold atoms or less (diameter <= 1.4 nm), the self-capacitance of these particles is a fraction of an atto-Farad. This small capacitance translates into an electrostatic charging energy well in excess of the thermal energy at room temperature. Single electron behavior has been demonstrated in one- and two-dimensional arrays of nanoparticles. In traditional single electron devices, the self-capacitance is negligible, whereas the self-capacitance in nanoparticle based devices can be the dominant capacitance. This means that the effect of charging a nanoparticle chain is highly localized which is in contrast to traditional single electron devices where the induced potential due to an excess electron on an island is felt by many neighboring islands. As a result, the current-voltage characteristics and plots of stable electron occupancy in the arrays have different behavior to that found in traditional devices. We show that this new regime of tunneling behavior can be exploited to create a novel family of single-electron logic gate devices. Using numerical simulation we have found that when a one-dimensional array of nanoparticles is gated in an electron-pump arrangement and properly biased, the behavior is that of an AND gate. The addition of an inverter circuit results in NAND gate behavior, the inverter providing the power necessary for the cascading of multiple NAND gates and the generation of arbitrary logic circuits.

  19. Bilayer avalanche spin-diode logic

    SciTech Connect

    Friedman, Joseph S. Querlioz, Damien; Fadel, Eric R.; Wessels, Bruce W.; Sahakian, Alan V.

    2015-11-15

    A novel spintronic computing paradigm is proposed and analyzed in which InSb p-n bilayer avalanche spin-diodes are cascaded to efficiently perform complex logic operations. This spin-diode logic family uses control wires to generate magnetic fields that modulate the resistance of the spin-diodes, and currents through these devices control the resistance of cascaded devices. Electromagnetic simulations are performed to demonstrate the cascading mechanism, and guidelines are provided for the development of this innovative computing technology. This cascading scheme permits compact logic circuits with switching speeds determined by electromagnetic wave propagation rather than electron motion, enabling high-performance spintronic computing.

  20. Gate-Controlled BP-WSe2 Heterojunction Diode for Logic Rectifiers and Logic Optoelectronics.

    PubMed

    Li, Dong; Wang, Biao; Chen, Mingyuan; Zhou, Jun; Zhang, Zengxing

    2017-06-01

    p-n junctions play an important role in modern semiconductor electronics and optoelectronics, and field-effect transistors are often used for logic circuits. Here, gate-controlled logic rectifiers and logic optoelectronic devices based on stacked black phosphorus (BP) and tungsten diselenide (WSe2 ) heterojunctions are reported. The gate-tunable ambipolar charge carriers in BP and WSe2 enable a flexible, dynamic, and wide modulation on the heterojunctions as isotype (p-p and n-n) and anisotype (p-n) diodes, which exhibit disparate rectifying and photovoltaic properties. Based on such characteristics, it is demonstrated that BP-WSe2 heterojunction diodes can be developed for high-performance logic rectifiers and logic optoelectronic devices. Logic optoelectronic devices can convert a light signal to an electric one by applied gate voltages. This work should be helpful to expand the applications of 2D crystals. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Digital integrated circuits

    NASA Astrophysics Data System (ADS)

    Polasek, P.; Halamik, J.

    1984-05-01

    The term semicustom designed integrated circuits denotes integrated circuits of an all purpose character in which the production of chips is completed by using one to three custom design stencil type exposure masks. This involves in most cases interconnecting masks that are used to devise the circuit function desired by the customer. Silicon plates with an all purpose gate matrix are produced up to the interconnection level and can be kept at this phase in storage, after which a customer's specific demands can be met very expediently. All purpose logic fields containing 200 logic gates on a chip and an all purpose chip to be expanded to 1,000 logic gates are discussed. The technology facilitates the devising of fast gates with a delay of approximately 5 ns and power dissipation of 1 mW. In assembly it will be possible to make use of the entire assortment of the currently used casings with 16, 18, 20, 24, 28 and 40 outlets. In addition to the development of the mentioned technology, a general methodology for design of the mentioned gate fields is currently under way.

  2. Simple digital pulse-programing circuit

    NASA Technical Reports Server (NTRS)

    Langston, J. L.

    1979-01-01

    Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.

  3. Simple digital pulse-programing circuit

    NASA Technical Reports Server (NTRS)

    Langston, J. L.

    1979-01-01

    Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.

  4. CMAT non-volatile spintronic computing: complementary MTJ logic

    NASA Astrophysics Data System (ADS)

    Friedman, Joseph S.

    2016-10-01

    Magnetic tunnel junctions (MTJs) have thoroughly demonstrated their utility as a non-volatile memory storage element, inspiring their application to a memory-in-logic computer that would overcome the von Neumann bottleneck. However, MTJ logic gates must be able to cause other MTJs to switch, thus ensuring the cascading capability fundamental to efficient computing. Complementary MTJ logic (CMAT) provides a simple circuit structure through which MTJs can be cascaded directly to perform logic operations. In this novel logic family, charge pulses resulting from MTJ switching create magnetic fields that switch other MTJs, providing impetus for further development of MTJs for computing applications.

  5. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  6. Digital system provides superregulation of nanosecond amplifier-discriminator circuit

    NASA Technical Reports Server (NTRS)

    Forges, K. G.

    1966-01-01

    Feedback system employing a digital logic comparator to detect and correct amplifier drift provides stable gain characteristics for nanosecond amplifiers used in counting applications. Additional anticoincidence logic enables application of the regulation circuit to the amplifier and discriminator while they are mounted in an operable circuit.

  7. Development of automated test procedures and techniques for LSI circuits

    NASA Technical Reports Server (NTRS)

    Carroll, B. D.

    1975-01-01

    Testing of large scale integrated (LSI) logic circuits was considered from the point of view of automatic test pattern generation. A system for automatic test pattern generation is described. A test generation algorithm is presented that can be applied to both combinational and sequential logic circuits. Also included is a programmed implementation of the algorithm and sample results from the program.

  8. Interface Circuits for Self-Checking Microprocessors

    NASA Technical Reports Server (NTRS)

    Rennels, D. A.; Chandramouli, R.

    1986-01-01

    Fault-tolerant-microcomputer concept based on enhancing "simple" computer with redundancy and self-checking logic circuits detect hardware faults. Interface and checking logic and redundant processors confer on 16-bit microcomputer ability to check itself for hardware faults. Checking circuitry also checks itself. Concept of self-checking complementary pairs (SCCP's) employed throughout ICL unit.

  9. Electronic logic to enhance switch reliability in detecting openings and closures of redundant switches

    DOEpatents

    Cooper, James A.

    1986-01-01

    A logic circuit is used to enhance redundant switch reliability. Two or more switches are monitored for logical high or low output. The output for the logic circuit produces a redundant and failsafe representation of the switch outputs. When both switch outputs are high, the output is high. Similarly, when both switch outputs are low, the logic circuit's output is low. When the output states of the two switches do not agree, the circuit resolves the conflict by memorizing the last output state which both switches were simultaneously in and produces the logical complement of this output state. Thus, the logic circuit of the present invention allows the redundant switches to be treated as if they were in parallel when the switches are open and as if they were in series when the switches are closed. A failsafe system having maximum reliability is thereby produced.

  10. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    SciTech Connect

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S.

    2013-12-21

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  11. Reliability of Physical Systems: Detection of Malicious Subcircuits (Trojan Circuits) in Sequential Circuits

    NASA Astrophysics Data System (ADS)

    Matrosova, A. Yu.; Kirienko, I. E.; Tomkov, V. V.; Miryutov, A. A.

    2016-12-01

    Reliability of physical systems is provided by reliability of their parts including logical ones. Insertion of malicious subcircuits that can destroy logical circuit or cause leakage of confidential information from a system necessitates the detection of such subcircuits followed by their masking if possible. We suggest a method of finding a set of sequential circuit nodes in which Trojan Circuits can be inserted. The method is based on random estimations of controllability and observability of combinational nodes calculated using a description of sequential circuit working area and an evidence of existence of a transfer sequence for the proper set of internal states without finding the sequence itself. The method allows cutting calculations using operations on Reduced Ordered Binary Decision Diagrams (ROBDDs) that can depend only on the state variables of the circuit. The approach, unlike traditional ones, does not require preliminary sequential circuit simulation but can use its results. It can be used when malicious circuits cannot be detected during sequential circuit verification.

  12. Toward spin-based Magneto Logic Gate in Graphene

    NASA Astrophysics Data System (ADS)

    Wen, Hua; Dery, Hanan; Amamou, Walid; Zhu, Tiancong; Lin, Zhisheng; Shi, Jing; Zutic, Igor; Krivorotov, Ilya; Sham, Lu; Kawakami, Roland

    Graphene has emerged as a leading candidate for spintronic applications due to its long spin diffusion length at room temperature. A universal magnetologic gate (MLG) based on spin transport in graphene has been recently proposed as the building block of a logic circuit which could replace the current CMOS technology. This MLG has five ferromagnetic electrodes contacting a graphene channel and can be considered as two three-terminal XOR logic gates. Here we demonstrate this XOR logic gate operation in such a device. This was achieved by systematically tuning the injection current bias to balance the spin polarization efficiency of the two inputs, and offset voltage in the detection circuit to obtain binary outputs. The output is a current which corresponds to different logic states: zero current is logic `0', and nonzero current is logic `1'. We find improved performance could be achieved by reducing device size and optimizing the contacts.

  13. Magnetic-field-controlled reconfigurable semiconductor logic.

    PubMed

    Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark

    2013-02-07

    Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.

  14. Giving Programming Students a Logical Step Up.

    ERIC Educational Resources Information Center

    Brown, David W.

    1990-01-01

    Presents a method to enhance the teaching of computer programing to secondary students that establishes a connection between logic, truth tables, switching circuits, gating symbols, flow charts, and pseudocode. The author asserts that the method prepares students for thinking processes related to programing. (MDH)

  15. Quantum logic gates for superconducting resonator qudits

    SciTech Connect

    Strauch, Frederick W.

    2011-11-15

    We study quantum information processing using superpositions of Fock states in superconducting resonators as quantum d-level systems (qudits). A universal set of single and coupled logic gates is theoretically proposed for resonators coupled by superconducting circuits of Josephson junctions. These gates use experimentally demonstrated interactions and provide an attractive route to quantum information processing using harmonic oscillator modes.

  16. Digital Circuit Analysis Using an 8080 Processor.

    ERIC Educational Resources Information Center

    Greco, John; Stern, Kenneth

    1983-01-01

    Presents the essentials of a program written in Intel 8080 assembly language for the steady state analysis of a combinatorial logic gate circuit. Program features and potential modifications are considered. For example, the program could also be extended to include clocked/unclocked sequential circuits. (JN)

  17. Low power SEU immune CMOS memory circuits

    NASA Technical Reports Server (NTRS)

    Liu, M. N.; Whitaker, Sterling

    1992-01-01

    The authors report a design improvement for CMOS static memory circuits hardened against single event upset (SEU) using a recently proposed logic/circuit design technique. This improvement drastically reduces static power consumption, reduces the number of transistors required in a D flip-flop design, and eliminates the possibility of capturing an upset state in the slave section during a clock transition.

  18. Development of CMOS integrated circuits

    NASA Technical Reports Server (NTRS)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  19. Man-machine interactive system simplifies computer-aided circuit design

    NASA Technical Reports Server (NTRS)

    Bavuso, S. J.

    1970-01-01

    Langley interactive computerized circuit analysis capability /LICCA/ enables designer to draw electronic circuit diagrams on cathode ray tube screen. This information is submitted as input to user-selected circuit analysis program. LICCA accommodates binary logic circuits and circuits with discrete components, and monitors operator's instructions to detect errors.

  20. Modelling of the radon exhalation from water to air by a hybrid electrical circuit for earthquake prediction

    NASA Astrophysics Data System (ADS)

    Negarestani, A.; Hashemipoor Rafsenjani, H.; Noori, H.; Shahpasandzadeh, M.; Naseri, F.; Montazari, H.

    2009-04-01

    To better understand the mechanism of Radon exhalation from liquid to air, a hybrid electrical circuit model has been introduced. Differential equations expressing changes in radon concentration in the gas and liquid phases can be written as (1) (2) Where Vgand Cg are volume and radon concentration in the gas phase, Vl and Cl are those in the liquid phase, C0 is the original radon concentration in the groundwater before degassing, λ is the decay constant of Radon, F is the degassing flux of radon from liquid phase to gas phase and Q is the flow rate of the groundwater. The degassing flux of radon from liquid phase to gas phase can be written as (3) Where Ktot is the total gas transfer velocity (m/s), S is the area of the boundary between liquid and gas phase and H is the Henry's law constant (H = Cg/ Cl in an equilibrium state). The component of Ktotare the overall diffusive gas transfer velocity, Kol, and the bubble mediated gas transfer velocity , Kb,. Ktot = Kol+Kb (4) Where (3) Where Kwis the transfer velocity in the water(m/s) and Ka is the transfer velocity in the air (m/s) (4) Where Dw is the chemical molecular diffusion coefficient in water (at temperature of the water)(m2/s) and Zw is the thickness of the stagnant water film (m) . (5) Where Da is the chemical molecular diffusion coefficient in air (at temperature of the air)(m2/s) and Za is the thickness of the stagnant air film (m). We solved these coupled equations (1 and 2), using the finite element method for an actual system. Elaborating an active radon detector (RAD7), we measured the radon exhalation from liquid to a closed loop of air. With comparing the results of the introduced model with the actual data for a proposed setup in the ICST lab, our model demonstrates the variation of the radon concentration efficiently. This model has significant applications in monitoring radon behavior in different geohazard disciplines including earthquake prediction and human health.

  1. Multifunctional Graphene/DNA-Based Platform for the Construction of Enzyme-Free Ternary Logic Gates.

    PubMed

    Zhou, Chunyang; Liu, Dali; Wu, Changtong; Dong, Shaojun; Wang, Erkang

    2016-11-09

    In this work, we have successfully realized multivalued logic circuits including ternary INHIBIT and ternary OR logic gates in an enzyme-free condition by integration of graphene oxide and DNA for the first time. Compared to the binary logic gate with two states of "0" and "1", the multivalued logic gate contains three different states of "0", "1", and "2", which can increase the information content in a system and further improve the ability of information processing. Such types of multivalued logic operations provide a wider field of vision toward DNA-based algebra logical operations to make applications more accurate with complexity reduction and accelerate the development of advanced logic gates.

  2. Programmable nanowire circuits for nanoprocessors.

    PubMed

    Yan, Hao; Choe, Hwan Sung; Nam, SungWoo; Hu, Yongjie; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M

    2011-02-10

    A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated

  3. Introduction to lethal circuit transformations

    NASA Astrophysics Data System (ADS)

    Fišer, Petr; Schmidt, Jan

    2015-12-01

    Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.

  4. Noise-based logic: Binary, multi-valued, or fuzzy, with optional superposition of logic states

    NASA Astrophysics Data System (ADS)

    Kish, Laszlo B.

    2009-03-01

    A new type of deterministic (non-probabilistic) computer logic system inspired by the stochasticity of brain signals is shown. The distinct values are represented by independent stochastic processes: independent voltage (or current) noises. The orthogonality of these processes provides a natural way to construct binary or multi-valued logic circuitry with arbitrary number N of logic values by using analog circuitry. Moreover, the logic values on a single wire can be made a (weighted) superposition of the N distinct logic values. Fuzzy logic is also naturally represented by a two-component superposition within the binary case ( N=2). Error propagation and accumulation are suppressed. Other relevant advantages are reduced energy dissipation and leakage current problems, and robustness against circuit noise and background noises such as 1/f, Johnson, shot and crosstalk noise. Variability problems are also non-existent because the logic value is an AC signal. A similar logic system can be built with orthogonal sinusoidal signals (different frequency or orthogonal phase) however that has an extra 1/N type slowdown compared to the noise-based logic system with increasing number of N furthermore it is less robust against time delay effects than the noise-based counterpart.

  5. Integrated-Circuit Pseudorandom-Number Generator

    NASA Technical Reports Server (NTRS)

    Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

    1992-01-01

    Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

  6. Multi-input regulation and logic with T7 promoters in cells and cell free systems

    SciTech Connect

    Iyer, Sukanya; Karig, David K; Norred, Sarah E; Simpson, Michael L; Doktycz, Mitchel John

    2014-01-01

    Engineered gene circuits offer an opportunity to harness biological systems for biotechnological and biomedical applications. However, reliance on host E. coli promoters for the construction of circuit elements, such as logic gates, makes implementation of predictable, independently functioning circuits difficult. In contrast, T7 promoters offer a simple orthogonal expression system for use in a variety of cellular backgrounds and even in cell free systems. Here we develop a T7 promoter system that can be regulated by two different transcriptional repressors for the construction of a logic gate that functions in cells and in cell free systems. We first present LacI repressible T7lacO promoters that are regulated from a distal lac operator site for repression. We next explore the positioning of a tet operator site within the T7lacO framework to create T7 promoters that respond to tet and lac repressors and realize an IMPLIES gate. Finally, we demonstrate that these dual input sensitive promoters function in a commercially available E. coli cell-free protein expression system. Together, our results contribute to the first demonstration of multi-input regulation of T7 promoters and expand the utility of T7 promoters in cell based as well as cell-free gene circuits.

  7. Practical applications of digital integrated circuits. Part 3: Practical sequential theory and synchronous circuits

    NASA Technical Reports Server (NTRS)

    1973-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be noted that the logic theory contained herein applies to all hardware. Discussed here are synchronous binary UP counters, synchronous DOWN and UP/DOWN counters, integrated circuit counters, shift registers, sequential techniques, and designing sequential counting machines.

  8. Implementing neural nets with programmable logic

    NASA Technical Reports Server (NTRS)

    Vidal, Jacques J.

    1988-01-01

    Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.

  9. Implementing neural nets with programmable logic

    NASA Technical Reports Server (NTRS)

    Vidal, Jacques J.

    1988-01-01

    Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.

  10. Novel Design for Reversible Arithmetic Logic Unit

    NASA Astrophysics Data System (ADS)

    Zhou, Rigui; Li, Yancheng; Zhang, Manqun; Hu, BenQiong

    2015-02-01

    Reversible logic circuits are of high interests to calculate with minimum energy consumption having applications in low-power CMOS design, optical computing and nanotechnology, especially in quantum computer. Quantum computer requires quantum arithmetic. A new design of a reversible arithmetic logic unit (reversible ALU) for quantum arithmetic has been proposed in this article. As we known, ALU is an important part of central processing unit (CPU) as the execution unit. So this article provides explicit construction of reversible ALU effecting basic arithmetic operations. By provided the corresponding control unit, the proposed reversible ALU can combine the classical arithmetic and logic operation in a reversible integrated system. This article provides a new more powerful ALU which contains more functions and it will make contribute to the realization of reversible Programmable Logic Device (RPLD) in future using reversible ALU.

  11. Genetic Dissection of Neural Circuits

    PubMed Central

    Luo, Liqun; Callaway, Edward M.; Svoboda, Karel

    2009-01-01

    Understanding the principles of information processing in neural circuits requires systematic characterization of the participating cell types and their connections, and the ability to measure and perturb their activity. Genetic approaches promise to bring experimental access to complex neural systems, including genetic stalwarts such as the fly and mouse, but also to nongenetic systems such as primates. Together with anatomical and physiological methods, cell-type-specific expression of protein markers and sensors and transducers will be critical to construct circuit diagrams and to measure the activity of genetically defined neurons. Inactivation and activation of genetically defined cell types will establish causal relationships between activity in specific groups of neurons, circuit function, and animal behavior. Genetic analysis thus promises to reveal the logic of the neural circuits in complex brains that guide behaviors. Here we review progress in the genetic analysis of neural circuits and discuss directions for future research and development. PMID:18341986

  12. Divide and control: split design of multi-input DNA logic gates†

    PubMed Central

    Gerasimova, Yulia V.

    2015-01-01

    Logic gates made of DNA have received significant attention as biocompatible building blocks for molecular circuits. The majority of DNA logic gates, however, are controlled by the minimum number of inputs: one, two or three. Here we report a strategy to design a multi-input logic gate by splitting a DNA construct. PMID:25513764

  13. Divide and control: split design of multi-input DNA logic gates.

    PubMed

    Gerasimova, Yulia V; Kolpashchikov, Dmitry M

    2015-01-18

    Logic gates made of DNA have received significant attention as biocompatible building blocks for molecular circuits. The majority of DNA logic gates, however, are controlled by the minimum number of inputs: one, two or three. Here we report a strategy to design a multi-input logic gate by splitting a DNA construct.

  14. Complementary Noise-Immune Logic: High-Speed Logic for Reliable Computing Achieved Through Designable, Near - Voltage Transfer Characteristics.

    NASA Astrophysics Data System (ADS)

    Gravrok, Roger John

    Improvements in digit-logic reliability and throughput performance have been achieved with circuit-design innovations. The goal of this research has been to improve the reliability of digital-logic systems by exploring new avenues in logic gate design. This is not a "technology push". Novel circuit design concepts, at the transistor level, were developed that yield near-ideal digital-logic-gate performance, and hence, deliver a step-function improvement in operational reliability. The design innovation uses circuit elements that independently regulate current and voltage, and uses a push-pull output stage. The result is a sharp voltage -transfer characteristic featuring rail-to-rail logic swings and noise margins that are larger than 2 V. These results were verified experimentally with a prototype test chip fabricated on a commercial production line. Development work has continued yielding several generations of commercially viable CNIL^{rm TM} logic families. Because of the near-ideal logic performance that these design concepts deliver, it is possible to implement high-fanin gates, which place substantial "logic power" in a single gate, and with a minimal amount of hardware. For example, 16-input 4 x 4 OR/AND gates have been developed for all-NPN ECL technologies. Significantly, these large -logic-functionality gates deliver subnanosecond propagation delays (590 ps) approximately equalling those of the basic two-input OR gates (600 ps). This high-speed, uniform operation of large and small gates is a result of further design innovations that prevent BJT saturation. A summary of the technical benefits include improvements in: logic performance, operational reliability, design flexibility, fabrication simplicity, and yield advantages. The CNIL benefits in combination deliver improved reliability and enhanced data throughput for silicon and GaAs logic circuits.

  15. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. Copyright © 2016, American Association for the Advancement of Science.

  16. Modeling of Single Event Transients With Dual Double-Exponential Current Sources: Implications for Logic Cell Characterization

    NASA Astrophysics Data System (ADS)

    Black, Dolores A.; Robinson, William H.; Wilcox, Ian Z.; Limbrick, Daniel B.; Black, Jeffrey D.

    2015-08-01

    Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. An accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventional model based on one double-exponential source can be incomplete. A small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. The parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.

  17. CMOS Interface Circuits for Spin Tunneling Junction Based Magnetic Random Access Memories

    SciTech Connect

    Saripalli, Ganesh

    2002-01-01

    Magneto resistive memories (MRAM) are non-volatile memories which use magnetic instead of electrical structures to store data. These memories, apart from being non-volatile, offer a possibility to achieve densities better than DRAMs and speeds faster than SRAMs. MRAMs could potentially replace all computer memory RAM technologies in use today, leading to future applications like instan-on computers and longer battery life for pervasive devices. Such rapid development was made possible due to the recent discovery of large magnetoresistance in Spin tunneling junction devices. Spin tunneling junctions (STJ) are composite structures consisting of a thin insulating layer sandwiched between two magnetic layers. This thesis research is targeted towards these spin tunneling junction based Magnetic memories. In any memory, some kind of an interface circuit is needed to read the logic states. In this thesis, four such circuits are proposed and designed for Magnetic memories (MRAM). These circuits interface to the Spin tunneling junctions and act as sense amplifiers to read their magnetic states. The physical structure and functional characteristics of these circuits are discussed in this thesis. Mismatch effects on the circuits and proper design techniques are also presented. To demonstrate the functionality of these interface structures, test circuits were designed and fabricated in TSMC 0.35μ CMOS process. Also circuits to characterize the process mismatches were fabricated and tested. These results were then used in Matlab programs to aid in design process and to predict interface circuit's yields.

  18. Critique of Putnam's quantum logic

    NASA Astrophysics Data System (ADS)

    Bacciagaluppi, Guido

    1993-10-01

    Putnam gives a strongly realist account of quantum logic. This has been criticised as suggesting a hidden variable interpretation for quantum mechanics. Friedman and Glymour have done this in the framework of noncontextual hidden variable theories, which, however, does not fully represent Putnam's ideas. Here Putnam's approach to quantum logic is understood in terms of contextual truth-value assignments. The concept of a measurement is discussed. It follows that in order to reproduce quantum mechanical predictions a kind of disturbance is necessary, which is then analyzed. Finally, it is shown that the Putnam approach does not escape proofs of nonlocality, and thus shares, indeed, the unwelcome features of a hidden variable theory.

  19. Beam scanning binary logic

    NASA Astrophysics Data System (ADS)

    Itoh, Hideo; Mukai, Seiji; Watanabe, Masanobu; Mori, Masahiko; Yajima, Hiroyoshi

    1990-07-01

    A beam-scanning laser diode (BSLD) is presently applied to a novel optoelectronic logic operation, designated 'beam-scanning binary logic' (BSBL), that covers the implementation of both the basic logic gates and a spatial code encoder for photodetection, while allowing a greater reduction of the number of active devices than ordinary binary logic operations. BSBL executes multifunctional logic operations simultaneously. The data connections between logic gates in BSLD are flexible, due to the ability to electrically control both output power and laser-beam direction.

  20. Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

    NASA Astrophysics Data System (ADS)

    Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

    2017-04-01

    A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

  1. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  2. Digital Optical Circuit Technology

    NASA Technical Reports Server (NTRS)

    Dove, B. L. (Editor)

    1985-01-01

    The Proceedings for the 48th Meeting of the AGARD Avionics Panel contain the 18 papers presented a Technical Evaluation Report, and discussions that followed the presentations of papers. Seven papers were presented in the session devoted to optical bistability. Optical logic was addressed by three papers. The session on sources, modulators and demodulators presented three papers. Five papers were given in the final session on all optical systems. The purpose of this Specialists' Meeting was to present the research and development status of digital optical circuit technology and to examine its relevance in the broad context of digital processing, communication, radar, avionics and flight control systems implementation.

  3. A circuit design for multi-inputs stateful OR gate

    NASA Astrophysics Data System (ADS)

    Chen, Qiao; Wang, Xiaoping; Wan, Haibo; Yang, Ran; Zheng, Jian

    2016-09-01

    The in situ logic operation on memristor memory has attracted researchers' attention. In this brief, a new circuit structure that performs a stateful OR logic operation is proposed. When our OR logic is operated in series with other logic operations (IMP, AND), only two voltages should to be changed while three voltages are necessary in the previous one-step OR logic operation. In addition, this circuit structure can be extended to multi-inputs OR operation to perfect the family of logic operations on memristive memory in nanocrossbar based networks. The proposed OR gate can enable fast logic operation, reduce the number of required memristors and the sequential steps. Through analysis and simulation, the feasibility of OR operation is demonstrated and the appropriate parameters are obtained.

  4. Pattern recognition using linguistic fuzzy logic predictors

    NASA Astrophysics Data System (ADS)

    Habiballa, Hashim

    2016-06-01

    The problem of pattern recognition has been solved with numerous methods in the Artificial Intelligence field. We present an unconventional method based on Lingustic Fuzzy Logic Forecaster which is primarily used for the task of time series analysis and prediction through logical deduction wtih linguistic variables. This method should be used not only to the time series prediction itself, but also for recognition of patterns in a signal with seasonal component.

  5. Fuzzy logic controller optimization

    DOEpatents

    Sepe, Jr., Raymond B; Miller, John Michael

    2004-03-23

    A method is provided for optimizing a rotating induction machine system fuzzy logic controller. The fuzzy logic controller has at least one input and at least one output. Each input accepts a machine system operating parameter. Each output produces at least one machine system control parameter. The fuzzy logic controller generates each output based on at least one input and on fuzzy logic decision parameters. Optimization begins by obtaining a set of data relating each control parameter to at least one operating parameter for each machine operating region. A model is constructed for each machine operating region based on the machine operating region data obtained. The fuzzy logic controller is simulated with at least one created model in a feedback loop from a fuzzy logic output to a fuzzy logic input. Fuzzy logic decision parameters are optimized based on the simulation.

  6. Chaos in Electronic Circuits: Nonlinear Time Series Analysis

    SciTech Connect

    Wheat, Jr., Robert M.

    2003-07-01

    Chaos in electronic circuits is a phenomenon that has been largely ignored by engineers, manufacturers, and researchers until the early 1990’s and the work of Chua, Matsumoto, and others. As the world becomes more dependent on electronic devices, the detrimental effects of non-normal operation of these devices becomes more significant. Developing a better understanding of the mechanisms involved in the chaotic behavior of electronic circuits is a logical step toward the prediction and prevention of any potentially catastrophic occurrence of this phenomenon. Also, a better understanding of chaotic behavior, in a general sense, could potentially lead to better accuracy in the prediction of natural events such as weather, volcanic activity, and earthquakes. As a first step in this improvement of understanding, and as part of the research being reported here, methods of computer modeling, identifying and analyzing, and producing chaotic behavior in simple electronic circuits have been developed. The computer models were developed using both the Alternative Transient Program (ATP) and Spice, the analysis techniques have been implemented using the C and C++ programming languages, and the chaotically behaving circuits developed using “off the shelf” electronic components.

  7. High-speed dynamic domino circuit implemented with gaas mesfets

    NASA Technical Reports Server (NTRS)

    Yang, Long (Inventor); Long, Stephen I. (Inventor)

    1990-01-01

    A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implementing the logic function. A pair of FETs are connected to provide an output inverter with two series diodes for level shift. A coupling capacitor may be employed with a further FET to provide level shifting required between the inverter and the logic circuit output terminal. These circuits may be cascaded to form a domino chain.

  8. Universal programmable logic gate and routing method

    NASA Technical Reports Server (NTRS)

    Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)

    2009-01-01

    An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

  9. Development of High Level Electrical Stress Failure Threshold and Prediction Model for Small Scale Junction Integrated Circuits

    DTIC Science & Technology

    1978-09-01

    Integrated Circuits i! By Hugh B . O’Denneil and Dante M. Tasca f ’.T ?• "Prepared byGeneral Electric Space Division . . Valley Forge Space Center...oHihLvElectrica Spc Division-ort Valele forg SpalScae Center nInerae II.~~~~S CONTROLLINR OFICRAMANNADRS b -/ 14 MONIT ORI GANIZEINC N AME & A NDOESf ADD fRESS...f10Cetr~~Offr) . SRCURIAY CLASSN . PROf ET TASK~pf HarnryDamon Labori SatorDiiesio ARE 6- WORK Unclassified AeP.i. Bo D 20783 SCiadlEDaULE110 16

  10. Design of a Ferroelectric Programmable Logic Gate Array

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Ho, Fat Duen

    2003-01-01

    A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

  11. Design of a Ferroelectric Programmable Logic Gate Array

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Ho, Fat Duen

    2003-01-01

    A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

  12. Online identification of lithium-ion battery parameters based on an improved equivalent-circuit model and its implementation on battery state-of-power prediction

    NASA Astrophysics Data System (ADS)

    Feng, Tianheng; Yang, Lin; Zhao, Xiaowei; Zhang, Huidong; Qiang, Jiaxi

    2015-05-01

    In battery management system (BMS), equivalent-circuit model (ECM) is commonly used to simulate battery dynamics. However, there always is a contradiction between model simplicity and accuracy. A simple model is usually unable to reflect all the dynamic effects of the battery, which may bring errors to parameter identification. A complex model, however, always has too many parameters to be identified and may have parameter divergence problem. This paper tries to solve this problem with a novel ECM by adding a moving average (MA) noise to the one resistor-capacity (RC) circuit model. It can accurately capture the battery dynamics and retain a simple topology. A recursive extended least squares (RELS) algorithm is applied to online identify the ECM parameters, which shows a high accuracy in the experiments. In addition, a battery state-of-power (SOP) prediction algorithm is derived based on the proposed ECM. It considers both the voltage and current limitations of the battery, and offers a two-level prediction of the battery peak power capabilities.

  13. Develop reusable and combinable designs for transcriptional logic gates.

    PubMed

    Zhan, Jian; Ding, Bo; Ma, Rui; Ma, Xiaoyu; Su, Xiaofeng; Zhao, Yun; Liu, Ziqing; Wu, Jiarui; Liu, Haiyan

    2010-07-13

    One limit on developing complex synthetic gene circuits is the lack of basic components such as transcriptional logic gates that can process combinatorial inputs. Here, we propose a strategy to construct such components based on reusable designs and convergent reengineering of well-studied natural systems. We demonstrated the strategy using variants of the transcription factor (TF) LacI and operator Olac that form specifically interacting pairs. Guided by a mathematical model derived from existing quantitative knowledge, rational designs of transcriptional NAND, NOR and NOT gates have been realized. The NAND gates have been designed based on direct protein-protein interactions in coupling with DNA looping. We demonstrated that the designs are reusable: a multiplex of logic devices can be readily created using the same designs but different combinations of sequence variants. The designed logic gates are combinable to form compound circuits: a demonstration logic circuit containing all three types of designed logic gates has been synthesized, and the circuit truthfully reproduces the pre-designed input-output logic relations.

  14. Scaling up digital circuit computation with DNA strand displacement cascades.

    PubMed

    Qian, Lulu; Winfree, Erik

    2011-06-03

    To construct sophisticated biochemical circuits from scratch, one needs to understand how simple the building blocks can be and how robustly such circuits can scale up. Using a simple DNA reaction mechanism based on a reversible strand displacement process, we experimentally demonstrated several digital logic circuits, culminating in a four-bit square-root circuit that comprises 130 DNA strands. These multilayer circuits include thresholding and catalysis within every logical operation to perform digital signal restoration, which enables fast and reliable function in large circuits with roughly constant switching time and linear signal propagation delays. The design naturally incorporates other crucial elements for large-scale circuitry, such as general debugging tools, parallel circuit preparation, and an abstraction hierarchy supported by an automated circuit compiler.

  15. Auto-programmable impulse neural circuits

    NASA Technical Reports Server (NTRS)

    Watula, D.; Meador, J.

    1990-01-01

    Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.

  16. Digital circuits for computer applications: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  17. A novel, efficient CNTFET Galois design as a basic ternary-valued logic field.

    PubMed

    Keshavarzian, Peiman; Mirzaee, Mahla Mohammad

    2012-01-01

    This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption.

  18. A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

    PubMed Central

    Keshavarzian, Peiman; Mirzaee, Mahla Mohammad

    2012-01-01

    This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption. PMID:24198492

  19. Symbolic model checking for sequential circuit verification

    NASA Astrophysics Data System (ADS)

    Burch, J. R.; Clarke, E. M.; Long, D. E.; McMillan, K. L.; Dill, D. L.

    1993-07-01

    The temporal logic model checking algorithm of Clarke, Emerson, and Sistla is modified to represent state graphs using binary decision diagrams (BDD's) and partitioned transition relations. Because this representation captures some of the regularity in the state space of circuits with data path logic, the authors are able to verify circuits with an extremely large number of states. This new technique is demonstrated on a synchronous pipelined design with approximately 5 x 10(exp 120) states. The model checking algorithm handles full CTL with fairness constraints. Consequently, the authors are able to express a number of important liveliness and fairness properties, which would otherwise not be expressible in CTL. Empirical results are given on the performance of the algorithm applied to both synchronous and asynchronous circuits with data path logic.

  20. Reversible logic for supercomputing.

    SciTech Connect

    DeBenedictis, Erik P.

    2005-05-01

    This paper is about making reversible logic a reality for supercomputing. Reversible logic offers a way to exceed certain basic limits on the performance of computers, yet a powerful case will have to be made to justify its substantial development expense. This paper explores the limits of current, irreversible logic for supercomputers, thus forming a threshold above which reversible logic is the only solution. Problems above this threshold are discussed, with the science and mitigation of global warming being discussed in detail. To further develop the idea of using reversible logic in supercomputing, a design for a 1 Zettaflops supercomputer as required for addressing global climate warming is presented. However, to create such a design requires deviations from the mainstream of both the software for climate simulation and research directions of reversible logic. These deviations provide direction on how to make reversible logic practical.

  1. Quantum circuits for qubit fusion

    DOE PAGES

    Moussa, Jonathan Edward

    2015-12-01

    In this article, we consider four-dimensional qudits as qubit pairs and their qudit Pauli operators as qubit Cli ord operators. This introduces a nesting, C21 C C42 C C23, where Cmn is the nth level of the m-dimensional qudit Cli ord hierarchy. If we can convert between logical qubits and qudits, then qudit Cli ord operators are qubit non-Cli ord operators. Conversion is achieved by qubit fusion and qudit fission using stabilizer circuits that consume a resource state. This resource is a fused qubit stabilizer state with a fault-tolerant state preparation using stabilizer circuits.

  2. Logic gates based on ion transistors.

    PubMed

    Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus

    2012-05-29

    Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits.

  3. Cerebellar tDCS Modulates Neural Circuits during Semantic Prediction: A Combined tDCS-fMRI Study.

    PubMed

    D'Mello, Anila M; Turkeltaub, Peter E; Stoodley, Catherine J

    2017-02-08

    It has been proposed that the cerebellum acquires internal models of mental processes that enable prediction, allowing for the optimization of behavior. In language, semantic prediction speeds speech production and comprehension. Right cerebellar lobules VI and VII (including Crus I/II) are engaged during a variety of language processes and are functionally connected with cerebral cortical language networks. Further, right posterolateral cerebellar neuromodulation modifies behavior during predictive language processing. These data are consistent with a role for the cerebellum in semantic processing and semantic prediction. We combined transcranial direct current stimulation (tDCS) and fMRI to assess the behavioral and neural consequences of cerebellar tDCS during a sentence completion task. Task-based and resting-state fMRI data were acquired in healthy human adults (n = 32; μ = 23.1 years) both before and after 20 min of 1.5 mA anodal (n = 18) or sham (n = 14) tDCS applied to the right posterolateral cerebellum. In the sentence completion task, the first four words of the sentence modulated the predictability of the final target word. In some sentences, the preceding context strongly predicted the target word, whereas other sentences were nonpredictive. Completion of predictive sentences increased activation in right Crus I/II of the cerebellum. Relative to sham tDCS, anodal tDCS increased activation in right Crus I/II during semantic prediction and enhanced resting-state functional connectivity between hubs of the reading/language networks. These results are consistent with a role for the right posterolateral cerebellum beyond motor aspects of language, and suggest that cerebellar internal models of linguistic stimuli support semantic prediction.SIGNIFICANCE STATEMENT Cerebellar involvement in language tasks and language networks is now well established, yet the specific cerebellar contribution to language processing remains unclear. It is thought that the

  4. Automated ILA design for synchronous sequential circuits

    NASA Technical Reports Server (NTRS)

    Liu, M. N.; Liu, K. Z.; Maki, G. K.; Whitaker, S. R.

    1991-01-01

    An iterative logic array (ILA) architecture for synchronous sequential circuits is presented. This technique utilizes linear algebra to produce the design equations. The ILA realization of synchronous sequential logic can be fully automated with a computer program. A programmable design procedure is proposed to fullfill the design task and layout generation. A software algorithm in the C language has been developed and tested to generate 1 micron CMOS layouts using the Hewlett-Packard FUNGEN module generator shell.

  5. Palladio: An Exploratory Environment for Circuit Design

    DTIC Science & Technology

    1983-06-01

    been Qpproved Spublic =.jo 3 0o’s; its ditni’buto i-.i•,• --’ 93-15882 THIS DOCUMENT IS BEST QUALITY AVAILABLE. THE COPY FURNISHED TO DTIC CONTAINED...behavior, functional performance, design quality (e.g., testability, understandability, robustness), and physical realizability. Circuit verification...format can accommodate behavior that transcends traditional logic modes for digital design. For example, the rule syntax permits Boolean logic control to

  6. MOS device and circuit design

    NASA Astrophysics Data System (ADS)

    McCarthy, O. J.

    This book provides a comprehensive treatment of MOS at device level ranging from the underlying physical principles through device characterization to static and dynamic logic configurations and analog circuit roles. The book is intended primarily as an undergraduate text for degree-level studies in electronic engineering. Attention is given to the chemical and engineering aspects of device fabrication, the threshold voltage in MOS transistors, current control in MOS transistors, static transfer characteristics and transient responses of MOS inverters, MOS processing variations, parameters and circuits for analog MOS, and digital logic and memory elements. Aspects of digital system design and implementation are investigated, an overview regarding conduction in semiconductors is provided, and a qualitative view concerning MOSFETs is presented.

  7. "Glitch Logic" and Applications to Computing and Information Security

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Katkoori, Srinivas

    2009-01-01

    This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

  8. "Glitch Logic" and Applications to Computing and Information Security

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Katkoori, Srinivas

    2009-01-01

    This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

  9. Logic Design Pathology and Space Flight Electronics

    NASA Technical Reports Server (NTRS)

    Katz, Richard; Barto, Rod L.; Erickson, K.

    1997-01-01

    Logic design errors have been observed in space flight missions and the final stages of ground test. The technologies used by designers and their design/analysis methodologies will be analyzed. This will give insight to the root causes of the failures. These technologies include discrete integrated circuit based systems, systems based on field and mask programmable logic, and the use computer aided engineering (CAE) systems. State-of-the-art (SOTA) design tools and methodologies will be analyzed with respect to high-reliability spacecraft design and potential pitfalls are discussed. Case studies of faults from large expensive programs to "smaller, faster, cheaper" missions will be used to explore the fundamental reasons for logic design problems.

  10. Plastic Logic quits e-reader market

    NASA Astrophysics Data System (ADS)

    Perks, Simon

    2012-07-01

    A UK firm spun out from the University of Cambridge that sought to be a world leader in flexible organic electronic circuits and displays has pulled out of the competitive e-reader market as it struggles to find a commercial outlet for its technology. Plastic Logic announced in May that it is to close its development facility in Mountain View, California, with the loss of around 40 jobs.

  11. Reliability concerns with logical constants in Xilinx FPGA designs

    SciTech Connect

    Quinn, Heather M; Graham, Paul; Morgan, Keith; Ostler, Patrick; Allen, Greg; Swift, Gary; Tseng, Chen W

    2009-01-01

    In Xilinx Field Programmable Gate Arrays logical constants, which ground unused inputs and provide constants for designs, are implemented in SEU-susceptible logic. In the past, these logical constants have been shown to cause the user circuit to output bad data and were not resetable through off-line rcconfiguration. In the more recent devices, logical constants are less problematic, though mitigation should still be considered for high reliability applications. In conclusion, we have presented a number of reliability concerns with logical constants in the Xilinx Virtex family. There are two main categories of logical constants: implicit and explicit logical constants. In all of the Virtex devices, the implicit logical constants are implemented using half latches, which in the most recent devices are several orders of magnitudes smaller than configuration bit cells. Explicit logical constants are implemented exclusively using constant LUTs in the Virtex-I and Virtex-II, and use a combination of constant LUTs and architectural posts to the ground plane in the Virtex-4. We have also presented mitigation methods and options for these devices. While SEUs in implicit and some types of explicit logical constants can cause data corrupt, the chance of failure from these components is now much smaller than it was in the Virtex-I device. Therefore, for many cases, mitigation might not be necessary, except under extremely high reliability situations.

  12. Asymptotic and numerical prediction of current-voltage curves for an organic bilayer solar cell under varying illumination and comparison to the Shockley equivalent circuit

    NASA Astrophysics Data System (ADS)

    Foster, J. M.; Kirkpatrick, J.; Richardson, G.

    2013-09-01

    In this study, a drift-diffusion model is used to derive the current-voltage curves of an organic bilayer solar cell consisting of slabs of electron acceptor and electron donor materials sandwiched together between current collectors. A simplified version of the standard drift-diffusion equations is employed in which minority carrier densities are neglected. This is justified by the large disparities in electron affinity and ionisation potential between the two materials. The resulting equations are solved (via both asymptotic and numerical techniques) in conjunction with (i) Ohmic boundary conditions on the contacts and (ii) an internal boundary condition, imposed on the interface between the two materials, that accounts for charge pair generation (resulting from the dissociation of excitons) and charge pair recombination. Current-voltage curves are calculated from the solution to this model as a function of the strength of the solar charge generation. In the physically relevant power generating regime, it is shown that these current-voltage curves are well-approximated by a Shockley equivalent circuit model. Furthermore, since our drift-diffusion model is predictive, it can be used to directly calculate equivalent circuit parameters from the material parameters of the device.

  13. Finite element model approach of a cylindrical lithium ion battery cell with a focus on minimization of the computational effort and short circuit prediction

    NASA Astrophysics Data System (ADS)

    Raffler, Marco; Sevarin, Alessio; Ellersdorfer, Christian; Heindl, Simon F.; Breitfuss, Christoph; Sinz, Wolfgang

    2017-08-01

    In this research, a parameterized beam-element-based mechanical modeling approach for cylindrical lithium ion batteries is developed. With the goal to use the cell model in entire vehicle crash simulations, focus of development is on minimizing the computational effort whilst simultaneously obtaining accurate mechanical behavior. The cylindrical cell shape is approximated by radial beams connected to each other in circumferential and longitudinal directions. The discrete beam formulation is used to define an anisotropic material behavior. An 18650 lithium ion cell model constructed in LS-Dyna is used to show the high degree of parameterization of the approach. A criterion which considers the positive pole deformation and the radial deformation of the cell is developed for short circuit prediction during simulation. An abuse testing program, consisting of radial crush, axial crush, and penetration is performed to evaluate the mechanical properties and internal short circuit behavior of a commercially available 18650 lithium cell. Additional 3-point-bending tests are performed to verify the approach objectively. By reducing the number of strength-related elements to 1600, a fast and accurate cell model can be created. Compared to typical cell models in technical literature, simulation time of a single cell load case can be reduced by approx. 90%.

  14. Closed circuit TV system automatically guides welding arc

    NASA Technical Reports Server (NTRS)

    Stephans, D. L.; Wall, W. A., Jr.

    1968-01-01

    Closed circuit television /CCTV/ system automatically guides a welding torch to position the welding arc accurately along weld seams. Digital counting and logic techniques incorporated in the control circuitry, ensure performance reliability.

  15. High level modelling and design of asynchronous interface logic

    NASA Astrophysics Data System (ADS)

    Yakovlev, A. V.; Koelmans, A. M.; Lavagno, L.

    1993-11-01

    The authors propose a new methodology to design asynchronous circuits that is divided in two stages: abstract synthesis and logic synthesis. The first state is carried out by refining an abstract model, based on logic predicates describing the correct input-output behavior of the circuit, into a labelled Petri net and then into a formalization of timing diagrams (the Signal Transition Graph). This refinement involves hierarchical decomposition of the initial implementation until its size can be handled by automated logic synthesis tools, as well as replacing symbolic events occurring on the input-output ports of the labelled Petri net with up and down transitions occurring on the input-output wires of a circuit implementation.

  16. Bridging faults in BiCMOS circuits

    NASA Technical Reports Server (NTRS)

    Menon, Sankaran M.; Malaiya, Yashwant K.; Jayasumana, Anura P.

    1993-01-01

    Combining the advantages of CMOS and bipolar, BiCMOS is emerging as a major technology for many high performance digital and mixed signal applications. Recent investigations revealed that bridging faults can be a major failure mode in IC's. Effects of bridging faults in BiCMOS circuits are presented. Bridging faults between logical units without feedback and logical units with feedback are considered. Several bridging faults can be detected by monitoring the power supply current (I(sub DDQ) monitoring). Effects of bridging faults and bridging resistance on output logic levels were examined along with their effects on noise immunity.

  17. LSI/VLSI (Large Scale Integration/Very Large Scale Integration) ion implanted GaAs (Gallium Arsenide) IC processing. Appendix B: Two-dimensional modeling of GaAs MESFET devices for integrated high-speed logic circuits

    NASA Astrophysics Data System (ADS)

    Zucca, R. R.; Kirkpatrick, C. G.; Asbeck, P. M.; Eisen, F. H.; Lee, C. P.

    1984-01-01

    This report summarizes the research carried out at North Carolina State University in support of the Rockwell International Program on LSI-VLSI Ion Implanted Planar GaAs IC Processing. The major thrust of the program at NCSU was to develop accurate computer models for analyzing the performance of short-channel GaAs MESFET devices as used in the Rockwell VLSI circuits. The modeling research is divided into three parts: (1) Two-dimensional finite difference simulation, (2) Two-dimensional Monte Carlo analysis, and (3) Analytical modeling. The intent was to use the two-dimensional analyses to give exact solutions to the device operation and to serve as a guide for developing a simpler, and less expensive, analytical model of sufficient accuracy to be valuable as a design aid and to study effects of parameter changes.

  18. Separation Logic and Concurrency

    NASA Astrophysics Data System (ADS)

    Bornat, Richard

    Concurrent separation logic is a development of Hoare logic adapted to deal with pointers and concurrency. Since its inception, it has been enhanced with a treatment of permissions to enable sharing of data between threads, and a treatment of variables as resource alongside heap cells as resource. An introduction to the logic is given with several examples of proofs, culminating in a treatment of Simpson's 4-slot algorithm, an instance of racy non-blocking concurrency.

  19. Optical Logic Gates

    NASA Technical Reports Server (NTRS)

    Du Fresne, E. R.; Dowler, W. L.

    1985-01-01

    Logic gates for light signals constructed from combinations of prisms, polarizing plates, and quarterwave plates. Optical logic gate performs elementary logic operation on light signals received along two optical fibers. Whether gate performs OR function or exclusive-OR function depends on orientation of analyzer. Nonbinary truth tables also obtained by rotating polarizer or analyzer to other positions or inserting other quarter-wave plates.

  20. Digital Holographic Logic

    NASA Technical Reports Server (NTRS)

    Preston, K., Jr.

    1972-01-01

    The characteristics of the holographic logic computer are discussed. The holographic operation is reviewed from the Fourier transform viewpoint, and the formation of holograms for use in performing digital logic are described. The operation of the computer with an experiment in which the binary identity function is calculated is discussed along with devices for achieving real-time performance. An application in pattern recognition using neighborhood logic is presented.

  1. Integrated-Circuit Controller For Brushless dc Motor

    NASA Technical Reports Server (NTRS)

    Le, Dong Tuan

    1994-01-01

    Generic circuit performs commutation-logic and power-switching functions for control of brushless dc motor. Controller includes commutation-logic and associated control circuitry, power supply, and inverters containing power transistors. Major advantages of controller are size, weight, and power consumption can be made less than other brushless-dc-motor controllers.

  2. Integrated-Circuit Controller For Brushless dc Motor

    NASA Technical Reports Server (NTRS)

    Le, Dong Tuan

    1994-01-01

    Generic circuit performs commutation-logic and power-switching functions for control of brushless dc motor. Controller includes commutation-logic and associated control circuitry, power supply, and inverters containing power transistors. Major advantages of controller are size, weight, and power consumption can be made less than other brushless-dc-motor controllers.

  3. Fuzzy Logic Engine

    NASA Technical Reports Server (NTRS)

    Howard, Ayanna

    2005-01-01

    The Fuzzy Logic Engine is a software package that enables users to embed fuzzy-logic modules into their application programs. Fuzzy logic is useful as a means of formulating human expert knowledge and translating it into software to solve problems. Fuzzy logic provides flexibility for modeling relationships between input and output information and is distinguished by its robustness with respect to noise and variations in system parameters. In addition, linguistic fuzzy sets and conditional statements allow systems to make decisions based on imprecise and incomplete information. The user of the Fuzzy Logic Engine need not be an expert in fuzzy logic: it suffices to have a basic understanding of how linguistic rules can be applied to the user's problem. The Fuzzy Logic Engine is divided into two modules: (1) a graphical-interface software tool for creating linguistic fuzzy sets and conditional statements and (2) a fuzzy-logic software library for embedding fuzzy processing capability into current application programs. The graphical- interface tool was developed using the Tcl/Tk programming language. The fuzzy-logic software library was written in the C programming language.

  4. A realistic large-scale model of the cerebellum granular layer predicts circuit spatio-temporal filtering properties.

    PubMed

    Solinas, Sergio; Nieus, Thierry; D'Angelo, Egidio

    2010-01-01

    The way the cerebellar granular layer transforms incoming mossy fiber signals into new spike patterns to be related to Purkinje cells is not yet clear. Here, a realistic computational model of the granular layer was developed and used to address four main functional hypotheses: center-surround organization, time-windowing, high-pass filtering in responses to spike bursts and coherent oscillations in response to diffuse random activity. The model network was activated using patterns inspired by those recorded in vivo. Burst stimulation of a small mossy fiber bundle resulted in granule cell bursts delimited in time (time windowing) and space (center-surround) by network inhibition. This burst-burst transmission showed marked frequency-dependence configuring a high-pass filter with cut-off frequency around 100 Hz. The contrast between center and surround properties was regulated by the excitatory-inhibitory balance. The stronger excitation made the center more responsive to 10-50 Hz input frequencies and enhanced the granule cell output (with spikes occurring earlier and with higher frequency and number) compared to the surround. Finally, over a certain level of mossy fiber background activity, the circuit generated coherent oscillations in the theta-frequency band. All these processes were fine-tuned by NMDA and GABA-A receptor activation and neurotransmitter vesicle cycling in the cerebellar glomeruli. This model shows that available knowledge on cellular mechanisms is sufficient to unify the main functional hypotheses on the cerebellum granular layer and suggests that this network can behave as an adaptable spatio-temporal filter coordinated by theta-frequency oscillations.

  5. Partition algebraic design of asynchronous sequential circuits

    NASA Technical Reports Server (NTRS)

    Maki, Gary K.; Chen, Kristen Q.; Gopalakrishnan, Suresh K.

    1993-01-01

    Tracey's Theorem has long been recognized as essential in generating state assignments for asynchronous sequential circuits. This paper shows that partitioning variables derived from Tracey's Theorem also has a significant impact in generating the design equations. Moreover, this theorem is important to the fundamental understanding of asynchronous sequential operation. The results of this work simplify asynchronous logic design. Moreover, detection of safe circuits is made easier.

  6. Novel Quaternary Quantum Decoder, Multiplexer and Demultiplexer Circuits

    NASA Astrophysics Data System (ADS)

    Haghparast, Majid; Monfared, Asma Taheri

    2017-05-01

    Multiple valued logic is a promising approach to reduce the width of the reversible or quantum circuits, moreover, quaternary logic is considered as being a good choice for future quantum computing technology hence it is very suitable for the encoded realization of binary logic functions through its grouping of 2-bits together into quaternary values. The Quaternary decoder, multiplexer, and demultiplexer are essential units of quaternary digital systems. In this paper, we have initially designed a quantum realization of the quaternary decoder circuit using quaternary 1-qudit gates and quaternary Muthukrishnan-Stroud gates. Then we have presented quantum realization of quaternary multiplexer and demultiplexer circuits using the constructed quaternary decoder circuit and quaternary controlled Feynman gates. The suggested circuits in this paper have a lower quantum cost and hardware complexity than the existing designs that are currently used in quaternary digital systems. All the scales applied in this paper are based on Nanometric area.

  7. Novel Quaternary Quantum Decoder, Multiplexer and Demultiplexer Circuits

    NASA Astrophysics Data System (ADS)

    Haghparast, Majid; Monfared, Asma Taheri

    2017-02-01

    Multiple valued logic is a promising approach to reduce the width of the reversible or quantum circuits, moreover, quaternary logic is considered as being a good choice for future quantum computing technology hence it is very suitable for the encoded realization of binary logic functions through its grouping of 2-bits together into quaternary values. The Quaternary decoder, multiplexer, and demultiplexer are essential units of quaternary digital systems. In this paper, we have initially designed a quantum realization of the quaternary decoder circuit using quaternary 1-qudit gates and quaternary Muthukrishnan-Stroud gates. Then we have presented quantum realization of quaternary multiplexer and demultiplexer circuits using the constructed quaternary decoder circuit and quaternary controlled Feynman gates. The suggested circuits in this paper have a lower quantum cost and hardware complexity than the existing designs that are currently used in quaternary digital systems. All the scales applied in this paper are based on Nanometric area.

  8. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  9. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  10. Optical Circuit Switched Protocol

    NASA Technical Reports Server (NTRS)

    Monacos, Steve P. (Inventor)

    2000-01-01

    The present invention is a system and method embodied in an optical circuit switched protocol for the transmission of data through a network. The optical circuit switched protocol is an all-optical circuit switched network and includes novel optical switching nodes for transmitting optical data packets within a network. Each optical switching node comprises a detector for receiving the header, header detection logic for translating the header into routing information and eliminating the header, and a controller for receiving the routing information and configuring an all optical path within the node. The all optical path located within the node is solely an optical path without having electronic storage of the data and without having optical delay of the data. Since electronic storage of the header is not necessary and the initial header is eliminated by the first detector of the first switching node. multiple identical headers are sent throughout the network so that subsequent switching nodes can receive and read the header for setting up an optical data path.

  11. Batch fabrication process development for ferrite logic conductors

    NASA Technical Reports Server (NTRS)

    Heckler, C. H., Jr.; Bhiwandker, N. C.

    1972-01-01

    A process for fabricating ultrareliable magnetic ferrite logic circuits is described in which the conductors are formed by a combination of two batch type processes - photolithography and electroplating - and a mechanized writing process for completing conductors in the third dimension. Up to 4 turns, through an aperture 1 mm in diameter, are formed by the described process. The number of joints in the conductors is reduced by use of this process to only those which are required for input, output and power connections of a logic block. To demonstrate feasibility, 8-stage magnetic ring counter circuits have been fabricated.

  12. Photonic encryption using all optical logic.

    SciTech Connect

    Blansett, Ethan L.; Schroeppel, Richard Crabtree; Tang, Jason D.; Robertson, Perry J.; Vawter, Gregory Allen; Tarman, Thomas David; Pierson, Lyndon George

    2003-12-01

    With the build-out of large transport networks utilizing optical technologies, more and more capacity is being made available. Innovations in Dense Wave Division Multiplexing (DWDM) and the elimination of optical-electrical-optical conversions have brought on advances in communication speeds as we move into 10 Gigabit Ethernet and above. Of course, there is a need to encrypt data on these optical links as the data traverses public and private network backbones. Unfortunately, as the communications infrastructure becomes increasingly optical, advances in encryption (done electronically) have failed to keep up. This project examines the use of optical logic for implementing encryption in the photonic domain to achieve the requisite encryption rates. In order to realize photonic encryption designs, technology developed for electrical logic circuits must be translated to the photonic regime. This paper examines two classes of all optical logic (SEED, gain competition) and how each discrete logic element can be interconnected and cascaded to form an optical circuit. Because there is no known software that can model these devices at a circuit level, the functionality of the SEED and gain competition devices in an optical circuit were modeled in PSpice. PSpice allows modeling of the macro characteristics of the devices in context of a logic element as opposed to device level computational modeling. By representing light intensity as voltage, 'black box' models are generated that accurately represent the intensity response and logic levels in both technologies. By modeling the behavior at the systems level, one can incorporate systems design tools and a simulation environment to aid in the overall functional design. Each black box model of the SEED or gain competition device takes certain parameters (reflectance, intensity, input response), and models the optical ripple and time delay characteristics. These 'black box' models are interconnected and cascaded in an

  13. Uncertainty, energy, and multiple-valued logics

    SciTech Connect

    Hayes, J.P.

    1986-02-01

    The multiple-valued logics obtained by introducing uncertainty and energy considerations into classical switching theory are studied in this paper. First, the nature of uncertain or unknown signals is examined, and two general uncertainty types called U-values and P-values are identified. It is shown that multiple-valued logics composed of U/P-values can be systematically derived from 2-valued Boolean algebra. These are useful for timing and hazard analysis, and provide a rigorous framework for designing gate-level logic simulation programs. Next, signals of the form (..nu..,S) are considered where ..nu.. and S denote logic level and strength, respectively, and the product vs corresponds to energy flow or power. It is shown that these signals from a type of lattice called a Pseudo-Boolean algebra. Such algebras characterize the behavior of digital circuits at a level (the switch level) intermediate between the conventional analog and logical levels. They provide the mathematical basis for an efficient new class of switch-level simulation programs used in MOS VLSI design.

  14. Fast-spiking GABA circuit dynamics in the auditory cortex predict recovery of sensory processing following peripheral nerve damage.

    PubMed

    Resnik, Jennifer; Polley, Daniel B

    2017-03-21

    Cortical neurons remap their receptive fields and rescale sensitivity to spared peripheral inputs following sensory nerve damage. To address how these plasticity processes are coordinated over the course of functional recovery, we tracked receptive field reorganization, spontaneous activity, and response gain from individual principal neurons in the adult mouse auditory cortex over a 50-day period surrounding either moderate or massive auditory nerve damage. We related the day-by-day recovery of sound processing to dynamic changes in the strength of intracortical inhibition from parvalbumin-expressing (PV) inhibitory neurons. Whereas the status of brainstem-evoked potentials did not predict the recovery of sensory responses to surviving nerve fibers, homeostatic adjustments in PV-mediated inhibition during the first days following injury could predict the eventual recovery of cortical sound processing weeks later. These findings underscore the potential importance of self-regulated inhibitory dynamics for the restoration of sensory processing in excitatory neurons following peripheral nerve injuries.

  15. Principles of Intelligence: On Evolutionary Logic of the Brain.

    PubMed

    Tsien, Joe Z

    2015-01-01

    Humans and animals may encounter numerous events, objects, scenes, foods and countless social interactions in a lifetime. This means that the brain is constructed by evolution to deal with uncertainties and various possibilities. What is the architectural abstraction of intelligence that enables the brain to discover various possible patterns and knowledge about complex, evolving worlds? Here, I discuss the Theory of Connectivity-a "power-of-two" based, operational principle that can serve as a unified wiring and computational logic for organizing and constructing cell assemblies into the microcircuit-level building block, termed as functional connectivity motif (FCM). Defined by the power-of-two based equation, N = 2 (i) -1, each FCM consists of the principal projection neuron cliques (N), ranging from those specific cliques receiving specific information inputs (i) to those general and sub-general cliques receiving various combinatorial convergent inputs. As the evolutionarily conserved logic, its validation requires experimental demonstrations of the following three major properties: (1) Anatomical prevalence-FCMs are prevalent across neural circuits, regardless of gross anatomical shapes; (2) Species conservancy-FCMs are conserved across different animal species; and (3) Cognitive universality-FCMs serve as a universal computational logic at the cell assembly level for processing a variety of cognitive experiences and flexible behaviors. More importantly, this Theory of Connectivity further predicts that the specific-to-general combinatorial connectivity pattern within FCMs should be preconfigured by evolution, and emerge innately from development as the brain's computational primitives. This proposed design-principle can also explain the general purpose of the layered cortex and serves as its core computational algorithm.

  16. Principles of Intelligence: On Evolutionary Logic of the Brain

    PubMed Central

    Tsien, Joe Z.

    2016-01-01

    Humans and animals may encounter numerous events, objects, scenes, foods and countless social interactions in a lifetime. This means that the brain is constructed by evolution to deal with uncertainties and various possibilities. What is the architectural abstraction of intelligence that enables the brain to discover various possible patterns and knowledge about complex, evolving worlds? Here, I discuss the Theory of Connectivity–a “power-of-two” based, operational principle that can serve as a unified wiring and computational logic for organizing and constructing cell assemblies into the microcircuit-level building block, termed as functional connectivity motif (FCM). Defined by the power-of-two based equation, N = 2i−1, each FCM consists of the principal projection neuron cliques (N), ranging from those specific cliques receiving specific information inputs (i) to those general and sub-general cliques receiving various combinatorial convergent inputs. As the evolutionarily conserved logic, its validation requires experimental demonstrations of the following three major properties: (1) Anatomical prevalence—FCMs are prevalent across neural circuits, regardless of gross anatomical shapes; (2) Species conservancy—FCMs are conserved across different animal species; and (3) Cognitive universality—FCMs serve as a universal computational logic at the cell assembly level for processing a variety of cognitive experiences and flexible behaviors. More importantly, this Theory of Connectivity further predicts that the specific-to-general combinatorial connectivity pattern within FCMs should be preconfigured by evolution, and emerge innately from development as the brain’s computational primitives. This proposed design-principle can also explain the general purpose of the layered cortex and serves as its core computational algorithm. PMID:26869892

  17. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  18. Optimized 4-bit Quantum Reversible Arithmetic Logic Unit

    NASA Astrophysics Data System (ADS)

    Ayyoub, Slimani; Achour, Benslama

    2017-08-01

    Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.

  19. Three-Function Logic Gate Controlled by Analog Voltage

    NASA Technical Reports Server (NTRS)

    Zebulum, Ricardo; Stoica, Adrian

    2006-01-01

    The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that performs one of three different logic functions, depending on the level of an externally applied control voltage, V(sub sel). Specifically, the circuit acts as A NAND gate at V(sub sel) = 0.0 V, A wire (the output equals one of the inputs) at V(sub sel) = 1.0 V, or An AND gate at V(sub sel) = -1.8 V. [The nominal power-supply potential (VDD) and logic "1" potential of this circuit is 1.8 V.] Like other multifunctional circuits described in several prior NASA Tech Briefs articles, this circuit was synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. An evolved circuit can be tested by computational simulation and/or tested in real hardware, and the results of the test can provide guidance for refining the design through further iteration. The evolutionary synthesis of electronic circuits can now be implemented by means of a software package Genetic Algorithms for Circuit Synthesis (GACS) that was developed specifically for this purpose. GACS was used to synthesize the present trifunctional circuit. As in the cases of other multifunctional circuits described in several prior NASA Tech Briefs articles, the multiple functionality of this circuit, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis all contribute synergistically to a combination of features that are potentially advantageous for the further development of robust, multiple-function logic circuits, including, especially, field-programmable gate arrays (FPGAs). These advantages include the following: This circuit contains only 9 transistors about half the number of transistors that would be needed to obtain equivalent NAND/wire/AND functionality by use of components from a standard digital design library. If

  20. Impact of river stage prediction methods on stream-aquifer exchanges in a hydro(geo)logical model at the regional scale

    NASA Astrophysics Data System (ADS)

    Saleh, F.; Flipo, N.; de Fouquet, C.

    2012-04-01

    The main objective of this study is to provide a realistic simulation of river stage in regional river networks in order to improve the quantification of stream-aquifer exchanges and better assess the associated aquifer responses that are often impacted by the magnitude and the frequency of the river stage fluctuations. The study focuses on the Oise basin (17 000 km2, part of the 65 000 km2 Seine basin in Northern France) where stream-aquifer exchanges cannot be assessed directly by experimental methods. Nowadays numerical methods are the most appropriate approaches for assessing stream-aquifer exchanges at this scale. A regional distributed process-based hydro(geo)logical model, Eau-Dyssée, is used, which aims at the integrated modeling of the hydrosystem to manage the various elements involved in the quantitative and qualitative aspects of water resources. Eau-Dyssée simulates pseudo 3D flow in aquifer systems solving the diffusivity equation with a finite difference numerical scheme. River flow is simulated with a Muskingum model. In addition to the in-stream discharge, a river stage estimate is needed to calculate the water exchange at the stream-aquifer interface using the Darcy law. Three methods for assessing in-stream river stages are explored to determine the most appropriate representation at regional scale over 25 years (1980-2005). The first method consists in defining rating curves for each cell of a 1D Saint-Venant hydraulic model. The second method consists in interpolating observed rating curves (at gauging stations) onto the river cells of the hydro(geo)logical model. The interpolation technique is based on geostatistics. The last method assesses river stage using Manning equation with a simplified rectangular cross-section (water depth equals the hydraulic radius). Compared to observations, the geostatistical and the Manning methodologies lead to slightly less accurate (but still acceptable) results offering a low computational cost opportunity

  1. Identifying Logical Necessity

    ERIC Educational Resources Information Center

    Yopp, David

    2010-01-01

    Understanding logical necessity is an important component of proof and reasoning for teachers of grades K-8. The ability to determine exactly where young students' arguments are faulty offers teachers the chance to give youngsters feedback as they progress toward writing mathematically valid deductive proofs. As defined, logical necessity is the…

  2. Programmable Logic Controllers.

    ERIC Educational Resources Information Center

    Insolia, Gerard; Anderson, Kathleen

    This document contains a 40-hour course in programmable logic controllers (PLC), developed for a business-industry technology resource center for firms in eastern Pennsylvania by Northampton Community College. The 10 units of the course cover the following: (1) introduction to programmable logic controllers; (2) DOS primer; (3) prerequisite…

  3. Logic via Computer Programming.

    ERIC Educational Resources Information Center

    Wieschenberg, Agnes A.

    This paper proposed the question "How do we teach logical thinking and sophisticated mathematics to unsophisticated college students?" One answer among many is through the writing of computer programs. The writing of computer algorithms is mathematical problem solving and logic in disguise and it may attract students who would otherwise stop…

  4. AROUSAL AND LOGICAL INFERENCE.

    ERIC Educational Resources Information Center

    KOEN, FRANK

    THE PURPOSE OF THE EXPERIMENT WAS TO DETERMINE THE DEGREE TO WHICH PHYSIOLOGICAL AROUSAL, AS INDEXED BY THE GRASON STADLER TYPE OPERANT CONDITIONING APPARATUS (GSR), IS RELATED TO THE ACCURACY OF LOGICAL REASONING. THE STIMULI WERE 12 SYLLOGISMS, THREE OF EACH OF FOUR DIFFERENT LOGICAL FORMS. THE 14 SUBJECTS (SS) INDICATED THEIR AGREEMENT OR…

  5. Logic Programming: PROLOG.

    ERIC Educational Resources Information Center

    Lopez, Antonio M., Jr.

    1989-01-01

    Provides background material on logic programing and presents PROLOG as a high-level artificial intelligence programing language that borrows its basic constructs from logic. Suggests the language is one which will help the educator to achieve various goals, particularly the promotion of problem solving ability. (MVL)

  6. Logic reversibility and thermodynamic irreversibility demonstrated by DNAzyme-based Toffoli and Fredkin logic gates.

    PubMed

    Orbach, Ron; Remacle, Françoise; Levine, R D; Willner, Itamar

    2012-12-26

    The Toffoli and Fredkin gates were suggested as a means to exhibit logic reversibility and thereby reduce energy dissipation associated with logic operations in dense computing circuits. We present a construction of the logically reversible Toffoli and Fredkin gates by implementing a library of predesigned Mg(2+)-dependent DNAzymes and their respective substrates. Although the logical reversibility, for which each set of inputs uniquely correlates to a set of outputs, is demonstrated, the systems manifest thermodynamic irreversibility originating from two quite distinct and nonrelated phenomena. (i) The physical readout of the gates is by fluorescence that depletes the population of the final state of the machine. This irreversible, heat-releasing process is needed for the generation of the output. (ii) The DNAzyme-powered logic gates are made to operate at a finite rate by invoking downhill energy-releasing processes. Even though the three bits of Toffoli's and Fredkin's logically reversible gates manifest thermodynamic irreversibility, we suggest that these gates could have important practical implication in future nanomedicine.

  7. Logic reversibility and thermodynamic irreversibility demonstrated by DNAzyme-based Toffoli and Fredkin logic gates

    PubMed Central

    Orbach, Ron; Remacle, Françoise; Levine, R. D.; Willner, Itamar

    2012-01-01

    The Toffoli and Fredkin gates were suggested as a means to exhibit logic reversibility and thereby reduce energy dissipation associated with logic operations in dense computing circuits. We present a construction of the logically reversible Toffoli and Fredkin gates by implementing a library of predesigned Mg2+-dependent DNAzymes and their respective substrates. Although the logical reversibility, for which each set of inputs uniquely correlates to a set of outputs, is demonstrated, the systems manifest thermodynamic irreversibility originating from two quite distinct and nonrelated phenomena. (i) The physical readout of the gates is by fluorescence that depletes the population of the final state of the machine. This irreversible, heat-releasing process is needed for the generation of the output. (ii) The DNAzyme-powered logic gates are made to operate at a finite rate by invoking downhill energy-releasing processes. Even though the three bits of Toffoli’s and Fredkin’s logically reversible gates manifest thermodynamic irreversibility, we suggest that these gates could have important practical implication in future nanomedicine. PMID:23236131

  8. Predictive lethal proarrhythmic risk evaluation using a closed-loop-circuit cell network with human induced pluripotent stem cells derived cardiomyocytes

    NASA Astrophysics Data System (ADS)

    Nomura, Fumimasa; Hattori, Akihiro; Terazono, Hideyuki; Kim, Hyonchol; Odaka, Masao; Sugio, Yoshihiro; Yasuda, Kenji

    2016-06-01

    For the prediction of lethal arrhythmia occurrence caused by abnormality of cell-to-cell conduction, we have developed a next-generation in vitro cell-to-cell conduction assay, i.e., a quasi in vivo assay, in which the change in spatial cell-to-cell conduction is quantitatively evaluated from the change in waveforms of the convoluted electrophysiological signals from lined-up cardiomyocytes on a single closed loop of a microelectrode of 1 mm diameter and 20 µm width in a cultivation chip. To evaluate the importance of the closed-loop arrangement of cardiomyocytes for prediction, we compared the change in waveforms of convoluted signals of the responses in the closed-loop circuit arrangement with that of the response of cardiomyocyte clusters using a typical human ether a go-go related gene (hERG) ion channel blocker, E-4031. The results showed that (1) waveform prolongation and fluctuation both in the closed loops and clusters increased depending on the E-4031 concentration increase. However, (2) only the waveform signals in closed loops showed an apparent temporal change in waveforms from ventricular tachycardia (VT) to ventricular fibrillation (VF), which is similar to the most typical cell-to-cell conductance abnormality. The results indicated the usefulness of convoluted waveform signals of a closed-loop cell network for acquiring reproducible results acquisition and more detailed temporal information on cell-to-cell conduction.

  9. Microelectromechanical reprogrammable logic device

    PubMed Central

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-01-01

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme. PMID:27021295

  10. Amplifying genetic logic gates.

    PubMed

    Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew

    2013-05-03

    Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.

  11. Microelectromechanical reprogrammable logic device

    NASA Astrophysics Data System (ADS)

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-03-01

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme.

  12. Fast-spiking GABA circuit dynamics in the auditory cortex predict recovery of sensory processing following peripheral nerve damage

    PubMed Central

    Resnik, Jennifer; Polley, Daniel B

    2017-01-01

    Cortical neurons remap their receptive fields and rescale sensitivity to spared peripheral inputs following sensory nerve damage. To address how these plasticity processes are coordinated over the course of functional recovery, we tracked receptive field reorganization, spontaneous activity, and response gain from individual principal neurons in the adult mouse auditory cortex over a 50-day period surrounding either moderate or massive auditory nerve damage. We related the day-by-day recovery of sound processing to dynamic changes in the strength of intracortical inhibition from parvalbumin-expressing (PV) inhibitory neurons. Whereas the status of brainstem-evoked potentials did not predict the recovery of sensory responses to surviving nerve fibers, homeostatic adjustments in PV-mediated inhibition during the first days following injury could predict the eventual recovery of cortical sound processing weeks later. These findings underscore the potential importance of self-regulated inhibitory dynamics for the restoration of sensory processing in excitatory neurons following peripheral nerve injuries. DOI: http://dx.doi.org/10.7554/eLife.21452.001 PMID:28323619

  13. Surface-confined assemblies and polymers for molecular logic.

    PubMed

    de Ruiter, Graham; van der Boom, Milko E

    2011-08-16

    Stimuli responsive materials are capable of mimicking the operation characteristics of logic gates such as AND, OR, NOR, and even flip-flops. Since the development of molecular sensors and the introduction of the first AND gate in solution by de Silva in 1993, Molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. In this Account, we present recent research activities that focus on MBLC with electrochromic polymers and metal polypyridyl complexes on a solid support. Metal polypyridyl complexes act as useful sensors to a variety of analytes in solution (i.e., H(2)O, Fe(2+/3+), Cr(6+), NO(+)) and in the gas phase (NO(x) in air). This information transfer, whether the analyte is present, is based on the reversible redox chemistry of the metal complexes, which are stable up to 200 °C in air. The concurrent changes in the optical properties are nondestructive and fast. In such a setup, the input is directly related to the output and, therefore, can be represented by one-input logic gates. These input-output relationships are extendable for mimicking the diverse functions of essential molecular logic gates and circuits within a set of Boolean algebraic operations. Such a molecular approach towards Boolean logic has yielded a series of proof-of-concept devices: logic gates, multiplexers, half-adders, and flip-flop logic circuits. MBLC is a versatile and, potentially, a parallel approach to silicon circuits: assemblies of these molecular gates can perform a wide variety of logic tasks through reconfiguration of their inputs. Although these developments do not require a semiconductor blueprint, similar guidelines such as signal propagation, gate-to-gate communication, propagation delay, and combinatorial and sequential logic will play a critical role in allowing this field to mature. For instance, gate-to-gate communication by chemical wiring of the gates with metal ions as electron carriers results in the integration of stand-alone systems: the

  14. Regulatory Conformance Checking: Logic and Logical Form

    ERIC Educational Resources Information Center

    Dinesh, Nikhil

    2010-01-01

    We consider the problem of checking whether an organization conforms to a body of regulation. Conformance is studied in a runtime verification setting. The regulation is translated to a logic, from which we synthesize monitors. The monitors are evaluated as the state of an organization evolves over time, raising an alarm if a violation is…

  15. Regulatory Conformance Checking: Logic and Logical Form

    ERIC Educational Resources Information Center

    Dinesh, Nikhil

    2010-01-01

    We consider the problem of checking whether an organization conforms to a body of regulation. Conformance is studied in a runtime verification setting. The regulation is translated to a logic, from which we synthesize monitors. The monitors are evaluated as the state of an organization evolves over time, raising an alarm if a violation is…

  16. Logic-controlled solid state switchgear for 270 volts dc

    NASA Technical Reports Server (NTRS)

    Sundberg, G. R.; Waddington, D.; Buchanan, E. E., Jr.

    1973-01-01

    A feasibility study to design and demonstrate solid state switchgear in the form of circuit breakers and a power transfer switch is described. The switchgear operates on a nominal 270 V dc circuit and controls power to a load of up to 15 amperes. One circuit breaker may be interconnected to a second breaker to form a power transfer switch. On-off and transfer functions of the breakers or the transfer switch are remotely controlled. A number of reclosures with variable time delay between tripout and reclosure are programmed and controlled by integrated analog and COSMOS logic circuits. A unique commutation circuit, that generates only minimal transient disturbance to either source or load, was developed to interrupt current flow through the main SCR switching element. Laboratory tests demonstrated performance of the solid state circuit breakers over specified voltage and temperature ranges.

  17. Test results for SEU and SEL immune memory circuits

    NASA Technical Reports Server (NTRS)

    Wiseman, D.; Canaris, J.; Whitaker, S.; Gambles, J.; Arave, K.; Arave, L.

    1993-01-01

    Test results for three SEU logic/circuit hardened CMOS memory circuits verify upset and latch-up immunity for two configurations to be in excess of 120 MeV cm(exp 2)/mg using a commercial, non-radiation hardened CMOS process. Test chips from three separate fabrication runs in two different process were evaluated.

  18. Computer circuit will fit on single silicon chip

    NASA Technical Reports Server (NTRS)

    Smith, C.

    1964-01-01

    A simplified computer logic circuit of two NAND/NOR gates and three additional inputs to accomplish the count and shift function is described. The circuit has capacity for parallel read-in, counting, serial shiftout, complement input and set and reset.

  19. Processing of Image Data by Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Armstrong, R. W.

    1985-01-01

    Sensors combined with logic and memory circuitry. Cross-correlation of two inputs accomplished by transversal filter. Position of image taken to point where image and template data yield maximum value correlation function. Circuit used for controlling robots, medical-image analysis, automatic vehicle guidance, and precise pointing of scientific cameras.

  20. Assigning functional meaning to digital circuits

    SciTech Connect

    Eckmann, S.T.; Chisholm, G.H.

    1997-07-01

    During computer-aided design, the problem of how to determine the logical function of a digital circuit arises in many contexts. For example, assigning functional meaning to a circuit is a fundamental operation in both reverse engineering and implementation validation. This report describes such a determination by discussing how a higher-level functional representation is constructed from a detailed circuit description (i.e., a gate-level netlist, which is a list of logic gates and their interconnections). The approach used involves transforming parts of the netlist into a functional representation and then manipulating this representation. Two types of functional representations are described: (1) a mathematical representation based on the logical operators ``exor`` and ``and`` and (2) a directed acyclic graph representation based on binary decision trees. Each representation provides a canonical form of the logical function being implemented (i.e., a form that is independent of implementation details). Such forms, however, have a well-known problem associated with the ordering of inputs: for each order, a unique form exists. A solution to this problem is given for both representations. Experimental results that demonstrate the use of these representations in the process of assigning functional meaning to a circuit are provided. The report also identifies and discusses issues critical to the performance required of this fundamental operation.