Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sancho Pitarch, Jose Carlos; Kerbyson, Darren; Lang, Mike

Increasing the core-count on current and future processors is posing critical challenges to the memory subsystem to efficiently handle concurrent memory requests. The current trend to cope with this challenge is to increase the number of memory channels available to the processor's memory controller. In this paper we investigate the effectiveness of this approach on the performance of parallel scientific applications. Specifically, we explore the trade-off between employing multiple memory channels per memory controller and the use of multiple memory controllers. Experiments conducted on two current state-of-the-art multicore processors, a 6-core AMD Istanbul and a 4-core Intel Nehalem-EP, for amore » wide range of production applications shows that there is a diminishing return when increasing the number of memory channels per memory controller. In addition, we show that this performance degradation can be efficiently addressed by increasing the ratio of memory controllers to channels while keeping the number of memory channels constant. Significant performance improvements can be achieved in this scheme, up to 28%, in the case of using two memory controllers with each with one channel compared with one controller with two memory channels.« less

General-purpose interface bus for multiuser, multitasking computer system

NASA Technical Reports Server (NTRS)

Generazio, Edward R.; Roth, Don J.; Stang, David B.

1990-01-01

The architecture of a multiuser, multitasking, virtual-memory computer system intended for the use by a medium-size research group is described. There are three central processing units (CPU) in the configuration, each with 16 MB memory, and two 474 MB hard disks attached. CPU 1 is designed for data analysis and contains an array processor for fast-Fourier transformations. In addition, CPU 1 shares display images viewed with the image processor. CPU 2 is designed for image analysis and display. CPU 3 is designed for data acquisition and contains 8 GPIB channels and an analog-to-digital conversion input/output interface with 16 channels. Up to 9 users can access the third CPU simultaneously for data acquisition. Focus is placed on the optimization of hardware interfaces and software, facilitating instrument control, data acquisition, and processing.

Flexible Peripheral Component Interconnect Input/Output Card

NASA Technical Reports Server (NTRS)

Bigelow, Kirk K.; Jerry, Albert L.; Baricio, Alisha G.; Cummings, Jon K.

2010-01-01

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

A highly symmetrical 10 transistor 2-read/write dual-port static random access memory bitcell design in 28 nm high-k/metal-gate planar bulk CMOS technology

NASA Astrophysics Data System (ADS)

Ishii, Yuichiro; Tanaka, Miki; Yabuuchi, Makoto; Sawada, Yohei; Tanaka, Shinji; Nii, Koji; Lu, Tien Yu; Huang, Chun Hsien; Sian Chen, Shou; Tse Kuo, Yu; Lung, Ching Cheng; Cheng, Osbert

2018-04-01

We propose a highly symmetrical 10 transistor (10T) 2-read/write (2RW) dual-port (DP) static random access memory (SRAM) bitcell in 28 nm high-k/metal-gate (HKMG) planar bulk CMOS. It replaces the conventional 8T 2RW DP SRAM bitcell without any area overhead. It significantly improves the robustness of process variations and an asymmetric issue between the true and bar bitline pairs. Measured data show that read current (I read) and read static noise margin (SNM) are respectively boosted by +20% and +15 mV by introducing the proposed bitcell with enlarged pull-down (PD) and pass-gate (PG) N-channel MOSs (NMOSs). The minimum operating voltage (V min) of the proposed 256 kbit 10T DP SRAM is 0.53 V in the TT process, 25 °C under the worst access condition with read/write disturbances, and improved by 90 mV (15%) compared with the conventional one.

Conduction Channel Formation and Dissolution Due to Oxygen Thermophoresis/Diffusion in Hafnium Oxide Memristors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kumar, Suhas; Wang, Ziwen; Huang, Xiaopeng

Due to the favorable operating power, endurance, speed, and density., transition-metal-oxide memristors, or resistive random-access memory (RRAM) switches, are under intense development for storage-class memory. Their commercial deployment critically depends on predictive compact models based on understanding nanoscale physiocochemical forces, which remains elusive and controversial owing to the difficulties in directly observing atomic motions during resistive switching, Here, using scanning transmission synchrotron X-ray spectromicroscopy to study in situ switching of hafnium oxide memristors, we directly observed the formation of a localized oxygen-deficiency-derived conductive channel surrounded by a low-conductivity ring of excess oxygen. Subsequent thermal annealing homogenized the segregated oxygen, resettingmore » the cells toward their as-grown resistance state. We show that the formation and dissolution of the conduction channel are successfully modeled by radial thermophoresis and Fick diffusion of oxygen atoms driven by Joule heating. This confirmation and quantification of two opposing nanoscale radial forces that affect bipolar memristor switching are important components for any future physics-based compact model for the electronic switching of these devices.« less

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

NASA Astrophysics Data System (ADS)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

Experimental entanglement of 25 individually accessible atomic quantum interfaces.

PubMed

Pu, Yunfei; Wu, Yukai; Jiang, Nan; Chang, Wei; Li, Chang; Zhang, Sheng; Duan, Luming

2018-04-01

A quantum interface links the stationary qubits in a quantum memory with flying photonic qubits in optical transmission channels and constitutes a critical element for the future quantum internet. Entanglement of quantum interfaces is an important step for the realization of quantum networks. Through heralded detection of photon interference, we generate multipartite entanglement between 25 (or 9) individually addressable quantum interfaces in a multiplexed atomic quantum memory array and confirm genuine 22-partite (or 9-partite) entanglement. This experimental entanglement of a record-high number of individually addressable quantum interfaces makes an important step toward the realization of quantum networks, long-distance quantum communication, and multipartite quantum information processing.

Enhanced dimension-specific visual working memory in grapheme–color synesthesia☆

PubMed Central

Terhune, Devin Blair; Wudarczyk, Olga Anna; Kochuparampil, Priya; Cohen Kadosh, Roi

2013-01-01

There is emerging evidence that the encoding of visual information and the maintenance of this information in a temporarily accessible state in working memory rely on the same neural mechanisms. A consequence of this overlap is that atypical forms of perception should influence working memory. We examined this by investigating whether having grapheme–color synesthesia, a condition characterized by the involuntary experience of color photisms when reading or representing graphemes, would confer benefits on working memory. Two competing hypotheses propose that superior memory in synesthesia results from information being coded in two information channels (dual-coding) or from superior dimension-specific visual processing (enhanced processing). We discriminated between these hypotheses in three n-back experiments in which controls and synesthetes viewed inducer and non-inducer graphemes and maintained color or grapheme information in working memory. Synesthetes displayed superior color working memory than controls for both grapheme types, whereas the two groups did not differ in grapheme working memory. Further analyses excluded the possibilities of enhanced working memory among synesthetes being due to greater color discrimination, stimulus color familiarity, or bidirectionality. These results reveal enhanced dimension-specific visual working memory in this population and supply further evidence for a close relationship between sensory processing and the maintenance of sensory information in working memory. PMID:23892185

Atomic memory access hardware implementations

DOEpatents

Ahn, Jung Ho; Erez, Mattan; Dally, William J

2015-02-17

Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.

I-V Characteristics of a Static Random Access Memory Cell Utilizing Ferroelectric Transistors

NASA Technical Reports Server (NTRS)

Laws, Crystal; Mitchell, Cody; Hunt, Mitchell; Ho, Fat D.; MacLeod, Todd C.

2012-01-01

I-V characteristics for FeFET different than that of MOSFET Ferroelectric layer features hysteresis trend whereas MOSFET behaves same for both increasing and decreasing VGS FeFET I-V characteristics doesn't show dependence on VDS A Transistor with different channel length and width as well as various resistance and input voltages give different results As resistance values increased, the magnitude of the drain current decreased.

Experimental entanglement of 25 individually accessible atomic quantum interfaces

PubMed Central

Jiang, Nan; Chang, Wei; Li, Chang; Zhang, Sheng

2018-01-01

A quantum interface links the stationary qubits in a quantum memory with flying photonic qubits in optical transmission channels and constitutes a critical element for the future quantum internet. Entanglement of quantum interfaces is an important step for the realization of quantum networks. Through heralded detection of photon interference, we generate multipartite entanglement between 25 (or 9) individually addressable quantum interfaces in a multiplexed atomic quantum memory array and confirm genuine 22-partite (or 9-partite) entanglement. This experimental entanglement of a record-high number of individually addressable quantum interfaces makes an important step toward the realization of quantum networks, long-distance quantum communication, and multipartite quantum information processing. PMID:29725621

Programmable data communications controller requirements

NASA Technical Reports Server (NTRS)

1977-01-01

The design requirements for a Programmable Data Communications Controller (PDCC) that reduces the difficulties in attaching data terminal equipment to a computer are presented. The PDCC is an interface between the computer I/O channel and the bit serial communication lines. Each communication line is supported by a communication port that handles all line control functions and performs most terminal control functions. The port is fabricated on a printed circuit board that plugs into a card chassis, mating with a connector that is joined to all other card stations by a data bus. Ports are individually programmable; each includes a microprocessor, a programmable read-only memory for instruction storage, and a random access memory for data storage.

Research on Optical Transmitter and Receiver Module Used for High-Speed Interconnection between CPU and Memory

NASA Astrophysics Data System (ADS)

He, Huimin; Liu, Fengman; Li, Baoxia; Xue, Haiyun; Wang, Haidong; Qiu, Delong; Zhou, Yunyan; Cao, Liqiang

2016-11-01

With the development of the multicore processor, the bandwidth and capacity of the memory, rather than the memory area, are the key factors in server performance. At present, however, the new architectures, such as fully buffered DIMM (FBDIMM), hybrid memory cube (HMC), and high bandwidth memory (HBM), cannot be commercially applied in the server. Therefore, a new architecture for the server is proposed. CPU and memory are separated onto different boards, and optical interconnection is used for the communication between them. Each optical module corresponds to each dual inline memory module (DIMM) with 64 channels. Compared to the previous technology, not only can the architecture realize high-capacity and wide-bandwidth memory, it also can reduce power consumption and cost, and be compatible with the existing dynamic random access memory (DRAM). In this article, the proposed module with system-in-package (SiP) integration is demonstrated. In the optical module, the silicon photonic chip is included, which is a promising technology to be applied in the next-generation data exchanging centers. And due to the bandwidth-distance performance of the optical interconnection, SerDes chips are introduced to convert the 64-bit data at 800 Mbps from/to 4-channel data at 12.8 Gbps after/before they are transmitted though optical fiber. All the devices are packaged on cheap organic substrates. To ensure the performance of the whole system, several optimization efforts have been performed on the two modules. High-speed interconnection traces have been designed and simulated with electromagnetic simulation software. Steady-state thermal characteristics of the transceiver module have been evaluated by ANSYS APLD based on finite-element methodology (FEM). Heat sinks are placed at the hotspot area to ensure the reliability of all working chips. Finally, this transceiver system based on silicon photonics is measured, and the eye diagrams of data and clock signals are verified.

Quantum-locked key distribution at nearly the classical capacity rate.

PubMed

Lupo, Cosmo; Lloyd, Seth

2014-10-17

Quantum data locking is a protocol that allows for a small secret key to (un)lock an exponentially larger amount of information, hence yielding the strongest violation of the classical one-time pad encryption in the quantum setting. This violation mirrors a large gap existing between two security criteria for quantum cryptography quantified by two entropic quantities: the Holevo information and the accessible information. We show that the latter becomes a sensible security criterion if an upper bound on the coherence time of the eavesdropper's quantum memory is known. Under this condition, we introduce a protocol for secret key generation through a memoryless qudit channel. For channels with enough symmetry, such as the d-dimensional erasure and depolarizing channels, this protocol allows secret key generation at an asymptotic rate as high as the classical capacity minus one bit.

Radiation evaluation study of LSI RAM technologies

NASA Astrophysics Data System (ADS)

Dinger, G. L.; Knoll, M. G.

1980-01-01

Five commercial LSI static random access memory technologies having a 1 kilobit capacity were radiation characterized. Arrays from the transistor-transistor-logic (TTL), Schottky TTL, n-channel metal oxide semiconductor, complementary metal oxide semiconductor (CMOS), and CMOS/silicon on sapphire families were evaluated. Radiation failure thresholds for gamma doserate logic upset, total gamma dose survivability, and neutron fluence survivability were determined. A brief analysis of the radiation failure mechanism for each of the logic families tested is included.

Enhanced dimension-specific visual working memory in grapheme-color synesthesia.

PubMed

Terhune, Devin Blair; Wudarczyk, Olga Anna; Kochuparampil, Priya; Cohen Kadosh, Roi

2013-10-01

There is emerging evidence that the encoding of visual information and the maintenance of this information in a temporarily accessible state in working memory rely on the same neural mechanisms. A consequence of this overlap is that atypical forms of perception should influence working memory. We examined this by investigating whether having grapheme-color synesthesia, a condition characterized by the involuntary experience of color photisms when reading or representing graphemes, would confer benefits on working memory. Two competing hypotheses propose that superior memory in synesthesia results from information being coded in two information channels (dual-coding) or from superior dimension-specific visual processing (enhanced processing). We discriminated between these hypotheses in three n-back experiments in which controls and synesthetes viewed inducer and non-inducer graphemes and maintained color or grapheme information in working memory. Synesthetes displayed superior color working memory than controls for both grapheme types, whereas the two groups did not differ in grapheme working memory. Further analyses excluded the possibilities of enhanced working memory among synesthetes being due to greater color discrimination, stimulus color familiarity, or bidirectionality. These results reveal enhanced dimension-specific visual working memory in this population and supply further evidence for a close relationship between sensory processing and the maintenance of sensory information in working memory. Copyright © 2013 The Authors. Published by Elsevier B.V. All rights reserved.

Capacity of a quantum memory channel correlated by matrix product states

NASA Astrophysics Data System (ADS)

Mulherkar, Jaideep; Sunitha, V.

2018-04-01

We study the capacity of a quantum channel where channel acts like controlled phase gate with the control being provided by a one-dimensional quantum spin chain environment. Due to the correlations in the spin chain, we get a quantum channel with memory. We derive formulas for the quantum capacity of this channel when the spin state is a matrix product state. Particularly, we derive exact formulas for the capacity of the quantum memory channel when the environment state is the ground state of the AKLT model and the Majumdar-Ghosh model. We find that the behavior of the capacity for the range of the parameters is analytic.

Efficient Synthesis of Graph Methods: a Dynamically Scheduled Architecture

DOE Office of Scientific and Technical Information (OSTI.GOV)

Minutoli, Marco; Castellana, Vito G.; Tumeo, Antonino

RDF databases naturally map to a graph representation and employ languages, such as SPARQL, that implements queries as graph pattern matching routines. Graph methods exhibit an irregular behavior: they present unpredictable, fine-grained data accesses, and are synchronization inten- sive. Graph data structures expose large amounts of dy- namic parallelism, but are difficult to partition without gen- erating load unbalance. In this paper, we present a novel ar- chitecture to improve the synthesis of graph methods. Our design addresses the issues of these algorithms with two com- ponents: a Dynamic Task Scheduler (DTS), which reduces load unbalance and maximize resource utilization,more » and a Hi- erarchical Memory Interface controller (HMI), which pro- vides support for concurrent memory operations on multi- ported/multi-banked shared memories. We evaluate our ap- proach by generating the accelerators for a set of SPARQL queries from the Lehigh University Benchmark (LUBM). We first analyze the load unbalance of these queries, showing that execution time among tasks can differ even of order of magnitudes. We then synthesize the queries and com- pare the performance of the resulting accelerators against the current state of the art. Experimental results show that our solution provides a speedup over the serial implementa- tion close to the theoretical maximum and a speedup up to 3.45 over a baseline parallel implementation. We conclude our study by exploring the design space to achieve maximum memory channels utilization. The best design used at least three of the four memory channels for more than 90% of the execution time.« less

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

NASA Technical Reports Server (NTRS)

Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)

2000-01-01

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

Nonvolatile ferroelectric memory based on PbTiO3 gated single-layer MoS2 field-effect transistor

NASA Astrophysics Data System (ADS)

Shin, Hyun Wook; Son, Jong Yeog

2018-01-01

We fabricated ferroelectric non-volatile random access memory (FeRAM) based on a field effect transistor (FET) consisting of a monolayer MoS2 channel and a ferroelectric PbTiO3 (PTO) thin film of gate insulator. An epitaxial PTO thin film was deposited on a Nb-doped SrTiO3 (Nb:STO) substrate via pulsed laser deposition. A monolayer MoS2 sheet was exfoliated from a bulk crystal and transferred to the surface of the PTO/Nb:STO. Structural and surface properties of the PTO thin film were characterized by X-ray diffraction and atomic force microscopy, respectively. Raman spectroscopy analysis was performed to identify the single-layer MoS2 sheet on the PTO/Nb:STO. We obtained mobility value (327 cm2/V·s) of the MoS2 channel at room temperature. The MoS2-PTO FeRAM FET showed a wide memory window with 17 kΩ of resistance variation which was attributed to high remnant polarization of the epitaxially grown PTO thin film. According to the fatigue resistance test for the FeRAM FET, however, the resistance states gradually varied during the switching cycles of 109. [Figure not available: see fulltext.

The impact of interference on short-term memory for visual orientation.

PubMed

Rademaker, Rosanne L; Bloem, Ilona M; De Weerd, Peter; Sack, Alexander T

2015-12-01

Visual short-term memory serves as an efficient buffer for maintaining no longer directly accessible information. How robust are visual memories against interference? Memory for simple visual features has proven vulnerable to distractors containing conflicting information along the relevant stimulus dimension, leading to the idea that interacting feature-specific channels at an early stage of visual processing support memory for simple visual features. Here we showed that memory for a single randomly orientated grating was susceptible to interference from a to-be-ignored distractor grating presented midway through a 3-s delay period. Memory for the initially presented orientation became noisier when it differed from the distractor orientation, and response distributions were shifted toward the distractor orientation (by ∼3°). Interestingly, when the distractor was rendered task-relevant by making it a second memory target, memory for both retained orientations showed reduced reliability as a function of increased orientation differences between them. However, the degree to which responses to the first grating shifted toward the orientation of the task-relevant second grating was much reduced. Finally, using a dichoptic display, we demonstrated that these systematic biases caused by a consciously perceived distractor disappeared once the distractor was presented outside of participants' awareness. Together, our results show that visual short-term memory for orientation can be systematically biased by interfering information that is consciously perceived. (c) 2015 APA, all rights reserved).

Solving the integration problem of one transistor one memristor architecture with a Bi-layer IGZO film through synchronous process

NASA Astrophysics Data System (ADS)

Chang, Che-Chia; Liu, Po-Tsun; Chien, Chen-Yu; Fan, Yang-Shun

2018-04-01

This study demonstrates the integration of a thin film transistor (TFT) and resistive random-access memory (RRAM) to form a one-transistor-one-resistor (1T1R) configuration. With the concept of the current conducting direction in RRAM and TFT, a triple-layer stack design of Pt/InGaZnO/Al2O3 is proposed for both the switching layer of RRAM and the channel layer of TFT. This proposal decreases the complexity of fabrication and the numbers of photomasks required. Also, the robust endurance and stable retention characteristics are exhibited by the 1T1R architecture for promising applications in memory-embedded flat panel displays.

Fabrication of one-transistor-capacitor structure of nonvolatile TFT ferroelectric RAM devices using Ba(Zr0.1Ti0.9)O3 gated oxide film.

PubMed

Yang, Cheng-Fu; Chen, Kai-Huang; Chen, Ying-Chung; Chang, Ting-Chang

2007-09-01

In this study, the Ba(Zr0.1Ti0.9)O3 (BZ1T9) thin films have been well deposited on the Pt/Ti/SiO2/Si substrate. The optimum radio frequency (RF) deposition parameters are developed, and the BZ1T9 thin films deposition at the optimum parameters have the maximum capacitance and dielectric constant of 4.4 nF and 190. As the applied voltage is increased to 8 V, the remnant polarization and coercive field of BZ1T9 thin films are about 4.5 microC/cm2 and 80 kV/cm. The counterclockwise current hysteresis and memory window of n-channel thin-film transistor property are observed, and that can be used to indicate the switching of ferroelectric polarization of BZ1T9 thin films. One-transistor-capacitor (1TC) structure of BZ1T9 ferroelectric random access memory device using bottom-gate amorphous silicon thin-film transistor was desirable because of the smaller size and better sensitivity. The BZ1T9 ferroelectric RAM devices with channel width = 40 microm and channel length = 8 microm has been successfully fabricated and the ID-VG transfer characteristics also are investigated in this study.

Four-Channel PC/104 MIL-STD-1553 Circuit Board

NASA Technical Reports Server (NTRS)

Cox, Gary L.

2004-01-01

The mini bus interface card (miniBIC) is the first four-channel electronic circuit board that conforms to MIL-STD-1553 and to the electrical-footprint portion of PC/104. [MIL-STD-1553 is a military standard that encompasses a method of communication and electrical- interface requirements for digital electronic subsystems connected to a data bus. PC/104 is an industry standard for compact, stackable modules that are fully compatible (in architecture, hardware, and software) with personal-computer data- and power-bus circuitry.] Prior to the development of the miniBIC, only one- and two-channel PC/104 MIL-STD-1553 boards were available. To obtain four channels, it was necessary to include at least two boards in a PC/104 stack. In comparison with such a two-board stack, the miniBIC takes up less space, consumes less power, and is more reliable. In addition, the miniBIC includes 32 digital input/output channels. The miniBIC (see figure) contains four MIL-STD-1553B hybrid integrated circuits (ICs), four transformers, a field-programmable gate array (FPGA), and an Industry Standard Architecture (ISA) interface. Each hybrid IC includes a MILSTD-1553 dual transceiver, memory-management circuitry, processor interface logic circuitry, and 64Kx16 bits of shared static random access memory. The memory is used to configure message and data blocks. In addition, 23 16-bit registers are available for (1) configuring the hybrid IC for, and starting it in, various modes of operation; (2) reading the status of the functionality of the hybrid IC; and (3) resetting the hybrid IC to a known state. The miniBIC can operate as a remote terminal, bus controller, or bus monitor. The FPGA provides the chip-select and data-strobe signals needed for operation of the hybrid ICs. The FPGA also receives interruption signals and forwards them to the ISA bus. The ISA interface connects the address, data, and control interfaces of the hybrid ICs to the ISA backplane. Each channel is, in effect, a MIL-STD-1553 interface that can operate either independently of the others or else as a redundant version of one of the others. The transformer in each channel provides electrical isolation between the rest of the miniBIC circuitry and the bus to which that channel is connected.

Scaling Trends and Tradeoffs between Short Channel Effect and Channel Boosting Characteristics in Sub-20 nm Bulk/Silicon-on-Insulator NAND Flash Memory

NASA Astrophysics Data System (ADS)

Miyaji, Kousuke; Hung, Chinglin; Takeuchi, Ken

2012-04-01

The scaling trends and limitation in sub-20 nm a bulk and silicon-on-insulator (SOI) NAND flash memory is studied by the three-dimensional (3D) device simulation focusing on short channel effects (SCE), channel boost leakage and channel voltage boosting characteristics during the program-inhibit operation. Although increasing punch-through stopper doping concentration is effective for suppressing SCE in bulk NAND cells, the generation of junction leakage becomes serious. On the other hand, SCE can be suppressed by thinning the buried oxide (BOX) in SOI NAND cells. However, the boosted channel voltage decreases by the higher BOX capacitance. It is concluded that the scaling limitation is dominated by the junction leakage and channel boosting capability for bulk and SOI NAND flash cells, respectively, and the scaling limit is decreased to 9 nm using SOI NAND flash memory cells from 13 nm in bulk NAND flash memory cells.

Classical capacity of Gaussian thermal memory channels

NASA Astrophysics Data System (ADS)

De Palma, G.; Mari, A.; Giovannetti, V.

2014-10-01

The classical capacity of phase-invariant Gaussian channels has been recently determined under the assumption that such channels are memoryless. In this work we generalize this result by deriving the classical capacity of a model of quantum memory channel, in which the output states depend on the previous input states. In particular we extend the analysis of Lupo et al. [Phys. Rev. Lett. 104, 030501 (2010), 10.1103/PhysRevLett.104.030501 and Phys. Rev. A 82, 032312 (2010), 10.1103/PhysRevA.82.032312] from quantum limited channels to thermal attenuators and thermal amplifiers. Our result applies in many situations in which the physical communication channel is affected by nonzero memory and by thermal noise.

Spin-based single-photon transistor, dynamic random access memory, diodes, and routers in semiconductors

NASA Astrophysics Data System (ADS)

Hu, C. Y.

2016-12-01

The realization of quantum computers and quantum Internet requires not only quantum gates and quantum memories, but also transistors at single-photon levels to control the flow of information encoded on single photons. Single-photon transistor (SPT) is an optical transistor in the quantum limit, which uses a single photon to open or block a photonic channel. In sharp contrast to all previous SPT proposals which are based on single-photon nonlinearities, here I present a design for a high-gain and high-speed (up to THz) SPT based on a linear optical effect: giant circular birefringence induced by a single spin in a double-sided optical microcavity. A gate photon sets the spin state via projective measurement and controls the light propagation in the optical channel. This spin-cavity transistor can be directly configured as diodes, routers, DRAM units, switches, modulators, etc. Due to the duality as quantum gate and transistor, the spin-cavity unit provides a solid-state platform ideal for future Internet: a mixture of all-optical Internet with quantum Internet.

KCNQ/Kv7 channel activator flupirtine protects against acute stress-induced impairments of spatial memory retrieval and hippocampal LTP in rats.

PubMed

Li, C; Huang, P; Lu, Q; Zhou, M; Guo, L; Xu, X

2014-11-07

Spatial memory retrieval and hippocampal long-term potentiation (LTP) are impaired by stress. KCNQ/Kv7 channels are closely associated with memory and the KCNQ/Kv7 channel activator flupirtine represents neuroprotective effects. This study aims to test whether KCNQ/Kv7 channel activation prevents acute stress-induced impairments of spatial memory retrieval and hippocampal LTP. Rats were placed on an elevated platform in the middle of a bright room for 30 min to evoke acute stress. The expression of KCNQ/Kv7 subunits was analyzed at 1, 3 and 12 h after stress by Western blotting. Spatial memory was examined by the Morris water maze (MWM) and the field excitatory postsynaptic potential (fEPSP) in the hippocampal CA1 area was recorded in vivo. Acute stress transiently decreased the expression of KCNQ2 and KCNQ3 in the hippocampus. Acute stress impaired the spatial memory retrieval and hippocampal LTP, the KCNQ/Kv7 channel activator flupirtine prevented the impairments, and the protective effects of flupirtine were blocked by XE-991 (10,10-bis(4-Pyridinylmethyl)-9(10H)-anthracenone), a selective KCNQ channel blocker. Furthermore, acute stress decreased the phosphorylation of glycogen synthase kinase-3β (GSK-3β) at Ser9 in the hippocampus, and flupirtine inhibited the reduction. These results suggest that the KCNQ/Kv7 channels may be a potential target for protecting both hippocampal synaptic plasticity and spatial memory retrieval from acute stress influences. Copyright © 2014 IBRO. Published by Elsevier Ltd. All rights reserved.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Multiple channel data acquisition system

DOEpatents

Crawley, H. Bert; Rosenberg, Eli I.; Meyer, W. Thomas; Gorbics, Mark S.; Thomas, William D.; McKay, Roy L.; Homer, Jr., John F.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler.

Multiple channel data acquisition system

DOEpatents

Crawley, H.B.; Rosenberg, E.I.; Meyer, W.T.; Gorbics, M.S.; Thomas, W.D.; McKay, R.L.; Homer, J.F. Jr.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler. 25 figs.

Optimal superdense coding over memory channels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shadman, Z.; Kampermann, H.; Bruss, D.

2011-10-15

We study the superdense coding capacity in the presence of quantum channels with correlated noise. We investigate both the cases of unitary and nonunitary encoding. Pauli channels for arbitrary dimensions are treated explicitly. The superdense coding capacity for some special channels and resource states is derived for unitary encoding. We also provide an example of a memory channel where nonunitary encoding leads to an improvement in the superdense coding capacity.

Development of non-volatile semiconductor memory

NASA Technical Reports Server (NTRS)

Heikkila, W. W.

1979-01-01

A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

Presentation Media, Information Complexity, and Learning Outcomes

ERIC Educational Resources Information Center

Andres, Hayward P.; Petersen, Candice

2002-01-01

Cognitive processing limitations restrict the number of complex information items held and processed in human working memory. To overcome such limitations, a verbal working memory channel is used to construct an if-then proposition representation of facts and a visual working memory channel is used to construct a visual imagery of geometric…

Total Ionizing Dose Influence on the Single-Event Upset Sensitivity of 130-nm PD SOI SRAMs

NASA Astrophysics Data System (ADS)

Zheng, Qiwen; Cui, Jiangwei; Liu, Mengxin; Zhou, Hang; Liu, Mohan; Wei, Ying; Su, Dandan; Ma, Teng; Lu, Wu; Yu, Xuefeng; Guo, Qi; He, Chengfa

2017-07-01

Effect of total ionizing dose (TID) on single-event upset (SEU) hardness of 130 nm partially depleted (PD) silicon-on-insulator (SOI) static random access memories (SRAMs) is investigated in this paper. The measurable synergistic effect of TID on SEU sensitivity of 130-nm PD SOI SRAM was observed in our experiment, even though that is far less than micrometer and submicrometer devices. Moreover, SEU cross section after TID irradiation has no dependence on the data pattern that was applied during TID exposure: SEU cross sections are characterized by TID data pattern and its complement data pattern are decreased consistently rather than a preferred state and a nonpreferred state as micrometer and sub-micrometer SRAMs. The memory cell test structure allowing direct measurement of static noise margin (SNM) under standby operation was designed using identical memory cell layout of SRAM. Direct measurement of the memory cell SNM shows that both data sides' SNM is decreased by TID, indicating that SEU cross section of 130-nm PD SOI SRAM will be increased by TID. And, the decreased SNM is caused by threshold shift in memory cell transistors induced by “radiation-induced narrow channel effect”.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

75 FR 16507 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-01

... Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same... synchronous dynamic random access memory controllers and products containing same by reason of infringement of... semiconductor chips having synchronous dynamic random access memory controllers and products containing same...

On the simple random-walk models of ion-channel gate dynamics reflecting long-term memory.

PubMed

Wawrzkiewicz, Agata; Pawelek, Krzysztof; Borys, Przemyslaw; Dworakowska, Beata; Grzywna, Zbigniew J

2012-06-01

Several approaches to ion-channel gating modelling have been proposed. Although many models describe the dwell-time distributions correctly, they are incapable of predicting and explaining the long-term correlations between the lengths of adjacent openings and closings of a channel. In this paper we propose two simple random-walk models of the gating dynamics of voltage and Ca(2+)-activated potassium channels which qualitatively reproduce the dwell-time distributions, and describe the experimentally observed long-term memory quite well. Biological interpretation of both models is presented. In particular, the origin of the correlations is associated with fluctuations of channel mass density. The long-term memory effect, as measured by Hurst R/S analysis of experimental single-channel patch-clamp recordings, is close to the behaviour predicted by our models. The flexibility of the models enables their use as templates for other types of ion channel.

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2017-08-15

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2014-09-09

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

A low delay transmission method of multi-channel video based on FPGA

NASA Astrophysics Data System (ADS)

Fu, Weijian; Wei, Baozhi; Li, Xiaobin; Wang, Quan; Hu, Xiaofei

2018-03-01

In order to guarantee the fluency of multi-channel video transmission in video monitoring scenarios, we designed a kind of video format conversion method based on FPGA and its DMA scheduling for video data, reduces the overall video transmission delay.In order to sace the time in the conversion process, the parallel ability of FPGA is used to video format conversion. In order to improve the direct memory access (DMA) writing transmission rate of PCIe bus, a DMA scheduling method based on asynchronous command buffer is proposed. The experimental results show that this paper designs a low delay transmission method based on FPGA, which increases the DMA writing transmission rate by 34% compared with the existing method, and then the video overall delay is reduced to 23.6ms.

Miniature, ruggedized data collector

NASA Astrophysics Data System (ADS)

Jackson, Scott; Calcutt, Wade; Knobler, Ron; Jones, Barry; Klug, Robert

2009-05-01

McQ has developed a miniaturized, programmable, ruggedized data collector intended for use in weapon testing or data collection exercises that impose severe stresses on devices under test. The recorder is designed to survive these stresses which include acceleration and shock levels up to 100,000 G. The collector acquires and stores up to four channels of signal data to nonvolatile memory for later retrieval by a user. It is small (< 7 in3), light weight (< 1 lb), and can operate from various battery chemistries. A built-in menuing system, accessible via a USB interface, allows the user to configure parameters of the recorder operation, such as channel gain, filtering, and signal offsets, and also to retrieve recorded data for analysis. An overview of the collector, its features, performance, and potential uses, is presented.

Improved Writing-Conductor Designs For Magnetic Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1994-01-01

Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).

75 FR 14467 - In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-25

... Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of... the sale within the United States after importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain...

76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-12-27

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...

Capacitorless 1T-DRAM on crystallized poly-Si TFT.

PubMed

Kim, Min Soo; Cho, Won Ju

2011-07-01

The single-transistor dynamic random-access memory (1T-DRAM) using a polycrystalline-silicon thin-film transistor (poly-Si TFT) was investigated. A 100-nm amorphous silicon thin film was deposited onto a 200-nm oxidized silicon wafer via low-pressure chemical vapor deposition (LPCVD), and the amorphous silicon layer was crystallized via eximer laser annealing (ELA) with a KrF source of 248 nm wavelength and 400 mJ/cm2 power. The fabricated capacitor less 1T-DRAM on the poly-Si TFT was evaluated via impact ionization and gate-induced drain leakage (GIDL) current programming. The device showed a clear memory margin between the "1" and "0" states, and as the channel length decreased, a floating body effect which induces a kink effect increases with high mobility. Furthermore, the GIDL current programming showed improved memory properties compared to the impact ionization method. Although the sensing margins and retention times in both program methods are commercially insufficient, it was confirmed the feasibility of the application of 1T-DRAM operation to TFTs.

Method and apparatus for managing access to a memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

DeBenedictis, Erik

A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operationalmore » memory layout reduces an amount of energy consumed by the processor to perform the computing job.« less

Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells.

PubMed

Pu, Y-F; Jiang, N; Chang, W; Yang, H-X; Li, C; Duan, L-M

2017-05-08

To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology.

The Roles of Protein Kinases in Learning and Memory

ERIC Educational Resources Information Center

Giese, Karl Peter; Mizuno, Keiko

2013-01-01

In the adult mammalian brain, more than 250 protein kinases are expressed, but only a few of these kinases are currently known to enable learning and memory. Based on this information it appears that learning and memory-related kinases either impact on synaptic transmission by altering ion channel properties or ion channel density, or regulate…

Study on advanced information processing system

NASA Technical Reports Server (NTRS)

Shin, Kang G.; Liu, Jyh-Charn

1992-01-01

Issues related to the reliability of a redundant system with large main memory are addressed. In particular, the Fault-Tolerant Processor (FTP) for Advanced Launch System (ALS) is used as a basis for our presentation. When the system is free of latent faults, the probability of system crash due to nearly-coincident channel faults is shown to be insignificant even when the outputs of computing channels are infrequently voted on. In particular, using channel error maskers (CEMs) is shown to improve reliability more effectively than increasing the number of channels for applications with long mission times. Even without using a voter, most memory errors can be immediately corrected by CEMs implemented with conventional coding techniques. In addition to their ability to enhance system reliability, CEMs--with a low hardware overhead--can be used to reduce not only the need of memory realignment, but also the time required to realign channel memories in case, albeit rare, such a need arises. Using CEMs, we have developed two schemes, called Scheme 1 and Scheme 2, to solve the memory realignment problem. In both schemes, most errors are corrected by CEMs, and the remaining errors are masked by a voter.

Resource Theory of Quantum Memories and Their Faithful Verification with Minimal Assumptions

NASA Astrophysics Data System (ADS)

Rosset, Denis; Buscemi, Francesco; Liang, Yeong-Cherng

2018-04-01

We provide a complete set of game-theoretic conditions equivalent to the existence of a transformation from one quantum channel into another one, by means of classically correlated preprocessing and postprocessing maps only. Such conditions naturally induce tests to certify that a quantum memory is capable of storing quantum information, as opposed to memories that can be simulated by measurement and state preparation (corresponding to entanglement-breaking channels). These results are formulated as a resource theory of genuine quantum memories (correlated in time), mirroring the resource theory of entanglement in quantum states (correlated spatially). As the set of conditions is complete, the corresponding tests are faithful, in the sense that any non-entanglement-breaking channel can be certified. Moreover, they only require the assumption of trusted inputs, known to be unavoidable for quantum channel verification. As such, the tests we propose are intrinsically different from the usual process tomography, for which the probes of both the input and the output of the channel must be trusted. An explicit construction is provided and shown to be experimentally realizable, even in the presence of arbitrarily strong losses in the memory or detectors.

Study on fault-tolerant processors for advanced launch system

NASA Technical Reports Server (NTRS)

Shin, Kang G.; Liu, Jyh-Charn

1990-01-01

Issues related to the reliability of a redundant system with large main memory are addressed. The Fault-Tolerant Processor (FTP) for the Advanced Launch System (ALS) is used as a basis for the presentation. When the system is free of latent faults, the probability of system crash due to multiple channel faults is shown to be insignificant even when voting on the outputs of computing channels is infrequent. Using channel error maskers (CEMs) is shown to improve reliability more effectively than increasing redundancy or the number of channels for applications with long mission times. Even without using a voter, most memory errors can be immediately corrected by those CEMs implemented with conventional coding techniques. In addition to their ability to enhance system reliability, CEMs (with a very low hardware overhead) can be used to dramatically reduce not only the need of memory realignment, but also the time required to realign channel memories in case, albeit rare, such a need arises. Using CEMs, two different schemes were developed to solve the memory realignment problem. In both schemes, most errors are corrected by CEMs, and the remaining errors are masked by a voter.

Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells

PubMed Central

Pu, Y-F; Jiang, N.; Chang, W.; Yang, H-X; Li, C.; Duan, L-M

2017-01-01

To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology. PMID:28480891

Logic design and implementation of FPGA for a high frame rate ultrasound imaging system

NASA Astrophysics Data System (ADS)

Liu, Anjun; Wang, Jing; Lu, Jian-Yu

2002-05-01

Recently, a method has been developed for high frame rate medical imaging [Jian-yu Lu, ``2D and 3D high frame rate imaging with limited diffraction beams,'' IEEE Trans. Ultrason. Ferroelectr. Freq. Control 44(4), 839-856 (1997)]. To realize this method, a complicated system [multiple-channel simultaneous data acquisition, large memory in each channel for storing up to 16 seconds of data at 40 MHz and 12-bit resolution, time-variable-gain (TGC) control, Doppler imaging, harmonic imaging, as well as coded transmissions] is designed. Due to the complexity of the system, field programmable gate array (FPGA) (Xilinx Spartn II) is used. In this presentation, the design and implementation of the FPGA for the system will be reported. This includes the synchronous dynamic random access memory (SDRAM) controller and other system controllers, time sharing for auto-refresh of SDRAMs to reduce peak power, transmission and imaging modality selections, ECG data acquisition and synchronization, 160 MHz delay locked loop (DLL) for accurate timing, and data transfer via either a parallel port or a PCI bus for post image processing. [Work supported in part by Grant 5RO1 HL60301 from NIH.

KCNQ Channels Regulate Age-Related Memory Impairment

PubMed Central

Cavaliere, Sonia; Malik, Bilal R.; Hodge, James J. L.

2013-01-01

In humans KCNQ2/3 heteromeric channels form an M-current that acts as a brake on neuronal excitability, with mutations causing a form of epilepsy. The M-current has been shown to be a key regulator of neuronal plasticity underlying associative memory and ethanol response in mammals. Previous work has shown that many of the molecules and plasticity mechanisms underlying changes in alcohol behaviour and addiction are shared with those of memory. We show that the single KCNQ channel in Drosophila (dKCNQ) when mutated show decrements in associative short- and long-term memory, with KCNQ function in the mushroom body α/βneurons being required for short-term memory. Ethanol disrupts memory in wildtype flies, but not in a KCNQ null mutant background suggesting KCNQ maybe a direct target of ethanol, the blockade of which interferes with the plasticity machinery required for memory formation. We show that as in humans, Drosophila display age-related memory impairment with the KCNQ mutant memory defect mimicking the effect of age on memory. Expression of KCNQ normally decreases in aging brains and KCNQ overexpression in the mushroom body neurons of KCNQ mutants restores age-related memory impairment. Therefore KCNQ is a central plasticity molecule that regulates age dependent memory impairment. PMID:23638087

Deflate decompressor

DOEpatents

Hamlet, Jason R [Albuquerque, NM; Robertson, Perry J [Albuquerque, NM; Pierson, Lyndon G [Albuquerque, NM; Olsberg, Ronald R [Albuquerque, NM

2012-02-28

A deflate decompressor includes at least one decompressor unit, a memory access controller, a feedback path, and an output buffer unit. The memory access controller is coupled to the decompressor unit via a data path and includes a data buffer to receive the data stream and temporarily buffer a first portion the data stream. The memory access controller transfers fixed length data units of the data stream from the data buffer to the decompressor unit with reference to a memory pointer pointing into the memory buffer. The feedback path couples the decompressor unit to the memory access controller to feed back decrement values to the memory access controller for updating the memory pointer. The decrement values each indicate a number of bits unused by the decompressor unit when decoding the fixed length data units. The output buffer unit buffers a second portion of the data stream after decompression.

75 FR 44283 - In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-07-28

... Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a... importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain claims of U.S. Patent Nos. 5,480,051; 5,422,309; 5...

Ge-cap quantum-well bulk FinFET for 5 nm node CMOS integration

NASA Astrophysics Data System (ADS)

Dwi Kurniawan, Erry; Peng, Kang-Hui; Yang, Shang-Yi; Yang, Yi-Yun; Thirunavukkarasu, Vasanthan; Lin, Yu-Hsien; Wu, Yung-Chun

2018-04-01

We propose the use of Ge-cap quantum-well (QW) bulk FinFET for 5 nm CMOS integration, which is a Si channel wrapped with Ge around three sides of the fin channel. The simulation results show that the Ge-cap FinFET structure demonstrates better performance than pure Si, pure Ge, and Si-cap FinFET structures. By optimizing Si fin width and Ge-cap thickness, the on-state current of nFET and pFET can also be symmetric without changing the total fin width (F Wp = F Wn). The electrons in Ge-cap nFinFET concentrate in the Si channel because of QWs formed in the lowest conduction band of the Ge and Si heterostructure, while the holes in Ge-cap pFinFET prefer to stay in Ge surfaces owing to QWs formed in the Ge valence band. The physics studies of this device have made the design rules relevant for the application of the CMOS inverter and static random access memory (SRAM) application technology.

Skyrmion-based multi-channel racetrack

NASA Astrophysics Data System (ADS)

Song, Chengkun; Jin, Chendong; Wang, Jinshuai; Xia, Haiyan; Wang, Jianbo; Liu, Qingfang

2017-11-01

Magnetic skyrmions are promising for the application of racetrack memories, logic gates, and other nano-devices, owing to their topologically protected stability, small size, and low driving current. In this work, we propose a skyrmion-based multi-channel racetrack memory where the skyrmion moves in the selected channel by applying voltage-controlled magnetic anisotropy gates. It is demonstrated numerically that a current-dependent skyrmion Hall effect can be restrained by the additional potential of the voltage-controlled region, and the skyrmion velocity and moving channel in the racetrack can be operated by tuning the voltage-controlled magnetic anisotropy, gate position, and current density. Our results offer a potential application of racetrack memory based on skyrmions.

Overview of emerging nonvolatile memory technologies

PubMed Central

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

Overview of emerging nonvolatile memory technologies.

PubMed

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

TRPC3 channels critically regulate hippocampal excitability and contextual fear memory.

PubMed

Neuner, Sarah M; Wilmott, Lynda A; Hope, Kevin A; Hoffmann, Brian; Chong, Jayhong A; Abramowitz, Joel; Birnbaumer, Lutz; O'Connell, Kristen M; Tryba, Andrew K; Greene, Andrew S; Savio Chan, C; Kaczorowski, Catherine C

2015-03-15

Memory formation requires de novo protein synthesis, and memory disorders may result from misregulated synthesis of critical proteins that remain largely unidentified. Plasma membrane ion channels and receptors are likely candidates given their role in regulating neuron excitability, a candidate memory mechanism. Here we conduct targeted molecular monitoring and quantitation of hippocampal plasma membrane proteins from mice with intact or impaired contextual fear memory to identify putative candidates. Here we report contextual fear memory deficits correspond to increased Trpc3 gene and protein expression, and demonstrate TRPC3 regulates hippocampal neuron excitability associated with memory function. These data provide a mechanistic explanation for enhanced contextual fear memory reported herein following knockdown of TRPC3 in hippocampus. Collectively, TRPC3 modulates memory and may be a feasible target to enhance memory and treat memory disorders. Copyright © 2014 The Authors. Published by Elsevier B.V. All rights reserved.

Nonvolatile semiconductor memory having three dimension charge confinement

DOEpatents

Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.

1991-01-01

A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.

Monte Carlo simulation of a noisy quantum channel with memory.

PubMed

Akhalwaya, Ismail; Moodley, Mervlyn; Petruccione, Francesco

2015-10-01

The classical capacity of quantum channels is well understood for channels with uncorrelated noise. For the case of correlated noise, however, there are still open questions. We calculate the classical capacity of a forgetful channel constructed by Markov switching between two depolarizing channels. Techniques have previously been applied to approximate the output entropy of this channel and thus its capacity. In this paper, we use a Metropolis-Hastings Monte Carlo approach to numerically calculate the entropy. The algorithm is implemented in parallel and its performance is studied and optimized. The effects of memory on the capacity are explored and previous results are confirmed to higher precision.

Kv4 Potassium Channels Modulate Hippocampal EPSP-Spike Potentiation and Spatial Memory in Rats

ERIC Educational Resources Information Center

Truchet, Bruno; Manrique, Christine; Sreng, Leam; Chaillan, Franck A.; Roman, Francois S.; Mourre, Christiane

2012-01-01

Kv4 channels regulate the backpropagation of action potentials (b-AP) and have been implicated in the modulation of long-term potentiation (LTP). Here we showed that blockade of Kv4 channels by the scorpion toxin AmmTX3 impaired reference memory in a radial maze task. In vivo, AmmTX3 intracerebroventricular (i.c.v.) infusion increased and…

Accessing memory

DOEpatents

Yoon, Doe Hyun; Muralimanohar, Naveen; Chang, Jichuan; Ranganthan, Parthasarathy

2017-09-26

A disclosed example method involves performing simultaneous data accesses on at least first and second independently selectable logical sub-ranks to access first data via a wide internal data bus in a memory device. The memory device includes a translation buffer chip, memory chips in independently selectable logical sub-ranks, a narrow external data bus to connect the translation buffer chip to a memory controller, and the wide internal data bus between the translation buffer chip and the memory chips. A data access is performed on only the first independently selectable logical sub-rank to access second data via the wide internal data bus. The example method also involves locating a first portion of the first data, a second portion of the first data, and the second data on the narrow external data bus during separate data transfers.

Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.

PubMed

Kim, Seung-Yoon; Park, Jong Kyung; Hwang, Wan Sik; Lee, Seung-Jun; Lee, Ki-Hong; Pyi, Seung Ho; Cho, Byung Jin

2016-05-01

We investigated the dependence of grain size on the performance of a polycrystalline silicon (poly-Si) channel TFT for application to 3D NAND Flash memory devices. It has been found that the device performance and memory characteristics are strongly affected by the grain size of the poly-Si channel. Higher on-state current, faster program speed, and poor endurance/reliability properties are observed when the poly-Si grain size is large. These are mainly attributed to the different local electric field induced by an oxide valley at the interface between the poly-Si channel and the gate oxide. In addition, the trap density at the gate oxide interface was successfully measured using a charge pumping method by the separation between the gate oxide interface traps and traps at the grain boundaries in the poly-Si channel. The poly-Si channel with larger grain size has lower interface trap density.

KCa2 and KCa3 Channels in Learning and Memory Processes, and Neurodegeneration

PubMed Central

Kuiper, Els F. E.; Nelemans, Ad; Luiten, Paul; Nijholt, Ingrid; Dolga, Amalia; Eisel, Uli

2012-01-01

Calcium-activated potassium (KCa) channels are present throughout the central nervous system as well as many peripheral tissues. Activation of KCa channels contribute to maintenance of the neuronal membrane potential and was shown to underlie the afterhyperpolarization (AHP) that regulates action potential firing and limits the firing frequency of repetitive action potentials. Different subtypes of KCa channels were anticipated on the basis of their physiological and pharmacological profiles, and cloning revealed two well defined but phylogenetic distantly related groups of channels. The group subject of this review includes both the small conductance KCa2 channels (KCa2.1, KCa2.2, and KCa2.3) and the intermediate-conductance (KCa3.1) channel. These channels are activated by submicromolar intracellular Ca2+ concentrations and are voltage independent. Of all KCa channels only the KCa2 channels can be potently but differentially blocked by the bee-venom apamin. In the past few years modulation of KCa channel activation revealed new roles for KCa2 channels in controlling dendritic excitability, synaptic functioning, and synaptic plasticity. Furthermore, KCa2 channels appeared to be involved in neurodegeneration, and learning and memory processes. In this review, we focus on the role of KCa2 and KCa3 channels in these latter mechanisms with emphasis on learning and memory, Alzheimer’s disease and on the interplay between neuroinflammation and different neurotransmitters/neuromodulators, their signaling components and KCa channel activation. PMID:22701424

Design and implementation of low complexity wake-up receiver for underwater acoustic sensor networks

NASA Astrophysics Data System (ADS)

Yue, Ming

This thesis designs a low-complexity dual Pseudorandom Noise (PN) scheme for identity (ID) detection and coarse frame synchronization. The two PN sequences for a node are identical and are separated by a specified length of gap which serves as the ID of different sensor nodes. The dual PN sequences are short in length but are capable of combating severe underwater acoustic (UWA) multipath fading channels that exhibit time varying impulse responses up to 100 taps. The receiver ID detection is implemented on a microcontroller MSP430F5529 by calculating the correlation between the two segments of the PN sequence with the specified separation gap. When the gap length is matched, the correlator outputs a peak which triggers the wake-up enable. The time index of the correlator peak is used as the coarse synchronization of the data frame. The correlator is implemented by an iterative algorithm that uses only one multiplication and two additions for each sample input regardless of the length of the PN sequence, thus achieving low computational complexity. The real-time processing requirement is also met via direct memory access (DMA) and two circular buffers to accelerate data transfer between the peripherals and the memory. The proposed dual PN detection scheme has been successfully tested by simulated fading channels and real-world measured channels. The results show that, in long multipath channels with more than 60 taps, the proposed scheme achieves high detection rate and low false alarm rate using maximal-length sequences as short as 31 bits to 127 bits, therefore it is suitable as a low-power wake-up receiver. The future research will integrate the wake-up receiver with Digital Signal Processors (DSP) for payload detection.

Capacitorless one-transistor dynamic random-access memory based on asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor with n-doped boosting layer and drain-underlap structure

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-04-01

In this work, we present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on an asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor (TFET) for DRAM applications. The n-doped boosting layer and gate2 drain-underlap structure is employed in the device to obtain an excellent 1T-DRAM performance. The n-doped layer inserted between the source and channel regions improves the sensing margin because of a high rate of increase in the band-to-band tunneling (BTBT) probability. Furthermore, because the gate2 drain-underlap structure reduces the recombination rate that occurs between the gate2 and drain regions, a device with a gate2 drain-underlap length (L G2_D-underlap) of 10 nm exhibited a longer retention performance. As a result, by applying the n-doped layer and gate2 drain-underlap structure, the proposed device exhibited not only a high sensing margin of 1.11 µA/µm but also a long retention time of greater than 100 ms at a temperature of 358 K (85 °C).

Loss of Transient Receptor Potential Ankyrin 1 Channel Deregulates Emotion, Learning and Memory, Cognition, and Social Behavior in Mice.

PubMed

Lee, Kuan-I; Lin, Hui-Ching; Lee, Hsueh-Te; Tsai, Feng-Chuan; Lee, Tzong-Shyuan

2017-07-01

The transient receptor potential ankyrin 1 (TRPA1) channel is a non-selective cation channel that helps regulate inflammatory pain sensation and nociception and the development of inflammatory diseases. However, the potential role of the TRPA1 channel and the underlying mechanism in brain functions are not fully resolved. In this study, we demonstrated that genetic deletion of the TRPA1 channel in mice or pharmacological inhibition of its activity increased neurite outgrowth. In vivo study in mice provided evidence of the TRPA1 channel as a negative regulator in hippocampal functions; functional ablation of the TRPA1 channel in mice enhanced hippocampal functions, as evidenced by less anxiety-like behavior, and enhanced fear-related or spatial learning and memory, and novel location recognition as well as social interactions. However, the TRPA1 channel appears to be a prerequisite for motor function; functional loss of the TRPA1 channel in mice led to axonal bundle fragmentation, downregulation of myelin basic protein, and decreased mature oligodendrocyte population in the brain, for impaired motor function. The TRPA1 channel may play a crucial role in neuronal development and oligodendrocyte maturation and be a potential regulator in emotion, cognition, learning and memory, and social behavior.

The Role of Alternating Bilateral Stimulation in Establishing Positive Cognition in EMDR Therapy: A Multi-Channel Near-Infrared Spectroscopy Study.

PubMed

Amano, Tamaki; Toichi, Motomi

2016-01-01

Eye movement desensitisation and reprocessing (EMDR) is a standard method for treating post-traumatic stress disorder. EMDR treatment consists of desensitisation and resource development and installation (RDI) stages. Both protocols provide a positive alternating bilateral stimulation (BLS). The effect of desensitisation with BLS has been elucidated. However, a role for BLS in RDI remains unknown. Therefore, it is important to measure feelings as subjective data and physiological indicators as objective data to clarify the role of BLS in RDI. RDI was administered to 15 healthy volunteer subjects who experienced pleasant memories. Their oxygenated haemoglobin concentration ([oxy-Hb]), a sensitive index of brain activity, was measured from the prefrontal cortex (PFC) to the temporal cortex using multi-channel near-infrared spectroscopy during recall of a pleasant memory with or without BLS. The BLS used was alternating bilateral tactile stimulation with a vibration machine. The psychological evaluation suggested that RDI was successful. The results showed that, compared with non-BLS conditions, accessibility was increased and subjects were more relaxed under BLS conditions. A significant increase in [oxy-Hb] was detected in the right superior temporal sulcus (STS), and a decrease in the wide bilateral areas of the PFC was observed in response to BLS. The significant BLS-induced activation observed in the right STS, which is closely related to memory representation, suggests that BLS may help the recall of more representative pleasant memories. Furthermore, the significant reduction in the PFC, which is related to emotion regulation, suggests that BLS induces relaxation and comfortable feelings. These results indicate an important neural mechanism of RDI that emotional processing occurred rather than higher cognitive processing during this stage. Considering the neuroscientific evidence to date, BLS in RDI may enhance comfortable feelings about pleasant memories. Based on the current findings, the use of BLS in RDI may be warranted in some clinical situations.

Interactive communication channel

NASA Astrophysics Data System (ADS)

Chan, R. H.; Mann, M. R.; Ciarrocchi, J. A.

1985-10-01

Discussed is an interactive communications channel (ICC) for providing a digital computer with high-performance multi-channel interfaces. Sixteen full duplex channels can be serviced in the ICC with the sequence or scan pattern being programmable and dependent upon the number or channels and their speed. A channel buffer system is used for line interface, and character exchange. The channel buffer system is on a byte basis. The ICC performs frame start and frame end functions, bit stripping and bit stuffing. Data is stored in a memory in block format (256 bytes maximum) by a program control and the ICC maintains byte address information and a block byte count. Data exchange with a memory is made by cycle steals. Error detection is also provided for using a cyclic redundancy check technique.

Working memory capacity and retrieval limitations from long-term memory: an examination of differences in accessibility.

PubMed

Unsworth, Nash; Spillers, Gregory J; Brewer, Gene A

2012-01-01

In two experiments, the locus of individual differences in working memory capacity and long-term memory recall was examined. Participants performed categorical cued and free recall tasks, and individual differences in the dynamics of recall were interpreted in terms of a hierarchical-search framework. The results from this study are in accordance with recent theorizing suggesting a strong relation between working memory capacity and retrieval from long-term memory. Furthermore, the results also indicate that individual differences in categorical recall are partially due to differences in accessibility. In terms of accessibility of target information, two important factors drive the difference between high- and low-working-memory-capacity participants. Low-working-memory-capacity participants fail to utilize appropriate retrieval strategies to access cues, and they also have difficulty resolving cue overload. Thus, when low-working-memory-capacity participants were given specific cues that activated a smaller set of potential targets, their recall performance was the same as that of high-working-memory-capacity participants.

Memory availability and referential access

PubMed Central

Johns, Clinton L.; Gordon, Peter C.; Long, Debra L.; Swaab, Tamara Y.

2013-01-01

Most theories of coreference specify linguistic factors that modulate antecedent accessibility in memory; however, whether non-linguistic factors also affect coreferential access is unknown. Here we examined the impact of a non-linguistic generation task (letter transposition) on the repeated-name penalty, a processing difficulty observed when coreferential repeated names refer to syntactically prominent (and thus more accessible) antecedents. In Experiment 1, generation improved online (event-related potentials) and offline (recognition memory) accessibility of names in word lists. In Experiment 2, we manipulated generation and syntactic prominence of antecedent names in sentences; both improved online and offline accessibility, but only syntactic prominence elicited a repeated-name penalty. Our results have three important implications: first, the form of a referential expression interacts with an antecedent’s status in the discourse model during coreference; second, availability in memory and referential accessibility are separable; and finally, theories of coreference must better integrate known properties of the human memory system. PMID:24443621

Implementation of real-time digital signal processing systems

NASA Technical Reports Server (NTRS)

Narasimha, M.; Peterson, A.; Narayan, S.

1978-01-01

Special purpose hardware implementation of DFT Computers and digital filters is considered in the light of newly introduced algorithms and IC devices. Recent work by Winograd on high-speed convolution techniques for computing short length DFT's, has motivated the development of more efficient algorithms, compared to the FFT, for evaluating the transform of longer sequences. Among these, prime factor algorithms appear suitable for special purpose hardware implementations. Architectural considerations in designing DFT computers based on these algorithms are discussed. With the availability of monolithic multiplier-accumulators, a direct implementation of IIR and FIR filters, using random access memories in place of shift registers, appears attractive. The memory addressing scheme involved in such implementations is discussed. A simple counter set-up to address the data memory in the realization of FIR filters is also described. The combination of a set of simple filters (weighting network) and a DFT computer is shown to realize a bank of uniform bandpass filters. The usefulness of this concept in arriving at a modular design for a million channel spectrum analyzer, based on microprocessors, is discussed.

Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing

DTIC Science & Technology

2010-07-22

dependent , providing a natural bandwidth match between compute cores and the memory subsystem. • High Bandwidth Dcnsity. Waveguides crossing the chip...simulate this memory access architecture on a 2S6-core chip with a concentrated 64-node network lIsing detailed traces of high-performance embedded...memory modulcs, wc placc memory access poi nts (MAPs) around the pcriphery of the chip connected to thc nctwork. These MAPs, shown in Figure 4, contain

Development of a 64 channel ultrasonic high frequency linear array imaging system.

PubMed

Hu, ChangHong; Zhang, Lequan; Cannata, Jonathan M; Yen, Jesse; Shung, K Kirk

2011-12-01

In order to improve the lateral resolution and extend the field of view of a previously reported 48 element 30 MHz ultrasound linear array and 16-channel digital imaging system, the development of a 256 element 30 MHz linear array and an ultrasound imaging system with increased channel count has been undertaken. This paper reports the design and testing of a 64 channel digital imaging system which consists of an analog front-end pulser/receiver, 64 channels of Time-Gain Compensation (TGC), 64 channels of high-speed digitizer as well as a beamformer. A Personal Computer (PC) is used as the user interface to display real-time images. This system is designed as a platform for the purpose of testing the performance of high frequency linear arrays that have been developed in house. Therefore conventional approaches were taken it its implementation. Flexibility and ease of use are of primary concern whereas consideration of cost-effectiveness and novelty in design are only secondary. Even so, there are many issues at higher frequencies but do not exist at lower frequencies need to be solved. The system provides 64 channels of excitation pulsers while receiving simultaneously at a 20-120 MHz sampling rate to 12-bits. The digitized data from all channels are first fed through Field Programmable Gate Arrays (FPGAs), and then stored in memories. These raw data are accessed by the beamforming processor to re-build the image or to be downloaded to the PC for further processing. The beamformer that applies delays to the echoes of each channel is implemented with the strategy that combines coarse (8.3 ns) and fine delays (2 ns). The coarse delays are integer multiples of the sampling clock rate and are achieved by controlling the write enable pin of the First-In-First-Out (FIFO) memory to obtain valid beamforming data. The fine delays are accomplished with interpolation filters. This system is capable of achieving a maximum frame rate of 50 frames per second. Wire phantom images acquired with this system show a spatial resolution of 146 μm (lateral) and 54 μm (axial). Images with excised rabbit and pig eyeball as well as mouse embryo were also acquired to demonstrate its imaging capability. Copyright © 2011 Elsevier B.V. All rights reserved.

Development of a 64 channel ultrasonic high frequency linear array imaging system

PubMed Central

Hu, ChangHong; Zhang, Lequan; Cannata, Jonathan M.; Yen, Jesse; Shung, K. Kirk

2011-01-01

In order to improve the lateral resolution and extend the field of view of a previously reported 48 element 30 MHz ultrasound linear array and 16-channel digital imaging system, the development of a 256 element 30 MHz linear array and an ultrasound imaging system with increased channel count has been undertaken. This paper reports the design and testing of a 64 channel digital imaging system which consists of an analog front-end pulser/receiver, 64 channels of Time-Gain Compensation (TGC), 64 channels of high-speed digitizer as well as a beamformer. A Personal Computer (PC) is used as the user interface to display real-time images. This system is designed as a platform for the purpose of testing the performance of high frequency linear arrays that have been developed in house. Therefore conventional approaches were taken it its implementation. Flexibility and ease of use are of primary concern whereas consideration of cost-effectiveness and novelty in design are only secondary. Even so, there are many issues at higher frequencies but do not exist at lower frequencies need to be solved. The system provides 64 channels of excitation pulsers while receiving simultaneously at a 20 MHz–120 MHz sampling rate to 12-bits. The digitized data from all channels are first fed through Field Programmable Gate Arrays (FPGAs), and then stored in memories. These raw data are accessed by the beamforming processor to re-build the image or to be downloaded to the PC for further processing. The beamformer that applies delays to the echoes of each channel is implemented with the strategy that combines coarse (8.3ns) and fine delays (2 ns). The coarse delays are integer multiples of the sampling clock rate and are achieved by controlling the write enable pin of the First-In-First-Out (FIFO) memory to obtain valid beamforming data. The fine delays are accomplished with interpolation filters. This system is capable of achieving a maximum frame rate of 50 frames per second. Wire phantom images acquired with this system show a spatial resolution of 146 μm (lateral) and 54 μm (axial). Images with excised rabbit and pig eyeball as well as mouse embryo were also acquired to demonstrate its imaging capability. PMID:21684568

Multifunction display system, volume 1

NASA Technical Reports Server (NTRS)

1973-01-01

The design and construction of a multifunction display man/machine interface for use with a 4 pi IBM-360 System are described. The system is capable of displaying superimposed volatile alphanumeric and graphical data on a 512 x 512 element plasma panel, and holographically stored multicolor archival information. The volatile data may be entered from a keyboard or by means of an I/O interface to the 360 system. A 2-page memory local to the display is provided for storing the entered data. The archival data is stored as a phase hologram on a vinyl tape strip. This data is accessible by means of a rapid transport system which responds to inputs provided by the I/O channel on the keyboard. As many as 500 frames may be stored on a tape strip for access in under 6 seconds.

Dynamic storage in resource-scarce browsing multimedia applications

NASA Astrophysics Data System (ADS)

Elenbaas, Herman; Dimitrova, Nevenka

1998-10-01

In the convergence of information and entertainment there is a conflict between the consumer's expectation of fast access to high quality multimedia content through narrow bandwidth channels versus the size of this content. During the retrieval and information presentation of a multimedia application there are two problems that have to be solved: the limited bandwidth during transmission of the retrieved multimedia content and the limited memory for temporary caching. In this paper we propose an approach for latency optimization in information browsing applications. We proposed a method for flattening hierarchically linked documents in a manner convenient for network transport over slow channels to minimize browsing latency. Flattening of the hierarchy involves linearization, compression and bundling of the document nodes. After the transfer, the compressed hierarchy is stored on a local device where it can be partly unbundled to fit the caching limits at the local site while giving the user availability to the content.

Entanglement of spin waves among four quantum memories.

PubMed

Choi, K S; Goban, A; Papp, S B; van Enk, S J; Kimble, H J

2010-11-18

Quantum networks are composed of quantum nodes that interact coherently through quantum channels, and open a broad frontier of scientific opportunities. For example, a quantum network can serve as a 'web' for connecting quantum processors for computation and communication, or as a 'simulator' allowing investigations of quantum critical phenomena arising from interactions among the nodes mediated by the channels. The physical realization of quantum networks generically requires dynamical systems capable of generating and storing entangled states among multiple quantum memories, and efficiently transferring stored entanglement into quantum channels for distribution across the network. Although such capabilities have been demonstrated for diverse bipartite systems, entangled states have not been achieved for interconnects capable of 'mapping' multipartite entanglement stored in quantum memories to quantum channels. Here we demonstrate measurement-induced entanglement stored in four atomic memories; user-controlled, coherent transfer of the atomic entanglement to four photonic channels; and characterization of the full quadripartite entanglement using quantum uncertainty relations. Our work therefore constitutes an advance in the distribution of multipartite entanglement across quantum networks. We also show that our entanglement verification method is suitable for studying the entanglement order of condensed-matter systems in thermal equilibrium.

The dynamic interplay between acute psychosocial stress, emotion and autobiographical memory.

PubMed

Sheldon, Signy; Chu, Sonja; Nitschke, Jonas P; Pruessner, Jens C; Bartz, Jennifer A

2018-06-06

Although acute psychosocial stress can impact autobiographical memory retrieval, the nature of this effect is not entirely clear. One reason for this ambiguity is because stress can have opposing effects on the different stages of autobiographical memory retrieval. We addressed this issue by testing how acute stress affects three stages of the autobiographical memory retrieval - accessing, recollecting and reconsolidating a memory. We also investigate the influence of emotion valence on this effect. In a between-subjects design, participants were first exposed to an acute psychosocial stressor or a control task. Next, the participants were shown positive, negative or neutral retrieval cues and asked to access and describe autobiographical memories. After a three to four day delay, participants returned for a second session in which they described these autobiographical memories. During initial retrieval, stressed participants were slower to access memories than were control participants; moreover, cortisol levels were positively associated with response times to access positively-cued memories. There were no effects of stress on the amount of details used to describe memories during initial retrieval, but stress did influence memory detail during session two. During session two, stressed participants recovered significantly more details, particularly emotional ones, from the remembered events than control participants. Our results indicate that the presence of stress impairs the ability to access consolidated autobiographical memories; moreover, although stress has no effect on memory recollection, stress alters how recollected experiences are reconsolidated back into memory traces.

Side Channel Attacks on STTRAM and Low Overhead Countermeasures

DTIC Science & Technology

2017-03-20

introduce security vulnerabilities and expose the cache memory to side channel attacks. In this paper, we propose a side channel attack (SCA) model...where the adversary can monitor the supply current of the memory array to partially identify the sensi- tive cache data that is being read or written. We...propose solutions such as short retention STTRAM, obfuscation of SCA using 1-bit parity, multi-bit random write, and, neutral- izing the SCA using

Accessing Information in Working Memory: Can the Focus of Attention Grasp Two Elements at the Same Time?

ERIC Educational Resources Information Center

Oberauer, Klaus; Bialkova, Svetlana

2009-01-01

Processing information in working memory requires selective access to a subset of working-memory contents by a focus of attention. Complex cognition often requires joint access to 2 items in working memory. How does the focus select 2 items? Two experiments with an arithmetic task and 1 with a spatial task investigate time demands for successive…

78 FR 35645 - Certain Static Random Access Memories and Products Containing Same; Commission Determination...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-06-13

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination Affirming a Final Initial Determination..., and the sale within the United States after importation of certain static random access memories and...

Performance of convolutionally encoded noncoherent MFSK modem in fading channels

NASA Technical Reports Server (NTRS)

Modestino, J. W.; Mui, S. Y.

1976-01-01

The performance of a convolutionally encoded noncoherent multiple-frequency shift-keyed (MFSK) modem utilizing Viterbi maximum-likelihood decoding and operating on a fading channel is described. Both the lognormal and classical Rician fading channels are considered for both slow and time-varying channel conditions. Primary interest is in the resulting bit error rate as a function of the ratio between the energy per transmitted information bit and noise spectral density, parameterized by both the fading channel and code parameters. Fairly general upper bounds on bit error probability are provided and compared with simulation results in the two extremes of zero and infinite channel memory. The efficacy of simple block interleaving in combatting channel memory effects are thoroughly explored. Both quantized and unquantized receiver outputs are considered.

Quantum random access memory.

PubMed

Giovannetti, Vittorio; Lloyd, Seth; Maccone, Lorenzo

2008-04-25

A random access memory (RAM) uses n bits to randomly address N=2(n) distinct memory cells. A quantum random access memory (QRAM) uses n qubits to address any quantum superposition of N memory cells. We present an architecture that exponentially reduces the requirements for a memory call: O(logN) switches need be thrown instead of the N used in conventional (classical or quantum) RAM designs. This yields a more robust QRAM algorithm, as it in general requires entanglement among exponentially less gates, and leads to an exponential decrease in the power needed for addressing. A quantum optical implementation is presented.

78 FR 25767 - Certain Static Random Access Memories and Products Containing Same; Commission Determination To...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-05-02

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination To Review in Part a Final Initial... States after importation of certain static random access memories and products containing the same by...

Information transmission over an amplitude damping channel with an arbitrary degree of memory

NASA Astrophysics Data System (ADS)

D'Arrigo, Antonio; Benenti, Giuliano; Falci, Giuseppe; Macchiavello, Chiara

2015-12-01

We study the performance of a partially correlated amplitude damping channel acting on two qubits. We derive lower bounds for the single-shot classical capacity by studying two kinds of quantum ensembles, one which allows us to maximize the Holevo quantity for the memoryless channel and the other allowing the same task but for the full-memory channel. In these two cases we also show the amount of entanglement which is involved in achieving the maximum of the Holevo quantity. For the single-shot quantum capacity we discuss both a lower and an upper bound, achieving a good estimate for high values of the channel transmissivity. We finally compute the entanglement-assisted classical channel capacity.

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

2014-02-18

Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

System and method for programmable bank selection for banked memory subsystems

DOEpatents

Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

2010-09-07

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Channel doping concentration and cell program state dependence on random telegraph noise spatial and statistical distribution in 30 nm NAND flash memory

NASA Astrophysics Data System (ADS)

Tomita, Toshihiro; Miyaji, Kousuke

2015-04-01

The dependence of spatial and statistical distribution of random telegraph noise (RTN) in a 30 nm NAND flash memory on channel doping concentration NA and cell program state Vth is comprehensively investigated using three-dimensional Monte Carlo device simulation considering random dopant fluctuation (RDF). It is found that single trap RTN amplitude ΔVth is larger at the center of the channel region in the NAND flash memory, which is closer to the jellium (uniform) doping results since NA is relatively low to suppress junction leakage current. In addition, ΔVth peak at the center of the channel decreases in the higher Vth state due to the current concentration at the shallow trench isolation (STI) edges induced by the high vertical electrical field through the fringing capacitance between the channel and control gate. In such cases, ΔVth distribution slope λ cannot be determined by only considering RDF and single trap.

47 CFR 76.701 - Leased access channels.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 47 Telecommunication 4 2010-10-01 2010-10-01 false Leased access channels. 76.701 Section 76.701 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Cable Television Access § 76.701 Leased access channels. (a) Notwithstanding 47...

Design of a memory-access controller with 3.71-times-enhanced energy efficiency for Internet-of-Things-oriented nonvolatile microcontroller unit

NASA Astrophysics Data System (ADS)

Natsui, Masanori; Hanyu, Takahiro

2018-04-01

In realizing a nonvolatile microcontroller unit (MCU) for sensor nodes in Internet-of-Things (IoT) applications, it is important to solve the data-transfer bottleneck between the central processing unit (CPU) and the nonvolatile memory constituting the MCU. As one circuit-oriented approach to solving this problem, we propose a memory access minimization technique for magnetoresistive-random-access-memory (MRAM)-embedded nonvolatile MCUs. In addition to multiplexing and prefetching of memory access, the proposed technique realizes efficient instruction fetch by eliminating redundant memory access while considering the code length of the instruction to be fetched and the transition of the memory address to be accessed. As a result, the performance of the MCU can be improved while relaxing the performance requirement for the embedded MRAM, and compact and low-power implementation can be performed as compared with the conventional cache-based one. Through the evaluation using a system consisting of a general purpose 32-bit CPU and embedded MRAM, it is demonstrated that the proposed technique increases the peak efficiency of the system up to 3.71 times, while a 2.29-fold area reduction is achieved compared with the cache-based one.

76 FR 2336 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final Results of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-13

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory... administrative review of the countervailing duty order on dynamic random access memory semiconductors from the... following events have occurred since the publication of the preliminary results of this review. See Dynamic...

75 FR 20564 - Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-20

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit for Preliminary Results of Countervailing Duty... access memory semiconductors from the Republic of Korea, covering the period January 1, 2008 through...

Accessibility versus Accuracy in Retrieving Spatial Memory: Evidence for Suboptimal Assumed Headings

ERIC Educational Resources Information Center

Yerramsetti, Ashok; Marchette, Steven A.; Shelton, Amy L.

2013-01-01

Orientation dependence in spatial memory has often been interpreted in terms of accessibility: Object locations are encoded relative to a reference orientation that affords the most accurate access to spatial memory. An open question, however, is whether people naturally use this "preferred" orientation whenever recalling the space. We…

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

2014-11-04

Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

More than a feeling: Emotional cues impact the access and experience of autobiographical memories.

PubMed

Sheldon, Signy; Donahue, Julia

2017-07-01

Remembering is impacted by several factors of retrieval, including the emotional content of a memory cue. Here we tested how musical retrieval cues that differed on two dimensions of emotion-valence (positive and negative) and arousal (high and low)-impacted the following aspects of autobiographical memory recall: the response time to access a past personal event, the experience of remembering (ratings of memory vividness), the emotional content of a cued memory (ratings of event arousal and valence), and the type of event recalled (ratings of event energy, socialness, and uniqueness). We further explored how cue presentation affected autobiographical memory retrieval by administering cues of similar arousal and valence levels in a blocked fashion to one half of the tested participants, and randomly to the other half. We report three main findings. First, memories were accessed most quickly in response to musical cues that were highly arousing and positive in emotion. Second, we observed a relation between a cue and the elicited memory's emotional valence but not arousal; however, both the cue valence and arousal related to the nature of the recalled event. Specifically, high cue arousal led to lower memory vividness and uniqueness ratings, but cues with both high arousal and positive valence were associated with memories rated as more social and energetic. Finally, cue presentation impacted both how quickly and specifically memories were accessed and how cue valence affected the memory vividness ratings. The implications of these findings for views of how emotion directs the access to memories and the experience of remembering are discussed.

Optical memories in digital computing

NASA Technical Reports Server (NTRS)

Alford, C. O.; Gaylord, T. K.

1979-01-01

High capacity optical memories with relatively-high data-transfer rate and multiport simultaneous access capability may serve as basis for new computer architectures. Several computer structures that might profitably use memories are: a) simultaneous record-access system, b) simultaneously-shared memory computer system, and c) parallel digital processing structure.

SPECIAL ISSUE ON OPTICAL PROCESSING OF INFORMATION: Circulatory fibre-optic memory loop with a built-in service channel

NASA Astrophysics Data System (ADS)

Pilipovich, V. A.; Esman, A. K.; Goncharenko, I. A.; Posed'ko, V. S.; Solonovich, I. F.

1995-10-01

A method for increasing the information capacity and enhancing the reliability of information storage in a dynamic fibre-optic memory is proposed. An additional built-in channel with counterpropagating circulation of signals is provided for this purpose. This additional channel can be used to transmit both information and service signals, such as address words, clock signals, correcting sequences, etc. The possibility of compensating the attenuation of an information signal by stimulated Raman scattering is considered.

An Experimental Investigation of the Boundary Layer under Pack Ice

DTIC Science & Technology

1975-01-01

current-meter interface ( CMIF ) consists of a very stable, 20-Kllz crystal oscillator and counter, a master memory-address buffer, and a buffer for each...data channel to a specific location in the computer’s memory, The CMIF also generates computer interrupts at a rate determined by the program (12.8... CMIF can handle up to 128 channels and is designed so that even if all channels have simultaneous dipulses, the processing delay is less than .05 msec

Making working memory work: The effects of extended practice on focus capacity and the processes of updating, forward access, and random access

PubMed Central

Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul

2014-01-01

We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803

How intention and monitoring your thoughts influence characteristics of autobiographical memories.

PubMed

Barzykowski, Krystian; Staugaard, Søren Risløv

2018-05-01

Involuntary autobiographical memories come to mind effortlessly and unintended, but the mechanisms of their retrieval are not fully understood. We hypothesize that involuntary retrieval depends on memories that are highly accessible (e.g., intense, unusual, recent, rehearsed), while the elaborate search that characterizes voluntary retrieval also produces memories that are mundane, repeated or distant - memories with low accessibility. Previous research provides some evidence for this 'threshold hypothesis'. However, in almost every prior study, participants have been instructed to report only memories while ignoring other thoughts. It is possible that such an instruction can modify the phenomenological characteristics of involuntary memories. This study aimed to investigate the effects of retrieval intentionality (i.e., wanting to retrieve a memory) and selective monitoring (i.e., instructions to report only memories) on the phenomenology of autobiographical memories. Participants were instructed to (1) intentionally retrieve autobiographical memories, (2) intentionally retrieve any type of thought (3) wait for an autobiographical memory to spontaneously appear, or (4) wait for any type of thought to spontaneously appear. They rated the mental content on a number of phenomenological characteristics both during retrieval and retrospectively following retrieval. The results support the prediction that highly accessible memories mostly enter awareness unintended and without selective monitoring, while memories with low accessibility rely on intention and selective monitoring. We discuss the implications of these effects. © 2017 The British Psychological Society.

47 CFR 76.701 - Leased access channels.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 47 Telecommunication 4 2013-10-01 2013-10-01 false Leased access channels. 76.701 Section 76.701... CABLE TELEVISION SERVICE Cable Television Access § 76.701 Leased access channels. (a) Notwithstanding 47 U.S.C. 532(b)(2) (Communications Act of 1934, as amended, section 612), a cable operator, in...

Asymmetric underlap optimization of sub-10nm finfets for realizing energy-efficient logic and robust memories

NASA Astrophysics Data System (ADS)

Akkala, Arun Goud

Leakage currents in CMOS transistors have risen dramatically with technology scaling leading to significant increase in standby power consumption. Among the various transistor candidates, the excellent short channel immunity of Silicon double gate FinFETs have made them the best contender for successful scaling to sub-10nm nodes. For sub-10nm FinFETs, new quantum mechanical leakage mechanisms such as direct source to drain tunneling (DSDT) of charge carriers through channel potential energy barrier arising due to proximity of source/drain regions coupled with the high transport direction electric field is expected to dominate overall leakage. To counter the effects of DSDT and worsening short channel effects and to maintain Ion/ Ioff, performance and power consumption at reasonable values, device optimization techniques are necessary for deeply scaled transistors. In this work, source/drain underlapping of FinFETs has been explored using quantum mechanical device simulations as a potentially promising method to lower DSDT while maintaining the Ion/ Ioff ratio at acceptable levels. By adopting a device/circuit/system level co-design approach, it is shown that asymmetric underlapping, where the drain side underlap is longer than the source side underlap, results in optimal energy efficiency for logic circuits in near-threshold as well as standard, super-threshold operating regimes. In addition, read/write conflict in 6T SRAMs and the degradation in cell noise margins due to the low supply voltage can be mitigated by using optimized asymmetric underlapped n-FinFETs for the access transistor, thereby leading to robust cache memories. When gate-workfunction tuning is possible, using asymmetric underlapped n-FinFETs for both access and pull-down devices in an SRAM bit cell can lead to high-speed and low-leakage caches. Further, it is shown that threshold voltage degradation in the presence of Hot Carrier Injection (HCI) is less severe in asymmetric underlap n-FinFETs. A lifetime projection is carried out assuming that HCI is the major degradation mechanism and it is shown that a 3.4x improvement in device lifetime is possible over symmetric underlapped n-FinFET.

Nanocrystal floating gate memory with solution-processed indium-zinc-tin-oxide channel and colloidal silver nanocrystals

NASA Astrophysics Data System (ADS)

Hu, Quanli; Ha, Sang-Hyub; Lee, Hyun Ho; Yoon, Tae-Sik

2011-12-01

A nanocrystal (NC) floating gate memory with solution-processed indium-zinc-tin-oxide (IZTO) channel and silver (Ag) NCs embedded in thin gate dielectric layer (SiO2(30 nm)/Al2O3(3 nm)) was fabricated. Both the IZTO channel and colloidal Ag NC layers were prepared by spin-coating and subsequent annealing, and dip-coating process, respectively. A threshold voltage shift up to ~0.9 V, corresponding to the electron density of 6.5 × 1011 cm-2, at gate pulsing <=10 V was achieved by the charging of high density NCs. These results present the successful non-volatile memory characteristics of an oxide-semiconductor transistor fabricated through solution processes.

UPC++ Programmer’s Guide (v1.0 2017.9)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, J.; Baden, S.; Bonachea, D.

UPC++ is a C++11 library that provides Asynchronous Partitioned Global Address Space (APGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The APGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, APGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, allmore » operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less

UPC++ Programmer’s Guide, v1.0-2018.3.0

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, J.; Baden, S.; Bonachea, Dan

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operationsmore » that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less

The sodium-activated potassium channel Slack is required for optimal cognitive flexibility in mice.

PubMed

Bausch, Anne E; Dieter, Rebekka; Nann, Yvette; Hausmann, Mario; Meyerdierks, Nora; Kaczmarek, Leonard K; Ruth, Peter; Lukowski, Robert

2015-07-01

Kcnt1 encoded sodium-activated potassium channels (Slack channels) are highly expressed throughout the brain where they modulate the firing patterns and general excitability of many types of neurons. Increasing evidence suggests that Slack channels may be important for higher brain functions such as cognition and normal intellectual development. In particular, recent findings have shown that human Slack mutations produce very severe intellectual disability and that Slack channels interact directly with the Fragile X mental retardation protein (FMRP), a protein that when missing or mutated results in Fragile X syndrome (FXS), the most common form of inherited intellectual disability and autism in humans. We have now analyzed a recently developed Kcnt1 null mouse model in several behavioral tasks to assess which aspects of memory and learning are dependent on Slack. We demonstrate that Slack deficiency results in mildly altered general locomotor activity, but normal working memory, reference memory, as well as cerebellar control of motor functions. In contrast, we find that Slack channels are required for cognitive flexibility, including reversal learning processes and the ability to adapt quickly to unfamiliar situations and environments. Our data reveal that hippocampal-dependent spatial learning capabilities require the proper function of Slack channels. © 2015 Bausch et al.; Published by Cold Spring Harbor Laboratory Press.

The sodium-activated potassium channel Slack is required for optimal cognitive flexibility in mice

PubMed Central

Bausch, Anne E.; Dieter, Rebekka; Nann, Yvette; Hausmann, Mario; Meyerdierks, Nora; Kaczmarek, Leonard K.

2015-01-01

Kcnt1 encoded sodium-activated potassium channels (Slack channels) are highly expressed throughout the brain where they modulate the firing patterns and general excitability of many types of neurons. Increasing evidence suggests that Slack channels may be important for higher brain functions such as cognition and normal intellectual development. In particular, recent findings have shown that human Slack mutations produce very severe intellectual disability and that Slack channels interact directly with the Fragile X mental retardation protein (FMRP), a protein that when missing or mutated results in Fragile X syndrome (FXS), the most common form of inherited intellectual disability and autism in humans. We have now analyzed a recently developed Kcnt1 null mouse model in several behavioral tasks to assess which aspects of memory and learning are dependent on Slack. We demonstrate that Slack deficiency results in mildly altered general locomotor activity, but normal working memory, reference memory, as well as cerebellar control of motor functions. In contrast, we find that Slack channels are required for cognitive flexibility, including reversal learning processes and the ability to adapt quickly to unfamiliar situations and environments. Our data reveal that hippocampal-dependent spatial learning capabilities require the proper function of Slack channels. PMID:26077685

Information transmission in bosonic memory channels using Gaussian matrix-product states as near-optimal symbols

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schäfer, Joachim; Karpov, Evgueni; Cerf, Nicolas J.

2014-12-04

We seek for a realistic implementation of multimode Gaussian entangled states that can realize the optimal encoding for quantum bosonic Gaussian channels with memory. For a Gaussian channel with classical additive Markovian correlated noise and a lossy channel with non-Markovian correlated noise, we demonstrate the usefulness using Gaussian matrix-product states (GMPS). These states can be generated sequentially, and may, in principle, approximate well any Gaussian state. We show that we can achieve up to 99.9% of the classical Gaussian capacity with GMPS requiring squeezing parameters that are reachable with current technology. This may offer a way towards an experimental realization.

Method and apparatus for high speed data acquisition and processing

DOEpatents

Ferron, J.R.

1997-02-11

A method and apparatus are disclosed for high speed digital data acquisition. The apparatus includes one or more multiplexers for receiving multiple channels of digital data at a low data rate and asserting a multiplexed data stream at a high data rate, and one or more FIFO memories for receiving data from the multiplexers and asserting the data to a real time processor. Preferably, the invention includes two multiplexers, two FIFO memories, and a 64-bit bus connecting the FIFO memories with the processor. Each multiplexer receives four channels of 14-bit digital data at a rate of up to 5 MHz per channel, and outputs a data stream to one of the FIFO memories at a rate of 20 MHz. The FIFO memories assert output data in parallel to the 64-bit bus, thus transferring 14-bit data values to the processor at a combined rate of 40 MHz. The real time processor is preferably a floating-point processor which processes 32-bit floating-point words. A set of mask bits is prestored in each 32-bit storage location of the processor memory into which a 14-bit data value is to be written. After data transfer from the FIFO memories, mask bits are concatenated with each stored 14-bit data value to define a valid 32-bit floating-point word. Preferably, a user can select any of several modes for starting and stopping direct memory transfers of data from the FIFO memories to memory within the real time processor, by setting the content of a control and status register. 15 figs.

Method and apparatus for high speed data acquisition and processing

DOEpatents

Ferron, John R.

1997-01-01

A method and apparatus for high speed digital data acquisition. The apparatus includes one or more multiplexers for receiving multiple channels of digital data at a low data rate and asserting a multiplexed data stream at a high data rate, and one or more FIFO memories for receiving data from the multiplexers and asserting the data to a real time processor. Preferably, the invention includes two multiplexers, two FIFO memories, and a 64-bit bus connecting the FIFO memories with the processor. Each multiplexer receives four channels of 14-bit digital data at a rate of up to 5 MHz per channel, and outputs a data stream to one of the FIFO memories at a rate of 20 MHz. The FIFO memories assert output data in parallel to the 64-bit bus, thus transferring 14-bit data values to the processor at a combined rate of 40 MHz. The real time processor is preferably a floating-point processor which processes 32-bit floating-point words. A set of mask bits is prestored in each 32-bit storage location of the processor memory into which a 14-bit data value is to be written. After data transfer from the FIFO memories, mask bits are concatenated with each stored 14-bit data value to define a valid 32-bit floating-point word. Preferably, a user can select any of several modes for starting and stopping direct memory transfers of data from the FIFO memories to memory within the real time processor, by setting the content of a control and status register.

Mapping virtual addresses to different physical addresses for value disambiguation for thread memory access requests

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gala, Alan; Ohmacht, Martin

A multiprocessor system includes nodes. Each node includes a data path that includes a core, a TLB, and a first level cache implementing disambiguation. The system also includes at least one second level cache and a main memory. For thread memory access requests, the core uses an address associated with an instruction format of the core. The first level cache uses an address format related to the size of the main memory plus an offset corresponding to hardware thread meta data. The second level cache uses a physical main memory address plus software thread meta data to store the memorymore » access request. The second level cache accesses the main memory using the physical address with neither the offset nor the thread meta data after resolving speculation. In short, this system includes mapping of a virtual address to a different physical addresses for value disambiguation for different threads.« less

Channel MAC Protocol for Opportunistic Communication in Ad Hoc Wireless Networks

NASA Astrophysics Data System (ADS)

Ashraf, Manzur; Jayasuriya, Aruna; Perreau, Sylvie

2008-12-01

Despite significant research effort, the performance of distributed medium access control methods has failed to meet theoretical expectations. This paper proposes a protocol named "Channel MAC" performing a fully distributed medium access control based on opportunistic communication principles. In this protocol, nodes access the channel when the channel quality increases beyond a threshold, while neighbouring nodes are deemed to be silent. Once a node starts transmitting, it will keep transmitting until the channel becomes "bad." We derive an analytical throughput limit for Channel MAC in a shared multiple access environment. Furthermore, three performance metrics of Channel MAC—throughput, fairness, and delay—are analysed in single hop and multihop scenarios using NS2 simulations. The simulation results show throughput performance improvement of up to 130% with Channel MAC over IEEE 802.11. We also show that the severe resource starvation problem (unfairness) of IEEE 802.11 in some network scenarios is reduced by the Channel MAC mechanism.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Braiman, Yehuda; Neschke, Brendan; Nair, Niketh S.

Here, we study memory states of a circuit consisting of a small inductively coupled Josephson junction array and introduce basic (write, read, and reset) memory operations logics of the circuit. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics. We calculate stability diagrams of the zero-voltage states and outline memory states of the circuit. We also calculate access times and access energies for basic memory operations.

Is random access memory random?

NASA Technical Reports Server (NTRS)

Denning, P. J.

1986-01-01

Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

Distributed multiport memory architecture

NASA Technical Reports Server (NTRS)

Kohl, W. H. (Inventor)

1983-01-01

A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

A Component-Based FPGA Design Framework for Neuronal Ion Channel Dynamics Simulations

PubMed Central

Mak, Terrence S. T.; Rachmuth, Guy; Lam, Kai-Pui; Poon, Chi-Sang

2008-01-01

Neuron-machine interfaces such as dynamic clamp and brain-implantable neuroprosthetic devices require real-time simulations of neuronal ion channel dynamics. Field Programmable Gate Array (FPGA) has emerged as a high-speed digital platform ideal for such application-specific computations. We propose an efficient and flexible component-based FPGA design framework for neuronal ion channel dynamics simulations, which overcomes certain limitations of the recently proposed memory-based approach. A parallel processing strategy is used to minimize computational delay, and a hardware-efficient factoring approach for calculating exponential and division functions in neuronal ion channel models is used to conserve resource consumption. Performances of the various FPGA design approaches are compared theoretically and experimentally in corresponding implementations of the AMPA and NMDA synaptic ion channel models. Our results suggest that the component-based design framework provides a more memory economic solution as well as more efficient logic utilization for large word lengths, whereas the memory-based approach may be suitable for time-critical applications where a higher throughput rate is desired. PMID:17190033

M1-Muscarinic Receptors Promote Fear Memory Consolidation via Phospholipase C and the M-Current

PubMed Central

Young, Matthew B.

2014-01-01

Neuromodulators released during and after a fearful experience promote the consolidation of long-term memory for that experience. Because overconsolidation may contribute to the recurrent and intrusive memories of post-traumatic stress disorder, neuromodulatory receptors provide a potential pharmacological target for prevention. Stimulation of muscarinic receptors promotes memory consolidation in several conditioning paradigms, an effect primarily associated with the M1 receptor (M1R). However, neither inhibiting nor genetically disrupting M1R impairs the consolidation of cued fear memory. Using the M1R agonist cevimeline and antagonist telenzepine, as well as M1R knock-out mice, we show here that M1R, along with β2-adrenergic (β2AR) and D5-dopaminergic (D5R) receptors, regulates the consolidation of cued fear memory by redundantly activating phospholipase C (PLC) in the basolateral amygdala (BLA). We also demonstrate that fear memory consolidation in the BLA is mediated in part by neuromodulatory inhibition of the M-current, which is conducted by KCNQ channels and is known to be inhibited by muscarinic receptors. Manipulating the M-current by administering the KCNQ channel blocker XE991 or the KCNQ channel opener retigabine reverses the effects on consolidation caused by manipulating β2AR, D5R, M1R, and PLC. Finally, we show that cAMP and protein kinase A (cAMP/PKA) signaling relevant to this stage of consolidation is upstream of these neuromodulators and PLC, suggesting an important presynaptic role for cAMP/PKA in consolidation. These results support the idea that neuromodulatory regulation of ion channel activity and neuronal excitability is a critical mechanism for promoting consolidation well after acquisition has occurred. PMID:24478341

M1-muscarinic receptors promote fear memory consolidation via phospholipase C and the M-current.

PubMed

Young, Matthew B; Thomas, Steven A

2014-01-29

Neuromodulators released during and after a fearful experience promote the consolidation of long-term memory for that experience. Because overconsolidation may contribute to the recurrent and intrusive memories of post-traumatic stress disorder, neuromodulatory receptors provide a potential pharmacological target for prevention. Stimulation of muscarinic receptors promotes memory consolidation in several conditioning paradigms, an effect primarily associated with the M1 receptor (M1R). However, neither inhibiting nor genetically disrupting M1R impairs the consolidation of cued fear memory. Using the M1R agonist cevimeline and antagonist telenzepine, as well as M1R knock-out mice, we show here that M1R, along with β2-adrenergic (β2AR) and D5-dopaminergic (D5R) receptors, regulates the consolidation of cued fear memory by redundantly activating phospholipase C (PLC) in the basolateral amygdala (BLA). We also demonstrate that fear memory consolidation in the BLA is mediated in part by neuromodulatory inhibition of the M-current, which is conducted by KCNQ channels and is known to be inhibited by muscarinic receptors. Manipulating the M-current by administering the KCNQ channel blocker XE991 or the KCNQ channel opener retigabine reverses the effects on consolidation caused by manipulating β2AR, D5R, M1R, and PLC. Finally, we show that cAMP and protein kinase A (cAMP/PKA) signaling relevant to this stage of consolidation is upstream of these neuromodulators and PLC, suggesting an important presynaptic role for cAMP/PKA in consolidation. These results support the idea that neuromodulatory regulation of ion channel activity and neuronal excitability is a critical mechanism for promoting consolidation well after acquisition has occurred.

Transient Hippocampal Down-Regulation of Kv1.1 Subunit mRNA during Associative Learning in Rats

ERIC Educational Resources Information Center

Kourrich, Said; Manrique, Christine; Salin, Pascal; Mourre, Christiane

2005-01-01

Voltage-gated potassium channels (Kv) are critically involved in learning and memory processes. It is not known, however, whether the expression of the Kv1.1 subunit, constituting Kv1 channels, can be specifically regulated in brain areas important for learning and memory processing. Radioactive in situ hybridization was used to evaluate the…

Ferroelectric FET for nonvolatile memory application with two-dimensional MoSe2 channels

NASA Astrophysics Data System (ADS)

Wang, Xudong; Liu, Chunsen; Chen, Yan; Wu, Guangjian; Yan, Xiao; Huang, Hai; Wang, Peng; Tian, Bobo; Hong, Zhenchen; Wang, Yutao; Sun, Shuo; Shen, Hong; Lin, Tie; Hu, Weida; Tang, Minghua; Zhou, Peng; Wang, Jianlu; Sun, Jinglan; Meng, Xiangjian; Chu, Junhao; Li, Zheng

2017-06-01

Graphene and other two-dimensional materials have received considerable attention regarding their potential applications in nano-electronics. Here, we report top-gate nonvolatile memory field-effect transistors (FETs) with different layers of MoSe2 nanosheets channel gated by ferroelectric film. The conventional gate dielectric of FETs was replaced by a ferroelectric thin film that provides a ferroelectric polarization electric field, and therefore defined as an Fe-FET where the poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) was used as the gate dielectric. Among the devices with MoSe2 channels of different thicknesses, the device with a single layer of MoSe2 exhibited a large hysteresis of electronic transport with an over 105 write/erase ratio, and displayed excellent retention and endurance performance. The possible mechanism of the device’s good properties was qualitatively analyzed using band theory. Additionally, a comprehensive study comparing the memory properties of MoSe2 channels of different thicknesses is presented. Increasing the numbers of MoSe2 layers was found to cause a reduced memory window. However, MoSe2 thickness of 5 nm yielded a write/erase ratio of more than 103. The results indicate that, based on a Fe-FET structure, the combination of two-dimensional semiconductors and organic ferroelectric gate dielectrics shows good promise for future applications in nonvolatile ferroelectric memory.

Making working memory work: the effects of extended practice on focus capacity and the processes of updating, forward access, and random access.

PubMed

Price, John M; Colflesh, Gregory J H; Cerella, John; Verhaeghen, Paul

2014-05-01

We investigated the effects of 10h of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. Copyright © 2014 Elsevier B.V. All rights reserved.

Investigation of field induced trapping on floating gates

NASA Technical Reports Server (NTRS)

Gosney, W. M.

1975-01-01

The development of a technology for building electrically alterable read only memories (EAROMs) or reprogrammable read only memories (RPROMs) using a single level metal gate p channel MOS process with all conventional processing steps is outlined. Nonvolatile storage of data is achieved by the use of charged floating gate electrodes. The floating gates are charged by avalanche injection of hot electrodes through gate oxide, and discharged by avalanche injection of hot holes through gate oxide. Three extra diffusion and patterning steps are all that is required to convert a standard p channel MOS process into a nonvolatile memory process. For identification, this nonvolatile memory technology was given the descriptive acronym DIFMOS which stands for Dual Injector, Floating gate MOS.

Verapamil enhances acute stress or glucocorticoid-induced deficits in retrieval of long-term memory in rats.

PubMed

Rashidy-Pour, Ali; Vafaei, Abbas Ali; Taherian, Abbas Ali; Miladi-Gorji, Hossein; Sadeghi, Hassan; Fathollahi, Yaghoub; Bandegi, Ahmad Reza

2009-10-12

This study was designed to investigate an interaction between acute restraint stress and corticosterone with verapamil, a blocker of L-type voltage-dependent calcium (VDC) channels on retrieval of long-term memory. Young adult male rats were trained in one trial inhibitory avoidance task (0.5 mA, 3 s footshock). On retention test given 48 h after training, the latency to re-enter dark compartment of the apparatus was recorded. In Experiment 1, verapamil pretreatment (5, 10, or 20 mg/kg) enhanced the impairing effects of acute stress (which was applied for 10 min in a Plexiglass tube 30 min before the retention test) on memory retrieval. The applied stress increased circulating corticosterone levels as assessed immediately after the retention test, indicating that stress-induced impairment of memory retrieval is mediated, in part, by increased plasma levels of glucocorticoids. Verapamil did not change this response. In Experiment 2, pretreatment of an intermediate dose of verapamil also enhanced corticosterone-induced impairment of memory retrieval. In Experiments 3 and 4, acute stress or corticosterone did not change motor activity with or without prior treatment of verapamil, suggesting that stress or glucocorticoid-induced impairment of memory retrieval is not due to any gross disturbances in motor performance of animals. These findings indicate that blockade of L-type VDC channels enhances stress or glucocorticoid-induced impairment of memory retrieval, and provide evidence for the existence of an interaction between glucocorticoids and L-type VDC channels on memory retrieval.

zorder-lib: Library API for Z-Order Memory Layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nowell, Lucy; Edward W. Bethel

2015-04-01

This document describes the motivation for, elements of, and use of the zorder-lib, a library API that implements organization of and access to data in memory using either a-order (also known as "row-major" order) or z-order memory layouts. The primary motivation for this work is to improve the performance of many types of data- intensive codes by increasing both spatial and temporal locality of memory accesses. The basic idea is that the cost associated with accessing a datum is less when it is nearby in either space or time.

Efficient accesses of data structures using processing near memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jayasena, Nuwan S.; Zhang, Dong Ping; Diez, Paula Aguilera

Systems, apparatuses, and methods for implementing efficient queues and other data structures. A queue may be shared among multiple processors and/or threads without using explicit software atomic instructions to coordinate access to the queue. System software may allocate an atomic queue and corresponding queue metadata in system memory and return, to the requesting thread, a handle referencing the queue metadata. Any number of threads may utilize the handle for accessing the atomic queue. The logic for ensuring the atomicity of accesses to the atomic queue may reside in a management unit in the memory controller coupled to the memory wheremore » the atomic queue is allocated.« less

Non-binary LDPC-coded modulation for high-speed optical metro networks with backpropagation

NASA Astrophysics Data System (ADS)

Arabaci, Murat; Djordjevic, Ivan B.; Saunders, Ross; Marcoccia, Roberto M.

2010-01-01

To simultaneously mitigate the linear and nonlinear channel impairments in high-speed optical communications, we propose the use of non-binary low-density-parity-check-coded modulation in combination with a coarse backpropagation method. By employing backpropagation, we reduce the memory in the channel and in return obtain significant reductions in the complexity of the channel equalizer which is exponentially proportional to the channel memory. We then compensate for the remaining channel distortions using forward error correction based on non-binary LDPC codes. We propose non-binary-LDPC-coded modulation scheme because, compared to bit-interleaved binary-LDPC-coded modulation scheme employing turbo equalization, the proposed scheme lowers the computational complexity and latency of the overall system while providing impressively larger coding gains.

Archiving and Near Real Time Visualization of USGS Instantaneous Data

NASA Astrophysics Data System (ADS)

Zaslavsky, I.; Ryan, D.; Whitenack, T.; Valentine, D. W.; Rodriguez, M.

2009-12-01

The CUAHSI Hydrologic Information System project has been developing databases, services and online and desktop software applications supporting standards-based publication and access to large volumes of hydrologic data from US federal agencies and academic partners. In particular, the CUAHSI WaterML 1.x schema specification for exchanging hydrologic time series, earlier published as an OGC Discussion Paper (2007), has been adopted by the United States Geological Survey to provide web service access to USGS daily values and instantaneous data. The latter service, making available raw measurements of discharge, gage height and several other parameters for over 10,000 USGS real time measurement points, was announced by USGS, as an experimental WaterML-compliant service, at the end of July 2009. We demonstrate an online application that leverages the new service for nearly continuous harvesting of USGS real time data, and simultaneous visualization and analysis of the data streams. To make this possible, we integrate service components of the CUAHSI software stack with Open Source Data Turbine (OSDT) system, an NSF-supported software environment for robust and scalable assimilation of multimedia data streams (e.g. from sensors), and interfacing with a variety of viewers, databases, archival systems and client applications. Our application continuously queries USGS Instantaneous water data service (which provides access to 15-min measurements updated at USGS every 4 hours), and maps the results for each station-variable combination to a separate "channel", which is used by OSDT to quickly access and manipulate the time series. About 15,000 channels are used, which makes it by far the largest deployment of OSDT. Using RealTime Data Viewer, users can now select one or more stations of interest (e.g. from upstream or downstream from each other), and observe and annotate simultaneous dynamics in the respective discharge and gage height values, using fast forward or backward modes, real-time mode, etc. Memory management, scheduling service-based retrieval from USGS web services, and organizing access to 7,330 selected stations, turned out to be the major challenges in this project. To allow station navigation, they are grouped by state and county in the user interface. Memory footprint has been monitored under different Java VM settings, to find the correct regime. These and other solutions are discussed in the paper, and accompanied with a series of examples of simultaneous visualization of discharge from multiple stations as a component of hydrologic analysis.

Working memory capacity and controlled serial memory search.

PubMed

Mızrak, Eda; Öztekin, Ilke

2016-08-01

The speed-accuracy trade-off (SAT) procedure was used to investigate the relationship between working memory capacity (WMC) and the dynamics of temporal order memory retrieval. High- and low-span participants (HSs, LSs) studied sequentially presented five-item lists, followed by two probes from the study list. Participants indicated the more recent probe. Overall, accuracy was higher for HSs compared to LSs. Crucially, in contrast to previous investigations that observed no impact of WMC on speed of access to item information in memory (e.g., Öztekin & McElree, 2010), recovery of temporal order memory was slower for LSs. While accessing an item's representation in memory can be direct, recovery of relational information such as temporal order information requires a more controlled serial memory search. Collectively, these data indicate that WMC effects are particularly prominent during high demands of cognitive control, such as serial search operations necessary to access temporal order information from memory. Copyright © 2016 Elsevier B.V. All rights reserved.

Heterogeneous Origins of Human Sleep Spindles in Different Cortical Layers.

PubMed

Hagler, Donald J; Ulbert, István; Wittner, Lucia; Erőss, Loránd; Madsen, Joseph R; Devinsky, Orrin; Doyle, Werner; Fabó, Dániel; Cash, Sydney S; Halgren, Eric

2018-03-21

Sleep spindles are a cardinal feature in human NREM sleep and may be important for memory consolidation. We studied the intracortical organization of spindles in men and women by recording spontaneous sleep spindles from different cortical layers using linear microelectrode arrays. Two patterns of spindle generation were identified using visual inspection, and confirmed with factor analysis. Spindles (10-16 Hz) were largest and most common in upper and middle channels, with limited involvement of deep channels. Many spindles were observed in only upper or only middle channels, but approximately half occurred in both. In spindles involving both middle and upper channels, the spindle envelope onset in middle channels led upper by ∼25-50 ms on average. The phase relationship between spindle waves in upper and middle channels varied dynamically within spindle epochs, and across individuals. Current source density analysis demonstrated that upper and middle channel spindles were both generated by an excitatory supragranular current sink while an additional deep source was present for middle channel spindles only. Only middle channel spindles were accompanied by deep low (25-50 Hz) and high (70-170 Hz) gamma activity. These results suggest that upper channel spindles are generated by supragranular pyramids, and middle channel by infragranular. Possibly, middle channel spindles are generated by core thalamocortical afferents, and upper channel by matrix. The concurrence of these patterns could reflect engagement of cortical circuits in the integration of more focal (core) and distributed (matrix) aspects of memory. These results demonstrate that at least two distinct intracortical systems generate human sleep spindles. SIGNIFICANCE STATEMENT Bursts of ∼14 Hz oscillations, lasting ∼1 s, have been recognized for over 80 years as cardinal features of mammalian sleep. Recent findings suggest that they play a key role in organizing cortical activity during memory consolidation. We used linear microelectrode arrays to study their intracortical organization in humans. We found that spindles could be divided into two types. One mainly engages upper layers of the cortex, which are considered to be specialized for associative activity. The other engages both upper and middle layers, including those devoted to sensory input. The interaction of these two spindle types may help organize the interaction of sensory and associative aspects of memory consolidation. Copyright © 2018 the authors 0270-6474/18/383013-13$15.00/0.

The potential of multi-port optical memories in digital computing

NASA Technical Reports Server (NTRS)

Alford, C. O.; Gaylord, T. K.

1975-01-01

A high-capacity memory with a relatively high data transfer rate and multi-port simultaneous access capability may serve as the basis for new computer architectures. The implementation of a multi-port optical memory is discussed. Several computer structures are presented that might profitably use such a memory. These structures include (1) a simultaneous record access system, (2) a simultaneously shared memory computer system, and (3) a parallel digital processing structure.

Saying what’s on your mind: Working memory effects on sentence production

PubMed Central

Slevc, L. Robert

2011-01-01

The role of working memory (WM) in sentence comprehension has received considerable interest, but little work has investigated how sentence production relies on memory mechanisms. These three experiments investigated speakers’ tendency to produce syntactic structures that allow for early production of material that is accessible in memory. In Experiment 1, speakers produced accessible information early less often when under a verbal WM load than when under no load. Experiment 2 found the same pattern for given-new ordering, i.e., when accessibility was manipulated by making information given. Experiment 3 addressed the possibility that these effects do not reflect WM mechanisms but rather increased task difficulty by relying on the distinction between verbal and spatial WM: Speakers’ tendency to produce sentences respecting given-new ordering was reduced more by a verbal than by a spatial WM load. These patterns show that accessibility effects do in fact reflect accessibility in verbal WM, and that representations in sentence production are vulnerable to interference from other information in memory. PMID:21767058

Working memory at work: how the updating process alters the nature of working memory transfer.

PubMed

Zhang, Yanmin; Verhaeghen, Paul; Cerella, John

2012-01-01

In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. Copyright © 2011 Elsevier B.V. All rights reserved.

Working Memory at Work: How the Updating Process Alters the Nature of Working Memory Transfer

PubMed Central

Zhang, Yanmin; Verhaeghen, Paul; Cerella, John

2011-01-01

In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. PMID:22105718

Novel Technologies for Next Generation Memory

DTIC Science & Technology

2013-07-25

charge in the capacitor) eventually fades unless the capacitor charge is refreshed , so the memory cells must be periodically refreshed (rewritten). The...reliability issues (such as poor data retention problem and refresh failure). In order to avoid those problems, a 3-dimensional channel structure...states during the refresh cycle (retention time). When the channel length is scaled down, it is difficult to guarantee sufficient retention time

Bioelectric memory: modeling resting potential bistability in amphibian embryos and mammalian cells.

PubMed

Law, Robert; Levin, Michael

2015-10-15

Bioelectric gradients among all cells, not just within excitable nerve and muscle, play instructive roles in developmental and regenerative pattern formation. Plasma membrane resting potential gradients regulate cell behaviors by regulating downstream transcriptional and epigenetic events. Unlike neurons, which fire rapidly and typically return to the same polarized state, developmental bioelectric signaling involves many cell types stably maintaining various levels of resting potential during morphogenetic events. It is important to begin to quantitatively model the stability of bioelectric states in cells, to understand computation and pattern maintenance during regeneration and remodeling. To facilitate the analysis of endogenous bioelectric signaling and the exploitation of voltage-based cellular controls in synthetic bioengineering applications, we sought to understand the conditions under which somatic cells can stably maintain distinct resting potential values (a type of state memory). Using the Channelpedia ion channel database, we generated an array of amphibian oocyte and mammalian membrane models for voltage evolution. These models were analyzed and searched, by simulation, for a simple dynamical property, multistability, which forms a type of voltage memory. We find that typical mammalian models and amphibian oocyte models exhibit bistability when expressing different ion channel subsets, with either persistent sodium or inward-rectifying potassium, respectively, playing a facilitative role in bistable memory formation. We illustrate this difference using fast sodium channel dynamics for which a comprehensive theory exists, where the same model exhibits bistability under mammalian conditions but not amphibian conditions. In amphibians, potassium channels from the Kv1.x and Kv2.x families tend to disrupt this bistable memory formation. We also identify some common principles under which physiological memory emerges, which suggest specific strategies for implementing memories in bioengineering contexts. Our results reveal conditions under which cells can stably maintain one of several resting voltage potential values. These models suggest testable predictions for experiments in developmental bioelectricity, and illustrate how cells can be used as versatile physiological memory elements in synthetic biology, and unconventional computation contexts.

Children's Access to Public Library Services: Prince George's County Memorial Public Library, Maryland, 1980.

ERIC Educational Resources Information Center

Gerhardt, Lillian N.

1981-01-01

Evaluates the Prince George's County Memorial Public Library's approach to providing access to its services for children, and examines policies, regulations, practices, and conditions that affect such access. Six references are cited. (FM)

NaNet: a configurable NIC bridging the gap between HPC and real-time HEP GPU computing

NASA Astrophysics Data System (ADS)

Lonardo, A.; Ameli, F.; Ammendola, R.; Biagioni, A.; Cotta Ramusino, A.; Fiorini, M.; Frezza, O.; Lamanna, G.; Lo Cicero, F.; Martinelli, M.; Neri, I.; Paolucci, P. S.; Pastorelli, E.; Pontisso, L.; Rossetti, D.; Simeone, F.; Simula, F.; Sozzi, M.; Tosoratto, L.; Vicini, P.

2015-04-01

NaNet is a FPGA-based PCIe Network Interface Card (NIC) design with GPUDirect and Remote Direct Memory Access (RDMA) capabilities featuring a configurable and extensible set of network channels. The design currently supports both standard—Gbe (1000BASE-T) and 10GbE (10Base-R)—and custom—34 Gbps APElink and 2.5 Gbps deterministic latency KM3link—channels, but its modularity allows for straightforward inclusion of other link technologies. The GPUDirect feature combined with a transport layer offload module and a data stream processing stage makes NaNet a low-latency NIC suitable for real-time GPU processing. In this paper we describe the NaNet architecture and its performances, exhibiting two of its use cases: the GPU-based low-level trigger for the RICH detector in the NA62 experiment at CERN and the on-/off-shore data transport system for the KM3NeT-IT underwater neutrino telescope.

What versus where: Investigating how autobiographical memory retrieval differs when accessed with thematic versus spatial information.

PubMed

Sheldon, Signy; Chu, Sonja

2017-09-01

Autobiographical memory research has investigated how cueing distinct aspects of a past event can trigger different recollective experiences. This research has stimulated theories about how autobiographical knowledge is accessed and organized. Here, we test the idea that thematic information organizes multiple autobiographical events whereas spatial information organizes individual past episodes by investigating how retrieval guided by these two forms of information differs. We used a novel autobiographical fluency task in which participants accessed multiple memory exemplars to event theme and spatial (location) cues followed by a narrative description task in which they described the memories generated to these cues. Participants recalled significantly more memory exemplars to event theme than to spatial cues; however, spatial cues prompted faster access to past memories. Results from the narrative description task revealed that memories retrieved via event theme cues compared to spatial cues had a higher number of overall details, but those recalled to the spatial cues were recollected with a greater concentration on episodic details than those retrieved via event theme cues. These results provide evidence that thematic information organizes and integrates multiple memories whereas spatial information prompts the retrieval of specific episodic content from a past event.

Considerations of digital phase modulation for narrowband satellite mobile communication

NASA Technical Reports Server (NTRS)

Grythe, Knut

1990-01-01

The Inmarsat-M system for mobile satellite communication is specified as a frequency division multiple access (FDMA) system, applying Offset Quadrature Phase Shift Keying (QPSK) for transmitting 8 kbit/sec in 10 kHz user channel bandwidth. We consider Digital Phase Modulation (DPM) as an alternative modulation format for INMARSAT-M. DPM is similar to Continuous Phase Modulation (CPM) except that DPM has a finite memory in the premodular filter with a continuous varying modulation index. It is shown that DPM with 64 states in the VA obtains a lower bit error rate (BER). Results for a 5 kHz system, with the same 8 kbit/sec transmitted bitstream, is also presented.

Channel Access in Erlang

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nicklaus, Dennis J.

2013-10-13

We have developed an Erlang language implementation of the Channel Access protocol. Included are low-level functions for encoding and decoding Channel Access protocol network packets as well as higher level functions for monitoring or setting EPICS process variables. This provides access to EPICS process variables for the Fermilab Acnet control system via our Erlang-based front-end architecture without having to interface to C/C++ programs and libraries. Erlang is a functional programming language originally developed for real-time telecommunications applications. Its network programming features and list management functions make it particularly well-suited for the task of managing multiple Channel Access circuits and PVmore » monitors.« less

Memory-efficient table look-up optimized algorithm for context-based adaptive variable length decoding in H.264/advanced video coding

NASA Astrophysics Data System (ADS)

Wang, Jianhua; Cheng, Lianglun; Wang, Tao; Peng, Xiaodong

2016-03-01

Table look-up operation plays a very important role during the decoding processing of context-based adaptive variable length decoding (CAVLD) in H.264/advanced video coding (AVC). However, frequent table look-up operation can result in big table memory access, and then lead to high table power consumption. Aiming to solve the problem of big table memory access of current methods, and then reduce high power consumption, a memory-efficient table look-up optimized algorithm is presented for CAVLD. The contribution of this paper lies that index search technology is introduced to reduce big memory access for table look-up, and then reduce high table power consumption. Specifically, in our schemes, we use index search technology to reduce memory access by reducing the searching and matching operations for code_word on the basis of taking advantage of the internal relationship among length of zero in code_prefix, value of code_suffix and code_lengh, thus saving the power consumption of table look-up. The experimental results show that our proposed table look-up algorithm based on index search can lower about 60% memory access consumption compared with table look-up by sequential search scheme, and then save much power consumption for CAVLD in H.264/AVC.

Garnet Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1995-01-01

Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

Development of Curie point switching for thin film, random access, memory device

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Tchernev, D. I.

1967-01-01

Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

NASA Astrophysics Data System (ADS)

Jovanović, B.; Brum, R. M.; Torres, L.

2014-04-01

After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

Individual differences in memory span: the contribution of rehearsal, access to lexical memory, and output speed.

PubMed

Tehan, G; Lalor, D M

2000-11-01

Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the subject population, have suggested other contributors to span performance, notably contributions from long-term memory and forgetting and retrieval processes occurring during recall. In the current research we explore individual differences in span with respect to measures of rehearsal, output time, and access to lexical memory. We replicate standard short-term phenomena; we show that the variables that influence children's span performance influence adult performance in the same way; and we show that lexical memory access appears to be a more potent source of individual differences in span than either rehearsal speed or output factors.

Adult Age Differences in Accessing and Retrieving Information from Long-Term Memory.

ERIC Educational Resources Information Center

Petros, Thomas V.; And Others

1983-01-01

Investigated adult age differences in accessing and retrieving information from long-term memory. Results showed that older adults (N=26) were slower than younger adults (N=35) at feature extraction, lexical access, and accessing category information. The age deficit was proportionally greater when retrieval of category information was required.…

Bubble memory module for spacecraft application

NASA Technical Reports Server (NTRS)

Hayes, P. J.; Looney, K. T.; Nichols, C. D.

1985-01-01

Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

Wide-Range Motion Estimation Architecture with Dual Search Windows for High Resolution Video Coding

NASA Astrophysics Data System (ADS)

Dung, Lan-Rong; Lin, Meng-Chun

This paper presents a memory-efficient motion estimation (ME) technique for high-resolution video compression. The main objective is to reduce the external memory access, especially for limited local memory resource. The reduction of memory access can successfully save the notorious power consumption. The key to reduce the memory accesses is based on center-biased algorithm in that the center-biased algorithm performs the motion vector (MV) searching with the minimum search data. While considering the data reusability, the proposed dual-search-windowing (DSW) approaches use the secondary windowing as an option per searching necessity. By doing so, the loading of search windows can be alleviated and hence reduce the required external memory bandwidth. The proposed techniques can save up to 81% of external memory bandwidth and require only 135 MBytes/sec, while the quality degradation is less than 0.2dB for 720p HDTV clips coded at 8Mbits/sec.

Nonlinear model for an optical read-only-memory disk readout channel based on an edge-spread function.

PubMed

Kobayashi, Seiji

2002-05-10

A point-spread function (PSF) is commonly used as a model of an optical disk readout channel. However, the model given by the PSF does not contain the quadratic distortion generated by the photo-detection process. We introduce a model for calculating an approximation of the quadratic component of a signal. We show that this model can be further simplified when a read-only-memory (ROM) disk is assumed. We introduce an edge-spread function by which a simple nonlinear model of an optical ROM disk readout channel is created.

Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation

NASA Astrophysics Data System (ADS)

Kim, Do-Bin; Kwon, Dae Woong; Kim, Seunghyun; Lee, Sang-Ho; Park, Byung-Gook

2018-02-01

To obtain high channel boosting potential and reduce a program disturbance in channel stacked NAND flash memory with layer selection by multilevel (LSM) operation, a new program scheme using boosted common source line (CSL) is proposed. The proposed scheme can be achieved by applying proper bias to each layer through its own CSL. Technology computer-aided design (TCAD) simulations are performed to verify the validity of the new method in LSM. Through TCAD simulation, it is revealed that the program disturbance characteristics is effectively improved by the proposed scheme.

Radiation Effects of Commercial Resistive Random Access Memories

NASA Technical Reports Server (NTRS)

Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

2014-01-01

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

Thermally driven microfluidic pumping via reversible shape memory polymers

NASA Astrophysics Data System (ADS)

Robertson, J. M.; Rodriguez, R. X.; Holmes, L. R., Jr.; Mather, P. T.; Wetzel, E. D.

2016-08-01

The need exists for autonomous microfluidic pumping systems that utilize environmental cues to transport fluid within a network of channels for such purposes as heat distribution, self-healing, or optical reconfiguration. Here, we report on reversible thermally driven microfluidic pumping enabled by two-way shape memory polymers. After developing a suitable shape memory polymer (SMP) through variation in the crosslink density, thin and flexible microfluidic devices were constructed by lamination of plastic films with channels defined by laser-cutting of double-sided adhesive film. SMP blisters integrated into the devices provide thermally driven pumping, while opposing elastic blisters are used to generate backpressure for reversible operation. Thermal cycling of the device was found to drive reversible fluid flow: upon heating to 60 °C, the SMP rapidly contracted to fill the surface channels with a transparent fluid, and upon cooling to 8 °C the flow reversed and the channel re-filled with black ink. Combined with a metallized backing layer, this device results in refection of incident light at high temperatures and absorption of light (at the portions covered with channels) at low temperatures. We discuss power-free, autonomous applications ranging from thermal regulation of structures to thermal indication via color change.

47 CFR 69.709 - Dedicated transport and special access services other than channel terminations between LEC end...

Code of Federal Regulations, 2010 CFR

2010-10-01

... transport and special access services other than channel terminations between LEC end offices and customer... services other than channel terminations between LEC end offices and customer premises, determined as... 47 Telecommunication 3 2010-10-01 2010-10-01 false Dedicated transport and special access services...

Accessibility Limits Recall from Visual Working Memory

ERIC Educational Resources Information Center

Rajsic, Jason; Swan, Garrett; Wilson, Daryl E.; Pratt, Jay

2017-01-01

In this article, we demonstrate limitations of accessibility of information in visual working memory (VWM). Recently, cued-recall has been used to estimate the fidelity of information in VWM, where the feature of a cued object is reproduced from memory (Bays, Catalao, & Husain, 2009; Wilken & Ma, 2004; Zhang & Luck, 2008). Response…

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

Acquisition and expression of memories of distance and direction in navigating wood ants.

PubMed

Fernandes, A Sofia D; Philippides, Andrew; Collett, Tom S; Niven, Jeremy E

2015-11-01

Wood ants, like other central place foragers, rely on route memories to guide them to and from a reliable food source. They use visual memories of the surrounding scene and probably compass information to control their direction. Do they also remember the length of their route and do they link memories of direction and distance? To answer these questions, we trained wood ant (Formica rufa) foragers in a channel to perform either a single short foraging route or two foraging routes in opposite directions. By shifting the starting position of the route within the channel, but keeping the direction and distance fixed, we tried to ensure that the ants would rely upon vector memories rather than visual memories to decide when to stop. The homeward memories that the ants formed were revealed by placing fed or unfed ants directly into a channel and assessing the direction and distance that they walked without prior performance of the food-ward leg of the journey. This procedure prevented the distance and direction walked being affected by a home vector derived from path integration. Ants that were unfed walked in the feeder direction. Fed ants walked in the opposite direction for a distance related to the separation between start and feeder. Vector memories of a return route can thus be primed by the ants' feeding state and expressed even when the ants have not performed the food-ward route. Tests on ants that have acquired two routes indicate that memories of the direction and distance of the return routes are linked, suggesting that they may be encoded by a common neural population within the ant brain. © 2015. Published by The Company of Biologists Ltd.

Device for modular input high-speed multi-channel digitizing of electrical data

DOEpatents

VanDeusen, Alan L.; Crist, Charles E.

1995-09-26

A multi-channel high-speed digitizer module converts a plurality of analog signals to digital signals (digitizing) and stores the signals in a memory device. The analog input channels are digitized simultaneously at high speed with a relatively large number of on-board memory data points per channel. The module provides an automated calibration based upon a single voltage reference source. Low signal noise at such a high density and sample rate is accomplished by ensuring the A/D converters are clocked at the same point in the noise cycle each time so that synchronous noise sampling occurs. This sampling process, in conjunction with an automated calibration, yields signal noise levels well below the noise level present on the analog reference voltages.

Non-tables look-up search algorithm for efficient H.264/AVC context-based adaptive variable length coding decoding

NASA Astrophysics Data System (ADS)

Han, Yishi; Luo, Zhixiao; Wang, Jianhua; Min, Zhixuan; Qin, Xinyu; Sun, Yunlong

2014-09-01

In general, context-based adaptive variable length coding (CAVLC) decoding in H.264/AVC standard requires frequent access to the unstructured variable length coding tables (VLCTs) and significant memory accesses are consumed. Heavy memory accesses will cause high power consumption and time delays, which are serious problems for applications in portable multimedia devices. We propose a method for high-efficiency CAVLC decoding by using a program instead of all the VLCTs. The decoded codeword from VLCTs can be obtained without any table look-up and memory access. The experimental results show that the proposed algorithm achieves 100% memory access saving and 40% decoding time saving without degrading video quality. Additionally, the proposed algorithm shows a better performance compared with conventional CAVLC decoding, such as table look-up by sequential search, table look-up by binary search, Moon's method, and Kim's method.

The two faces of selective memory retrieval: recall specificity of the detrimental but not the beneficial effect.

PubMed

Bäuml, Karl-Heinz T; Dobler, Ina M

2015-01-01

Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas recall specificity of the beneficial effect has not been examined to date. Addressing the issue, we compared in 2 experiments the effects of retrieval and restudy on recall of other items, when access to the study context was (largely) maintained and when access to the study context was impaired (in Experiment 1 by using the listwise directed-forgetting task, in Experiment 2 by using a prolonged retention interval). In both experiments, selective retrieval but not restudy induced forgetting of other items when context access was maintained, which replicates prior work. In contrast, when context access was impaired, both selective retrieval and restudy induced beneficial effects on other memories. These findings suggest that the detrimental but not the beneficial effect of selective memory retrieval is recall specific. The results are consistent with a recent 2-factor account of selective memory retrieval that attributes the detrimental effect to inhibition or blocking but the beneficial effect to context reactivation processes. PsycINFO Database Record (c) 2015 APA, all rights reserved.

Low latency memory access and synchronization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less

Low latency memory access and synchronization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Bach processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less

77 FR 20750 - Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel, MD

Federal Register 2010, 2011, 2012, 2013, 2014

2012-04-06

...-AA08 Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel, MD...'' triathlon, a marine event to be held on the waters of the Potomac River in Prince George's County, Maryland... portion of the Potomac River and National Harbor Access Channel during the event. DATES: Comments and...

77 FR 42464 - Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel, MD

Federal Register 2010, 2011, 2012, 2013, 2014

2012-07-19

...--AA08 Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel, MD... Harbor'' triathlon, a marine event to be held on the waters of the Potomac River in Prince George's...; Potomac River, National Harbor Access Channel, MD'' in the Federal Register (77 FR 20750). The rulemaking...

An Adaptive Channel Access Method for Dynamic Super Dense Wireless Sensor Networks.

PubMed

Lei, Chunyang; Bie, Hongxia; Fang, Gengfa; Zhang, Xuekun

2015-12-03

Super dense and distributed wireless sensor networks have become very popular with the development of small cell technology, Internet of Things (IoT), Machine-to-Machine (M2M) communications, Vehicular-to-Vehicular (V2V) communications and public safety networks. While densely deployed wireless networks provide one of the most important and sustainable solutions to improve the accuracy of sensing and spectral efficiency, a new channel access scheme needs to be designed to solve the channel congestion problem introduced by the high dynamics of competing nodes accessing the channel simultaneously. In this paper, we firstly analyzed the channel contention problem using a novel normalized channel contention analysis model which provides information on how to tune the contention window according to the state of channel contention. We then proposed an adaptive channel contention window tuning algorithm in which the contention window tuning rate is set dynamically based on the estimated channel contention level. Simulation results show that our proposed adaptive channel access algorithm based on fast contention window tuning can achieve more than 95 % of the theoretical optimal throughput and 0 . 97 of fairness index especially in dynamic and dense networks.

Plated wire random access memories

NASA Technical Reports Server (NTRS)

Gouldin, L. D.

1975-01-01

A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

The Dynamics of Access to Groups in Working Memory

ERIC Educational Resources Information Center

Farrell, Simon; Lelievre, Anna

2012-01-01

The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the…

Cyclic Nucleotide-Gated Channels, Calmodulin, Adenylyl Cyclase, and Calcium/Calmodulin-Dependent Protein Kinase II Are Required for Late, but Not Early, Long-Term Memory Formation in the Honeybee

ERIC Educational Resources Information Center

Matsumoto, Yukihisa; Sandoz, Jean-Christophe; Devaud, Jean-Marc; Lormant, Flore; Mizunami, Makoto; Giurfa, Martin

2014-01-01

Memory is a dynamic process that allows encoding, storage, and retrieval of information acquired through individual experience. In the honeybee "Apis mellifera," olfactory conditioning of the proboscis extension response (PER) has shown that besides short-term memory (STM) and mid-term memory (MTM), two phases of long-term memory (LTM)…

Performance of FORTRAN floating-point operations on the Flex/32 multicomputer

NASA Technical Reports Server (NTRS)

Crockett, Thomas W.

1987-01-01

A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory.

Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

NASA Astrophysics Data System (ADS)

She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

2013-09-01

Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

Exploiting Phase Diversity for CDMA2000 1X Smart Antenna Base Stations

NASA Astrophysics Data System (ADS)

Kim, Seongdo; Hyeon, Seungheon; Choi, Seungwon

2004-12-01

A performance analysis of an access channel decoder is presented which exploits a diversity gain due to the independent magnitude of received signals energy at each of the antenna elements of a smart-antenna base-station transceiver subsystem (BTS) operating in CDMA2000 1X signal environment. The objective is to enhance the data retrieval at cellsite during the access period, for which the optimal weight vector of the smart antenna BTS is not available. It is shown in this paper that the access channel decoder proposed in this paper outperforms the conventional one, which is based on a single antenna channel in terms of detection probability of access probe, access channel failure probability, and Walsh-code demodulation performance.

Reproductive health information for young women in Kazakhstan: disparities in access by channel.

PubMed

Buckley, Cynthia; Barrett, Jennifer; Adkins, Kristen

2008-01-01

This study explores young women's reliance on reproductive and sexual health information channels, examining the relationship between information sources and reproductive health knowledge. Utilizing 1995 and 1999 Kazakhstan Demographic and Health Surveys, we investigate access to reproductive health knowledge among young women (ages 15-24) during a key period in the development of wide-scale reproductive health programs in Kazakhstan. Despite reproductive health campaigns throughout the 1990s, we find consistently high proportions of young women without family planning information access. Among young women with access to information, few received information from channels most strongly linked to knowledge and behavioral changes (family and medical professionals). Mass media sources and peer information networks remained the most often utilized channels. Urban residence, non-Kazakh ethnicity, older age (20-24), and higher education significantly increased the odds of accessing family planning information among young Kazakhstani women, and these same factors were especially important in terms of the relative odds of accessing medical and parental channels. While overall contraceptive knowledge and prevalence rose in Kazakhstan during the 1990s, we find knowledge varied by the information channel accessed. Findings also indicate that young women, regardless of marital status, possessed consistently low levels of reproductive health knowledge at the decade's end.

Improving the effectiveness of an interruption lag by inducing a memory-based strategy.

PubMed

Morgan, Phillip L; Patrick, John; Tiley, Leyanne

2013-01-01

The memory for goals model (Altmann & Trafton, 2002) posits the importance of a short delay (the 'interruption lag') before an interrupting task to encode suspended goals for retrieval post-interruption. Two experiments used the theory of soft constraints (Gray, Simms, Fu & Schoelles, 2006) to investigate whether the efficacy of an interruption lag could be improved by increasing goal-state access cost to induce a more memory-based encoding strategy. Both experiments used a copying task with three access cost conditions (Low, Medium, and High) and a 5-s interruption lag with a no lag control condition. Experiment 1 found that the participants in the High access cost condition resumed more interrupted trials and executed more actions correctly from memory when coupled with an interruption lag. Experiment 2 used a prospective memory test post-interruption and an eyetracker recorded gaze activity during the interruption lag. The participants in the High access cost condition with an interruption lag were best at encoding target information during the interruption lag, evidenced by higher scores on the prospective memory measure and more gaze activity on the goal-state during the interruption lag. Theoretical and practical issues regarding the use of goal-state access cost and an interruption lag are discussed. Copyright © 2012. Published by Elsevier B.V.

Programmable Direct-Memory-Access Controller

NASA Technical Reports Server (NTRS)

Hendry, David F.

1990-01-01

Proposed programmable direct-memory-access controller (DMAC) operates with computer systems of 32000 series, which have 32-bit data buses and use addresses of 24 (or potentially 32) bits. Controller functions with or without help of central processing unit (CPU) and starts itself. Includes such advanced features as ability to compare two blocks of memory for equality and to search block of memory for specific value. Made as single very-large-scale integrated-circuit chip.

A Low Collision and High Throughput Data Collection Mechanism for Large-Scale Super Dense Wireless Sensor Networks.

PubMed

Lei, Chunyang; Bie, Hongxia; Fang, Gengfa; Gaura, Elena; Brusey, James; Zhang, Xuekun; Dutkiewicz, Eryk

2016-07-18

Super dense wireless sensor networks (WSNs) have become popular with the development of Internet of Things (IoT), Machine-to-Machine (M2M) communications and Vehicular-to-Vehicular (V2V) networks. While highly-dense wireless networks provide efficient and sustainable solutions to collect precise environmental information, a new channel access scheme is needed to solve the channel collision problem caused by the large number of competing nodes accessing the channel simultaneously. In this paper, we propose a space-time random access method based on a directional data transmission strategy, by which collisions in the wireless channel are significantly decreased and channel utility efficiency is greatly enhanced. Simulation results show that our proposed method can decrease the packet loss rate to less than 2 % in large scale WSNs and in comparison with other channel access schemes for WSNs, the average network throughput can be doubled.

Controlling the loss of quantum correlations via quantum memory channels

NASA Astrophysics Data System (ADS)

Duran, Durgun; Verçin, Abdullah

2018-07-01

A generic behavior of quantum correlations during any quantum process taking place in a noisy environment is that they are non-increasing. We have shown that mitigation of these decreases providing relative enhancements in correlations is possible by means of quantum memory channels which model correlated environmental quantum noises. For two-qubit systems subject to mixtures of two-use actions of different decoherence channels we point out that improvement in correlations can be achieved in such way that the input-output fidelity is also as high as possible. These make it possible to create the optimal conditions in realizing any quantum communication task in a noisy environment.

Endurance degradation and lifetime model of p-channel floating gate flash memory device with 2T structure

NASA Astrophysics Data System (ADS)

Wei, Jiaxing; Liu, Siyang; Liu, Xiaoqiang; Sun, Weifeng; Liu, Yuwei; Liu, Xiaohong; Hou, Bo

2017-08-01

The endurance degradation mechanisms of p-channel floating gate flash memory device with two-transistor (2T) structure are investigated in detail in this work. With the help of charge pumping (CP) measurements and Sentaurus TCAD simulations, the damages in the drain overlap region along the tunnel oxide interface caused by band-to-band (BTB) tunneling programming and the damages in the channel region resulted from Fowler-Nordheim (FN) tunneling erasure are verified respectively. Furthermore, the lifetime model of endurance characteristic is extracted, which can extrapolate the endurance degradation tendency and predict the lifetime of the device.

Device for modular input high-speed multi-channel digitizing of electrical data

DOEpatents

VanDeusen, A.L.; Crist, C.E.

1995-09-26

A multi-channel high-speed digitizer module converts a plurality of analog signals to digital signals (digitizing) and stores the signals in a memory device. The analog input channels are digitized simultaneously at high speed with a relatively large number of on-board memory data points per channel. The module provides an automated calibration based upon a single voltage reference source. Low signal noise at such a high density and sample rate is accomplished by ensuring the A/D converters are clocked at the same point in the noise cycle each time so that synchronous noise sampling occurs. This sampling process, in conjunction with an automated calibration, yields signal noise levels well below the noise level present on the analog reference voltages. 1 fig.

Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Gaeke, Brian R.; Husbands, Parry; Li, Xiaoye S.; Oliker, Leonid; Yelick, Katherine A.; Biegel, Bryan (Technical Monitor)

2002-01-01

The increasing gap between processor and memory performance has lead to new architectural models for memory-intensive applications. In this paper, we explore the performance of a set of memory-intensive benchmarks and use them to compare the performance of conventional cache-based microprocessors to a mixed logic and DRAM processor called VIRAM. The benchmarks are based on problem statements, rather than specific implementations, and in each case we explore the fundamental hardware requirements of the problem, as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. The benchmarks are characterized by their memory access patterns, their basic control structures, and the ratio of computation to memory operation.

Triple-server blind quantum computation using entanglement swapping

NASA Astrophysics Data System (ADS)

Li, Qin; Chan, Wai Hong; Wu, Chunhui; Wen, Zhonghua

2014-04-01

Blind quantum computation allows a client who does not have enough quantum resources or technologies to achieve quantum computation on a remote quantum server such that the client's input, output, and algorithm remain unknown to the server. Up to now, single- and double-server blind quantum computation have been considered. In this work, we propose a triple-server blind computation protocol where the client can delegate quantum computation to three quantum servers by the use of entanglement swapping. Furthermore, the three quantum servers can communicate with each other and the client is almost classical since one does not require any quantum computational power, quantum memory, and the ability to prepare any quantum states and only needs to be capable of getting access to quantum channels.

Some pitfalls in measuring memory in animals.

PubMed

Thorpe, Christina M; Jacova, Claudia; Wilkie, Donald M

2004-11-01

Because the presence or absence of memories in the brain cannot be directly observed, scientists must rely on indirect measures and use inferential reasoning to make statements about the status of memories. In humans, memories are often accessed through spoken or written language. In animals, memory is accessed through overt behaviours such as running down an arm in a maze, pressing a lever, or visiting a food cache site. Because memory is measured by these indirect methods, errors in the veracity of statements about memory can occur. In this brief paper, we identify three areas that may serve as pitfalls in reasoning about memory in animals: (1) the presence of 'silent associations', (2) intrusions of species-typical behaviours on memory tasks, and (3) improper mapping between human and animals memory tasks. There are undoubtedly other areas in which scientists should act cautiously when reasoning about the status of memory.

A Decision Model for Selection of Microcomputers and Operating Systems.

DTIC Science & Technology

1984-06-01

is resilting in application software (for microccmputers) being developed almost exclu- sively tor the IBM PC and compatiole systems. NAVDAC ielt that...location can be indepen- dently accessed. RAN memory is also often called read/ write memory, hecause new information can be written into and read from...when power is lost; this is also read/ write memory. Bubble memory, however, has significantly slower access times than RAM or RON and also is not preva

Phosphorylation of K[superscript +] Channels at Single Residues Regulates Memory Formation

ERIC Educational Resources Information Center

Vernon, Jeffrey; Irvine, Elaine E.; Peters, Marco; Jeyabalan, Jeshmi; Giese, K. Peter

2016-01-01

Phosphorylation is a ubiquitous post-translational modification of proteins, and a known physiological regulator of K[superscript +] channel function. Phosphorylation of K[superscript +] channels by kinases has long been presumed to regulate neuronal processing and behavior. Although circumstantial evidence has accumulated from behavioral studies…

Memory-induced nonlinear dynamics of excitation in cardiac diseases.

PubMed

Landaw, Julian; Qu, Zhilin

2018-04-01

Excitable cells, such as cardiac myocytes, exhibit short-term memory, i.e., the state of the cell depends on its history of excitation. Memory can originate from slow recovery of membrane ion channels or from accumulation of intracellular ion concentrations, such as calcium ion or sodium ion concentration accumulation. Here we examine the effects of memory on excitation dynamics in cardiac myocytes under two diseased conditions, early repolarization and reduced repolarization reserve, each with memory from two different sources: slow recovery of a potassium ion channel and slow accumulation of the intracellular calcium ion concentration. We first carry out computer simulations of action potential models described by differential equations to demonstrate complex excitation dynamics, such as chaos. We then develop iterated map models that incorporate memory, which accurately capture the complex excitation dynamics and bifurcations of the action potential models. Finally, we carry out theoretical analyses of the iterated map models to reveal the underlying mechanisms of memory-induced nonlinear dynamics. Our study demonstrates that the memory effect can be unmasked or greatly exacerbated under certain diseased conditions, which promotes complex excitation dynamics, such as chaos. The iterated map models reveal that memory converts a monotonic iterated map function into a nonmonotonic one to promote the bifurcations leading to high periodicity and chaos.

Memory-induced nonlinear dynamics of excitation in cardiac diseases

NASA Astrophysics Data System (ADS)

Landaw, Julian; Qu, Zhilin

2018-04-01

Excitable cells, such as cardiac myocytes, exhibit short-term memory, i.e., the state of the cell depends on its history of excitation. Memory can originate from slow recovery of membrane ion channels or from accumulation of intracellular ion concentrations, such as calcium ion or sodium ion concentration accumulation. Here we examine the effects of memory on excitation dynamics in cardiac myocytes under two diseased conditions, early repolarization and reduced repolarization reserve, each with memory from two different sources: slow recovery of a potassium ion channel and slow accumulation of the intracellular calcium ion concentration. We first carry out computer simulations of action potential models described by differential equations to demonstrate complex excitation dynamics, such as chaos. We then develop iterated map models that incorporate memory, which accurately capture the complex excitation dynamics and bifurcations of the action potential models. Finally, we carry out theoretical analyses of the iterated map models to reveal the underlying mechanisms of memory-induced nonlinear dynamics. Our study demonstrates that the memory effect can be unmasked or greatly exacerbated under certain diseased conditions, which promotes complex excitation dynamics, such as chaos. The iterated map models reveal that memory converts a monotonic iterated map function into a nonmonotonic one to promote the bifurcations leading to high periodicity and chaos.

MemAxes: Visualization and Analytics for Characterizing Complex Memory Performance Behaviors.

PubMed

Gimenez, Alfredo; Gamblin, Todd; Jusufi, Ilir; Bhatele, Abhinav; Schulz, Martin; Bremer, Peer-Timo; Hamann, Bernd

2018-07-01

Memory performance is often a major bottleneck for high-performance computing (HPC) applications. Deepening memory hierarchies, complex memory management, and non-uniform access times have made memory performance behavior difficult to characterize, and users require novel, sophisticated tools to analyze and optimize this aspect of their codes. Existing tools target only specific factors of memory performance, such as hardware layout, allocations, or access instructions. However, today's tools do not suffice to characterize the complex relationships between these factors. Further, they require advanced expertise to be used effectively. We present MemAxes, a tool based on a novel approach for analytic-driven visualization of memory performance data. MemAxes uniquely allows users to analyze the different aspects related to memory performance by providing multiple visual contexts for a centralized dataset. We define mappings of sampled memory access data to new and existing visual metaphors, each of which enabling a user to perform different analysis tasks. We present methods to guide user interaction by scoring subsets of the data based on known performance problems. This scoring is used to provide visual cues and automatically extract clusters of interest. We designed MemAxes in collaboration with experts in HPC and demonstrate its effectiveness in case studies.

Integrated semiconductor-magnetic random access memory system

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

2001-01-01

The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

Store-Operated Calcium Channel Complex in Postsynaptic Spines: A New Therapeutic Target for Alzheimer's Disease Treatment.

PubMed

Zhang, Hua; Sun, Suya; Wu, Lili; Pchitskaya, Ekaterina; Zakharova, Olga; Fon Tacer, Klementina; Bezprozvanny, Ilya

2016-11-23

Mushroom dendritic spine structures are essential for memory storage and the loss of mushroom spines may explain memory defects in aging and Alzheimer's disease (AD). The stability of mushroom spines depends on stromal interaction molecule 2 (STIM2)-mediated neuronal-store-operated Ca 2+ influx (nSOC) pathway, which is compromised in AD mouse models, in aging neurons, and in sporadic AD patients. Here, we demonstrate that the Transient Receptor Potential Canonical 6 (TRPC6) and Orai2 channels form a STIM2-regulated nSOC Ca 2+ channel complex in hippocampal mushroom spines. We further demonstrate that a known TRPC6 activator, hyperforin, and a novel nSOC positive modulator, NSN21778 (NSN), can stimulate activity of nSOC pathway in the spines and rescue mushroom spine loss in both presenilin and APP knock-in mouse models of AD. We further show that NSN rescues hippocampal long-term potentiation impairment in APP knock-in mouse model. We conclude that the STIM2-regulated TRPC6/Orai2 nSOC channel complex in dendritic mushroom spines is a new therapeutic target for the treatment of memory loss in aging and AD and that NSN is a potential candidate molecule for therapeutic intervention in brain aging and AD. Mushroom dendritic spine structures are essential for memory storage and the loss of mushroom spines may explain memory defects in Alzheimer's disease (AD). This study demonstrated that Transient Receptor Potential Canonical 6 (TRPC6) and Orai2 form stromal interaction molecule 2 (STIM2)-regulated neuronal-store-operated Ca 2+ influx (nSOC) channel complex in hippocampal synapse and the resulting Ca 2+ influx is critical for long-term maintenance of mushroom spines in hippocampal neurons. A novel nSOC-positive modulator, NSN21778 (NSN), rescues mushroom spine loss and synaptic plasticity impairment in AD mice models. The TRPC6/Orai2 nSOC channel complex is a new therapeutic target and NSN is a potential candidate molecule for therapeutic intervention in brain aging and AD. Copyright © 2016 the authors 0270-6474/16/3611837-14$15.00/0.

Memory effects in funnel ratchet of self-propelled particles

NASA Astrophysics Data System (ADS)

Hu, Cai-Tian; Wu, Jian-Chun; Ai, Bao-Quan

2017-05-01

The transport of self-propelled particles with memory effects is investigated in a two-dimensional periodic channel. Funnel-shaped barriers are regularly arrayed in the channel. Due to the asymmetry of the barriers, the self-propelled particles can be rectified. It is found that the memory effects of the rotational diffusion can strongly affect the rectified transport. The memory effects do not always break the rectified transport, and there exists an optimal finite value of correlation time at which the rectified efficiency takes its maximal value. We also find that the optimal values of parameters (the self-propulsion speed, the translocation diffusion coefficient, the rotational noise intensity, and the self-rotational diffusion coefficient) can facilitate the rectified transport. When introducing a finite load, particles with different self-propulsion speeds move to different directions and can be separated.

Fast, multi-channel real-time processing of signals with microsecond latency using graphics processing units.

PubMed

Rath, N; Kato, S; Levesque, J P; Mauel, M E; Navratil, G A; Peng, Q

2014-04-01

Fast, digital signal processing (DSP) has many applications. Typical hardware options for performing DSP are field-programmable gate arrays (FPGAs), application-specific integrated DSP chips, or general purpose personal computer systems. This paper presents a novel DSP platform that has been developed for feedback control on the HBT-EP tokamak device. The system runs all signal processing exclusively on a Graphics Processing Unit (GPU) to achieve real-time performance with latencies below 8 μs. Signals are transferred into and out of the GPU using PCI Express peer-to-peer direct-memory-access transfers without involvement of the central processing unit or host memory. Tests were performed on the feedback control system of the HBT-EP tokamak using forty 16-bit floating point inputs and outputs each and a sampling rate of up to 250 kHz. Signals were digitized by a D-TACQ ACQ196 module, processing done on an NVIDIA GTX 580 GPU programmed in CUDA, and analog output was generated by D-TACQ AO32CPCI modules.

A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

NASA Astrophysics Data System (ADS)

Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.

An Investigation of Unified Memory Access Performance in CUDA

PubMed Central

Landaverde, Raphael; Zhang, Tiansheng; Coskun, Ayse K.; Herbordt, Martin

2015-01-01

Managing memory between the CPU and GPU is a major challenge in GPU computing. A programming model, Unified Memory Access (UMA), has been recently introduced by Nvidia to simplify the complexities of memory management while claiming good overall performance. In this paper, we investigate this programming model and evaluate its performance and programming model simplifications based on our experimental results. We find that beyond on-demand data transfers to the CPU, the GPU is also able to request subsets of data it requires on demand. This feature allows UMA to outperform full data transfer methods for certain parallel applications and small data sizes. We also find, however, that for the majority of applications and memory access patterns, the performance overheads associated with UMA are significant, while the simplifications to the programming model restrict flexibility for adding future optimizations. PMID:26594668

Daily Access to Sucrose Impairs Aspects of Spatial Memory Tasks Reliant on Pattern Separation and Neural Proliferation in Rats

ERIC Educational Resources Information Center

Reichelt, Amy C.; Morris, Margaret J.; Westbrook, Reginald Frederick

2016-01-01

High sugar diets reduce hippocampal neurogenesis, which is required for minimizing interference between memories, a process that involves "pattern separation." We provided rats with 2 h daily access to a sucrose solution for 28 d and assessed their performance on a spatial memory task. Sucrose consuming rats discriminated between objects…

Encoding and Retrieval Processes Involved in the Access of Source Information in the Absence of Item Memory

ERIC Educational Resources Information Center

Ball, B. Hunter; DeWitt, Michael R.; Knight, Justin B.; Hicks, Jason L.

2014-01-01

The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were "related" to the target item but never actually studied.…

Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.

PubMed

Chacón, Alejandro; Marco-Sola, Santiago; Espinosa, Antonio; Ribeca, Paolo; Moure, Juan Carlos

2015-01-01

The recent advent of high-throughput sequencing machines producing big amounts of short reads has boosted the interest in efficient string searching techniques. As of today, many mainstream sequence alignment software tools rely on a special data structure, called the FM-index, which allows for fast exact searches in large genomic references. However, such searches translate into a pseudo-random memory access pattern, thus making memory access the limiting factor of all computation-efficient implementations, both on CPUs and GPUs. Here, we show that several strategies can be put in place to remove the memory bottleneck on the GPU: more compact indexes can be implemented by having more threads work cooperatively on larger memory blocks, and a k-step FM-index can be used to further reduce the number of memory accesses. The combination of those and other optimisations yields an implementation that is able to process about two Gbases of queries per second on our test platform, being about 8 × faster than a comparable multi-core CPU version, and about 3 × to 5 × faster than the FM-index implementation on the GPU provided by the recently announced Nvidia NVBIO bioinformatics library.

Human-induced stream channel abandonment/capture and filling of floodplain channels within the Atchafalaya River Basin, Louisiana

USGS Publications Warehouse

Kroes, Daniel E.; Kraemer, Thomas F.

2013-01-01

The Atchafalaya River Basin is a distributary system of the Mississippi River containing the largest riparian area in the lower Mississippi River Valley and the largest remaining forested bottomland in North America. Reductions in the area of open water in the Atchafalaya have been occurring over the last 100 years, and many historical waterways are increasingly filled by sediment. This study examines two cases of swamp channels (3/s) that are filling and becoming unnavigable as a result of high sediment loads and slow water velocities. The water velocities in natural bayous are further reduced because of flow capture by channels constructed for access. Bathymetry, flow, suspended sediment, deposited bottom-material, isotopes, and photointerpretation were used to characterize the channel fill. On average, water flowing through these two channels lost 23% of the suspended sediment load in the studied reaches. Along one of the studied reaches, two constructed access channels diverted significant flow out of the primary channel and into the adjacent swamp. Immediately downstream of each of the two access channels, the cross-sectional area of the studied channel was reduced. Isotopic analyses of bottom-material cores indicate that bed filling has been rapid and occurred after detectable levels of Cesium-137 were no longer being deposited. Interpretation of aerial photography indicates that water is bypassing the primary channels in favor of the more hydraulically efficient access channels, resulting in low or no-velocity flow conditions in the primary channel. These swamp channel conditions are typical in the Atchafalaya River Basin where relict large channel dimensions result in flow velocities that are normally too low to carry fine-grained sediment. Constructed channels increase the rate of natural channel avulsion and abandonment as a result of flow capture.

Advanced electronics for the CTF MEG system.

PubMed

McCubbin, J; Vrba, J; Spear, P; McKenzie, D; Willis, R; Loewen, R; Robinson, S E; Fife, A A

2004-11-30

Development of the CTF MEG system has been advanced with the introduction of a computer processing cluster between the data acquisition electronics and the host computer. The advent of fast processors, memory, and network interfaces has made this innovation feasible for large data streams at high sampling rates. We have implemented tasks including anti-alias filter, sample rate decimation, higher gradient balancing, crosstalk correction, and optional filters with a cluster consisting of 4 dual Intel Xeon processors operating on up to 275 channel MEG systems at 12 kHz sample rate. The architecture is expandable with additional processors to implement advanced processing tasks which may include e.g., continuous head localization/motion correction, optional display filters, coherence calculations, or real time synthetic channels (via beamformer). We also describe an electronics configuration upgrade to provide operator console access to the peripheral interface features such as analog signal and trigger I/O. This allows remote location of the acoustically noisy electronics cabinet and fitting of the cabinet with doors for improved EMI shielding. Finally, we present the latest performance results available for the CTF 275 channel MEG system including an unshielded SEF (median nerve electrical stimulation) measurement enhanced by application of an adaptive beamformer technique (SAM) which allows recognition of the nominal 20-ms response in the unaveraged signal.

Paging memory from random access memory to backing storage in a parallel computer

DOEpatents

Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

2013-05-21

Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

Optical mass memories

NASA Technical Reports Server (NTRS)

Bailey, G. A.

1976-01-01

Optical and magnetic variants in the design of trillion-bit read/write memories are compared and tabulated. Components and materials suitable for a random access read/write nonmoving memory system are examined, with preference given to holography and photoplastic materials. Advantages and deficiencies of photoplastics are reviewed. Holographic page composer design, essential features of an optical memory with no moving parts, fiche-oriented random access memory design, and materials suitable for an efficient photoplastic fiche are considered. The optical variants offer advantages in lower volume and weight at data transfer rates near 1 Mbit/sec, but power drain is of the same order as for the magnetic variants (tape memory, disk memory). The mechanical properties of photoplastic film materials still leave much to be desired.

Characteristics of a Nonvolatile SRAM Memory Cell Utilizing a Ferroelectric Transistor

NASA Technical Reports Server (NTRS)

Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2011-01-01

The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

BCH codes for large IC random-access memory systems

NASA Technical Reports Server (NTRS)

Lin, S.; Costello, D. J., Jr.

1983-01-01

In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.

76 FR 35238 - Notice of Receipt of Complaint; Solicitation of Comments Relating to the Public Interest

Federal Register 2010, 2011, 2012, 2013, 2014

2011-06-16

... Static Random Access Memories and Products Containing Same, DN 2816; the Commission is soliciting... importation of certain static random access memories and products containing same. The complaint names as...

Providing the Public with Online Access to Large Bibliographic Data Bases.

ERIC Educational Resources Information Center

Firschein, Oscar; Summit, Roger K.

DIALOG, an interactive, computer-based information retrieval language, consists of a series of computer programs designed to make use of direct access memory devices in order to provide the user with a rapid means of identifying records within a specific memory bank. Using the system, a library user can be provided access to sixteen distinct and…

3-DIMENSIONAL Optoelectronic

NASA Astrophysics Data System (ADS)

Krishnamoorthy, Ashok Venketaraman

This thesis covers the design, analysis, optimization, and implementation of optoelectronic (N,M,F) networks. (N,M,F) networks are generic space-division networks that are well suited to implementation using optoelectronic integrated circuits and free-space optical interconnects. An (N,M,F) networks consists of N input channels each having a fanout F_{rm o}, M output channels each having a fanin F_{rm i}, and Log_{rm K}(N/F) stages of K x K switches. The functionality of the fanout, switching, and fanin stages depends on the specific application. Three applications of optoelectronic (N,M,F) networks are considered. The first is an optoelectronic (N,1,1) content -addressable memory system that achieves associative recall on two-dimensional images retrieved from a parallel-access optical memory. The design and simulation of the associative memory are discussed, and an experimental emulation of a prototype system using images from a parallel-readout optical disk is presented. The system design provides superior performance to existing electronic content-addressable memory chips in terms of capacity and search rate, and uses readily available optical disk and VLSI technologies. Next, a scalable optoelectronic (N,M,F) neural network that uses free-space holographic optical interconnects is presented. The neural architecture minimizes the number of optical transmitters needed, and provides accurate electronic fanin with low signal skew, and dendritic-type fan-in processing capability in a compact layout. Optimal data-encoding methods and circuit techniques are discussed. The implementation of an prototype optoelectronic neural system, and its application to a simple recognition task is demonstrated. Finally, the design, analysis, and optimization of a (N,N,F) self-routing, packet-switched multistage interconnection network is described. The network is suitable for parallel computing and broadband switching applications. The tradeoff between optical and electronic interconnects is examined quantitatively by varying the electronic switch size K. The performance of the (N,N,F) network versus the fanning parameter F, is also analyzed. It is shown that the optoelectronic (N,N,F) networks provide a range of performance-cost alternatives, and offer superior performance-per-cost to fully electronic switching networks and to previous networks designs.

Evaluation of the non-Gaussianity of two-mode entangled states over a bosonic memory channel via cumulant theory and quadrature detection

NASA Astrophysics Data System (ADS)

Xiang, Shao-Hua; Wen, Wei; Zhao, Yu-Jing; Song, Ke-Hui

2018-04-01

We study the properties of the cumulants of multimode boson operators and introduce the phase-averaged quadrature cumulants as the measure of the non-Gaussianity of multimode quantum states. Using this measure, we investigate the non-Gaussianity of two classes of two-mode non-Gaussian states: photon-number entangled states and entangled coherent states traveling in a bosonic memory quantum channel. We show that such a channel can skew the distribution of two-mode quadrature variables, giving rise to a strongly non-Gaussian correlation. In addition, we provide a criterion to determine whether the distributions of these states are super- or sub-Gaussian.

High capacity low delay packet broadcasting multiaccess schemes for satellite repeater systems

NASA Astrophysics Data System (ADS)

Bose, S. K.

1980-12-01

Demand assigned packet radio schemes using satellite repeaters can achieve high capacities but often exhibit relatively large delays under low traffic conditions when compared to random access. Several schemes which improve delay performance at low traffic but which have high capacity are presented and analyzed. These schemes allow random acess attempts by users, who are waiting for channel assignments. The performance of these are considered in the context of a multiple point communication system carrying fixed length messages between geographically distributed (ground) user terminals which are linked via a satellite repeater. Channel assignments are done following a BCC queueing discipline by a (ground) central controller on the basis of requests correctly received over a collision type access channel. In TBACR Scheme A, some of the forward message channels are set aside for random access transmissions; the rest are used in a demand assigned mode. Schemes B and C operate all their forward message channels in a demand assignment mode but, by means of appropriate algorithms for trailer channel selection, allow random access attempts on unassigned channels. The latter scheme also introduces framing and slotting of the time axis to implement a more efficient algorithm for trailer channel selection than the former.

47 CFR 76.701 - Leased access channels.

Code of Federal Regulations, 2014 CFR

2014-10-01

... Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Cable Television Access § 76.701 Leased access channels. (a) Notwithstanding 47... reasonably believes, describes or depicts sexual or excretory activities or organs in a patently offensive...

47 CFR 76.701 - Leased access channels.

Code of Federal Regulations, 2012 CFR

2012-10-01

... Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Cable Television Access § 76.701 Leased access channels. (a) Notwithstanding 47... reasonably believes, describes or depicts sexual or excretory activities or organs in a patently offensive...

47 CFR 76.701 - Leased access channels.

Code of Federal Regulations, 2011 CFR

2011-10-01

... Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Cable Television Access § 76.701 Leased access channels. (a) Notwithstanding 47... reasonably believes, describes or depicts sexual or excretory activities or organs in a patently offensive...

The Neurochip-2: An Autonomous Head-Fixed Computer for Recording and Stimulating in Freely Behaving Monkeys

PubMed Central

Zanos, Stavros; Richardson, Andrew G.; Shupe, Larry; Miles, Frank P.; Fetz, Eberhard E.

2011-01-01

The Neurochip-2 is a second generation, battery-powered device for neural recording and stimulating that is small enough to be carried in a chamber on a monkey’s head. It has three recording channels, with user-adjustable gains, filters, and sampling rates, that can be optimized for recording single unit activity, local field potentials, electrocorticography, electromyography, arm acceleration, etc. Recorded data are stored on a removable, flash memory card. The Neurochip-2 also has three separate stimulation channels. Two “programmable-system-on-chips” (PSoCs) control the data acquisition and stimulus output. The PSoCs permit flexible real-time processing of the recorded data, such as digital filtering and time-amplitude window discrimination. The PSoCs can be programmed to deliver stimulation contingent on neural events or deliver preprogrammed stimuli. Access pins to the microcontroller are also available to connect external devices, such as accelerometers. The Neurochip-2 can record and stimulate autonomously for up to several days in freely behaving monkeys, enabling a wide range of novel neurophysiological and neuroengineering experiments. PMID:21632309

The role of calsenilin/DREAM/KChIP3 in contextual fear conditioning.

PubMed

Alexander, Jon C; McDermott, Carmel M; Tunur, Tumay; Rands, Vicky; Stelly, Claire; Karhson, Debra; Bowlby, Mark R; An, W Frank; Sweatt, J David; Schrader, Laura A

2009-03-01

Potassium channel interacting proteins (KChIPs) are members of a family of calcium binding proteins that interact with Kv4 potassium (K(+)) channel primary subunits and also act as transcription factors. The Kv4 subunit is a primary K(+) channel pore-forming subunit, which contributes to the somatic and dendritic A-type currents throughout the nervous system. These A-type currents play a key role in the regulation of neuronal excitability and dendritic processing of incoming synaptic information. KChIP3 is also known as calsenilin and as the transcription factor, downstream regulatory element antagonist modulator (DREAM), which regulates a number of genes including prodynorphin. KChIP3 and Kv4 primary channel subunits are highly expressed in hippocampus, an area of the brain important for learning and memory. Through its various functions, KChIP3 may play a role in the regulation of synaptic plasticity and learning and memory. We evaluated the role of KChIP3 in a hippocampus-dependent memory task, contextual fear conditioning. Male KChIP3 knockout (KO) mice showed significantly enhanced memory 24 hours after training as measured by percent freezing. In addition, we found that membrane association and interaction with Kv4.2 of KChIP3 protein was significantly decreased and nuclear KChIP3 expression was increased six hours after the fear conditioning training paradigm with no significant change in KChIP3 mRNA. In addition, prodynorphin mRNA expression was significantly decreased six hours after fear conditioning training in wild-type (WT) but not in KO animals. These data suggest a role for regulation of gene expression by KChIP3/DREAM/calsenilin in consolidation of contextual fear conditioning memories.

Memoris, A Wide Angle Camera For Bepicolombo

NASA Astrophysics Data System (ADS)

Cremonese, G.; Memoris Team

In order to answer to the Announcement of Opportunity of ESA for the BepiColombo payload, we are working on a wide angle camera concept named MEMORIS (MEr- cury MOderate Resolution Imaging System). MEMORIS will performe stereoscopic images of the whole Mercury surface using two different channels at +/- 20 degrees from the nadir point. It will achieve a spatial resolution of 50m per pixel at 400 km from the surface (peri-Herm), corresponding to a vertical resolution of about 75m with the stereo performances. The scientific objectives will be addressed by MEMORIS may be identified as follows: Estimate of surface age based on crater counting Crater morphology and degrada- tion Stratigraphic sequence of geological units Identification of volcanic features and related deposits Origin of plain units from morphological observations Distribution and type of the tectonic structures Determination of relative age among the structures based on cross-cutting relationships 3D Tectonics Global mineralogical mapping of main geological units Identification of weathering products The last two items will come from the multispectral capabilities of the camera utilizing 8 to 12 (TBD) broad band filters. MEMORIS will be equipped by a further channel devoted to the observations of the tenuous exosphere. It will look at the limb on a given arc of the BepiColombo orbit, in so doing it will observe the exosphere above a surface latitude range of 25-75 degrees in the northern emisphere. The exosphere images will be obtained above the surface just observed by the other two channels, trying to find possible relantionship, as ground-based observations suggest. The exospheric channel will have four narrow-band filters centered on the sodium and potassium emissions and the adjacent continua.

[Portable multi-purpose device for monitoring of physiological informations].

PubMed

Tamura, T; Togawa, T

1983-05-01

Unconstrained system that measures physiological information as skin temperatures and heart rate per unit time of a human subject was developed. The system contained portable device included memory control unit, instrumentation unit, timer and batteries, read-out unit, test unit and verify unit. Total number of data and channels, and interval were selected by switches in the memory control unit. The data from the instrumentation unit were transferred to memory control unit and stored in the Erasable Programmable ROM (EPROM). After measurement, EPROM chip was taken off the memory control unit and put on the read-out unit which transferred the data to the microcomputer. The data were directly calculated and analyzed by microcomputer. In application of the instrumentation unit, 8-channel skin thermometer was developed and tested. After amplification, 8 analog signals were multiplexed and converted into the binary codes. The digital signals were sequentially transferred to memory control unit and stored in the EPROM under controlled signal. The accuracy of the system is determined primarily by the accuracy of the sensor of instrumentation unit. The overall accuracy of 8-channel skin thermometer is conservatively stated within 0.1 degree C. This may prove to be useful in providing an objective measurement of human subjects, and can be used in studying environmental effect for human body and sport activities in a large population setting.

Social Desirability Bias in Smoking Cessation: Effects in the Laboratory and Field

DTIC Science & Technology

2012-03-16

and Child Health Journal, 2(2), 77-83. Bradburn, N., Rips, L., & Shevell, S. (1987). Answering autobiographical questions: the impact of memory ...how accessible smoking outcomes are in an individual’s memory . Research has shown that smokers tend to exhibit greater accessibility for positive...body of research that suggests that acute tobacco abstinence hinders cognitive functioning, such as attention, memory , information processing

Fast Magnetoresistive Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

Magnetoresistive binary digital memories of proposed new type expected to feature high speed, nonvolatility, ability to withstand ionizing radiation, high density, and low power. In memory cell, magnetoresistive effect exploited more efficiently by use of ferromagnetic material to store datum and adjacent magnetoresistive material to sense datum for readout. Because relative change in sensed resistance between "zero" and "one" states greater, shorter sampling and readout access times achievable.

Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

DOE PAGES

Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

2014-07-22

The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less

Accessing global data from accelerator devices

DOEpatents

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

Application of phase-change materials in memory taxonomy.

PubMed

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.

A Cerebellar-model Associative Memory as a Generalized Random-access Memory

NASA Technical Reports Server (NTRS)

Kanerva, Pentti

1989-01-01

A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.

Accessing global data from accelerator devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less

The contribution to immediate serial recall of rehearsal, search speed, access to lexical memory, and phonological coding: an investigation at the construct level.

PubMed

Tehan, Gerald; Fogarty, Gerard; Ryan, Katherine

2004-07-01

Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the participant population, have suggested other contributors to span performance. In the present research, we used structural equation modeling to explore, at the construct level, individual differences in immediate serial recall with respect to rehearsal, search, phonological coding, and speed of access to lexical memory. We replicated standard short-term phenomena; we showed that the variables that influence children's span performance influence adult performance in the same way; and we showed that speed of access to lexical memory and facility with phonological codes appear to be more potent sources of individual differences in immediate memory than is either rehearsal speed or search factors.

Media, Mental Imagery, and Memory.

ERIC Educational Resources Information Center

Clark, Robert L.

1978-01-01

Thirty-two students at the University of Oregon were tested to determine the effects of media on mental imagery and memory. The model incorporates a dual coding hypothesis, and five single and multiple channel treatments were used. (Author/JEG)

Significance of the Centrally Expressed TRP Channel "Painless" in "Drosophila" Courtship Memory

ERIC Educational Resources Information Center

Sakai, Takaomi; Sato, Shoma; Ishimoto, Hiroshi; Kitamoto, Toshihiro

2013-01-01

Considerable evidence has demonstrated that transient receptor potential (TRP) channels play vital roles in sensory neurons, mediating responses to various environmental stimuli. In contrast, relatively little is known about how TRP channels exert their effects in the central nervous system to control complex behaviors. This is also true for the…

Public Television Channels in New York City: The First Six Months.

ERIC Educational Resources Information Center

Calhoun, Richard

The end results of the first six months of public access cable television (CATV) channels in New York City were in some ways disappointing. Franchise agreements for each of New York's two CATV systems called for two public-access channels to be in operation by July 1, 1971, one year after the date of the franchise awards. The channels were to be…

NMDA receptors in mouse anterior piriform cortex initialize early odor preference learning and L-type calcium channels engage for long-term memory.

PubMed

Mukherjee, Bandhan; Yuan, Qi

2016-10-14

The interactions of L-type calcium channels (LTCCs) and NMDA receptors (NMDARs) in memories are poorly understood. Here we investigated the specific roles of anterior piriform cortex (aPC) LTCCs and NMDARs in early odor preference memory in mice. Using calcium imaging in aPC slices, LTCC activation was shown to be dependent on NMDAR activation. Either D-APV (NMDAR antagonist) or nifedipine (LTCC antagonist) reduced somatic calcium transients in pyramidal cells evoked by lateral olfactory tract stimulation. However, nifedipine did not further reduce calcium in the presence of D-APV. In mice that underwent early odor preference training, blocking NMDARs in the aPC prevented short-term (3 hr) and long-term (24 hr) odor preference memory, and both memories were rescued when BayK-8644 (LTCC agonist) was co-infused. However, activating LTCCs in the absence of NMDARs resulted in loss of discrimination between the conditioned odor and a similar odor mixture at 3 hr. Elevated synaptic AMPAR expression at 3 hr was prevented by D-APV infusion but restored when LTCCs were directly activated, mirroring the behavioral outcomes. Blocking LTCCs prevented 24 hr memory and spared 3 hr memory. These results suggest that NMDARs mediate stimulus-specific encoding of odor memory while LTCCs mediate intracellular signaling leading to long-term memory.

Chip architecture - A revolution brewing

NASA Astrophysics Data System (ADS)

Guterl, F.

1983-07-01

Techniques being explored by microchip designers and manufacturers to both speed up memory access and instruction execution while protecting memory are discussed. Attention is given to hardwiring control logic, pipelining for parallel processing, devising orthogonal instruction sets for interchangeable instruction fields, and the development of hardware for implementation of virtual memory and multiuser systems to provide memory management and protection. The inclusion of microcode in mainframes eliminated logic circuits that control timing and gating of the CPU. However, improvements in memory architecture have reduced access time to below that needed for instruction execution. Hardwiring the functions as a virtual memory enhances memory protection. Parallelism involves a redundant architecture, which allows identical operations to be performed simultaneously, and can be directed with microcode to avoid abortion of intermediate instructions once on set of instructions has been completed.

On Searching Available Channels with Asynchronous MAC-Layer Spectrum Sensing

NASA Astrophysics Data System (ADS)

Jiang, Chunxiao; Ma, Xin; Chen, Canfeng; Ma, Jian; Ren, Yong

Dynamic spectrum access has become a focal issue recently, in which identifying the available spectrum plays a rather important role. Lots of work has been done concerning secondary user (SU) synchronously accessing primary user's (PU's) network. However, on one hand, SU may have no idea about PU's communication protocols; on the other, it is possible that communications among PU are not based on synchronous scheme at all. In order to address such problems, this paper advances a strategy for SU to search available spectrums with asynchronous MAC-layer sensing. With this method, SUs need not know the communication mechanisms in PU's network when dynamically accessing. We will focus on four aspects: 1) strategy for searching available channels; 2) vacating strategy when PUs come back; 3) estimation of channel parameters; 4) impact of SUs' interference on PU's data rate. The simulations show that our search strategy not only can achieve nearly 50% less interference probability than equal allocation of total search time, but also well adapts to time-varying channels. Moreover, access by our strategies can attain 150% more access time than random access. The moment matching estimator shows good performance in estimating and tracing time-varying channels.

A Novel Dynamic Spectrum Access Framework Based on Reinforcement Learning for Cognitive Radio Sensor Networks.

PubMed

Lin, Yun; Wang, Chao; Wang, Jiaxing; Dou, Zheng

2016-10-12

Cognitive radio sensor networks are one of the kinds of application where cognitive techniques can be adopted and have many potential applications, challenges and future research trends. According to the research surveys, dynamic spectrum access is an important and necessary technology for future cognitive sensor networks. Traditional methods of dynamic spectrum access are based on spectrum holes and they have some drawbacks, such as low accessibility and high interruptibility, which negatively affect the transmission performance of the sensor networks. To address this problem, in this paper a new initialization mechanism is proposed to establish a communication link and set up a sensor network without adopting spectrum holes to convey control information. Specifically, firstly a transmission channel model for analyzing the maximum accessible capacity for three different polices in a fading environment is discussed. Secondly, a hybrid spectrum access algorithm based on a reinforcement learning model is proposed for the power allocation problem of both the transmission channel and the control channel. Finally, extensive simulations have been conducted and simulation results show that this new algorithm provides a significant improvement in terms of the tradeoff between the control channel reliability and the efficiency of the transmission channel.

A Novel Dynamic Spectrum Access Framework Based on Reinforcement Learning for Cognitive Radio Sensor Networks

PubMed Central

Lin, Yun; Wang, Chao; Wang, Jiaxing; Dou, Zheng

2016-01-01

Cognitive radio sensor networks are one of the kinds of application where cognitive techniques can be adopted and have many potential applications, challenges and future research trends. According to the research surveys, dynamic spectrum access is an important and necessary technology for future cognitive sensor networks. Traditional methods of dynamic spectrum access are based on spectrum holes and they have some drawbacks, such as low accessibility and high interruptibility, which negatively affect the transmission performance of the sensor networks. To address this problem, in this paper a new initialization mechanism is proposed to establish a communication link and set up a sensor network without adopting spectrum holes to convey control information. Specifically, firstly a transmission channel model for analyzing the maximum accessible capacity for three different polices in a fading environment is discussed. Secondly, a hybrid spectrum access algorithm based on a reinforcement learning model is proposed for the power allocation problem of both the transmission channel and the control channel. Finally, extensive simulations have been conducted and simulation results show that this new algorithm provides a significant improvement in terms of the tradeoff between the control channel reliability and the efficiency of the transmission channel. PMID:27754316

Method for Evaluation of Outage Probability on Random Access Channel in Mobile Communication Systems

NASA Astrophysics Data System (ADS)

Kollár, Martin

2012-05-01

In order to access the cell in all mobile communication technologies a so called random-access procedure is used. For example in GSM this is represented by sending the CHANNEL REQUEST message from Mobile Station (MS) to Base Transceiver Station (BTS) which is consequently forwarded as an CHANNEL REQUIRED message to the Base Station Controller (BSC). If the BTS decodes some noise on the Random Access Channel (RACH) as random access by mistake (so- called ‘phantom RACH') then it is a question of pure coincidence which èstablishment cause’ the BTS thinks to have recognized. A typical invalid channel access request or phantom RACH is characterized by an IMMEDIATE ASSIGNMENT procedure (assignment of an SDCCH or TCH) which is not followed by sending an ESTABLISH INDICATION from MS to BTS. In this paper a mathematical model for evaluation of the Power RACH Busy Threshold (RACHBT) in order to guaranty in advance determined outage probability on RACH is described and discussed as well. It focuses on Global System for Mobile Communications (GSM) however the obtained results can be generalized on remaining mobile technologies (ie WCDMA and LTE).

AFSC Standardization Conference, 1553, 1589, 1750, 1760, Ada, November 18-20, 1980, Dayton Convention Center, Dayton, Ohio, Volume II. Proceedings Standards,

DTIC Science & Technology

1980-11-01

4006 DMAE Direct Memory Access Enable: ’Ibis command enables direct memory access (DMA). 4007 I)MAi) Direct Memory Access Disable: This command...72 DLI 72 DLR 72 DM 111 DMAD 30 DMAE 30 DMR 111 ONEG 103 DR 117 DS 104 OSAR 53 141 373 ’., M1L-STD-1750A (USAF) 2 July 1980 OSBI 29 OSCR 54 OSIC 48...in 4.7.7, the connectors shall show no defects detrimental to the operation of the connectors and shall A-7 461 -meet the subsequent test requirements

A short cut to the past: Cueing via concrete objects improves autobiographical memory retrieval in Alzheimer's disease patients.

PubMed

Kirk, Marie; Berntsen, Dorthe

2018-02-01

Older adults diagnosed with Alzheimer's disease (AD) have difficulties accessing autobiographical memories. However, this deficit tends to spare memories dated to earlier parts of their lives, and may partially reflect retrieval deficits rather than complete memory loss. Introducing a novel paradigm, the present study examines whether autobiographical memory recall can be improved in AD by manipulating the sensory richness, concreteness and cultural dating of the memory cues. Specifically, we examine whether concrete everyday objects historically dated to the participants' youth (e.g., a skipping rope), relative to verbal cues (i.e., the verbal signifiers for the objects) facilitate access to autobiographical memories. The study includes 49 AD patients, and 50 healthy, older matched control participants, all tested on word versus object-cued recall. Both groups recalled significantly more memories, when cued by objects relative to words, but the advantage was significantly larger in the AD group. In both groups, memory descriptions were longer and significantly more episodic in nature in response to object-cued recall. Together these findings suggest that the multimodal nature of the object cues (i.e. vision, olfaction, audition, somatic sensation) along with specific cue characteristics, such as time reference, texture, shape, may constrain the retrieval search, potentially minimizing executive function demands, and hence strategic processing requirements, thus easing access to autobiographical memories in AD. Copyright © 2017 Elsevier Ltd. All rights reserved.

Aspects of GPU perfomance in algorithms with random memory access

NASA Astrophysics Data System (ADS)

Kashkovsky, Alexander V.; Shershnev, Anton A.; Vashchenkov, Pavel V.

2017-10-01

The numerical code for solving the Boltzmann equation on the hybrid computational cluster using the Direct Simulation Monte Carlo (DSMC) method showed that on Tesla K40 accelerators computational performance drops dramatically with increase of percentage of occupied GPU memory. Testing revealed that memory access time increases tens of times after certain critical percentage of memory is occupied. Moreover, it seems to be the common problem of all NVidia's GPUs arising from its architecture. Few modifications of the numerical algorithm were suggested to overcome this problem. One of them, based on the splitting the memory into "virtual" blocks, resulted in 2.5 times speed up.

Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures

DTIC Science & Technology

2015-08-01

metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes

Random access with adaptive packet aggregation in LTE/LTE-A.

PubMed

Zhou, Kaijie; Nikaein, Navid

While random access presents a promising solution for efficient uplink channel access, the preamble collision rate can significantly increase when massive number of devices simultaneously access the channel. To address this issue and improve the reliability of the random access, an adaptive packet aggregation method is proposed. With the proposed method, a device does not trigger a random access for every single packet. Instead, it starts a random access when the number of aggregated packets reaches a given threshold. This method reduces the packet collision rate at the expense of an extra latency, which is used to accumulate multiple packets into a single transmission unit. Therefore, the tradeoff between packet loss rate and channel access latency has to be carefully selected. We use semi-Markov model to derive the packet loss rate and channel access latency as functions of packet aggregation number. Hence, the optimal amount of aggregated packets can be found, which keeps the loss rate below the desired value while minimizing the access latency. We also apply for the idea of packet aggregation for power saving, where a device aggregates as many packets as possible until the latency constraint is reached. Simulations are carried out to evaluate our methods. We find that the packet loss rate and/or power consumption are significantly reduced with the proposed method.

Digital Equipment Corporation VAX/VMS Version 4.3

DTIC Science & Technology

1986-07-30

operating system performs process-oriented paging that allows execution of programs that may be larger than the physical memory allocated to them... to higher privileged modes. (For an explanation of how the four access modes provide memory access protection see page 9, "Memory Management".) A... to optimize program performance for real-time applications or interactive environments. July 30, 1986 - 4 - Final Evaluation Report Digital VAX/VMS

Memory-Based Structured Application Specific Integrated Circuit (ASIC) Study

DTIC Science & Technology

2008-10-01

memory interface, arbiter/ schedulers for rescheduling the memory requests according to some schedule policy, and memory channels for communicating...between the power-savings and the wakeup overhead with respect to both wakeup power and wakeup delay. For example, dream mode can save 50% more static...power than sleep mode, but at the expense of twice the wake delay and three times the wakeup energy. The user can specify power-gating modes for various components.

Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

NASA Astrophysics Data System (ADS)

Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

2013-04-01

In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

47 CFR 15.711 - Interference avoidance methods.

Code of Federal Regulations, 2011 CFR

2011-10-01

... channel availability for a TVBD is determined based on the geo-location and database access method described in paragraphs (a) and (b) of this section. (a) Geo-location and database access. A TVBD shall rely on the geo-location and database access mechanism to identify available television channels...

47 CFR 15.711 - Interference avoidance methods.

Code of Federal Regulations, 2013 CFR

2013-10-01

... channel availability for a TVBD is determined based on the geo-location and database access method described in paragraphs (a) and (b) of this section. (a) Geo-location and database access. A TVBD shall rely on the geo-location and database access mechanism to identify available television channels...

47 CFR 15.711 - Interference avoidance methods.

Code of Federal Regulations, 2014 CFR

2014-10-01

... channel availability for a TVBD is determined based on the geo-location and database access method described in paragraphs (a) and (b) of this section. (a) Geo-location and database access. A TVBD shall rely on the geo-location and database access mechanism to identify available television channels...

47 CFR 15.711 - Interference avoidance methods.

Code of Federal Regulations, 2012 CFR

2012-10-01

... channel availability for a TVBD is determined based on the geo-location and database access method described in paragraphs (a) and (b) of this section. (a) Geo-location and database access. A TVBD shall rely on the geo-location and database access mechanism to identify available television channels...

Evolution of magnetic disk subsystems

NASA Astrophysics Data System (ADS)

Kaneko, Satoru

1994-06-01

The higher recording density of magnetic disk realized today has brought larger storage capacity per unit and smaller form factors. If the required access performance per MB is constant, the performance of large subsystems has to be several times better. This article describes mainly the technology for improving the performance of the magnetic disk subsystems and the prospects of their future evolution. Also considered are 'crosscall pathing' which makes the data transfer channel more effective, 'disk cache' which improves performance coupling with solid state memory technology, and 'RAID' which improves the availability and integrity of disk subsystems by organizing multiple disk drives in a subsystem. As a result, it is concluded that since the performance of the subsystem is dominated by that of the disk cache, maximation of the performance of the disk cache subsystems is very important.

A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications

NASA Astrophysics Data System (ADS)

Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-05-01

As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.

Memory Benchmarks for SMP-Based High Performance Parallel Computers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yoo, A B; de Supinski, B; Mueller, F

2001-11-20

As the speed gap between CPU and main memory continues to grow, memory accesses increasingly dominates the performance of many applications. The problem is particularly acute for symmetric multiprocessor (SMP) systems, where the shared memory may be accessed concurrently by a group of threads running on separate CPUs. Unfortunately, several key issues governing memory system performance in current systems are not well understood. Complex interactions between the levels of the memory hierarchy, buses or switches, DRAM back-ends, system software, and application access patterns can make it difficult to pinpoint bottlenecks and determine appropriate optimizations, and the situation is even moremore » complex for SMP systems. To partially address this problem, we formulated a set of multi-threaded microbenchmarks for characterizing and measuring the performance of the underlying memory system in SMP-based high-performance computers. We report our use of these microbenchmarks on two important SMP-based machines. This paper has four primary contributions. First, we introduce a microbenchmark suite to systematically assess and compare the performance of different levels in SMP memory hierarchies. Second, we present a new tool based on hardware performance monitors to determine a wide array of memory system characteristics, such as cache sizes, quickly and easily; by using this tool, memory performance studies can be targeted to the full spectrum of performance regimes with many fewer data points than is otherwise required. Third, we present experimental results indicating that the performance of applications with large memory footprints remains largely constrained by memory. Fourth, we demonstrate that thread-level parallelism further degrades memory performance, even for the latest SMPs with hardware prefetching and switch-based memory interconnects.« less

GPU color space conversion

NASA Astrophysics Data System (ADS)

Chase, Patrick; Vondran, Gary

2011-01-01

Tetrahedral interpolation is commonly used to implement continuous color space conversions from sparse 3D and 4D lookup tables. We investigate the implementation and optimization of tetrahedral interpolation algorithms for GPUs, and compare to the best known CPU implementations as well as to a well known GPU-based trilinear implementation. We show that a 500 NVIDIA GTX-580 GPU is 3x faster than a 1000 Intel Core i7 980X CPU for 3D interpolation, and 9x faster for 4D interpolation. Performance-relevant GPU attributes are explored including thread scheduling, local memory characteristics, global memory hierarchy, and cache behaviors. We consider existing tetrahedral interpolation algorithms and tune based on the structure and branching capabilities of current GPUs. Global memory performance is improved by reordering and expanding the lookup table to ensure optimal access behaviors. Per multiprocessor local memory is exploited to implement optimally coalesced global memory accesses, and local memory addressing is optimized to minimize bank conflicts. We explore the impacts of lookup table density upon computation and memory access costs. Also presented are CPU-based 3D and 4D interpolators, using SSE vector operations that are faster than any previously published solution.

Measuring autobiographical fluency in the self-memory system.

PubMed

Rathbone, Clare J; Moulin, Chris J A

2014-01-01

Autobiographical memory is widely considered to be fundamentally related to concepts of self and identity. However, few studies have sought to test models of self and memory directly using experimental designs. Using a novel autobiographical fluency paradigm, the present study investigated memory accessibility for different levels of self-related knowledge. Forty participants generated 20 "I am" statements about themselves, from which the 1st, 5th, 10th, 15th, and 20th were used as cues in a two-minute autobiographical fluency task. The most salient aspects of the self, measured by both serial position and ratings of personal significance, were associated with more accessible sets of autobiographical memories. This finding supports theories that view the self as a powerful organizational structure in memory. Results are discussed with reference to models of self and memory.

Functional connectivity among multi-channel EEGs when working memory load reaches the capacity.

PubMed

Zhang, Dan; Zhao, Huipo; Bai, Wenwen; Tian, Xin

2016-01-15

Evidence from behavioral studies has suggested a capacity existed in working memory. As the concept of functional connectivity has been introduced into neuroscience research in the recent years, the aim of this study is to investigate the functional connectivity in the brain when working memory load reaches the capacity. 32-channel electroencephalographs (EEGs) were recorded for 16 healthy subjects, while they performed a visual working memory task with load 1-6. Individual working memory capacity was calculated according to behavioral results. Short-time Fourier transform was used to determine the principal frequency band (theta band) related to working memory. The functional connectivity among EEGs was measured by the directed transform function (DTF) via spectral Granger causal analysis. The capacity was 4 calculated from the behavioral results. The power was focused in the frontal midline region. The strongest connectivity strengths of EEG theta components from load 1 to 6 distributed in the frontal midline region. The curve of DTF values vs load numbers showed that DTF increased from load 1 to 4, peaked at load 4, then decreased after load 4. This study finds that the functional connectivity between EEGs, described quantitatively by DTF, became less strong when working memory load exceeded the capacity. Copyright © 2015 Elsevier B.V. All rights reserved.

Efficient Machine Learning Approach for Optimizing Scientific Computing Applications on Emerging HPC Architectures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arumugam, Kamesh

Efficient parallel implementations of scientific applications on multi-core CPUs with accelerators such as GPUs and Xeon Phis is challenging. This requires - exploiting the data parallel architecture of the accelerator along with the vector pipelines of modern x86 CPU architectures, load balancing, and efficient memory transfer between different devices. It is relatively easy to meet these requirements for highly structured scientific applications. In contrast, a number of scientific and engineering applications are unstructured. Getting performance on accelerators for these applications is extremely challenging because many of these applications employ irregular algorithms which exhibit data-dependent control-ow and irregular memory accesses. Furthermore,more » these applications are often iterative with dependency between steps, and thus making it hard to parallelize across steps. As a result, parallelism in these applications is often limited to a single step. Numerical simulation of charged particles beam dynamics is one such application where the distribution of work and memory access pattern at each time step is irregular. Applications with these properties tend to present significant branch and memory divergence, load imbalance between different processor cores, and poor compute and memory utilization. Prior research on parallelizing such irregular applications have been focused around optimizing the irregular, data-dependent memory accesses and control-ow during a single step of the application independent of the other steps, with the assumption that these patterns are completely unpredictable. We observed that the structure of computation leading to control-ow divergence and irregular memory accesses in one step is similar to that in the next step. It is possible to predict this structure in the current step by observing the computation structure of previous steps. In this dissertation, we present novel machine learning based optimization techniques to address the parallel implementation challenges of such irregular applications on different HPC architectures. In particular, we use supervised learning to predict the computation structure and use it to address the control-ow and memory access irregularities in the parallel implementation of such applications on GPUs, Xeon Phis, and heterogeneous architectures composed of multi-core CPUs with GPUs or Xeon Phis. We use numerical simulation of charged particles beam dynamics simulation as a motivating example throughout the dissertation to present our new approach, though they should be equally applicable to a wide range of irregular applications. The machine learning approach presented here use predictive analytics and forecasting techniques to adaptively model and track the irregular memory access pattern at each time step of the simulation to anticipate the future memory access pattern. Access pattern forecasts can then be used to formulate optimization decisions during application execution which improves the performance of the application at a future time step based on the observations from earlier time steps. In heterogeneous architectures, forecasts can also be used to improve the memory performance and resource utilization of all the processing units to deliver a good aggregate performance. We used these optimization techniques and anticipation strategy to design a cache-aware, memory efficient parallel algorithm to address the irregularities in the parallel implementation of charged particles beam dynamics simulation on different HPC architectures. Experimental result using a diverse mix of HPC architectures shows that our approach in using anticipation strategy is effective in maximizing data reuse, ensuring workload balance, minimizing branch and memory divergence, and in improving resource utilization.« less

Detection of memory loss of symmetry in the blockage of a turbulent flow within a duct

NASA Astrophysics Data System (ADS)

Santos, F. Rodrigues; da Silva Costa, G.; da Cunha Lima, A. T.; de Almeida, M. P.; da Cunha Lima, I. C.

This paper aims to detect memory loss of the symmetry of blockades in ducts and how far the information on the asymmetry of the obstacles travels in the turbulent flow from computational simulations with OpenFOAM. From a practical point of view, it seeks alternatives to detect the formation of obstructions in pipelines. The numerical solutions of the Navier-Stokes equations were obtained through the solver PisoFOAM of the OpenFOAM library, using the large Eddy simulation (LES) for the turbulent model. Obstructions were placed near the duct inlet and, keeping the blockade ratio fixed, five combinations for the obstacles sizes were adopted. The results show that the information about the symmetry is preserved for a larger distance near the ducts wall than in mid-channel. For an inlet velocity of 5m/s near the walls the memory is kept up to distance 40 times the duct width, while in mid-channel this distance is reduced almost by half. The maximum distance in which the symmetry breaking memory is preserved shows sensitivity to Reynolds number variations in regions near the duct walls, while in the mid channel that variations do not cause relevant effects to the velocity distribution.

Heap/stack guard pages using a wakeup unit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gooding, Thomas M; Satterfield, David L; Steinmacher-Burow, Burkhard

A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access ofmore » the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.« less

The differential effects of ecstasy/polydrug use on executive components: shifting, inhibition, updating and access to semantic memory.

PubMed

Montgomery, Catharine; Fisk, John E; Newcombe, Russell; Murphy, Phillip N

2005-10-01

Recent theoretical models suggest that the central executive may not be a unified structure. The present study explored the nature of central executive deficits in ecstasy users. In study 1, 27 ecstasy users and 34 non-users were assessed using tasks to tap memory updating (computation span; letter updating) and access to long-term memory (a semantic fluency test and the Chicago Word Fluency Test). In study 2, 51 ecstasy users and 42 non-users completed tasks that assess mental set switching (number/letter and plus/minus) and inhibition (random letter generation). MANOVA revealed that ecstasy users performed worse on both tasks used to assess memory updating and on tasks to assess access to long-term memory (C- and S-letter fluency). However, notwithstanding the significant ecstasy group-related effects, indices of cocaine and cannabis use were also significantly correlated with most of the executive measures. Unexpectedly, in study 2, ecstasy users performed significantly better on the inhibition task, producing more letters than non-users. No group differences were observed on the switching tasks. Correlations between indices of ecstasy use and number of letters produced were significant. The present study provides further support for ecstasy/polydrug-related deficits in memory updating and in access to long-term memory. The surplus evident on the inhibition task should be treated with some caution, as this was limited to a single measure and has not been supported by our previous work.

Evolutionarily conserved intracellular gate of voltage-dependent sodium channels

NASA Astrophysics Data System (ADS)

Oelstrom, Kevin; Goldschen-Ohm, Marcel P.; Holmgren, Miguel; Chanda, Baron

2014-03-01

Members of the voltage-gated ion channel superfamily (VGIC) regulate ion flux and generate electrical signals in excitable cells by opening and closing pore gates. The location of the gate in voltage-gated sodium channels, a founding member of this superfamily, remains unresolved. Here we explore the chemical modification rates of introduced cysteines along the S6 helix of domain IV in an inactivation-removed background. We find that state-dependent accessibility is demarcated by an S6 hydrophobic residue; substituted cysteines above this site are not modified by charged thiol reagents when the channel is closed. These accessibilities are consistent with those inferred from open- and closed-state structures of prokaryotic sodium channels. Our findings suggest that an intracellular gate composed of a ring of hydrophobic residues is not only responsible for regulating access to the pore of sodium channels, but is also a conserved feature within canonical members of the VGIC superfamily.

Performance Evaluation of Remote Memory Access (RMA) Programming on Shared Memory Parallel Computers

NASA Technical Reports Server (NTRS)

Jin, Hao-Qiang; Jost, Gabriele; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The purpose of this study is to evaluate the feasibility of remote memory access (RMA) programming on shared memory parallel computers. We discuss different RMA based implementations of selected CFD application benchmark kernels and compare them to corresponding message passing based codes. For the message-passing implementation we use MPI point-to-point and global communication routines. For the RMA based approach we consider two different libraries supporting this programming model. One is a shared memory parallelization library (SMPlib) developed at NASA Ames, the other is the MPI-2 extensions to the MPI Standard. We give timing comparisons for the different implementation strategies and discuss the performance.

Anti-stress effects of cilnidipine and nimodipine in immobilization subjected mice.

PubMed

Kumar, Naresh; Singh, Nirmal; Jaggi, Amteshwar Singh

2012-03-20

The present study was designed to investigate the ameliorative role of cilnidipine and nimodipine in immobilization stress-induced behavioral alterations and memory defects in the mice. Acute stress was induced by immobilizing the mice for 150 min and stress-induced behavioral changes were assessed using actophotometer, hole board, open field and social interaction tests. The learning and memory was evaluated using elevated plus maze tests and biochemically, the corticosterone levels were measured in the blood serum. Acute immobilization stress resulted in decrease in locomotor activity, frequency of head dips and rearings in hole board; line crossing and rearing in the open field; increase in avoidance in social behavior along with development of memory deficits assessed by an increased transfer latency time and elevation of the corticosterone levels. Administration of cilnidipine (10 mg/kg), an L and N-type dual calcium channel blocker, and nimodipine (10 mg/kg), an L-type calcium channel blocker, significantly attenuated the immobilized stress-induced behavioral changes and restored memory deficits along with normalization of the corticosterone levels. Cilnidipine and nimodipine produced comparable beneficial effects in restoring immobilization stress subjected mice. It may be concluded that cilnidipine and nimodipine mediated attenuation of corticosterone release by blockage of calcium channels (both L and N-type) on the HPA-axis is responsible for beneficial effects in restoration of behavioral alterations and memory deficits in immobilization-induced acute stress in mice. Copyright © 2011 Elsevier Inc. All rights reserved.

Brownmillerite thin films as fast ion conductors for ultimate-performance resistance switching memory.

PubMed

Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk

2017-07-27

An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.

Leveraging Environmental Correlations: The Thermodynamics of Requisite Variety

NASA Astrophysics Data System (ADS)

Boyd, Alexander B.; Mandal, Dibyendu; Crutchfield, James P.

2017-06-01

Key to biological success, the requisite variety that confronts an adaptive organism is the set of detectable, accessible, and controllable states in its environment. We analyze its role in the thermodynamic functioning of information ratchets—a form of autonomous Maxwellian Demon capable of exploiting fluctuations in an external information reservoir to harvest useful work from a thermal bath. This establishes a quantitative paradigm for understanding how adaptive agents leverage structured thermal environments for their own thermodynamic benefit. General ratchets behave as memoryful communication channels, interacting with their environment sequentially and storing results to an output. The bulk of thermal ratchets analyzed to date, however, assume memoryless environments that generate input signals without temporal correlations. Employing computational mechanics and a new information-processing Second Law of Thermodynamics (IPSL) we remove these restrictions, analyzing general finite-state ratchets interacting with structured environments that generate correlated input signals. On the one hand, we demonstrate that a ratchet need not have memory to exploit an uncorrelated environment. On the other, and more appropriate to biological adaptation, we show that a ratchet must have memory to most effectively leverage structure and correlation in its environment. The lesson is that to optimally harvest work a ratchet's memory must reflect the input generator's memory. Finally, we investigate achieving the IPSL bounds on the amount of work a ratchet can extract from its environment, discovering that finite-state, optimal ratchets are unable to reach these bounds. In contrast, we show that infinite-state ratchets can go well beyond these bounds by utilizing their own infinite "negentropy". We conclude with an outline of the collective thermodynamics of information-ratchet swarms.

Enhancing Memory Access for Less Skilled Readers

ERIC Educational Resources Information Center

Smith, Emily R.; O'Brien, Edward J.

2016-01-01

Less skilled readers' comprehension often suffers because they have an impoverished representation of text in long-term memory; this, in turn, increases the difficulty of gaining access to backgrounded information necessary for maintaining coherence. The results of four experiments demonstrated that providing less skilled readers with additional…

Application of phase-change materials in memory taxonomy

PubMed Central

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Attention, working memory, and phenomenal experience of WM content: memory levels determined by different types of top-down modulation.

PubMed

Jacob, Jane; Jacobs, Christianne; Silvanto, Juha

2015-01-01

What is the role of top-down attentional modulation in consciously accessing working memory (WM) content? In influential WM models, information can exist in different states, determined by allocation of attention; placing the original memory representation in the center of focused attention gives rise to conscious access. Here we discuss various lines of evidence indicating that such attentional modulation is not sufficient for memory content to be phenomenally experienced. We propose that, in addition to attentional modulation of the memory representation, another type of top-down modulation is required: suppression of all incoming visual information, via inhibition of early visual cortex. In this view, there are three distinct memory levels, as a function of the top-down control associated with them: (1) Nonattended, nonconscious associated with no attentional modulation; (2) attended, phenomenally nonconscious memory, associated with attentional enhancement of the actual memory trace; (3) attended, phenomenally conscious memory content, associated with enhancement of the memory trace and top-down suppression of all incoming visual input.

Selective memory retrieval can impair and improve retrieval of other memories.

PubMed

Bäuml, Karl-Heinz T; Samenieh, Anuscheh

2012-03-01

Research from the past decades has shown that retrieval of a specific memory (e.g., retrieving part of a previous vacation) typically attenuates retrieval of other memories (e.g., memories for other details of the event), causing retrieval-induced forgetting. More recently, however, it has been shown that retrieval can both attenuate and aid recall of other memories (K.-H. T. Bäuml & A. Samenieh, 2010). To identify the circumstances under which retrieval aids recall, the authors examined retrieval dynamics in listwise directed forgetting, context-dependent forgetting, proactive interference, and in the absence of any induced memory impairment. They found beneficial effects of selective retrieval in listwise directed forgetting and context-dependent forgetting but detrimental effects in all the other conditions. Because context-dependent forgetting and listwise directed forgetting arguably reflect impaired context access, the results suggest that memory retrieval aids recall of memories that are subject to impaired context access but attenuates recall in the absence of such circumstances. The findings are consistent with a 2-factor account of memory retrieval and suggest the existence of 2 faces of memory retrieval. 2012 APA, all rights reserved

78 FR 20255 - Leased Commercial Access

Federal Register 2010, 2011, 2012, 2013, 2014

2013-04-04

... follows: Sec. 76.970 Commercial leased access rates. (a) Cable operators shall designate channel capacity... U.S.C. 532. For purposes of 47 U.S.C. 532(b)(1)(A) and (B), only those channels that must be carried pursuant to 47 U.S.C. 534 and 535 qualify as channels that are required for use by Federal law or...

Multiple memory stores and operant conditioning: a rationale for memory's complexity.

PubMed

Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu

2009-02-01

Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory stores, but such access was penalized as energy expenditure. Model animals were then selected on their fitness in simulated operant conditioning tasks. Results suggest that having access to multiple memory stores and their representations is important in learning to regulate dopamine release, as well as in contextual discrimination. For simple operant conditioning, as well as stimulus discrimination, hippocampal compound representations turned out to suffice, a counterintuitive result given findings that hippocampal lesions tend not to affect performance in such tasks. We argue that there is in fact evidence to support a role for compound representations and the hippocampus in even the simplest conditioning tasks.

Advanced teleprocessing systems

NASA Astrophysics Data System (ADS)

Kleinrock, L.; Gerla, M.

1982-09-01

This Annual Technical Report covers research covering the period from October 1, 1981 to September 30, 1982. This contract has three primary designated research areas: packet radio systems, resource sharing and allocation, and distributed processing and control. This report contains abstracts of publications which summarize research results in these areas followed by the main body of the report which is devoted to a study of channel access protocols that are executed by the nodes of a network to schedule their transmissions on multi-access broadcast channel. In particular the main body consists of a Ph.D. dissertation, Channel Access Protocols for Multi-Hop Broadcast Packet Radio Networks. This work discusses some new channel access protocols useful for mobile radio networks. Included is an analysis of slotted ALOHA and some tight bounds on the performance of all possible protocols in a mobile environment.

The selective A-type K+ current blocker Tx3-1 isolated from the Phoneutria nigriventer venom enhances memory of naïve and Aβ(25-35)-treated mice.

PubMed

Gomes, Guilherme M; Dalmolin, Gerusa D; Cordeiro, Marta do Nascimento; Gomez, Marcus V; Ferreira, Juliano; Rubin, Maribel A

2013-12-15

Potassium channels regulate many neuronal functions, including neuronal excitability and synaptic plasticity, contributing, by these means, to mnemonic processes. In particular, A-type K(+) currents (IA) play a key role in hippocampal synaptic plasticity. Therefore, we evaluated the effect of the peptidic toxin Tx3-1, a selective blocker of IA currents, extracted from the venom of the spider Phoneutria nigriventer, on memory of mice. Administration of Tx3-1 (i.c.v., 300 pmol/site) enhanced both short- and long-term memory consolidation of mice tested in the novel object recognition task. In comparison, 4-aminopyridine (4-AP; i.c.v., 30-300 pmol/site), a non-selective K(+) channel blocker did not alter long-term memory and caused toxic side effects such as circling, freezing and tonic-clonic seizures. Moreover, Tx3-1 (i.c.v., 10-100 pmol/site) restored memory of Aβ25-35-injected mice, and exhibited a higher potency to improve memory of Aβ25-35-injected mice when compared to control group. These results show the effect of the selective blocker of IA currents Tx3-1 in both short- and long-term memory retention and in memory impairment caused by Aβ25-35, reinforcing the role of IA in physiological and pathological memory processes. Copyright © 2013 Elsevier Ltd. All rights reserved.

Intermediate memory devices

NASA Technical Reports Server (NTRS)

Basalayev, G. V.; Kmet, A. B.; Rakov, M. A.; Tarasevich, V. A.

1974-01-01

Several methods of transfer and processing of data whose practical implementation requires operational memory devices are described. Devices incorporating multistable elements are proposed and their main parameters are given. The possibility of using the proposed devices for storing information for transmission in space radio communications channels is examined.

78 FR 63263 - Self-Regulatory Organizations; The Options Clearing Corporation; Order Approving Proposed Rule...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-10-23

... Adopted Under Rule 205 Entitled ``Back-Up Communication Channel to Internet Access'' October 17, 2013. I... ``Back-up Communication Channel to Internet Access'' requiring clearing members that use the internet as... Policy Statement under Rule 205 requiring clearing members that primarily use the internet to access OCC...

78 FR 54707 - Self-Regulatory Organizations; The Options Clearing Corporation; Notice of Filing of Proposed...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-09-05

... Statement Adopted Under Rule 205 Entitled ``Back-up Communication Channel to Internet Access'' August 29... ``Back-up Communication Channel to Internet Access'' requiring clearing members that use the Internet as their primary means to access OCC's information and data systems to maintain a secure back-up means of...

NASA Tech Briefs, August 2013

NASA Technical Reports Server (NTRS)

2013-01-01

Topics covered include: Radial Internal Material Handling System (RIMS) for Circular Habitat Volumes; Conical Seat Shut-Off Valve; Impact-Actuated Digging Tool for Lunar Excavation; Flexible Mechanical Conveyors for Regolith Extraction and Transport; Remote Memory Access Protocol Target Node Intellectual Property; Soft Decision Analyzer; Distributed Prognostics and Health Management with a Wireless Network Architecture; Minimal Power Latch for Single-Slope ADCs; Bismuth Passivation Technique for High-Resolution X-Ray Detectors; High-Strength, Super-elastic Compounds; Cu-Cr-Nb-Zr Alloy for Rocket Engines and Other High-Heat- Flux Applications; Microgravity Storage Vessels and Conveying-Line Feeders for Cohesive Regolith; CRUQS: A Miniature Fine Sun Sensor for Nanosatellites; On-Chip Microfluidic Components for In Situ Analysis, Separation, and Detection of Amino Acids; Spectroscopic Determination of Trace Contaminants in High-Purity Oxygen; Method of Separating Oxygen From Spacecraft Cabin Air to Enable Extravehicular Activities; Atomic Force Microscope Mediated Chromatography; Sample Analysis at Mars Instrument Simulator; Access Control of Web- and Java-Based Applications; Tool for Automated Retrieval of Generic Event Tracks (TARGET); Bilayer Protograph Codes for Half-Duplex Relay Channels; Influence of Computational Drop Representation in LES of a Droplet-Laden Mixing Layer.

Power reduction by power gating in differential pair type spin-transfer-torque magnetic random access memories for low-power nonvolatile cache memories

NASA Astrophysics Data System (ADS)

Ohsawa, Takashi; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2014-01-01

Array operation currents in spin-transfer-torque magnetic random access memories (STT-MRAMs) that use four differential pair type magnetic tunnel junction (MTJ)-based memory cells (4T2MTJ, two 6T2MTJs and 8T2MTJ) are simulated and compared with that in SRAM. With L3 cache applications in mind, it is assumed that the memories are composed of 32 Mbyte capacity to be accessed in 64 byte in parallel. All the STT-MRAMs except for the 8T2MTJ one are designed with 32 bit fine-grained power gating scheme applied to eliminate static currents in the memory cells that are not accessed. The 8T2MTJ STT-MRAM, the cell’s design concept being not suitable for the fine-grained power gating, loads and saves 32 Mbyte data in 64 Mbyte unit per 1 Mbit sub-array in 2 × 103 cycles. It is shown that the array operation current of the 4T2MTJ STT-MRAM is 70 mA averaged in 15 ns write cycles at Vdd = 0.9 V. This is the smallest among the STT-MRAMs, about the half of the low standby power (LSTP) SRAM whose array operation current is totally dominated by the cells’ subthreshold leakage.

Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

NASA Astrophysics Data System (ADS)

Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

2016-05-01

The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr00505e

Object selection costs in visual working memory: A diffusion model analysis of the focus of attention.

PubMed

Sewell, David K; Lilburn, Simon D; Smith, Philip L

2016-11-01

A central question in working memory research concerns the degree to which information in working memory is accessible to other cognitive processes (e.g., decision-making). Theories assuming that the focus of attention can only store a single object at a time require the focus to orient to a target representation before further processing can occur. The need to orient the focus of attention implies that single-object accounts typically predict response time costs associated with object selection even when working memory is not full (i.e., memory load is less than 4 items). For other theories that assume storage of multiple items in the focus of attention, predictions depend on specific assumptions about the way resources are allocated among items held in the focus, and how this affects the time course of retrieval of items from the focus. These broad theoretical accounts have been difficult to distinguish because conventional analyses fail to separate components of empirical response times related to decision-making from components related to selection and retrieval processes associated with accessing information in working memory. To better distinguish these response time components from one another, we analyze data from a probed visual working memory task using extensions of the diffusion decision model. Analysis of model parameters revealed that increases in memory load resulted in (a) reductions in the quality of the underlying stimulus representations in a manner consistent with a sample size model of visual working memory capacity and (b) systematic increases in the time needed to selectively access a probed representation in memory. The results are consistent with single-object theories of the focus of attention. The results are also consistent with a subset of theories that assume a multiobject focus of attention in which resource allocation diminishes both the quality and accessibility of the underlying representations. (PsycINFO Database Record (c) 2016 APA, all rights reserved).

Controllably releasing long-lived quantum memory for photonic polarization qubit into multiple spatially-separate photonic channels.

PubMed

Chen, Lirong; Xu, Zhongxiao; Zeng, Weiqing; Wen, Yafei; Li, Shujing; Wang, Hai

2016-09-26

We report an experiment in which long-lived quantum memories for photonic polarization qubits (PPQs) are controllably released into any one of multiple spatially-separate channels. The PPQs are implemented with an arbitrarily-polarized coherent signal light pulses at the single-photon level and are stored in cold atoms by means of electromagnetic-induced-transparency scheme. Reading laser pulses propagating along the direction at a small angle relative to quantum axis are applied to release the stored PPQs into an output channel. By changing the propagating directions of the read laser beam, we controllably release the retrieved PPQs into 7 different photonic output channels, respectively. At a storage time of δt = 5 μs, the least quantum-process fidelity in 7 different output channels is ~89%. At one of the output channels, the measured maximum quantum-process fidelity for the PPQs is 94.2% at storage time of δt = 0.85 ms. At storage time of 6 ms, the quantum-process fidelity is still beyond the bound of 78% to violate the Bell's inequality. The demonstrated controllable release of the stored PPQs may extend the capabilities of the quantum information storage technique.

Designing a VMEbus FDDI adapter card

NASA Astrophysics Data System (ADS)

Venkataraman, Raman

1992-03-01

This paper presents a system architecture for a VMEbus FDDI adapter card containing a node core, FDDI block, frame buffer memory and system interface unit. Most of the functions of the PHY and MAC layers of FDDI are implemented with National's FDDI chip set and the SMT implementation is simplified with a low cost microcontroller. The factors that influence the system bus bandwidth utilization and FDDI bandwidth utilization are the data path and frame buffer memory architecture. The VRAM based frame buffer memory has two sections - - LLC frame memory and SMT frame memory. Each section with an independent serial access memory (SAM) port provides an independent access after the initial data transfer cycle on the main port and hence, the throughput is maximized on each port of the memory. The SAM port simplifies the system bus master DMA design and the VMEbus interface can be designed with low-cost off-the-shelf interface chips.

A Quantum Network with Atoms and Photons

DTIC Science & Technology

2016-09-01

The long - term goal is to entangle distant atomic memories between ARL and JQI, and explore the possibility of entangling hybrid quantum memories . 2...ARL) environment. The long - term goal is to achieve a quantum repeater network capability for the US Army. Initially, a quantum channel between ARL and...SUBJECT  TERMS Quantum, atoms, photons, entanglement, teleportation, communications, network, memory 16. SECURITY CLASSIFICATION OF: 17. LIMITATION

A Quantum Network with Atoms and Photons

DTIC Science & Technology

2016-09-30

The long - term goal is to entangle distant atomic memories between ARL and JQI, and explore the possibility of entangling hybrid quantum memories . 2...ARL) environment. The long - term goal is to achieve a quantum repeater network capability for the US Army. Initially, a quantum channel between ARL and...SUBJECT  TERMS Quantum, atoms, photons, entanglement, teleportation, communications, network, memory 16. SECURITY CLASSIFICATION OF: 17. LIMITATION

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

Scaling Irregular Applications through Data Aggregation and Software Multithreading

DOE Office of Scientific and Technical Information (OSTI.GOV)

Morari, Alessandro; Tumeo, Antonino; Chavarría-Miranda, Daniel

Bioinformatics, data analytics, semantic databases, knowledge discovery are emerging high performance application areas that exploit dynamic, linked data structures such as graphs, unbalanced trees or unstructured grids. These data structures usually are very large, requiring significantly more memory than available on single shared memory systems. Additionally, these data structures are difficult to partition on distributed memory systems. They also present poor spatial and temporal locality, thus generating unpredictable memory and network accesses. The Partitioned Global Address Space (PGAS) programming model seems suitable for these applications, because it allows using a shared memory abstraction across distributed-memory clusters. However, current PGAS languagesmore » and libraries are built to target regular remote data accesses and block transfers. Furthermore, they usually rely on the Single Program Multiple Data (SPMD) parallel control model, which is not well suited to the fine grained, dynamic and unbalanced parallelism of irregular applications. In this paper we present {\\bf GMT} (Global Memory and Threading library), a custom runtime library that enables efficient execution of irregular applications on commodity clusters. GMT integrates a PGAS data substrate with simple fork/join parallelism and provides automatic load balancing on a per node basis. It implements multi-level aggregation and lightweight multithreading to maximize memory and network bandwidth with fine-grained data accesses and tolerate long data access latencies. A key innovation in the GMT runtime is its thread specialization (workers, helpers and communication threads) that realize the overall functionality. We compare our approach with other PGAS models, such as UPC running using GASNet, and hand-optimized MPI code on a set of typical large-scale irregular applications, demonstrating speedups of an order of magnitude.« less

The influence of training and experience on memory strategy.

PubMed

Patrick, John; Morgan, Phillip L; Smy, Victoria; Tiley, Leyanne; Seeby, Helen; Patrick, Tanya; Evans, Jonathan

2015-07-01

This paper investigates whether, and if so how much, prior training and experience overwrite the influence of the constraints of the task environment on strategy deployment. This evidence is relevant to the theory of soft constraints that focuses on the role of constraints in the task environment (Gray, Simms, Fu, & Schoelles, Psychological Review, 113: 461-482, 2006). The theory explains how an increase in the cost of accessing information induces a more memory-based strategy involving more encoding and planning. Experiments 1 and 3 adopt a traditional training and transfer design using the Blocks World Task in which participants were exposed to training trials involving a 2.5-s delay in accessing goal-state information before encountering transfer trials in which there was no access delay. The effect of prior training was assessed by the degree of memory-based strategy adopted in the transfer trials. Training with an access delay had a substantial carry-over effect and increased the subsequent degree of memory-based strategy adopted in the transfer environment. However, such effects do not necessarily occur if goal-state access cost in training is less costly than in transfer trials (Experiment 2). Experiment 4 used a fine-grained intra-trial design to examine the effect of experiencing access cost on one, two, or three occasions within the same trial and found that such experience on two consecutive occasions was sufficient to induce a more memory-based strategy. This paper establishes some effects of training that are relevant to the soft constraints theory and also discusses practical implications.

Optoelectronic-cache memory system architecture.

PubMed

Chiarulli, D M; Levitan, S P

1996-05-10

We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

Highly reliable top-gated thin-film transistor memory with semiconducting, tunneling, charge-trapping, and blocking layers all of flexible polymers.

PubMed

Wang, Wei; Hwang, Sun Kak; Kim, Kang Lib; Lee, Ju Han; Cho, Suk Man; Park, Cheolmin

2015-05-27

The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 10(4), read and write endurance cycles over 100, and time-dependent data retention of 10(8) s, even when fabricated on a mechanically flexible plastic substrate.

47 CFR 76.977 - Minority and educational programming used in lieu of designated commercial leased access capacity.

Code of Federal Regulations, 2010 CFR

2010-10-01

... commercial leased access capacity. (a) A cable operator required by this section to designate channel capacity for commercial use pursuant to 47 U.S.C. 532, may use any such channel capacity for the provision... programming sources, whether or not such source is affiliated with cable operator. The channel capacity used...

Modes of Access: The Influence of Dissemination Channels on the Use of Open Access Monographs

ERIC Educational Resources Information Center

Snijder, Ronald

2014-01-01

Introduction: This paper studies the effects of several dissemination channels in an open access environment by analysing the download data of the OAPEN Library. Method: Download data were obtained containing the number of downloads and the name of the Internet provider. Based on public information, each Internet provider was categorised. The…

Cerebellar models of associative memory: Three papers from IEEE COMPCON spring 1989

NASA Technical Reports Server (NTRS)

Raugh, Michael R. (Editor)

1989-01-01

Three papers are presented on the following topics: (1) a cerebellar-model associative memory as a generalized random-access memory; (2) theories of the cerebellum - two early models of associative memory; and (3) intelligent network management and functional cerebellum synthesis.

The dynamics of sensory buffers: geometric, spatial, and experience-dependent shaping of iconic memory.

PubMed

Graziano, Martin; Sigman, Mariano

2008-05-23

When a stimulus is presented, its sensory trace decays rapidly, lasting for approximately 1000 ms. This brief and labile memory, referred as iconic memory, serves as a buffer before information is transferred to working memory and executive control. Here we explored the effect of different factors--geometric, spatial, and experience--with respect to the access and the maintenance of information in iconic memory and the progressive distortion of this memory. We studied performance in a partial report paradigm, a design wherein recall of only part of a stimulus array is required. Subjects had to report the identity of a letter in a location that was cued in a variable delay after the stimulus onset. Performance decayed exponentially with time, and we studied the different parameters (time constant, zero-delay value, and decay amplitude) as a function of the different factors. We observed that experience (determined by letter frequency) affected the access to iconic memory but not the temporal decay constant. On the contrary, spatial position affected the temporal course of delay. The entropy of the error distribution increased with time reflecting a progressive morphological distortion of the iconic buffer. We discuss our results on the context of a model of information access to executive control and how it is affected by learning and attention.

Oscillatory mechanisms of process binding in memory.

PubMed

Klimesch, Wolfgang; Freunberger, Roman; Sauseng, Paul

2010-06-01

A central topic in cognitive neuroscience is the question, which processes underlie large scale communication within and between different neural networks. The basic assumption is that oscillatory phase synchronization plays an important role for process binding--the transient linking of different cognitive processes--which may be considered a special type of large scale communication. We investigate this question for memory processes on the basis of different types of oscillatory synchronization mechanisms. The reviewed findings suggest that theta and alpha phase coupling (and phase reorganization) reflect control processes in two large memory systems, a working memory and a complex knowledge system that comprises semantic long-term memory. It is suggested that alpha phase synchronization may be interpreted in terms of processes that coordinate top-down control (a process guided by expectancy to focus on relevant search areas) and access to memory traces (a process leading to the activation of a memory trace). An analogous interpretation is suggested for theta oscillations and the controlled access to episodic memories. Copyright (c) 2009 Elsevier Ltd. All rights reserved.

Dual operation characteristics of resistance random access memory in indium-gallium-zinc-oxide thin film transistors

NASA Astrophysics Data System (ADS)

Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.

2014-04-01

In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

Magnet/Hall-Effect Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.

Investigation of multilayer magnetic domain lattice file

NASA Technical Reports Server (NTRS)

Torok, E. J.; Kamin, M.; Tolman, C. H.

1980-01-01

The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

NASA Astrophysics Data System (ADS)

Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

2014-05-01

Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

Distributed reservation control protocols for random access broadcasting channels

NASA Technical Reports Server (NTRS)

Greene, E. P.; Ephremides, A.

1981-01-01

Attention is given to a communication network consisting of an arbitrary number of nodes which can communicate with each other via a time-division multiple access (TDMA) broadcast channel. The reported investigation is concerned with the development of efficient distributed multiple access protocols for traffic consisting primarily of single packet messages in a datagram mode of operation. The motivation for the design of the protocols came from the consideration of efficient multiple access utilization of moderate to high bandwidth (4-40 Mbit/s capacity) communication satellite channels used for the transmission of short (1000-10,000 bits) fixed length packets. Under these circumstances, the ratio of roundtrip propagation time to packet transmission time is between 100 to 10,000. It is shown how a TDMA channel can be adaptively shared by datagram traffic and constant bandwidth users such as in digital voice applications. The distributed reservation control protocols described are a hybrid between contention and reservation protocols.

FD/DAMA Scheme For Mobile/Satellite Communications

NASA Technical Reports Server (NTRS)

Yan, Tsun-Yee; Wang, Charles C.; Cheng, Unjeng; Rafferty, William; Dessouky, Khaled I.

1992-01-01

Integrated-Adaptive Mobile Access Protocol (I-AMAP) proposed to allocate communication channels to subscribers in first-generation MSAT-X mobile/satellite communication network. Based on concept of frequency-division/demand-assigned multiple access (FD/DAMA) where partition of available spectrum adapted to subscribers' demands for service. Requests processed, and competing requests resolved according to channel-access protocol, or free-access tree algorithm described in "Connection Protocol for Mobile/Satellite Communications" (NPO-17735). Assigned spectrum utilized efficiently.

Non-volatile magnetic random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A; Mamidala, Amith R

2014-02-11

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Staging memory for massively parallel processor

NASA Technical Reports Server (NTRS)

Batcher, Kenneth E. (Inventor)

1988-01-01

The invention herein relates to a computer organization capable of rapidly processing extremely large volumes of data. A staging memory is provided having a main stager portion consisting of a large number of memory banks which are accessed in parallel to receive, store, and transfer data words simultaneous with each other. Substager portions interconnect with the main stager portion to match input and output data formats with the data format of the main stager portion. An address generator is coded for accessing the data banks for receiving or transferring the appropriate words. Input and output permutation networks arrange the lineal order of data into and out of the memory banks.

Method for prefetching non-contiguous data structures

DOEpatents

Blumrich, Matthias A [Ridgefield, CT; Chen, Dong [Croton On Hudson, NY; Coteus, Paul W [Yorktown Heights, NY; Gara, Alan G [Mount Kisco, NY; Giampapa, Mark E [Irvington, NY; Heidelberger, Philip [Cortlandt Manor, NY; Hoenicke, Dirk [Ossining, NY; Ohmacht, Martin [Brewster, NY; Steinmacher-Burow, Burkhard D [Mount Kisco, NY; Takken, Todd E [Mount Kisco, NY; Vranas, Pavlos M [Bedford Hills, NY

2009-05-05

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple perfecting for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefect rather than some other predictive algorithm. This enables hardware to effectively prefect memory access patterns that are non-contiguous, but repetitive.

Making Physical Activity Accessible to Older Adults with Memory Loss: A Feasibility Study

ERIC Educational Resources Information Center

Logsdon, Rebecca G.; McCurry, Susan M.; Pike, Kenneth C.; Teri, Linda

2009-01-01

Purpose: For individuals with mild cognitive impairment (MCI), memory loss may prevent successful engagement in exercise, a key factor in preventing additional disability. The Resources and Activities for Life Long Independence (RALLI) program uses behavioral principles to make exercise more accessible for these individuals. Exercises are broken…

Improving the performance of heterogeneous multi-core processors by modifying the cache coherence protocol

NASA Astrophysics Data System (ADS)

Fang, Juan; Hao, Xiaoting; Fan, Qingwen; Chang, Zeqing; Song, Shuying

2017-05-01

In the Heterogeneous multi-core architecture, CPU and GPU processor are integrated on the same chip, which poses a new challenge to the last-level cache management. In this architecture, the CPU application and the GPU application execute concurrently, accessing the last-level cache. CPU and GPU have different memory access characteristics, so that they have differences in the sensitivity of last-level cache (LLC) capacity. For many CPU applications, a reduced share of the LLC could lead to significant performance degradation. On the contrary, GPU applications can tolerate increase in memory access latency when there is sufficient thread-level parallelism. Taking into account the GPU program memory latency tolerance characteristics, this paper presents a method that let GPU applications can access to memory directly, leaving lots of LLC space for CPU applications, in improving the performance of CPU applications and does not affect the performance of GPU applications. When the CPU application is cache sensitive, and the GPU application is insensitive to the cache, the overall performance of the system is improved significantly.

A diary after dinner: How the time of event recording influences later accessibility of diary events.

PubMed

Szőllősi, Ágnes; Keresztes, Attila; Conway, Martin A; Racsmány, Mihály

2015-01-01

Recording the events of a day in a diary may help improve their later accessibility. An interesting question is whether improvements in long-term accessibility will be greater if the diary is completed at the end of the day, or after a period of sleep, the following morning. We investigated this question using an internet-based diary method. On each of five days, participants (n = 109) recorded autobiographical memories for that day or for the previous day. Recording took place either in the morning or in the evening. Following a 30-day retention interval, the diary events were free recalled. We found that participants who recorded their memories in the evening before sleep had best memory performance. These results suggest that the time of reactivation and recording of recent autobiographical events has a significant effect on the later accessibility of those diary events. We discuss our results in the light of related findings that show a beneficial effect of reduced interference during sleep on memory consolidation and reconsolidation.

Facial Expression Influences Face Identity Recognition During the Attentional Blink

PubMed Central

2014-01-01

Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry—suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another. PMID:25286076

Facial expression influences face identity recognition during the attentional blink.

PubMed

Bach, Dominik R; Schmidt-Daffy, Martin; Dolan, Raymond J

2014-12-01

Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry-suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another.

Event memory and moving in a well-known environment.

PubMed

Tamplin, Andrea K; Krawietz, Sabine A; Radvansky, Gabriel A; Copeland, David E

2013-11-01

Research in narrative comprehension has repeatedly shown that when people read about characters moving in well-known environments, the accessibility of object information follows a spatial gradient. That is, the accessibility of objects is best when they are in the same room as the protagonist, and it becomes worse the farther away they are see, e.g., Morrow, Greenspan, & Bower, (Journal of Memory and Language, 26, 165-187, 1987). In the present study, we assessed this finding using an interactive environment in which we had people memorize a map and navigate a virtual simulation of the area. During navigation, people were probed with pairs of object names and indicated whether both objects were in the same room. In contrast to the narrative studies described above, several experiments showed no evidence of a clear spatial gradient. Instead, memory for objects in currently occupied locations (e.g., the location room) was more accessible, especially after a small delay, but no clear decline was evident in the accessibility of information in memory with increased distance. Also, memory for objects along the pathway of movement (i.e., rooms that a person only passed through) showed a transitory suppression effect that was present immediately after movement, but attenuated over time. These results were interpreted in light of the event horizon model of event cognition.

The special role of item-context associations in the direct-access region of working memory.

PubMed

Campoy, Guillermo

2017-09-01

The three-embedded-component model of working memory (WM) distinguishes three representational states corresponding to three WM regions: activated long-term memory, direct-access region (DAR), and focus of attention. Recent neuroimaging research has revealed that access to the DAR is associated with enhanced hippocampal activity. Because the hippocampus mediates the encoding and retrieval of item-context associations, it has been suggested that this hippocampal activation is a consequence of the fact that item-context associations are particularly strong and accessible in the DAR. This study provides behavioral evidence for this view using an item-recognition task to assess the effect of non-intentional encoding and maintenance of item-location associations across WM regions. Five pictures of human faces were sequentially presented in different screen locations followed by a recognition probe. Visual cues immediately preceding the probe indicated the location thereof. When probe stimuli appeared in the same location that they had been presented within the memory set, the presentation of the cue was expected to elicit the activation of the corresponding WM representation through the just-established item-location association, resulting in faster recognition. Results showed this same-location effect, but only for items that, according to their serial position within the memory set, were held in the DAR.

Multi-port, optically addressed RAM

NASA Technical Reports Server (NTRS)

Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)

1989-01-01

A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.

[Voltage-gated potassium channels and human neurological diseases].

PubMed

Jin, Hong-Wei; Wang, Xiao-Liang

2002-01-01

Voltage-gated potassium channels (Kv) is the largest, most complex in potassium channel superfamily. It can be divided into Kv alpha subunit and auxiliary two groups. The roles of some Kv channels types, e.g. rapidly inactivating (A-Type channel) and muscarine sensitive channels (M-type channel) are beginning to be understood. They are prominent in nervous system, acting in delicate and accurate ways to control or modify many physiological and pathological functions including membrane excitability, neurotransmitter release, cell proliferation or degeneration, signal transduction in neuronal network. Many human neurological disease pathogenesis are found to be related to mutant of Kv-channels subunit or subtype, such as, learning and memory impairing, ataxia, epilepsy, deafness, etc.

The effect of nimodipine on memory impairment during spontaneous morphine withdrawal in mice: Corticosterone interaction.

PubMed

Vaseghi, Golnaz; Rabbani, Mohammed; Hajhashemi, Valiollah

2012-11-15

Effects of the nimodipine, L-type calcium channel antagonist, has been studied on memory loss caused by spontaneous morphine withdrawal in mice. Mice were made dependent by increasing doses of morphine over three days. Memory was evaluated using object recognition task, which is based on tendency of rodents to exploration of new objects. The test was comprised of three sections: 15 min habitation, 12 min first trial and 5 min test trial. Recognition index was evaluated 4h after the last dose of morphine. Nimodipine was administrated either in chronic form (1, 5 and 10mg/kg) with daily doses of morphine or it was given as a single injection (5 and 10mg/kg) on the last day. Nimodipine in both treatment forms prevented the memory impairment following spontaneous morphine withdrawal. Corticosterone concentration was increased in brain and blood of mice during abstinence phase and pretreatment with nimodipine prevented the increase in brain and blood corticosterone concentration. The results show that blockade of L-type calcium channels improves memory deficits caused by morphine withdrawal. This indicates that some kind of treatments, such as nimodipine, administrated over the acute withdrawal phase, can prevent memory deficit during withdrawal. Copyright © 2012 Elsevier B.V. All rights reserved.

A Calendar Savant with Episodic Memory Impairments

PubMed Central

Olson, Ingrid R.; Berryhill, Marian E.; Drowos, David B.; Brown, Lawrence; Chatterjee, Anjan

2010-01-01

Patients with memory disorders have severely restricted learning and memory. For instance, patients with anterograde amnesia can learn motor procedures as well as retaining some restricted ability to learn new words and factual information. However, such learning is inflexible and frequently inaccessible to conscious awareness. Here we present a case of patient AC596, a 25-year old male with severe episodic memory impairments, presumably due to anoxia during a preterm birth. In contrast to his poor episodic memory, he exhibits savant-like memory for calendar information that can be flexibly accessed by day, month, and year cues. He also has the ability to recollect the exact date of a wide range of personal experiences over the past 20 years. The patient appears to supplement his generally poor episodic memory by using memorized calendar information as a retrieval cue for autobiographical events. These findings indicate that islands of preserved memory functioning, such as a highly developed semantic memory system, can exist in individuals with severely impaired episodic memory systems. In this particular case, our patient’s memory for dates far outstripped that of normal individuals and served as a keen retrieval cue, allowing him to access information that was otherwise unavailable. PMID:20104390

Neural Correlates of Conceptual Implicit Memory and Their Contamination of Putative Neural Correlates of Explicit Memory

ERIC Educational Resources Information Center

Voss, Joel L.; Paller, Ken A.

2007-01-01

During episodic recognition tests, meaningful stimuli such as words can engender both conscious retrieval (explicit memory) and facilitated access to meaning that is distinct from the awareness of remembering (conceptual implicit memory). Neuroimaging investigations of one type of memory are frequently subject to the confounding influence of the…

Improving memory after interruption: exploiting soft constraints and manipulating information access cost.

PubMed

Morgan, Phillip L; Patrick, John; Waldron, Samuel M; King, Sophia L; Patrick, Tanya

2009-12-01

Forgetting what one was doing prior to interruption is an everyday problem. The recent soft constraints hypothesis (Gray, Sims, Fu, & Schoelles, 2006) emphasizes the strategic adaptation of information processing strategy to the task environment. It predicts that increasing information access cost (IAC: the time, and physical and mental effort involved in accessing information) encourages a more memory-intensive strategy. Like interruptions, access costs are also intrinsic to most work environments, such as when opening documents and e-mails. Three experiments investigated whether increasing IAC during a simple copying task can be an effective method for reducing forgetting following interruption. IAC was designated Low (all information permanently visible), Medium (a mouse movement to uncover target information), or High (an additional few seconds to uncover such information). Experiment 1 found that recall improved across all three levels of IAC. Subsequent experiments found that High IAC facilitated resumption after interruption, particularly when interruption occurred on half of all trials (Experiment 2), and improved prospective memory following two different interrupting tasks, even when one involved the disruptive effect of using the same type of resource as the primary task (Experiment 3). The improvement of memory after interruption with increased IAC supports the prediction of the soft constraints hypothesis. The main disadvantage of a high access cost was a reduction in speed of task completion. The practicality of manipulating IAC as a design method for inducing a memory-intensive strategy to protect against forgetting is discussed. Copyright 2009 APA

Effect of modifying the screw access channels of zirconia implant abutment on the cement flow pattern and retention of zirconia restorations.

PubMed

Wadhwani, Chandur; Chung, Kwok-Hung

2014-07-01

The effect of managing the screw access channels of zirconia implant abutments in the esthetic zone has not been extensively evaluated. The purpose of this study was to determine the effect of an insert placed within the screw access channel of an anterior zirconia implant abutment on the amount of cement retained within the restoration-abutment system and on the dislodging force. Thirty-six paired zirconia abutments and restorations were fabricated by computer-aided design and computer-aided manufacturing and were divided into 3 groups: open abutment, with the screw access channel unfilled; closed abutment, with the screw access channel sealed; and insert abutment, with a thin, tubular metal insert projection continuous with the screw head and placed into the abutment screw access channel. The restorations were cemented to the abutments with preweighed eugenol-free zinc oxide cement (TempBond NE). Excess cement was removed, and the weight of the cement that remained in the restoration-abutment system was measured. Vertical tensile dislodging forces were recorded at a crosshead speed of 5 mm/min after incubation in a 37°C water bath for 24 hours. The specimens were examined for the cement flow pattern into the screw access channel after dislodgement. Data were analyzed with ANOVA, followed by multiple comparisons by using the Tukey honestly significant difference test (α = .05). The mean (standard deviation) of retentive force values ranged from 108.1 ± 29.9 N to 148.3 ± 21.0 N. The retentive force values differed significantly between the insert abutment and both the open abutment (P < .05) and closed abutment groups (P < .01). Distinct patterns of cement failure were noted. The weight of the cement that remained in the system differed significantly, with both open abutment and insert abutment being greater than closed abutment (P < .05). Modifying the internal configuration of the screw access channel of an esthetic zirconia implant abutment with a metal insert significantly affected both the cement retained within the abutment itself and the retention capabilities of the zirconia restoration cemented with TempBond NE cement. Copyright © 2014 Editorial Council for the Journal of Prosthetic Dentistry. Published by Elsevier Inc. All rights reserved.

Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

An Account of Performance in Accessing Information Stored in Long-Term Memory. A Fixed-Links Model Approach

ERIC Educational Resources Information Center

Altmeyer, Michael; Schweizer, Karl; Reiss, Siegbert; Ren, Xuezhu; Schreiner, Michael

2013-01-01

Performance in working memory and short-term memory tasks was employed for predicting performance in a long-term memory task in order to find out about the underlying processes. The types of memory were represented by versions of the Posner Task, the Backward Counting Task and the Sternberg Task serving as measures of long-term memory, working…

Tracing the time course of picture--word processing.

PubMed

Smith, M C; Magee, L E

1980-12-01

A number of independent lines of research have suggested that semantic and articulatory information become available differentially from pictures and words. The first of the experiments reported here sought to clarify the time course by which information about pictures and words becomes available by considering the pattern of interference generated when incongruent pictures and words are presented simultaneously in a Stroop-like situation. Previous investigators report that picture naming is easily disrupted by the presence of a distracting word but that word naming is relatively immune to interference from an incongruent picture. Under the assumption that information available from a completed process may disrupt an ongoing process, these results suggest that words access articulatory information more rapidly than do pictures. Experiment 1 extended this paradigm by requiring subjects to verify the category of the target stimulus. In accordance with the hypothesis that picture access the semantic code more rapidly than words, there was a reversal in the interference pattern: Word categorization suffered considerable disruption, whereas picture categorization was minimally affected by the presence of an incongruent word. Experiment 2 sought to further test the hypothesis that access to semantic and articulatory codes is different for pictures and words by examining memory for those items following naming or categorization. Categorized words were better recognized than named words, whereas the reverse was true for pictures, a result which suggests that picture naming involves more extensive processing than picture categorization. Experiment 3 replicated this result under conditions in which viewing time was held constant. The last experiment extended the investigation of memory differences to a situation in which subjects were required to generate the superordinate category name. Here, memory for categorized pictures was as good as memory for named pictures. Category generation also influenced memory for words, memory performance being superior to that following a yes--no verification of category membership. These experiments suggest a model of information access whereby pictures access semantic information were readily than name information, with the reverse being true for words. Memory for both pictures and words was a function of the amount of processing required to access a particular type of information as well as the extent of response differentiation necessitated by the task.

A configurable and low-power mixed signal SoC for portable ECG monitoring applications.

PubMed

Kim, Hyejung; Kim, Sunyoung; Van Helleputte, Nick; Artes, Antonio; Konijnenburg, Mario; Huisken, Jos; Van Hoof, Chris; Yazicioglu, Refet Firat

2014-04-01

This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μm CMOS process and consumes 32 μ W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.

SERVER DEVELOPMENT FOR NSLS-II PHYSICS APPLICATIONS AND PERFORMANCE ANALYSIS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shen, G.; Kraimer, M.

2011-03-28

The beam commissioning software framework of NSLS-II project adopts a client/server based architecture to replace the more traditional monolithic high level application approach. The server software under development is available via an open source sourceforge project named epics-pvdata, which consists of modules pvData, pvAccess, pvIOC, and pvService. Examples of two services that already exist in the pvService module are itemFinder, and gather. Each service uses pvData to store in-memory transient data, pvService to transfer data over the network, and pvIOC as the service engine. The performance benchmarking for pvAccess and both gather service and item finder service are presented inmore » this paper. The performance comparison between pvAccess and Channel Access are presented also. For an ultra low emittance synchrotron radiation light source like NSLS II, the control system requirements, especially for beam control are tight. To control and manipulate the beam effectively, a use case study has been performed to satisfy the requirement and theoretical evaluation has been performed. The analysis shows that model based control is indispensable for beam commissioning and routine operation. However, there are many challenges such as how to re-use a design model for on-line model based control, and how to combine the numerical methods for modeling of a realistic lattice with the analytical techniques for analysis of its properties. To satisfy the requirements and challenges, adequate system architecture for the software framework for beam commissioning and operation is critical. The existing traditional approaches are self-consistent, and monolithic. Some of them have adopted a concept of middle layer to separate low level hardware processing from numerical algorithm computing, physics modelling, data manipulating and plotting, and error handling. However, none of the existing approaches can satisfy the requirement. A new design has been proposed by introducing service oriented architecture technology, and client interface is undergoing. The design and implementation adopted a new EPICS implementation, namely epics-pvdata [9], which is under active development. The implementation of this project under Java is close to stable, and binding to other language such as C++ and/or Python is undergoing. In this paper, we focus on the performance benchmarking and comparison for pvAccess and Channel Access, the performance evaluation for 2 services, gather and item finder respectively.« less

Performance Analysis of Modified Accelerative Preallocation MAC Protocol for Passive Star-Coupled WDMA Networks

NASA Astrophysics Data System (ADS)

Yun, Changho; Kim, Kiseon

2006-04-01

For the passive star-coupled wavelength-division multiple-access (WDMA) network, a modified accelerative preallocation WDMA (MAP-WDMA) media access control (MAC) protocol is proposed, which is based on AP-WDMA. To show the advantages of MAP-WDMA as an adequate MAC protocol for the network over AP-WDMA, the channel utilization, the channel-access delay, and the latency of MAP-WDMA are investigated and compared with those of AP-WDMA under various data traffic patterns, including uniform, quasi-uniform type, disconnected type, mesh type, and ring type data traffics, as well as the assumption that a given number of network stations is equal to that of channels, in other words, without channel sharing. As a result, the channel utilization of MAP-WDMA can be competitive with respect to that of AP-WDMA at the expense of insignificantly higher latency. Namely, if the number of network stations is small, MAP-WDMA provides better channel utilization for uniform, quasi-uniform-type, and disconnected-type data traffics at all data traffic loads, as well as for mesh and ring-type data traffics at low data traffic loads. Otherwise, MAP-WDMA only outperforms AP-WDMA for the first three data traffics at higher data traffic loads. In the aspect of channel-access delay, MAP-WDMA gives better performance than AP-WDMA, regardless of data traffic patterns and the number of network stations.

Does Tracing Worked Examples Enhance Geometry Learning?

ERIC Educational Resources Information Center

Hu, Fang-Tzu; Ginns, Paul; Bobis, Janette

2014-01-01

Cognitive load theory seeks to generate novel instructional designs through a focus on human cognitive architecture including a limited working memory; however, the potential for enhancing learning through non-visual or non-auditory working memory channels is yet to be evaluated. This exploratory experiment tested whether explicit instructions to…

Review of optical memory technologies

NASA Technical Reports Server (NTRS)

Chen, D.

1972-01-01

Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.

Optical interconnection network for parallel access to multi-rank memory in future computing systems.

PubMed

Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun

2015-08-10

With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent.

Characteristics of Reduced Graphene Oxide Quantum Dots for a Flexible Memory Thin Film Transistor.

PubMed

Kim, Yo-Han; Lee, Eun Yeol; Lee, Hyun Ho; Seo, Tae Seok

2017-05-17

Reduced graphene oxide quantum dot (rGOQD) devices in formats of capacitor and thin film transistor (TFT) were demonstrated and examined as the first trial to achieve nonambipolar channel property. In addition, through a gold nanoparticle (Au NP) layer embedded between the rGOQD active channel and dielectric layer, memory capacitor and TFT performances were realized by capacitance-voltage (C-V) hysteresis and gate program, erase, and reprogram biases. First, capacitor structure of the rGOQD memory device was constructed to examine memory charging effect featured in hysteretic C-V behavior with a 30 nm dielectric layer of cross-linked poly(vinyl alcohol). For the intervening Au NP charging layer, self-assembled monolayer (SAM) formation of the Au NP was executed to utilize electrostatic interaction by a dip-coating process under ambient environments with a conformal fabrication uniformity. Second, the rGOQD memory TFT device was also constructed in the same format of the Au NPs SAMs on a flexible substrate. Characteristics of the rGOQD TFT output showed novel saturation curves unlike typical graphene-based TFTs. However, The rGOQD TFT device reveals relatively low on/off ratio of 10 1 and mobility of 5.005 cm 2 /V·s. For the memory capacitor, the flat-band voltage shift (ΔV FB ) was measured as 3.74 V for ±10 V sweep, and for the memory TFT, the threshold voltage shift (ΔV th ) by the Au NP charging was detected as 7.84 V. In summary, it was concluded that the rGOQD memory device could accomplish an ideal graphene-based memory performance, which could have provided a wide memory window and saturated output characteristics.

Three-dimensional magnetic bubble memory system

NASA Technical Reports Server (NTRS)

Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging.

PubMed

Ibrahim, Aya; Hager, Pascal A; Bartolini, Andrea; Angiolini, Federico; Arditi, Marcel; Thiran, Jean-Philippe; Benini, Luca; De Micheli, Giovanni

2017-08-01

Ultrasound imaging is a reference medical diagnostic technique, thanks to its blend of versatility, effectiveness, and moderate cost. The core computation of all ultrasound imaging methods is based on simple formulae, except for those required to calculate acoustic propagation delays with high precision and throughput. Unfortunately, advanced three-dimensional (3-D) systems require the calculation or storage of billions of such delay values per frame, which is a challenge. In 2-D systems, this requirement can be four orders of magnitude lower, but efficient computation is still crucial in view of low-power implementations that can be battery-operated, enabling usage in numerous additional scenarios. In this paper, we explore two smart designs of the delay generation function. To quantify their hardware cost, we implement them on FPGA and study their footprint and performance. We evaluate how these architectures scale to different ultrasound applications, from a low-power 2-D system to a next-generation 3-D machine. When using numerical approximations, we demonstrate the ability to generate delay values with sufficient throughput to support 10 000-channel 3-D imaging at up to 30 fps while using 63% of a Virtex 7 FPGA, requiring 24 MB of external memory accessed at about 32 GB/s bandwidth. Alternatively, with similar FPGA occupation, we show an exact calculation method that reaches 24 fps on 1225-channel 3-D imaging and does not require external memory at all. Both designs can be scaled to use a negligible amount of resources for 2-D imaging in low-power applications and for ultrafast 2-D imaging at hundreds of frames per second.

Perpetual Model Validation

DTIC Science & Technology

2017-03-01

models of software execution, for example memory access patterns, to check for security intrusions. Additional research was performed to tackle the...considered using indirect models of software execution, for example memory access patterns, to check for security intrusions. Additional research ...deterioration for example , no longer corresponds to the model used during verification time. Finally, the research looked at ways to combine hybrid systems

Design of Unstructured Adaptive (UA) NAS Parallel Benchmark Featuring Irregular, Dynamic Memory Accesses

NASA Technical Reports Server (NTRS)

Feng, Hui-Yu; VanderWijngaart, Rob; Biswas, Rupak; Biegel, Bryan (Technical Monitor)

2001-01-01

We describe the design of a new method for the measurement of the performance of modern computer systems when solving scientific problems featuring irregular, dynamic memory accesses. The method involves the solution of a stylized heat transfer problem on an unstructured, adaptive grid. A Spectral Element Method (SEM) with an adaptive, nonconforming mesh is selected to discretize the transport equation. The relatively high order of the SEM lowers the fraction of wall clock time spent on inter-processor communication, which eases the load balancing task and allows us to concentrate on the memory accesses. The benchmark is designed to be three-dimensional. Parallelization and load balance issues of a reference implementation will be described in detail in future reports.

A Pilot Memory Café for People with Learning Disabilities and Memory Difficulties

ERIC Educational Resources Information Center

Kiddle, Hannah; Drew, Neil; Crabbe, Paul; Wigmore, Jonathan

2016-01-01

Memory cafés have been found to normalise experiences of dementia and provide access to an accepting social network. People with learning disabilities are at increased risk of developing dementia, but the possible benefits of attending a memory café are not known. This study evaluates a 12-week pilot memory café for people with learning…

Large Capacity of Conscious Access for Incidental Memories in Natural Scenes.

PubMed

Kaunitz, Lisandro N; Rowe, Elise G; Tsuchiya, Naotsugu

2016-09-01

When searching a crowd, people can detect a target face only by direct fixation and attention. Once the target is found, it is consciously experienced and remembered, but what is the perceptual fate of the fixated nontarget faces? Whereas introspection suggests that one may remember nontargets, previous studies have proposed that almost no memory should be retained. Using a gaze-contingent paradigm, we asked subjects to visually search for a target face within a crowded natural scene and then tested their memory for nontarget faces, as well as their confidence in those memories. Subjects remembered up to seven fixated, nontarget faces with more than 70% accuracy. Memory accuracy was correlated with trial-by-trial confidence ratings, which implies that the memory was consciously maintained and accessed. When the search scene was inverted, no more than three nontarget faces were remembered. These findings imply that incidental memory for faces, such as those recalled by eyewitnesses, is more reliable than is usually assumed. © The Author(s) 2016.

Performance of DPSK with convolutional encoding on time-varying fading channels

NASA Technical Reports Server (NTRS)

Mui, S. Y.; Modestino, J. W.

1977-01-01

The bit error probability performance of a differentially-coherent phase-shift keyed (DPSK) modem with convolutional encoding and Viterbi decoding on time-varying fading channels is examined. Both the Rician and the lognormal channels are considered. Bit error probability upper bounds on fully-interleaved (zero-memory) fading channels are derived and substantiated by computer simulation. It is shown that the resulting coded system performance is a relatively insensitive function of the choice of channel model provided that the channel parameters are related according to the correspondence developed as part of this paper. Finally, a comparison of DPSK with a number of other modulation strategies is provided.

Non-Markovianity and reservoir memory of quantum channels: a quantum information theory perspective

PubMed Central

Bylicka, B.; Chruściński, D.; Maniscalco, S.

2014-01-01

Quantum technologies rely on the ability to coherently transfer information encoded in quantum states along quantum channels. Decoherence induced by the environment sets limits on the efficiency of any quantum-enhanced protocol. Generally, the longer a quantum channel is the worse its capacity is. We show that for non-Markovian quantum channels this is not always true: surprisingly the capacity of a longer channel can be greater than of a shorter one. We introduce a general theoretical framework linking non-Markovianity to the capacities of quantum channels and demonstrate how harnessing non-Markovianity may improve the efficiency of quantum information processing and communication. PMID:25043763

Controllably releasing long-lived quantum memory for photonic polarization qubit into multiple spatially-separate photonic channels

PubMed Central

Chen, Lirong; Xu, Zhongxiao; Zeng, Weiqing; Wen, Yafei; Li, Shujing; Wang, Hai

2016-01-01

We report an experiment in which long-lived quantum memories for photonic polarization qubits (PPQs) are controllably released into any one of multiple spatially-separate channels. The PPQs are implemented with an arbitrarily-polarized coherent signal light pulses at the single-photon level and are stored in cold atoms by means of electromagnetic-induced-transparency scheme. Reading laser pulses propagating along the direction at a small angle relative to quantum axis are applied to release the stored PPQs into an output channel. By changing the propagating directions of the read laser beam, we controllably release the retrieved PPQs into 7 different photonic output channels, respectively. At a storage time of δt = 5 μs, the least quantum-process fidelity in 7 different output channels is ~89%. At one of the output channels, the measured maximum quantum-process fidelity for the PPQs is 94.2% at storage time of δt = 0.85 ms. At storage time of 6 ms, the quantum-process fidelity is still beyond the bound of 78% to violate the Bell’s inequality. The demonstrated controllable release of the stored PPQs may extend the capabilities of the quantum information storage technique. PMID:27667262

The Users of Cable TV Access Channels: A Study of the Diffusion and Adoption of a Communications Innovation.

ERIC Educational Resources Information Center

Sparkes, Vernone M.

A mail survey of 91 past and present users of the community programing (public access) channels in the Toronto, Canada, area revealed that personal contact is most important in the diffusion of knowledge about access opportunities. Friends and colleagues were the most often cited initial source of information; but contact by the cable company…

The Effect of NUMA Tunings on CPU Performance

NASA Astrophysics Data System (ADS)

Hollowell, Christopher; Caramarcu, Costin; Strecker-Kellogg, William; Wong, Antonio; Zaytsev, Alexandr

2015-12-01

Non-Uniform Memory Access (NUMA) is a memory architecture for symmetric multiprocessing (SMP) systems where each processor is directly connected to separate memory. Indirect access to other CPU's (remote) RAM is still possible, but such requests are slower as they must also pass through that memory's controlling CPU. In concert with a NUMA-aware operating system, the NUMA hardware architecture can help eliminate the memory performance reductions generally seen in SMP systems when multiple processors simultaneously attempt to access memory. The x86 CPU architecture has supported NUMA for a number of years. Modern operating systems such as Linux support NUMA-aware scheduling, where the OS attempts to schedule a process to the CPU directly attached to the majority of its RAM. In Linux, it is possible to further manually tune the NUMA subsystem using the numactl utility. With the release of Red Hat Enterprise Linux (RHEL) 6.3, the numad daemon became available in this distribution. This daemon monitors a system's NUMA topology and utilization, and automatically makes adjustments to optimize locality. As the number of cores in x86 servers continues to grow, efficient NUMA mappings of processes to CPUs/memory will become increasingly important. This paper gives a brief overview of NUMA, and discusses the effects of manual tunings and numad on the performance of the HEPSPEC06 benchmark, and ATLAS software.

Older adults do not notice their names: a new twist to a classic attention task.

PubMed

Naveh-Benjamin, Moshe; Kilb, Angela; Maddox, Geoffrey B; Thomas, Jenna; Fine, Hope C; Chen, Tina; Cowan, Nelson

2014-11-01

Although working memory spans are, on average, lower for older adults than young adults, we demonstrate in 5 experiments a way in which older adults paradoxically resemble higher capacity young adults. Specifically, in a selective-listening task, older adults almost always failed to notice their names presented in an unattended channel. This is an exaggeration of what high-span young adults show and the opposite of what low-span young adults show. This striking finding in older adults remained significant after controlling for working memory span and for noticing their names in an attended channel. The findings were replicated when presentation rate was slowed and when the ear in which the unattended name was presented was controlled. These results point to an account of older adults' performance involving not only an inhibition factor, which allows high-span young adults to suppress the channel to be ignored, but also an attentional capacity factor, with more unallocated capacity. This capacity allows low-span young adults to notice their names much more often than older adults with comparably low working memory spans do. PsycINFO Database Record (c) 2014 APA, all rights reserved.

Effect of Pore Topology and Accessibility on Gas Adsorption Capacity in Zeolitic-Imidazolate Frameworks: Bringing Molecular Simulation Close to Experiment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Babarao, Ravichandar; Dai, Sheng; Jiang, Deen

2011-01-01

When all cages are assumed to be accessible, popular force fields such as universal force field (UFF) and DREIDING dramatically overpredicted gas adsorption capacity in two widely studied zeolitic-imidazolate frameworks (ZIFs), ZIF-68 and -69. Instead of adjusting the force-field parameters to match the experiments, herein we show that when the pore topology and accessibility are correctly taken into account, simulations with the standard force fields agree very well with the experiments. Careful inspection shows that ZIF-68 and -69 have two one-dimensional channels, which are not interaccessible to gases. The small channel consists of alternating small (HPR) and medium (GME) cages,more » while the large channel comprises the large (KNO) cages. Our analysis indicates that the small channel is not accessible to gases such as CO{sub 2}. So when the cages in the small channel are intentionally blocked in our simulation, the predicted adsorption capacities of CO{sub 2}, CH{sub 4} and N{sub 2} at room temperature from standard force-field parameters for the framework show excellent agreement with the experimental results. In the case of H{sub 2}, all cages are accessible, so simulation results without cage-blocking show excellent agreement with experiment. Due to the promising potential of ZIFs in gas storage and separation, our work here shows that pore topology and accessibility should be carefully examined to understand how gases adsorb in ZIFs.« less

Enhancing Memory in Your Students: COMPOSE Yourself!

ERIC Educational Resources Information Center

Rotter, Kathleen M.

2009-01-01

The essence of teaching is, in fact, creating new memories for your students. The teacher's role is to help students store the correct information (memories) in ways that make recall and future access and use likely. Therefore, choosing techniques to enhance memory is possibly the most critical aspect of instructional design. COMPOSE is an acronym…

Development of a fluorimeter using laser-induced single-shot fluorescence lifetime spectroscopy

NASA Astrophysics Data System (ADS)

Eisum, Niels H.; Lynggaard-Jensen, Anders

1990-08-01

The developed laboratory prototype fluorimeter is the first step to a new in-situ instrument, and is based on a pulsed nitrogen laser (pumping a color dye laser and the laserbeam passing through a frequency doubler) with a pulse width less than 1 nsec. With such a short excitation pulse it is possible to measure the exponential decay of the fluorescence from the aromatic compounds and thus determine the fluorescence lifetime-curves, which are typically in the region of 5-40 nsec. The emitted fluorescence is collected simultaneously in 35 channels in the wavelength region 250-600 nm. If the fluorescence falls within the transmission areas of the interference filters in each channel the light will be collected by a plastic light guide (doped PMMA) in the actual channel and transmitted to the channels photo multiplier tube (PMT). (The use of the plastic light guide improves the sensitivity). The signal from the PMT is passed on to a 200 MHz 8-bit flash AID-converter connected to a local memory. From this local memory the digital lifetime curves from each channel are transmitted to a computer for presentation of the 3-dimensional spectrum. This spectrum has been obtained with a single laser shot.

Exploring the Structure of the Voltage-gated Na+ Channel by an Engineered Drug Access Pathway to the Receptor Site for Local Anesthetics*

PubMed Central

Lukacs, Peter; Gawali, Vaibhavkumar S.; Cervenka, Rene; Ke, Song; Koenig, Xaver; Rubi, Lena; Zarrabi, Touran; Hilber, Karlheinz; Stary-Weinzinger, Anna; Todt, Hannes

2014-01-01

Despite the availability of several crystal structures of bacterial voltage-gated Na+ channels, the structure of eukaryotic Na+ channels is still undefined. We used predictions from available homology models and crystal structures to modulate an external access pathway for the membrane-impermeant local anesthetic derivative QX-222 into the internal vestibule of the mammalian rNaV1.4 channel. Potassium channel-based homology models predict amino acid Ile-1575 in domain IV segment 6 to be in close proximity to Lys-1237 of the domain III pore-loop selectivity filter. The mutation K1237E has been shown previously to increase the diameter of the selectivity filter. We found that an access pathway for external QX-222 created by mutations of Ile-1575 was abolished by the additional mutation K1237E, supporting the notion of a close spatial relationship between sites 1237 and 1575. Crystal structures of bacterial voltage-gated Na+ channels predict that the side chain of rNaV1.4 Trp-1531 of the domain IV pore-loop projects into the space between domain IV segment 6 and domain III pore-loop and, therefore, should obstruct the putative external access pathway. Indeed, mutations W1531A and W1531G allowed for exceptionally rapid access of QX-222. In addition, W1531G created a second non-selective ion-conducting pore, bypassing the outer vestibule but probably merging into the internal vestibule, allowing for control by the activation gate. These data suggest a strong structural similarity between bacterial and eukaryotic voltage-gated Na+ channels. PMID:24947510

Memristors in plants

PubMed Central

Volkov, Alexander G; Tucket, Clayton; Reedus, Jada; Volkova, Maya I; Markin, Vladislav S; Chua, Leon

2014-01-01

We investigated electrical circuitry of the Venus flytrap, Mimosa pudica and Aloe vera. The goal was to discover if these plants might have a new electrical component—a resistor with memory. This element has attracted great interest recently and the researchers were looking for its presence in different systems. The analysis was based on cyclic current-voltage characteristic where the resistor with memory should manifest itself. We found that the electrostimulation of plants by bipolar sinusoidal or triangle periodic waves induces electrical responses in the Venus flytrap, Mimosa pudica and Aloe vera with fingerprints of memristors. Tetraethylammonium chloride, an inhibitor of voltage gated K+ channels, transforms a memristor to a resistor in plant tissue. Our results demonstrate that a voltage gated K+ channel in the excitable tissue of plants has properties of a memristor. This study can be a starting point for understanding mechanisms of memory, learning, circadian rhythms, and biological clocks. PMID:24556876

Feasibility study of a real-time operating system for a multichannel MPEG-4 encoder

NASA Astrophysics Data System (ADS)

Lehtoranta, Olli; Hamalainen, Timo D.

2005-03-01

Feasibility of DSP/BIOS real-time operating system for a multi-channel MPEG-4 encoder is studied. Performances of two MPEG-4 encoder implementations with and without the operating system are compared in terms of encoding frame rate and memory requirements. The effects of task switching frequency and number of parallel video channels to the encoding frame rate are measured. The research is carried out on a 200 MHz TMS320C6201 fixed point DSP using QCIF (176x144 pixels) video format. Compared to a traditional DSP implementation without an operating system, inclusion of DSP/BIOS reduces total system throughput only by 1 QCIF frames/s. The operating system has 6 KB data memory overhead and program memory requirement of 15.7 KB. Hence, the overhead is considered low enough for resource critical mobile video applications.

Vector generator scan converter

DOEpatents

Moore, James M.; Leighton, James F.

1990-01-01

High printing speeds for graphics data are achieved with a laser printer by transmitting compressed graphics data from a main processor over an I/O (input/output) channel to a vector generator scan converter which reconstructs a full graphics image for input to the laser printer through a raster data input port. The vector generator scan converter includes a microprocessor with associated microcode memory containing a microcode instruction set, a working memory for storing compressed data, vector generator hardward for drawing a full graphic image from vector parameters calculated by the microprocessor, image buffer memory for storing the reconstructed graphics image and an output scanner for reading the graphics image data and inputting the data to the printer. The vector generator scan converter eliminates the bottleneck created by the I/O channel for transmitting graphics data from the main processor to the laser printer, and increases printer speed up to thirty fold.

Vector generator scan converter

DOEpatents

Moore, J.M.; Leighton, J.F.

1988-02-05

High printing speeds for graphics data are achieved with a laser printer by transmitting compressed graphics data from a main processor over an I/O channel to a vector generator scan converter which reconstructs a full graphics image for input to the laser printer through a raster data input port. The vector generator scan converter includes a microprocessor with associated microcode memory containing a microcode instruction set, a working memory for storing compressed data, vector generator hardware for drawing a full graphic image from vector parameters calculated by the microprocessor, image buffer memory for storing the reconstructed graphics image and an output scanner for reading the graphics image data and inputting the data to the printer. The vector generator scan converter eliminates the bottleneck created by the I/O channel for transmitting graphics data from the main processor to the laser printer, and increases printer speed up to thirty fold. 7 figs.

Persistent anterograde amnesia following limbic encephalitis associated with antibodies to the voltage-gated potassium channel complex.

PubMed

Butler, Christopher R; Miller, Thomas D; Kaur, Manveer S; Baker, Ian W; Boothroyd, Georgie D; Illman, Nathan A; Rosenthal, Clive R; Vincent, Angela; Buckley, Camilla J

2014-04-01

Limbic encephalitis (LE) associated with antibodies to the voltage-gated potassium channel complex (VGKC) is a potentially reversible cause of cognitive impairment. Despite the prominence of cognitive dysfunction in this syndrome, little is known about patients' neuropsychological profile at presentation or their long-term cognitive outcome. We used a comprehensive neuropsychological test battery to evaluate cognitive function longitudinally in 19 patients with VGKC-LE. Before immunotherapy, the group had significant impairment of memory, processing speed and executive function, whereas language and perceptual organisation were intact. At follow-up, cognitive impairment was restricted to the memory domain, with processing speed and executive function having returned to the normal range. Residual memory function was predicted by the antibody titre at presentation. The results show that, despite broad cognitive dysfunction in the acute phase, patients with VGKC-LE often make a substantial recovery with immunotherapy but may be left with permanent anterograde amnesia.

Random-access algorithms for multiuser computer communication networks. Doctoral thesis, 1 September 1986-31 August 1988

DOE Office of Scientific and Technical Information (OSTI.GOV)

Papantoni-Kazakos, P.; Paterakis, M.

1988-07-01

For many communication applications with time constraints (e.g., transmission of packetized voice messages), a critical performance measure is the percentage of messages transmitted within a given amount of time after their generation at the transmitting station. This report presents a random-access algorithm (RAA) suitable for time-constrained applications. Performance analysis demonstrates that significant message-delay improvement is attained at the expense of minimal traffic loss. Also considered is the case of noisy channels. The noise effect appears at erroneously observed channel feedback. Error sensitivity analysis shows that the proposed random-access algorithm is insensitive to feedback channel errors. Window Random-Access Algorithms (RAAs) aremore » considered next. These algorithms constitute an important subclass of Multiple-Access Algorithms (MAAs); they are distributive, and they attain high throughput and low delays by controlling the number of simultaneously transmitting users.« less

Frequent Statement and Dereference Elimination for Imperative and Object-Oriented Distributed Programs

PubMed Central

El-Zawawy, Mohamed A.

2014-01-01

This paper introduces new approaches for the analysis of frequent statement and dereference elimination for imperative and object-oriented distributed programs running on parallel machines equipped with hierarchical memories. The paper uses languages whose address spaces are globally partitioned. Distributed programs allow defining data layout and threads writing to and reading from other thread memories. Three type systems (for imperative distributed programs) are the tools of the proposed techniques. The first type system defines for every program point a set of calculated (ready) statements and memory accesses. The second type system uses an enriched version of types of the first type system and determines which of the ready statements and memory accesses are used later in the program. The third type system uses the information gather so far to eliminate unnecessary statement computations and memory accesses (the analysis of frequent statement and dereference elimination). Extensions to these type systems are also presented to cover object-oriented distributed programs. Two advantages of our work over related work are the following. The hierarchical style of concurrent parallel computers is similar to the memory model used in this paper. In our approach, each analysis result is assigned a type derivation (serves as a correctness proof). PMID:24892098

Attention to and Memory for Audio and Video Information in Television Scenes.

ERIC Educational Resources Information Center

Basil, Michael D.

A study investigated whether selective attention to a particular television modality resulted in different levels of attention to and memory for each modality. Two independent variables manipulated selective attention. These were the semantic channel (audio or video) and viewers' instructed focus (audio or video). These variables were fully…

DREAM/Calsenilin/KChIP3 Modulates Strategy Selection and Estradiol-Dependent Learning and Memory

ERIC Educational Resources Information Center

Tunur, Tumay; Stelly, Claire E.; Schrader, Laura Ann

2013-01-01

Downstream regulatory element antagonist modulator (DREAM)/calsenilin(C)/K+ channel interacting protein 3 (KChIP3) is a multifunctional Ca[superscript 2+]-binding protein highly expressed in the hippocampus that inhibits hippocampus-sensitive memory and synaptic plasticity in male mice. Initial studies in our lab suggested opposing effects of…

Retention and Fading of Military Skills: Literature Review

DTIC Science & Technology

2000-04-01

distinction between availability and accessibility of human memory ( Tulving & Pearlstone , 1966; Tulving , 1983). Observation of some decrement in performance...Army War College. TULVING , E. (1983). Elements of Episodic Memory. London: Oxford University Press. TULVING , E., & PEARLSTONE , Z. (1966). Availability...store ( Tulving , 1983). To access this knowledge, the individual consciously recalls facts about the task and attempts to use them to guide performance

Access to Attitude-Relevant Information in Memory as a Determinant of Persuasion: The Role of Message and Communicator Attributes.

ERIC Educational Resources Information Center

Wood, Wendy; And Others

Research literature shows that people with access to attitude-relevant information in memory are able to draw on relevant beliefs and prior experiences when analyzing a persuasive message. This suggests that people who can retrieve little attitude-relevant information should be less able to engage in systematic processing. Two experiments were…

76 FR 45295 - In the Matter of Certain Static Random Access Memories and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-28

... supplementing the amended complaint was filed on June 28, 2011. A second amended complaint was filed on July 13... of certain static random access memories and products containing same by reason of infringement of... 13 of the `937 patent, and whether an industry in the United States exists as required by subsection...

Implementing a bubble memory hierarchy system

NASA Technical Reports Server (NTRS)

Segura, R.; Nichols, C. D.

1979-01-01

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Integrated Vertical Bloch Line (VBL) memory

NASA Technical Reports Server (NTRS)

Katti, R. R.; Wu, J. C.; Stadler, H. L.

1991-01-01

Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.

Asynchronous, Decentralized DS-CDMA Using Feedback-Controlled Spreading Sequences for Time-Dispersive Channels

NASA Astrophysics Data System (ADS)

Miyatake, Teruhiko; Chiba, Kazuki; Hamamura, Masanori; Tachikawa, Shin'ichi

We propose a novel asynchronous direct-sequence codedivision multiple access (DS-CDMA) using feedback-controlled spreading sequences (FCSSs) (FCSS/DS-CDMA). At the receiver of FCSS/DS-CDMA, the code-orthogonalizing filter (COF) produces a spreading sequence, and the receiver returns the spreading sequence to the transmitter. Then the transmitter uses the spreading sequence as its updated version. The performance of FCSS/DS-CDMA is evaluated over time-dispersive channels. The results indicate that FCSS/DS-CDMA greatly suppresses both the intersymbol interference (ISI) and multiple access interference (MAI) over time-invariant channels. FCSS/DS-CDMA is applicable to the decentralized multiple access.

Exploration of the pore structure of a peptide-gated Na+channel

PubMed Central

Poët, Mallorie; Tauc, Michel; Lingueglia, Eric; Cance, Peggy; Poujeol, Philippe; Lazdunski, Michel; Counillon, Laurent

2001-01-01

The FMRF-amide-activated sodium channel (FaNaC), a member of the ENaC/Degenerin family, is a homotetramer, each subunit containing two transmembrane segments. We changed independently every residue of the first transmembrane segment (TM1) into a cysteine and tested each position’s accessibility to the cysteine covalent reagents MTSET and MTSES. Eleven mutants were accessible to the cationic MTSET, showing that TM1 faces the ion translocation pathway. This was confirmed by the accessibility of cysteines present in the acid-sensing ion channels and other mutations introduced in FaNaC TM1. Modification of accessibilities for positions 69, 71 and 72 in the open state shows that the gating mechanism consists of the opening of a constriction close to the intracellular side. The anionic MTSES did not penetrate into the channel, indicating the presence of a charge selectivity filter in the outer vestibule. Furthermore, amiloride inhibition resulted in the channel occlusion in the middle of the pore. Summarizing, the ionic pore of FaNaC includes a large aqueous cavity, with a charge selectivity filter in the outer vestibule and the gate close to the interior. PMID:11598003

Memory elements in the electrical network of Mimosa pudica L.

PubMed Central

Volkov, Alexander G; Reedus, Jada; Mitchell, Colee M; Tuckett, Clayton; Volkova, Maya I; Markin, Vladislav S; Chua, Leon

2014-01-01

The fourth basic circuit element, a memristor, is a resistor with memory that was postulated by Chua in 1971. Here we found that memristors exist in vivo. The electrostimulation of the Mimosa pudica by bipolar sinusoidal or triangle periodic waves induce electrical responses with fingerprints of memristors. Uncouplers carbonylcyanide-3-chlorophenylhydrazone and carbonylcyanide-4-trifluoromethoxy-phenyl hydrazone decrease the amplitude of electrical responses at low and high frequencies of bipolar sinusoidal or triangle periodic electrostimulating waves. Memristive behavior of an electrical network in the Mimosa pudica is linked to the properties of voltage gated ion channels: the channel blocker TEACl reduces the electric response to a conventional resistor. Our results demonstrate that a voltage gated K+ channel in the excitable tissue of plants has properties of a memristor. The discovery of memristors in plants creates a new direction in the modeling and understanding of electrical phenomena in plants. PMID:25482796

Memory elements in the electrical network of Mimosa pudica L.

PubMed

Volkov, Alexander G; Reedus, Jada; Mitchell, Colee M; Tuckett, Clayton; Volkova, Maya I; Markin, Vladislav S; Chua, Leon

2014-01-01

The fourth basic circuit element, a memristor, is a resistor with memory that was postulated by Chua in 1971. Here we found that memristors exist in vivo. The electrostimulation of the Mimosa pudica by bipolar sinusoidal or triangle periodic waves induce electrical responses with fingerprints of memristors. Uncouplers carbonylcyanide-3-chlorophenylhydrazone and carbonylcyanide-4-trifluoromethoxy-phenyl hydrazone decrease the amplitude of electrical responses at low and high frequencies of bipolar sinusoidal or triangle periodic electrostimulating waves. Memristive behavior of an electrical network in the Mimosa pudica is linked to the properties of voltage gated ion channels: the channel blocker TEACl reduces the electric response to a conventional resistor. Our results demonstrate that a voltage gated K(+) channel in the excitable tissue of plants has properties of a memristor. The discovery of memristors in plants creates a new direction in the modeling and understanding of electrical phenomena in plants.

Total ionizing dose effect in an input/output device for flash memory

NASA Astrophysics Data System (ADS)

Liu, Zhang-Li; Hu, Zhi-Yuan; Zhang, Zheng-Xuan; Shao, Hua; Chen, Ming; Bi, Da-Wei; Ning, Bing-Xu; Zou, Shi-Chang

2011-12-01

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

Boost Up Carrier Mobility for Ferroelectric Organic Transistor Memory via Buffering Interfacial Polarization Fluctuation

PubMed Central

Sun, Huabin; Wang, Qijing; Li, Yun; Lin, Yen-Fu; Wang, Yu; Yin, Yao; Xu, Yong; Liu, Chuan; Tsukagoshi, Kazuhito; Pan, Lijia; Wang, Xizhang; Hu, Zheng; Shi, Yi

2014-01-01

Ferroelectric organic field-effect transistors (Fe-OFETs) have been attractive for a variety of non-volatile memory device applications. One of the critical issues of Fe-OFETs is the improvement of carrier mobility in semiconducting channels. In this article, we propose a novel interfacial buffering method that inserts an ultrathin poly(methyl methacrylate) (PMMA) between ferroelectric polymer and organic semiconductor layers. A high field-effect mobility (μFET) up to 4.6 cm2 V−1 s−1 is obtained. Subsequently, the programming process in our Fe-OFETs is mainly dominated by the switching between two ferroelectric polarizations rather than by the mobility-determined charge accumulation at the channel. Thus, the “reading” and “programming” speeds are significantly improved. Investigations show that the polarization fluctuation at semiconductor/insulator interfaces, which affect the charge transport in conducting channels, can be suppressed effectively using our method. PMID:25428665

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segmentmore » of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.« less

Guilt as a Motivator for Moral Judgment: An Autobiographical Memory Study

PubMed Central

Knez, Igor; Nordhall, Ola

2017-01-01

The aim was to investigate the phenomenology of self-defining moral memory and its relations to self-conscious feelings of guilt and willingness to do wrong (moral intention) in social and economic moral situations. We found that people use guilt as a moral motivator for their moral intention. The reparative function of guilt varied, however, with type of situation; that is, participants felt guiltier and were less willing to do wrong in economic compared to social moral situations. The self-defining moral memory was shown to be relatively more easy to access (accessibility), logically structured (coherence), vivid, seen from the first-person perspective (visual perspective), real (sensory detail); but was relatively less positive (valence), emotionally intense, chronologically clear (time perspective), in agreement with the present self (distancing), and shared. Finally, it was indicated that the more guilt people felt the more hidden/denied (less accessible), but more real (more sensory details), the self-defining moral memory. PMID:28539906

Testing of Error-Correcting Sparse Permutation Channel Codes

NASA Technical Reports Server (NTRS)

Shcheglov, Kirill, V.; Orlov, Sergei S.

2008-01-01

A computer program performs Monte Carlo direct numerical simulations for testing sparse permutation channel codes, which offer strong error-correction capabilities at high code rates and are considered especially suitable for storage of digital data in holographic and volume memories. A word in a code of this type is characterized by, among other things, a sparseness parameter (M) and a fixed number (K) of 1 or "on" bits in a channel block length of N.

PAD-MAC: Primary User Activity-Aware Distributed MAC for Multi-Channel Cognitive Radio Networks

PubMed Central

Ali, Amjad; Piran, Md. Jalil; Kim, Hansoo; Yun, Jihyeok; Suh, Doug Young

2015-01-01

Cognitive radio (CR) has emerged as a promising technology to solve problems related to spectrum scarcity and provides a ubiquitous wireless access environment. CR-enabled secondary users (SUs) exploit spectrum white spaces opportunistically and immediately vacate the acquired licensed channels as primary users (PUs) arrive. Accessing the licensed channels without the prior knowledge of PU traffic patterns causes severe throughput degradation due to excessive channel switching and PU-to-SU collisions. Therefore, it is significantly important to design a PU activity-aware medium access control (MAC) protocol for cognitive radio networks (CRNs). In this paper, we first propose a licensed channel usage pattern identification scheme, based on a two-state Markov model, and then estimate the future idle slots using previous observations of the channels. Furthermore, based on these past observations, we compute the rank of each available licensed channel that gives SU transmission success assessment during the estimated idle slot. Secondly, we propose a PU activity-aware distributed MAC (PAD-MAC) protocol for heterogeneous multi-channel CRNs that selects the best channel for each SU to enhance its throughput. PAD-MAC controls SU activities by allowing them to exploit the licensed channels only for the duration of estimated idle slots and enables predictive and fast channel switching. To evaluate the performance of the proposed PAD-MAC, we compare it with the distributed QoS-aware MAC (QC-MAC) and listen-before-talk MAC schemes. Extensive numerical results show the significant improvements of the PAD-MAC in terms of the SU throughput, SU channel switching rate and PU-to-SU collision rate. PMID:25831084

Role of motive forces for the spin torque transfer for nano-structures

NASA Astrophysics Data System (ADS)

Barnes, Stewart

2009-03-01

Despite an announced imminent commercial realization of spin transfer random access memory (SPRAM) the current theory evolved from that of Slonczewski [1,2] does not conserve energy. Barnes and Maekawa [3] have shown, in order correct this defect, forces which originate from the spin rather than the charge of an electron must be accounted for, this leading to the concept of spin-motive-forces (smf) which must appear in Faraday's law and which significantly modifies the theory for spin-valves and domain wall devices [4]. A multi-channel theory in which these smf's redirect the spin currents will be described. In nano-structures it is now well known that the Kondo effect is reflected by conductance peaks. In essence, the spin degrees of freedom are used to enhance conduction. In a system with nano-magnets and a Coulomb blockade [5] the similar spin channels can be the only means of effective conduction. This results in a smf which lasts for minutes and an enormous magneto-resistance [5]. This implies the possibility of ``single electron memory'' in which the magnetic state is switched by a single electron. [4pt] [1] J. C. Slonczewski, Current-Driven Excitation of Magnetic Multilayers J. Magn. Magn. Mater. 159, L1 (1996). [0pt] [2] Y. Tserkovnyak, A. Brataas, G. E. W. Bauer, and B. I. Halperin, Nonlocal magnetization dynamics in ferromagnetic heterostructures, Rev. Mod. Phys. 77, 1375 (2005). [0pt] [3] S. E. Barnes and S. Maekawa, Generalization of Faraday's Law to Include Nonconservative Spin Forces Phys. Rev. Lett. 98, 246601 (2007); S. E. Barnes and S. Maekawa, Currents induced by domain wall motion in thin ferromagnetic wires. arXiv:cond-mat/ 0410021v1 (2004). [0pt] [4] S. E., Barnes, Spin motive forces, measurement, and spin-valves. J. Magn. Magn. Mat. 310, 2035-2037 (2007); S. E. Barnes, J. Ieda. J and S. Maekawa, Magnetic memory and current amplification devices using moving domain walls. Appl. Phys. Lett. 89, 122507 (2006). [0pt] [5] Pham-Nam Hai, Byung-Ho Yu, Shinobu Ohya, Masaaki Tanaka, Stewart E. Barnes and Sadamichi Maekawa, Electromotive force and huge magnetoresistance in magnetic tunnel junctions. Submitted Nature, August, (2008).

Deciding with the eye: how the visually manipulated accessibility of information in memory influences decision behavior.

PubMed

Platzer, Christine; Bröder, Arndt; Heck, Daniel W

2014-05-01

Decision situations are typically characterized by uncertainty: Individuals do not know the values of different options on a criterion dimension. For example, consumers do not know which is the healthiest of several products. To make a decision, individuals can use information about cues that are probabilistically related to the criterion dimension, such as sugar content or the concentration of natural vitamins. In two experiments, we investigated how the accessibility of cue information in memory affects which decision strategy individuals rely on. The accessibility of cue information was manipulated by means of a newly developed paradigm, the spatial-memory-cueing paradigm, which is based on a combination of the looking-at-nothing phenomenon and the spatial-cueing paradigm. The results indicated that people use different decision strategies, depending on the validity of easily accessible information. If the easily accessible information is valid, people stop information search and decide according to a simple take-the-best heuristic. If, however, information that comes to mind easily has a low predictive validity, people are more likely to integrate all available cue information in a compensatory manner.

The Effect of Retrieval Cues on Visual Preferences and Memory in Infancy: Evidence for a Four-Phase Attention Function.

ERIC Educational Resources Information Center

Bahrick, Lorraine E.; Hernandez-Reif, Maria; Pickens, Jeffrey N.

1997-01-01

Tested hypothesis from Bahrick and Pickens' infant attention model that retrieval cues increase memory accessibility and shift visual preferences toward greater novelty to resemble recent memories. Found that after retention intervals associated with remote or intermediate memory, previous familiarity preferences shifted to null or novelty…

Activation and Binding in Verbal Working Memory: A Dual-Process Model for the Recognition of Nonwords

ERIC Educational Resources Information Center

Oberauer, Klauss; Lange, Elke B.

2009-01-01

The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. "Journal of Experimental Psychology: Learning, Memory, and Cognition, 28", 411-421]. Familiarity arises…

Cavity-based quantum networks with single atoms and optical photons

NASA Astrophysics Data System (ADS)

Reiserer, Andreas; Rempe, Gerhard

2015-10-01

Distributed quantum networks will allow users to perform tasks and to interact in ways which are not possible with present-day technology. Their implementation is a key challenge for quantum science and requires the development of stationary quantum nodes that can send and receive as well as store and process quantum information locally. The nodes are connected by quantum channels for flying information carriers, i.e., photons. These channels serve both to directly exchange quantum information between nodes and to distribute entanglement over the whole network. In order to scale such networks to many particles and long distances, an efficient interface between the nodes and the channels is required. This article describes the cavity-based approach to this goal, with an emphasis on experimental systems in which single atoms are trapped in and coupled to optical resonators. Besides being conceptually appealing, this approach is promising for quantum networks on larger scales, as it gives access to long qubit coherence times and high light-matter coupling efficiencies. Thus, it allows one to generate entangled photons on the push of a button, to reversibly map the quantum state of a photon onto an atom, to transfer and teleport quantum states between remote atoms, to entangle distant atoms, to detect optical photons nondestructively, to perform entangling quantum gates between an atom and one or several photons, and even provides a route toward efficient heralded quantum memories for future repeaters. The presented general protocols and the identification of key parameters are applicable to other experimental systems.

Designing Multi-Channel Web Frameworks for Cultural Tourism Applications: The MUSE Case Study.

ERIC Educational Resources Information Center

Garzotto, Franca; Salmon, Tullio; Pigozzi, Massimiliano

A framework for the design of multi-channel (MC) applications in the cultural tourism domain is presented. Several heterogeneous interface devices are supported including location-sensitive mobile units, on-site stationary devices, and personalized CDs that extend the on-site experience beyond the visit time thanks to personal memories gathered…

Calcium sensor regulation of the CaV2.1 Ca2+ channel contributes to long-term potentiation and spatial learning.

PubMed

Nanou, Evanthia; Scheuer, Todd; Catterall, William A

2016-11-15

Many forms of short-term synaptic plasticity rely on regulation of presynaptic voltage-gated Ca 2+ type 2.1 (Ca V 2.1) channels. However, the contribution of regulation of Ca V 2.1 channels to other forms of neuroplasticity and to learning and memory are not known. Here we have studied mice with a mutation (IM-AA) that disrupts regulation of Ca V 2.1 channels by calmodulin and related calcium sensor proteins. Surprisingly, we find that long-term potentiation (LTP) of synaptic transmission at the Schaffer collateral-CA1 synapse in the hippocampus is substantially weakened, even though this form of synaptic plasticity is thought to be primarily generated postsynaptically. LTP in response to θ-burst stimulation and to 100-Hz tetanic stimulation is much reduced. However, a normal level of LTP can be generated by repetitive 100-Hz stimulation or by depolarization of the postsynaptic cell to prevent block of NMDA-specific glutamate receptors by Mg 2+ The ratio of postsynaptic responses of NMDA-specific glutamate receptors to those of AMPA-specific glutamate receptors is decreased, but the postsynaptic current from activation of NMDA-specific glutamate receptors is progressively increased during trains of stimuli and exceeds WT by the end of 1-s trains. Strikingly, these impairments in long-term synaptic plasticity and the previously documented impairments in short-term synaptic plasticity in IM-AA mice are associated with pronounced deficits in spatial learning and memory in context-dependent fear conditioning and in the Barnes circular maze. Thus, regulation of Ca V 2.1 channels by calcium sensor proteins is required for normal short-term synaptic plasticity, LTP, and spatial learning and memory in mice.

Recognition-induced forgetting is not due to category-based set size.

PubMed

Maxcey, Ashleigh M

2016-01-01

What are the consequences of accessing a visual long-term memory representation? Previous work has shown that accessing a long-term memory representation via retrieval improves memory for the targeted item and hurts memory for related items, a phenomenon called retrieval-induced forgetting. Recently we found a similar forgetting phenomenon with recognition of visual objects. Recognition-induced forgetting occurs when practice recognizing an object during a two-alternative forced-choice task, from a group of objects learned at the same time, leads to worse memory for objects from that group that were not practiced. An alternative explanation of this effect is that category-based set size is inducing forgetting, not recognition practice as claimed by some researchers. This alternative explanation is possible because during recognition practice subjects make old-new judgments in a two-alternative forced-choice task, and are thus exposed to more objects from practiced categories, potentially inducing forgetting due to set-size. Herein I pitted the category-based set size hypothesis against the recognition-induced forgetting hypothesis. To this end, I parametrically manipulated the amount of practice objects received in the recognition-induced forgetting paradigm. If forgetting is due to category-based set size, then the magnitude of forgetting of related objects will increase as the number of practice trials increases. If forgetting is recognition induced, the set size of exemplars from any given category should not be predictive of memory for practiced objects. Consistent with this latter hypothesis, additional practice systematically improved memory for practiced objects, but did not systematically affect forgetting of related objects. These results firmly establish that recognition practice induces forgetting of related memories. Future directions and important real-world applications of using recognition to access our visual memories of previously encountered objects are discussed.

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

NASA Astrophysics Data System (ADS)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

The Global File System

NASA Technical Reports Server (NTRS)

Soltis, Steven R.; Ruwart, Thomas M.; OKeefe, Matthew T.

1996-01-01

The global file system (GFS) is a prototype design for a distributed file system in which cluster nodes physically share storage devices connected via a network-like fiber channel. Networks and network-attached storage devices have advanced to a level of performance and extensibility so that the previous disadvantages of shared disk architectures are no longer valid. This shared storage architecture attempts to exploit the sophistication of storage device technologies whereas a server architecture diminishes a device's role to that of a simple component. GFS distributes the file system responsibilities across processing nodes, storage across the devices, and file system resources across the entire storage pool. GFS caches data on the storage devices instead of the main memories of the machines. Consistency is established by using a locking mechanism maintained by the storage devices to facilitate atomic read-modify-write operations. The locking mechanism is being prototyped in the Silicon Graphics IRIX operating system and is accessed using standard Unix commands and modules.

Development of Network Interface Cards for TRIDAQ systems with the NaNet framework

NASA Astrophysics Data System (ADS)

Ammendola, R.; Biagioni, A.; Cretaro, P.; Di Lorenzo, S.; Fiorini, M.; Frezza, O.; Lamanna, G.; Lo Cicero, F.; Lonardo, A.; Martinelli, M.; Neri, I.; Paolucci, P. S.; Pastorelli, E.; Piandani, R.; Pontisso, L.; Rossetti, D.; Simula, F.; Sozzi, M.; Valente, P.; Vicini, P.

2017-03-01

NaNet is a framework for the development of FPGA-based PCI Express (PCIe) Network Interface Cards (NICs) with real-time data transport architecture that can be effectively employed in TRIDAQ systems. Key features of the architecture are the flexibility in the configuration of the number and kind of the I/O channels, the hardware offloading of the network protocol stack, the stream processing capability, and the zero-copy CPU and GPU Remote Direct Memory Access (RDMA). Three NIC designs have been developed with the NaNet framework: NaNet-1 and NaNet-10 for the CERN NA62 low level trigger and NaNet3 for the KM3NeT-IT underwater neutrino telescope DAQ system. We will focus our description on the NaNet-10 design, as it is the most complete of the three in terms of capabilities and integrated IPs of the framework.

Notes on a Continuous-Variable Quantum Key Distribution Scheme

NASA Astrophysics Data System (ADS)

Ichikawa, Tsubasa; Hirano, Takuya; Matsubara, Takuto; Ono, Motoharu; Namiki, Ryo

2017-09-01

We develop a physical model to describe the signal transmission for a continuous-variable quantum key distribution scheme and investigate its security against a couple of eavesdropping attacks assuming that the eavesdropper's power is partly restricted owing to today's technological limitations. We consider an eavesdropper performing quantum optical homodyne measurement on the signal obtained by a type of beamsplitting attack. We also consider the case in which the eavesdropper Eve is unable to access a quantum memory and she performs heterodyne measurement on her signal without performing a delayed measurement. Our formulation includes a model in which the receiver's loss and noise are unaccessible by the eavesdropper. This setup enables us to investigate the condition that Eve uses a practical fiber differently from the usual beamsplitting attack where she can deploy a lossless transmission channel. The secret key rates are calculated in both the direct and reverse reconciliation scenarios.

The Transient Receptor Potential Melastatin 2 (TRPM2) Channel Contributes to β-Amyloid Oligomer-Related Neurotoxicity and Memory Impairment.

PubMed

Ostapchenko, Valeriy G; Chen, Megan; Guzman, Monica S; Xie, Yu-Feng; Lavine, Natalie; Fan, Jue; Beraldo, Flavio H; Martyn, Amanda C; Belrose, Jillian C; Mori, Yasuo; MacDonald, John F; Prado, Vania F; Prado, Marco A M; Jackson, Michael F

2015-11-11

In Alzheimer's disease, accumulation of soluble oligomers of β-amyloid peptide is known to be highly toxic, causing disturbances in synaptic activity and neuronal death. Multiple studies relate these effects to increased oxidative stress and aberrant activity of calcium-permeable cation channels leading to calcium imbalance. The transient receptor potential melastatin 2 (TRPM2) channel, a Ca(2+)-permeable nonselective cation channel activated by oxidative stress, has been implicated in neurodegenerative diseases, and more recently in amyloid-induced toxicity. Here we show that the function of TRPM2 is augmented by treatment of cultured neurons with β-amyloid oligomers. Aged APP/PS1 Alzheimer's mouse model showed increased levels of endoplasmic reticulum stress markers, protein disulfide isomerase and phosphorylated eukaryotic initiation factor 2α, as well as decreased levels of the presynaptic marker synaptophysin. Elimination of TRPM2 in APP/PS1 mice corrected these abnormal responses without affecting plaque burden. These effects of TRPM2 seem to be selective for β-amyloid toxicity, as ER stress responses to thapsigargin or tunicamycin in TRPM2(-/-) neurons was identical to that of wild-type neurons. Moreover, reduced microglial activation was observed in TRPM2(-/-)/APP/PS1 hippocampus compared with APP/PS1 mice. In addition, age-dependent spatial memory deficits in APP/PS1 mice were reversed in TRPM2(-/-)/APP/PS1 mice. These results reveal the importance of TRPM2 for β-amyloid neuronal toxicity, suggesting that TRPM2 activity could be potentially targeted to improve outcomes in Alzheimer's disease. Transient receptor potential melastatin 2 (TRPM2) is an oxidative stress sensing calcium-permeable channel that is thought to contribute to calcium dysregulation associated with neurodegenerative diseases, including Alzheimer's disease. Here we show that oligomeric β-amyloid, the toxic peptide in Alzheimer's disease, facilitates TRPM2 channel activation. In mice designed to model Alzheimer's disease, genetic elimination of TRPM2 normalized deficits in synaptic markers in aged mice. Moreover, the absence of TRPM2 improved age-dependent spatial memory deficits observed in Alzheimer's mice. Our results reveal the importance of TRPM2 for neuronal toxicity and memory impairments in an Alzheimer's mouse model and suggest that TRPM2 could be targeted for the development of therapeutic agents effective in the treatment of dementia. Copyright © 2015 the authors 0270-6474/15/3515158-13$15.00/0.

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

NASA Technical Reports Server (NTRS)

Barry, R. C.

1980-01-01

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Vertical Launch System Loadout Planner

DTIC Science & Technology

2015-03-01

United States Navy USS United States’ Ship VBA Visual Basic for Applications VLP VLS Loadout Planner VLS Vertical Launch System...with 32 gigabytes of random access memory and eight processors, General Algebraic Modeling System (GAMS) CPLEX version 24 (GAMS, 2015) solves this...problem in ten minutes to an integer tolerance of 10%. The GAMS interpreter and CPLEX solver require 75 Megabytes of random access memory for this

Nonvolatile GaAs Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

1994-01-01

Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

MemAxes Visualization Software

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hardware advancements such as Intel's PEBS and AMD's IBS, as well as software developments such as the perf_event API in Linux have made available the acquisition of memory access samples with performance information. MemAxes is a visualization and analysis tool for memory access sample data. By mapping the samples to their associated code, variables, node topology, and application dataset, MemAxes provides intuitive views of the data.

Subclinical Doses of ATP-Sensitive Potassium Channel Modulators Prevent Alterations in Memory and Synaptic Plasticity Induced by Amyloid-β.

PubMed

Salgado-Puga, Karla; Rodríguez-Colorado, Javier; Prado-Alcalá, Roberto A; Peña-Ortega, Fernando

2017-01-01

In addition to coupling cell metabolism and excitability, ATP-sensitive potassium channels (KATP) are involved in neural function and plasticity. Moreover, alterations in KATP activity and expression have been observed in Alzheimer's disease (AD) and during amyloid-β (Aβ)-induced pathology. Thus, we tested whether KATP modulators can influence Aβ-induced deleterious effects on memory, hippocampal network function, and plasticity. We found that treating animals with subclinical doses (those that did not change glycemia) of a KATP blocker (Tolbutamide) or a KATP opener (Diazoxide) differentially restrained Aβ-induced memory deficit, hippocampal network activity inhibition, and long-term synaptic plasticity unbalance (i.e., inhibition of LTP and promotion of LTD). We found that the protective effect of Tolbutamide against Aβ-induced memory deficit was strong and correlated with the reestablishment of synaptic plasticity balance, whereas Diazoxide treatment produced a mild protection against Aβ-induced memory deficit, which was not related to a complete reestablishment of synaptic plasticity balance. Interestingly, treatment with both KATP modulators renders the hippocampus resistant to Aβ-induced inhibition of hippocampal network activity. These findings indicate that KATP are involved in Aβ-induced pathology and they heighten the potential role of KATP modulation as a plausible therapeutic strategy against AD.

High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xiang, Lanyi; Ying, Jun; Han, Jinhua

2016-04-25

In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (V{sub on}) and severe degradation of the memory window (ΔV{sub on}) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electronsmore » transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of V{sub on} at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔV{sub on} of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.« less

Recollection Rejection: How Children Edit Their False Memories.

ERIC Educational Resources Information Center

Brainerd, C. J.; Reyna, V. F.

2002-01-01

Presents new measure of children's use of an editing operation that suppresses false memories by accessing verbatim traces of true events. Application of the methodology showed that false-memory editing increased dramatically between early and middle childhood. Measure reacted appropriately to experimental manipulations. Developmental reductions…

Transient acidosis while retrieving a fear-related memory enhances its lability

PubMed Central

Du, Jianyang; Price, Margaret P; Taugher, Rebecca J; Grigsby, Daniel; Ash, Jamison J; Stark, Austin C; Hossain Saad, Md Zubayer; Singh, Kritika; Mandal, Juthika; Wemmie, John A; Welsh, Michael J

2017-01-01

Attenuating the strength of fearful memories could benefit people disabled by memories of past trauma. Pavlovian conditioning experiments indicate that a retrieval cue can return a conditioned aversive memory to a labile state. However, means to enhance retrieval and render a memory more labile are unknown. We hypothesized that augmenting synaptic signaling during retrieval would increase memory lability. To enhance synaptic transmission, mice inhaled CO2 to induce an acidosis and activate acid sensing ion channels. Transient acidification increased the retrieval-induced lability of an aversive memory. The labile memory could then be weakened by an extinction protocol or strengthened by reconditioning. Coupling CO2 inhalation to retrieval increased activation of amygdala neurons bearing the memory trace and increased the synaptic exchange from Ca2+-impermeable to Ca2+-permeable AMPA receptors. The results suggest that transient acidosis during retrieval renders the memory of an aversive event more labile and suggest a strategy to modify debilitating memories. DOI: http://dx.doi.org/10.7554/eLife.22564.001 PMID:28650315

Side-channel-free quantum key distribution.

PubMed

Braunstein, Samuel L; Pirandola, Stefano

2012-03-30

Quantum key distribution (QKD) offers the promise of absolutely secure communications. However, proofs of absolute security often assume perfect implementation from theory to experiment. Thus, existing systems may be prone to insidious side-channel attacks that rely on flaws in experimental implementation. Here we replace all real channels with virtual channels in a QKD protocol, making the relevant detectors and settings inside private spaces inaccessible while simultaneously acting as a Hilbert space filter to eliminate side-channel attacks. By using a quantum memory we find that we are able to bound the secret-key rate below by the entanglement-distillation rate computed over the distributed states.

Another look at retroactive and proactive interference: a quantitative analysis of conversion processes.

PubMed

Blank, Hartmut

2005-02-01

Traditionally, the causes of interference phenomena were sought in "real" or "hard" memory processes such as unlearning, response competition, or inhibition, which serve to reduce the accessibility of target items. I propose an alternative approach which does not deny the influence of such processes but highlights a second, equally important, source of interference-the conversion (Tulving, 1983) of accessible memory information into memory performance. Conversion is conceived as a problem-solving-like activity in which the rememberer tries to find solutions to a memory task. Conversion-based interference effects are traced to different conversion processes in the experimental and control conditions of interference designs. I present a simple theoretical model that quantitatively predicts the resulting amount of interference. In two paired-associate learning experiments using two different types of memory tests, these predictions were corroborated. Relations of the present approach to traditional accounts of interference phenomena and implications for eyewitness testimony are discussed.

Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner

NASA Astrophysics Data System (ADS)

Lee, Jong-Sun; Kim, Dong-Won; Kim, Hea-Jee; Jin, Soo-Min; Song, Myung-Jin; Kwon, Ki-Hyun; Park, Jea-Gun; Jalalah, Mohammed; Al-Hajry, Ali

2018-01-01

The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.

On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

NASA Astrophysics Data System (ADS)

Sarkar, Biplab; Mills, Steven; Lee, Bongmook; Pitts, W. Shepherd; Misra, Veena; Franzon, Paul D.

2018-02-01

In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO2 dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO2 at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.

Marijuana effects on long-term memory assessment and retrieval.

PubMed

Darley, C F; Tinklenberg, J R; Roth, W T; Vernon, S; Kopell, B S

1977-05-09

The ability of 16 college-educated male subjects to recall from long-term memory a series of common facts was tested during intoxication with marijuana extract calibrated to 0.3 mg/kg delta-9-tetrahydrocannabinol and during placebo conditions. The subjects' ability to assess their memory capabilities was then determined by measuring how certain they were about the accuracy of their recall performance and by having them predict their performance on a subsequent recognition test involving the same recall items. Marijuana had no effect on recall or recognition performance. These results do not support the view that marijuana provides access to facts in long-term storage which are inaccessible during non-intoxication. During both marijuana and placebo conditions, subjects could accurately predict their recognition memory performance. Hence, marijuana did not alter the subjects' ability to accurately assess what information resides in long-term memory even though they did not have complete access to that information.

Parameter optimization for transitions between memory states in small arrays of Josephson junctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rezac, Jacob D.; Imam, Neena; Braiman, Yehuda

Coupled arrays of Josephson junctions possess multiple stable zero voltage states. Such states can store information and consequently can be utilized for cryogenic memory applications. Basic memory operations can be implemented by sending a pulse to one of the junctions and studying transitions between the states. In order to be suitable for memory operations, such transitions between the states have to be fast and energy efficient. Here in this article we employed simulated annealing, a stochastic optimization algorithm, to study parameter optimization of array parameters which minimizes times and energies of transitions between specifically chosen states that can be utilizedmore » for memory operations (Read, Write, and Reset). Simulation results show that such transitions occur with access times on the order of 10–100 ps and access energies on the order of 10 -19–5×10 -18 J. Numerical simulations are validated with approximate analytical results.« less

Blockade of IP[subscript 3]-Mediated SK Channel Signaling in the Rat Medial Prefrontal Cortex Improves Spatial Working Memory

ERIC Educational Resources Information Center

Brennan, Avis R.; Dolinsky, Beth; Vu, Mai-Anh T.; Stanley, Marion; Yeckel, Mark F.; Arnsten, Amy F. T.

2008-01-01

Planning and directing thought and behavior require the working memory (WM) functions of prefrontal cortex. WM is compromised by stress, which activates phosphatidylinositol (PI)-mediated IP[subscript 3]-PKC intracellular signaling. PKC overactivation impairs WM operations and in vitro studies indicate that IP[subscript 3] receptor (IP[subscript…

MHD Flow Control

DTIC Science & Technology

2006-09-01

Umj) flj + GjE(Umj)flyjI A S + fS do (3.7)I This system (3.6) is integrated in time using explicit low-memory Runge-Kutta method: I U o=U" Ui =UO - ci At...signals are registered by the four-channel digital memory oscilloscopes Tektronix TDS 2414 and ASK 3107. Scheme of operation The scheme of the experiment is

On the Mechanisms of Formation of Memory Channels and Development of Negative Differential Resistance in Solid Solutions of the TlInTe2-TlYbTe2 System

NASA Astrophysics Data System (ADS)

Akhmedova, A. M.

2018-04-01

The behavior of an electronic subsystem is investigated in the course of formation and development of a memory channel in solid solutions of the TlInTe2-TlYbTe2 system. An analysis of the current-voltage characteristics allows getting an insight into the reason for a sharp change in electrical conductance of the specimens under study during their transition from the high-resistance to high-conductance state and the reasons for the well known instability of threshold converters, which makes it possible to design devices with high threshold voltage stability.

Pharmacological enhancement of calcium-activated potassium channel function reduces the effects of repeated stress on fear memory

PubMed Central

Atchley, Derek; Hankosky, Emily R.; Gasparotto, Kaylyn; Rosenkranz, J. Amiel

2012-01-01

Repeated stress impacts emotion, and can induce mood and anxiety disorders. These disorders are characterized by imbalance of emotional responses. The amygdala is fundamental in expression of emotion, and is hyperactive in many patients with mood or anxiety disorders. Stress also leads to hyperactivity of the amygdala in humans. In rodent studies, repeated stress causes hyperactivity of the amygdala, and increases fear conditioning behavior that is mediated by the basolateral amygdala (BLA). Calcium-activated potassium (KCa) channels regulate BLA neuronal activity, and evidence suggests reduced small conductance KCa (SK) channel function in male rats exposed to repeated stress. Pharmacological enhancement of SK channels reverses the BLA neuronal hyperexcitability caused by repeated stress. However, it is not known if pharmacological targeting of SK channels can repair the effects of repeated stress on amygdala-dependent behaviors. The purpose of this study was to test whether enhancement of SK channel function reverses the effects of repeated restraint on BLA-dependent auditory fear conditioning. We found that repeated restraint stress increased the expression of cued conditioned fear in male rats. However, 1-EBIO (1 or 10 mg/kg) or CyPPA (5 mg/kg) administered 30 minutes prior to testing of fear expression brought conditioned freezing to control levels, with little impact on fear expression in control handled rats. These results demonstrate that enhancement of SK channel function can reduce the abnormalities of BLA-dependent fear memory caused by repeated stress. Furthermore, this indicates that pharmacological targeting of SK channels may provide a novel target for alleviation of psychiatric symptoms associated with amygdala hyperactivity. PMID:22487247

Synthesizing Existing CSMA and TDMA Based MAC Protocols for VANETs

PubMed Central

Huang, Jiawei; Li, Qi; Zhong, Shaohua; Liu, Lianhai; Zhong, Ping; Wang, Jianxin; Ye, Jin

2017-01-01

Many Carrier Sense Multiple Access (CSMA) and Time Division Multiple Access (TDMA) based medium access control (MAC) protocols for vehicular ad hoc networks (VANETs) have been proposed recently. Contrary to the common perception that they are competitors, we argue that the underlying strategies used in these MAC protocols are complementary. Based on this insight, we design CTMAC, a MAC protocol that synthesizes existing strategies; namely, random accessing channel (used in CSMA-style protocols) and arbitral reserving channel (used in TDMA-based protocols). CTMAC swiftly changes its strategy according to the vehicle density, and its performance is better than the state-of-the-art protocols. We evaluate CTMAC using at-scale simulations. Our results show that CTMAC reduces the channel completion time and increases the network goodput by 45% for a wide range of application workloads and network settings. PMID:28208590

Dementia - daily care

MedlinePlus

... pdf . Accessed on June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

The Two Faces of Selective Memory Retrieval: Recall Specificity of the Detrimental but Not the Beneficial Effect

ERIC Educational Resources Information Center

Bäuml, Karl-Heinz T.; Dobler, Ina M.

2015-01-01

Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas…

Design of a motion JPEG (M/JPEG) adapter card

NASA Astrophysics Data System (ADS)

Lee, D. H.; Sudharsanan, Subramania I.

1994-05-01

In this paper we describe a design of a high performance JPEG (Joint Photographic Experts Group) Micro Channel adapter card. The card, tested on a range of PS/2 platforms (models 50 to 95), can complete JPEG operations on a 640 by 240 pixel image within 1/60 of a second, thus enabling real-time capture and display of high quality digital video. The card accepts digital pixels for either a YUV 4:2:2 or an RGB 4:4:4 pixel bus and has been shown to handle up to 2.05 MBytes/second of compressed data. The compressed data is transmitted to a host memory area by Direct Memory Access operations. The card uses a single C-Cube's CL550 JPEG processor that complies with the baseline JPEG. We give broad descriptions of the hardware that controls the video interface, CL550, and the system interface. Some critical design points that enhance the overall performance of the M/JPEG systems are pointed out. The control of the adapter card is achieved by an interrupt driven software that runs under DOS. The software performs a variety of tasks that include change of color space (RGB or YUV), change of quantization and Huffman tables, odd and even field control and some diagnostic operations.

Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

NASA Astrophysics Data System (ADS)

Kim, Sang-Koog

2011-03-01

An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

Blanket Gate Would Address Blocks Of Memory

NASA Technical Reports Server (NTRS)

Lambe, John; Moopenn, Alexander; Thakoor, Anilkumar P.

1988-01-01

Circuit-chip area used more efficiently. Proposed gate structure selectively allows and restricts access to blocks of memory in electronic neural-type network. By breaking memory into independent blocks, gate greatly simplifies problem of reading from and writing to memory. Since blocks not used simultaneously, share operational amplifiers that prompt and read information stored in memory cells. Fewer operational amplifiers needed, and chip area occupied reduced correspondingly. Cost per bit drops as result.

Memory hierarchy using row-based compression

DOEpatents

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

An exploratory study of the effects of spatial working-memory load on prefrontal activation in low- and high-performing elderly.

PubMed

Vermeij, Anouk; van Beek, Arenda H E A; Reijs, Babette L R; Claassen, Jurgen A H R; Kessels, Roy P C

2014-01-01

Older adults show more bilateral prefrontal activation during cognitive performance than younger adults, who typically show unilateral activation. This over-recruitment has been interpreted as compensation for declining structure and function of the brain. Here we examined how the relationship between behavioral performance and prefrontal activation is modulated by different levels of working-memory load. Eighteen healthy older adults (70.8 ± 5.0 years; MMSE 29.3 ± 0.9) performed a spatial working-memory task (n-back). Oxygenated ([O2Hb]) and deoxygenated ([HHb]) hemoglobin concentration changes were registered by two functional Near-Infrared Spectroscopy (fNIRS) channels located over the left and right prefrontal cortex. Increased working-memory load resulted in worse performance compared to the control condition. [O2Hb] increased with rising working-memory load in both fNIRS channels. Based on the performance in the high working-memory load condition, the group was divided into low and high performers. A significant interaction effect of performance level and hemisphere on [O2Hb] increase was found, indicating that high performers were better able to keep the right prefrontal cortex engaged under high cognitive demand. Furthermore, in the low performers group, individuals with a larger decline in task performance from the control to the high working-memory load condition had a larger bilateral increase of [O2Hb]. The high performers did not show a correlation between performance decline and working-memory load related prefrontal activation changes. Thus, additional bilateral prefrontal activation in low performers did not necessarily result in better cognitive performance. Our study showed that bilateral prefrontal activation may not always be successfully compensatory. Individual behavioral performance should be taken into account to be able to distinguish successful and unsuccessful compensation or declined neural efficiency.

Wireless Computing Architecture III

DTIC Science & Technology

2013-09-01

MIMO Multiple-Input and Multiple-Output MIMO /CON MIMO with concurrent hannel access and estimation MU- MIMO Multiuser MIMO OFDM Orthogonal...compressive sensing \\; a design for concurrent channel estimation in scalable multiuser MIMO networking; and novel networking protocols based on machine...Network, Antenna Arrays, UAV networking, Angle of Arrival, Localization MIMO , Access Point, Channel State Information, Compressive Sensing 16

The Protective Role of Selenium on Scopolamine-Induced Memory Impairment, Oxidative Stress, and Apoptosis in Aged Rats: The Involvement of TRPM2 and TRPV1 Channels.

PubMed

Balaban, Hasan; Nazıroğlu, Mustafa; Demirci, Kadir; Övey, İshak Suat

2017-05-01

Inhibition of Ca 2+ entry into the hippocampus and dorsal root ganglion (DRG) through inhibition of N-methyl-D-aspartate (NMDA) receptor antagonist drugs is the current standard of care in neuronal diseases such as Alzheimer's disease, dementia, and peripheral pain. Oxidative stress activates Ca 2+ -permeable TRPM2 and TRPV1, and recent studies indicate that selenium (Se) is a potent TRPM2 and TRPV1 channel antagonist in the hippocampus and DRG. In this study, we investigated the neuroprotective properties of Se in primary hippocampal and DRG neuron cultures of aged rats when given alone or in combination with scopolamine (SCOP). Thirty-two aged (18-24 months old) rats were divided into four groups. The first and second groups received a placebo and SCOP (1 mg/kg/day), respectively. The third and fourth groups received intraperitoneal Se (1.5 mg/kg/ over day) and SCOP + Se, respectively. The hippocampal and DRG neurons also were stimulated in vitro with a TRPV1 channel agonist (capsaicin) and a TRPM2 channel agonist (cumene hydroperoxide). We found that Se was fully effective in reversing SCOP-induced TRPM2 and TRPV1 current densities as well as errors in working memory and reference memory. In addition, Se completely reduced SCOP-induced oxidative toxicity by modulating lipid peroxidation, reducing glutathione and glutathione peroxidase. The Se and SCOP + Se treatments also decreased poly (ADP-ribose) polymerase activity, intracellular free Ca 2+ concentrations, apoptosis, and caspase 3, caspase 9, and mitochondrial membrane depolarization values in the hippocampus. In conclusion, the current study reports on the cellular level for SCOP and Se on the different endocytotoxic cascades for the first time. Notably, the research indicates that Se can result in remarkable neuroprotective and memory impairment effects in the hippocampal neurons of rats. Graphical abstract Possible molecular pathways of involvement of selenium (Se) in scopolamine (SCOP) induced apoptosis, oxidative stress, and calcium accumulation through TRPM2 and TRPV1 channels in the hippocampus neurons of aged rats. The TRPM2 channel is activated by ADP-ribose and oxidative stress, although it is inhibited by ACA. The TRPV1 channel is activated by oxidative stress and capsaicin, and it is blocked by capsazepine (CPZ). The beta-amyloid plaque induces oxidative stress in hippocampus. SCOP can result in augmented ROS release in hippocampal neurons, leading to Ca 2+ uptake through TRPM2 and TRPV1 channels. Mitochondria were reported to accumulate Ca 2+ provided that intracellular Ca 2+ rises, thereby leading to the depolarization of mitochondrial membranes and release of apoptosis-inducing factors such as caspase 3 and caspase 9. Se reduced TRPM2 and TRPV1 channel activation through the modulation of aging oxidative reactions and Se-dependent glutathione peroxidase (GSH-Px) antioxidant pathways.

Anesthetics act in quantum channels in brain microtubules to prevent consciousness.

PubMed

Craddock, Travis J A; Hameroff, Stuart R; Ayoub, Ahmed T; Klobukowski, Mariusz; Tuszynski, Jack A

2015-01-01

The mechanism by which anesthetic gases selectively prevent consciousness and memory (sparing non-conscious brain functions) remains unknown. At the turn of the 20(th) century Meyer and Overton showed that potency of structurally dissimilar anesthetic gas molecules correlated precisely over many orders of magnitude with one factor, solubility in a non-polar, 'hydrophobic' medium akin to olive oil. In the 1980s Franks and Lieb showed anesthetics acted in such a medium within proteins, suggesting post-synaptic membrane receptors. But anesthetic studies on such proteins yielded only confusing results. In recent years Eckenhoff and colleagues have found anesthetic action in microtubules, cytoskeletal polymers of the protein tubulin inside brain neurons. 'Quantum mobility' in microtubules has been proposed to mediate consciousness. Through molecular modeling we have previously shown: (1) olive oil-like non-polar, hydrophobic quantum mobility pathways ('quantum channels') of tryptophan rings in tubulin, (2) binding of anesthetic gas molecules in these channels, and (3) capabilities for π-electron resonant energy transfer, or exciton hopping, among tryptophan aromatic rings in quantum channels, similar to photosynthesis protein quantum coherence. Here, we show anesthetic molecules can impair π-resonance energy transfer and exciton hopping in tubulin quantum channels, and thus account for selective action of anesthetics on consciousness and memory.

Equalization for a page-oriented optical memory system

NASA Astrophysics Data System (ADS)

Trelewicz, Jennifer Q.; Capone, Jeffrey

1999-11-01

In this work, a method of decision-feedback equalization is developed for a digital holographic channel that experiences moderate-to-severe imaging errors. Decision feedback is utilized, not only where the channel is well-behaved, but also near the edges of the camera grid that are subject to a high degree of imaging error. In addition to these effects, the channel is worsened by typical problems of holographic channels, including non-uniform illumination, dropouts, and stuck bits. The approach described in this paper builds on established methods for performing trained and blind equalization on time-varying channels. The approach is tested on experimental data sets. On most of these data sets, the method of equalization described in this work delivers at least an order of magnitude improvement in bit-error rate (BER) before error-correction coding (ECC). When ECC is introduced, the approach is able to recover stored data with no errors for many of the tested data sets. Furthermore, a low BER was maintained even over a range of small alignment perturbations in the system. It is believed that this equalization method can allow cost reductions to be made in page-memory systems, by allowing for a larger image area per page or less complex imaging components, without sacrificing the low BER required by data storage applications.

Schedulers with load-store queue awareness

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.

2017-02-07

In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

Schedulers with load-store queue awareness

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.

2017-01-24

In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

Temperature dependent characteristics of the random telegraph noise on contact resistive random access memory

NASA Astrophysics Data System (ADS)

Chang, Liang-Shun; Lin, Chrong Jung; King, Ya-Chin

2014-01-01

The temperature dependent characteristics of the random telegraphic noise (RTN) on contact resistive random access memory (CRRAM) are studied in this work. In addition to the bi-level switching, the occurrences of the middle states in the RTN signal are investigated. Based on the unique its temperature dependent characteristics, a new temperature sensing scheme is proposed for applications in ultra-low power sensor modules.

A simple GPU-accelerated two-dimensional MUSCL-Hancock solver for ideal magnetohydrodynamics

NASA Astrophysics Data System (ADS)

Bard, Christopher M.; Dorelli, John C.

2014-02-01

We describe our experience using NVIDIA's CUDA (Compute Unified Device Architecture) C programming environment to implement a two-dimensional second-order MUSCL-Hancock ideal magnetohydrodynamics (MHD) solver on a GTX 480 Graphics Processing Unit (GPU). Taking a simple approach in which the MHD variables are stored exclusively in the global memory of the GTX 480 and accessed in a cache-friendly manner (without further optimizing memory access by, for example, staging data in the GPU's faster shared memory), we achieved a maximum speed-up of ≈126 for a 10242 grid relative to the sequential C code running on a single Intel Nehalem (2.8 GHz) core. This speedup is consistent with simple estimates based on the known floating point performance, memory throughput and parallel processing capacity of the GTX 480.

Overgeneral Autobiographical Memory and Traumatic Events: An Evaluative Review

ERIC Educational Resources Information Center

Moore, Sally A.; Zoellner, Lori A.

2007-01-01

Does trauma exposure impair retrieval of autobiographical memories? Many theorists have suggested that the reduced ability to access specific memories of life events, termed overgenerality, is a protective mechanism helping attenuate painful emotions associated with trauma. The authors addressed this question by reviewing 24 studies that assessed…

Working Memory Underpins Cognitive Development, Learning, and Education

ERIC Educational Resources Information Center

Cowan, Nelson

2014-01-01

Working memory is the retention of a small amount of information in a readily accessible form. It facilitates planning, comprehension, reasoning, and problem solving. I examine the historical roots and conceptual development of the concept and the theoretical and practical implications of current debates about working memory mechanisms. Then, I…

Web-based multi-channel analyzer

DOEpatents

Gritzo, Russ E.

2003-12-23

The present invention provides an improved multi-channel analyzer designed to conveniently gather, process, and distribute spectrographic pulse data. The multi-channel analyzer may operate on a computer system having memory, a processor, and the capability to connect to a network and to receive digitized spectrographic pulses. The multi-channel analyzer may have a software module integrated with a general-purpose operating system that may receive digitized spectrographic pulses for at least 10,000 pulses per second. The multi-channel analyzer may further have a user-level software module that may receive user-specified controls dictating the operation of the multi-channel analyzer, making the multi-channel analyzer customizable by the end-user. The user-level software may further categorize and conveniently distribute spectrographic pulse data employing non-proprietary, standard communication protocols and formats.

Library API for Z-Order Memory Layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bethel, E. Wes

This library provides a simple-to-use API for implementing an altnerative to traditional row-major order in-memory layout, one based on a Morton- order space filling curve (SFC) , specifically, a Z-order variant of the Morton order curve. The library enables programmers to, after a simple initialization step, to convert a multidimensional array from row-major to Z- order layouts, then use a single, generic API call to access data from any arbitrary (i,j,k) location from within the array, whether it it be stored in row- major or z-order format. The motivation for using a SFC in-memory layout is for improved spatial locality,more » which results in increased use of local high speed cache memory. The basic idea is that with row-major order layouts, a data access to some location that is nearby in index space is likely far away in physical memory, resulting in poor spatial locality and slow runtime. On the other hand, with a SFC-based layout, accesses that are nearby in index space are much more likely to also be nearby in physical memory, resulting in much better spatial locality, and better runtime performance. Numerous studies over the years have shown significant runtime performance gains are realized by using a SFC-based memory layout compared to a row-major layout, sometimes by as much as 50%, which result from the better use of the memory and cache hierarchy that are attendant with a SFC-based layout (see, for example, [Beth2012]). This library implementation is intended for use with codes that work with structured, array-based data in 2 or 3 dimensions. It is not appropriate for use with unstructured or point-based data.« less

Acute stress enhances learning and memory by activating acid-sensing ion channels in rats.

PubMed

Ye, Shunjie; Yang, Rong; Xiong, Qiuju; Yang, Youhua; Zhou, Lianying; Gong, Yeli; Li, Changlei; Ding, Zhenhan; Ye, Guohai; Xiong, Zhe

2018-04-15

Acute stress has been shown to enhance learning and memory ability, predominantly through the action of corticosteroid stress hormones. However, the valuable targets for promoting learning and memory induced by acute stress and the underlying molecular mechanisms remain unclear. Acid-sensing ion channels (ASICs) play an important role in central neuronal systems and involves in depression, synaptic plasticity and learning and memory. In the current study, we used a combination of electrophysiological and behavioral approaches in an effort to explore the effects of acute stress on ASICs. We found that corticosterone (CORT) induced by acute stress caused a potentiation of ASICs current via glucocorticoid receptors (GRs) not mineralocorticoid receptors (MRs). Meanwhile, CORT did not produce an increase of ASICs current by pretreated with GF109203X, an antagonist of protein kinase C (PKC), whereas CORT did result in a markedly enhancement of ASICs current by bryostatin 1, an agonist of PKC, suggesting that potentiation of ASICs function may be depended on PKC activating. More importantly, an antagonist of ASICs, amiloride (10 μM) reduced the performance of learning and memory induced by acute stress, which is further suggesting that ASICs as the key components involves in cognitive processes induced by acute stress. These results indicate that acute stress causes the enhancement of ASICs function by activating PKC signaling pathway, which leads to potentiated learning and memory. Copyright © 2018 Elsevier Inc. All rights reserved.

Dementia - what to ask your doctor

MedlinePlus

... recs.pdf . Accessed December 8, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

Dementia - keeping safe in the home

MedlinePlus

... recs.pdf . Accessed June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

Insights from child development on the relationship between episodic and semantic memory.

PubMed

Robertson, Erin K; Köhler, Stefan

2007-11-05

The present study was motivated by a recent controversy in the neuropsychological literature on semantic dementia as to whether episodic encoding requires semantic processing or whether it can proceed solely based on perceptual processing. We addressed this issue by examining the effect of age-related limitations in semantic competency on episodic memory in 4-6-year-old children (n=67). We administered three different forced-choice recognition memory tests for pictures previously encountered in a single study episode. The tests varied in the degree to which access to semantically encoded information was required at retrieval. Semantic competency predicted recognition performance regardless of whether access to semantic information was required. A direct relation between picture naming at encoding and subsequent recognition was also found for all tests. Our findings emphasize the importance of semantic encoding processes even in retrieval situations that purportedly do not require access to semantic information. They also highlight the importance of testing neuropsychological models of memory in different populations, healthy and brain damaged, at both ends of the developmental continuum.

How Distinctive Processing Enhances Hits and Reduces False Alarms

PubMed Central

Hunt, R. Reed; Smith, Rebekah E.

2015-01-01

Distinctive processing is a concept designed to account for precision in memory, both correct responses and avoidance of errors. The principal question addressed in two experiments is how distinctive processing of studied material reduces false alarms to familiar distractors. Jacoby (Jacoby, Kelley, & McElree, 1999) has used the metaphors early selection and late correction to describe two different types of control processes. Early selection refers to limitations on access whereas late correction describes controlled monitoring of accessed information. The two types of processes are not mutually exclusive, and previous research has provided evidence for the operation of both. The data reported here extend previous work to a criterial recollection paradigm and to a recognition memory test. The results of both experiments show that variables that reduce false memory for highly familiar distracters continue to exert their effect under conditions of minimal post-access monitoring. Level of monitoring was reduced in the first experiment through test instructions and in the second experiment through speeded test responding. The results were consistent with the conclusion that both early selection and late correction operate to control accuracy in memory. PMID:26034343

Memory inhibition as a critical factor preventing creative problem solving.

PubMed

Gómez-Ariza, Carlos J; Del Prete, Francesco; Prieto Del Val, Laura; Valle, Tania; Bajo, M Teresa; Fernandez, Angel

2017-06-01

The hypothesis that reduced accessibility to relevant information can negatively affect problem solving in a remote associate test (RAT) was tested by using, immediately before the RAT, a retrieval practice procedure to hinder access to target solutions. The results of 2 experiments clearly showed that, relative to baseline, target words that had been competitors during selective retrieval were much less likely to be provided as solutions in the RAT, demonstrating that performance in the problem-solving task was strongly influenced by the predetermined accessibility status of the solutions in memory. Importantly, this was so even when participants were unaware of the relationship between the memory and the problem-solving procedures in the experiments. This finding is consistent with an inhibitory account of retrieval-induced forgetting effects and, more generally, constitutes support for the idea that the activation status of mental representations originating in a given task (e.g., episodic memory) can unwittingly have significant consequences for a different, unrelated task (e.g., problem solving). (PsycINFO Database Record (c) 2017 APA, all rights reserved).

If It Is Stored in My Memory I Will Surely Retrieve It: Anatomy of a Metacognitive Belief

ERIC Educational Resources Information Center

Kornell, Nate

2015-01-01

Retrieval failures--moments when a memory will not come to mind--are a universal human experience. Yet many laypeople believe human memory is a reliable storage system in which a stored memory should be accessible. I predicted that people would see retrieval failures as aberrations and predict that fewer retrieval failures would happen in the…

Synesthetic experiences enhance unconscious learning.

PubMed

Rothen, Nicolas; Scott, Ryan B; Mealor, Andy D; Coolbear, Daniel J; Burckhardt, Vera; Ward, Jamie

2013-01-01

Synesthesia  is characterized  by consistent extra perceptual experiences in response to normal sensory input. Recent studies provide evidence for a specific profile of enhanced memory performance in synesthesia, but focus exclusively on explicit memory paradigms for which the learned content is consciously accessible. In this study, for the first time, we demonstrate with an implicit memory paradigm that synesthetic experiences also enhance memory performance relating to unconscious knowledge.

Unstructured Adaptive Meshes: Bad for Your Memory?

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Feng, Hui-Yu; VanderWijngaart, Rob

2003-01-01

This viewgraph presentation explores the need for a NASA Advanced Supercomputing (NAS) parallel benchmark for problems with irregular dynamical memory access. This benchmark is important and necessary because: 1) Problems with localized error source benefit from adaptive nonuniform meshes; 2) Certain machines perform poorly on such problems; 3) Parallel implementation may provide further performance improvement but is difficult. Some examples of problems which use irregular dynamical memory access include: 1) Heat transfer problem; 2) Heat source term; 3) Spectral element method; 4) Base functions; 5) Elemental discrete equations; 6) Global discrete equations. Nonconforming Mesh and Mortar Element Method are covered in greater detail in this presentation.

Integrated, nonvolatile, high-speed analog random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

1994-01-01

This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Optical memory development. Volume 2: Gain-assisted holographic storage media

NASA Technical Reports Server (NTRS)

Gange, R. A.; Mezrich, R. S.

1972-01-01

Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.

Ferroelectric tunneling element and memory applications which utilize the tunneling element

DOEpatents

Kalinin, Sergei V [Knoxville, TN; Christen, Hans M [Knoxville, TN; Baddorf, Arthur P [Knoxville, TN; Meunier, Vincent [Knoxville, TN; Lee, Ho Nyung [Oak Ridge, TN

2010-07-20

A tunneling element includes a thin film layer of ferroelectric material and a pair of dissimilar electrically-conductive layers disposed on opposite sides of the ferroelectric layer. Because of the dissimilarity in composition or construction between the electrically-conductive layers, the electron transport behavior of the electrically-conductive layers is polarization dependent when the tunneling element is below the Curie temperature of the layer of ferroelectric material. The element can be used as a basis of compact 1R type non-volatile random access memory (RAM). The advantages include extremely simple architecture, ultimate scalability and fast access times generic for all ferroelectric memories.

Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing

NASA Astrophysics Data System (ADS)

Jia, Gangyong; Han, Guangjie; Wang, Hao; Wang, Feng

2018-04-01

Fog computing requires a large main memory capacity to decrease latency and increase the Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly used random access memory, cannot be included into a fog computing system due to its high consumption of power. In recent years, non-volatile memories (NVM) such as Phase-Change Memory (PCM) and Spin-transfer torque RAM (STT-RAM) with their low power consumption have emerged to replace DRAM. Moreover, the currently proposed hybrid main memory, consisting of both DRAM and NVM, have shown promising advantages in terms of scalability and power consumption. However, the drawbacks of NVM, such as long read/write latency give rise to potential problems leading to asymmetric cache misses in the hybrid main memory. Current last level cache (LLC) policies are based on the unified miss cost, and result in poor performance in LLC and add to the cost of using NVM. In order to minimize the cache miss cost in the hybrid main memory, we propose a cost aware cache replacement policy (CACRP) that reduces the number of cache misses from NVM and improves the cache performance for a hybrid memory system. Experimental results show that our CACRP behaves better in LLC performance, improving performance up to 43.6% (15.5% on average) compared to LRU.

Characterization of metal-ferroelectric-insulator-semiconductor structures based on ferroelectric Langmuir-Blodgett polyvinylidene fluoride copolymer films for nondestructive random access memory applications

NASA Astrophysics Data System (ADS)

Reece, Timothy James

Ferroelectric field effect transistors (FeFETs) have attracted much attention recently because of their ability to combine high speed, low power consumption, and fast nondestructive readout with the potential for high density nonvolatile memory. The polarization of the ferroelectric is used to switch the channel at the silicon surface between states of high and low conductance. Among the ferroelectric thin films used in FET devices; the ferroelectric copolymer of Polyvinylidene fluoride, PVDF (C2H2F 2), with trifluoroethylene, TrFE (C2HF3), has distinct advantages, including low dielectric constant, low processing temperature, low cost and compatibility with organic semiconductors. By employing the Langmuir-Blodgett technique, films as thin as 1.8 nm can be deposited, reducing the operating voltage. An MFIS structure consisting of aluminum, 170 nm P(VDF-TrFE), 100 nm silicon oxide and n-type silicon exhibited low leakage current (˜1x10 -8 A/cm2), a large memory window (4.2 V) and operated at 35 Volts. The operating voltage was lowered through use of high k insulators like cerium oxide. A sample consisting of 25 nm P(VDF-TrFE), 30 nm cerium oxide and p-type silicon exhibited a 1.9 V window with 7 Volt gate amplitude. The leakage current in this case was considerably higher (1x10 -6 A/cm2). The characterization, modeling, and fabrication of metal-ferroelectricinsulator semiconductor (MFIS) structures based on these films are discussed.

The Calmodulin-Binding Transcription Activator CAMTA1 Is Required for Long-Term Memory Formation in Mice

ERIC Educational Resources Information Center

Bas-Orth, Carlos; Tan, Yan-Wei; Oliveira, Ana M. M.; Bengtson, C. Peter; Bading, Hilmar

2016-01-01

The formation of long-term memory requires signaling from the synapse to the nucleus to mediate neuronal activity-dependent gene transcription. Synapse-to-nucleus communication is initiated by influx of calcium ions through synaptic NMDA receptors and/or L-type voltage-gated calcium channels and involves the activation of transcription factors by…

Kv4.2 Knockout Mice Have Hippocampal-Dependent Learning and Memory Deficits

ERIC Educational Resources Information Center

Lugo, Joaquin N.; Brewster, Amy L.; Spencer, Corinne M.; Anderson, Anne E.

2012-01-01

Kv4.2 channels contribute to the transient, outward K[superscript +] current (A-type current) in hippocampal dendrites, and modulation of this current substantially alters dendritic excitability. Using Kv4.2 knockout (KO) mice, we examined the role of Kv4.2 in hippocampal-dependent learning and memory. We found that Kv4.2 KO mice showed a deficit…

Kanerva's sparse distributed memory: An associative memory algorithm well-suited to the Connection Machine

NASA Technical Reports Server (NTRS)

Rogers, David

1988-01-01

The advent of the Connection Machine profoundly changes the world of supercomputers. The highly nontraditional architecture makes possible the exploration of algorithms that were impractical for standard Von Neumann architectures. Sparse distributed memory (SDM) is an example of such an algorithm. Sparse distributed memory is a particularly simple and elegant formulation for an associative memory. The foundations for sparse distributed memory are described, and some simple examples of using the memory are presented. The relationship of sparse distributed memory to three important computational systems is shown: random-access memory, neural networks, and the cerebellum of the brain. Finally, the implementation of the algorithm for sparse distributed memory on the Connection Machine is discussed.

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

NASA Astrophysics Data System (ADS)

Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

2014-01-01

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

Effects of Information Access Cost and Accountability on Medical Residents' Information Retrieval Strategy and Performance During Prehandover Preparation: Evidence From Interview and Simulation Study.

PubMed

Yang, X Jessie; Wickens, Christopher D; Park, Taezoon; Fong, Liesel; Siah, Kewin T H

2015-12-01

We aimed to examine the effects of information access cost and accountability on medical residents' information retrieval strategy and performance during prehandover preparation. Prior studies observing doctors' prehandover practices witnessed the use of memory-intensive strategies when retrieving patient information. These strategies impose potential threats to patient safety as human memory is prone to errors. Of interest in this work are the underlying determinants of information retrieval strategy and the potential impacts on medical residents' information preparation performance. A two-step research approach was adopted, consisting of semistructured interviews with 21 medical residents and a simulation-based experiment with 32 medical residents. The semistructured interviews revealed that a substantial portion of medical residents (38%) relied largely on memory for preparing handover information. The simulation-based experiment showed that higher information access cost reduced information access attempts and access duration on patient documents and harmed information preparation performance. Higher accountability led to marginally longer access to patient documents. It is important to understand the underlying determinants of medical residents' information retrieval strategy and performance during prehandover preparation. We noted the criticality of easy access to patient documents in prehandover preparation. In addition, accountability marginally influenced medical residents' information retrieval strategy. Findings from this research suggested that the cost of accessing information sources should be minimized in developing handover preparation tools. © 2015, Human Factors and Ergonomics Society.

Monitoring of prefrontal cortex activation during verbal n-back task with 24-channel functional NIRS imager

NASA Astrophysics Data System (ADS)

Li, Chengjun; Gong, Hui; Gan, Zhuo; Luo, Qingming

2005-01-01

Human prefrontal cortex (PFC) helps mediate working memory (WM), a system that is used for temporary storage and manipulation of information and is involved with many higher-level cognitive functions. Here, we report a functional near-infrared spectroscopy (NIRS) study on the PFC activation caused by verbal WM task. For investigating the effect of memory load on brain activation, we adopted the "n-back" task in which subjects must decide for each present letter whether it matches the letter presented n items back in sequence. 27 subjects (ages 18-24, 13 females) participated in the work. Concentration changes in oxy-Hb (HbO2), deoxy-Hb (Hb), and total-Hb (HbT) in the subjects" prefrontal cortex were monitored by a 24-channel functional NIRS imager. The cortical activations and deactivations were found in left ventrolateral PFC and bilateral dorsolateral PFC. As memory load increased, subjects showed poorer behavioral performance as well as monotonically increasing magnitudes of the activations and deactivations in PFC.

Fast maximum intensity projections of large medical data sets by exploiting hierarchical memory architectures.

PubMed

Kiefer, Gundolf; Lehmann, Helko; Weese, Jürgen

2006-04-01

Maximum intensity projections (MIPs) are an important visualization technique for angiographic data sets. Efficient data inspection requires frame rates of at least five frames per second at preserved image quality. Despite the advances in computer technology, this task remains a challenge. On the one hand, the sizes of computed tomography and magnetic resonance images are increasing rapidly. On the other hand, rendering algorithms do not automatically benefit from the advances in processor technology, especially for large data sets. This is due to the faster evolving processing power and the slower evolving memory access speed, which is bridged by hierarchical cache memory architectures. In this paper, we investigate memory access optimization methods and use them for generating MIPs on general-purpose central processing units (CPUs) and graphics processing units (GPUs), respectively. These methods can work on any level of the memory hierarchy, and we show that properly combined methods can optimize memory access on multiple levels of the hierarchy at the same time. We present performance measurements to compare different algorithm variants and illustrate the influence of the respective techniques. On current hardware, the efficient handling of the memory hierarchy for CPUs improves the rendering performance by a factor of 3 to 4. On GPUs, we observed that the effect is even larger, especially for large data sets. The methods can easily be adjusted to different hardware specifics, although their impact can vary considerably. They can also be used for other rendering techniques than MIPs, and their use for more general image processing task could be investigated in the future.

Encoding and retrieval processes involved in the access of source information in the absence of item memory.

PubMed

Ball, B Hunter; DeWitt, Michael R; Knight, Justin B; Hicks, Jason L

2014-09-01

The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were related to the target item but never actually studied. In Experiments 1 and 2, participants studied 1 category member (e.g., onion) from a variety of different categories and at test were presented with an unstudied category label (e.g., vegetable) to probe memory for item and source information. In Experiments 3 and 4, 1 member of unidirectional (e.g., credit or card) or bidirectional (e.g., salt or pepper) associates was studied, whereas the other unstudied member served as a test probe. When recall failed, source information was accessible only when items were processed deeply during encoding (Experiments 1 and 2) and when there was strong forward associative strength between the retrieval cue and target (Experiments 3 and 4). These findings suggest that a retrieval probe diagnostic of semantically related item information reinstantiates information bound in memory during encoding that results in reactivation of associated contextual information, contingent upon sufficient learning of the item itself and the association between the item and its context information.

78 FR 20849 - Special Local Regulations; Marine Events, Potomac River; National Harbor Access Channel, MD

Federal Register 2010, 2011, 2012, 2013, 2014

2013-04-08

...-AA08 Special Local Regulations; Marine Events, Potomac River; National Harbor Access Channel, MD AGENCY... special local regulations during the ``Swim Across the Potomac'' swimming competition, to be held on the waters of the Potomac River on June 2, 2013. These special local regulations are necessary to provide for...

77 FR 39630 - Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel, MD

Federal Register 2010, 2011, 2012, 2013, 2014

2012-07-05

... 1625-AA08 Special Local Regulations for Marine Events; Potomac River, National Harbor Access Channel... special local regulations during the swim segment of the ``Swim Across the Potomac River'' swimming competition, to be held on the waters of the Potomac River on July 8, 2012. These special local regulations...

'Olelo's Partnership Efforts with Teachers and Youth: More than Media Literacy

ERIC Educational Resources Information Center

Angel, Angela

2005-01-01

'Olelo Community Television has served the O'ahu community for over 16 years. It offers community members training in television production, and it provides access to Oceanic Cable channels 52 through 56--the five cable channels that 'Olelo currently manages. 'Olelo is a non-profit, public, educational and government (PEG) access organization that…

FPGA-Based, Self-Checking, Fault-Tolerant Computers

NASA Technical Reports Server (NTRS)

Some, Raphael; Rennels, David

2004-01-01

A proposed computer architecture would exploit the capabilities of commercially available field-programmable gate arrays (FPGAs) to enable computers to detect and recover from bit errors. The main purpose of the proposed architecture is to enable fault-tolerant computing in the presence of single-event upsets (SEUs). [An SEU is a spurious bit flip (also called a soft error) caused by a single impact of ionizing radiation.] The architecture would also enable recovery from some soft errors caused by electrical transients and, to some extent, from intermittent and permanent (hard) errors caused by aging of electronic components. A typical FPGA of the current generation contains one or more complete processor cores, memories, and highspeed serial input/output (I/O) channels, making it possible to shrink a board-level processor node to a single integrated-circuit chip. Custom, highly efficient microcontrollers, general-purpose computers, custom I/O processors, and signal processors can be rapidly and efficiently implemented by use of FPGAs. Unfortunately, FPGAs are susceptible to SEUs. Prior efforts to mitigate the effects of SEUs have yielded solutions that degrade performance of the system and require support from external hardware and software. In comparison with other fault-tolerant- computing architectures (e.g., triple modular redundancy), the proposed architecture could be implemented with less circuitry and lower power demand. Moreover, the fault-tolerant computing functions would require only minimal support from circuitry outside the central processing units (CPUs) of computers, would not require any software support, and would be largely transparent to software and to other computer hardware. There would be two types of modules: a self-checking processor module and a memory system (see figure). The self-checking processor module would be implemented on a single FPGA and would be capable of detecting its own internal errors. It would contain two CPUs executing identical programs in lock step, with comparison of their outputs to detect errors. It would also contain various cache local memory circuits, communication circuits, and configurable special-purpose processors that would use self-checking checkers. (The basic principle of the self-checking checker method is to utilize logic circuitry that generates error signals whenever there is an error in either the checker or the circuit being checked.) The memory system would comprise a main memory and a hardware-controlled check-pointing system (CPS) based on a buffer memory denoted the recovery cache. The main memory would contain random-access memory (RAM) chips and FPGAs that would, in addition to everything else, implement double-error-detecting and single-error-correcting memory functions to enable recovery from single-bit errors.

78. Augmenting NMDA Receptor Signaling Enhances Working Memory and Alters Gamma Oscillations in Patients With Schizophrenia

PubMed Central

Forsyth, Jennifer; Bachman, Peter; Asarnow, Robert

2017-01-01

Abstract Background: Gamma band oscillations (30–80 Hz) are associated with numerous sensory and higher cognitive functions and are abnormal in patients with schizophrenia. Glutamate signaling at the N-methyl-D-aspartate receptor (NMDAR) is theorized to play a key role in the pathophysiology of schizophrenia and NMDAR antagonists disrupt working memory and gamma oscillations in healthy individuals. It has therefore been suggested that NMDAR dysfunction may contribute to abnormalities in gamma oscillations and working memory in schizophrenia. In the current study, we examined the effects of acutely augmenting NMDAR signaling using the NMDAR agonist, d-cycloserine (DCS), on working memory and gamma power in patients with schizophrenia. Methods: In a double-blind design, patients with schizophrenia were randomized to receive a single dose of 100 mg DCS (SZ-DCS; n = 24) or Placebo (SZ-PLC; n = 21). Patients completed a spatial n-back task involving a 0-back control condition and 1-back and 2-back working memory loads while undergoing EEG recording. Gamma power (30–80 Hz) during the 0-back condition assessed gamma power associated with basic perceptual, motor, and attentive processes. Change in gamma power for correct working memory trials relative to the 0-back condition assessed gamma power associated with working memory function. Results: Among patients who performed above chance (SZ-DCS = 17, SZ-PLC = 16), patients who received DCS showed superior working memory performance compared to patients who received Placebo. Gamma power during the 0-back control condition was similar between SZ-DCS and SZ-PLC who performed above chance. However, gamma power associated with working memory function was significantly suppressed in SZ-DCS compared to SZ-PLC, particularly over frontal right channels. In addition, whereas higher working memory gamma power over frontal right channels was associated with better working memory performance in SZ-PLC, this relationship was not evident in SZ-DCS. Conclusion: Results suggest that augmenting NMDAR signaling enhanced working memory performance and suppressed gamma activity associated with working memory function in patients with schizophrenia. Given prior reports that schizophrenia patients may utilize excessive gamma power for successful working memory performance, these findings suggest that augmenting NMDAR signaling may improve the efficiency of neural encoding for successful working memory function in schizophrenia.

ACCESS: A Communicating and Cooperating Expert Systems System.

DTIC Science & Technology

1988-01-31

therefore more quickly accepted by programmers. This is in part due to the already familiar concepts of multi-processing environments (e.g. semaphores ...Di68] and monitors [Br75]) which can be viewed as a special case of synchronized shared memory models [Di6S]. Heterogeneous systems however, are by...locality of nodes is not possible and frequent access of memory is required. Synchronization of processes also suffers from a loss of efficiency in

Constraints on Access: Costs and Benefits (Spontaneous Memory for Relevant Experiences)

DTIC Science & Technology

1989-05-01

F. I. M. Craik (Eds.), Levels of processing and human memory. Hillsdale, NJ: Erlbaum. Dewey, J. (1963). How we think. Portions published in R. M...transfer. Pictures (vs. words) and levels of processing and elaborative encoding manipulations are shown to affect directed access but are found to have...includes most 5 6 list-learning experiments, research on schema/script abstraction, and studies of remembering which might manipulate levels of processing

Transfers and Enhancements of the Teleconferencing System and Support of the Special Operations Planning Aids

DTIC Science & Technology

1984-10-31

five colors , page forward, page back, erase, clear the page, store previously annotated material, and later retrieve it. From this developed a four...system to secure sites. These * enchancements are discussed below. -2- .7- -. . . --. J -. . . . .. . . . . . . . ..- . _77 . -.- 2.1 Enhancements to the...and large cache memory of the Winchester drive allows the SGWS software to run much faster when doing file access or direct memory access (DMA) than

Activating representations in permanent memory: different benefits for pictures and words.

PubMed

Seifert, L S

1997-09-01

Previous research has suggested that pictures have privileged access to semantic memory (W. R. Glaser, 1992), but J. Theios and P. C. Amrhein (1989b) argued that prior studies inappropriately used large pictures and small words. In Experiment 1, participants categorized pictures reliably faster than words, even when both types of items were of optimal perceptual size. In Experiment 2, a poststimulus flashmask and judgments about internal features did not eliminate picture superiority, indicating that it was not due to differences in early visual processing or analysis of visible features. In Experiment 3, when participants made judgments about whether items were related, latencies were reliably faster for categorically related pictures than for words, but there was no picture advantage for noncategorically associated items. Results indicate that pictures have privileged access to semantic memory for categories, but that neither pictures nor words seem to have privileged access to noncategorical associations.

Implementation of Ferroelectric Memories for Space Applications

NASA Technical Reports Server (NTRS)

Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

2000-01-01

Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin

2018-04-01

In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.

Coordinated design of coding and modulation systems

NASA Technical Reports Server (NTRS)

Massey, J. L.

1976-01-01

Work on partial unit memory codes continued; it was shown that for a given virtual state complexity, the maximum free distance over the class of all convolutional codes is achieved within the class of unit memory codes. The effect of phase-lock loop (PLL) tracking error on coding system performance was studied by using the channel cut-off rate as the measure of quality of a modulation system. Optimum modulation signal sets for a non-white Gaussian channel considered an heuristic selection rule based on a water-filling argument. The use of error correcting codes to perform data compression by the technique of syndrome source coding was researched and a weight-and-error-locations scheme was developed that is closely related to LDSC coding.

Channel Analysis for a 6.4 Gb s-1 DDR5 Data Buffer Receiver Front-End

NASA Astrophysics Data System (ADS)

Lehmann, Stefanie; Gerfers, Friedel

2017-09-01

In this contribution, the channel characteristic of the next generation DDR5-SDRAM architecture and possible approaches to overcome channel impairments are analysed. Because modern enterprise server applications and networks demand higher memory bandwidth, throughput and capacity, the DDR5-SDRAM specification is currently under development as a follow-up of DDR4-SDRAM technology. In this specification, the data rate is doubled to DDR5-6400 per IO as compared to the former DDR4-3200 architecture, resulting in a total per DIMM data rate of up to 409.6 Gb s-1. The single-ended multi-point-to-point CPU channel architecture in DDRX technology remains the same for DDR5 systems. At the specified target data rate, insertion loss, reflections, cross-talk as well as power supply noise become more severe and have to be considered. Using the data buffer receiver front-end of a load-reduced memory module, sophisticated equalisation techniques can be applied to ensure target BER at the increased data rate. In this work, the worst case CPU back-plane channel is analysed to derive requirements for receiver-side equalisation from the channel response characteristics. First, channel impairments such as inter-symbol-interference, reflections from the multi-point channel structure, and crosstalk from neighboring lines are analysed in detail. Based on these results, different correction methods for DDR5 data buffer front-ends are discussed. An architecture with 1-tap FFE in combination with a multi-tap DFE is proposed. Simulation of the architecture using a random input data stream is used to reveal the required DFE tap filter depth to effectively eliminate the dominant ISI and reflection based error components.

Dependency-based long short term memory network for drug-drug interaction extraction.

PubMed

Wang, Wei; Yang, Xi; Yang, Canqun; Guo, Xiaowei; Zhang, Xiang; Wu, Chengkun

2017-12-28

Drug-drug interaction extraction (DDI) needs assistance from automated methods to address the explosively increasing biomedical texts. In recent years, deep neural network based models have been developed to address such needs and they have made significant progress in relation identification. We propose a dependency-based deep neural network model for DDI extraction. By introducing the dependency-based technique to a bi-directional long short term memory network (Bi-LSTM), we build three channels, namely, Linear channel, DFS channel and BFS channel. All of these channels are constructed with three network layers, including embedding layer, LSTM layer and max pooling layer from bottom up. In the embedding layer, we extract two types of features, one is distance-based feature and another is dependency-based feature. In the LSTM layer, a Bi-LSTM is instituted in each channel to better capture relation information. Then max pooling is used to get optimal features from the entire encoding sequential data. At last, we concatenate the outputs of all channels and then link it to the softmax layer for relation identification. To the best of our knowledge, our model achieves new state-of-the-art performance with the F-score of 72.0% on the DDIExtraction 2013 corpus. Moreover, our approach obtains much higher Recall value compared to the existing methods. The dependency-based Bi-LSTM model can learn effective relation information with less feature engineering in the task of DDI extraction. Besides, the experimental results show that our model excels at balancing the Precision and Recall values.

Taxing Working Memory during Retrieval of Emotional Memories Does Not Reduce Memory Accessibility When Cued with Reminders

PubMed Central

van Schie, Kevin; Engelhard, Iris M.; van den Hout, Marcel A.

2015-01-01

Earlier studies have shown that when individuals recall an emotional memory while simultaneously doing a demanding dual-task [e.g., playing Tetris, mental arithmetic, making eye movements (EM)], this reduces self-reported vividness and emotionality of the memory. These effects have been found up to 1 week later, but have largely been confined to self-report ratings. This study examined whether this dual-tasking intervention reduces memory performance (i.e., accessibility of emotional memories). Undergraduates (N = 60) studied word-image pairs and rated the retrieved image on vividness and emotionality when cued with the word. Then they viewed the cues and recalled the images with or without making EM. Finally, they re-rated the images on vividness and emotionality. Additionally, fragments from images from all conditions were presented and participants identified which fragment was paired earlier with which cue. Findings showed no effect of the dual-task manipulation on self-reported ratings and latency responses. Several possible explanations for the lack of effects are discussed, but the cued recall procedure in our experiment seems to explain the absence of effects best. The study demonstrates boundaries to the effects of the “dual-tasking” procedure. PMID:25729370

Left Ventrolateral Prefrontal Cortex and the Cognitive Control of Memory

ERIC Educational Resources Information Center

Badre, David; Wagner, Anthony D.

2007-01-01

Cognitive control mechanisms permit memory to be accessed strategically, and so aid in bringing knowledge to mind that is relevant to current goals and actions. In this review, we consider the contribution of left ventrolateral prefrontal cortex (VLPFC) to the cognitive control of memory. Reviewed evidence supports a two-process model of mnemonic…

Patterns of Autobiographical Memory in Adults with Autism Spectrum Disorder

ERIC Educational Resources Information Center

Crane, Laura; Pring, Linda; Jukes, Kaylee; Goddard, Lorna

2012-01-01

Two studies are presented that explored the effects of experimental manipulations on the quality and accessibility of autobiographical memories in adults with autism spectrum disorder (ASD), relative to a typical comparison group matched for age, gender and IQ. Both studies found that the adults with ASD generated fewer specific memories than the…

Ames Lab 101: Ultrafast Magnetic Switching

ScienceCinema

Wang; Jigang

2018-01-01

Ames Laboratory physicists have found a new way to switch magnetism that is at least 1000 times faster than currently used in magnetic memory technologies. Magnetic switching is used to encode information in hard drives, magnetic random access memory and other computing devices. The discovery potentially opens the door to terahertz and faster memory speeds.

Memory for Recently Accessed Visual Attributes

ERIC Educational Resources Information Center

Jiang, Yuhong V.; Shupe, Joshua M.; Swallow, Khena M.; Tan, Deborah H.

2016-01-01

Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's…

Episodic and Semantic Memory Influences on Picture Naming in Alzheimer's Disease

ERIC Educational Resources Information Center

Small, Jeff A.; Sandhu, Nirmaljeet

2008-01-01

This study investigated the relationship between semantic and episodic memory as they support lexical access by healthy younger and older adults and individuals with Alzheimer's disease (AD). In particular, we were interested in examining the pattern of semantic and episodic memory declines in AD (i.e., word-finding difficulty and impaired recent…

Hemispheric Differences in the Organization of Memory for Text Ideas

ERIC Educational Resources Information Center

Long, Debra L.; Johns, Clinton L.; Jonathan, Eunike

2012-01-01

The goal of this study was to examine hemispheric asymmetries in episodic memory for discourse. Access to previously comprehended information is essential for mapping incoming information to representations of "who did what to whom" in memory. An item-priming-in-recognition paradigm was used to examine differences in how the hemispheres represent…

Individual Differences in the Effects of Retrieval from Long-Term Memory

ERIC Educational Resources Information Center

Brewer, Gene A.; Unsworth, Nash

2012-01-01

The current study examined individual differences in the effects of retrieval from long-term memory (i.e., the testing effect). The effects of retrieving from memory make tested information more accessible for future retrieval attempts. Despite the broad applied ramifications of such a potent memorization technique there is a paucity of research…

Semantic Memory and Verbal Working Memory Correlates of N400 to Subordinate Homographs

ERIC Educational Resources Information Center

Salisbury, Dean F.

2004-01-01

N400 is an event-related brain potential that indexes operations in semantic memory conceptual space, whether elicited by language or some other representation (e.g., drawings). Language models typically propose three stages: lexical access or orthographic- and phonological-level analysis; lexical selection or word-level meaning and associate…

A Neuroanatomical Model of Prefrontal Inhibitory Modulation of Memory Retrieval

PubMed Central

Depue, Brendan E.

2012-01-01

Memory of past experience is essential for guiding goal-related behavior. Being able to control accessibility of memory through modulation of retrieval enables humans to flexibly adapt to their environment. Understanding the specific neural pathways of how this control is achieved has largely eluded cognitive neuroscience. Accordingly, in the current paper I review literature that examines the overt control over retrieval in order to reduce accessibility. I first introduce three hypotheses of inhibition of retrieval. These hypotheses involve: i) attending to other stimuli as a form of diversionary attention, ii) inhibiting the specific individual neural representation of the memory, and iii) inhibiting the hippocampus and retrieval process more generally to prevent reactivation of the representation. I then analyze literature taken from the White Bear Suppression, Directed Forgetting and Think/No-Think tasks to provide evidence for these hypotheses. Finally, a neuroanatomical model is developed to indicate three pathways from PFC to the hippocampal complex that support inhibition of memory retrieval. Describing these neural pathways increases our understanding of control over memory in general. PMID:22374224

Activation and binding in verbal working memory: a dual-process model for the recognition of nonwords.

PubMed

Oberauer, Klaus; Lange, Elke B

2009-02-01

The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. Journal of Experimental Psychology: Learning, Memory, and Cognition, 28, 411-421]. Familiarity arises from activated representations in long-term memory, ignoring their relations; recollection retrieves bindings in the capacity-limited component of working memory. In three experiments participants encoded two short lists of nonwords for immediate recognition, one of which was then cued as irrelevant. Probes from the irrelevant list were rejected more slowly than new probes; this was also found with probes recombining letters of irrelevant nonwords, suggesting that familiarity arises from individual letters independent of their relations. When asked to accept probes whose letters were all in the relevant list, regardless of their conjunction, participants accepted probes preserving the original conjunctions faster than recombinations, showing that recollection accessed feature bindings automatically. The model fit the data best when familiarity depended only on matching letters, whereas recollection used binding information.

Soft-error tolerance and energy consumption evaluation of embedded computer with magnetic random access memory in practical systems using computer simulations

NASA Astrophysics Data System (ADS)

Nebashi, Ryusuke; Sakimura, Noboru; Sugibayashi, Tadahiko

2017-08-01

We evaluated the soft-error tolerance and energy consumption of an embedded computer with magnetic random access memory (MRAM) using two computer simulators. One is a central processing unit (CPU) simulator of a typical embedded computer system. We simulated the radiation-induced single-event-upset (SEU) probability in a spin-transfer-torque MRAM cell and also the failure rate of a typical embedded computer due to its main memory SEU error. The other is a delay tolerant network (DTN) system simulator. It simulates the power dissipation of wireless sensor network nodes of the system using a revised CPU simulator and a network simulator. We demonstrated that the SEU effect on the embedded computer with 1 Gbit MRAM-based working memory is less than 1 failure in time (FIT). We also demonstrated that the energy consumption of the DTN sensor node with MRAM-based working memory can be reduced to 1/11. These results indicate that MRAM-based working memory enhances the disaster tolerance of embedded computers.

Indiana State University Undergraduate Students' Channels of Knowledge of and Use of Cunningham Memorial Library's Public Services.

ERIC Educational Resources Information Center

Lyle, Jack W.

An application of the diffusion of innovations theory to library marketing, this study was designed to determine what channels of knowledge are more effective in persuading undergraduate students to adopt the use of library public services. To explore this topic at the local level, the following question was formulated: By what communication…

Real-Time, Polyphase-FFT, 640-MHz Spectrum Analyzer

NASA Technical Reports Server (NTRS)

Zimmerman, George A.; Garyantes, Michael F.; Grimm, Michael J.; Charny, Bentsian; Brown, Randy D.; Wilck, Helmut C.

1994-01-01

Real-time polyphase-fast-Fourier-transform, polyphase-FFT, spectrum analyzer designed to aid in detection of multigigahertz radio signals in two 320-MHz-wide polarization channels. Spectrum analyzer divides total spectrum of 640 MHz into 33,554,432 frequency channels of about 20 Hz each. Size and cost of polyphase-coefficient memory substantially reduced and much of processing loss of windowed FFTs eliminated.

More than Memory Impairment in Voltage-Gated Potassium Channel Complex Encephalopathy

PubMed Central

Bettcher, Brianne M.; Gelfand, Jeffrey M.; Irani, Sarosh R.; Neuhaus, John; Forner, Sven; Hess, Christopher P.; Geschwind, Michael D.

2014-01-01

Objective Autoimmune encephalopathies (AE) are a heterogeneous group of neurological disorders that affect cognition. Although memory difficulties are commonly endorsed, few reports of AE inclusively assess all cognitive domains in detail. Our aim was to perform an unbiased cognitive evaluation of AE patients with voltage-gated potassium channel complex antibodies (VGKCC-Abs) in order to delineate cognitive strengths and weaknesses. Methods We assessed serial VGKCC-Abs AE subjects (n=12) with a comprehensive evaluation of memory, executive functions, visuospatial skills, and language. Clinical MRI (n=10/12) was evaluated. Five subjects had serial cognitive testing available, permitting descriptive analysis of change. Results Subjects demonstrated mild to moderate impairment in memory (mean Z=−1.9) and executive functions (mean Z=−1.5), with variable impairments in language and sparing of visuospatial skills. MRI findings showed T2 hyperintensities in medial temporal lobe (10/10) and basal ganglia (2/10). Serial cognitive examination revealed heterogeneity in cognitive function; whereas most patients improved in one or more domains, residual impairments were observed in some patients. Conclusions This study augments prior neuropsychological analyses in VGKCC-Ab AE by identifying not only memory and executive function deficits, but also language impairments, with preservation of visuospatial functioning. This study further highlights the importance of domain-specific testing to parse out the complex cognitive phenotypes of VGKCC-Ab AE. PMID:24981998

Temporal variability and memory in sediment transport in an experimental step-pool channel

NASA Astrophysics Data System (ADS)

Saletti, Matteo; Molnar, Peter; Zimmermann, André; Hassan, Marwan A.; Church, Michael

2015-11-01

Temporal dynamics of sediment transport in steep channels using two experiments performed in a steep flume (8%) with natural sediment composed of 12 grain sizes are studied. High-resolution (1 s) time series of sediment transport were measured for individual grain-size classes at the outlet of the flume for different combinations of sediment input rates and flow discharges. Our aim in this paper is to quantify (a) the relation of discharge and sediment transport and (b) the nature and strength of memory in grain-size-dependent transport. None of the simple statistical descriptors of sediment transport (mean, extreme values, and quantiles) display a clear relation with water discharge, in fact a large variability between discharge and sediment transport is observed. Instantaneous transport rates have probability density functions with heavy tails. Bed load bursts have a coarser grain-size distribution than that of the entire experiment. We quantify the strength and nature of memory in sediment transport rates by estimating the Hurst exponent and the autocorrelation coefficient of the time series for different grain sizes. Our results show the presence of the Hurst phenomenon in transport rates, indicating long-term memory which is grain-size dependent. The short-term memory in coarse grain transport increases with temporal aggregation and this reveals the importance of the sampling duration of bed load transport rates in natural streams, especially for large fractions.

Towards High-Frequency Shape Memory Alloy Actuators Incorporating Liquid Metal Energy Circuits

NASA Astrophysics Data System (ADS)

Hartl, Darren; Mingear, Jacob; Bielefeldt, Brent; Rohmer, John; Zamarripa, Jessica; Elwany, Alaa

2017-12-01

Large shape memory alloy (SMA) actuators are currently limited to applications with low cyclic actuation frequency requirements due to their generally poor heat transfer rates. This limitation can be overcome through the use of distributed body heating methods such as induction heating or by accelerated cooling methods such as forced convection in internal cooling channels. In this work, a monolithic SMA beam actuator containing liquid gallium-indium alloy-filled channels is fabricated through additive manufacturing. These liquid metal channels enable a novel multi-physical thermal control system, allowing for increased heating and cooling rates to facilitate an increased cyclic actuation frequency. Liquid metal flowing in the channels performs the dual tasks of inductively heating the surrounding SMA material and then actively cooling the SMA via forced internal fluid convection. A coupled thermoelectric model, implemented in COMSOL, predicts a possible fivefold increase in the cyclic actuation frequency due to these increased thermal transfer rates when compared to conventional SMA forms having external heating coils and being externally cooled via forced convection. The first ever experimental prototype SMA actuator of this type is described and, even at much lower flow rates, is shown to exhibit a decrease in cooling time of 40.9%.

Early-life sugar consumption has long-term negative effects on memory function in male rats.

PubMed

Noble, Emily E; Hsu, Ted M; Liang, Joanna; Kanoski, Scott E

2017-09-25

Added dietary sugars contribute substantially to the diet of children and adolescents in the USA, and recent evidence suggests that consuming sugar-sweetened beverages (SSBs) during early life has deleterious effects on hippocampal-dependent memory function. Here, we test whether the effects of early-life sugar consumption on hippocampal function persist into adulthood when access to sugar is restricted to the juvenile/adolescent phase of development. Male rats were given ad libitum access to an 11% weight-by-volume sugar solution (made with high fructose corn syrup-55) throughout the adolescent phase of development (post-natal day (PN) 26-56). The control group received a second bottle of water instead, and both groups received ad libitum standard laboratory chow and water access throughout the study. At PN 56 sugar solutions were removed and at PN 175 rats were subjected to behavioral testing for hippocampal-dependent episodic contextual memory in the novel object in context (NOIC) task, for anxiety-like behavior in the Zero maze, and were given an intraperitoneal glucose tolerance test. Early-life exposure to SSBs conferred long-lasting impairments in hippocampal-dependent memory function later in life- yet had no effect on body weight, anxiety-like behavior, or glucose tolerance. A second experiment demonstrated that NOIC performance was impaired at PN 175 even when SSB access was limited to 2 hours daily from PN 26-56. Our data suggest that even modest SSB consumption throughout early life may have long-term negative consequences on memory function during adulthood.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-01-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-09-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Non-Volatile Memory Technology Symposium 2001: Proceedings

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Daud, Taher; Strauss, Karl

2001-01-01

This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

A Concept of Corporate Memory

DTIC Science & Technology

1979-05-17

34 social memory", in the broader context of society. This paper explores some of the possibilities of creating a computer based corporate memory...NUMBER 79-04-03 2. COVT ACCESSION NO. 3. RECIPIENT’S CATALOG NUMBER «. TITLE f«n<* SubfU/.; A CONCEPT OF- CORPORATE MEMORY S. TYPE OF...It. SUPPLEMENTARY NOTES • IJ. KEY WORDS fCon<Jnu» on r»r»r»» mid* It nmcammmrj and Idmntltr bf block numbmr) corporate memory, office

Sol-gel-derived double-layered nanocrystal memory

NASA Astrophysics Data System (ADS)

Ko, Fu-Hsiang; You, Hsin-Chiang; Lei, Tan-Fu

2006-12-01

The authors have used the sol-gel spin-coating method to fabricate a coexisting hafnium silicate and zirconium silicate double-layered nanocrystal (NC) memories. From transmission electron microscopic and x-ray photoelectron spectroscopic analyses, the authors determined that the hafnium silicate and zirconium silicate NCs formed after annealing at 900°C for 1min. When using channel hot electron injection for charging and band-to-band tunneling-induced hot hole injection for discharging, the NC memories exhibited superior Vth shifting because of the higher probability for trapping the charge carrier.