NASA Technical Reports Server (NTRS)
Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)
2000-01-01
A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.
Federal Register 2010, 2011, 2012, 2013, 2014
2010-04-01
... Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same... synchronous dynamic random access memory controllers and products containing same by reason of infringement of... semiconductor chips having synchronous dynamic random access memory controllers and products containing same...
Method and apparatus for managing access to a memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
DeBenedictis, Erik
A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operationalmore » memory layout reduces an amount of energy consumed by the processor to perform the computing job.« less
Hamlet, Jason R [Albuquerque, NM; Robertson, Perry J [Albuquerque, NM; Pierson, Lyndon G [Albuquerque, NM; Olsberg, Ronald R [Albuquerque, NM
2012-02-28
A deflate decompressor includes at least one decompressor unit, a memory access controller, a feedback path, and an output buffer unit. The memory access controller is coupled to the decompressor unit via a data path and includes a data buffer to receive the data stream and temporarily buffer a first portion the data stream. The memory access controller transfers fixed length data units of the data stream from the data buffer to the decompressor unit with reference to a memory pointer pointing into the memory buffer. The feedback path couples the decompressor unit to the memory access controller to feed back decrement values to the memory access controller for updating the memory pointer. The decrement values each indicate a number of bits unused by the decompressor unit when decoding the fixed length data units. The output buffer unit buffers a second portion of the data stream after decompression.
The dynamic interplay between acute psychosocial stress, emotion and autobiographical memory.
Sheldon, Signy; Chu, Sonja; Nitschke, Jonas P; Pruessner, Jens C; Bartz, Jennifer A
2018-06-06
Although acute psychosocial stress can impact autobiographical memory retrieval, the nature of this effect is not entirely clear. One reason for this ambiguity is because stress can have opposing effects on the different stages of autobiographical memory retrieval. We addressed this issue by testing how acute stress affects three stages of the autobiographical memory retrieval - accessing, recollecting and reconsolidating a memory. We also investigate the influence of emotion valence on this effect. In a between-subjects design, participants were first exposed to an acute psychosocial stressor or a control task. Next, the participants were shown positive, negative or neutral retrieval cues and asked to access and describe autobiographical memories. After a three to four day delay, participants returned for a second session in which they described these autobiographical memories. During initial retrieval, stressed participants were slower to access memories than were control participants; moreover, cortisol levels were positively associated with response times to access positively-cued memories. There were no effects of stress on the amount of details used to describe memories during initial retrieval, but stress did influence memory detail during session two. During session two, stressed participants recovered significantly more details, particularly emotional ones, from the remembered events than control participants. Our results indicate that the presence of stress impairs the ability to access consolidated autobiographical memories; moreover, although stress has no effect on memory recollection, stress alters how recollected experiences are reconsolidated back into memory traces.
Programmable Direct-Memory-Access Controller
NASA Technical Reports Server (NTRS)
Hendry, David F.
1990-01-01
Proposed programmable direct-memory-access controller (DMAC) operates with computer systems of 32000 series, which have 32-bit data buses and use addresses of 24 (or potentially 32) bits. Controller functions with or without help of central processing unit (CPU) and starts itself. Includes such advanced features as ability to compare two blocks of memory for equality and to search block of memory for specific value. Made as single very-large-scale integrated-circuit chip.
Working memory capacity and controlled serial memory search.
Mızrak, Eda; Öztekin, Ilke
2016-08-01
The speed-accuracy trade-off (SAT) procedure was used to investigate the relationship between working memory capacity (WMC) and the dynamics of temporal order memory retrieval. High- and low-span participants (HSs, LSs) studied sequentially presented five-item lists, followed by two probes from the study list. Participants indicated the more recent probe. Overall, accuracy was higher for HSs compared to LSs. Crucially, in contrast to previous investigations that observed no impact of WMC on speed of access to item information in memory (e.g., Öztekin & McElree, 2010), recovery of temporal order memory was slower for LSs. While accessing an item's representation in memory can be direct, recovery of relational information such as temporal order information requires a more controlled serial memory search. Collectively, these data indicate that WMC effects are particularly prominent during high demands of cognitive control, such as serial search operations necessary to access temporal order information from memory. Copyright © 2016 Elsevier B.V. All rights reserved.
Pu, Y-F; Jiang, N; Chang, W; Yang, H-X; Li, C; Duan, L-M
2017-05-08
To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology.
Integrated semiconductor-magnetic random access memory system
NASA Technical Reports Server (NTRS)
Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)
2001-01-01
The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.
Pu, Y-F; Jiang, N.; Chang, W.; Yang, H-X; Li, C.; Duan, L-M
2017-01-01
To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology. PMID:28480891
Bubble memory module for spacecraft application
NASA Technical Reports Server (NTRS)
Hayes, P. J.; Looney, K. T.; Nichols, C. D.
1985-01-01
Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.
Yoon, Doe Hyun; Muralimanohar, Naveen; Chang, Jichuan; Ranganthan, Parthasarathy
2017-09-26
A disclosed example method involves performing simultaneous data accesses on at least first and second independently selectable logical sub-ranks to access first data via a wide internal data bus in a memory device. The memory device includes a translation buffer chip, memory chips in independently selectable logical sub-ranks, a narrow external data bus to connect the translation buffer chip to a memory controller, and the wide internal data bus between the translation buffer chip and the memory chips. A data access is performed on only the first independently selectable logical sub-rank to access second data via the wide internal data bus. The example method also involves locating a first portion of the first data, a second portion of the first data, and the second data on the narrow external data bus during separate data transfers.
Distributed multiport memory architecture
NASA Technical Reports Server (NTRS)
Kohl, W. H. (Inventor)
1983-01-01
A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.
NASA Technical Reports Server (NTRS)
Hendry, David F. (Inventor)
1993-01-01
In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.
Radiation Effects of Commercial Resistive Random Access Memories
NASA Technical Reports Server (NTRS)
Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas
2014-01-01
We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.
Blocksome, Michael A.; Mamidala, Amith R.
2013-09-03
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Blocksome, Michael A; Mamidala, Amith R
2014-02-11
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Chip architecture - A revolution brewing
NASA Astrophysics Data System (ADS)
Guterl, F.
1983-07-01
Techniques being explored by microchip designers and manufacturers to both speed up memory access and instruction execution while protecting memory are discussed. Attention is given to hardwiring control logic, pipelining for parallel processing, devising orthogonal instruction sets for interchangeable instruction fields, and the development of hardware for implementation of virtual memory and multiuser systems to provide memory management and protection. The inclusion of microcode in mainframes eliminated logic circuits that control timing and gating of the CPU. However, improvements in memory architecture have reduced access time to below that needed for instruction execution. Hardwiring the functions as a virtual memory enhances memory protection. Parallelism involves a redundant architecture, which allows identical operations to be performed simultaneously, and can be directed with microcode to avoid abortion of intermediate instructions once on set of instructions has been completed.
Oscillatory mechanisms of process binding in memory.
Klimesch, Wolfgang; Freunberger, Roman; Sauseng, Paul
2010-06-01
A central topic in cognitive neuroscience is the question, which processes underlie large scale communication within and between different neural networks. The basic assumption is that oscillatory phase synchronization plays an important role for process binding--the transient linking of different cognitive processes--which may be considered a special type of large scale communication. We investigate this question for memory processes on the basis of different types of oscillatory synchronization mechanisms. The reviewed findings suggest that theta and alpha phase coupling (and phase reorganization) reflect control processes in two large memory systems, a working memory and a complex knowledge system that comprises semantic long-term memory. It is suggested that alpha phase synchronization may be interpreted in terms of processes that coordinate top-down control (a process guided by expectancy to focus on relevant search areas) and access to memory traces (a process leading to the activation of a memory trace). An analogous interpretation is suggested for theta oscillations and the controlled access to episodic memories. Copyright (c) 2009 Elsevier Ltd. All rights reserved.
Left Ventrolateral Prefrontal Cortex and the Cognitive Control of Memory
ERIC Educational Resources Information Center
Badre, David; Wagner, Anthony D.
2007-01-01
Cognitive control mechanisms permit memory to be accessed strategically, and so aid in bringing knowledge to mind that is relevant to current goals and actions. In this review, we consider the contribution of left ventrolateral prefrontal cortex (VLPFC) to the cognitive control of memory. Reviewed evidence supports a two-process model of mnemonic…
Efficient accesses of data structures using processing near memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jayasena, Nuwan S.; Zhang, Dong Ping; Diez, Paula Aguilera
Systems, apparatuses, and methods for implementing efficient queues and other data structures. A queue may be shared among multiple processors and/or threads without using explicit software atomic instructions to coordinate access to the queue. System software may allocate an atomic queue and corresponding queue metadata in system memory and return, to the requesting thread, a handle referencing the queue metadata. Any number of threads may utilize the handle for accessing the atomic queue. The logic for ensuring the atomicity of accesses to the atomic queue may reside in a management unit in the memory controller coupled to the memory wheremore » the atomic queue is allocated.« less
NASA Astrophysics Data System (ADS)
Natsui, Masanori; Hanyu, Takahiro
2018-04-01
In realizing a nonvolatile microcontroller unit (MCU) for sensor nodes in Internet-of-Things (IoT) applications, it is important to solve the data-transfer bottleneck between the central processing unit (CPU) and the nonvolatile memory constituting the MCU. As one circuit-oriented approach to solving this problem, we propose a memory access minimization technique for magnetoresistive-random-access-memory (MRAM)-embedded nonvolatile MCUs. In addition to multiplexing and prefetching of memory access, the proposed technique realizes efficient instruction fetch by eliminating redundant memory access while considering the code length of the instruction to be fetched and the transition of the memory address to be accessed. As a result, the performance of the MCU can be improved while relaxing the performance requirement for the embedded MRAM, and compact and low-power implementation can be performed as compared with the conventional cache-based one. Through the evaluation using a system consisting of a general purpose 32-bit CPU and embedded MRAM, it is demonstrated that the proposed technique increases the peak efficiency of the system up to 3.71 times, while a 2.29-fold area reduction is achieved compared with the cache-based one.
Logical Access Control Mechanisms in Computer Systems.
ERIC Educational Resources Information Center
Hsiao, David K.
The subject of access control mechanisms in computer systems is concerned with effective means to protect the anonymity of private information on the one hand, and to regulate the access to shareable information on the other hand. Effective means for access control may be considered on three levels: memory, process and logical. This report is a…
DOE Office of Scientific and Technical Information (OSTI.GOV)
Blocksome, Michael A.; Mamidala, Amith R.
2013-09-03
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segmentmore » of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.« less
Multiple memory stores and operant conditioning: a rationale for memory's complexity.
Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu
2009-02-01
Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory stores, but such access was penalized as energy expenditure. Model animals were then selected on their fitness in simulated operant conditioning tasks. Results suggest that having access to multiple memory stores and their representations is important in learning to regulate dopamine release, as well as in contextual discrimination. For simple operant conditioning, as well as stimulus discrimination, hippocampal compound representations turned out to suffice, a counterintuitive result given findings that hippocampal lesions tend not to affect performance in such tasks. We argue that there is in fact evidence to support a role for compound representations and the hippocampus in even the simplest conditioning tasks.
A Neuroanatomical Model of Prefrontal Inhibitory Modulation of Memory Retrieval
Depue, Brendan E.
2012-01-01
Memory of past experience is essential for guiding goal-related behavior. Being able to control accessibility of memory through modulation of retrieval enables humans to flexibly adapt to their environment. Understanding the specific neural pathways of how this control is achieved has largely eluded cognitive neuroscience. Accordingly, in the current paper I review literature that examines the overt control over retrieval in order to reduce accessibility. I first introduce three hypotheses of inhibition of retrieval. These hypotheses involve: i) attending to other stimuli as a form of diversionary attention, ii) inhibiting the specific individual neural representation of the memory, and iii) inhibiting the hippocampus and retrieval process more generally to prevent reactivation of the representation. I then analyze literature taken from the White Bear Suppression, Directed Forgetting and Think/No-Think tasks to provide evidence for these hypotheses. Finally, a neuroanatomical model is developed to indicate three pathways from PFC to the hippocampal complex that support inhibition of memory retrieval. Describing these neural pathways increases our understanding of control over memory in general. PMID:22374224
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines
NASA Technical Reports Server (NTRS)
Biswas, Rupak; Gaeke, Brian R.; Husbands, Parry; Li, Xiaoye S.; Oliker, Leonid; Yelick, Katherine A.; Biegel, Bryan (Technical Monitor)
2002-01-01
The increasing gap between processor and memory performance has lead to new architectural models for memory-intensive applications. In this paper, we explore the performance of a set of memory-intensive benchmarks and use them to compare the performance of conventional cache-based microprocessors to a mixed logic and DRAM processor called VIRAM. The benchmarks are based on problem statements, rather than specific implementations, and in each case we explore the fundamental hardware requirements of the problem, as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. The benchmarks are characterized by their memory access patterns, their basic control structures, and the ratio of computation to memory operation.
Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun
2015-08-10
With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent.
Multiple Memory Stores and Operant Conditioning: A Rationale for Memory's Complexity
ERIC Educational Resources Information Center
Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu
2009-01-01
Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory…
DOE Office of Scientific and Technical Information (OSTI.GOV)
Arumugam, Kamesh
Efficient parallel implementations of scientific applications on multi-core CPUs with accelerators such as GPUs and Xeon Phis is challenging. This requires - exploiting the data parallel architecture of the accelerator along with the vector pipelines of modern x86 CPU architectures, load balancing, and efficient memory transfer between different devices. It is relatively easy to meet these requirements for highly structured scientific applications. In contrast, a number of scientific and engineering applications are unstructured. Getting performance on accelerators for these applications is extremely challenging because many of these applications employ irregular algorithms which exhibit data-dependent control-ow and irregular memory accesses. Furthermore,more » these applications are often iterative with dependency between steps, and thus making it hard to parallelize across steps. As a result, parallelism in these applications is often limited to a single step. Numerical simulation of charged particles beam dynamics is one such application where the distribution of work and memory access pattern at each time step is irregular. Applications with these properties tend to present significant branch and memory divergence, load imbalance between different processor cores, and poor compute and memory utilization. Prior research on parallelizing such irregular applications have been focused around optimizing the irregular, data-dependent memory accesses and control-ow during a single step of the application independent of the other steps, with the assumption that these patterns are completely unpredictable. We observed that the structure of computation leading to control-ow divergence and irregular memory accesses in one step is similar to that in the next step. It is possible to predict this structure in the current step by observing the computation structure of previous steps. In this dissertation, we present novel machine learning based optimization techniques to address the parallel implementation challenges of such irregular applications on different HPC architectures. In particular, we use supervised learning to predict the computation structure and use it to address the control-ow and memory access irregularities in the parallel implementation of such applications on GPUs, Xeon Phis, and heterogeneous architectures composed of multi-core CPUs with GPUs or Xeon Phis. We use numerical simulation of charged particles beam dynamics simulation as a motivating example throughout the dissertation to present our new approach, though they should be equally applicable to a wide range of irregular applications. The machine learning approach presented here use predictive analytics and forecasting techniques to adaptively model and track the irregular memory access pattern at each time step of the simulation to anticipate the future memory access pattern. Access pattern forecasts can then be used to formulate optimization decisions during application execution which improves the performance of the application at a future time step based on the observations from earlier time steps. In heterogeneous architectures, forecasts can also be used to improve the memory performance and resource utilization of all the processing units to deliver a good aggregate performance. We used these optimization techniques and anticipation strategy to design a cache-aware, memory efficient parallel algorithm to address the irregularities in the parallel implementation of charged particles beam dynamics simulation on different HPC architectures. Experimental result using a diverse mix of HPC architectures shows that our approach in using anticipation strategy is effective in maximizing data reuse, ensuring workload balance, minimizing branch and memory divergence, and in improving resource utilization.« less
How Distinctive Processing Enhances Hits and Reduces False Alarms
Hunt, R. Reed; Smith, Rebekah E.
2015-01-01
Distinctive processing is a concept designed to account for precision in memory, both correct responses and avoidance of errors. The principal question addressed in two experiments is how distinctive processing of studied material reduces false alarms to familiar distractors. Jacoby (Jacoby, Kelley, & McElree, 1999) has used the metaphors early selection and late correction to describe two different types of control processes. Early selection refers to limitations on access whereas late correction describes controlled monitoring of accessed information. The two types of processes are not mutually exclusive, and previous research has provided evidence for the operation of both. The data reported here extend previous work to a criterial recollection paradigm and to a recognition memory test. The results of both experiments show that variables that reduce false memory for highly familiar distracters continue to exert their effect under conditions of minimal post-access monitoring. Level of monitoring was reduced in the first experiment through test instructions and in the second experiment through speeded test responding. The results were consistent with the conclusion that both early selection and late correction operate to control accuracy in memory. PMID:26034343
Temporal information processing in short- and long-term memory of patients with schizophrenia.
Landgraf, Steffen; Steingen, Joerg; Eppert, Yvonne; Niedermeyer, Ulrich; van der Meer, Elke; Krueger, Frank
2011-01-01
Cognitive deficits of patients with schizophrenia have been largely recognized as core symptoms of the disorder. One neglected factor that contributes to these deficits is the comprehension of time. In the present study, we assessed temporal information processing and manipulation from short- and long-term memory in 34 patients with chronic schizophrenia and 34 matched healthy controls. On the short-term memory temporal-order reconstruction task, an incidental or intentional learning strategy was deployed. Patients showed worse overall performance than healthy controls. The intentional learning strategy led to dissociable performance improvement in both groups. Whereas healthy controls improved on a performance measure (serial organization), patients improved on an error measure (inappropriate semantic clustering) when using the intentional instead of the incidental learning strategy. On the long-term memory script-generation task, routine and non-routine events of everyday activities (e.g., buying groceries) had to be generated in either chronological or inverted temporal order. Patients were slower than controls at generating events in the chronological routine condition only. They also committed more sequencing and boundary errors in the inverted conditions. The number of irrelevant events was higher in patients in the chronological, non-routine condition. These results suggest that patients with schizophrenia imprecisely access temporal information from short- and long-term memory. In short-term memory, processing of temporal information led to a reduction in errors rather than, as was the case in healthy controls, to an improvement in temporal-order recall. When accessing temporal information from long-term memory, patients were slower and committed more sequencing, boundary, and intrusion errors. Together, these results suggest that time information can be accessed and processed only imprecisely by patients who provide evidence for impaired time comprehension. This could contribute to symptomatic cognitive deficits and strategic inefficiency in schizophrenia.
Integrated, nonvolatile, high-speed analog random access memory
NASA Technical Reports Server (NTRS)
Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)
1994-01-01
This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.
Graziano, Martin; Sigman, Mariano
2008-05-23
When a stimulus is presented, its sensory trace decays rapidly, lasting for approximately 1000 ms. This brief and labile memory, referred as iconic memory, serves as a buffer before information is transferred to working memory and executive control. Here we explored the effect of different factors--geometric, spatial, and experience--with respect to the access and the maintenance of information in iconic memory and the progressive distortion of this memory. We studied performance in a partial report paradigm, a design wherein recall of only part of a stimulus array is required. Subjects had to report the identity of a letter in a location that was cued in a variable delay after the stimulus onset. Performance decayed exponentially with time, and we studied the different parameters (time constant, zero-delay value, and decay amplitude) as a function of the different factors. We observed that experience (determined by letter frequency) affected the access to iconic memory but not the temporal decay constant. On the contrary, spatial position affected the temporal course of delay. The entropy of the error distribution increased with time reflecting a progressive morphological distortion of the iconic buffer. We discuss our results on the context of a model of information access to executive control and how it is affected by learning and attention.
Virtual memory support for distributed computing environments using a shared data object model
NASA Astrophysics Data System (ADS)
Huang, F.; Bacon, J.; Mapp, G.
1995-12-01
Conventional storage management systems provide one interface for accessing memory segments and another for accessing secondary storage objects. This hinders application programming and affects overall system performance due to mandatory data copying and user/kernel boundary crossings, which in the microkernel case may involve context switches. Memory-mapping techniques may be used to provide programmers with a unified view of the storage system. This paper extends such techniques to support a shared data object model for distributed computing environments in which good support for coherence and synchronization is essential. The approach is based on a microkernel, typed memory objects, and integrated coherence control. A microkernel architecture is used to support multiple coherence protocols and the addition of new protocols. Memory objects are typed and applications can choose the most suitable protocols for different types of object to avoid protocol mismatch. Low-level coherence control is integrated with high-level concurrency control so that the number of messages required to maintain memory coherence is reduced and system-wide synchronization is realized without severely impacting the system performance. These features together contribute a novel approach to the support for flexible coherence under application control.
SODR Memory Control Buffer Control ASIC
NASA Technical Reports Server (NTRS)
Hodson, Robert F.
1994-01-01
The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.
NASA Technical Reports Server (NTRS)
Mejzak, R. S.
1980-01-01
The distributed processing concept is defined in terms of control primitives, variables, and structures and their use in performing a decomposed discrete Fourier transform (DET) application function. The design assumes interprocessor communications to be anonymous. In this scheme, all processors can access an entire common database by employing control primitives. Access to selected areas within the common database is random, enforced by a hardware lock, and determined by task and subtask pointers. This enables the number of processors to be varied in the configuration without any modifications to the control structure. Decompositional elements of the DFT application function in terms of tasks and subtasks are also described. The experimental hardware configuration consists of IMSAI 8080 chassis which are independent, 8 bit microcomputer units. These chassis are linked together to form a multiple processing system by means of a shared memory facility. This facility consists of hardware which provides a bus structure to enable up to six microcomputers to be interconnected. It provides polling and arbitration logic so that only one processor has access to shared memory at any one time.
Retrieval of memories with the help of music in Alzheimer's disease.
Chevreau, Priscilia; Nizard, Ingrid; Allain, Philippe
2017-09-01
This study focuses on music as a mediator facilitating access to autobiographical memory in Alzheimer's disease (AD). Studies on this topic are rare, but available data have shown a beneficial effect of music on autobiographical performance in AD patients. Based on the "index word" method, we developed the "index music" method for the evaluation of autobiographical memory. The subjects had to tell a memory of their choice from the words or music presented to them. The task was proposed to 54 patients with diagnosis of AD according to DSM IV and NINCDS-ADRDA criteria. All of them had a significant cognitive decline on the MMSE (mean score: 14.5). Patients were matched by age, sex and level of education with 48 control subjects without cognitive impairment (mean score on the MMSE: 28). Results showed that autobiographical memory quantity scores of AD patients were significantly lower than those of healthy control in both methods. However, autobiographical memory quality scores of AD patients increased with "index music" whereas autobiographical memory quality scores of healthy control decreased. Also, the autobiographical performance of patients with AD in condition index music was not correlated with cognitive performance in contrast to the autobiographical performances in index word. These results confirm that music improves access to personal memories in patients with AD. Personal memories could be preserved in patients with AD and music could constitute an interesting way to stimulate recollection.
Improving the effectiveness of an interruption lag by inducing a memory-based strategy.
Morgan, Phillip L; Patrick, John; Tiley, Leyanne
2013-01-01
The memory for goals model (Altmann & Trafton, 2002) posits the importance of a short delay (the 'interruption lag') before an interrupting task to encode suspended goals for retrieval post-interruption. Two experiments used the theory of soft constraints (Gray, Simms, Fu & Schoelles, 2006) to investigate whether the efficacy of an interruption lag could be improved by increasing goal-state access cost to induce a more memory-based encoding strategy. Both experiments used a copying task with three access cost conditions (Low, Medium, and High) and a 5-s interruption lag with a no lag control condition. Experiment 1 found that the participants in the High access cost condition resumed more interrupted trials and executed more actions correctly from memory when coupled with an interruption lag. Experiment 2 used a prospective memory test post-interruption and an eyetracker recorded gaze activity during the interruption lag. The participants in the High access cost condition with an interruption lag were best at encoding target information during the interruption lag, evidenced by higher scores on the prospective memory measure and more gaze activity on the goal-state during the interruption lag. Theoretical and practical issues regarding the use of goal-state access cost and an interruption lag are discussed. Copyright © 2012. Published by Elsevier B.V.
System for loading executable code into volatile memory in a downhole tool
Hall, David R.; Bartholomew, David B.; Johnson, Monte L.
2007-09-25
A system for loading an executable code into volatile memory in a downhole tool string component comprises a surface control unit comprising executable code. An integrated downhole network comprises data transmission elements in communication with the surface control unit and the volatile memory. The executable code, stored in the surface control unit, is not permanently stored in the downhole tool string component. In a preferred embodiment of the present invention, the downhole tool string component comprises boot memory. In another embodiment, the executable code is an operating system executable code. Preferably, the volatile memory comprises random access memory (RAM). A method for loading executable code to volatile memory in a downhole tool string component comprises sending the code from the surface control unit to a processor in the downhole tool string component over the network. A central processing unit writes the executable code in the volatile memory.
Atomic memory access hardware implementations
Ahn, Jung Ho; Erez, Mattan; Dally, William J
2015-02-17
Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.
Implementing a bubble memory hierarchy system
NASA Technical Reports Server (NTRS)
Segura, R.; Nichols, C. D.
1979-01-01
This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.
An Integrated Model of Cognitive Control in Task Switching
ERIC Educational Resources Information Center
Altmann, Erik M.; Gray, Wayne D.
2008-01-01
A model of cognitive control in task switching is developed in which controlled performance depends on the system maintaining access to a code in episodic memory representing the most recently cued task. The main constraint on access to the current task code is proactive interference from old task codes. This interference and the mechanisms that…
Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft
NASA Technical Reports Server (NTRS)
Barry, R. C.
1980-01-01
Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.
Jacob, Jane; Jacobs, Christianne; Silvanto, Juha
2015-01-01
What is the role of top-down attentional modulation in consciously accessing working memory (WM) content? In influential WM models, information can exist in different states, determined by allocation of attention; placing the original memory representation in the center of focused attention gives rise to conscious access. Here we discuss various lines of evidence indicating that such attentional modulation is not sufficient for memory content to be phenomenally experienced. We propose that, in addition to attentional modulation of the memory representation, another type of top-down modulation is required: suppression of all incoming visual information, via inhibition of early visual cortex. In this view, there are three distinct memory levels, as a function of the top-down control associated with them: (1) Nonattended, nonconscious associated with no attentional modulation; (2) attended, phenomenally nonconscious memory, associated with attentional enhancement of the actual memory trace; (3) attended, phenomenally conscious memory content, associated with enhancement of the memory trace and top-down suppression of all incoming visual input.
Magnetic vortex racetrack memory
NASA Astrophysics Data System (ADS)
Geng, Liwei D.; Jin, Yongmei M.
2017-02-01
We report a new type of racetrack memory based on current-controlled movement of magnetic vortices in magnetic nanowires with rectangular cross-section and weak perpendicular anisotropy. Data are stored through the core polarity of vortices and each vortex carries a data bit. Besides high density, non-volatility, fast data access, and low power as offered by domain wall racetrack memory, magnetic vortex racetrack memory has additional advantages of no need for constrictions to define data bits, changeable information density, adjustable current magnitude for data propagation, and versatile means of ultrafast vortex core switching. By using micromagnetic simulations, current-controlled motion of magnetic vortices in cobalt nanowire is demonstrated for racetrack memory applications.
Contexts and Control Operations Used in Accessing List-Specific, Generalized, and Semantic Memories
ERIC Educational Resources Information Center
Humphreys, Michael S.; Murray, Krista L.; Maguire, Angela M.
2009-01-01
The human ability to focus memory retrieval operations on a particular list, episode or memory structure has not been fully appreciated or documented. In Experiment 1-3, we make it increasingly difficult for participants to switch between a less recent list (multiple study opportunities), and a more recent list (single study opportunity). Task…
Optimized collectives using a DMA on a parallel computer
Chen, Dong [Croton On Hudson, NY; Gabor, Dozsa [Ardsley, NY; Giampapa, Mark E [Irvington, NY; Heidelberger,; Phillip, [Cortlandt Manor, NY
2011-02-08
Optimizing collective operations using direct memory access controller on a parallel computer, in one aspect, may comprise establishing a byte counter associated with a direct memory access controller for each submessage in a message. The byte counter includes at least a base address of memory and a byte count associated with a submessage. A byte counter associated with a submessage is monitored to determine whether at least a block of data of the submessage has been received. The block of data has a predetermined size, for example, a number of bytes. The block is processed when the block has been fully received, for example, when the byte count indicates all bytes of the block have been received. The monitoring and processing may continue for all blocks in all submessages in the message.
Microcontroller for automation application
NASA Technical Reports Server (NTRS)
Cooper, H. W.
1975-01-01
The description of a microcontroller currently being developed for automation application was given. It is basically an 8-bit microcomputer with a 40K byte random access memory/read only memory, and can control a maximum of 12 devices through standard 15-line interface ports.
Kirk, Marie; Berntsen, Dorthe
2018-02-01
Older adults diagnosed with Alzheimer's disease (AD) have difficulties accessing autobiographical memories. However, this deficit tends to spare memories dated to earlier parts of their lives, and may partially reflect retrieval deficits rather than complete memory loss. Introducing a novel paradigm, the present study examines whether autobiographical memory recall can be improved in AD by manipulating the sensory richness, concreteness and cultural dating of the memory cues. Specifically, we examine whether concrete everyday objects historically dated to the participants' youth (e.g., a skipping rope), relative to verbal cues (i.e., the verbal signifiers for the objects) facilitate access to autobiographical memories. The study includes 49 AD patients, and 50 healthy, older matched control participants, all tested on word versus object-cued recall. Both groups recalled significantly more memories, when cued by objects relative to words, but the advantage was significantly larger in the AD group. In both groups, memory descriptions were longer and significantly more episodic in nature in response to object-cued recall. Together these findings suggest that the multimodal nature of the object cues (i.e. vision, olfaction, audition, somatic sensation) along with specific cue characteristics, such as time reference, texture, shape, may constrain the retrieval search, potentially minimizing executive function demands, and hence strategic processing requirements, thus easing access to autobiographical memories in AD. Copyright © 2017 Elsevier Ltd. All rights reserved.
Integrating Software Modules For Robot Control
NASA Technical Reports Server (NTRS)
Volpe, Richard A.; Khosla, Pradeep; Stewart, David B.
1993-01-01
Reconfigurable, sensor-based control system uses state variables in systematic integration of reusable control modules. Designed for open-architecture hardware including many general-purpose microprocessors, each having own local memory plus access to global shared memory. Implemented in software as extension of Chimera II real-time operating system. Provides transparent computing mechanism for intertask communication between control modules and generic process-module architecture for multiprocessor realtime computation. Used to control robot arm. Proves useful in variety of other control and robotic applications.
Interference control in working memory: comparing groups of children with atypical development.
Palladino, Paola; Ferrari, Marcella
2013-01-01
The study aimed to test whether working memory deficits in children at risk of Learning Disabilities (LD) and/or attention deficit/hyperactivity disorder (ADHD) can be attributed to deficits in interference control, thereby implicating prefrontal systems. Two groups of children known for showing poor working memory (i.e., children with poor comprehension and children with ADHD) were compared to a group of children with specific reading decoding problems (i.e., having severe problems in phonological rather than working memory) and to a control group. All children were tested with a verbal working memory task. Interference control of irrelevant items was examined by a lexical decision task presented immediately after the final recall in about half the trials, selected at random. The interference control measure was therefore directly related to working memory performance. Results confirmed deficient working memory performance in poor comprehenders and children at risk of ADHD + LD. More interestingly, this working memory deficit was associated with greater activation of irrelevant information than in the control group. Poor decoders showed more efficient interference control, in contrast to poor comprehenders and ADHD + LD children. These results indicated that interfering items were still highly accessible to working memory in children who fail the working memory task. In turn, these findings strengthen and clarify the role of interference control, one of the most critical prefrontal functions, in working memory.
New uses of hypnosis in the treatment of posttraumatic stress disorder.
Spiegel, D; Cardena, E
1990-10-01
Hypnosis is associated with the treatment of posttraumatic stress disorder (PTSD) for two reasons: (1) the similarity between hypnotic phenomena and the symptoms of PTSD, and (2) the utility of hypnosis as a tool in treatment. Physical trauma produces a sudden discontinuity in cognitive and emotional experience that often persists after the trauma is over. This results in symptoms such as psychogenic amnesia, intrusive reliving of the event as if it were recurring, numbing of responsiveness, and hypersensitivity to stimuli. Two studies have shown that Vietnam veterans with PTSD have higher than normal hypnotizability scores on standardized tests. Likewise, a history of physical abuse in childhood has been shown to be strongly associated with dissociative symptoms later in life. Furthermore, dissociative symptoms during and soon after traumatic experience predict later PTSD. Formal hypnotic procedures are especially helpful because this population is highly hypnotizable. Hypnosis provides controlled access to memories that may otherwise be kept out of consciousness. New uses of hypnosis in the psychotherapy of PTSD victims involve coupling access to the dissociated traumatic memories with positive restructuring of those memories. Hypnosis can be used to help patients face and bear a traumatic experience by embedding it in a new context, acknowledging helplessness during the event, and yet linking that experience with remoralizing memories such as efforts at self-protection, shared affection with friends who were killed, or the ability to control the environment at other times. In this way, hypnosis can be used to provide controlled access to memories that are then placed into a broader perspective. Patients can be taught self-hypnosis techniques that allow them to work through traumatic memories and thereby reduce spontaneous unbidden intrusive recollections.
Gagnepain, Pierre; Fauvel, Baptiste; Desgranges, Béatrice; Gaubert, Malo; Viader, Fausto; Eustache, Francis; Groussard, Mathilde; Platel, Hervé
2017-01-01
The hippocampus has classically been associated with episodic memory, but is sometimes also recruited during semantic memory tasks, especially for the skilled exploration of familiar information. Cognitive control mechanisms guiding semantic memory search may benefit from the set of cognitive processes at stake during musical training. Here, we examined using functional magnetic resonance imaging, whether musical expertise would promote the top–down control of the left inferior frontal gyrus (LIFG) over the generation of hippocampally based goal-directed thoughts mediating the familiarity judgment of proverbs and musical items. Analyses of behavioral data confirmed that musical experts more efficiently access familiar melodies than non-musicians although such increased ability did not transfer to verbal semantic memory. At the brain level, musical expertise specifically enhanced the recruitment of the hippocampus during semantic access to melodies, but not proverbs. Additionally, hippocampal activation contributed to speed of access to familiar melodies, but only in musicians. Critically, causal modeling of neural dynamics between LIFG and the hippocampus further showed that top–down excitatory regulation over the hippocampus during familiarity decision specifically increases with musical expertise – an effect that generalized across melodies and proverbs. At the local level, our data show that musical expertise modulates the online recruitment of hippocampal response to serve semantic memory retrieval of familiar melodies. The reconfiguration of memory network dynamics following musical training could constitute a promising framework to understand its ability to preserve brain functions. PMID:29033805
Multiple-User, Multitasking, Virtual-Memory Computer System
NASA Technical Reports Server (NTRS)
Generazio, Edward R.; Roth, Don J.; Stang, David B.
1993-01-01
Computer system designed and programmed to serve multiple users in research laboratory. Provides for computer control and monitoring of laboratory instruments, acquisition and anlaysis of data from those instruments, and interaction with users via remote terminals. System provides fast access to shared central processing units and associated large (from megabytes to gigabytes) memories. Underlying concept of system also applicable to monitoring and control of industrial processes.
Positive Affect Modulates Flexibility and Evaluative Control
ERIC Educational Resources Information Center
van Wouwe, Nelleke C.; Band, Guido P. H.; Ridderinkhof, K. Richard
2011-01-01
The ability to interact with a constantly changing environment requires a balance between maintaining the currently relevant working memory content and being sensitive to potentially relevant new information that should be given priority access to working memory. Mesocortical dopamine projections to frontal brain areas modulate working memory…
Blank, Hartmut
2005-02-01
Traditionally, the causes of interference phenomena were sought in "real" or "hard" memory processes such as unlearning, response competition, or inhibition, which serve to reduce the accessibility of target items. I propose an alternative approach which does not deny the influence of such processes but highlights a second, equally important, source of interference-the conversion (Tulving, 1983) of accessible memory information into memory performance. Conversion is conceived as a problem-solving-like activity in which the rememberer tries to find solutions to a memory task. Conversion-based interference effects are traced to different conversion processes in the experimental and control conditions of interference designs. I present a simple theoretical model that quantitatively predicts the resulting amount of interference. In two paired-associate learning experiments using two different types of memory tests, these predictions were corroborated. Relations of the present approach to traditional accounts of interference phenomena and implications for eyewitness testimony are discussed.
NASA Astrophysics Data System (ADS)
Lee, Jong-Sun; Kim, Dong-Won; Kim, Hea-Jee; Jin, Soo-Min; Song, Myung-Jin; Kwon, Ki-Hyun; Park, Jea-Gun; Jalalah, Mohammed; Al-Hajry, Ali
2018-01-01
The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.
Context controls access to working and reference memory in the pigeon (Columba livia).
Roberts, William A; Macpherson, Krista; Strang, Caroline
2016-01-01
The interaction between working and reference memory systems was examined under conditions in which salient contextual cues were presented during memory retrieval. Ambient colored lights (red or green) bathed the operant chamber during the presentation of comparison stimuli in delayed matching-to-sample training (working memory) and during the presentation of the comparison stimuli as S+ and S- cues in discrimination training (reference memory). Strong competition between memory systems appeared when the same contextual cue appeared during working and reference memory training. When different contextual cues were used, however, working memory was completely protected from reference memory interference. © 2016 Society for the Experimental Analysis of Behavior.
Aasvik, Julie K; Woodhouse, Astrid; Stiles, Tore C; Jacobsen, Henrik B; Landmark, Tormod; Glette, Mari; Borchgrevink, Petter C; Landrø, Nils I
2016-01-01
Introduction: The current study examined if adaptive working memory training (Cogmed QM) has the potential to improve inhibitory control, working memory capacity, and perceptions of memory functioning in a group of patients currently on sick leave due to symptoms of pain, insomnia, fatigue, depression and anxiety. Participants who were referred to a vocational rehabilitation center volunteered to take part in the study. Methods: Participants were randomly assigned to either a training condition ( N = 25) or a control condition ( N = 29). Participants in the training condition received working memory training in addition to the clinical intervention offered as part of the rehabilitation program, while participants in the control condition received treatment as usual i.e., the rehabilitation program only. Inhibitory control was measured by The Stop Signal Task, working memory was assessed by the Spatial Working Memory Test, while perceptions of memory functioning were assessed by The Everyday Memory Questionnaire-Revised. Results: Participants in the training group showed a significant improvement on the post-tests of inhibitory control when compared with the comparison group ( p = 0.025). The groups did not differ on the post-tests of working memory. Both groups reported less memory problems at post-testing, but there was no sizeable difference between the two groups. Conclusions: Results indicate that working memory training does not improve general working memory capacity per se . Nor does it seem to give any added effects in terms of targeting and improving self-perceived memory functioning. Results do, however, provide evidence to suggest that inhibitory control is accessible and susceptible to modification by adaptive working memory training.
Operating systems. [of computers
NASA Technical Reports Server (NTRS)
Denning, P. J.; Brown, R. L.
1984-01-01
A counter operating system creates a hierarchy of levels of abstraction, so that at a given level all details concerning lower levels can be ignored. This hierarchical structure separates functions according to their complexity, characteristic time scale, and level of abstraction. The lowest levels include the system's hardware; concepts associated explicitly with the coordination of multiple tasks appear at intermediate levels, which conduct 'primitive processes'. Software semaphore is the mechanism controlling primitive processes that must be synchronized. At higher levels lie, in rising order, the access to the secondary storage devices of a particular machine, a 'virtual memory' scheme for managing the main and secondary memories, communication between processes by way of a mechanism called a 'pipe', access to external input and output devices, and a hierarchy of directories cataloguing the hardware and software objects to which access must be controlled.
Autobiographical memory specificity in response to verbal and pictorial cues in clinical depression.
Ridout, Nathan; Dritschel, Barbara; Matthews, Keith; O'Carroll, Ronan
2016-06-01
Depressed individuals have been consistently shown to exhibit problems in accessing specific memories of events from their past and instead tend to retrieve categorical summaries of events. The majority of studies examining autobiographical memory changes associated with psychopathology have tended to use word cues, but only one study to date has used images (with PTSD patients). to determine if using images to cue autobiographical memories would reduce the memory specificity deficit exhibited by patients with depression in comparison to healthy controls. Twenty-five clinically depressed patients and twenty-five healthy controls were assessed on two versions of the autobiographical memory test; cued with emotional words and images. Depressed patients retrieved significantly fewer specific memories, and a greater number of categorical, than did the controls. Controls retrieved a greater proportion of specific memories to images compared to words, whereas depressed patients retrieved a similar proportion of specific memories to both images and words. no information about the presence and severity of past trauma was collected. results suggest that the overgeneral memory style in depression generalises from verbal to pictorial cues. This is important because retrieval to images may provide a more ecologically valid test of everyday memory experiences than word-cued retrieval.. Copyright © 2016 Elsevier Ltd. All rights reserved.
Data General Corporation Advanced Operating System/Virtual Storage (AOS/ VS). Revision 7.60
1989-02-22
control list for each directory and data file. An access control list includes the users who can and cannot access files as well as the access...and any required data, it can -5- February 22, 1989 Final Evaluation Report Data General AOS/VS SYSTEM OVERVIEW operate asynchronously and in parallel...memory. The IOC can perform the data transfer without further interventiin from the CPU. The I/O channels interface with the processor or system
Scaling Irregular Applications through Data Aggregation and Software Multithreading
DOE Office of Scientific and Technical Information (OSTI.GOV)
Morari, Alessandro; Tumeo, Antonino; Chavarría-Miranda, Daniel
Bioinformatics, data analytics, semantic databases, knowledge discovery are emerging high performance application areas that exploit dynamic, linked data structures such as graphs, unbalanced trees or unstructured grids. These data structures usually are very large, requiring significantly more memory than available on single shared memory systems. Additionally, these data structures are difficult to partition on distributed memory systems. They also present poor spatial and temporal locality, thus generating unpredictable memory and network accesses. The Partitioned Global Address Space (PGAS) programming model seems suitable for these applications, because it allows using a shared memory abstraction across distributed-memory clusters. However, current PGAS languagesmore » and libraries are built to target regular remote data accesses and block transfers. Furthermore, they usually rely on the Single Program Multiple Data (SPMD) parallel control model, which is not well suited to the fine grained, dynamic and unbalanced parallelism of irregular applications. In this paper we present {\\bf GMT} (Global Memory and Threading library), a custom runtime library that enables efficient execution of irregular applications on commodity clusters. GMT integrates a PGAS data substrate with simple fork/join parallelism and provides automatic load balancing on a per node basis. It implements multi-level aggregation and lightweight multithreading to maximize memory and network bandwidth with fine-grained data accesses and tolerate long data access latencies. A key innovation in the GMT runtime is its thread specialization (workers, helpers and communication threads) that realize the overall functionality. We compare our approach with other PGAS models, such as UPC running using GASNet, and hand-optimized MPI code on a set of typical large-scale irregular applications, demonstrating speedups of an order of magnitude.« less
Federal Register 2010, 2011, 2012, 2013, 2014
2011-11-29
... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...
Automatic Control and Data Acquisition System for Combustion Laboratory Applications.
1982-10-01
O VPI Access~.ion FCr- 1473 2 UNCLASSIFIED Approved for public release; distribution unlimited JAutomatic Control and Data Acquisition System for...unit. The CPU/ROK board includes a 16 bit microprocessor chip which decodes and executes all in- structions, and controls all data transfers. The 12K...in the limited memory space of 32K of the HP-85 33 ACQDTA’ 1) Controls DevicesCRAIN ,2) Acquires Photodiods Output$ 3) Stores Data o Disc 1
Ohmacht, Martin
2017-08-15
In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.
Ohmacht, Martin
2014-09-09
In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.
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2011-09-07
... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...
Working Memory Delay Activity Predicts Individual Differences in Cognitive Abilities
Unsworth, Nash; Fukuda, Keisuke; Awh, Edward; Vogel, Edward K.
2015-01-01
A great deal of prior research has examined the relation between estimates of working memory and cognitive abilities. Yet, the neural mechanisms that account for these relations are still not very well understood. The current study explored whether individual differences in working memory delay activity would be a significant predictor of cognitive abilities. A large number of participants performed multiple measures of capacity, attention control, long-term memory, working memory span, and fluid intelligence, and latent variable analyses were used to examine the data. During two working memory change detection tasks, we acquired EEG data and examined the contra-lateral delay activity. The results demonstrated that the contralateral delay activity was significantly related to cognitive abilities, and importantly these relations were because of individual differences in both capacity and attention control. These results suggest that individual differences in working memory delay activity predict individual differences in a broad range of cognitive abilities, and this is because of both differences in the number of items that can be maintained and the ability to control access to working memory. PMID:25436671
Working memory delay activity predicts individual differences in cognitive abilities.
Unsworth, Nash; Fukuda, Keisuke; Awh, Edward; Vogel, Edward K
2015-05-01
A great deal of prior research has examined the relation between estimates of working memory and cognitive abilities. Yet, the neural mechanisms that account for these relations are still not very well understood. The current study explored whether individual differences in working memory delay activity would be a significant predictor of cognitive abilities. A large number of participants performed multiple measures of capacity, attention control, long-term memory, working memory span, and fluid intelligence, and latent variable analyses were used to examine the data. During two working memory change detection tasks, we acquired EEG data and examined the contralateral delay activity. The results demonstrated that the contralateral delay activity was significantly related to cognitive abilities, and importantly these relations were because of individual differences in both capacity and attention control. These results suggest that individual differences in working memory delay activity predict individual differences in a broad range of cognitive abilities, and this is because of both differences in the number of items that can be maintained and the ability to control access to working memory.
The Effect of NUMA Tunings on CPU Performance
NASA Astrophysics Data System (ADS)
Hollowell, Christopher; Caramarcu, Costin; Strecker-Kellogg, William; Wong, Antonio; Zaytsev, Alexandr
2015-12-01
Non-Uniform Memory Access (NUMA) is a memory architecture for symmetric multiprocessing (SMP) systems where each processor is directly connected to separate memory. Indirect access to other CPU's (remote) RAM is still possible, but such requests are slower as they must also pass through that memory's controlling CPU. In concert with a NUMA-aware operating system, the NUMA hardware architecture can help eliminate the memory performance reductions generally seen in SMP systems when multiple processors simultaneously attempt to access memory. The x86 CPU architecture has supported NUMA for a number of years. Modern operating systems such as Linux support NUMA-aware scheduling, where the OS attempts to schedule a process to the CPU directly attached to the majority of its RAM. In Linux, it is possible to further manually tune the NUMA subsystem using the numactl utility. With the release of Red Hat Enterprise Linux (RHEL) 6.3, the numad daemon became available in this distribution. This daemon monitors a system's NUMA topology and utilization, and automatically makes adjustments to optimize locality. As the number of cores in x86 servers continues to grow, efficient NUMA mappings of processes to CPUs/memory will become increasingly important. This paper gives a brief overview of NUMA, and discusses the effects of manual tunings and numad on the performance of the HEPSPEC06 benchmark, and ATLAS software.
Improved Writing-Conductor Designs For Magnetic Memory
NASA Technical Reports Server (NTRS)
Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.
1994-01-01
Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).
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2010-03-25
... Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of... the sale within the United States after importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain...
Federal Register 2010, 2011, 2012, 2013, 2014
2011-12-27
... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...
DOE Office of Scientific and Technical Information (OSTI.GOV)
Yang, Xiang; Lu, Yang; Lee, Jongho
2016-01-04
Tuning low resistance state is crucial for resistance random access memory (RRAM) that aims to achieve optimal read margin and design flexibility. By back-to-back stacking two nanometallic bipolar RRAMs with different thickness into a complementary structure, we have found that its low resistance can be reliably tuned over several orders of magnitude. Such high tunability originates from the exponential thickness dependence of the high resistance state of nanometallic RRAM, in which electron wave localization in a random network gives rise to the unique scaling behavior. The complementary nanometallic RRAM provides electroforming-free, multi-resistance-state, sub-100 ns switching capability with advantageous characteristics formore » memory arrays.« less
Relational Memory Is Evident in Eye Movement Behavior despite the Use of Subliminal Testing Methods.
Nickel, Allison E; Henke, Katharina; Hannula, Deborah E
2015-01-01
While it is generally agreed that perception can occur without awareness, there continues to be debate about the type of representational content that is accessible when awareness is minimized or eliminated. Most investigations that have addressed this issue evaluate access to well-learned representations. Far fewer studies have evaluated whether or not associations encountered just once prior to testing might also be accessed and influence behavior. Here, eye movements were used to examine whether or not memory for studied relationships is evident following the presentation of subliminal cues. Participants assigned to experimental or control groups studied scene-face pairs and test trials evaluated implicit and explicit memory for these pairs. Each test trial began with a subliminal scene cue, followed by three visible studied faces. For experimental group participants, one face was the studied associate of the scene (implicit test); for controls none were a match. Subsequently, the display containing a match was presented to both groups, but now it was preceded by a visible scene cue (explicit test). Eye movements were recorded and recognition memory responses were made. Participants in the experimental group looked disproportionately at matching faces on implicit test trials and participants from both groups looked disproportionately at matching faces on explicit test trials, even when that face had not been successfully identified as the associate. Critically, implicit memory-based viewing effects seemed not to depend on residual awareness of subliminal scene cues, as subjective and objective measures indicated that scenes were successfully masked from view. The reported outcomes indicate that memory for studied relationships can be expressed in eye movement behavior without awareness.
Relational Memory Is Evident in Eye Movement Behavior despite the Use of Subliminal Testing Methods
Nickel, Allison E.; Henke, Katharina; Hannula, Deborah E.
2015-01-01
While it is generally agreed that perception can occur without awareness, there continues to be debate about the type of representational content that is accessible when awareness is minimized or eliminated. Most investigations that have addressed this issue evaluate access to well-learned representations. Far fewer studies have evaluated whether or not associations encountered just once prior to testing might also be accessed and influence behavior. Here, eye movements were used to examine whether or not memory for studied relationships is evident following the presentation of subliminal cues. Participants assigned to experimental or control groups studied scene-face pairs and test trials evaluated implicit and explicit memory for these pairs. Each test trial began with a subliminal scene cue, followed by three visible studied faces. For experimental group participants, one face was the studied associate of the scene (implicit test); for controls none were a match. Subsequently, the display containing a match was presented to both groups, but now it was preceded by a visible scene cue (explicit test). Eye movements were recorded and recognition memory responses were made. Participants in the experimental group looked disproportionately at matching faces on implicit test trials and participants from both groups looked disproportionately at matching faces on explicit test trials, even when that face had not been successfully identified as the associate. Critically, implicit memory-based viewing effects seemed not to depend on residual awareness of subliminal scene cues, as subjective and objective measures indicated that scenes were successfully masked from view. The reported outcomes indicate that memory for studied relationships can be expressed in eye movement behavior without awareness. PMID:26512726
Kinetic Inductance Memory Cell and Architecture for Superconducting Computers
NASA Astrophysics Data System (ADS)
Chen, George J.
Josephson memory devices typically use a superconducting loop containing one or more Josephson junctions to store information. The magnetic inductance of the loop in conjunction with the Josephson junctions provides multiple states to store data. This thesis shows that replacing the magnetic inductor in a memory cell with a kinetic inductor can lead to a smaller cell size. However, magnetic control of the cells is lost. Thus, a current-injection based architecture for a memory array has been designed to work around this problem. The isolation between memory cells that magnetic control provides is provided through resistors in this new architecture. However, these resistors allow leakage current to flow which ultimately limits the size of the array due to power considerations. A kinetic inductance memory array will be limited to 4K bits with a read access time of 320 ps for a 1 um linewidth technology. If a power decoder could be developed, the memory architecture could serve as the blueprint for a fast (<1 ns), large scale (>1 Mbit) superconducting memory array.
Federal Register 2010, 2011, 2012, 2013, 2014
2010-07-28
... Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a... importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain claims of U.S. Patent Nos. 5,480,051; 5,422,309; 5...
Reduced Specificity of Autobiographical Memory and Depression: The Role of Executive Control
ERIC Educational Resources Information Center
Dalgleish, Tim; Golden, Ann-Marie J.; Barrett, Lisa Feldman; Au Yeung, Cecilia; Murphy, Victoria; Tchanturia, Kate; Williams, J. Mark G.; Perkins, Nicola; Barnard, Phillip J.; Elward, Rachael; Watkins, Edward
2007-01-01
It has been widely established that depressed mood states and clinical depression, as well as a range of other psychiatric disorders, are associated with a relative difficulty in accessing specific autobiographical information in response to emotion-related cue words on an Autobiographical Memory Test (AMT; J. M. G. Williams & K. Broadbent, 1986).…
Recoding between Two Types of STM Representation Revealed by the Dynamics of Memory Search
ERIC Educational Resources Information Center
Leszczynski, Marcin; Myers, Nicholas E.; Akyurek, Elkan G.; Schubo, Anna
2012-01-01
Visual STM (VSTM) is thought to be related to visual attention in several ways. Attention controls access to VSTM during memory encoding and plays a role in the maintenance of stored information by strengthening memorized content. We investigated the involvement of visual attention in recall from VSTM. In two experiments, we measured…
Neural mechanisms of motivated forgetting
Anderson, Michael C.; Hanslmayr, Simon
2014-01-01
Not all memories are equally welcome in awareness. People limit the time they spend thinking about unpleasant experiences, a process that begins during encoding, but that continues when cues later remind someone of the memory. Here, we review the emerging behavioural and neuroimaging evidence that suppressing awareness of an unwelcome memory, at encoding or retrieval, is achieved by inhibitory control processes mediated by the lateral prefrontal cortex. These mechanisms interact with neural structures that represent experiences in memory, disrupting traces that support retention. Thus, mechanisms engaged to regulate momentary awareness introduce lasting biases in which experiences remain accessible. We argue that theories of forgetting that neglect the motivated control of awareness omit a powerful force shaping the retention of our past. PMID:24747000
Guillery-Girard, B; Quinette, P; Desgranges, B; Piolino, P; Viader, F; de la Sayette, V; Eustache, F
2006-11-01
Several studies noted persistence of memory impairment following an episode of transient global amnesia (TGA) with standard tests. To specify long-term memory impairments in a group of patients selected with stringent criteria. Both retrograde and anterograde memory were investigated in 32 patients 13-67 months after a TGA episode with original tasks encompassing retrograde semantic memory (academic, public and personal knowledge), retrograde episodic memory (autobiographical events) and anterograde episodic memory. Patients had preserved academic and public knowledge. Pathological scores were obtained in personal verbal fluency for the two most recent periods, and patients produced less autobiographical events than controls. However, when they were provided time to detail, memories were as episodic as in controls regardless of their remoteness. Anterograde episodic tasks revealed a mild but significant impairment of the capacity of re-living the condition of encoding, i.e. the moment at which words were presented. Patients who have suffered from an episode of TGA manifest deficits of memory focused on the retrieval of both recent semantic information and episodic memories and especially the capacity of re-living. These deficits may not result from a deterioration of memory per se but rather from difficulties in accessing memories.
Overview of emerging nonvolatile memory technologies
2014-01-01
Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820
Overview of emerging nonvolatile memory technologies.
Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen
2014-01-01
Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.
Enhancement of Speed Margins for 16× Digital Versatile Disc-Random Access Memory
NASA Astrophysics Data System (ADS)
Watanabe, Koichi; Minemura, Hiroyuki; Miyamoto, Makoto; Iimura, Makoto
2006-02-01
We have evaluated the speed margins of write/read 16× digital versatile disc-random access memory (DVD-RAM) test discs using write strategies for 6--16× constant angular velocity (CAV) control. Our approach is to determine the writing parameters for the middle zones by interpolating the zone numbers. Using this interpolation strategy, we successfully obtained overwrite jitter values of less than 8% and bit error rates of less than 10-5 in 6--16× DVD-RAM. Moreover, we confirmed that the speed margins were ± 20% for a 6--16× CAV.
Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory
NASA Astrophysics Data System (ADS)
Kim, Sang-Koog
2011-03-01
An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.
Noble, Emily E.; Mavanji, Vijayakumar; Little, Morgan R.; Billington, Charles J.; Kotz, Catherine M.; Wang, ChuanFeng
2014-01-01
Background Previous studies have shown that a western diet impairs, whereas physical exercise enhances hippocampus-dependent learning and memory. Both diet and exercise influence expression of hippocampal brain-derived neurotrophic factor (BDNF), which is associated with improved cognition. We hypothesized that exercise reverses diet-induced cognitive decline while increasing hippocampal BDNF. Methods To test the effects of exercise on hippocampal-dependent memory, we compared cognitive scores of Sprague-Dawley rats exercised by voluntary running wheel (RW) access or forced treadmill (TM) to sedentary (Sed) animals. Memory was tested by two-way active avoidance test (TWAA), in which animals are exposed to a brief shock in a specific chamber area. When an animal avoids, escapes or has reduced latency to do either, this is considered a measure of memory. In a second experiment, rats were fed either a high-fat diet or control diet for 16 weeks, then randomly assigned to running wheel access or sedentary condition, and TWAA memory was tested once a week for seven weeks of exercise intervention. Results Both groups of exercised animals had improved memory as indicated by reduced latency to avoid and escape shock, and increased avoid and escape episodes (p<0.05). Exposure to a high-fat diet resulted in poor performance during both the acquisition and retrieval phases of the memory test as compared to controls. Exercise reversed high-fat diet-induced memory impairment, and increased brain-derived neurotrophic factor (BDNF) in neurons of the hippocampal CA3 region. Conclusions These data suggest that exercise improves memory retrieval, particularly with respect to avoiding aversive stimuli, and may be beneficial in protecting against diet induced cognitive decline, likely via elevated BDNF in neurons of the CA3 region. PMID:24755094
Noble, Emily E; Mavanji, Vijayakumar; Little, Morgan R; Billington, Charles J; Kotz, Catherine M; Wang, ChuanFeng
2014-10-01
Previous studies have shown that a western diet impairs, whereas physical exercise enhances hippocampus-dependent learning and memory. Both diet and exercise influence expression of hippocampal brain-derived neurotrophic factor (BDNF), which is associated with improved cognition. We hypothesized that exercise reverses diet-induced cognitive decline while increasing hippocampal BDNF. To test the effects of exercise on hippocampal-dependent memory, we compared cognitive scores of Sprague-Dawley rats exercised by voluntary running wheel (RW) access or forced treadmill (TM) to sedentary (Sed) animals. Memory was tested by two-way active avoidance test (TWAA), in which animals are exposed to a brief shock in a specific chamber area. When an animal avoids, escapes or has reduced latency to do either, this is considered a measure of memory. In a second experiment, rats were fed either a high-fat diet or control diet for 16 weeks, then randomly assigned to running wheel access or sedentary condition, and TWAA memory was tested once a week for 7 weeks of exercise intervention. Both groups of exercised animals had improved memory as indicated by reduced latency to avoid and escape shock, and increased avoid and escape episodes (p<0.05). Exposure to a high-fat diet resulted in poor performance during both the acquisition and retrieval phases of the memory test as compared to controls. Exercise reversed high-fat diet-induced memory impairment, and increased brain-derived neurotrophic factor (BDNF) in neurons of the hippocampal CA3 region. These data suggest that exercise improves memory retrieval, particularly with respect to avoiding aversive stimuli, and may be beneficial in protecting against diet induced cognitive decline, likely via elevated BDNF in neurons of the CA3 region. Published by Elsevier Inc.
An enhanced Ada run-time system for real-time embedded processors
NASA Technical Reports Server (NTRS)
Sims, J. T.
1991-01-01
An enhanced Ada run-time system has been developed to support real-time embedded processor applications. The primary focus of this development effort has been on the tasking system and the memory management facilities of the run-time system. The tasking system has been extended to support efficient and precise periodic task execution as required for control applications. Event-driven task execution providing a means of task-asynchronous control and communication among Ada tasks is supported in this system. Inter-task control is even provided among tasks distributed on separate physical processors. The memory management system has been enhanced to provide object allocation and protected access support for memory shared between disjoint processors, each of which is executing a distinct Ada program.
Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen
2011-11-22
The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.
High-density magnetoresistive random access memory operating at ultralow voltage at room temperature
Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen
2011-01-01
The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527
Evaluation of Ferroelectric Materials for Memory Applications
1990-06-01
as automobile odometers, access counters, and flight time recorders. Detailed product information is provided in Appendix A. 3. Optical Read...volatility but by definition are not reprogrammable , which severely restricts flexibility and makes error correction difficult. Magnetic core is non...battery-backed SRAMs as well. The programs for embedded controllers, such as those increasingly used in automobiles , are kept in nonvolatile memory. The
DOE Office of Scientific and Technical Information (OSTI.GOV)
Castellana, Vito G.; Tumeo, Antonino; Ferrandi, Fabrizio
Emerging applications such as data mining, bioinformatics, knowledge discovery, social network analysis are irregular. They use data structures based on pointers or linked lists, such as graphs, unbalanced trees or unstructures grids, which generates unpredictable memory accesses. These data structures usually are large, but difficult to partition. These applications mostly are memory bandwidth bounded and have high synchronization intensity. However, they also have large amounts of inherent dynamic parallelism, because they potentially perform a task for each one of the element they are exploring. Several efforts are looking at accelerating these applications on hybrid architectures, which integrate general purpose processorsmore » with reconfigurable devices. Some solutions, which demonstrated significant speedups, include custom-hand tuned accelerators or even full processor architectures on the reconfigurable logic. In this paper we present an approach for the automatic synthesis of accelerators from C, targeted at irregular applications. In contrast to typical High Level Synthesis paradigms, which construct a centralized Finite State Machine, our approach generates dynamically scheduled hardware components. While parallelism exploitation in typical HLS-generated accelerators is usually bound within a single execution flow, our solution allows concurrently running multiple execution flow, thus also exploiting the coarser grain task parallelism of irregular applications. Our approach supports multiple, multi-ported and distributed memories, and atomic memory operations. Its main objective is parallelizing as many memory operations as possible, independently from their execution time, to maximize the memory bandwidth utilization. This significantly differs from current HLS flows, which usually consider a single memory port and require precise scheduling of memory operations. A key innovation of our approach is the generation of a memory interface controller, which dynamically maps concurrent memory accesses to multiple ports. We present a case study on a typical irregular kernel, Graph Breadth First search (BFS), exploring different tradeoffs in terms of parallelism and number of memories.« less
A memory module for experimental data handling
NASA Astrophysics Data System (ADS)
De Blois, J.
1985-02-01
A compact CAMAC memory module for experimental data handling was developed to eliminate the need of direct memory access in computer controlled measurements. When using autonomous controllers it also makes measurements more independent of the program and enlarges the available space for programs in the memory of the micro-computer. The memory module has three modes of operation: an increment-, a list- and a fifo mode. This is achieved by connecting the main parts, being: the memory (MEM), the fifo buffer (FIFO), the address buffer (BUF), two counters (AUX and ADDR) and a readout register (ROR), by an internal 24-bit databus. The time needed for databus operations is 1 μs, for measuring cycles as well as for CAMAC cycles. The FIFO provides temporary data storage during CAMAC cycles and separates the memory part from the application part. The memory is variable from 1 to 64K (24 bits) by using different types of memory chips. The application part, which forms 1/3 of the module, will be specially designed for each application and is added to the memory chian internal connector. The memory unit will be used in Mössbauer experiments and in thermal neutron scattering experiments.
Blocksome, Michael A.; Mamidala, Amith R.
2015-07-07
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Blocksome, Michael A.; Mamidala, Amith R.
2015-07-14
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Unsworth, Nash; Spillers, Gregory J; Brewer, Gene A
2012-01-01
In two experiments, the locus of individual differences in working memory capacity and long-term memory recall was examined. Participants performed categorical cued and free recall tasks, and individual differences in the dynamics of recall were interpreted in terms of a hierarchical-search framework. The results from this study are in accordance with recent theorizing suggesting a strong relation between working memory capacity and retrieval from long-term memory. Furthermore, the results also indicate that individual differences in categorical recall are partially due to differences in accessibility. In terms of accessibility of target information, two important factors drive the difference between high- and low-working-memory-capacity participants. Low-working-memory-capacity participants fail to utilize appropriate retrieval strategies to access cues, and they also have difficulty resolving cue overload. Thus, when low-working-memory-capacity participants were given specific cues that activated a smaller set of potential targets, their recall performance was the same as that of high-working-memory-capacity participants.
Memory availability and referential access
Johns, Clinton L.; Gordon, Peter C.; Long, Debra L.; Swaab, Tamara Y.
2013-01-01
Most theories of coreference specify linguistic factors that modulate antecedent accessibility in memory; however, whether non-linguistic factors also affect coreferential access is unknown. Here we examined the impact of a non-linguistic generation task (letter transposition) on the repeated-name penalty, a processing difficulty observed when coreferential repeated names refer to syntactically prominent (and thus more accessible) antecedents. In Experiment 1, generation improved online (event-related potentials) and offline (recognition memory) accessibility of names in word lists. In Experiment 2, we manipulated generation and syntactic prominence of antecedent names in sentences; both improved online and offline accessibility, but only syntactic prominence elicited a repeated-name penalty. Our results have three important implications: first, the form of a referential expression interacts with an antecedent’s status in the discourse model during coreference; second, availability in memory and referential accessibility are separable; and finally, theories of coreference must better integrate known properties of the human memory system. PMID:24443621
Simione, Luca; Raffone, Antonino; Wolters, Gezinus; Salmas, Paola; Nakatani, Chie; Belardinelli, Marta Olivetti; van Leeuwen, Cees
2012-10-01
Two separate lines of study have clarified the role of selectivity in conscious access to visual information. Both involve presenting multiple targets and distracters: one simultaneously in a spatially distributed fashion, the other sequentially at a single location. To understand their findings in a unified framework, we propose a neurodynamic model for Visual Selection and Awareness (ViSA). ViSA supports the view that neural representations for conscious access and visuo-spatial working memory are globally distributed and are based on recurrent interactions between perceptual and access control processors. Its flexible global workspace mechanisms enable a unitary account of a broad range of effects: It accounts for the limited storage capacity of visuo-spatial working memory, attentional cueing, and efficient selection with multi-object displays, as well as for the attentional blink and associated sparing and masking effects. In particular, the speed of consolidation for storage in visuo-spatial working memory in ViSA is not fixed but depends adaptively on the input and recurrent signaling. Slowing down of consolidation due to weak bottom-up and recurrent input as a result of brief presentation and masking leads to the attentional blink. Thus, ViSA goes beyond earlier 2-stage and neuronal global workspace accounts of conscious processing limitations. PsycINFO Database Record (c) 2012 APA, all rights reserved.
2010-07-22
dependent , providing a natural bandwidth match between compute cores and the memory subsystem. • High Bandwidth Dcnsity. Waveguides crossing the chip...simulate this memory access architecture on a 2S6-core chip with a concentrated 64-node network lIsing detailed traces of high-performance embedded...memory modulcs, wc placc memory access poi nts (MAPs) around the pcriphery of the chip connected to thc nctwork. These MAPs, shown in Figure 4, contain
Can your software engineer program your PLC?
NASA Astrophysics Data System (ADS)
Borrowman, Alastair J.; Taylor, Philip
2016-07-01
The use of Programmable Logic Controllers (PLCs) in the control of large physics experiments is ubiquitous1, 2, 3. The programming of these controllers is normally the domain of engineers with a background in electronics, this paper introduces PLC program development from the software engineer's perspective. PLC programs provide the link between control software running on PC architecture systems and physical hardware controlled and monitored by digital and analog signals. The higher-level software running on the PC is typically responsible for accepting operator input and from this deciding when and how hardware connected to the PLC is controlled. The PLC accepts demands from the PC, considers the current state of its connected hardware and if correct to do so (based upon interlocks or other constraints) adjusts its hardware output signals appropriately for the PC's demands. A published ICD (Interface Control Document) defines the PLC memory locations available to be written and read by the PC to control and monitor the hardware. Historically the method of programming PLCs has been ladder diagrams that closely resemble circuit diagrams, however, PLC manufacturers nowadays also provide, and promote, the use of higher-level programming languages4. Based on techniques used in the development of high-level PC software to control PLCs for multiple telescopes, this paper examines the development of PLC programs to operate the hardware of a medical cyclotron beamline controlled from a PC using the Experimental Physics and Industrial Control System (EPICS), which is also widely used in telescope control5, 6, 7. The PLC used is the new generation Siemens S7-1200 programmed using Siemens Pascal based Structured Control Language (SCL), which is their implementation of Structured Text (ST). The approach described is that from a software engineer's perspective, utilising Siemens Totally Integrated Automation (TIA) Portal integrated development environment (IDE) to create modular PLC programs based upon reusable functions capable of being unit tested without the PLC connected to hardware. Emphasis has been placed on designing an interface between EPICS and SCL that enforces correct operation of hardware through stringent separation of PC accessible PLC memory and hardware I/O addresses used only by the PLC. The paper also introduces the method used to automate the creation, from the same source document, the PLC memory structure (tag) definitions (defining memory used to access hardware I/O and that accessed by the PC) and creation of the PC program data structures (EPICS database records) used to access the permitted PLC addresses. From direct experience this paper demonstrates the advantages of PLC program development being shared between electronic and software engineers, to enable use of the most appropriate processes from both the perspective of the hardware and the higher-level software used to control it.
NASA Astrophysics Data System (ADS)
Choi, Shinhyun; Tan, Scott H.; Li, Zefan; Kim, Yunjo; Choi, Chanyeol; Chen, Pai-Yu; Yeon, Hanwool; Yu, Shimeng; Kim, Jeehwan
2018-01-01
Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on—formation of filaments in an amorphous medium—is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically enhanced switching uniformity and long retention/high endurance with a high analog on/off ratio. Simulations using the MNIST handwritten recognition data set prove that epitaxial random access memories can operate with an online learning accuracy of 95.1%.
Complex dynamics of semantic memory access in reading.
Baggio, Giosué; Fonseca, André
2012-02-07
Understanding a word in context relies on a cascade of perceptual and conceptual processes, starting with modality-specific input decoding, and leading to the unification of the word's meaning into a discourse model. One critical cognitive event, turning a sensory stimulus into a meaningful linguistic sign, is the access of a semantic representation from memory. Little is known about the changes that activating a word's meaning brings about in cortical dynamics. We recorded the electroencephalogram (EEG) while participants read sentences that could contain a contextually unexpected word, such as 'cold' in 'In July it is very cold outside'. We reconstructed trajectories in phase space from single-trial EEG time series, and we applied three nonlinear measures of predictability and complexity to each side of the semantic access boundary, estimated as the onset time of the N400 effect evoked by critical words. Relative to controls, unexpected words were associated with larger prediction errors preceding the onset of the N400. Accessing the meaning of such words produced a phase transition to lower entropy states, in which cortical processing becomes more predictable and more regular. Our study sheds new light on the dynamics of information flow through interfaces between sensory and memory systems during language processing.
Early-life sugar consumption has long-term negative effects on memory function in male rats.
Noble, Emily E; Hsu, Ted M; Liang, Joanna; Kanoski, Scott E
2017-09-25
Added dietary sugars contribute substantially to the diet of children and adolescents in the USA, and recent evidence suggests that consuming sugar-sweetened beverages (SSBs) during early life has deleterious effects on hippocampal-dependent memory function. Here, we test whether the effects of early-life sugar consumption on hippocampal function persist into adulthood when access to sugar is restricted to the juvenile/adolescent phase of development. Male rats were given ad libitum access to an 11% weight-by-volume sugar solution (made with high fructose corn syrup-55) throughout the adolescent phase of development (post-natal day (PN) 26-56). The control group received a second bottle of water instead, and both groups received ad libitum standard laboratory chow and water access throughout the study. At PN 56 sugar solutions were removed and at PN 175 rats were subjected to behavioral testing for hippocampal-dependent episodic contextual memory in the novel object in context (NOIC) task, for anxiety-like behavior in the Zero maze, and were given an intraperitoneal glucose tolerance test. Early-life exposure to SSBs conferred long-lasting impairments in hippocampal-dependent memory function later in life- yet had no effect on body weight, anxiety-like behavior, or glucose tolerance. A second experiment demonstrated that NOIC performance was impaired at PN 175 even when SSB access was limited to 2 hours daily from PN 26-56. Our data suggest that even modest SSB consumption throughout early life may have long-term negative consequences on memory function during adulthood.
Data storage technology comparisons
NASA Technical Reports Server (NTRS)
Katti, Romney R.
1990-01-01
The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.
ERIC Educational Resources Information Center
Oberauer, Klaus; Bialkova, Svetlana
2009-01-01
Processing information in working memory requires selective access to a subset of working-memory contents by a focus of attention. Complex cognition often requires joint access to 2 items in working memory. How does the focus select 2 items? Two experiments with an arithmetic task and 1 with a spatial task investigate time demands for successive…
Effects of Working Memory Demand on Neural Mechanisms of Motor Response Selection and Control
Barber, Anita D.; Caffo, Brian S.; Pekar, James J.; Mostofsky, Stewart H.
2013-01-01
Inhibitory control commonly recruits a number of frontal regions: pre-supplementary motor area (pre-SMA), frontal eye fields (FEFs), and right-lateralized posterior inferior frontal gyrus (IFG), dorsal anterior insula (DAI), dorsolateral prefrontal cortex (DLPFC), and inferior frontal junction (IFJ). These regions may directly implement inhibitory motor control or may be more generally involved in executive control functions. Two go/no-go tasks were used to distinguish regions specifically recruited for inhibition from those that additionally show increased activity with working memory demand. The pre-SMA and IFG were recruited for inhibition in both tasks and did not have greater activation for working memory demand on no-go trials, consistent with a role in inhibitory control. Activation in pre-SMA also responded to response selection demand and was increased with working memory on go trials specifically. The bilateral FEF and right DAI were commonly active for no-go trials. The FEF was also recruited to a greater degree with working memory demand on go trials and may bias top–down information when stimulus–response mappings change. The DAI, additionally responded to increased working memory demand on both go and no-go trials and may be involved in accessing sustained task information, alerting, or autonomic changes when cognitive demands increase. DLPFC activation was consistent with a role in working memory retrieval on both go and no-go trials. The inferior frontal junction, on the other hand, had greater activation with working memory specifically for no-go trials and may detect salient stimuli when the task requires frequent updating of working memory representations. PMID:23530923
Supporting the self-concept with memory: insight from amnesia
Verfaellie, Mieke
2015-01-01
We investigated the extent to which personal semantic memory supports the self-concept in individuals with medial temporal lobe amnesia and healthy adults. Participants completed eight ‘I Am’ self-statements. For each of the four highest ranked self-statements, participants completed an open-ended narrative task, during which they provided supporting information indicating why the I Am statement was considered self-descriptive. Participants then completed an episodic probe task, during which they attempted to retrieve six episodic memories for each of these self-statements. Supporting information was scored as episodic, personal semantic or general semantic. In the narrative task, personal semantic memory predominated as self-supporting information in both groups. The amnesic participants generated fewer personal semantic memories than controls to support their self-statements, a deficit that was more pronounced for trait relative to role self-statements. In the episodic probe task, the controls primarily generated unique event memories, but the amnesic participants did not. These findings demonstrate that personal semantic memory, in particular autobiographical fact knowledge, plays a critical role in supporting the self-concept, regardless of the accessibility of episodic memories, and they highlight potential differences in the way traits and roles are supported by personal memory. PMID:25964501
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2013-06-13
... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination Affirming a Final Initial Determination..., and the sale within the United States after importation of certain static random access memories and...
Solution-processed flexible NiO resistive random access memory device
NASA Astrophysics Data System (ADS)
Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon
2018-04-01
Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).
Programming distributed memory architectures using Kali
NASA Technical Reports Server (NTRS)
Mehrotra, Piyush; Vanrosendale, John
1990-01-01
Programming nonshared memory systems is more difficult than programming shared memory systems, in part because of the relatively low level of current programming environments for such machines. A new programming environment is presented, Kali, which provides a global name space and allows direct access to remote data values. In order to retain efficiency, Kali provides a system on annotations, allowing the user to control those aspects of the program critical to performance, such as data distribution and load balancing. The primitives and constructs provided by the language is described, and some of the issues raised in translating a Kali program for execution on distributed memory systems are also discussed.
Enhancing memory and imagination improves problem solving among individuals with depression.
McFarland, Craig P; Primosch, Mark; Maxson, Chelsey M; Stewart, Brandon T
2017-08-01
Recent work has revealed links between memory, imagination, and problem solving, and suggests that increasing access to detailed memories can lead to improved imagination and problem-solving performance. Depression is often associated with overgeneral memory and imagination, along with problem-solving deficits. In this study, we tested the hypothesis that an interview designed to elicit detailed recollections would enhance imagination and problem solving among both depressed and nondepressed participants. In a within-subjects design, participants completed a control interview or an episodic specificity induction prior to completing memory, imagination, and problem-solving tasks. Results revealed that compared to the control interview, the episodic specificity induction fostered increased detail generation in memory and imagination and more relevant steps on the problem-solving task among depressed and nondepressed participants. This study builds on previous work by demonstrating that a brief interview can enhance problem solving among individuals with depression and supports the notion that episodic memory plays a key role in problem solving. It should be noted, however, that the results of the interview are relatively short-lived.
Application-Controlled Demand Paging for Out-of-Core Visualization
NASA Technical Reports Server (NTRS)
Cox, Michael; Ellsworth, David; Kutler, Paul (Technical Monitor)
1997-01-01
In the area of scientific visualization, input data sets are often very large. In visualization of Computational Fluid Dynamics (CFD) in particular, input data sets today can surpass 100 Gbytes, and are expected to scale with the ability of supercomputers to generate them. Some visualization tools already partition large data sets into segments, and load appropriate segments as they are needed. However, this does not remove the problem for two reasons: 1) there are data sets for which even the individual segments are too large for the largest graphics workstations, 2) many practitioners do not have access to workstations with the memory capacity required to load even a segment, especially since the state-of-the-art visualization tools tend to be developed by researchers with much more powerful machines. When the size of the data that must be accessed is larger than the size of memory, some form of virtual memory is simply required. This may be by segmentation, paging, or by paged segments. In this paper we demonstrate that complete reliance on operating system virtual memory for out-of-core visualization leads to poor performance. We then describe a paged segment system that we have implemented, and explore the principles of memory management that can be employed by the application for out-of-core visualization. We show that application control over some of these can significantly improve performance. We show that sparse traversal can be exploited by loading only those data actually required. We show also that application control over data loading can be exploited by 1) loading data from alternative storage format (in particular 3-dimensional data stored in sub-cubes), 2) controlling the page size. Both of these techniques effectively reduce the total memory required by visualization at run-time. We also describe experiments we have done on remote out-of-core visualization (when pages are read by demand from remote disk) whose results are promising.
Giovannetti, Vittorio; Lloyd, Seth; Maccone, Lorenzo
2008-04-25
A random access memory (RAM) uses n bits to randomly address N=2(n) distinct memory cells. A quantum random access memory (QRAM) uses n qubits to address any quantum superposition of N memory cells. We present an architecture that exponentially reduces the requirements for a memory call: O(logN) switches need be thrown instead of the N used in conventional (classical or quantum) RAM designs. This yields a more robust QRAM algorithm, as it in general requires entanglement among exponentially less gates, and leads to an exponential decrease in the power needed for addressing. A quantum optical implementation is presented.
Enhanced dimension-specific visual working memory in grapheme–color synesthesia☆
Terhune, Devin Blair; Wudarczyk, Olga Anna; Kochuparampil, Priya; Cohen Kadosh, Roi
2013-01-01
There is emerging evidence that the encoding of visual information and the maintenance of this information in a temporarily accessible state in working memory rely on the same neural mechanisms. A consequence of this overlap is that atypical forms of perception should influence working memory. We examined this by investigating whether having grapheme–color synesthesia, a condition characterized by the involuntary experience of color photisms when reading or representing graphemes, would confer benefits on working memory. Two competing hypotheses propose that superior memory in synesthesia results from information being coded in two information channels (dual-coding) or from superior dimension-specific visual processing (enhanced processing). We discriminated between these hypotheses in three n-back experiments in which controls and synesthetes viewed inducer and non-inducer graphemes and maintained color or grapheme information in working memory. Synesthetes displayed superior color working memory than controls for both grapheme types, whereas the two groups did not differ in grapheme working memory. Further analyses excluded the possibilities of enhanced working memory among synesthetes being due to greater color discrimination, stimulus color familiarity, or bidirectionality. These results reveal enhanced dimension-specific visual working memory in this population and supply further evidence for a close relationship between sensory processing and the maintenance of sensory information in working memory. PMID:23892185
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2013-05-02
... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination To Review in Part a Final Initial... States after importation of certain static random access memories and products containing the same by...
Werner, Craig T; Milovanovic, Mike; Christian, Daniel T; Loweth, Jessica A; Wolf, Marina E
2015-12-01
The ubiquitin-proteasome system (UPS) has been implicated in the retrieval-induced destabilization of cocaine- and fear-related memories in Pavlovian paradigms. However, nothing is known about its role in memory retrieval after self-administration of cocaine, an operant paradigm, or how the length of withdrawal from cocaine may influence retrieval mechanisms. Here, we examined UPS activity after an extended-access cocaine self-administration regimen that leads to withdrawal-dependent incubation of cue-induced cocaine craving. Controls self-administered saline. In initial experiments, memory retrieval was elicited via a cue-induced seeking/retrieval test on withdrawal day (WD) 50-60, when craving has incubated. We found that retrieval of cocaine- and saline-associated memories produced similar increases in polyubiquitinated proteins in the nucleus accumbens (NAc), compared with rats that did not undergo a seeking/retrieval test. Measures of proteasome catalytic activity confirmed similar activation of the UPS after retrieval of saline and cocaine memories. However, in a subsequent experiment in which testing was conducted on WD1, proteasome activity in the NAc was greater after retrieval of cocaine memory than saline memory. Analysis of other brain regions confirmed that effects of cocaine memory retrieval on proteasome activity, relative to saline memory retrieval, depend on withdrawal time. These results, combined with prior studies, suggest that the relationship between UPS activity and memory retrieval depends on training paradigm, brain region, and time elapsed between training and retrieval. The observation that mechanisms underlying cocaine memory retrieval change depending on the age of the memory has implications for development of memory destabilization therapies for cue-induced relapse in cocaine addicts.
Low latency and persistent data storage
Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E
2014-02-18
Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
System and method for programmable bank selection for banked memory subsystems
Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan
2010-09-07
A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.
Carbon nanomaterials for non-volatile memories
NASA Astrophysics Data System (ADS)
Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric
2018-03-01
Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.
NASA Technical Reports Server (NTRS)
Denning, Peter J.
1988-01-01
Accidental overwriting of files or of memory regions belonging to other programs, browsing of personal files by superusers, Trojan horses, and viruses are examples of breakdowns in workstations and personal computers that would be significantly reduced by memory protection. Memory protection is the capability of an operating system and supporting hardware to delimit segments of memory, to control whether segments can be read from or written into, and to confine accesses of a program to its segments alone. The absence of memory protection in many operating systems today is the result of a bias toward a narrow definition of performance as maximum instruction-execution rate. A broader definition, including the time to get the job done, makes clear that cost of recovery from memory interference errors reduces expected performance. The mechanisms of memory protection are well understood, powerful, efficient, and elegant. They add to performance in the broad sense without reducing instruction execution rate.
Fernaeus, Sven-Erik; Hellström, Åke
2017-09-18
Wechsler Adult Intelligence Scale (WAIS) subscale Similarities have been classified as a test of either verbal comprehension or of inductive reasoning. The reason may be that items divide into two categories. We tested the hypothesis of heterogeneity of items in WAIS-Similarities. Consecutive patients at a memory clinic and healthy controls participated in the study. White-matter hyperintensities (WMHs) and normalized temporal lobe volumes were measured based on Magnetic resonance Imaging (MRI), and tests of verbal memory and attention were used in addition to WAIS-Similarities to collect behavioural data. Factor analysis supported the hypothesis that two factors are involved in the performance of WAIS-similarities: (1) semiautomatic lexical access and (2) conceptual elaboration. These factors were highly correlated but provided discriminative diagnostic information: In logistic regression analyses, scores of the lexical access factor and of the conceptual elaboration factor discriminated patients with mild cognitive impairment from Alzheimer's disease patients and from healthy controls, respectively. High scores of WMH, indicating periventricular white-matter lesions, predicted factor scores of direct lexical access but not those of conceptual elaboration, which were predicted only by medial and lateral temporal lobe volumes.
Taboo: Working memory and mental control in an interactive task
Hansen, Whitney A.; Goldinger, Stephen D.
2014-01-01
Individual differences in working memory (WM) predict principled variation in tasks of reasoning, response time, memory, and other abilities. Theoretically, a central function of WM is keeping task-relevant information easily accessible while suppressing irrelevant information. The present experiment was a novel study of mental control, using performance in the game Taboo as a measure. We tested effects of WM capacity on several indices, including perseveration errors (repeating previous guesses or clues) and taboo errors (saying at least part of a taboo or target word). By most measures, high-span participants were superior to low-span participants: High-spans were better at guessing answers, better at encouraging correct guesses from teammates, and less likely to either repeat themselves or produce taboo clues. Differences in taboo errors occurred only in an easy control condition. The results suggest that WM capacity predicts behavior in tasks requiring mental control, extending this finding to an interactive group setting. PMID:19827699
Word-length effect in verbal short-term memory in individuals with Down's syndrome.
Kanno, K; Ikeda, Y
2002-11-01
Many studies have indicated that individuals with Down's syndrome (DS) show a specific deficit in short-term memory for verbal information. The aim of the present study was to investigate the influence of the length of words on verbal short-term memory in individuals with DS. Twenty-eight children with DS and 10 control participants matched for memory span were tested on verbal serial recall and speech rate, which are thought to involve rehearsal and output speed. Although a significant word-length effect was observed in both groups for the recall of a larger number of items with a shorter spoken duration than for those with a longer spoken duration, the number of correct recalls in the group with DS was reduced compared to the control subjects. The results demonstrating poor short-term memory in children with DS were irrelevant to speech rate. In addition, the proportion of repetition-gained errors in serial recall was higher in children with DS than in control subjects. The present findings suggest that poor access to long-term lexical knowledge, rather than overt articulation speed, constrains verbal short-term memory functions in individuals with DS.
Chiu, Chui-De
2018-01-01
While clinical studies showed paradoxical memory phenomena, including the intrusion and amnesia of stressful experiences that are features of dissociation, the results of laboratory studies on dissociative individuals' forgetting of experimental stimuli through cognitive control varied. Some studies demonstrated ineffective inhibition, and others found that dissociative individuals could remember fewer trauma words in a divided-attention context. Dissociative individuals may utilize superior cognitive disengagement to forget the representations. This hypothesis was tested in nonclinical individuals with high, medium, and low dissociation proneness. In the study phase, the participants learned several lists of experimental words and kept updating working memory by remembering the last four items on a list (target) and ignoring those non-target items. A recognition test was then conducted. The high dissociation group performed better on updating working memory. However, the accessibility of the representations of neutral and negative non-target items was elevated. Dissociative individuals disengaged attention effectively from items they intended to ignore, and the representations of the ignored items were more accessible when cues were available. Copyright © 2017 Elsevier Inc. All rights reserved.
Rhodes, Matthew G; Tauber, Sarah K
2011-11-01
The current study examined the degree to which predictions of memory performance made immediately or at a delay are sensitive to confidently held memory illusions. Participants studied unrelated pairs of words and made judgements of learning (JOLs) for each item, either immediately or after a delay. Half of the unrelated pairs (deceptive items; e.g., nurse-dollar) had a semantically related competitor (e.g., doctor) that was easily accessible when given a test cue (e.g., nurse-do_ _ _r) and half had no semantically related competitor (control items; e.g., subject-dollar). Following the study phase, participants were administered a cued recall test. Results from Experiment 1 showed that memory performance was less accurate for deceptive compared with control items. In addition, delaying judgement improved the relative accuracy of JOLs for control items but not for deceptive items. Subsequent experiments explored the degree to which the relative accuracy of delayed JOLs for deceptive items improved as a result of a warning to ensure that retrieved memories were accurate (Experiment 2) and corrective feedback regarding the veracity of information retrieved prior to making a JOL (Experiment 3). In all, these data suggest that delayed JOLs may be largely insensitive to memory errors unless participants are provided with feedback regarding memory accuracy.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-01-13
... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory... administrative review of the countervailing duty order on dynamic random access memory semiconductors from the... following events have occurred since the publication of the preliminary results of this review. See Dynamic...
Federal Register 2010, 2011, 2012, 2013, 2014
2010-04-20
... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit for Preliminary Results of Countervailing Duty... access memory semiconductors from the Republic of Korea, covering the period January 1, 2008 through...
Accessibility versus Accuracy in Retrieving Spatial Memory: Evidence for Suboptimal Assumed Headings
ERIC Educational Resources Information Center
Yerramsetti, Ashok; Marchette, Steven A.; Shelton, Amy L.
2013-01-01
Orientation dependence in spatial memory has often been interpreted in terms of accessibility: Object locations are encoded relative to a reference orientation that affords the most accurate access to spatial memory. An open question, however, is whether people naturally use this "preferred" orientation whenever recalling the space. We…
Method and apparatus for controlling multiple motors
Jones, Rollin G.; Kortegaard, Bert L.; Jones, David F.
1987-01-01
A method and apparatus are provided for simultaneously controlling a plurality of stepper motors. Addressing circuitry generates address data for each motor in a periodic address sequence. Memory circuits respond to the address data for each motor by accessing a corresponding memory location containing a first operational data set functionally related to a direction for moving the motor, speed data, and rate of speed change. First logic circuits respond to the first data set to generate a motor step command. Second logic circuits respond to the command from the first logic circuits to generate a third data set for replacing the first data set in memory with a current operational motor status, which becomes the first data set when the motor is next addressed.
Fast decoding techniques for extended single-and-double-error-correcting Reed Solomon codes
NASA Technical Reports Server (NTRS)
Costello, D. J., Jr.; Deng, H.; Lin, S.
1984-01-01
A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. For example, some 256K-bit dynamic random access memories are organized as 32K x 8 bit-bytes. Byte-oriented codes such as Reed Solomon (RS) codes provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. Some special high speed decoding techniques for extended single and double error correcting RS codes. These techniques are designed to find the error locations and the error values directly from the syndrome without having to form the error locator polynomial and solve for its roots.
A multilevel nonvolatile magnetoelectric memory
NASA Astrophysics Data System (ADS)
Shen, Jianxin; Cong, Junzhuang; Shang, Dashan; Chai, Yisheng; Shen, Shipeng; Zhai, Kun; Sun, Young
2016-09-01
The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient (α) of multiferroics. Because the states of α depends on the relative orientation between magnetization and polarization, one can reach different levels of α by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of α can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of α is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.
Refreshing memory traces: thinking of an item improves retrieval from visual working memory.
Souza, Alessandra S; Rerko, Laura; Oberauer, Klaus
2015-03-01
This article provides evidence that refreshing, a hypothetical attention-based process operating in working memory (WM), improves the accessibility of visual representations for recall. "Thinking of", one of several concurrently active representations, is assumed to refresh its trace in WM, protecting the representation from being forgotten. The link between refreshing and WM performance, however, has only been tenuously supported by empirical evidence. Here, we controlled which and how often individual items were refreshed in a color reconstruction task by presenting cues prompting participants to think of specific WM items during the retention interval. We show that the frequency with which an item is refreshed improves recall of this item from visual WM. Our study establishes a role of refreshing in recall from visual WM and provides a new method for studying the impact of refreshing on the amount of information we can keep accessible for ongoing cognition. © 2014 New York Academy of Sciences.
Programmable data communications controller requirements
NASA Technical Reports Server (NTRS)
1977-01-01
The design requirements for a Programmable Data Communications Controller (PDCC) that reduces the difficulties in attaching data terminal equipment to a computer are presented. The PDCC is an interface between the computer I/O channel and the bit serial communication lines. Each communication line is supported by a communication port that handles all line control functions and performs most terminal control functions. The port is fabricated on a printed circuit board that plugs into a card chassis, mating with a connector that is joined to all other card stations by a data bus. Ports are individually programmable; each includes a microprocessor, a programmable read-only memory for instruction storage, and a random access memory for data storage.
Low latency and persistent data storage
Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd
2014-11-04
Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
More than a feeling: Emotional cues impact the access and experience of autobiographical memories.
Sheldon, Signy; Donahue, Julia
2017-07-01
Remembering is impacted by several factors of retrieval, including the emotional content of a memory cue. Here we tested how musical retrieval cues that differed on two dimensions of emotion-valence (positive and negative) and arousal (high and low)-impacted the following aspects of autobiographical memory recall: the response time to access a past personal event, the experience of remembering (ratings of memory vividness), the emotional content of a cued memory (ratings of event arousal and valence), and the type of event recalled (ratings of event energy, socialness, and uniqueness). We further explored how cue presentation affected autobiographical memory retrieval by administering cues of similar arousal and valence levels in a blocked fashion to one half of the tested participants, and randomly to the other half. We report three main findings. First, memories were accessed most quickly in response to musical cues that were highly arousing and positive in emotion. Second, we observed a relation between a cue and the elicited memory's emotional valence but not arousal; however, both the cue valence and arousal related to the nature of the recalled event. Specifically, high cue arousal led to lower memory vividness and uniqueness ratings, but cues with both high arousal and positive valence were associated with memories rated as more social and energetic. Finally, cue presentation impacted both how quickly and specifically memories were accessed and how cue valence affected the memory vividness ratings. The implications of these findings for views of how emotion directs the access to memories and the experience of remembering are discussed.
Optical memories in digital computing
NASA Technical Reports Server (NTRS)
Alford, C. O.; Gaylord, T. K.
1979-01-01
High capacity optical memories with relatively-high data-transfer rate and multiport simultaneous access capability may serve as basis for new computer architectures. Several computer structures that might profitably use memories are: a) simultaneous record-access system, b) simultaneously-shared memory computer system, and c) parallel digital processing structure.
Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul
2014-01-01
We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803
How intention and monitoring your thoughts influence characteristics of autobiographical memories.
Barzykowski, Krystian; Staugaard, Søren Risløv
2018-05-01
Involuntary autobiographical memories come to mind effortlessly and unintended, but the mechanisms of their retrieval are not fully understood. We hypothesize that involuntary retrieval depends on memories that are highly accessible (e.g., intense, unusual, recent, rehearsed), while the elaborate search that characterizes voluntary retrieval also produces memories that are mundane, repeated or distant - memories with low accessibility. Previous research provides some evidence for this 'threshold hypothesis'. However, in almost every prior study, participants have been instructed to report only memories while ignoring other thoughts. It is possible that such an instruction can modify the phenomenological characteristics of involuntary memories. This study aimed to investigate the effects of retrieval intentionality (i.e., wanting to retrieve a memory) and selective monitoring (i.e., instructions to report only memories) on the phenomenology of autobiographical memories. Participants were instructed to (1) intentionally retrieve autobiographical memories, (2) intentionally retrieve any type of thought (3) wait for an autobiographical memory to spontaneously appear, or (4) wait for any type of thought to spontaneously appear. They rated the mental content on a number of phenomenological characteristics both during retrieval and retrospectively following retrieval. The results support the prediction that highly accessible memories mostly enter awareness unintended and without selective monitoring, while memories with low accessibility rely on intention and selective monitoring. We discuss the implications of these effects. © 2017 The British Psychological Society.
Historical Contingency in Controlled Evolution
NASA Astrophysics Data System (ADS)
Schuster, Peter
2014-12-01
A basic question in evolution is dealing with the nature of an evolutionary memory. At thermodynamic equilibrium, at stable stationary states or other stable attractors the memory on the path leading to the long-time solution is erased, at least in part. Similar arguments hold for unique optima. Optimality in biology is discussed on the basis of microbial metabolism. Biology, on the other hand, is characterized by historical contingency, which has recently become accessible to experimental test in bacterial populations evolving under controlled conditions. Computer simulations give additional insight into the nature of the evolutionary memory, which is ultimately caused by the enormous space of possibilities that is so large that it escapes all attempts of visualization. In essence, this contribution is dealing with two questions of current evolutionary theory: (i) Are organisms operating at optimal performance? and (ii) How is the evolutionary memory built up in populations?
A polymer/semiconductor write-once read-many-times memory
NASA Astrophysics Data System (ADS)
Möller, Sven; Perlov, Craig; Jackson, Warren; Taussig, Carl; Forrest, Stephen R.
2003-11-01
Organic devices promise to revolutionize the extent of, and access to, electronics by providing extremely inexpensive, lightweight and capable ubiquitous components that are printed onto plastic, glass or metal foils. One key component of an electronic circuit that has thus far received surprisingly little attention is an organic electronic memory. Here we report an architecture for a write-once read-many-times (WORM) memory, based on the hybrid integration of an electrochromic polymer with a thin-film silicon diode deposited onto a flexible metal foil substrate. WORM memories are desirable for ultralow-cost permanent storage of digital images, eliminating the need for slow, bulky and expensive mechanical drives used in conventional magnetic and optical memories. Our results indicate that the hybrid organic/inorganic memory device is a reliable means for achieving rapid, large-scale archival data storage. The WORM memory pixel exploits a mechanism of current-controlled, thermally activated un-doping of a two-component electrochromic conducting polymer.
A wide bandwidth CCD buffer memory system
NASA Technical Reports Server (NTRS)
Siemens, K.; Wallace, R. W.; Robinson, C. R.
1978-01-01
A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.
Xu, Tanya J; Reichelt, Amy C
2018-04-11
Caffeinated sugar-sweetened "energy" drinks are a subset of soft drinks that are popular among young people worldwide. High sucrose diets impair cognition and alter aspects of emotional behaviour in rats, however, little is known about sucrose combined with caffeine. Rats were allocated to 2 h/day 10% sucrose (Suc), 10% sucrose plus 0.04% caffeine (CafSuc) or control (water) conditions. The addition of caffeine to sucrose appeared to increase the rewarding aspect of sucrose, as the CafSuc group consumed more solution than the Suc group. After 14 days of intermittent Suc or CafSuc access, anxiety was assessed in the elevated plus maze (EPM) prior to their daily solution access, whereby CafSuc and Suc rats spent more time in the closed arms, indicative of increased anxiety. Following daily solution access, CafSuc, but not Suc, rats showed reduced anxiety-like behaviour in the open-field. Control and CafSuc rats displayed intact place and long-term object memory, while Suc showed impaired memory performance. Sucrose reduced parvalbumin immunoreactivity in the hippocampus, but no differences were observed between Control and CafSuc conditions. Parvalbumin reactivity in the basolateral amygdala did not differ between conditions. Reduced doublecortin immunoreactivity in the dentate gyrus relative to controls was seen in the CafSuc, but not Suc, treatment conditions. These findings indicate that the addition of caffeine to sucrose attenuated cognitive deficits. However, the addition of caffeine to sucrose evoked anxiety-like responses under certain testing conditions, suggesting that frequent consumption of caffeinated energy drinks may promote emotional alterations and brain changes compared to standard soft drinks. Copyright © 2018 Elsevier Ltd. All rights reserved.
Chaillan, F A; Marchetti, E; Soumireu-Mourat, B; Roman, F S
2005-03-30
A new apparatus, the olfactory tubing maze for mice, was developed recently to study learning and memory processes in mice in regard to their ethological abilities. As in humans, BALB/c mice with selective bilateral lesions of the hippocampal formation showed selective impairment of subcategories of long-term memory when tested with the olfactory tubing maze. After three learning sessions, control mice reached a high percentage of correct responses. They consistently made the olfactory-reward associations, but antero-dorsal and postero-ventral hippocampal-lesioned mice did not. However, all lesioned mice learned the paradigm and the timing of the task as fast and as well as control mice. These data suggest that the olfactory tubing maze can be used to study subcategories of memory, such as declarative and non-declarative memory, which are similar in some respects to those observed in humans. Consequently, possible memory effects of classical approaches (i.e., pharmacological or lesion studies) or genetic modifications in transgenic or gene-targeting mice can be effectively analyzed using this new apparatus.
Complex dynamics of semantic memory access in reading
Baggio, Giosué; Fonseca, André
2012-01-01
Understanding a word in context relies on a cascade of perceptual and conceptual processes, starting with modality-specific input decoding, and leading to the unification of the word's meaning into a discourse model. One critical cognitive event, turning a sensory stimulus into a meaningful linguistic sign, is the access of a semantic representation from memory. Little is known about the changes that activating a word's meaning brings about in cortical dynamics. We recorded the electroencephalogram (EEG) while participants read sentences that could contain a contextually unexpected word, such as ‘cold’ in ‘In July it is very cold outside’. We reconstructed trajectories in phase space from single-trial EEG time series, and we applied three nonlinear measures of predictability and complexity to each side of the semantic access boundary, estimated as the onset time of the N400 effect evoked by critical words. Relative to controls, unexpected words were associated with larger prediction errors preceding the onset of the N400. Accessing the meaning of such words produced a phase transition to lower entropy states, in which cortical processing becomes more predictable and more regular. Our study sheds new light on the dynamics of information flow through interfaces between sensory and memory systems during language processing. PMID:21715401
UPC++ Programmer’s Guide (v1.0 2017.9)
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bachan, J.; Baden, S.; Bonachea, D.
UPC++ is a C++11 library that provides Asynchronous Partitioned Global Address Space (APGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The APGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, APGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, allmore » operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less
UPC++ Programmer’s Guide, v1.0-2018.3.0
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bachan, J.; Baden, S.; Bonachea, Dan
UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operationsmore » that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less
Supporting the self-concept with memory: insight from amnesia.
Grilli, Matthew D; Verfaellie, Mieke
2015-12-01
We investigated the extent to which personal semantic memory supports the self-concept in individuals with medial temporal lobe amnesia and healthy adults. Participants completed eight 'I Am' self-statements. For each of the four highest ranked self-statements, participants completed an open-ended narrative task, during which they provided supporting information indicating why the I Am statement was considered self-descriptive. Participants then completed an episodic probe task, during which they attempted to retrieve six episodic memories for each of these self-statements. Supporting information was scored as episodic, personal semantic or general semantic. In the narrative task, personal semantic memory predominated as self-supporting information in both groups. The amnesic participants generated fewer personal semantic memories than controls to support their self-statements, a deficit that was more pronounced for trait relative to role self-statements. In the episodic probe task, the controls primarily generated unique event memories, but the amnesic participants did not. These findings demonstrate that personal semantic memory, in particular autobiographical fact knowledge, plays a critical role in supporting the self-concept, regardless of the accessibility of episodic memories, and they highlight potential differences in the way traits and roles are supported by personal memory. © The Author (2015). Published by Oxford University Press. For Permissions, please email: journals.permissions@oup.com.
Cognitive Control and Lexical Access in Younger and Older Bilinguals
ERIC Educational Resources Information Center
Bialystok, Ellen; Craik, Fergus; Luk, Gigi
2008-01-01
Ninety-six participants, who were younger (20 years) or older (68 years) adults and either monolingual or bilingual, completed tasks assessing working memory, lexical retrieval, and executive control. Younger participants performed most of the tasks better than older participants, confirming the effect of aging on these processes. The effect of…
Enhanced dimension-specific visual working memory in grapheme-color synesthesia.
Terhune, Devin Blair; Wudarczyk, Olga Anna; Kochuparampil, Priya; Cohen Kadosh, Roi
2013-10-01
There is emerging evidence that the encoding of visual information and the maintenance of this information in a temporarily accessible state in working memory rely on the same neural mechanisms. A consequence of this overlap is that atypical forms of perception should influence working memory. We examined this by investigating whether having grapheme-color synesthesia, a condition characterized by the involuntary experience of color photisms when reading or representing graphemes, would confer benefits on working memory. Two competing hypotheses propose that superior memory in synesthesia results from information being coded in two information channels (dual-coding) or from superior dimension-specific visual processing (enhanced processing). We discriminated between these hypotheses in three n-back experiments in which controls and synesthetes viewed inducer and non-inducer graphemes and maintained color or grapheme information in working memory. Synesthetes displayed superior color working memory than controls for both grapheme types, whereas the two groups did not differ in grapheme working memory. Further analyses excluded the possibilities of enhanced working memory among synesthetes being due to greater color discrimination, stimulus color familiarity, or bidirectionality. These results reveal enhanced dimension-specific visual working memory in this population and supply further evidence for a close relationship between sensory processing and the maintenance of sensory information in working memory. Copyright © 2013 The Authors. Published by Elsevier B.V. All rights reserved.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Gala, Alan; Ohmacht, Martin
A multiprocessor system includes nodes. Each node includes a data path that includes a core, a TLB, and a first level cache implementing disambiguation. The system also includes at least one second level cache and a main memory. For thread memory access requests, the core uses an address associated with an instruction format of the core. The first level cache uses an address format related to the size of the main memory plus an offset corresponding to hardware thread meta data. The second level cache uses a physical main memory address plus software thread meta data to store the memorymore » access request. The second level cache accesses the main memory using the physical address with neither the offset nor the thread meta data after resolving speculation. In short, this system includes mapping of a virtual address to a different physical addresses for value disambiguation for different threads.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Braiman, Yehuda; Neschke, Brendan; Nair, Niketh S.
Here, we study memory states of a circuit consisting of a small inductively coupled Josephson junction array and introduce basic (write, read, and reset) memory operations logics of the circuit. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics. We calculate stability diagrams of the zero-voltage states and outline memory states of the circuit. We also calculate access times and access energies for basic memory operations.
Is random access memory random?
NASA Technical Reports Server (NTRS)
Denning, P. J.
1986-01-01
Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.
Karami, Mohammad; Ehsanivostacolaee, Simin; Moazedi, Ali Ahmad; Nosrati, Anahita
2013-01-01
In this study the effect of zinc chloride (ZnCl2) administration on the short-term and long-term memory of rats were assessed. We enrolled six groups of adult female and control group of eight Wistar rats in each group. One group was control group with free access to food and water, and five groups drunk zinc chloride in different doses (20, 30, 50, 70 and 100 mg/kg/day) in drinking water for two weeks during lactation .One month after birth, a shuttle box used to short- term and long-term memory and the latency in entering the dark chamber as well. This experiment showed that maternal 70 mg/kg dietary zinc during lactation influenced the working memory of rats' offspring in all groups. Rats received 100 mg/kg/day zinc during lactation so they had significant impairment in working memory (short-term) of their offspring (P<0.05). There was no significant difference in reference (long-term) memory of all groups. Drug consumption below70 mg/kg/day zinc chloride during lactation had no effect. While enhanced 100 mg/ kg/ day zinc in lactating rats could cause short-term memory impairment.
With Development, List Recall Includes More Chunks, Not Just Larger Ones
Cowan, Nelson; Hismjatullina, Anna; AuBuchon, Angela M.; Saults, J. Scott; Horton, Neil; Leadbitter, Kathy; Towse, John
2011-01-01
The nature of the childhood development of immediate recall has been difficult to determine. There could be a developmental increase in either the number of chunks held in working memory or the use of grouping to make the most of a constant capacity. In 3 experiments with children in the early elementary school years and adults, we show that improvements in the immediate recall of word and picture lists come partly from increases in the number of chunks of items retained in memory. This finding was based on a distinction between access to a studied group of items (i.e., recall of at least 1 item from the group) and completion of the accessed group (i.e., the proportion of the items recalled from the group). Access rates increased with age, even with statistical controls for completion rates, implicating development of capacity in chunks. PMID:20822227
NASA Technical Reports Server (NTRS)
Batcher, K. E.; Eddey, E. E.; Faiss, R. O.; Gilmore, P. A.
1981-01-01
The processing of synthetic aperture radar (SAR) signals using the massively parallel processor (MPP) is discussed. The fast Fourier transform convolution procedures employed in the algorithms are described. The MPP architecture comprises an array unit (ARU) which processes arrays of data; an array control unit which controls the operation of the ARU and performs scalar arithmetic; a program and data management unit which controls the flow of data; and a unique staging memory (SM) which buffers and permutes data. The ARU contains a 128 by 128 array of bit-serial processing elements (PE). Two-by-four surarrays of PE's are packaged in a custom VLSI HCMOS chip. The staging memory is a large multidimensional-access memory which buffers and permutes data flowing with the system. Efficient SAR processing is achieved via ARU communication paths and SM data manipulation. Real time processing capability can be realized via a multiple ARU, multiple SM configuration.
Heib, Dominik P J; Hoedlmoser, Kerstin; Anderer, Peter; Gruber, Georg; Zeitlhofer, Josef; Schabus, Manuel
2015-08-01
Sleep has been shown to promote memory consolidation driven by certain oscillatory patterns, such as sleep spindles. However, sleep does not consolidate all newly encoded information uniformly but rather "selects" certain memories for consolidation. It is assumed that such selection depends on salience tags attached to the new memories before sleep. However, little is known about the underlying neuronal processes reflecting presleep memory tagging. The current study sought to address the question of whether event-related changes in spectral theta power (theta ERSP) during presleep memory formation could reflect memory tagging that influences subsequent consolidation during sleep. Twenty-four participants memorized 160 word pairs before sleep; in a separate laboratory visit, they performed a nonlearning control task. Memory performance was tested twice, directly before and after 8 hr of sleep. Results indicate that participants who improved their memory performance overnight displayed stronger theta ERSP during the memory task in comparison with the control task. They also displayed stronger memory task-related increases in fast sleep spindle activity. Furthermore, presleep theta activity was directly linked to fast sleep spindle activity, indicating that processes during memory formation might indeed reflect memory tagging that influences subsequent consolidation during sleep. Interestingly, our results further indicate that the suggested relation between sleep spindles and overnight performance change is not as direct as once believed. Rather, it appears to be mediated by processes beginning during presleep memory formation. We conclude that theta ERSP during presleep memory formation reflects cortico-hippocampal interactions that lead to a better long-term accessibility by tagging memories for sleep spindle-related reprocessing.
Cognitive control over working memory biases of selection.
Kiyonaga, Anastasia; Egner, Tobias; Soto, David
2012-08-01
Across many studies, researchers have found that representations in working memory (WM) can guide visual attention toward items that match the features of the WM contents. While some researchers have contended that this occurs involuntarily, others have suggested that the impact of WM contents on attention can be strategically controlled. Here, we varied the probability that WM items would coincide with either targets or distractors in a visual search task to examine (1) whether participants could intentionally enhance or inhibit the influence of WM items on attention and (2) whether cognitive control over WM biases would also affect access to the memory contents in a surprise recognition test. We found visual search to be faster when the WM item coincided with the search target, and this effect was enhanced when the memory item reliably predicted the location of the target. Conversely, visual search was slowed when the memory item coincided with a search distractor, and this effect was diminished, but not abolished, when the memory item was reliably associated with distractors. This strategic dampening of the influence of WM items on attention came at a price to memory, however, as participants were slowest to perform WM recognition tests on blocks in which the WM contents were consistently invalid. These results document that attentional capture by WM contents is partly, but not fully, malleable by top-down control, which appears to adjust the state of the WM contents to optimize search behavior. These data illustrate the role of cognitive control in modulating the strength of WM biases of selection, and they support a tight coupling between WM and attention.
Sparse distributed memory prototype: Principles of operation
NASA Technical Reports Server (NTRS)
Flynn, Michael J.; Kanerva, Pentti; Ahanin, Bahram; Bhadkamkar, Neal; Flaherty, Paul; Hickey, Philip
1988-01-01
Sparse distributed memory is a generalized random access memory (RAM) for long binary words. Such words can be written into and read from the memory, and they can be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original right address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech and scene analysis, in signal detection and verification, and in adaptive control of automated equipment. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. The research is aimed at resolving major design issues that have to be faced in building the memories. The design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words is described. A key aspect of the design is extensive use of dynamic RAM and other standard components.
Price, John M; Colflesh, Gregory J H; Cerella, John; Verhaeghen, Paul
2014-05-01
We investigated the effects of 10h of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. Copyright © 2014 Elsevier B.V. All rights reserved.
How does a specific learning and memory system in the mammalian brain gain control of behavior?
McDonald, Robert J; Hong, Nancy S
2013-11-01
This review addresses a fundamental, yet poorly understood set of issues in systems neuroscience. The issues revolve around conceptualizations of the organization of learning and memory in the mammalian brain. One intriguing, and somewhat popular, conceptualization is the idea that there are multiple learning and memory systems in the mammalian brain and they interact in different ways to influence and/or control behavior. This approach has generated interesting empirical and theoretical work supporting this view. One issue that needs to be addressed is how these systems influence or gain control of voluntary behavior. To address this issue, we clearly specify what we mean by a learning and memory system. We then review two types of processes that might influence which memory system gains control of behavior. One set of processes are external factors that can affect which system controls behavior in a given situation including task parameters like the kind of information available to the subject, types of training experience, and amount of training. The second set of processes are brain mechanisms that might influence what memory system controls behavior in a given situation including executive functions mediated by the prefrontal cortex; switching mechanisms mediated by ascending neurotransmitter systems, the unique role of the hippocampus during learning. The issue of trait differences in control of different learning and memory systems will also be considered in which trait differences in learning and memory function are thought to potentially emerge from differences in level of prefrontal influence, differences in plasticity processes, differences in ascending neurotransmitter control, differential access to effector systems like motivational and motor systems. Finally, we present scenarios in which different mechanisms might interact. This review was conceived to become a jumping off point for new work directed at understanding these issues. The outcome of this work, in combination with other approaches, might improve understanding of the mechanisms of volition in human and non-human animals. Copyright © 2013 Wiley Periodicals, Inc.
Electrophysiological correlates of competitor activation predict retrieval-induced forgetting.
Hellerstedt, Robin; Johansson, Mikael
2014-06-01
The very act of retrieval modifies the accessibility of memory for knowledge and past events and can also cause forgetting. A prominent theory of such retrieval-induced forgetting (RIF) holds that retrieval recruits inhibition to overcome interference from competing memories, rendering these memories inaccessible. The present study tested a fundamental tenet of the inhibitory-control account: The competition-dependence assumption. Event-related potentials (ERPs) were recorded while participants engaged in a competitive retrieval task. Competition levels were manipulated within the retrieval task by varying the cue-item associative strength of competing items. In order to temporally separate ERP correlates of competitor activation and target retrieval, memory was probed with the sequential presentation of 2 cues: A category cue, to reactivate competitors, and a target cue. As predicted by the inhibitory-control account, competitors with strong compared with weak cue-competitor association were more susceptible to forgetting. Furthermore, competition-sensitive ERP modulations, elicited by the category cue, were observed over anterior regions and reflected individual differences in ensuing forgetting. The present study demonstrates ERP correlates of the reactivation of tightly bound associated memories (the competitors) and provides support for the inhibitory-control account of RIF.
Autobiographical memory specificity in dissociative identity disorder.
Huntjens, Rafaële J C; Wessel, Ineke; Hermans, Dirk; van Minnen, Agnes
2014-05-01
A lack of adequate access to autobiographical knowledge has been related to psychopathology. More specifically, patients suffering from depression or a history of trauma have been found to be characterized by overgeneral memory, in other words, they show a relative difficulty in retrieving a specific event from memory located in time and place. Previous studies of overgeneral memory have not included patients with dissociative disorders. These patients are interesting to consider, as they are hypothesized to have the ability to selectively compartmentalize information linked to negative emotions. This study examined avoidance and overgeneral memory in patients with dissociative identity disorder (DID; n = 12). The patients completed the autobiographical memory test (AMT). Their performance was compared with control groups of posttraumatic stress disorder (PTSD) patients (n = 26), healthy controls (n = 29), and DID simulators (n = 26). Specifically, we compared the performance of separate identity states in DID hypothesized to diverge in the use of avoidance as a coping strategy to deal with negative affect. No significant differences in memory specificity were found between the separate identities in DID. Irrespective of identity state, DID patients were characterized by a lack of memory specificity, which was similar to the lack of memory specificity found in PTSD patients. The converging results for DID and PTSD patients add empirical evidence for the role of overgeneral memory involved in the maintenance of posttraumatic psychopathology.
MPEG-1 low-cost encoder solution
NASA Astrophysics Data System (ADS)
Grueger, Klaus; Schirrmeister, Frank; Filor, Lutz; von Reventlow, Christian; Schneider, Ulrich; Mueller, Gerriet; Sefzik, Nicolai; Fiedrich, Sven
1995-02-01
A solution for real-time compression of digital YCRCB video data to an MPEG-1 video data stream has been developed. As an additional option, motion JPEG and video telephone streams (H.261) can be generated. For MPEG-1, up to two bidirectional predicted images are supported. The required computational power for motion estimation and DCT/IDCT, memory size and memory bandwidth have been the main challenges. The design uses fast-page-mode memory accesses and requires only one single 80 ns EDO-DRAM with 256 X 16 organization for video encoding. This can be achieved only by using adequate access and coding strategies. The architecture consists of an input processing and filter unit, a memory interface, a motion estimation unit, a motion compensation unit, a DCT unit, a quantization control, a VLC unit and a bus interface. For using the available memory bandwidth by the processing tasks, a fixed schedule for memory accesses has been applied, that can be interrupted for asynchronous events. The motion estimation unit implements a highly sophisticated hierarchical search strategy based on block matching. The DCT unit uses a separated fast-DCT flowgraph realized by a switchable hardware unit for both DCT and IDCT operation. By appropriate multiplexing, only one multiplier is required for: DCT, quantization, inverse quantization, and IDCT. The VLC unit generates the video-stream up to the video sequence layer and is directly coupled with an intelligent bus-interface. Thus, the assembly of video, audio and system data can easily be performed by the host computer. Having a relatively low complexity and only small requirements for DRAM circuits, the developed solution can be applied to low-cost encoding products for consumer electronics.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Gebis, Joseph; Oliker, Leonid; Shalf, John
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software controlled scratchpad memories, such as the Cell local store, attempt to ameliorate this discrepancy by enabling precise control over memory movement; however, scratchpad technology confronts the programmer and compiler with an unfamiliar and difficult programming model. In this work, we present the Virtual Vector Architecture (ViVA), which combines the memory semantics of vector computers with a software-controlled scratchpad memory in order to provide a more effective and practical approach to latency hiding. ViVA requires minimal changesmore » to the core design and could thus be easily integrated with conventional processor cores. To validate our approach, we implemented ViVA on the Mambo cycle-accurate full system simulator, which was carefully calibrated to match the performance on our underlying PowerPC Apple G5 architecture. Results show that ViVA is able to deliver significant performance benefits over scalar techniques for a variety of memory access patterns as well as two important memory-bound compact kernels, corner turn and sparse matrix-vector multiplication -- achieving 2x-13x improvement compared the scalar version. Overall, our preliminary ViVA exploration points to a promising approach for improving application performance on leading microprocessors with minimal design and complexity costs, in a power efficient manner.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Song, Kyungmi; Lee, Kyung-Jin, E-mail: kj-lee@korea.ac.kr; Department of Materials Science and Engineering, Korea University, Seoul 136-713
2015-08-07
We numerically investigate the effect of magnetic and electrical damages at the edge of a perpendicular magnetic random access memory (MRAM) cell on the spin-transfer-torque (STT) efficiency that is defined by the ratio of thermal stability factor to switching current. We find that the switching mode of an edge-damaged cell is different from that of an undamaged cell, which results in a sizable reduction in the switching current. Together with a marginal reduction of the thermal stability factor of an edge-damaged cell, this feature makes the STT efficiency large. Our results suggest that a precise edge control is viable formore » the optimization of STT-MRAM.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lin, Chun-Cheng; Department of Mathematic and Physical Sciences, R.O.C. Air Force Academy, Kaohsiung 820, Taiwan; Tang, Jian-Fu
2016-06-28
The multi-step resistive switching (RS) behavior of a unipolar Pt/Li{sub 0.06}Zn{sub 0.94}O/Pt resistive random access memory (RRAM) device is investigated. It is found that the RRAM device exhibits normal, 2-, 3-, and 4-step RESET behaviors under different compliance currents. The transport mechanism within the device is investigated by means of current-voltage curves, in-situ transmission electron microscopy, and electrochemical impedance spectroscopy. It is shown that the ion transport mechanism is dominated by Ohmic behavior under low electric fields and the Poole-Frenkel emission effect (normal RS behavior) or Li{sup +} ion diffusion (2-, 3-, and 4-step RESET behaviors) under high electric fields.
Working Memory Maturation: Can We Get at the Essence of Cognitive Growth?
Cowan, Nelson
2016-03-01
The theoretical and practical understanding of cognitive development depends on working memory, the limited information temporarily accessible for such daily activities as language processing and problem solving. In this article, I assess many possible reasons that working memory performance improves with development. A first glance at the literature leads to the weird impression that working memory capacity reaches adult levels during infancy but then regresses during childhood. In place of that unlikely explanation, I consider how infant studies may lead to overestimates of capacity if one neglects supports that the tasks provide, compared with adult-level tasks. Further development of working memory during the school years is also considered. Many investigators have come to suspect that working memory capacity may be constant after infancy because of various factors such as developmental increases in knowledge, filtering out of irrelevant distractions, encoding and rehearsal strategies, and pattern formation. With each of these factors controlled, though, working memory still improves during the school years. Suggestions are made for research to bridge the gap between infant and child developmental research, to understand the focus and control of attention in working memory and how these skills develop, and to pinpoint the nature of capacity and its development from infancy forward. © The Author(s) 2016.
Working Memory Maturation: Can We Get At the Essence of Cognitive Growth?
Cowan, Nelson
2015-01-01
Our theoretical and practical understanding of cognitive development depends on working memory, the limited information temporarily accessible for such daily activities as language processing and problem-solving. Here I assess many possible reasons why working memory performance improves with development. A first glance at the literature leads to the weird impression that working memory capacity reaches adult-like levels during infancy but then regresses during childhood. In place of that unlikely surmise, I consider how infant studies may lead to overestimates of capacity if one neglects supports that the tasks provide, compared to adult-like tasks. Further development of working memory during the school years is also considered. Various confounding factors have led many investigators to suspect that working memory capacity may be constant after infancy; the factors include developmental increases in knowledge, filtering out of irrelevant distractions, encoding and rehearsal strategies, and pattern formation. With each of these factors controlled, though, working memory still improves during the school years. Suggestions are made for research to bridge the gap between infant and child developmental research, to understand the focus and control of attention in working memory and how they develop, and to pinpoint the nature of capacity and its development from infancy on. PMID:26993277
zorder-lib: Library API for Z-Order Memory Layout
DOE Office of Scientific and Technical Information (OSTI.GOV)
Nowell, Lucy; Edward W. Bethel
2015-04-01
This document describes the motivation for, elements of, and use of the zorder-lib, a library API that implements organization of and access to data in memory using either a-order (also known as "row-major" order) or z-order memory layouts. The primary motivation for this work is to improve the performance of many types of data- intensive codes by increasing both spatial and temporal locality of memory accesses. The basic idea is that the cost associated with accessing a datum is less when it is nearby in either space or time.
Impacts of Co doping on ZnO transparent switching memory device characteristics
DOE Office of Scientific and Technical Information (OSTI.GOV)
Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar
2016-05-02
The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less
Shared Memory Parallelization of an Implicit ADI-type CFD Code
NASA Technical Reports Server (NTRS)
Hauser, Th.; Huang, P. G.
1999-01-01
A parallelization study designed for ADI-type algorithms is presented using the OpenMP specification for shared-memory multiprocessor programming. Details of optimizations specifically addressed to cache-based computer architectures are described and performance measurements for the single and multiprocessor implementation are summarized. The paper demonstrates that optimization of memory access on a cache-based computer architecture controls the performance of the computational algorithm. A hybrid MPI/OpenMP approach is proposed for clusters of shared memory machines to further enhance the parallel performance. The method is applied to develop a new LES/DNS code, named LESTool. A preliminary DNS calculation of a fully developed channel flow at a Reynolds number of 180, Re(sub tau) = 180, has shown good agreement with existing data.
The potential of multi-port optical memories in digital computing
NASA Technical Reports Server (NTRS)
Alford, C. O.; Gaylord, T. K.
1975-01-01
A high-capacity memory with a relatively high data transfer rate and multi-port simultaneous access capability may serve as the basis for new computer architectures. The implementation of a multi-port optical memory is discussed. Several computer structures are presented that might profitably use such a memory. These structures include (1) a simultaneous record access system, (2) a simultaneously shared memory computer system, and (3) a parallel digital processing structure.
FPGA-Based Reconfigurable Processor for Ultrafast Interlaced Ultrasound and Photoacoustic Imaging
Alqasemi, Umar; Li, Hai; Aguirre, Andrés; Zhu, Quing
2016-01-01
In this paper, we report, to the best of our knowledge, a unique field-programmable gate array (FPGA)-based reconfigurable processor for real-time interlaced co-registered ultrasound and photoacoustic imaging and its application in imaging tumor dynamic response. The FPGA is used to control, acquire, store, delay-and-sum, and transfer the data for real-time co-registered imaging. The FPGA controls the ultrasound transmission and ultrasound and photoacoustic data acquisition process of a customized 16-channel module that contains all of the necessary analog and digital circuits. The 16-channel module is one of multiple modules plugged into a motherboard; their beamformed outputs are made available for a digital signal processor (DSP) to access using an external memory interface (EMIF). The FPGA performs a key role through ultrafast reconfiguration and adaptation of its structure to allow real-time switching between the two imaging modes, including transmission control, laser synchronization, internal memory structure, beamforming, and EMIF structure and memory size. It performs another role by parallel accessing of internal memories and multi-thread processing to reduce the transfer of data and the processing load on the DSP. Furthermore, because the laser will be pulsing even during ultrasound pulse-echo acquisition, the FPGA ensures that the laser pulses are far enough from the pulse-echo acquisitions by appropriate time-division multiplexing (TDM). A co-registered ultrasound and photoacoustic imaging system consisting of four FPGA modules (64-channels) is constructed, and its performance is demonstrated using phantom targets and in vivo mouse tumor models. PMID:22828830
FPGA-based reconfigurable processor for ultrafast interlaced ultrasound and photoacoustic imaging.
Alqasemi, Umar; Li, Hai; Aguirre, Andrés; Zhu, Quing
2012-07-01
In this paper, we report, to the best of our knowledge, a unique field-programmable gate array (FPGA)-based reconfigurable processor for real-time interlaced co-registered ultrasound and photoacoustic imaging and its application in imaging tumor dynamic response. The FPGA is used to control, acquire, store, delay-and-sum, and transfer the data for real-time co-registered imaging. The FPGA controls the ultrasound transmission and ultrasound and photoacoustic data acquisition process of a customized 16-channel module that contains all of the necessary analog and digital circuits. The 16-channel module is one of multiple modules plugged into a motherboard; their beamformed outputs are made available for a digital signal processor (DSP) to access using an external memory interface (EMIF). The FPGA performs a key role through ultrafast reconfiguration and adaptation of its structure to allow real-time switching between the two imaging modes, including transmission control, laser synchronization, internal memory structure, beamforming, and EMIF structure and memory size. It performs another role by parallel accessing of internal memories and multi-thread processing to reduce the transfer of data and the processing load on the DSP. Furthermore, because the laser will be pulsing even during ultrasound pulse-echo acquisition, the FPGA ensures that the laser pulses are far enough from the pulse-echo acquisitions by appropriate time-division multiplexing (TDM). A co-registered ultrasound and photoacoustic imaging system consisting of four FPGA modules (64-channels) is constructed, and its performance is demonstrated using phantom targets and in vivo mouse tumor models.
Saying what’s on your mind: Working memory effects on sentence production
Slevc, L. Robert
2011-01-01
The role of working memory (WM) in sentence comprehension has received considerable interest, but little work has investigated how sentence production relies on memory mechanisms. These three experiments investigated speakers’ tendency to produce syntactic structures that allow for early production of material that is accessible in memory. In Experiment 1, speakers produced accessible information early less often when under a verbal WM load than when under no load. Experiment 2 found the same pattern for given-new ordering, i.e., when accessibility was manipulated by making information given. Experiment 3 addressed the possibility that these effects do not reflect WM mechanisms but rather increased task difficulty by relying on the distinction between verbal and spatial WM: Speakers’ tendency to produce sentences respecting given-new ordering was reduced more by a verbal than by a spatial WM load. These patterns show that accessibility effects do in fact reflect accessibility in verbal WM, and that representations in sentence production are vulnerable to interference from other information in memory. PMID:21767058
Working memory at work: how the updating process alters the nature of working memory transfer.
Zhang, Yanmin; Verhaeghen, Paul; Cerella, John
2012-01-01
In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. Copyright © 2011 Elsevier B.V. All rights reserved.
Working Memory at Work: How the Updating Process Alters the Nature of Working Memory Transfer
Zhang, Yanmin; Verhaeghen, Paul; Cerella, John
2011-01-01
In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. PMID:22105718
ERIC Educational Resources Information Center
Gerhardt, Lillian N.
1981-01-01
Evaluates the Prince George's County Memorial Public Library's approach to providing access to its services for children, and examines policies, regulations, practices, and conditions that affect such access. Six references are cited. (FM)
van Ede, Freek; Niklaus, Marcel; Nobre, Anna C
2017-01-11
Although working memory is generally considered a highly dynamic mnemonic store, popular laboratory tasks used to understand its psychological and neural mechanisms (such as change detection and continuous reproduction) often remain relatively "static," involving the retention of a set number of items throughout a shared delay interval. In the current study, we investigated visual working memory in a more dynamic setting, and assessed the following: (1) whether internally guided temporal expectations can dynamically and reversibly prioritize individual mnemonic items at specific times at which they are deemed most relevant; and (2) the neural substrates that support such dynamic prioritization. Participants encoded two differently colored oriented bars into visual working memory to retrieve the orientation of one bar with a precision judgment when subsequently probed. To test for the flexible temporal control to access and retrieve remembered items, we manipulated the probability for each of the two bars to be probed over time, and recorded EEG in healthy human volunteers. Temporal expectations had a profound influence on working memory performance, leading to faster access times as well as more accurate orientation reproductions for items that were probed at expected times. Furthermore, this dynamic prioritization was associated with the temporally specific attenuation of contralateral α (8-14 Hz) oscillations that, moreover, predicted working memory access times on a trial-by-trial basis. We conclude that attentional prioritization in working memory can be dynamically steered by internally guided temporal expectations, and is supported by the attenuation of α oscillations in task-relevant sensory brain areas. In dynamic, everyday-like, environments, flexible goal-directed behavior requires that mental representations that are kept in an active (working memory) store are dynamic, too. We investigated working memory in a more dynamic setting than is conventional, and demonstrate that expectations about when mnemonic items are most relevant can dynamically and reversibly prioritize these items in time. Moreover, we uncover a neural substrate of such dynamic prioritization in contralateral visual brain areas and show that this substrate predicts working memory retrieval times on a trial-by-trial basis. This places the experimental study of working memory, and its neuronal underpinnings, in a more dynamic and ecologically valid context, and provides new insights into the neural implementation of attentional prioritization within working memory. Copyright © 2017 van Ede et al.
Sheldon, Signy; Chu, Sonja
2017-09-01
Autobiographical memory research has investigated how cueing distinct aspects of a past event can trigger different recollective experiences. This research has stimulated theories about how autobiographical knowledge is accessed and organized. Here, we test the idea that thematic information organizes multiple autobiographical events whereas spatial information organizes individual past episodes by investigating how retrieval guided by these two forms of information differs. We used a novel autobiographical fluency task in which participants accessed multiple memory exemplars to event theme and spatial (location) cues followed by a narrative description task in which they described the memories generated to these cues. Participants recalled significantly more memory exemplars to event theme than to spatial cues; however, spatial cues prompted faster access to past memories. Results from the narrative description task revealed that memories retrieved via event theme cues compared to spatial cues had a higher number of overall details, but those recalled to the spatial cues were recollected with a greater concentration on episodic details than those retrieved via event theme cues. These results provide evidence that thematic information organizes and integrates multiple memories whereas spatial information prompts the retrieval of specific episodic content from a past event.
NASA Astrophysics Data System (ADS)
Wang, Jianhua; Cheng, Lianglun; Wang, Tao; Peng, Xiaodong
2016-03-01
Table look-up operation plays a very important role during the decoding processing of context-based adaptive variable length decoding (CAVLD) in H.264/advanced video coding (AVC). However, frequent table look-up operation can result in big table memory access, and then lead to high table power consumption. Aiming to solve the problem of big table memory access of current methods, and then reduce high power consumption, a memory-efficient table look-up optimized algorithm is presented for CAVLD. The contribution of this paper lies that index search technology is introduced to reduce big memory access for table look-up, and then reduce high table power consumption. Specifically, in our schemes, we use index search technology to reduce memory access by reducing the searching and matching operations for code_word on the basis of taking advantage of the internal relationship among length of zero in code_prefix, value of code_suffix and code_lengh, thus saving the power consumption of table look-up. The experimental results show that our proposed table look-up algorithm based on index search can lower about 60% memory access consumption compared with table look-up by sequential search scheme, and then save much power consumption for CAVLD in H.264/AVC.
NASA Technical Reports Server (NTRS)
Katti, Romney R.
1995-01-01
Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.
Development of Curie point switching for thin film, random access, memory device
NASA Technical Reports Server (NTRS)
Lewicki, G. W.; Tchernev, D. I.
1967-01-01
Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Saadi, M.; CNRS, LTM, F-38000 Grenoble; El Manar University, LMOP, 2092 Tunis
Resistance switching is studied in HfO{sub 2} as a function of the anode metal (Au, Cu, and Ag) in view of its application to resistive memories (resistive random access memories, RRAM). Current-voltage (I-V) and current-time (I-t) characteristics are presented. For Au anodes, resistance transition is controlled by oxygen vacancies (oxygen-based resistive random access memory, OxRRAM). For Ag anodes, resistance switching is governed by cation injection (Conducting Bridge random access memory, CBRAM). Cu anodes lead to an intermediate case. I-t experiments are shown to be a valuable tool to distinguish between OxRRAM and CBRAM behaviors. A model is proposed to explainmore » the high-to-low resistance transition in CBRAMs. The model is based on the theory of low-temperature oxidation of metals (Cabrera-Mott theory). Upon electron injection, oxygen vacancies and oxygen ions are generated in the oxide. Oxygen ions are drifted to the anode, and an interfacial oxide is formed at the HfO{sub 2}/anode interface. If oxygen ion mobility is low in the interfacial oxide, a negative space charge builds-up at the HfO{sub 2}/oxide interface. This negative space charge is the source of a strong electric field across the interfacial oxide thickness, which pulls out cations from the anode (CBRAM case). Inversely, if oxygen ions migration through the interfacial oxide is important (or if the anode does not oxidize such as Au), bulk oxygen vacancies govern resistance transition (OxRRAM case).« less
NASA Astrophysics Data System (ADS)
Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo
2017-04-01
A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90 nm CMOS/70 nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STT-MRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40 MHz are demonstrated by measurement. The average operation power is only 130 µW, and the circuit density is less than 11 µm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in low-power and large-memory-based VLSIs.
Tehan, G; Lalor, D M
2000-11-01
Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the subject population, have suggested other contributors to span performance, notably contributions from long-term memory and forgetting and retrieval processes occurring during recall. In the current research we explore individual differences in span with respect to measures of rehearsal, output time, and access to lexical memory. We replicate standard short-term phenomena; we show that the variables that influence children's span performance influence adult performance in the same way; and we show that lexical memory access appears to be a more potent source of individual differences in span than either rehearsal speed or output factors.
Preparation of School District Budgets with Microcomputer Electronic Spreadsheets.
ERIC Educational Resources Information Center
Hinitz, Herman J.
1996-01-01
Preparing a microcomputer electronic spreadsheet containing all relevant school district budgetary information is possible with currently available hardware and software (such as Lotus 1-2-3), despite random-access-memory limitations. Spreadsheets can provide financial summaries, inventory-control listings, scheduling alternatives,…
Adult Age Differences in Accessing and Retrieving Information from Long-Term Memory.
ERIC Educational Resources Information Center
Petros, Thomas V.; And Others
1983-01-01
Investigated adult age differences in accessing and retrieving information from long-term memory. Results showed that older adults (N=26) were slower than younger adults (N=35) at feature extraction, lexical access, and accessing category information. The age deficit was proportionally greater when retrieval of category information was required.…
Ventral Fronto-Temporal Pathway Supporting Cognitive Control of Episodic Memory Retrieval
Barredo, Jennifer; Öztekin, Ilke; Badre, David
2015-01-01
Achieving our goals often requires guiding access to relevant information from memory. Such goal-directed retrieval requires interactions between systems supporting cognitive control, including ventrolateral prefrontal cortex (VLPFC), and those supporting declarative memory, such as the medial temporal lobes (MTL). However, the pathways by which VLPFC interacts with MTL during retrieval are underspecified. Prior neuroanatomical evidence suggests that a polysynaptic ventral fronto-temporal pathway may support VLPFC–MTL interactions. To test this hypothesis, human participants were scanned using fMRI during performance of a source-monitoring task. The strength of source information was varied via repetition during encoding. Single encoding events should produce a weaker memory trace, thus recovering source information about these items should demand greater cognitive control. Results demonstrated that cortical targets along the ventral path—anterior VLPFC, temporal pole, anterior parahippocampus, and hippocampus—exhibited increases in univariate BOLD response correlated with increases in controlled retrieval demand, independent of factors related to response selection. Further, a functional connectivity analysis indicated that these regions functionally couple and are distinguishable from a dorsal pathway related to response selection demands. These data support a ventral retrieval pathway linking PFC and MTL. PMID:24177990
Preliminary design for a standard 10 sup 7 bit Solid State Memory (SSM)
NASA Technical Reports Server (NTRS)
Hayes, P. J.; Howle, W. M., Jr.; Stermer, R. L., Jr.
1978-01-01
A modular concept with three separate modules roughly separating bubble domain technology, control logic technology, and power supply technology was employed. These modules were respectively the standard memory module (SMM), the data control unit (DCU), and power supply module (PSM). The storage medium was provided by bubble domain chips organized into memory cells. These cells and the circuitry for parallel data access to the cells make up the SMM. The DCU provides a flexible serial data interface to the SMM. The PSM provides adequate power to enable one DCU and one SMM to operate simultaneously at the maximum data rate. The SSM was designed to handle asynchronous data rates from dc to 1.024 Mbs with a bit error rate less than 1 error in 10 to the eight power bits. Two versions of the SSM, a serial data memory and a dual parallel data memory were specified using the standard modules. The SSM specification includes requirements for radiation hardness, temperature and mechanical environments, dc magnetic field emission and susceptibility, electromagnetic compatibility, and reliability.
Calia, Clara; Darling, Stephen; Havelka, Jelena; Allen, Richard J
2018-05-01
Immediate serial recall of digits is better when the digits are shown by highlighting them in a familiar array, such as a phone keypad, compared with presenting them serially in a single location, a pattern referred to as "visuospatial bootstrapping." This pattern implies the establishment of temporary links between verbal and spatial working memory, alongside access to information in long-term memory. However, the role of working memory control processes like those implied by the "Central Executive" in bootstrapping has not been directly investigated. Here, we report a study addressing this issue, focusing on executive processes of attentional shifting. Tasks in which information has to be sequenced are thought to be heavily dependent on shifting. Memory for digits presented in keypads versus single locations was assessed under two secondary task load conditions, one with and one without a sequencing requirement, and hence differing in the degree to which they invoke shifting. Results provided clear evidence that multimodal binding (visuospatial bootstrapping) can operate independently of this form of executive control process.
Wide-Range Motion Estimation Architecture with Dual Search Windows for High Resolution Video Coding
NASA Astrophysics Data System (ADS)
Dung, Lan-Rong; Lin, Meng-Chun
This paper presents a memory-efficient motion estimation (ME) technique for high-resolution video compression. The main objective is to reduce the external memory access, especially for limited local memory resource. The reduction of memory access can successfully save the notorious power consumption. The key to reduce the memory accesses is based on center-biased algorithm in that the center-biased algorithm performs the motion vector (MV) searching with the minimum search data. While considering the data reusability, the proposed dual-search-windowing (DSW) approaches use the secondary windowing as an option per searching necessity. By doing so, the loading of search windows can be alleviated and hence reduce the required external memory bandwidth. The proposed techniques can save up to 81% of external memory bandwidth and require only 135 MBytes/sec, while the quality degradation is less than 0.2dB for 720p HDTV clips coded at 8Mbits/sec.
Smeekens, Bridget A; Kane, Michael J
2016-11-01
Should executive control, as indicated by working memory capacity (WMC) and mind-wandering propensity, help or hinder creativity? Sustained and focused attention should help guide a selective search of solution-relevant information in memory and help inhibit uncreative, yet accessible, ideas. However, unfocused attention and daydreaming should allow mental access to more loosely relevant concepts, remotely linked to commonplace solutions. Three individual-differences studies inserted incubation periods into one or two divergent thinking tasks and tested whether WMC (assessed by complex span tasks) and incubation-period mind wandering (assessed as probed reports of task-unrelated thought [TUT]) predicted post-incubation performance. Retrospective self-reports of Openness (Experiment 2) and mind-wandering and daydreaming propensity (Experiment 3) complemented our thought-probe assessments of TUT. WMC did not correlate with creativity in divergent thinking, whereas only the questionnaire measure of daydreaming, but not probed thought reports, weakly predicted creativity; the fact that in-the-moment TUTs did not correlate divergent creativity is especially problematic for claims that mind-wandering processes contribute to creative cognition. Moreover, the fact that WMC tends to strongly predict analytical problem solving and reasoning, but may not correlate with divergent thinking, provides a useful boundary condition for defining WMC's nomological net. On balance, our data provide no support for either benefits or costs of executive control for at least one component of creativity.
Recognition memory probes affect what is remembered in schizophrenia.
Schwartz, Barbara L; Parker, Elizabeth S; Rosse, Richard B; Deutsch, Stephen I
2009-05-15
Cognitive psychology offers tools to localize the memory processes most vulnerable to disruption in schizophrenia and to identify how patients with schizophrenia best remember. In this research, we used the University of Southern California Repeatable Episodic Memory Test (USC-REMT; Parker, E.S., Landau, S.M., Whipple, S.C., Schwartz, B.L., 2004. Aging, recall, and recognition: A study on the sensitivity of the University of Southern California Repeatable Episodic Memory Test (USC-REMT). Journal of Clinical and Experimental Neuropsychology 26(3), 428-440.) to examine how two different recognition memory probes affect memory performance in patients with schizophrenia and matched controls. Patients with schizophrenia studied equivalent word lists and were tested by yes-no recognition and forced-choice recognition following identical encoding and storage conditions. Compared with controls, patients with schizophrenia were particularly impaired when tested by yes-no recognition relative to forced-choice recognition. Patients had greatest deficits on hits in yes-no recognition but did not exhibit elevated false alarms. The data point to the importance of retrieval processes in schizophrenia, and highlight the need for further research on ways to help patients with schizophrenia access what they have learned.
Application of a microcomputer-based system to control and monitor bacterial growth.
Titus, J A; Luli, G W; Dekleva, M L; Strohl, W R
1984-02-01
A modular microcomputer-based system was developed to control and monitor various modes of bacterial growth. The control system was composed of an Apple II Plus microcomputer with 64-kilobyte random-access memory; a Cyborg ISAAC model 91A multichannel analog-to-digital and digital-to-analog converter; paired MRR-1 pH, pO(2), and foam control units; and in-house-designed relay, servo control, and turbidimetry systems. To demonstrate the flexibility of the system, we grew bacteria under various computer-controlled and monitored modes of growth, including batch, turbidostat, and chemostat systems. The Apple-ISAAC system was programmed in Labsoft BASIC (extended Applesoft) with an average control program using ca. 6 to 8 kilobytes of memory and up to 30 kilobytes for datum arrays. This modular microcomputer-based control system was easily coupled to laboratory scale fermentors for a variety of fermentations.
Application of a Microcomputer-Based System to Control and Monitor Bacterial Growth
Titus, Jeffrey A.; Luli, Gregory W.; Dekleva, Michael L.; Strohl, William R.
1984-01-01
A modular microcomputer-based system was developed to control and monitor various modes of bacterial growth. The control system was composed of an Apple II Plus microcomputer with 64-kilobyte random-access memory; a Cyborg ISAAC model 91A multichannel analog-to-digital and digital-to-analog converter; paired MRR-1 pH, pO2, and foam control units; and in-house-designed relay, servo control, and turbidimetry systems. To demonstrate the flexibility of the system, we grew bacteria under various computer-controlled and monitored modes of growth, including batch, turbidostat, and chemostat systems. The Apple-ISAAC system was programmed in Labsoft BASIC (extended Applesoft) with an average control program using ca. 6 to 8 kilobytes of memory and up to 30 kilobytes for datum arrays. This modular microcomputer-based control system was easily coupled to laboratory scale fermentors for a variety of fermentations. PMID:16346462
Memory for flip-flopping: detection and recollection of political contradictions.
Putnam, Adam L; Wahlheim, Christopher N; Jacoby, Larry L
2014-10-01
During political campaigns, candidates often change their positions on controversial issues. Does changing positions create confusion and impair memory for a politician's current position? In 3 experiments, two political candidates held positions on controversial issues in two debates. Across the debates, their positions were repeated, changed, or held only in the second debate (control). Relative to the control condition, recall of the most recent position on issues was enhanced when change was detected and recollected, whereas recall was impaired when change was not recollected. Furthermore, examining the errors revealed that subjects were more likely to intrude a Debate 1 response than to recall a blend of the two positions, and that recollecting change decreased Debate 1 intrusions. We argue that detecting change produces a recursive representation that embeds the original position in memory along with the more recent position. Recollecting change then enhances memory for the politician's positions and their order of occurrence by accessing the recursive trace.
Accessibility Limits Recall from Visual Working Memory
ERIC Educational Resources Information Center
Rajsic, Jason; Swan, Garrett; Wilson, Daryl E.; Pratt, Jay
2017-01-01
In this article, we demonstrate limitations of accessibility of information in visual working memory (VWM). Recently, cued-recall has been used to estimate the fidelity of information in VWM, where the feature of a cued object is reproduced from memory (Bays, Catalao, & Husain, 2009; Wilken & Ma, 2004; Zhang & Luck, 2008). Response…
Physical principles and current status of emerging non-volatile solid state memories
NASA Astrophysics Data System (ADS)
Wang, L.; Yang, C.-H.; Wen, J.
2015-07-01
Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.
OS friendly microprocessor architecture: Hardware level computer security
NASA Astrophysics Data System (ADS)
Jungwirth, Patrick; La Fratta, Patrick
2016-05-01
We present an introduction to the patented OS Friendly Microprocessor Architecture (OSFA) and hardware level computer security. Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. Conventional microprocessors have depended on the Operating System for computer security and information assurance. The goal of the OS Friendly Architecture is to provide a high performance and secure microprocessor and OS system. We are interested in cyber security, information technology (IT), and SCADA control professionals reviewing the hardware level security features. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For light-weight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the cache memory pipeline provides for background cache read and write operations while the microprocessor's execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor's execution pipeline from accessing the same cache bank at the same time. This separation allows the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. Computer security operations are implemented in hardware. By extending Unix file permissions bits to each cache memory bank and memory address, the OSFA provides hardware level computer security.
Wu, Zhaomin; Wang, Na; Qian, Qiujin; Yang, Li; Qian, Ying; Liu, Lu; Liu, Yuxin; Cheng, Jia; Sun, Li; Cao, Qingjiu; Wang, Yufeng
2014-06-10
To explore the memory characteristic in boys with attention-deficit/hyperactivity disorder (ADHD) plus learning disability (LD). A total of 97 ADHD boys with comorbid LD (ADHD+LD), 97 ADHD boys without comorbid LD (ADHD-LD) and 97 healthy controls (based on the criteria of DSM-IV) were recruited from the outpatient clinic of Peking University Sixth Hospital from December 2003 to September 2012. Individuals across three groups were matched by ages, intelligence quotient (IQ) and ADHD subtypes. The Wechsler Memory Scale (WMS) was used to access the characteristics of several memory domains. ADHD +LD group performed the worst and control group the best in memory quotient (MQ) (90 ± 15 vs 98 ± 14 & 104 ± 14) and long-term memory domain ((36.0 ± 10.2) vs (42.1 ± 7.8) & (45.6 ± 6.7) score, all P < 0.05) . ADHD+LD group scored significantly lower than the control group in short-term memory ( (53.0 ± 9.2) vs (58.0 ± 9.7) score, P < 0.05) and immediate memory domains ((10.0 ± 3.3) vs (11.3 ± 3.5) score, P < 0.05). However, ADHD+LD group scored slightly but not significantly lower than the ADHD-LD group ((54.9 ± 10.7),(10.8 ± 3.2) score, P > 0.05). In most subscales of WMS, ADHD+LD group scored significantly lower than both ADHD-LD and control group in current information and orientation, mental control (1→100) , mental control (100→1) and associate learning subscales ( (8.8 ± 3.1) vs (10.0 ± 3.0) & (9.9 ± 2.3) score, (8.7 ± 4.1) vs (10.0 ± 3.9) & (11.1 ± 3.6) score, (10.7 ± 3.9) vs (12.9 ± 2.8) & (13.7 ± 2.2) score, (9.8 ± 3.1) vs (10.8 ± 2.6) & (11.1 ± 2.1) score, all P < 0.05) . In mental control (accumulation) subscale, all pairwise comparisons were statistically significant (all P < 0.05) . In subscales of figure memory, visual reproduction and digit span, ADHD+LD scored significantly lower than the control group (all P < 0.05), but not the ADHD-LD group (all P > 0.05). Boys with ADHD comorbid LD show deficits in overall memory function and long-term memory while short-term memory is partially damaged. Impairment in immediate memory is not detected.
NASA Astrophysics Data System (ADS)
Han, Yishi; Luo, Zhixiao; Wang, Jianhua; Min, Zhixuan; Qin, Xinyu; Sun, Yunlong
2014-09-01
In general, context-based adaptive variable length coding (CAVLC) decoding in H.264/AVC standard requires frequent access to the unstructured variable length coding tables (VLCTs) and significant memory accesses are consumed. Heavy memory accesses will cause high power consumption and time delays, which are serious problems for applications in portable multimedia devices. We propose a method for high-efficiency CAVLC decoding by using a program instead of all the VLCTs. The decoded codeword from VLCTs can be obtained without any table look-up and memory access. The experimental results show that the proposed algorithm achieves 100% memory access saving and 40% decoding time saving without degrading video quality. Additionally, the proposed algorithm shows a better performance compared with conventional CAVLC decoding, such as table look-up by sequential search, table look-up by binary search, Moon's method, and Kim's method.
Sparse distributed memory: Principles and operation
NASA Technical Reports Server (NTRS)
Flynn, M. J.; Kanerva, P.; Bhadkamkar, N.
1989-01-01
Sparse distributed memory is a generalized random access memory (RAM) for long (1000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment, in general, in dealing with real world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. Major design issues were resolved which were faced in building the memories. The design is described of a prototype memory with 256 bit addresses and from 8 to 128 K locations for 256 bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components.
NASA Technical Reports Server (NTRS)
Stehle, Roy H.; Ogier, Richard G.
1993-01-01
Alternatives for realizing a packet-based network switch for use on a frequency division multiple access/time division multiplexed (FDMA/TDM) geostationary communication satellite were investigated. Each of the eight downlink beams supports eight directed dwells. The design needed to accommodate multicast packets with very low probability of loss due to contention. Three switch architectures were designed and analyzed. An output-queued, shared bus system yielded a functionally simple system, utilizing a first-in, first-out (FIFO) memory per downlink dwell, but at the expense of a large total memory requirement. A shared memory architecture offered the most efficiency in memory requirements, requiring about half the memory of the shared bus design. The processing requirement for the shared-memory system adds system complexity that may offset the benefits of the smaller memory. An alternative design using a shared memory buffer per downlink beam decreases circuit complexity through a distributed design, and requires at most 1000 packets of memory more than the completely shared memory design. Modifications to the basic packet switch designs were proposed to accommodate circuit-switched traffic, which must be served on a periodic basis with minimal delay. Methods for dynamically controlling the downlink dwell lengths were developed and analyzed. These methods adapt quickly to changing traffic demands, and do not add significant complexity or cost to the satellite and ground station designs. Methods for reducing the memory requirement by not requiring the satellite to store full packets were also proposed and analyzed. In addition, optimal packet and dwell lengths were computed as functions of memory size for the three switch architectures.
Bäuml, Karl-Heinz T; Dobler, Ina M
2015-01-01
Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas recall specificity of the beneficial effect has not been examined to date. Addressing the issue, we compared in 2 experiments the effects of retrieval and restudy on recall of other items, when access to the study context was (largely) maintained and when access to the study context was impaired (in Experiment 1 by using the listwise directed-forgetting task, in Experiment 2 by using a prolonged retention interval). In both experiments, selective retrieval but not restudy induced forgetting of other items when context access was maintained, which replicates prior work. In contrast, when context access was impaired, both selective retrieval and restudy induced beneficial effects on other memories. These findings suggest that the detrimental but not the beneficial effect of selective memory retrieval is recall specific. The results are consistent with a recent 2-factor account of selective memory retrieval that attributes the detrimental effect to inhibition or blocking but the beneficial effect to context reactivation processes. PsycINFO Database Record (c) 2015 APA, all rights reserved.
Low latency memory access and synchronization
DOE Office of Scientific and Technical Information (OSTI.GOV)
Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.
A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less
Low latency memory access and synchronization
DOE Office of Scientific and Technical Information (OSTI.GOV)
Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.
A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Bach processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less
Enabling the High Level Synthesis of Data Analytics Accelerators
DOE Office of Scientific and Technical Information (OSTI.GOV)
Minutoli, Marco; Castellana, Vito G.; Tumeo, Antonino
Conventional High Level Synthesis (HLS) tools mainly tar- get compute intensive kernels typical of digital signal pro- cessing applications. We are developing techniques and ar- chitectural templates to enable HLS of data analytics appli- cations. These applications are memory intensive, present fine-grained, unpredictable data accesses, and irregular, dy- namic task parallelism. We discuss an architectural tem- plate based around a distributed controller to efficiently ex- ploit thread level parallelism. We present a memory in- terface that supports parallel memory subsystems and en- ables implementing atomic memory operations. We intro- duce a dynamic task scheduling approach to efficiently ex- ecute heavilymore » unbalanced workload. The templates are val- idated by synthesizing queries from the Lehigh University Benchmark (LUBM), a well know SPARQL benchmark.« less
Scalable quantum memory in the ultrastrong coupling regime.
Kyaw, T H; Felicetti, S; Romero, G; Solano, E; Kwek, L-C
2015-03-02
Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances.
Scalable quantum memory in the ultrastrong coupling regime
Kyaw, T. H.; Felicetti, S.; Romero, G.; Solano, E.; Kwek, L.-C.
2015-01-01
Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances. PMID:25727251
Daumas, Stephanie; Sandin, Johan; Chen, Karen S.; Kobayashi, Dione; Tulloch, Jane; Martin, Stephen J.; Games, Dora; Morris, Richard G.M.
2008-01-01
Two experiments were conducted to investigate the possibility of faster forgetting by PDAPP mice (a well-established model of Alzheimer’s disease as reported by Games and colleagues in an earlier paper). Experiment 1, using mice aged 13–16 mo, confirmed the presence of a deficit in a spatial reference memory task in the water maze by hemizygous PDAPP mice relative to littermate controls. However, after overtraining to a criterion of equivalent navigational performance, a series of memory retention tests revealed faster forgetting in the PDAPP group. Very limited retraining was sufficient to reinstate good memory in both groups, indicating that their faster forgetting may be due to retrieval failure rather than trace decay. In Experiment 2, 6-mo-old PDAPP and controls were required to learn each of a series of spatial locations to criterion with their memory assessed 10 min after learning each location. No memory deficit was apparent in the PDAPP mice initially, but a deficit built up through the series of locations suggestive of increased sensitivity to interference. Faster forgetting and increased interference may each reflect a difficulty in accessing memory traces. This interpretation of one aspect of the cognitive deficit in human mutant APP mice has parallels to deficits observed in patients with Alzheimer’s disease, further supporting the validity of transgenic models of the disease. PMID:18772249
Episodic memory impairment in Addison's disease: results from a telephonic cognitive assessment.
Henry, Michelle; Thomas, Kevin G F; Ross, Ian L
2014-06-01
Patients with Addison's disease frequently self-report memory and attention difficulties, even when on standard replacement therapy. However, few published studies examine, using objective measures and assessing across multiple domains, the cognitive functioning of Addison's disease patients relative to healthy controls. The primary aim of this study was to investigate whether the previously reported subjective cognitive deficits in Addison's disease are confirmed by objective measures. Conducting comprehensive neuropsychological assessments of patients with relatively rare clinical disorders, such as Addison's disease, is challenging because access to those patients is often limited, and because their medical condition might prevent extended testing sessions. Brief telephonic cognitive assessments are a useful tool in such circumstances. Hence, we administered the Brief Test of Adult Cognition by Telephone to 27 Addison's disease patients and 27 matched healthy controls. The instrument provides objective assessment of episodic memory, working memory, executive functioning, reasoning, and speed of processing. Statistical analyses confirmed that, as expected, patients performed significantly more poorly than controls on the episodic memory subtest. There were, however, no significant between-group differences on the attention, executive functioning, reasoning, and speed of processing subtests. Furthermore, patients with a longer duration of illness performed more poorly across all domains of cognition. We conclude that, for Addison's disease patients, previously reported subjective cognitive deficits are matched by objective impairment, but only in the domain of episodic memory. Future research might investigate (a) whether these memory deficits are material-specific (i.e., whether non-verbal memory is also affected), and (b) the neurobiological mechanisms underlying these deficits.
Plated wire random access memories
NASA Technical Reports Server (NTRS)
Gouldin, L. D.
1975-01-01
A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.
The Dynamics of Access to Groups in Working Memory
ERIC Educational Resources Information Center
Farrell, Simon; Lelievre, Anna
2012-01-01
The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the…
Multi-wavelength access gate for WDM-formatted words in optical RAM row architectures
NASA Astrophysics Data System (ADS)
Fitsios, D.; Alexoudi, T.; Vagionas, C.; Miliou, A.; Kanellos, G. T.; Pleros, N.
2013-03-01
Optical RAM has emerged as a promising solution for overcoming the "Memory Wall" of electronics, indicating the use of light in RAM architectures as the approach towards enabling ps-regime memory access times. Taking a step further towards exploiting the unique wavelength properties of optical signals, we reveal new architectural perspectives in optical RAM structures by introducing WDM principles in the storage area. To this end, we demonstrate a novel SOAbased multi-wavelength Access Gate for utilization in a 4x4 WDM optical RAM bank architecture. The proposed multiwavelength Access Gate can simultaneously control random access to a 4-bit optical word, exploiting Cross-Gain-Modulation (XGM) to process 8 Bit and Bit channels encoded in 8 different wavelengths. It also suggests simpler optical RAM row architectures, allowing for the effective sharing of one multi-wavelength Access Gate for each row, substituting the eight AGs in the case of conventional optical RAM architectures. The scheme is shown to support 10Gbit/s operation for the incoming 4-bit data streams, with a power consumption of 15mW/Gbit/s. All 8 wavelength channels demonstrate error-free operation with a power penalty lower than 3 dB for all channels, compared to Back-to-Back measurements. The proposed optical RAM architecture reveals that exploiting the WDM capabilities of optical components can lead to RAM bank implementations with smarter column/row encoders/decoders, increased circuit simplicity, reduced number of active elements and associated power consumption. Moreover, exploitation of the wavelength entity can release significant potential towards reconfigurable optical cache mapping schemes when using the wavelength dimension for memory addressing.
Performance of FORTRAN floating-point operations on the Flex/32 multicomputer
NASA Technical Reports Server (NTRS)
Crockett, Thomas W.
1987-01-01
A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory.
Federal Register 2010, 2011, 2012, 2013, 2014
2012-03-16
... sole responsibility of the museum, institution or Federal agency that has control of the Native... Department of Anthropology professional staff in consultation with representatives of the Confederated Tribes... Memorial Washington State Museum (Burke Museum) accession ledger, Daugherty collected two femora and one...
FPGA cluster for high-performance AO real-time control system
NASA Astrophysics Data System (ADS)
Geng, Deli; Goodsell, Stephen J.; Basden, Alastair G.; Dipper, Nigel A.; Myers, Richard M.; Saunter, Chris D.
2006-06-01
Whilst the high throughput and low latency requirements for the next generation AO real-time control systems have posed a significant challenge to von Neumann architecture processor systems, the Field Programmable Gate Array (FPGA) has emerged as a long term solution with high performance on throughput and excellent predictability on latency. Moreover, FPGA devices have highly capable programmable interfacing, which lead to more highly integrated system. Nevertheless, a single FPGA is still not enough: multiple FPGA devices need to be clustered to perform the required subaperture processing and the reconstruction computation. In an AO real-time control system, the memory bandwidth is often the bottleneck of the system, simply because a vast amount of supporting data, e.g. pixel calibration maps and the reconstruction matrix, need to be accessed within a short period. The cluster, as a general computing architecture, has excellent scalability in processing throughput, memory bandwidth, memory capacity, and communication bandwidth. Problems, such as task distribution, node communication, system verification, are discussed.
Ferroelectric symmetry-protected multibit memory cell
NASA Astrophysics Data System (ADS)
Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.
2017-02-01
The tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valued non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jang, Peong-Hwa; Lee, Seo-Won, E-mail: swlee-sci@korea.ac.kr, E-mail: kj-lee@korea.ac.kr; Song, Kyungmi
2015-11-16
Interfacial Dzyaloshinskii-Moriya interaction in ferromagnet/heavy metal bilayers is recently of considerable interest as it offers an efficient control of domain walls and the stabilization of magnetic skyrmions. However, its effect on the performance of perpendicular spin transfer torque memory has not been explored yet. We show based on numerical studies that the interfacial Dzyaloshinskii-Moriya interaction decreases the thermal energy barrier while increases the switching current. As high thermal energy barrier as well as low switching current is required for the commercialization of spin torque memory, our results suggest that the interfacial Dzyaloshinskii-Moriya interaction should be minimized for spin torque memorymore » applications.« less
Arcego, Danusa Mar; Krolow, Rachel; Lampert, Carine; Toniazzo, Ana Paula; Berlitz, Carolina; Lazzaretti, Camilla; Schmitz, Felipe; Rodrigues, André Felipe; Wyse, Angela T S; Dalmaz, Carla
2016-05-01
Environmental factors, like early exposure to stressors or high caloric diets, can alter the early programming of central nervous system, leading to long-term effects on cognitive function, increased vulnerability to cognitive decline and development of psychopathologies later in life. The interaction between these factors and their combined effects on brain structure and function are still not completely understood. In this study, we evaluated long-term effects of social isolation in the prepubertal period, with or without chronic high fat diet access, on memory and on neurochemical markers in the prefrontal cortex of rats. We observed that early social isolation led to impairment in short-term and working memory in adulthood, and to reductions of Na(+),K(+)-ATPase activity and the immunocontent of phospho-AKT, in prefrontal cortex. Chronic exposure to a high fat diet impaired short-term memory (object recognition), and decreased BDNF levels in that same brain area. Remarkably, the association of social isolation with chronic high fat diet rescued the memory impairment on the object recognition test, as well as the changes in BDNF levels, Na(+),K(+)-ATPase activity, MAPK, AKT and phospho-AKT to levels similar to the control-chow group. In summary, these findings showed that a brief social isolation period and access to a high fat diet during a sensitive developmental period might cause memory deficits in adulthood. On the other hand, the interplay between isolation and high fat diet access caused a different brain programming, preventing some of the effects observed when these factors are separately applied. Copyright © 2016 ISDN. Published by Elsevier Ltd. All rights reserved.
Cognitive training on stroke patients via virtual reality-based serious games.
Gamito, Pedro; Oliveira, Jorge; Coelho, Carla; Morais, Diogo; Lopes, Paulo; Pacheco, José; Brito, Rodrigo; Soares, Fabio; Santos, Nuno; Barata, Ana Filipa
2017-02-01
Use of virtual reality environments in cognitive rehabilitation offers cost benefits and other advantages. In order to test the effectiveness of a virtual reality application for neuropsychological rehabilitation, a cognitive training program using virtual reality was applied to stroke patients. A virtual reality-based serious games application for cognitive training was developed, with attention and memory tasks consisting of daily life activities. Twenty stroke patients were randomly assigned to two conditions: exposure to the intervention, and waiting list control. The results showed significant improvements in attention and memory functions in the intervention group, but not in the controls. Overall findings provide further support for the use of VR cognitive training applications in neuropsychological rehabilitation. Implications for Rehabilitation Improvements in memory and attention functions following a virtual reality-based serious games intervention. Training of daily-life activities using a virtual reality application. Accessibility to training contents.
Store operation with conditional push of a tag value to a queue
Heidelberger, Philip; Steinmacher-Burow, Burkhard
2015-07-28
According to one embodiment, a method for a store operation with a conditional push of a tag value to a queue is provided. The method includes configuring a queue that is accessible by an application, setting a value at an address in a memory device including a memory and a controller, receiving a request for an operation using the value at the address and performing the operation. The method also includes the controller writing a result of the operation to the address, thus changing the value at the address, the controller determining if the result of the operation meets a condition and the controller pushing a tag value to the queue based on the condition being met, where the tag value in the queue indicates to the application that the condition is met.
Origin of negative resistance in anion migration controlled resistive memory
NASA Astrophysics Data System (ADS)
Banerjee, Writam; Wu, Facai; Hu, Yuan; Wu, Quantan; Wu, Zuheng; Liu, Qi; Liu, Ming
2018-03-01
Resistive random access memory (RRAM) is one of the most promising emerging nonvolatile technologies for the futuristic memory devices. Resistive switching behavior often shows negative resistance (NR), either voltage controlled or current controlled. In this work, the origin of a current compliance dependent voltage controlled NR effect during the resetting of anion migration based RRAM devices is discussed. The N-type voltage controlled NR is a high field driven phenomena. The current conduction within the range of a certain negative voltage is mostly dominated by space charge limited current. But with the higher negative voltage, a field induced tunneling effect is generated in the NR region. The voltage controlled NR is strongly dependent on the compliance current. The area independent behavior indicates the filamentary switching. The peak to valley ratio (PVR) is > 5. The variation of PVR as a function of the conduction band offset is achieved. Compared to other reported works, based on the PVR, it is possible to distinguish the RRAM types. Generally, due to the higher electric field effect on the metallic bridge during RESET, the electrochemical metallization type RRAM shows much higher PVR than the valance change type RRAM.
Are Judgments of Semantic Relatedness Systematically Impaired in Alzheimer's Disease?
ERIC Educational Resources Information Center
Hornberger, M.; Bell, B.; Graham, K. S.; Rogers, T. T.
2009-01-01
We employed a triadic comparison task in patients with Alzheimer's disease (AD) and healthy controls to contrast (a) multidimensional scaling (MDS) and accuracy-based assessments of semantic memory, and (b) degraded-store versus degraded-access accounts of semantic impairment in Alzheimer's disease (AD). Similar to other studies using triadic…
Hardware packet pacing using a DMA in a parallel computer
Chen, Dong; Heidelberger, Phillip; Vranas, Pavlos
2013-08-13
Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.
Federal Register 2010, 2011, 2012, 2013, 2014
2012-05-07
... patents. 73 FR 75131. The principal respondent was NVIDIA Corporation of Santa Clara, California (``NVIDIA''). Joining NVIDIA as respondents were approximately twenty of NVIDIA's customers. The Commission found a... accused products in the United States: NVIDIA; Hewlett-Packard Co. of Palo Alto, California; ASUS Computer...
Some pitfalls in measuring memory in animals.
Thorpe, Christina M; Jacova, Claudia; Wilkie, Donald M
2004-11-01
Because the presence or absence of memories in the brain cannot be directly observed, scientists must rely on indirect measures and use inferential reasoning to make statements about the status of memories. In humans, memories are often accessed through spoken or written language. In animals, memory is accessed through overt behaviours such as running down an arm in a maze, pressing a lever, or visiting a food cache site. Because memory is measured by these indirect methods, errors in the veracity of statements about memory can occur. In this brief paper, we identify three areas that may serve as pitfalls in reasoning about memory in animals: (1) the presence of 'silent associations', (2) intrusions of species-typical behaviours on memory tasks, and (3) improper mapping between human and animals memory tasks. There are undoubtedly other areas in which scientists should act cautiously when reasoning about the status of memory.
A Decision Model for Selection of Microcomputers and Operating Systems.
1984-06-01
is resilting in application software (for microccmputers) being developed almost exclu- sively tor the IBM PC and compatiole systems. NAVDAC ielt that...location can be indepen- dently accessed. RAN memory is also often called read/ write memory, hecause new information can be written into and read from...when power is lost; this is also read/ write memory. Bubble memory, however, has significantly slower access times than RAM or RON and also is not preva
MemAxes: Visualization and Analytics for Characterizing Complex Memory Performance Behaviors.
Gimenez, Alfredo; Gamblin, Todd; Jusufi, Ilir; Bhatele, Abhinav; Schulz, Martin; Bremer, Peer-Timo; Hamann, Bernd
2018-07-01
Memory performance is often a major bottleneck for high-performance computing (HPC) applications. Deepening memory hierarchies, complex memory management, and non-uniform access times have made memory performance behavior difficult to characterize, and users require novel, sophisticated tools to analyze and optimize this aspect of their codes. Existing tools target only specific factors of memory performance, such as hardware layout, allocations, or access instructions. However, today's tools do not suffice to characterize the complex relationships between these factors. Further, they require advanced expertise to be used effectively. We present MemAxes, a tool based on a novel approach for analytic-driven visualization of memory performance data. MemAxes uniquely allows users to analyze the different aspects related to memory performance by providing multiple visual contexts for a centralized dataset. We define mappings of sampled memory access data to new and existing visual metaphors, each of which enabling a user to perform different analysis tasks. We present methods to guide user interaction by scoring subsets of the data based on known performance problems. This scoring is used to provide visual cues and automatically extract clusters of interest. We designed MemAxes in collaboration with experts in HPC and demonstrate its effectiveness in case studies.
Smeekens, Bridget A.; Kane, Michael J.
2015-01-01
Should executive control, as indicated by working memory capacity (WMC) and mind-wandering propensity, help or hinder creativity? Sustained and focused attention should help guide a selective search of solution-relevant information in memory and help inhibit uncreative, yet accessible, ideas. However, unfocused attention and daydreaming should allow mental access to more loosely relevant concepts, remotely linked to commonplace solutions. Three individual-differences studies inserted incubation periods into one or two divergent thinking tasks and tested whether WMC (assessed by complex span tasks) and incubation-period mind wandering (assessed as probed reports of task-unrelated thought [TUT]) predicted post-incubation performance. Retrospective self-reports of Openness (Experiment 2) and mind-wandering and daydreaming propensity (Experiment 3) complemented our thought-probe assessments of TUT. WMC did not correlate with creativity in divergent thinking, whereas only the questionnaire measure of daydreaming, but not probed thought reports, weakly predicted creativity; the fact that in-the-moment TUTs did not correlate divergent creativity is especially problematic for claims that mind-wandering processes contribute to creative cognition. Moreover, the fact that WMC tends to strongly predict analytical problem solving and reasoning, but may not correlate with divergent thinking, provides a useful boundary condition for defining WMC’s nomological net. On balance, our data provide no support for either benefits or costs of executive control for at least one component of creativity. PMID:28458764
Marx, Svenja; Gruenhage, Gina; Walper, Daniel; Rutishauser, Ueli; Einhäuser, Wolfgang
2015-01-01
Competition is ubiquitous in perception. For example, items in the visual field compete for processing resources, and attention controls their priority (biased competition). The inevitable ambiguity in the interpretation of sensory signals yields another form of competition: distinct perceptual interpretations compete for access to awareness. Rivalry, where two equally likely percepts compete for dominance, explicates the latter form of competition. Building upon the similarity between attention and rivalry, we propose to model rivalry by a generic competitive circuit that is widely used in the attention literature—a winner-take-all (WTA) network. Specifically, we show that a network of two coupled WTA circuits replicates three common hallmarks of rivalry: the distribution of dominance durations, their dependence on input strength (“Levelt's propositions”), and the effects of stimulus removal (blanking). This model introduces a form of memory by forming discrete states and explains experimental data better than competitive models of rivalry without memory. This result supports the crucial role of memory in rivalry specifically and in competitive processes in general. Our approach unifies the seemingly distinct phenomena of rivalry, memory, and attention in a single model with competition as the common underlying principle. PMID:25581077
Preventing messaging queue deadlocks in a DMA environment
Blocksome, Michael A; Chen, Dong; Gooding, Thomas; Heidelberger, Philip; Parker, Jeff
2014-01-14
Embodiments of the invention may be used to manage message queues in a parallel computing environment to prevent message queue deadlock. A direct memory access controller of a compute node may determine when a messaging queue is full. In response, the DMA may generate and interrupt. An interrupt handler may stop the DMA and swap all descriptors from the full messaging queue into a larger queue (or enlarge the original queue). The interrupt handler then restarts the DMA. Alternatively, the interrupt handler stops the DMA, allocates a memory block to hold queue data, and then moves descriptors from the full messaging queue into the allocated memory block. The interrupt handler then restarts the DMA. During a normal messaging advance cycle, a messaging manager attempts to inject the descriptors in the memory block into other messaging queues until the descriptors have all been processed.
NASA Astrophysics Data System (ADS)
Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng
2018-04-01
A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.
An Investigation of Unified Memory Access Performance in CUDA
Landaverde, Raphael; Zhang, Tiansheng; Coskun, Ayse K.; Herbordt, Martin
2015-01-01
Managing memory between the CPU and GPU is a major challenge in GPU computing. A programming model, Unified Memory Access (UMA), has been recently introduced by Nvidia to simplify the complexities of memory management while claiming good overall performance. In this paper, we investigate this programming model and evaluate its performance and programming model simplifications based on our experimental results. We find that beyond on-demand data transfers to the CPU, the GPU is also able to request subsets of data it requires on demand. This feature allows UMA to outperform full data transfer methods for certain parallel applications and small data sizes. We also find, however, that for the majority of applications and memory access patterns, the performance overheads associated with UMA are significant, while the simplifications to the programming model restrict flexibility for adding future optimizations. PMID:26594668
ERIC Educational Resources Information Center
Reichelt, Amy C.; Morris, Margaret J.; Westbrook, Reginald Frederick
2016-01-01
High sugar diets reduce hippocampal neurogenesis, which is required for minimizing interference between memories, a process that involves "pattern separation." We provided rats with 2 h daily access to a sucrose solution for 28 d and assessed their performance on a spatial memory task. Sucrose consuming rats discriminated between objects…
ERIC Educational Resources Information Center
Ball, B. Hunter; DeWitt, Michael R.; Knight, Justin B.; Hicks, Jason L.
2014-01-01
The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were "related" to the target item but never actually studied.…
Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.
Chacón, Alejandro; Marco-Sola, Santiago; Espinosa, Antonio; Ribeca, Paolo; Moure, Juan Carlos
2015-01-01
The recent advent of high-throughput sequencing machines producing big amounts of short reads has boosted the interest in efficient string searching techniques. As of today, many mainstream sequence alignment software tools rely on a special data structure, called the FM-index, which allows for fast exact searches in large genomic references. However, such searches translate into a pseudo-random memory access pattern, thus making memory access the limiting factor of all computation-efficient implementations, both on CPUs and GPUs. Here, we show that several strategies can be put in place to remove the memory bottleneck on the GPU: more compact indexes can be implemented by having more threads work cooperatively on larger memory blocks, and a k-step FM-index can be used to further reduce the number of memory accesses. The combination of those and other optimisations yields an implementation that is able to process about two Gbases of queries per second on our test platform, being about 8 × faster than a comparable multi-core CPU version, and about 3 × to 5 × faster than the FM-index implementation on the GPU provided by the recently announced Nvidia NVBIO bioinformatics library.
Paging memory from random access memory to backing storage in a parallel computer
Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E
2013-05-21
Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.
NASA Technical Reports Server (NTRS)
Bailey, G. A.
1976-01-01
Optical and magnetic variants in the design of trillion-bit read/write memories are compared and tabulated. Components and materials suitable for a random access read/write nonmoving memory system are examined, with preference given to holography and photoplastic materials. Advantages and deficiencies of photoplastics are reviewed. Holographic page composer design, essential features of an optical memory with no moving parts, fiche-oriented random access memory design, and materials suitable for an efficient photoplastic fiche are considered. The optical variants offer advantages in lower volume and weight at data transfer rates near 1 Mbit/sec, but power drain is of the same order as for the magnetic variants (tape memory, disk memory). The mechanical properties of photoplastic film materials still leave much to be desired.
Effects of a multimedia project on users' knowledge about normal forgetting and serious memory loss.
Mahoney, Diane Feeney; Tarlow, Barbara J; Jones, Richard N; Sandaire, Johnny
2002-01-01
The aim of the project was to develop and evaluate the effectiveness of a CD-ROM-based multimedia program as a tool to increase user's knowledge about the differences between "normal" forgetfulness and more serious memory loss associated with Alzheimer's disease. The research was a controlled randomized study conducted with 113 adults who were recruited from the community and who expressed a concern about memory loss in a family member. The intervention group (n=56) viewed a module entitled "Forgetfulness: What's Normal and What's Not" on a laptop computer in their homes; the control group (n=57) did not. Both groups completed a 25-item knowledge-about-memory-loss test (primary outcome) and a sociodemographic and technology usage questionnaire; the intervention group also completed a CD-ROM user's evaluation. The mean (SD) number of correct responses to the knowledge test was 14.2 (4.5) for controls and 19.7 (3.1) for intervention participants. This highly significant difference (p<0.001) corresponds to a very large effect size. The program was most effective for participants with a lower level of self-reported prior knowledge about memory loss and Alzheimer's disease (p=0.02). Viewers were very satisfied with the program and felt that it was easy to use and understand. They particularly valued having personal access to a confidential source that permitted them to become informed about memory loss without public disclosure. This multimedia CD-ROM technology program provides an efficient and effective means of teaching older adults about memory loss and ways to distinguish benign from serious memory loss. It uniquely balances public community outreach education and personal privacy.
BCH codes for large IC random-access memory systems
NASA Technical Reports Server (NTRS)
Lin, S.; Costello, D. J., Jr.
1983-01-01
In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-06-16
... Static Random Access Memories and Products Containing Same, DN 2816; the Commission is soliciting... importation of certain static random access memories and products containing same. The complaint names as...
Providing the Public with Online Access to Large Bibliographic Data Bases.
ERIC Educational Resources Information Center
Firschein, Oscar; Summit, Roger K.
DIALOG, an interactive, computer-based information retrieval language, consists of a series of computer programs designed to make use of direct access memory devices in order to provide the user with a rapid means of identifying records within a specific memory bank. Using the system, a library user can be provided access to sixteen distinct and…
Episodic, generalized, and semantic memory tests: switching and strength effects.
Humphreys, Michael S; Murray, Krista L
2011-09-01
We continue the process of investigating the probabilistic paired associate paradigm in an effort to understand the memory access control processes involved and to determine whether the memory structure produced is in transition between episodic and semantic memory. In this paradigm two targets are probabilistically paired with a cue across a large number of short lists. Participants can recall the target paired with the cue in the most recent list (list specific test), produce the first of the two targets that have been paired with that cue to come to mind (generalised test), and produce a free association response (semantic test). Switching between a generalised test and a list specific test did not produce a switching cost indicating a general similarity in the control processes involved. In addition, there was evidence for a dissociation between two different strength manipulations (amount of study time and number of cue-target pairings) such that number of pairings influenced the list specific, generalised and the semantic test but amount of study time only influenced the list specific and generalised test. © 2011 Canadian Psychological Association
Jiang, Xiaofan; Ma, Zhongyuan; Xu, Jun; Chen, Kunji; Xu, Ling; Li, Wei; Huang, Xinfan; Feng, Duan
2015-01-01
The realization of ultra-low power Si-based resistive switching memory technology will be a milestone in the development of next generation non-volatile memory. Here we show that a high performance and ultra-low power resistive random access memory (RRAM) based on an Al/a-SiNx:H/p+-Si structure can be achieved by tuning the Si dangling bond conduction paths. We reveal the intrinsic relationship between the Si dangling bonds and the N/Si ratio x for the a-SiNx:H films, which ensures that the programming current can be reduced to less than 1 μA by increasing the value of x. Theoretically calculated current-voltage (I–V ) curves combined with the temperature dependence of the I–V characteristics confirm that, for the low-resistance state (LRS), the Si dangling bond conduction paths obey the trap-assisted tunneling model. In the high-resistance state (HRS), conduction is dominated by either hopping or Poole–Frenkel (P–F) processes. Our introduction of hydrogen in the a-SiNx:H layer provides a new way to control the Si dangling bond conduction paths, and thus opens up a research field for ultra-low power Si-based RRAM. PMID:26508086
Jiang, Xiaofan; Ma, Zhongyuan; Xu, Jun; Chen, Kunji; Xu, Ling; Li, Wei; Huang, Xinfan; Feng, Duan
2015-10-28
The realization of ultra-low power Si-based resistive switching memory technology will be a milestone in the development of next generation non-volatile memory. Here we show that a high performance and ultra-low power resistive random access memory (RRAM) based on an Al/a-SiNx:H/p(+)-Si structure can be achieved by tuning the Si dangling bond conduction paths. We reveal the intrinsic relationship between the Si dangling bonds and the N/Si ratio x for the a-SiNx:H films, which ensures that the programming current can be reduced to less than 1 μA by increasing the value of x. Theoretically calculated current-voltage (I-V) curves combined with the temperature dependence of the I-V characteristics confirm that, for the low-resistance state (LRS), the Si dangling bond conduction paths obey the trap-assisted tunneling model. In the high-resistance state (HRS), conduction is dominated by either hopping or Poole-Frenkel (P-F) processes. Our introduction of hydrogen in the a-SiNx:H layer provides a new way to control the Si dangling bond conduction paths, and thus opens up a research field for ultra-low power Si-based RRAM.
Ferroelectric symmetry-protected multibit memory cell
Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.
2017-02-08
Here, the tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valuedmore » non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.« less
Social Desirability Bias in Smoking Cessation: Effects in the Laboratory and Field
2012-03-16
and Child Health Journal, 2(2), 77-83. Bradburn, N., Rips, L., & Shevell, S. (1987). Answering autobiographical questions: the impact of memory ...how accessible smoking outcomes are in an individual’s memory . Research has shown that smokers tend to exhibit greater accessibility for positive...body of research that suggests that acute tobacco abstinence hinders cognitive functioning, such as attention, memory , information processing
Fast Magnetoresistive Random-Access Memory
NASA Technical Reports Server (NTRS)
Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.
1991-01-01
Magnetoresistive binary digital memories of proposed new type expected to feature high speed, nonvolatility, ability to withstand ionizing radiation, high density, and low power. In memory cell, magnetoresistive effect exploited more efficiently by use of ferromagnetic material to store datum and adjacent magnetoresistive material to sense datum for readout. Because relative change in sensed resistance between "zero" and "one" states greater, shorter sampling and readout access times achievable.
Kokkos: Enabling manycore performance portability through polymorphic memory access patterns
Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel
2014-07-22
The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less
Both Handwriting Speed and Selective Attention Are Important to Lecture Note-Taking
ERIC Educational Resources Information Center
Peverly, Stephen T.; Garner, Joanna K.; Vekaria, Pooja C.
2014-01-01
The primary purpose of this investigation was to evaluate the relationship of handwriting speed, fine motor fluency, speed of verbal access, language comprehension, working memory, and attention (executive control; selective) to note-taking and all of the aforementioned variables to test performance (written recall). A second purpose was to…
Accessing global data from accelerator devices
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.
Application of phase-change materials in memory taxonomy.
Wang, Lei; Tu, Liang; Wen, Jing
2017-01-01
Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.
A Cerebellar-model Associative Memory as a Generalized Random-access Memory
NASA Technical Reports Server (NTRS)
Kanerva, Pentti
1989-01-01
A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.
Accessing global data from accelerator devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less
Tehan, Gerald; Fogarty, Gerard; Ryan, Katherine
2004-07-01
Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the participant population, have suggested other contributors to span performance. In the present research, we used structural equation modeling to explore, at the construct level, individual differences in immediate serial recall with respect to rehearsal, search, phonological coding, and speed of access to lexical memory. We replicated standard short-term phenomena; we showed that the variables that influence children's span performance influence adult performance in the same way; and we showed that speed of access to lexical memory and facility with phonological codes appear to be more potent sources of individual differences in immediate memory than is either rehearsal speed or search factors.
Cole, Scott N; Morrison, Catriona M; Barak, Ohr; Pauly-Takacs, Katalin; Conway, Martin A
2016-06-01
To examine the impact of memory accessibility on episodic future thinking. Single-case study of neurological patient HCM and an age-matched comparison group of neurologically Healthy Controls. We administered a full battery of tests assessing general intelligence, memory, and executive functioning. To assess autobiographical memory, the Autobiographical Memory Interview (Kopelman, Wilson, & Baddeley, 1990. The Autobiographical Memory Interview. Bury St. Edmunds, UK: Thames Valley Test Company) was administered. The Past Episodic and Future Episodic sections of Dalla Barba's Confabulation Battery (Dalla Barba, 1993, Cogn. Neuropsychol., 1, 1) and a specifically tailored Mental Time Travel Questionnaire were administered to assess future thinking in HCM and age-matched controls. HCM presented with a deficit in forming new memories (anterograde amnesia) and recalling events from before the onset of neurological impairment (retrograde amnesia). HCM's autobiographical memory impairments are characterized by a paucity of memories from Recent Life. In comparison with controls, two features of his future thoughts are apparent: Reduced episodic future thinking and outdated content of his episodic future thoughts. This article suggests neuropsychologists should look beyond popular conceptualizations of the past-future relation in amnesia via focussing on reduced future thinking. Investigating both the quantity and quality of future thoughts produced by amnesic patients may lead to developments in understanding the complex nature of future thinking disorders resulting from memory impairments. We highlight the clinical importance of examining the content of future thoughts in amnesic patients, rather than only its quantitative reduction. We propose an explanation of how quantitative and qualitative aspects of future thinking could be affected by amnesia. This could provide a useful approach to understand clinical cases of impaired prospection. Systematic group investigations are required to fully examine our hypothesis. Although the current study utilized typical future thinking measures, these may be limited and we highlight the need to develop clinically relevant measures of prospection. © 2015 The British Psychological Society.
NASA Technical Reports Server (NTRS)
Wilson, William C.
1999-01-01
The NASA Langley Research Center's Wind Tunnel Reinvestment project plans to shrink the existing data acquisition electronics to fit inside a wind tunnel model. Space limitations within a model necessitate a distributed system of Application Specific Integrated Circuits (ASICs) rather than a centralized system based on PC boards. This thesis will focus on the design of the prototype of the communication Controller board. A portion of the communication Controller board is to be used as the basis of an ASIC design. The communication Controller board will communicate between the internal model modules and the external data acquisition computer. This board is based around an Field Programmable Gate Array (FPGA), to allow for reconfigurability. In addition to the FPGA, this board contains buffer Random Access Memory (RAM), configuration memory (EEPROM), drivers for the communications ports, and passive components.
Kelly, Michelle E; Duff, Hollie; Kelly, Sara; McHugh Power, Joanna E; Brennan, Sabina; Lawlor, Brian A; Loughrey, David G
2017-12-19
Social relationships, which are contingent on access to social networks, promote engagement in social activities and provide access to social support. These social factors have been shown to positively impact health outcomes. In the current systematic review, we offer a comprehensive overview of the impact of social activities, social networks and social support on the cognitive functioning of healthy older adults (50+) and examine the differential effects of aspects of social relationships on various cognitive domains. We followed PRISMA (Preferred Reporting Items for Systematic Reviews and Meta-Analysis) guidelines, and collated data from randomised controlled trials (RCTs), genetic and observational studies. Independent variables of interest included subjective measures of social activities, social networks, and social support, and composite measures of social relationships (CMSR). The primary outcome of interest was cognitive function divided into domains of episodic memory, semantic memory, overall memory ability, working memory, verbal fluency, reasoning, attention, processing speed, visuospatial abilities, overall executive functioning and global cognition. Thirty-nine studies were included in the review; three RCTs, 34 observational studies, and two genetic studies. Evidence suggests a relationship between (1) social activity and global cognition and overall executive functioning, working memory, visuospatial abilities and processing speed but not episodic memory, verbal fluency, reasoning or attention; (2) social networks and global cognition but not episodic memory, attention or processing speed; (3) social support and global cognition and episodic memory but not attention or processing speed; and (4) CMSR and episodic memory and verbal fluency but not global cognition. The results support prior conclusions that there is an association between social relationships and cognitive function but the exact nature of this association remains unclear. Implications of the findings are discussed and suggestions for future research provided. PROSPERO 2012: CRD42012003248 .
1980-11-01
4006 DMAE Direct Memory Access Enable: ’Ibis command enables direct memory access (DMA). 4007 I)MAi) Direct Memory Access Disable: This command...72 DLI 72 DLR 72 DM 111 DMAD 30 DMAE 30 DMR 111 ONEG 103 DR 117 DS 104 OSAR 53 141 373 ’., M1L-STD-1750A (USAF) 2 July 1980 OSBI 29 OSCR 54 OSIC 48...in 4.7.7, the connectors shall show no defects detrimental to the operation of the connectors and shall A-7 461 -meet the subsequent test requirements
Aspects of GPU perfomance in algorithms with random memory access
NASA Astrophysics Data System (ADS)
Kashkovsky, Alexander V.; Shershnev, Anton A.; Vashchenkov, Pavel V.
2017-10-01
The numerical code for solving the Boltzmann equation on the hybrid computational cluster using the Direct Simulation Monte Carlo (DSMC) method showed that on Tesla K40 accelerators computational performance drops dramatically with increase of percentage of occupied GPU memory. Testing revealed that memory access time increases tens of times after certain critical percentage of memory is occupied. Moreover, it seems to be the common problem of all NVidia's GPUs arising from its architecture. Few modifications of the numerical algorithm were suggested to overcome this problem. One of them, based on the splitting the memory into "virtual" blocks, resulted in 2.5 times speed up.
Hardman, Kyle; Cowan, Nelson
2014-01-01
Visual working memory stores stimuli from our environment as representations that can be accessed by high-level control processes. This study addresses a longstanding debate in the literature about whether storage limits in visual working memory include a limit to the complexity of discrete items. We examined the issue with a number of change-detection experiments that used complex stimuli which possessed multiple features per stimulus item. We manipulated the number of relevant features of the stimulus objects in order to vary feature load. In all of our experiments, we found that increased feature load led to a reduction in change-detection accuracy. However, we found that feature load alone could not account for the results, but that a consideration of the number of relevant objects was also required. This study supports capacity limits for both feature and object storage in visual working memory. PMID:25089739
Molecular regulation of effector and memory T cell differentiation
Chang, John T; Wherry, E John; Goldrath, Ananda W
2015-01-01
Immunological memory is a cardinal feature of adaptive immunity and an important goal of vaccination strategies. Here we highlight advances in the understanding of the diverse T lymphocyte subsets that provide acute and long-term protection from infection. These include new insights into the transcription factors, and the upstream ‘pioneering’ factors that regulate their accessibility to key sites of gene regulation, as well as metabolic regulators that contribute to the differentiation of effector and memory subsets; ontogeny and defining characteristics of tissue-resident memory lymphocytes; and origins of the remarkable heterogeneity exhibited by activated T cells. Collectively, these findings underscore progress in delineating the underlying pathways that control diversification in T cell responses but also reveal gaps in the knowledge, as well as the challenges that arise in the application of this knowledge to rationally elicit desired T cell responses through vaccination and immunotherapy. PMID:25396352
Increasing available FIFO space to prevent messaging queue deadlocks in a DMA environment
Blocksome, Michael A [Rochester, MN; Chen, Dong [Croton On Hudson, NY; Gooding, Thomas [Rochester, MN; Heidelberger, Philip [Cortlandt Manor, NY; Parker, Jeff [Rochester, MN
2012-02-07
Embodiments of the invention may be used to manage message queues in a parallel computing environment to prevent message queue deadlock. A direct memory access controller of a compute node may determine when a messaging queue is full. In response, the DMA may generate an interrupt. An interrupt handler may stop the DMA and swap all descriptors from the full messaging queue into a larger queue (or enlarge the original queue). The interrupt handler then restarts the DMA. Alternatively, the interrupt handler stops the DMA, allocates a memory block to hold queue data, and then moves descriptors from the full messaging queue into the allocated memory block. The interrupt handler then restarts the DMA. During a normal messaging advance cycle, a messaging manager attempts to inject the descriptors in the memory block into other messaging queues until the descriptors have all been processed.
NASA Astrophysics Data System (ADS)
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto
2018-04-01
Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Popovici, M., E-mail: Mihaela.Ioana.Popovici@imec.be; Swerts, J.; Redolfi, A.
2014-02-24
Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are shown. The Ru/STO/Ru stack demonstrates clearly its potential to reach sub-20 nm technology nodes for dynamic random access memory. Downscaling of the equivalent oxide thickness, leakage current density (J{sub g}) of the MIMCAPs, and physical thickness of the STO have been realized by control of the Sr/Ti ratio and grain size using a heterogeneous TiO{sub 2}/STO based nanolaminate stack deposition and a two-step crystallization anneal. Replacement of TiN with Ru as both top and bottom electrodes reduces the amount of electricallymore » active defects and is essential to achieve a low leakage current in the MIM capacitor.« less
2015-08-01
metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes
Digital Equipment Corporation VAX/VMS Version 4.3
1986-07-30
operating system performs process-oriented paging that allows execution of programs that may be larger than the physical memory allocated to them... to higher privileged modes. (For an explanation of how the four access modes provide memory access protection see page 9, "Memory Management".) A... to optimize program performance for real-time applications or interactive environments. July 30, 1986 - 4 - Final Evaluation Report Digital VAX/VMS
Automatic humidification system to support the assessment of food drying processes
NASA Astrophysics Data System (ADS)
Ortiz Hernández, B. D.; Carreño Olejua, A. R.; Castellanos Olarte, J. M.
2016-07-01
This work shows the main features of an automatic humidification system to provide drying air that match environmental conditions of different climate zones. This conditioned air is then used to assess the drying process of different agro-industrial products at the Automation and Control for Agro-industrial Processes Laboratory of the Pontifical Bolivarian University of Bucaramanga, Colombia. The automatic system allows creating and improving control strategies to supply drying air under specified conditions of temperature and humidity. The development of automatic routines to control and acquire real time data was made possible by the use of robust control systems and suitable instrumentation. The signals are read and directed to a controller memory where they are scaled and transferred to a memory unit. Using the IP address is possible to access data to perform supervision tasks. One important characteristic of this automatic system is the Dynamic Data Exchange Server (DDE) to allow direct communication between the control unit and the computer used to build experimental curves.
NASA Astrophysics Data System (ADS)
Chien, Diana; Li, Xiang; Wong, Kin; Zurbuchen, Mark A.; Robbennolt, Shauna; Yu, Guoqiang; Tolbert, Sarah; Kioussis, Nicholas; Khalili Amiri, Pedram; Wang, Kang L.; Chang, Jane P.
2016-03-01
Compared with current-controlled magnetization switching in a perpendicular magnetic tunnel junction (MTJ), electric field- or voltage-induced magnetization switching reduces the writing energy of the memory cell, which also results in increased memory density. In this work, an ultra-thin PZT film with high dielectric constant was integrated into the tunneling oxide layer to enhance the voltage-controlled magnetic anisotropy (VCMA) effect. The growth of MTJ stacks with an MgO/PZT/MgO tunnel barrier was performed using a combination of sputtering and atomic layer deposition techniques. The fabricated MTJs with the MgO/PZT/MgO barrier demonstrate a VCMA coefficient, which is ˜40% higher (19.8 ± 1.3 fJ/V m) than the control sample MTJs with an MgO barrier (14.3 ± 2.7 fJ/V m). The MTJs with the MgO/PZT/MgO barrier also possess a sizeable tunneling magnetoresistance (TMR) of more than 50% at room temperature, comparable to the control MTJs with an MgO barrier. The TMR and enhanced VCMA effect demonstrated simultaneously in this work make the MgO/PZT/MgO barrier-based MTJs potential candidates for future voltage-controlled, ultralow-power, and high-density magnetic random access memory devices.
Microcomputer Software Engineering, Documentation and Evaluation
1981-03-31
local dealer or call for complete specificalons. eAUTOMATIC INC To proceed step by step, we need toUe G T A TOMA IC NC. know where we are going and a...MICROPROCESSOR normal sequence that should be DIRECT MEMORY ACCESS preserved in the documentation. For INTRODUCTION 2.2 DRIVE CONTROLS example, you...with linear, sequential logic (like a computer). It is also the verbal side and controls language. The right side specializes in images, music, pictures
NASA Astrophysics Data System (ADS)
Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng
2018-05-01
As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.
Memory Benchmarks for SMP-Based High Performance Parallel Computers
DOE Office of Scientific and Technical Information (OSTI.GOV)
Yoo, A B; de Supinski, B; Mueller, F
2001-11-20
As the speed gap between CPU and main memory continues to grow, memory accesses increasingly dominates the performance of many applications. The problem is particularly acute for symmetric multiprocessor (SMP) systems, where the shared memory may be accessed concurrently by a group of threads running on separate CPUs. Unfortunately, several key issues governing memory system performance in current systems are not well understood. Complex interactions between the levels of the memory hierarchy, buses or switches, DRAM back-ends, system software, and application access patterns can make it difficult to pinpoint bottlenecks and determine appropriate optimizations, and the situation is even moremore » complex for SMP systems. To partially address this problem, we formulated a set of multi-threaded microbenchmarks for characterizing and measuring the performance of the underlying memory system in SMP-based high-performance computers. We report our use of these microbenchmarks on two important SMP-based machines. This paper has four primary contributions. First, we introduce a microbenchmark suite to systematically assess and compare the performance of different levels in SMP memory hierarchies. Second, we present a new tool based on hardware performance monitors to determine a wide array of memory system characteristics, such as cache sizes, quickly and easily; by using this tool, memory performance studies can be targeted to the full spectrum of performance regimes with many fewer data points than is otherwise required. Third, we present experimental results indicating that the performance of applications with large memory footprints remains largely constrained by memory. Fourth, we demonstrate that thread-level parallelism further degrades memory performance, even for the latest SMPs with hardware prefetching and switch-based memory interconnects.« less
NASA Astrophysics Data System (ADS)
Chase, Patrick; Vondran, Gary
2011-01-01
Tetrahedral interpolation is commonly used to implement continuous color space conversions from sparse 3D and 4D lookup tables. We investigate the implementation and optimization of tetrahedral interpolation algorithms for GPUs, and compare to the best known CPU implementations as well as to a well known GPU-based trilinear implementation. We show that a 500 NVIDIA GTX-580 GPU is 3x faster than a 1000 Intel Core i7 980X CPU for 3D interpolation, and 9x faster for 4D interpolation. Performance-relevant GPU attributes are explored including thread scheduling, local memory characteristics, global memory hierarchy, and cache behaviors. We consider existing tetrahedral interpolation algorithms and tune based on the structure and branching capabilities of current GPUs. Global memory performance is improved by reordering and expanding the lookup table to ensure optimal access behaviors. Per multiprocessor local memory is exploited to implement optimally coalesced global memory accesses, and local memory addressing is optimized to minimize bank conflicts. We explore the impacts of lookup table density upon computation and memory access costs. Also presented are CPU-based 3D and 4D interpolators, using SSE vector operations that are faster than any previously published solution.
Measuring autobiographical fluency in the self-memory system.
Rathbone, Clare J; Moulin, Chris J A
2014-01-01
Autobiographical memory is widely considered to be fundamentally related to concepts of self and identity. However, few studies have sought to test models of self and memory directly using experimental designs. Using a novel autobiographical fluency paradigm, the present study investigated memory accessibility for different levels of self-related knowledge. Forty participants generated 20 "I am" statements about themselves, from which the 1st, 5th, 10th, 15th, and 20th were used as cues in a two-minute autobiographical fluency task. The most salient aspects of the self, measured by both serial position and ratings of personal significance, were associated with more accessible sets of autobiographical memories. This finding supports theories that view the self as a powerful organizational structure in memory. Results are discussed with reference to models of self and memory.
[Psychometric validation of the telephone memory test].
Ortiz, T; Fernández, A; Martínez-Castillo, E; Maestú, F; Martínez-Arias, R; López-Ibor, J J
1999-01-01
Several pathologies (i.e. Alzheimer's disease) that courses with memory alterations, appears in a context of impaired cognitive status and mobility. In recent years, several investigations were carried out in order to design short batteries that detect those subjects under risk of dementia. Some of this batteries were also design to be administrated over the telephone, trying to overcome the accessibility limitations of this patients. In this paper we present a battery (called Autotest de Memoria) essentially composed by episodic and semantic memory tests, administered both over the telephone and face to face. This battery was employed in the cognitive assessment of healthy controls and subjects diagnosed as probable Alzheimer's disease patients. Results show the capability of this battery in order to discriminate patients and healthy controls, a great sensibility and specificity, and a nearly absolute parallelism of telephone and face to face administrations. These data led us to claim the usefulness and practicality of our so called
The intention interference effect.
Cohen, Anna-Lisa; Kantner, Justin; Dixon, Roger A; Lindsay, D Stephen
2011-01-01
Intentions have been shown to be more accessible (e.g., more quickly and accurately recalled) compared to other sorts of to-be-remembered information; a result termed an intention superiority effect (Goschke & Kuhl, 1993). In the current study, we demonstrate an intention interference effect (IIE) in which color-naming performance in a Stroop task was slower for words belonging to an intention that participants had to remember to carry out (Do-the-Task condition) versus an intention that did not have to be executed (Ignore-the-Task condition). In previous work (e.g., Cohen et al., 2005), having a prospective intention in mind was confounded with carrying a memory load. In Experiment 1, we added a digit-retention task to control for effects of cognitive load. In Experiment 2, we eliminated the memory confound in a new way, by comparing intention-related and control words within each trial. Results from both Experiments 1 and 2 revealed an IIE suggesting that interference is very specific to the intention, not just to a memory load.
Overgeneral autobiographical memory bias in clinical and non-clinical voice hearers.
Jacobsen, Pamela; Peters, Emmanuelle; Ward, Thomas; Garety, Philippa A; Jackson, Mike; Chadwick, Paul
2018-03-14
Hearing voices can be a distressing and disabling experience for some, whilst it is a valued experience for others, so-called 'healthy voice-hearers'. Cognitive models of psychosis highlight the role of memory, appraisal and cognitive biases in determining emotional and behavioural responses to voices. A memory bias potentially associated with distressing voices is the overgeneral memory bias (OGM), namely the tendency to recall a summary of events rather than specific occasions. It may limit access to autobiographical information that could be helpful in re-appraising distressing experiences, including voices. We investigated the possible links between OGM and distressing voices in psychosis by comparing three groups: (1) clinical voice-hearers (N = 39), (2) non-clinical voice-hearers (N = 35) and (3) controls without voices (N = 77) on a standard version of the autobiographical memory test (AMT). Clinical and non-clinical voice-hearers also completed a newly adapted version of the task, designed to assess voices-related memories (vAMT). As hypothesised, the clinical group displayed an OGM bias by retrieving fewer specific autobiographical memories on the AMT compared with both the non-clinical and control groups, who did not differ from each other. The clinical group also showed an OGM bias in recall of voice-related memories on the vAMT, compared with the non-clinical group. Clinical voice-hearers display an OGM bias when compared with non-clinical voice-hearers on both general and voices-specific recall tasks. These findings have implications for the refinement and targeting of psychological interventions for psychosis.
Wong, Alanna; Dogra, Vimi R; Reichelt, Amy C
2017-06-01
Excessive consumption of sugar sweetened drinks is proposed to produce functional changes in the hippocampus and prefrontal cortex, leading to perturbations in behavioural control. Impairments in behavioural control have been observed in obese people on tasks that involve making choices, including delay-discounting, indicative of increased impulsivity. In this study we examined the impact of 2h daily access to 10% sucrose (or no sucrose in controls) in young male rats on behavioural tasks reliant on hippocampal function including delay-discounting, T-maze forced choice alternation and place recognition memory, as well as progressive ratio to measure motivation. We observed deficits in place recognition memory and T-maze forced choice alternation, indicative of hippocampal deficits in rats with a history of sucrose consumption. Moreover, rats with a history of sucrose consumption were less motivated to lever press for rewards on a progressive ratio schedule. However, rats with a history of sucrose consumption performed equally to control animals during the delay-discounting task, suggesting that they discounted for reward size over a delay in a manner comparable to control animals. These findings indicate that high-sucrose diets impact on spatial and working memory processes, but do not induce impulsive-like choice behaviours in rats, suggesting that unhealthy diet choices may not influence this aspect of decision-making behaviour. Copyright © 2017 Elsevier B.V. All rights reserved.
Data systems and computer science programs: Overview
NASA Technical Reports Server (NTRS)
Smith, Paul H.; Hunter, Paul
1991-01-01
An external review of the Integrated Technology Plan for the Civil Space Program is presented. The topics are presented in viewgraph form and include the following: onboard memory and storage technology; advanced flight computers; special purpose flight processors; onboard networking and testbeds; information archive, access, and retrieval; visualization; neural networks; software engineering; and flight control and operations.
Hardware Based Function Level Mandatory Access Control for Memory Structures
2008-04-01
tagging 16. SECURITY CLASSIFICATION OF: 19a. NAME OF RESPONSIBLE PERSON Lok Kwong Yan a. REPORT U b . ABSTRACT U c. THIS PAGE U 17. LIMITATION...www.phrack.org/issues.html?issue=58&id=4#article [13] Suh, G. E., Lee, J. W., Zhang, D., and Devadas , S. “Secure program execution via dynamic information
ERIC Educational Resources Information Center
Reichelt, Amy C.; Killcross, Simon; Hambly, Luke D.; Morris, Margaret J.; Westbrook, R. Fred
2015-01-01
In this study we sought to determine the effect of daily sucrose consumption in young rats on their subsequent performance in tasks that involve the prefrontal cortex and hippocampus. High levels of sugar consumption have been associated with the development of obesity, however less is known about how sugar consumption influences behavioral…
Heap/stack guard pages using a wakeup unit
DOE Office of Scientific and Technical Information (OSTI.GOV)
Gooding, Thomas M; Satterfield, David L; Steinmacher-Burow, Burkhard
A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access ofmore » the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.« less
Montgomery, Catharine; Fisk, John E; Newcombe, Russell; Murphy, Phillip N
2005-10-01
Recent theoretical models suggest that the central executive may not be a unified structure. The present study explored the nature of central executive deficits in ecstasy users. In study 1, 27 ecstasy users and 34 non-users were assessed using tasks to tap memory updating (computation span; letter updating) and access to long-term memory (a semantic fluency test and the Chicago Word Fluency Test). In study 2, 51 ecstasy users and 42 non-users completed tasks that assess mental set switching (number/letter and plus/minus) and inhibition (random letter generation). MANOVA revealed that ecstasy users performed worse on both tasks used to assess memory updating and on tasks to assess access to long-term memory (C- and S-letter fluency). However, notwithstanding the significant ecstasy group-related effects, indices of cocaine and cannabis use were also significantly correlated with most of the executive measures. Unexpectedly, in study 2, ecstasy users performed significantly better on the inhibition task, producing more letters than non-users. No group differences were observed on the switching tasks. Correlations between indices of ecstasy use and number of letters produced were significant. The present study provides further support for ecstasy/polydrug-related deficits in memory updating and in access to long-term memory. The surplus evident on the inhibition task should be treated with some caution, as this was limited to a single measure and has not been supported by our previous work.
NASA Astrophysics Data System (ADS)
Duan, W. J.; Wang, J. B.; Zhong, X. L.
2018-05-01
Resistive switching random access memory (RRAM) is considered as a promising candidate for the next generation memory due to its scalability, high integration density and non-volatile storage characteristics. Here, the multiple electrical characteristics in Pt/WOx/Pt cells are investigated. Both of the nonlinear switching and multi-level storage can be achieved by setting different compliance current in the same cell. The correlations among the current, time and temperature are analyzed by using contours and 3D surfaces. The switching mechanism is explained in terms of the formation and rupture of conductive filament which is related to oxygen vacancies. The experimental results show that the non-stoichiometric WOx film-based device offers a feasible way for the applications of oxide-based RRAMs.
Advanced Compact Holographic Data Storage System
NASA Technical Reports Server (NTRS)
Chao, Tien-Hsin; Zhou, Hanying; Reyes, George
2000-01-01
JPL, under current sponsorship from NASA Space Science and Earth Science Programs, is developing a high-density, nonvolatile and rad-hard Advanced Holographic Memory (AHM) system to enable large-capacity, high-speed, low power consumption, and read/write of data in a space environment. The entire read/write operation will be controlled with electro-optic mechanism without any moving parts. This CHDS will consist of laser diodes, photorefractive crystal, spatial light modulator, photodetector array, and I/O electronic interface. In operation, pages of information would be recorded and retrieved with random access and highspeed. The nonvolatile, rad-hard characteristics of the holographic memory will provide a revolutionary memory technology to enhance mission capabilities for all NASA's Earth Science Mission. In this paper, recent technology progress in developing this CHDS at JPL will be presented.
Performance Evaluation of Remote Memory Access (RMA) Programming on Shared Memory Parallel Computers
NASA Technical Reports Server (NTRS)
Jin, Hao-Qiang; Jost, Gabriele; Biegel, Bryan A. (Technical Monitor)
2002-01-01
The purpose of this study is to evaluate the feasibility of remote memory access (RMA) programming on shared memory parallel computers. We discuss different RMA based implementations of selected CFD application benchmark kernels and compare them to corresponding message passing based codes. For the message-passing implementation we use MPI point-to-point and global communication routines. For the RMA based approach we consider two different libraries supporting this programming model. One is a shared memory parallelization library (SMPlib) developed at NASA Ames, the other is the MPI-2 extensions to the MPI Standard. We give timing comparisons for the different implementation strategies and discuss the performance.
Enhancing Memory Access for Less Skilled Readers
ERIC Educational Resources Information Center
Smith, Emily R.; O'Brien, Edward J.
2016-01-01
Less skilled readers' comprehension often suffers because they have an impoverished representation of text in long-term memory; this, in turn, increases the difficulty of gaining access to backgrounded information necessary for maintaining coherence. The results of four experiments demonstrated that providing less skilled readers with additional…
Application of phase-change materials in memory taxonomy
Wang, Lei; Tu, Liang; Wen, Jing
2017-01-01
Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557
A review of emerging non-volatile memory (NVM) technologies and applications
NASA Astrophysics Data System (ADS)
Chen, An
2016-11-01
This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.
Selective memory retrieval can impair and improve retrieval of other memories.
Bäuml, Karl-Heinz T; Samenieh, Anuscheh
2012-03-01
Research from the past decades has shown that retrieval of a specific memory (e.g., retrieving part of a previous vacation) typically attenuates retrieval of other memories (e.g., memories for other details of the event), causing retrieval-induced forgetting. More recently, however, it has been shown that retrieval can both attenuate and aid recall of other memories (K.-H. T. Bäuml & A. Samenieh, 2010). To identify the circumstances under which retrieval aids recall, the authors examined retrieval dynamics in listwise directed forgetting, context-dependent forgetting, proactive interference, and in the absence of any induced memory impairment. They found beneficial effects of selective retrieval in listwise directed forgetting and context-dependent forgetting but detrimental effects in all the other conditions. Because context-dependent forgetting and listwise directed forgetting arguably reflect impaired context access, the results suggest that memory retrieval aids recall of memories that are subject to impaired context access but attenuates recall in the absence of such circumstances. The findings are consistent with a 2-factor account of memory retrieval and suggest the existence of 2 faces of memory retrieval. 2012 APA, all rights reserved
NASA Astrophysics Data System (ADS)
Xu, Wentao; Lee, Yeongjun; Min, Sung-Yong; Park, Cheolmin; Lee, Tae-Woo
2016-09-01
Resistive random-access memory (RRAM) is a candidate next generation nonvolatile memory due to its high access speed, high density and ease of fabrication. Especially, cross-point-access allows cross-bar arrays that lead to high-density cells in a two-dimensional planar structure. Use of such designs could be compatible with the aggressive scaling down of memory devices, but existing methods such as optical or e-beam lithographic approaches are too complicated. One-dimensional inorganic nanowires (i-NWs) are regarded as ideal components of nanoelectronics to circumvent the limitations of conventional lithographic approaches. However, post-growth alignment of these i-NWs precisely on a large area with individual control is still a difficult challenge. Here, we report a simple, inexpensive, and rapid method to fabricate two-dimensional arrays of perpendicularly-aligned, individually-conductive Cu-NWs with a nanometer-scale CuxO layer sandwiched at each cross point, by using an inorganic-nanowire-digital-alignment technique (INDAT) and a one-step reduction process. In this approach, the oxide layer is self-formed and patterned, so conventional deposition and lithography are not necessary. INDAT eliminates the difficulties of alignment and scalable fabrication that are encountered when using currently-available techniques that use inorganic nanowires. This simple process facilitates fabrication of cross-point nonvolatile memristor arrays. Fabricated arrays had reproducible resistive switching behavior, high on/off current ratio (Ion/Ioff) 10 6 and extensive cycling endurance. This is the first report of memristors with the resistive switching oxide layer self-formed, self-patterned and self-positioned; we envision that the new features of the technique will provide great opportunities for future nano-electronic circuits.
High Working Memory Capacity Predicts Less Retrieval Induced Forgetting
Mall, Jonathan T.; Morey, Candice C.
2013-01-01
Background Working Memory Capacity (WMC) is thought to be related to executive control and focused memory search abilities. These two hypotheses make contrasting predictions regarding the effects of retrieval on forgetting. Executive control during memory retrieval is believed to lead to retrieval induced forgetting (RIFO) because inhibition of competing memory traces during retrieval renders them temporarily less accessible. According to this suggestion, superior executive control should increase RIFO. Alternatively, superior focused search abilities could diminish RIFO, because delimiting the search set reduces the amount of competition between traces and thus the need for inhibition. Some evidence suggests that high WMC is related to more RIFO, which is inconsistent with the focused search hypothesis. Methodology/Principal Findings Using the RIFO paradigm, we created distinct and overlapping categories to manipulate the amount of competition between them. This overlap increased competition between some categories while exclusive use of weak exemplars ensured negligible effects of output interference and integration. Low WMC individuals exhibited RIFO within and between overlapping categories, indicating the effect of resolving competition during retrieval. High WMC individuals only exhibited between-category RIFO, suggesting they experienced reduced competition resolution demands. Low WMC Individuals exhibited the strongest RIFO and no retrieval benefits when interference resolution demands were high. Conclusions/Significance Our findings qualify the inhibitory explanation for RIFO by incorporating the focused search hypothesis for materials that are likely to pose extraordinary challenges at retrieval. The results highlight the importance of considering individual differences in retrieval-induced effects and qualify existing models of these effects. PMID:23326359
Lenton-Brym, Ariella; Kurczek, Jake; Rosenbaum, R Shayna; Sheldon, Signy
2016-05-01
Constructing autobiographical events involves an initial phase of event selection, in which a memory or imagined future event is initially brought to mind, followed by a phase of elaboration, in which an individual accesses detailed knowledge specific to the event. While considerable research demonstrates the importance of the medial temporal lobes (MTL) in the later phase, its role in initial event selection is unknown. The present study is the first to investigate the role of the MTL in event selection by assessing whether individuals with MTL lesions select qualitatively different events for remembering and imagining than matched control participants. To do so, we created "event captions" that reflected the type of events selected for an autobiographical event narrative task by four individuals with MTL amnesia and control counterparts. Over 450 online raters assessed these event captions on qualitative dimensions known to vary with autobiographical recall (frequency, significance, emotionality, imageability, and uniqueness). Our critical finding was that individuals with MTL amnesia were more prone to select events that were rated as more frequently occurring than healthy control participants. We interpret this finding as evidence that people with impaired episodic memory from MTL damage compensate for their compromised ability to recall detailed information by relying more heavily on semantic memory processes to select generalized events. We discuss the implications for theoretical models of memory and methodological approaches to studying autobiographical memory. Copyright © 2016 Elsevier Ltd. All rights reserved.
High working memory capacity predicts less retrieval induced forgetting.
Mall, Jonathan T; Morey, Candice C
2013-01-01
Working Memory Capacity (WMC) is thought to be related to executive control and focused memory search abilities. These two hypotheses make contrasting predictions regarding the effects of retrieval on forgetting. Executive control during memory retrieval is believed to lead to retrieval induced forgetting (RIFO) because inhibition of competing memory traces during retrieval renders them temporarily less accessible. According to this suggestion, superior executive control should increase RIFO. Alternatively, superior focused search abilities could diminish RIFO, because delimiting the search set reduces the amount of competition between traces and thus the need for inhibition. Some evidence suggests that high WMC is related to more RIFO, which is inconsistent with the focused search hypothesis. Using the RIFO paradigm, we created distinct and overlapping categories to manipulate the amount of competition between them. This overlap increased competition between some categories while exclusive use of weak exemplars ensured negligible effects of output interference and integration. Low WMC individuals exhibited RIFO within and between overlapping categories, indicating the effect of resolving competition during retrieval. High WMC individuals only exhibited between-category RIFO, suggesting they experienced reduced competition resolution demands. Low WMC Individuals exhibited the strongest RIFO and no retrieval benefits when interference resolution demands were high. Our findings qualify the inhibitory explanation for RIFO by incorporating the focused search hypothesis for materials that are likely to pose extraordinary challenges at retrieval. The results highlight the importance of considering individual differences in retrieval-induced effects and qualify existing models of these effects.
NASA Astrophysics Data System (ADS)
Ohsawa, Takashi; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo
2014-01-01
Array operation currents in spin-transfer-torque magnetic random access memories (STT-MRAMs) that use four differential pair type magnetic tunnel junction (MTJ)-based memory cells (4T2MTJ, two 6T2MTJs and 8T2MTJ) are simulated and compared with that in SRAM. With L3 cache applications in mind, it is assumed that the memories are composed of 32 Mbyte capacity to be accessed in 64 byte in parallel. All the STT-MRAMs except for the 8T2MTJ one are designed with 32 bit fine-grained power gating scheme applied to eliminate static currents in the memory cells that are not accessed. The 8T2MTJ STT-MRAM, the cell’s design concept being not suitable for the fine-grained power gating, loads and saves 32 Mbyte data in 64 Mbyte unit per 1 Mbit sub-array in 2 × 103 cycles. It is shown that the array operation current of the 4T2MTJ STT-MRAM is 70 mA averaged in 15 ns write cycles at Vdd = 0.9 V. This is the smallest among the STT-MRAMs, about the half of the low standby power (LSTP) SRAM whose array operation current is totally dominated by the cells’ subthreshold leakage.
Stress-based control of magnetic nanowire domain walls in artificial multiferroic systems
NASA Astrophysics Data System (ADS)
Dean, J.; Bryan, M. T.; Schrefl, T.; Allwood, D. A.
2011-01-01
Artificial multiferroic systems, which combine piezoelectric and piezomagnetic materials, offer novel methods of controlling material properties. Here, we use combined structural and magnetic finite element models to show how localized strains in a piezoelectric film coupled to a piezomagnetic nanowire can attract and pin magnetic domain walls. Synchronous switching of addressable contacts enables the controlled movement of pinning sites, and hence domain walls, in the nanowire without applied magnetic field or spin-polarized current, irrespective of domain wall structure. Conversely, domain wall-induced strain in the piezomagnetic material induces a local potential difference in the piezoelectric, providing a mechanism for sensing domain walls. This approach overcomes the problems in magnetic nanowire memories of domain wall structure-dependent behavior and high power consumption. Nonvolatile random access or shift register memories based on these effects can achieve storage densities >1 Gbit/In2, sub-10 ns switching times, and power consumption <100 keV per operation.
Injecting Artificial Memory Errors Into a Running Computer Program
NASA Technical Reports Server (NTRS)
Bornstein, Benjamin J.; Granat, Robert A.; Wagstaff, Kiri L.
2008-01-01
Single-event upsets (SEUs) or bitflips are computer memory errors caused by radiation. BITFLIPS (Basic Instrumentation Tool for Fault Localized Injection of Probabilistic SEUs) is a computer program that deliberately injects SEUs into another computer program, while the latter is running, for the purpose of evaluating the fault tolerance of that program. BITFLIPS was written as a plug-in extension of the open-source Valgrind debugging and profiling software. BITFLIPS can inject SEUs into any program that can be run on the Linux operating system, without needing to modify the program s source code. Further, if access to the original program source code is available, BITFLIPS offers fine-grained control over exactly when and which areas of memory (as specified via program variables) will be subjected to SEUs. The rate of injection of SEUs is controlled by specifying either a fault probability or a fault rate based on memory size and radiation exposure time, in units of SEUs per byte per second. BITFLIPS can also log each SEU that it injects and, if program source code is available, report the magnitude of effect of the SEU on a floating-point value or other program variable.
Sewell, David K; Lilburn, Simon D; Smith, Philip L
2016-11-01
A central question in working memory research concerns the degree to which information in working memory is accessible to other cognitive processes (e.g., decision-making). Theories assuming that the focus of attention can only store a single object at a time require the focus to orient to a target representation before further processing can occur. The need to orient the focus of attention implies that single-object accounts typically predict response time costs associated with object selection even when working memory is not full (i.e., memory load is less than 4 items). For other theories that assume storage of multiple items in the focus of attention, predictions depend on specific assumptions about the way resources are allocated among items held in the focus, and how this affects the time course of retrieval of items from the focus. These broad theoretical accounts have been difficult to distinguish because conventional analyses fail to separate components of empirical response times related to decision-making from components related to selection and retrieval processes associated with accessing information in working memory. To better distinguish these response time components from one another, we analyze data from a probed visual working memory task using extensions of the diffusion decision model. Analysis of model parameters revealed that increases in memory load resulted in (a) reductions in the quality of the underlying stimulus representations in a manner consistent with a sample size model of visual working memory capacity and (b) systematic increases in the time needed to selectively access a probed representation in memory. The results are consistent with single-object theories of the focus of attention. The results are also consistent with a subset of theories that assume a multiobject focus of attention in which resource allocation diminishes both the quality and accessibility of the underlying representations. (PsycINFO Database Record (c) 2016 APA, all rights reserved).
Coward, L Andrew
2010-01-01
A model is described in which the hippocampal system functions as resource manager for the neocortex. This model is developed from an architectural concept for the brain as a whole within which the receptive fields of neocortical columns can gradually expand but with some limited exceptions tend not to contract. The definition process for receptive fields is constrained so that they overlap as little as possible, and change as little as possible, but at least a minimum number of columns detect their fields within every sensory input state. Below this minimum, the receptive fields of some columns are expanded slightly until the minimum level is reached. The columns in which this expansion occurs are selected by a competitive process in the hippocampal system that identifies those in which only a relatively small expansion is required, and sends signals to those columns that trigger the expansion. These expansions in receptive fields are the information record that forms the declarative memory of the input state. Episodic memory activates a set of columns in which receptive fields expanded simultaneously at some point in the past, and the hippocampal system is therefore the appropriate source for information guiding access to such memories. Semantic memory associates columns that are often active (with or without expansions in receptive fields) simultaneously. Initially, the hippocampus can guide access to such memories on the basis of initial information recording, but to avoid corruption of the information needed for ongoing resource management, access control shifts to other parts of the neocortex. The roles of the mammillary bodies, amygdala and anterior thalamic nucleus can be understood as modulating information recording in accordance with various behavioral priorities. During sleep, provisional physical connectivity is created that supports receptive field expansions in the subsequent wake period, but previously created memories are not affected. This model matches a wide range of neuropsychological observation better than alternative hippocampal models. The information mechanisms required by the model are consistent with known brain anatomy and neuron physiology.
Designing a VMEbus FDDI adapter card
NASA Astrophysics Data System (ADS)
Venkataraman, Raman
1992-03-01
This paper presents a system architecture for a VMEbus FDDI adapter card containing a node core, FDDI block, frame buffer memory and system interface unit. Most of the functions of the PHY and MAC layers of FDDI are implemented with National's FDDI chip set and the SMT implementation is simplified with a low cost microcontroller. The factors that influence the system bus bandwidth utilization and FDDI bandwidth utilization are the data path and frame buffer memory architecture. The VRAM based frame buffer memory has two sections - - LLC frame memory and SMT frame memory. Each section with an independent serial access memory (SAM) port provides an independent access after the initial data transfer cycle on the main port and hence, the throughput is maximized on each port of the memory. The SAM port simplifies the system bus master DMA design and the VMEbus interface can be designed with low-cost off-the-shelf interface chips.
The influence of training and experience on memory strategy.
Patrick, John; Morgan, Phillip L; Smy, Victoria; Tiley, Leyanne; Seeby, Helen; Patrick, Tanya; Evans, Jonathan
2015-07-01
This paper investigates whether, and if so how much, prior training and experience overwrite the influence of the constraints of the task environment on strategy deployment. This evidence is relevant to the theory of soft constraints that focuses on the role of constraints in the task environment (Gray, Simms, Fu, & Schoelles, Psychological Review, 113: 461-482, 2006). The theory explains how an increase in the cost of accessing information induces a more memory-based strategy involving more encoding and planning. Experiments 1 and 3 adopt a traditional training and transfer design using the Blocks World Task in which participants were exposed to training trials involving a 2.5-s delay in accessing goal-state information before encountering transfer trials in which there was no access delay. The effect of prior training was assessed by the degree of memory-based strategy adopted in the transfer trials. Training with an access delay had a substantial carry-over effect and increased the subsequent degree of memory-based strategy adopted in the transfer environment. However, such effects do not necessarily occur if goal-state access cost in training is less costly than in transfer trials (Experiment 2). Experiment 4 used a fine-grained intra-trial design to examine the effect of experiencing access cost on one, two, or three occasions within the same trial and found that such experience on two consecutive occasions was sufficient to induce a more memory-based strategy. This paper establishes some effects of training that are relevant to the soft constraints theory and also discusses practical implications.
Optoelectronic-cache memory system architecture.
Chiarulli, D M; Levitan, S P
1996-05-10
We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.
Episodic Memory Retrieval Benefits from a Less Modular Brain Network Organization
2017-01-01
Most complex cognitive tasks require the coordinated interplay of multiple brain networks, but the act of retrieving an episodic memory may place especially heavy demands for communication between the frontoparietal control network (FPCN) and the default mode network (DMN), two networks that do not strongly interact with one another in many task contexts. We applied graph theoretical analysis to task-related fMRI functional connectivity data from 20 human participants and found that global brain modularity—a measure of network segregation—is markedly reduced during episodic memory retrieval relative to closely matched analogical reasoning and visuospatial perception tasks. Individual differences in modularity were correlated with memory task performance, such that lower modularity levels were associated with a lower false alarm rate. Moreover, the FPCN and DMN showed significantly elevated coupling with each other during the memory task, which correlated with the global reduction in brain modularity. Both networks also strengthened their functional connectivity with the hippocampus during the memory task. Together, these results provide a novel demonstration that reduced modularity is conducive to effective episodic retrieval, which requires close collaboration between goal-directed control processes supported by the FPCN and internally oriented self-referential processing supported by the DMN. SIGNIFICANCE STATEMENT Modularity, an index of the degree to which nodes of a complex system are organized into discrete communities, has emerged as an important construct in the characterization of brain connectivity dynamics. We provide novel evidence that the modularity of the human brain is reduced when individuals engage in episodic memory retrieval, relative to other cognitive tasks, and that this state of lower modularity is associated with improved memory performance. We propose a neural systems mechanism for this finding where the nodes of the frontoparietal control network and default mode network strengthen their interaction with one another during episodic retrieval. Such across-network communication likely facilitates effective access to internally generated representations of past event knowledge. PMID:28242796
Episodic Memory Retrieval Benefits from a Less Modular Brain Network Organization.
Westphal, Andrew J; Wang, Siliang; Rissman, Jesse
2017-03-29
Most complex cognitive tasks require the coordinated interplay of multiple brain networks, but the act of retrieving an episodic memory may place especially heavy demands for communication between the frontoparietal control network (FPCN) and the default mode network (DMN), two networks that do not strongly interact with one another in many task contexts. We applied graph theoretical analysis to task-related fMRI functional connectivity data from 20 human participants and found that global brain modularity-a measure of network segregation-is markedly reduced during episodic memory retrieval relative to closely matched analogical reasoning and visuospatial perception tasks. Individual differences in modularity were correlated with memory task performance, such that lower modularity levels were associated with a lower false alarm rate. Moreover, the FPCN and DMN showed significantly elevated coupling with each other during the memory task, which correlated with the global reduction in brain modularity. Both networks also strengthened their functional connectivity with the hippocampus during the memory task. Together, these results provide a novel demonstration that reduced modularity is conducive to effective episodic retrieval, which requires close collaboration between goal-directed control processes supported by the FPCN and internally oriented self-referential processing supported by the DMN. SIGNIFICANCE STATEMENT Modularity, an index of the degree to which nodes of a complex system are organized into discrete communities, has emerged as an important construct in the characterization of brain connectivity dynamics. We provide novel evidence that the modularity of the human brain is reduced when individuals engage in episodic memory retrieval, relative to other cognitive tasks, and that this state of lower modularity is associated with improved memory performance. We propose a neural systems mechanism for this finding where the nodes of the frontoparietal control network and default mode network strengthen their interaction with one another during episodic retrieval. Such across-network communication likely facilitates effective access to internally generated representations of past event knowledge. Copyright © 2017 the authors 0270-6474/17/373523-09$15.00/0.
Piezotronic nanowire-based resistive switches as programmable electromechanical memories.
Wu, Wenzhuo; Wang, Zhong Lin
2011-07-13
We present the first piezoelectrically modulated resistive switching device based on piezotronic ZnO nanowire (NW), through which the write/read access of the memory cell is programmed via electromechanical modulation. Adjusted by the strain-induced polarization charges created at the semiconductor/metal interface under externally applied deformation by the piezoelectric effect, the resistive switching characteristics of the cell can be modulated in a controlled manner, and the logic levels of the strain stored in the cell can be recorded and read out, which has the potential for integrating with NEMS technology to achieve micro/nanosystems capable for intelligent and self-sufficient multidimensional operations.
Protection of data carriers using secure optical codes
NASA Astrophysics Data System (ADS)
Peters, John A.; Schilling, Andreas; Staub, René; Tompkin, Wayne R.
2006-02-01
Smartcard technologies, combined with biometric-enabled access control systems, are required for many high-security government ID card programs. However, recent field trials with some of the most secure biometric systems have indicated that smartcards are still vulnerable to well equipped and highly motivated counterfeiters. In this paper, we present the Kinegram Secure Memory Technology which not only provides a first-level visual verification procedure, but also reinforces the existing chip-based security measures. This security concept involves the use of securely-coded data (stored in an optically variable device) which communicates with the encoded hashed information stored in the chip memory via a smartcard reader device.
The robot's eyes - Stereo vision system for automated scene analysis
NASA Technical Reports Server (NTRS)
Williams, D. S.
1977-01-01
Attention is given to the robot stereo vision system which maintains the image produced by solid-state detector television cameras in a dynamic random access memory called RAPID. The imaging hardware consists of sensors (two solid-state image arrays using a charge injection technique), a video-rate analog-to-digital converter, the RAPID memory, and various types of computer-controlled displays, and preprocessing equipment (for reflexive actions, processing aids, and object detection). The software is aimed at locating objects and transversibility. An object-tracking algorithm is discussed and it is noted that tracking speed is in the 50-75 pixels/s range.
Performance of hashed cache data migration schemes on multicomputers
NASA Technical Reports Server (NTRS)
Hiranandani, Seema; Saltz, Joel; Mehrotra, Piyush; Berryman, Harry
1991-01-01
After conducting an examination of several data-migration mechanisms which permit an explicit and controlled mapping of data to memory, a set of schemes for storage and retrieval of off-processor array elements is experimentally evaluated and modeled. All schemes considered have their basis in the use of hash tables for efficient access of nonlocal data. The techniques in question are those of hashed cache, partial enumeration, and full enumeration; in these, nonlocal data are stored in hash tables, so that the operative difference lies in the amount of memory used by each scheme and in the retrieval mechanism used for nonlocal data.
Cerebellar models of associative memory: Three papers from IEEE COMPCON spring 1989
NASA Technical Reports Server (NTRS)
Raugh, Michael R. (Editor)
1989-01-01
Three papers are presented on the following topics: (1) a cerebellar-model associative memory as a generalized random-access memory; (2) theories of the cerebellum - two early models of associative memory; and (3) intelligent network management and functional cerebellum synthesis.
NASA Astrophysics Data System (ADS)
Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.
2014-04-01
In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.
Magnet/Hall-Effect Random-Access Memory
NASA Technical Reports Server (NTRS)
Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.
1991-01-01
In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.
Investigation of multilayer magnetic domain lattice file
NASA Technical Reports Server (NTRS)
Torok, E. J.; Kamin, M.; Tolman, C. H.
1980-01-01
The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.
NASA Astrophysics Data System (ADS)
Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.
2014-05-01
Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.
Computer hardware for radiologists: Part I
Indrajit, IK; Alam, A
2010-01-01
Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration. PMID:21042437
Smits, Cas; Merkus, Paul; Festen, Joost M.; Goverts, S. Theo
2017-01-01
Not all of the variance in speech-recognition performance of cochlear implant (CI) users can be explained by biographic and auditory factors. In normal-hearing listeners, linguistic and cognitive factors determine most of speech-in-noise performance. The current study explored specifically the influence of visually measured lexical-access ability compared with other cognitive factors on speech recognition of 24 postlingually deafened CI users. Speech-recognition performance was measured with monosyllables in quiet (consonant-vowel-consonant [CVC]), sentences-in-noise (SIN), and digit-triplets in noise (DIN). In addition to a composite variable of lexical-access ability (LA), measured with a lexical-decision test (LDT) and word-naming task, vocabulary size, working-memory capacity (Reading Span test [RSpan]), and a visual analogue of the SIN test (text reception threshold test) were measured. The DIN test was used to correct for auditory factors in SIN thresholds by taking the difference between SIN and DIN: SRTdiff. Correlation analyses revealed that duration of hearing loss (dHL) was related to SIN thresholds. Better working-memory capacity was related to SIN and SRTdiff scores. LDT reaction time was positively correlated with SRTdiff scores. No significant relationships were found for CVC or DIN scores with the predictor variables. Regression analyses showed that together with dHL, RSpan explained 55% of the variance in SIN thresholds. When controlling for auditory performance, LA, LDT, and RSpan separately explained, together with dHL, respectively 37%, 36%, and 46% of the variance in SRTdiff outcome. The results suggest that poor verbal working-memory capacity and to a lesser extent poor lexical-access ability limit speech-recognition ability in listeners with a CI. PMID:29205095
2015-05-01
LLC and DRAM banks. For each µB task and isolation configuration, we ran experiments with all 256 possible LLC area sizes (given by 1 to 16 ways and 1...isolation on multicoore platforms. In RTAS ’14. [29] H. Yun, G. Yao, R. Pellizzoni, M. Caccamo, and L. Sha . Memory access control in multiprocessor
Non-volatile magnetic random access memory
NASA Technical Reports Server (NTRS)
Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)
1994-01-01
Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.
Staging memory for massively parallel processor
NASA Technical Reports Server (NTRS)
Batcher, Kenneth E. (Inventor)
1988-01-01
The invention herein relates to a computer organization capable of rapidly processing extremely large volumes of data. A staging memory is provided having a main stager portion consisting of a large number of memory banks which are accessed in parallel to receive, store, and transfer data words simultaneous with each other. Substager portions interconnect with the main stager portion to match input and output data formats with the data format of the main stager portion. An address generator is coded for accessing the data banks for receiving or transferring the appropriate words. Input and output permutation networks arrange the lineal order of data into and out of the memory banks.
NASA Astrophysics Data System (ADS)
Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio
2015-04-01
High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.
Method for prefetching non-contiguous data structures
Blumrich, Matthias A [Ridgefield, CT; Chen, Dong [Croton On Hudson, NY; Coteus, Paul W [Yorktown Heights, NY; Gara, Alan G [Mount Kisco, NY; Giampapa, Mark E [Irvington, NY; Heidelberger, Philip [Cortlandt Manor, NY; Hoenicke, Dirk [Ossining, NY; Ohmacht, Martin [Brewster, NY; Steinmacher-Burow, Burkhard D [Mount Kisco, NY; Takken, Todd E [Mount Kisco, NY; Vranas, Pavlos M [Bedford Hills, NY
2009-05-05
A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple perfecting for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefect rather than some other predictive algorithm. This enables hardware to effectively prefect memory access patterns that are non-contiguous, but repetitive.
Making Physical Activity Accessible to Older Adults with Memory Loss: A Feasibility Study
ERIC Educational Resources Information Center
Logsdon, Rebecca G.; McCurry, Susan M.; Pike, Kenneth C.; Teri, Linda
2009-01-01
Purpose: For individuals with mild cognitive impairment (MCI), memory loss may prevent successful engagement in exercise, a key factor in preventing additional disability. The Resources and Activities for Life Long Independence (RALLI) program uses behavioral principles to make exercise more accessible for these individuals. Exercises are broken…
NASA Astrophysics Data System (ADS)
Fang, Juan; Hao, Xiaoting; Fan, Qingwen; Chang, Zeqing; Song, Shuying
2017-05-01
In the Heterogeneous multi-core architecture, CPU and GPU processor are integrated on the same chip, which poses a new challenge to the last-level cache management. In this architecture, the CPU application and the GPU application execute concurrently, accessing the last-level cache. CPU and GPU have different memory access characteristics, so that they have differences in the sensitivity of last-level cache (LLC) capacity. For many CPU applications, a reduced share of the LLC could lead to significant performance degradation. On the contrary, GPU applications can tolerate increase in memory access latency when there is sufficient thread-level parallelism. Taking into account the GPU program memory latency tolerance characteristics, this paper presents a method that let GPU applications can access to memory directly, leaving lots of LLC space for CPU applications, in improving the performance of CPU applications and does not affect the performance of GPU applications. When the CPU application is cache sensitive, and the GPU application is insensitive to the cache, the overall performance of the system is improved significantly.
Szőllősi, Ágnes; Keresztes, Attila; Conway, Martin A; Racsmány, Mihály
2015-01-01
Recording the events of a day in a diary may help improve their later accessibility. An interesting question is whether improvements in long-term accessibility will be greater if the diary is completed at the end of the day, or after a period of sleep, the following morning. We investigated this question using an internet-based diary method. On each of five days, participants (n = 109) recorded autobiographical memories for that day or for the previous day. Recording took place either in the morning or in the evening. Following a 30-day retention interval, the diary events were free recalled. We found that participants who recorded their memories in the evening before sleep had best memory performance. These results suggest that the time of reactivation and recording of recent autobiographical events has a significant effect on the later accessibility of those diary events. We discuss our results in the light of related findings that show a beneficial effect of reduced interference during sleep on memory consolidation and reconsolidation.
Facial Expression Influences Face Identity Recognition During the Attentional Blink
2014-01-01
Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry—suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another. PMID:25286076
Facial expression influences face identity recognition during the attentional blink.
Bach, Dominik R; Schmidt-Daffy, Martin; Dolan, Raymond J
2014-12-01
Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry-suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another.
Event memory and moving in a well-known environment.
Tamplin, Andrea K; Krawietz, Sabine A; Radvansky, Gabriel A; Copeland, David E
2013-11-01
Research in narrative comprehension has repeatedly shown that when people read about characters moving in well-known environments, the accessibility of object information follows a spatial gradient. That is, the accessibility of objects is best when they are in the same room as the protagonist, and it becomes worse the farther away they are see, e.g., Morrow, Greenspan, & Bower, (Journal of Memory and Language, 26, 165-187, 1987). In the present study, we assessed this finding using an interactive environment in which we had people memorize a map and navigate a virtual simulation of the area. During navigation, people were probed with pairs of object names and indicated whether both objects were in the same room. In contrast to the narrative studies described above, several experiments showed no evidence of a clear spatial gradient. Instead, memory for objects in currently occupied locations (e.g., the location room) was more accessible, especially after a small delay, but no clear decline was evident in the accessibility of information in memory with increased distance. Also, memory for objects along the pathway of movement (i.e., rooms that a person only passed through) showed a transitory suppression effect that was present immediately after movement, but attenuated over time. These results were interpreted in light of the event horizon model of event cognition.
The special role of item-context associations in the direct-access region of working memory.
Campoy, Guillermo
2017-09-01
The three-embedded-component model of working memory (WM) distinguishes three representational states corresponding to three WM regions: activated long-term memory, direct-access region (DAR), and focus of attention. Recent neuroimaging research has revealed that access to the DAR is associated with enhanced hippocampal activity. Because the hippocampus mediates the encoding and retrieval of item-context associations, it has been suggested that this hippocampal activation is a consequence of the fact that item-context associations are particularly strong and accessible in the DAR. This study provides behavioral evidence for this view using an item-recognition task to assess the effect of non-intentional encoding and maintenance of item-location associations across WM regions. Five pictures of human faces were sequentially presented in different screen locations followed by a recognition probe. Visual cues immediately preceding the probe indicated the location thereof. When probe stimuli appeared in the same location that they had been presented within the memory set, the presentation of the cue was expected to elicit the activation of the corresponding WM representation through the just-established item-location association, resulting in faster recognition. Results showed this same-location effect, but only for items that, according to their serial position within the memory set, were held in the DAR.
Multi-port, optically addressed RAM
NASA Technical Reports Server (NTRS)
Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)
1989-01-01
A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.
Johnson, Ray; Simon, Elizabeth J; Henkell, Heather; Zhu, John
2011-04-01
Event-related potentials (ERPs) are unique in their ability to provide information about the timing of activity in the neural networks that perform complex cognitive processes. Given the dearth of extant data from normal controls on the question of whether attitude representations are stored in episodic or semantic memory, the goal here was to study the nature of the memory representations used during conscious attitude evaluations. Thus, we recorded ERPs while participants performed three tasks: attitude evaluations (i.e., agree/disagree), autobiographical cued recall (i.e., You/Not You) and semantic evaluations (i.e., active/inactive). The key finding was that the parietal episodic memory (EM) effect, a well-established correlate of episodic recollection, was elicited by both attitude evaluations and autobiographical retrievals. By contrast, semantic evaluations of the same attitude items elicited less parietal activity, like that elicited by Not You cues, which only access semantic memory. In accord with hemodynamic results, attitude evaluations and autobiographical retrievals also produced overlapping patterns of slow potential (SP) activity from 500 to 900ms preceding the response over left and right inferior frontal, anterior medial frontal and occipital brain areas. Significantly different patterns of SP activity were elicited in these locations for semantic evaluations and Not You cues. Taken together, the results indicate that attitude representations are stored in episodic memory. Retrieval timing varied as a function of task, with earlier retrievals in both evaluation conditions relative to those in the autobiographical condition. The differential roles and timing of memory retrieval in evaluative judgment and memory retrieval tasks are discussed. Copyright © 2011 Elsevier Ltd. All rights reserved.
A Calendar Savant with Episodic Memory Impairments
Olson, Ingrid R.; Berryhill, Marian E.; Drowos, David B.; Brown, Lawrence; Chatterjee, Anjan
2010-01-01
Patients with memory disorders have severely restricted learning and memory. For instance, patients with anterograde amnesia can learn motor procedures as well as retaining some restricted ability to learn new words and factual information. However, such learning is inflexible and frequently inaccessible to conscious awareness. Here we present a case of patient AC596, a 25-year old male with severe episodic memory impairments, presumably due to anoxia during a preterm birth. In contrast to his poor episodic memory, he exhibits savant-like memory for calendar information that can be flexibly accessed by day, month, and year cues. He also has the ability to recollect the exact date of a wide range of personal experiences over the past 20 years. The patient appears to supplement his generally poor episodic memory by using memorized calendar information as a retrieval cue for autobiographical events. These findings indicate that islands of preserved memory functioning, such as a highly developed semantic memory system, can exist in individuals with severely impaired episodic memory systems. In this particular case, our patient’s memory for dates far outstripped that of normal individuals and served as a keen retrieval cue, allowing him to access information that was otherwise unavailable. PMID:20104390
An attention-gating recurrent working memory architecture for emergent speech representation
NASA Astrophysics Data System (ADS)
Elshaw, Mark; Moore, Roger K.; Klein, Michael
2010-06-01
This paper describes an attention-gating recurrent self-organising map approach for emergent speech representation. Inspired by evidence from human cognitive processing, the architecture combines two main neural components. The first component, the attention-gating mechanism, uses actor-critic learning to perform selective attention towards speech. Through this selective attention approach, the attention-gating mechanism controls access to working memory processing. The second component, the recurrent self-organising map memory, develops a temporal-distributed representation of speech using phone-like structures. Representing speech in terms of phonetic features in an emergent self-organised fashion, according to research on child cognitive development, recreates the approach found in infants. Using this representational approach, in a fashion similar to infants, should improve the performance of automatic recognition systems through aiding speech segmentation and fast word learning.
ERIC Educational Resources Information Center
Voss, Joel L.; Paller, Ken A.
2007-01-01
During episodic recognition tests, meaningful stimuli such as words can engender both conscious retrieval (explicit memory) and facilitated access to meaning that is distinct from the awareness of remembering (conceptual implicit memory). Neuroimaging investigations of one type of memory are frequently subject to the confounding influence of the…
Morgan, Phillip L; Patrick, John; Waldron, Samuel M; King, Sophia L; Patrick, Tanya
2009-12-01
Forgetting what one was doing prior to interruption is an everyday problem. The recent soft constraints hypothesis (Gray, Sims, Fu, & Schoelles, 2006) emphasizes the strategic adaptation of information processing strategy to the task environment. It predicts that increasing information access cost (IAC: the time, and physical and mental effort involved in accessing information) encourages a more memory-intensive strategy. Like interruptions, access costs are also intrinsic to most work environments, such as when opening documents and e-mails. Three experiments investigated whether increasing IAC during a simple copying task can be an effective method for reducing forgetting following interruption. IAC was designated Low (all information permanently visible), Medium (a mouse movement to uncover target information), or High (an additional few seconds to uncover such information). Experiment 1 found that recall improved across all three levels of IAC. Subsequent experiments found that High IAC facilitated resumption after interruption, particularly when interruption occurred on half of all trials (Experiment 2), and improved prospective memory following two different interrupting tasks, even when one involved the disruptive effect of using the same type of resource as the primary task (Experiment 3). The improvement of memory after interruption with increased IAC supports the prediction of the soft constraints hypothesis. The main disadvantage of a high access cost was a reduction in speed of task completion. The practicality of manipulating IAC as a design method for inducing a memory-intensive strategy to protect against forgetting is discussed. Copyright 2009 APA
Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a
NASA Technical Reports Server (NTRS)
Klute, A.
1979-01-01
The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.
ERIC Educational Resources Information Center
Altmeyer, Michael; Schweizer, Karl; Reiss, Siegbert; Ren, Xuezhu; Schreiner, Michael
2013-01-01
Performance in working memory and short-term memory tasks was employed for predicting performance in a long-term memory task in order to find out about the underlying processes. The types of memory were represented by versions of the Posner Task, the Backward Counting Task and the Sternberg Task serving as measures of long-term memory, working…
Robison, Matthew K; McGuirk, William P; Unsworth, Nash
2017-08-01
The present study examined the relative contributions of the prefrontal cortex (PFC) and posterior parietal cortex (PPC) to visual working memory. Evidence from a number of different techniques has led to the theory that the PFC controls access to working memory (i.e., filtering), determining which information is encoded and maintained for later use whereas the parietal cortex determines how much information is held at 1 given time, regardless of relevance (i.e., capacity; McNab & Klingberg, 2008; Vogel, McCollough, & Machizawa, 2005). To test this theory, we delivered transcranial DC stimulation (tDCS) to the right PFC and right PPC and measured visual working memory capacity and filtering abilities both during and immediately following stimulation. We observed no evidence that tDCS to either the PFC or PPC significantly improved visual working memory. Although the present results did not allow us to make firm theoretical conclusions about the roles of the PFC and PPC in working memory, the results add to the growing body of literature surrounding tDCS and its associated behavioral and neurophysiological effects. (PsycINFO Database Record (c) 2017 APA, all rights reserved).
Tracing the time course of picture--word processing.
Smith, M C; Magee, L E
1980-12-01
A number of independent lines of research have suggested that semantic and articulatory information become available differentially from pictures and words. The first of the experiments reported here sought to clarify the time course by which information about pictures and words becomes available by considering the pattern of interference generated when incongruent pictures and words are presented simultaneously in a Stroop-like situation. Previous investigators report that picture naming is easily disrupted by the presence of a distracting word but that word naming is relatively immune to interference from an incongruent picture. Under the assumption that information available from a completed process may disrupt an ongoing process, these results suggest that words access articulatory information more rapidly than do pictures. Experiment 1 extended this paradigm by requiring subjects to verify the category of the target stimulus. In accordance with the hypothesis that picture access the semantic code more rapidly than words, there was a reversal in the interference pattern: Word categorization suffered considerable disruption, whereas picture categorization was minimally affected by the presence of an incongruent word. Experiment 2 sought to further test the hypothesis that access to semantic and articulatory codes is different for pictures and words by examining memory for those items following naming or categorization. Categorized words were better recognized than named words, whereas the reverse was true for pictures, a result which suggests that picture naming involves more extensive processing than picture categorization. Experiment 3 replicated this result under conditions in which viewing time was held constant. The last experiment extended the investigation of memory differences to a situation in which subjects were required to generate the superordinate category name. Here, memory for categorized pictures was as good as memory for named pictures. Category generation also influenced memory for words, memory performance being superior to that following a yes--no verification of category membership. These experiments suggest a model of information access whereby pictures access semantic information were readily than name information, with the reverse being true for words. Memory for both pictures and words was a function of the amount of processing required to access a particular type of information as well as the extent of response differentiation necessitated by the task.
Operating System For Numerically Controlled Milling Machine
NASA Technical Reports Server (NTRS)
Ray, R. B.
1992-01-01
OPMILL program is operating system for Kearney and Trecker milling machine providing fast easy way to program manufacture of machine parts with IBM-compatible personal computer. Gives machinist "equation plotter" feature, which plots equations that define movements and converts equations to milling-machine-controlling program moving cutter along defined path. System includes tool-manager software handling up to 25 tools and automatically adjusts to account for each tool. Developed on IBM PS/2 computer running DOS 3.3 with 1 MB of random-access memory.
Hardman, Kyle O; Cowan, Nelson
2015-03-01
Visual working memory stores stimuli from our environment as representations that can be accessed by high-level control processes. This study addresses a longstanding debate in the literature about whether storage limits in visual working memory include a limit to the complexity of discrete items. We examined the issue with a number of change-detection experiments that used complex stimuli that possessed multiple features per stimulus item. We manipulated the number of relevant features of the stimulus objects in order to vary feature load. In all of our experiments, we found that increased feature load led to a reduction in change-detection accuracy. However, we found that feature load alone could not account for the results but that a consideration of the number of relevant objects was also required. This study supports capacity limits for both feature and object storage in visual working memory. PsycINFO Database Record (c) 2015 APA, all rights reserved.
Marx, Svenja; Gruenhage, Gina; Walper, Daniel; Rutishauser, Ueli; Einhäuser, Wolfgang
2015-03-01
Competition is ubiquitous in perception. For example, items in the visual field compete for processing resources, and attention controls their priority (biased competition). The inevitable ambiguity in the interpretation of sensory signals yields another form of competition: distinct perceptual interpretations compete for access to awareness. Rivalry, where two equally likely percepts compete for dominance, explicates the latter form of competition. Building upon the similarity between attention and rivalry, we propose to model rivalry by a generic competitive circuit that is widely used in the attention literature-a winner-take-all (WTA) network. Specifically, we show that a network of two coupled WTA circuits replicates three common hallmarks of rivalry: the distribution of dominance durations, their dependence on input strength ("Levelt's propositions"), and the effects of stimulus removal (blanking). This model introduces a form of memory by forming discrete states and explains experimental data better than competitive models of rivalry without memory. This result supports the crucial role of memory in rivalry specifically and in competitive processes in general. Our approach unifies the seemingly distinct phenomena of rivalry, memory, and attention in a single model with competition as the common underlying principle. © 2015 The Authors. Annals of the New York Academy of Sciences published by Wiley Periodicals Inc. on behalf of The New York Academy of Sciences.
Review of optical memory technologies
NASA Technical Reports Server (NTRS)
Chen, D.
1972-01-01
Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.
A Novel Ni/WOX/W Resistive Random Access Memory with Excellent Retention and Low Switching Current
NASA Astrophysics Data System (ADS)
Chien, Wei-Chih; Chen, Yi-Chou; Lee, Feng-Ming; Lin, Yu-Yu; Lai, Erh-Kun; Yao, Yeong-Der; Gong, Jeng; Horng, Sheng-Fu; Yeh, Chiao-Wen; Tsai, Shih-Chang; Lee, Ching-Hsiung; Huang, Yu-Kai; Chen, Chun-Fu; Kao, Hsiao-Feng; Shih, Yen-Hao; Hsieh, Kuang-Yeu; Lu, Chih-Yuan
2011-04-01
The behavior of WOX resistive random access memory (ReRAM) is a strong function of the top electrode material, which controls the conduction mechanism and the forming process. When using a top electrode with low work function, the current conduction is limited by space charges. On the other hand, the mechanism becomes thermionic emission for devices with a high work function top electrode. These (thermionic) devices are also found to have higher initial resistance, reduced forming current, and larger resistance window. Based on these insights and considering the compatibility to complementary metal-oxide-semiconductor (CMOS) process, we proposed to use Ni as the top electrode for high performance WOX ReRAM devices. The new Ni/WOX/W device can be switched at a low current density less than 8×105 A/cm2, with RESET/SET resistance ratio greater than 100, and extremely good data retention of more than 300 years at 85 °C.
Interfacing a high performance disk array file server to a Gigabit LAN
NASA Technical Reports Server (NTRS)
Seshan, Srinivasan; Katz, Randy H.
1993-01-01
Our previous prototype, RAID-1, identified several bottlenecks in typical file server architectures. The most important bottleneck was the lack of a high-bandwidth path between disk, memory, and the network. Workstation servers, such as the Sun-4/280, have very slow access to peripherals on busses far from the CPU. For the RAID-2 system, we addressed this problem by designing a crossbar interconnect, Xbus board, that provides a 40MB/s path between disk, memory, and the network interfaces. However, this interconnect does not provide the system CPU with low latency access to control the various interfaces. To provide a high data rate to clients on the network, we were forced to carefully and efficiently design the network software. A block diagram of the system hardware architecture is given. In the following subsections, we describe pieces of the RAID-2 file server hardware that had a significant impact on the design of the network interface.
Electrical Characterization of the RCA CDP1822SD Random Access Memory, Volume 1, Appendix a
NASA Technical Reports Server (NTRS)
Klute, A.
1979-01-01
Electrical characteristization tests were performed on 35 RCA CDP1822SD, 256-by-4-bit, CMOS, random access memories. The tests included three functional tests, AC and DC parametric tests, a series of schmoo plots, rise/fall time screening, and a data retention test. All tests were performed on an automated IC test system with temperatures controlled by a thermal airstream unit. All the functional tests, the data retention test, and the AC and DC parametric tests were performed at ambient temperatures of 25 C, -20 C, -55 C, 85 C, and 125 C. The schmoo plots were performed at ambient temperatures of 25 C, -55 C, and 125 C. The data retention test was performed at 25 C. Five devices failed one or more functional tests and four of these devices failed to meet the expected limits of a number of AC parametric tests. Some of the schmoo plots indicated a small degree of interaction between parameters.
Three-dimensional magnetic bubble memory system
NASA Technical Reports Server (NTRS)
Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor)
1994-01-01
A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.
2017-03-01
models of software execution, for example memory access patterns, to check for security intrusions. Additional research was performed to tackle the...considered using indirect models of software execution, for example memory access patterns, to check for security intrusions. Additional research ...deterioration for example , no longer corresponds to the model used during verification time. Finally, the research looked at ways to combine hybrid systems
NASA Technical Reports Server (NTRS)
Feng, Hui-Yu; VanderWijngaart, Rob; Biswas, Rupak; Biegel, Bryan (Technical Monitor)
2001-01-01
We describe the design of a new method for the measurement of the performance of modern computer systems when solving scientific problems featuring irregular, dynamic memory accesses. The method involves the solution of a stylized heat transfer problem on an unstructured, adaptive grid. A Spectral Element Method (SEM) with an adaptive, nonconforming mesh is selected to discretize the transport equation. The relatively high order of the SEM lowers the fraction of wall clock time spent on inter-processor communication, which eases the load balancing task and allows us to concentrate on the memory accesses. The benchmark is designed to be three-dimensional. Parallelization and load balance issues of a reference implementation will be described in detail in future reports.
Moradkhani, Shirin; Salehi, Iraj; Abdolmaleki, Somayeh; Komaki, Alireza
2015-01-01
Background: Medicinal plants, owing to their different mechanisms such as antioxidants effects, may improve learning and memory impairments in diabetic rats. Calendula officinalis (CO), has a significant antioxidant activity. Aims: To examine the effect of hydroalcoholic extract of CO on passive avoidance learning (PAL) and memory in streptozotocin (STZ)-induced diabetic male rats. Settings and Design: A total of 32 adult male Wistar rats were randomly allocated to four groups: Control, diabetic, control + extract of CO and diabetic control + extract of CO groups with free access to regular rat diet. Subjects and Methods: Diabetes in diabetic rats was induced by single intraperitoneal injection of 60 mg/kg STZ. After confirmation of diabetes, oral administration of 300 mg/kg CO extract to extract-treated groups have been done. PAL was tested 8 weeks after onset of treatment, and blood glucose and body weight were measured in all groups at the beginning and end of the experiment. Statistical Analysis Used: The statistical analysis of data was performed by ANOVA followed by least significant difference post-hoc analysis. Results: Diabetes decreased learning and memory. Effect of CO extract in retention test (after 24 and 48 h) has been shown a significant decrease in step-through latency and increase in time spent in the dark compartment part. Also the extract partially improved hyperglycemia and reduced body weight. Conclusion: Taken together, CO extract can improve PAL and memory impairments in STZ-diabetic rats. This improvement may be due to its antioxidant, anticholinergic activities or its power to reduce hyperglycemia. PMID:26120230
A Pilot Memory Café for People with Learning Disabilities and Memory Difficulties
ERIC Educational Resources Information Center
Kiddle, Hannah; Drew, Neil; Crabbe, Paul; Wigmore, Jonathan
2016-01-01
Memory cafés have been found to normalise experiences of dementia and provide access to an accepting social network. People with learning disabilities are at increased risk of developing dementia, but the possible benefits of attending a memory café are not known. This study evaluates a 12-week pilot memory café for people with learning…
Large Capacity of Conscious Access for Incidental Memories in Natural Scenes.
Kaunitz, Lisandro N; Rowe, Elise G; Tsuchiya, Naotsugu
2016-09-01
When searching a crowd, people can detect a target face only by direct fixation and attention. Once the target is found, it is consciously experienced and remembered, but what is the perceptual fate of the fixated nontarget faces? Whereas introspection suggests that one may remember nontargets, previous studies have proposed that almost no memory should be retained. Using a gaze-contingent paradigm, we asked subjects to visually search for a target face within a crowded natural scene and then tested their memory for nontarget faces, as well as their confidence in those memories. Subjects remembered up to seven fixated, nontarget faces with more than 70% accuracy. Memory accuracy was correlated with trial-by-trial confidence ratings, which implies that the memory was consciously maintained and accessed. When the search scene was inverted, no more than three nontarget faces were remembered. These findings imply that incidental memory for faces, such as those recalled by eyewitnesses, is more reliable than is usually assumed. © The Author(s) 2016.
The Glasgow Voice Memory Test: Assessing the ability to memorize and recognize unfamiliar voices.
Aglieri, Virginia; Watson, Rebecca; Pernet, Cyril; Latinus, Marianne; Garrido, Lúcia; Belin, Pascal
2017-02-01
One thousand one hundred and twenty subjects as well as a developmental phonagnosic subject (KH) along with age-matched controls performed the Glasgow Voice Memory Test, which assesses the ability to encode and immediately recognize, through an old/new judgment, both unfamiliar voices (delivered as vowels, making language requirements minimal) and bell sounds. The inclusion of non-vocal stimuli allows the detection of significant dissociations between the two categories (vocal vs. non-vocal stimuli). The distributions of accuracy and sensitivity scores (d') reflected a wide range of individual differences in voice recognition performance in the population. As expected, KH showed a dissociation between the recognition of voices and bell sounds, her performance being significantly poorer than matched controls for voices but not for bells. By providing normative data of a large sample and by testing a developmental phonagnosic subject, we demonstrated that the Glasgow Voice Memory Test, available online and accessible from all over the world, can be a valid screening tool (~5 min) for a preliminary detection of potential cases of phonagnosia and of "super recognizers" for voices.
The Intention Interference Effect: The Difficulty of Ignoring What You Intend to Do
Cohen, Anna-Lisa; Kantner, Justin; Dixon, Roger A.; Lindsay, D. Stephen
2013-01-01
Intentions have been shown to be more accessible (e.g., more quickly and accurately recalled) compared to other sorts of to-be-remembered information; a result termed an intention superiority effect (Goschke & Kuhl, 1993). In the current study, we demonstrate an intention interference effect (IIE) in which colour-naming performance in a Stroop task was slower for words belonging to an intention that participants had to remember to carry out (Do the Task condition) versus an intention that did not have to be executed (Ignore the Task condition). In previous work (e.g., Cohen et al., 2005), having a prospective intention in mind was confounded with carrying a memory load. In Experiment 1, we added a digit-retention task to control for effects of cognitive load. In Experiment 2, we eliminated the memory confound in a new way, by comparing intention-related and control words within each trial. Results from both Experiments 1 and 2 revealed an intention interference effect suggesting that interference is very specific to the intention, not just to a memory load. PMID:21592940
Interactive water monitoring system accessible by cordless telephone
NASA Astrophysics Data System (ADS)
Volpicelli, Richard; Andeweg, Pierre; Hagar, William G.
1985-12-01
A battery-operated, microcomputer-controlled monitoring device linked with a cordless telephone has been developed for remote measurements. This environmental sensor is self-contained and collects and processes data according to the information sent to its on-board computer system. An RCA model 1805 microprocessor forms the basic controller with a program encoded in memory for data acquisition and analysis. Signals from analog sensing devices used to monitor the environment are converted into digital signals and stored in random access memory of the microcomputer. This remote sensing system is linked to the laboratory by means of a cordless telephone whose base unit is connected to regular telephone lines. This offshore sensing system is simply accessed by a phone call originating from a computer terminal in the laboratory. Data acquisition is initiated upon request: Information continues to be processed and stored until the computer is reprogrammed by another phone call request. Information obtained may be recalled by a phone call after the desired environmental measurements are finished or while they are in progress. Data sampling parameters may be reset at any time, including in the middle of a measurement cycle. The range of the system is limited only by existing telephone grid systems and by the transmission characteristics of the cordless phone used as a communications link. This use of a cordless telephone, coupled with the on-board computer system, may be applied to other field studies requiring data transfer between an on-site analytical system and the laboratory.
Enhancing Memory in Your Students: COMPOSE Yourself!
ERIC Educational Resources Information Center
Rotter, Kathleen M.
2009-01-01
The essence of teaching is, in fact, creating new memories for your students. The teacher's role is to help students store the correct information (memories) in ways that make recall and future access and use likely. Therefore, choosing techniques to enhance memory is possibly the most critical aspect of instructional design. COMPOSE is an acronym…
Wheelan, Nicola; Webster, Scott P.; Kenyon, Christopher J.; Caughey, Sarah; Walker, Brian R.; Holmes, Megan C.; Seckl, Jonathan R.; Yau, Joyce L.W.
2015-01-01
High glucocorticoid levels induced by stress enhance the memory of fearful events and may contribute to the development of anxiety and posttraumatic stress disorder. In contrast, elevated glucocorticoids associated with ageing impair spatial memory. We have previously shown that pharmacological inhibition of the intracellular glucocorticoid-amplifying enzyme 11β-hydroxysteroid dehydrogenase type 1 (11β-HSD1) improves spatial memory in aged mice. However, it is not known whether inhibition of 11β-HSD1 will have any beneficial effects on contextual fear memories in aged mice. Here, we examined the effects of UE2316, a selective 11β-HSD1 inhibitor which accesses the brain, on both spatial and contextual fear memories in aged mice using a vehicle-controlled crossover study design. Short-term UE2316 treatment improved spatial memory in aged mice, an effect which was reversed when UE2316 was substituted with vehicle. In contrast, contextual fear memory induced by foot-shock conditioning was significantly reduced by UE2316 in a non-reversible manner. When the order of treatment was reversed following extinction of the original fear memory, and a second foot-shock conditioning was given in a novel context, UE2316 treated aged mice (previously on vehicle) now showed increased fear memory compared to vehicle-treated aged mice (previously on UE2316). Renewal of the original extinguished fear memory triggered by exposure to a new environmental context may explain these effects. Thus 11β-HSD1 inhibition reverses spatial memory impairments with ageing while reducing the strength and persistence of new contextual fear memories. Potentially this could help prevent anxiety-related disorders in vulnerable elderly individuals. PMID:25497454
Wheelan, Nicola; Webster, Scott P; Kenyon, Christopher J; Caughey, Sarah; Walker, Brian R; Holmes, Megan C; Seckl, Jonathan R; Yau, Joyce L W
2015-04-01
High glucocorticoid levels induced by stress enhance the memory of fearful events and may contribute to the development of anxiety and posttraumatic stress disorder. In contrast, elevated glucocorticoids associated with ageing impair spatial memory. We have previously shown that pharmacological inhibition of the intracellular glucocorticoid-amplifying enzyme 11β-hydroxysteroid dehydrogenase type 1 (11β-HSD1) improves spatial memory in aged mice. However, it is not known whether inhibition of 11β-HSD1 will have any beneficial effects on contextual fear memories in aged mice. Here, we examined the effects of UE2316, a selective 11β-HSD1 inhibitor which accesses the brain, on both spatial and contextual fear memories in aged mice using a vehicle-controlled crossover study design. Short-term UE2316 treatment improved spatial memory in aged mice, an effect which was reversed when UE2316 was substituted with vehicle. In contrast, contextual fear memory induced by foot-shock conditioning was significantly reduced by UE2316 in a non-reversible manner. When the order of treatment was reversed following extinction of the original fear memory, and a second foot-shock conditioning was given in a novel context, UE2316 treated aged mice (previously on vehicle) now showed increased fear memory compared to vehicle-treated aged mice (previously on UE2316). Renewal of the original extinguished fear memory triggered by exposure to a new environmental context may explain these effects. Thus 11β-HSD1 inhibition reverses spatial memory impairments with ageing while reducing the strength and persistence of new contextual fear memories. Potentially this could help prevent anxiety-related disorders in vulnerable elderly individuals. Copyright © 2014 Elsevier Ltd. All rights reserved.
Dyslexia Limits the Ability to Categorize Talker Dialect
Long, Gayle Beam; Jacewicz, Ewa
2016-01-01
Purpose The purpose of this study was to determine whether the underlying phonological impairment in dyslexia is associated with a deficit in categorizing regional dialects. Method Twenty adults with dyslexia, 20 school-age children with dyslexia, and 40 corresponding control listeners with average reading ability listened to sentences produced by multiple talkers (both sexes) representing two dialects: Midland dialect in Ohio (same as listeners' dialect) and Southern dialect in Western North Carolina. Participants' responses were analyzed using signal detection theory. Results Listeners with dyslexia were less sensitive to talker dialect than listeners with average reading ability. Children were less sensitive to dialect than adults. Under stimulus uncertainty, listeners with average reading ability were biased toward Ohio dialect, whereas listeners with dyslexia were unbiased in their responses. Talker sex interacted with sensitivity and bias differently for listeners with dyslexia than for listeners with average reading ability. The correlations between dialect sensitivity and phonological memory scores were strongest for adults with dyslexia. Conclusions The results imply that the phonological deficit in dyslexia arises from impaired access to intact phonological representations rather than from poorly specified representations. It can be presumed that the impeded access to implicit long-term memory representations for indexical (dialect) information is due to less efficient operations in working memory, including deficiencies in utilizing talker normalization processes. PMID:27575597
Murphy, Philip N; Erwin, Philip G; Maciver, Linda; Fisk, John E; Larkin, Derek; Wareing, Michelle; Montgomery, Catharine; Hilton, Joanne; Tames, Frank J; Bradley, Belinda; Yanulevitch, Kate; Ralley, Richard
2011-10-01
This study aimed to examine the relationship between the consumption of ecstasy (3,4-methylenedioxymethamphetamine (MDMA)) and cannabis, and performance on the random letter generation task which generates dependent variables drawing upon executive inhibition and access to semantic long-term memory (LTM). The participant group was a between-participant independent variable with users of both ecstasy and cannabis (E/C group, n = 15), users of cannabis but not ecstasy (CA group, n = 13) and controls with no exposure to these drugs (CO group, n = 12). Dependent variables measured violations of randomness: number of repeat sequences, number of alphabetical sequences (both drawing upon inhibition) and redundancy (drawing upon access to semantic LTM). E/C participants showed significantly higher redundancy than CO participants but did not differ from CA participants. There were no significant effects for the other dependent variables. A regression model comprising intelligence measures and estimates of ecstasy and cannabis consumption predicted redundancy scores, but only cannabis consumption contributed significantly to this prediction. Impaired access to semantic LTM may be related to cannabis consumption, although the involvement of ecstasy and other stimulant drugs cannot be excluded here. Executive inhibitory functioning, as measured by the random letter generation task, is unrelated to ecstasy and cannabis consumption. Copyright © 2011 John Wiley & Sons, Ltd.
El-Zawawy, Mohamed A.
2014-01-01
This paper introduces new approaches for the analysis of frequent statement and dereference elimination for imperative and object-oriented distributed programs running on parallel machines equipped with hierarchical memories. The paper uses languages whose address spaces are globally partitioned. Distributed programs allow defining data layout and threads writing to and reading from other thread memories. Three type systems (for imperative distributed programs) are the tools of the proposed techniques. The first type system defines for every program point a set of calculated (ready) statements and memory accesses. The second type system uses an enriched version of types of the first type system and determines which of the ready statements and memory accesses are used later in the program. The third type system uses the information gather so far to eliminate unnecessary statement computations and memory accesses (the analysis of frequent statement and dereference elimination). Extensions to these type systems are also presented to cover object-oriented distributed programs. Two advantages of our work over related work are the following. The hierarchical style of concurrent parallel computers is similar to the memory model used in this paper. In our approach, each analysis result is assigned a type derivation (serves as a correctness proof). PMID:24892098
Coherent optical pulse sequencer for quantum applications.
Hosseini, Mahdi; Sparkes, Ben M; Hétet, Gabriel; Longdell, Jevon J; Lam, Ping Koy; Buchler, Ben C
2009-09-10
The bandwidth and versatility of optical devices have revolutionized information technology systems and communication networks. Precise and arbitrary control of an optical field that preserves optical coherence is an important requisite for many proposed photonic technologies. For quantum information applications, a device that allows storage and on-demand retrieval of arbitrary quantum states of light would form an ideal quantum optical memory. Recently, significant progress has been made in implementing atomic quantum memories using electromagnetically induced transparency, photon echo spectroscopy, off-resonance Raman spectroscopy and other atom-light interaction processes. Single-photon and bright-optical-field storage with quantum states have both been successfully demonstrated. Here we present a coherent optical memory based on photon echoes induced through controlled reversible inhomogeneous broadening. Our scheme allows storage of multiple pulses of light within a chosen frequency bandwidth, and stored pulses can be recalled in arbitrary order with any chosen delay between each recalled pulse. Furthermore, pulses can be time-compressed, time-stretched or split into multiple smaller pulses and recalled in several pieces at chosen times. Although our experimental results are so far limited to classical light pulses, our technique should enable the construction of an optical random-access memory for time-bin quantum information, and have potential applications in quantum information processing.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.
Here, the tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valuedmore » non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.« less
Retention and Fading of Military Skills: Literature Review
2000-04-01
distinction between availability and accessibility of human memory ( Tulving & Pearlstone , 1966; Tulving , 1983). Observation of some decrement in performance...Army War College. TULVING , E. (1983). Elements of Episodic Memory. London: Oxford University Press. TULVING , E., & PEARLSTONE , Z. (1966). Availability...store ( Tulving , 1983). To access this knowledge, the individual consciously recalls facts about the task and attempts to use them to guide performance
ERIC Educational Resources Information Center
Wood, Wendy; And Others
Research literature shows that people with access to attitude-relevant information in memory are able to draw on relevant beliefs and prior experiences when analyzing a persuasive message. This suggests that people who can retrieve little attitude-relevant information should be less able to engage in systematic processing. Two experiments were…
Federal Register 2010, 2011, 2012, 2013, 2014
2011-07-28
... supplementing the amended complaint was filed on June 28, 2011. A second amended complaint was filed on July 13... of certain static random access memories and products containing same by reason of infringement of... 13 of the `937 patent, and whether an industry in the United States exists as required by subsection...
Integrated Vertical Bloch Line (VBL) memory
NASA Technical Reports Server (NTRS)
Katti, R. R.; Wu, J. C.; Stadler, H. L.
1991-01-01
Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.
Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing
NASA Astrophysics Data System (ADS)
Rao, Feng; Ding, Keyuan; Zhou, Yuxing; Zheng, Yonghui; Xia, Mengjiao; Lv, Shilong; Song, Zhitang; Feng, Songlin; Ronneberger, Ider; Mazzarello, Riccardo; Zhang, Wei; Ma, Evan
2017-12-01
Operation speed is a key challenge in phase-change random-access memory (PCRAM) technology, especially for achieving subnanosecond high-speed cache memory. Commercialized PCRAM products are limited by the tens of nanoseconds writing speed, originating from the stochastic crystal nucleation during the crystallization of amorphous germanium antimony telluride (Ge2Sb2Te5). Here, we demonstrate an alloying strategy to speed up the crystallization kinetics. The scandium antimony telluride (Sc0.2Sb2Te3) compound that we designed allows a writing speed of only 700 picoseconds without preprogramming in a large conventional PCRAM device. This ultrafast crystallization stems from the reduced stochasticity of nucleation through geometrically matched and robust scandium telluride (ScTe) chemical bonds that stabilize crystal precursors in the amorphous state. Controlling nucleation through alloy design paves the way for the development of cache-type PCRAM technology to boost the working efficiency of computing systems.
Working memory maintenance is sufficient to reduce state anxiety.
Balderston, Nicholas L; Quispe-Escudero, David; Hale, Elizabeth; Davis, Andrew; O'Connell, Katherine; Ernst, Monique; Grillon, Christian
2016-11-01
According to the attentional control theory (ACT) proposed by Eysenck and colleagues, anxiety interferes with cognitive processing by prioritizing bottom-up attentional processes over top-down attentional processes, leading to competition for access to limited resources in working memory, particularly the central executive (Eysenck, Derakshan, Santos, & Calvo, ). However, previous research using the n-back working memory task suggests that working memory load also reduces state anxiety. Assuming that similar mechanisms underlie the effect of anxiety on cognition, and the effect of cognition on anxiety, one possible implication of the ACT would suggest that the reduction of state anxiety with increasing working memory load is driven by activation of central executive attentional control processes. We tested this hypothesis using the Sternberg working memory paradigm, where maintenance processes can be isolated from central executive processes (Altamura et al., ; Sternberg, ). Consistent with the n-back results, subjects showed decreased state anxiety during the maintenance period of high-load trials relative to low-load trials, suggesting that maintenance processes alone are sufficient to achieve this state anxiety reduction. Given that the Sternberg task does not require central executive engagement, these results are not consistent with an implication of the ACT where the cognition/anxiety relationship and anxiety/cognition relationship are mediated by similar central executive mechanisms. Instead, we propose an extension of the ACT such that engaging working memory maintenance suppresses state anxiety in a load-dependent manner. Furthermore, we hypothesize that the efficacy of this effect may moderate the effect of trait anxiety on cognition. Published 2016. This article is a U.S. Government work and is in the public domain in the USA.
Guilt as a Motivator for Moral Judgment: An Autobiographical Memory Study
Knez, Igor; Nordhall, Ola
2017-01-01
The aim was to investigate the phenomenology of self-defining moral memory and its relations to self-conscious feelings of guilt and willingness to do wrong (moral intention) in social and economic moral situations. We found that people use guilt as a moral motivator for their moral intention. The reparative function of guilt varied, however, with type of situation; that is, participants felt guiltier and were less willing to do wrong in economic compared to social moral situations. The self-defining moral memory was shown to be relatively more easy to access (accessibility), logically structured (coherence), vivid, seen from the first-person perspective (visual perspective), real (sensory detail); but was relatively less positive (valence), emotionally intense, chronologically clear (time perspective), in agreement with the present self (distancing), and shared. Finally, it was indicated that the more guilt people felt the more hidden/denied (less accessible), but more real (more sensory details), the self-defining moral memory. PMID:28539906
Retrieval practice enhances the accessibility but not the quality of memory.
Sutterer, David W; Awh, Edward
2016-06-01
Numerous studies have demonstrated that retrieval from long-term memory (LTM) can enhance subsequent memory performance, a phenomenon labeled the retrieval practice effect. However, the almost exclusive reliance on categorical stimuli in this literature leaves open a basic question about the nature of this improvement in memory performance. It has not yet been determined whether retrieval practice improves the probability of successful memory retrieval or the quality of the retrieved representation. To answer this question, we conducted three experiments using a mixture modeling approach (Zhang & Luck, 2008) that provides a measure of both the probability of recall and the quality of the recalled memories. Subjects attempted to memorize the color of 400 unique shapes. After every 10 images were presented, subjects either recalled the last 10 colors (the retrieval practice condition) by clicking on a color wheel with each shape as a retrieval cue or they participated in a control condition that involved no further presentations (Experiment 1) or restudy of the 10 shape/color associations (Experiments 2 and 3). Performance in a subsequent delayed recall test revealed a robust retrieval practice effect. Subjects recalled a significantly higher proportion of items that they had previously retrieved relative to items that were untested or that they had restudied. Interestingly, retrieval practice did not elicit any improvement in the precision of the retrieved memories. The same empirical pattern also was observed following delays of greater than 24 hours. Thus, retrieval practice increases the probability of successful memory retrieval but does not improve memory quality.
Platzer, Christine; Bröder, Arndt; Heck, Daniel W
2014-05-01
Decision situations are typically characterized by uncertainty: Individuals do not know the values of different options on a criterion dimension. For example, consumers do not know which is the healthiest of several products. To make a decision, individuals can use information about cues that are probabilistically related to the criterion dimension, such as sugar content or the concentration of natural vitamins. In two experiments, we investigated how the accessibility of cue information in memory affects which decision strategy individuals rely on. The accessibility of cue information was manipulated by means of a newly developed paradigm, the spatial-memory-cueing paradigm, which is based on a combination of the looking-at-nothing phenomenon and the spatial-cueing paradigm. The results indicated that people use different decision strategies, depending on the validity of easily accessible information. If the easily accessible information is valid, people stop information search and decide according to a simple take-the-best heuristic. If, however, information that comes to mind easily has a low predictive validity, people are more likely to integrate all available cue information in a compensatory manner.
ERIC Educational Resources Information Center
Bahrick, Lorraine E.; Hernandez-Reif, Maria; Pickens, Jeffrey N.
1997-01-01
Tested hypothesis from Bahrick and Pickens' infant attention model that retrieval cues increase memory accessibility and shift visual preferences toward greater novelty to resemble recent memories. Found that after retention intervals associated with remote or intermediate memory, previous familiarity preferences shifted to null or novelty…
ERIC Educational Resources Information Center
Oberauer, Klauss; Lange, Elke B.
2009-01-01
The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. "Journal of Experimental Psychology: Learning, Memory, and Cognition, 28", 411-421]. Familiarity arises…
Recognition-induced forgetting is not due to category-based set size.
Maxcey, Ashleigh M
2016-01-01
What are the consequences of accessing a visual long-term memory representation? Previous work has shown that accessing a long-term memory representation via retrieval improves memory for the targeted item and hurts memory for related items, a phenomenon called retrieval-induced forgetting. Recently we found a similar forgetting phenomenon with recognition of visual objects. Recognition-induced forgetting occurs when practice recognizing an object during a two-alternative forced-choice task, from a group of objects learned at the same time, leads to worse memory for objects from that group that were not practiced. An alternative explanation of this effect is that category-based set size is inducing forgetting, not recognition practice as claimed by some researchers. This alternative explanation is possible because during recognition practice subjects make old-new judgments in a two-alternative forced-choice task, and are thus exposed to more objects from practiced categories, potentially inducing forgetting due to set-size. Herein I pitted the category-based set size hypothesis against the recognition-induced forgetting hypothesis. To this end, I parametrically manipulated the amount of practice objects received in the recognition-induced forgetting paradigm. If forgetting is due to category-based set size, then the magnitude of forgetting of related objects will increase as the number of practice trials increases. If forgetting is recognition induced, the set size of exemplars from any given category should not be predictive of memory for practiced objects. Consistent with this latter hypothesis, additional practice systematically improved memory for practiced objects, but did not systematically affect forgetting of related objects. These results firmly establish that recognition practice induces forgetting of related memories. Future directions and important real-world applications of using recognition to access our visual memories of previously encountered objects are discussed.
NASA Astrophysics Data System (ADS)
Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro
2006-04-01
A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).
DOE Office of Scientific and Technical Information (OSTI.GOV)
Prakash, A., E-mail: amitknp@postech.ac.kr, E-mail: amit.knp02@gmail.com, E-mail: hwanghs@postech.ac.kr; Song, J.; Hwang, H., E-mail: amitknp@postech.ac.kr, E-mail: amit.knp02@gmail.com, E-mail: hwanghs@postech.ac.kr
In order to obtain reliable multilevel cell (MLC) characteristics, resistance controllability between the different resistance levels is required especially in resistive random access memory (RRAM), which is prone to resistance variability mainly due to its intrinsic random nature of defect generation and filament formation. In this study, we have thoroughly investigated the multilevel resistance variability in a TaO{sub x}-based nanoscale (<30 nm) RRAM operated in MLC mode. It is found that the resistance variability not only depends on the conductive filament size but also is a strong function of oxygen vacancy concentration in it. Based on the gained insights through experimentalmore » observations and simulation, it is suggested that forming thinner but denser conductive filament may greatly improve the temporal resistance variability even at low operation current despite the inherent stochastic nature of resistance switching process.« less
Gao, Shuang; Liu, Gang; Chen, Qilai; Xue, Wuhong; Yang, Huali; Shang, Jie; Chen, Bin; Zeng, Fei; Song, Cheng; Pan, Feng; Li, Run-Wei
2018-02-21
Resistive random access memory (RRAM) with inherent logic-in-memory capability exhibits great potential to construct beyond von-Neumann computers. Particularly, unipolar RRAM is more promising because its single polarity operation enables large-scale crossbar logic-in-memory circuits with the highest integration density and simpler peripheral control circuits. However, unipolar RRAM usually exhibits poor switching uniformity because of random activation of conducting filaments and consequently cannot meet the strict uniformity requirement for logic-in-memory application. In this contribution, a new methodology that constructs cone-shaped conducting filaments by using chemically a active metal cathode is proposed to improve unipolar switching uniformity. Such a peculiar metal cathode will react spontaneously with the oxide switching layer to form an interfacial layer, which together with the metal cathode itself can act as a load resistor to prevent the overgrowth of conducting filaments and thus make them more cone-like. In this way, the rupture of conducting filaments can be strictly limited to the tip region, making their residual parts favorable locations for subsequent filament growth and thus suppressing their random regeneration. As such, a novel "one switch + one unipolar RRAM cell" hybrid structure is capable to realize all 16 Boolean logic functions for large-scale logic-in-memory circuits.
Deployment of 802.15.4 Sensor Networks for C4ISR Operations
2006-06-01
43 Figure 20.MSP410CA Dense Grid Monitoring (Crossbow User’s Manual, 2005). ....................................44 Figure 21.(a)MICA2 without...Deployment of Sensor Grid (COASTS OPORD, 2006). ...56 Figure 27.Topology View of Two Nodes and Base Station .......57 Figure 28.Nodes Employing Multi...Random Access Memory TCP/IP Transmission Control Protocol/Internet Protocol TinyOS Tiny Micro Threading Operating System UARTs Universal
Vertical Launch System Loadout Planner
2015-03-01
United States Navy USS United States’ Ship VBA Visual Basic for Applications VLP VLS Loadout Planner VLS Vertical Launch System...with 32 gigabytes of random access memory and eight processors, General Algebraic Modeling System (GAMS) CPLEX version 24 (GAMS, 2015) solves this...problem in ten minutes to an integer tolerance of 10%. The GAMS interpreter and CPLEX solver require 75 Megabytes of random access memory for this
Nonvolatile GaAs Random-Access Memory
NASA Technical Reports Server (NTRS)
Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan
1994-01-01
Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.
MemAxes Visualization Software
DOE Office of Scientific and Technical Information (OSTI.GOV)
Hardware advancements such as Intel's PEBS and AMD's IBS, as well as software developments such as the perf_event API in Linux have made available the acquisition of memory access samples with performance information. MemAxes is a visualization and analysis tool for memory access sample data. By mapping the samples to their associated code, variables, node topology, and application dataset, MemAxes provides intuitive views of the data.
NASA Astrophysics Data System (ADS)
Lee, N. J.; Kang, T. S.; Hu, Q.; Lee, T. S.; Yoon, T.-S.; Lee, H. H.; Yoo, E. J.; Choi, Y. J.; Kang, C. J.
2018-06-01
Tri-state resistive switching characteristics of bilayer resistive random access memory devices based on manganese oxide (MnO)/tantalum oxide (Ta2O5) have been studied. The current–voltage (I–V) characteristics of the Ag/MnO/Ta2O5/Pt device show tri-state resistive switching (RS) behavior with a high resistance state (HRS), intermediate resistance state (IRS), and low resistance state (LRS), which are controlled by the reset process. The MnO/Ta2O5 film shows bipolar RS behavior through the formation and rupture of conducting filaments without the forming process. The device shows reproducible and stable RS both from the HRS to the LRS and from the IRS to the LRS. In order to elucidate the tri-state RS mechanism in the Ag/MnO/Ta2O5/Pt device, transmission electron microscope (TEM) images are measured in the LRS, IRS and HRS. White lines like dendrites are observed in the Ta2O5 film in both the LRS and the IRS. Poole–Frenkel conduction, space charge limited conduction, and Ohmic conduction are proposed as the dominant conduction mechanisms for the Ag/MnO/Ta2O5/Pt device based on the obtained I–V characteristics and TEM images.
Recollection Rejection: How Children Edit Their False Memories.
ERIC Educational Resources Information Center
Brainerd, C. J.; Reyna, V. F.
2002-01-01
Presents new measure of children's use of an editing operation that suppresses false memories by accessing verbatim traces of true events. Application of the methodology showed that false-memory editing increased dramatically between early and middle childhood. Measure reacted appropriately to experimental manipulations. Developmental reductions…
Design, processing, and testing of lsi arrays for space station
NASA Technical Reports Server (NTRS)
Lile, W. R.; Hollingsworth, R. J.
1972-01-01
The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.
Blumrich, Matthias A.; Salapura, Valentina
2010-11-02
An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Sidlauskas, D.P.
A new type of biometric identifier which utilizes hand outline measurements made in three dimensions is described. This device uses solid state imaging with no moving parts. The important characteristics of accuracy, speed, user tolerability, small template size, low power, portability and reliability are discussed. A complete stand-alone biometric access control station with sufficient memory for 10,000 users and weighing less than 10 pounds has been built and tested. A test was conducted involving daily use by 112 users over a seven week period during which over 6300 access attempts were made. The single try equal error rate was foundmore » to be 0.4%. There were no false rejects when three tries were allowed before access was denied. Defeat with an artifact is difficult because the hand must be copied in all three dimensions.« less
NASA Astrophysics Data System (ADS)
Sarkar, Biplab; Mills, Steven; Lee, Bongmook; Pitts, W. Shepherd; Misra, Veena; Franzon, Paul D.
2018-02-01
In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO2 dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO2 at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.
Marijuana effects on long-term memory assessment and retrieval.
Darley, C F; Tinklenberg, J R; Roth, W T; Vernon, S; Kopell, B S
1977-05-09
The ability of 16 college-educated male subjects to recall from long-term memory a series of common facts was tested during intoxication with marijuana extract calibrated to 0.3 mg/kg delta-9-tetrahydrocannabinol and during placebo conditions. The subjects' ability to assess their memory capabilities was then determined by measuring how certain they were about the accuracy of their recall performance and by having them predict their performance on a subsequent recognition test involving the same recall items. Marijuana had no effect on recall or recognition performance. These results do not support the view that marijuana provides access to facts in long-term storage which are inaccessible during non-intoxication. During both marijuana and placebo conditions, subjects could accurately predict their recognition memory performance. Hence, marijuana did not alter the subjects' ability to accurately assess what information resides in long-term memory even though they did not have complete access to that information.
Parameter optimization for transitions between memory states in small arrays of Josephson junctions
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rezac, Jacob D.; Imam, Neena; Braiman, Yehuda
Coupled arrays of Josephson junctions possess multiple stable zero voltage states. Such states can store information and consequently can be utilized for cryogenic memory applications. Basic memory operations can be implemented by sending a pulse to one of the junctions and studying transitions between the states. In order to be suitable for memory operations, such transitions between the states have to be fast and energy efficient. Here in this article we employed simulated annealing, a stochastic optimization algorithm, to study parameter optimization of array parameters which minimizes times and energies of transitions between specifically chosen states that can be utilizedmore » for memory operations (Read, Write, and Reset). Simulation results show that such transitions occur with access times on the order of 10–100 ps and access energies on the order of 10 -19–5×10 -18 J. Numerical simulations are validated with approximate analytical results.« less
Behavioral and Neural Markers of Flexible Attention over Working Memory in Aging.
Mok, Robert M; Myers, Nicholas E; Wallis, George; Nobre, Anna Christina
2016-04-01
Working memory (WM) declines as we age and, because of its fundamental role in higher order cognition, this can have highly deleterious effects in daily life. We investigated whether older individuals benefit from flexible orienting of attention within WM to mitigate cognitive decline. We measured magnetoencephalography (MEG) in older adults performing a WM precision task with cues during the maintenance period that retroactively predicted the location of the relevant items for performance (retro-cues). WM performance of older adults significantly benefitted from retro-cues. Whereas WM maintenance declined with age, retro-cues conferred strong attentional benefits. A model-based analysis revealed an increase in the probability of recalling the target, a lowered probability of retrieving incorrect items or guessing, and an improvement in memory precision. MEG recordings showed that retro-cues induced a transient lateralization of alpha (8-14 Hz) and beta (15-30 Hz) oscillatory power. Interestingly, shorter durations of alpha/beta lateralization following retro-cues predicted larger cueing benefits, reinforcing recent ideas about the dynamic nature of access to WM representations. Our results suggest that older adults retain flexible control over WM, but individual differences in control correspond to differences in neural dynamics, possibly reflecting the degree of preservation of control in healthy aging. © The Author 2016. Published by Oxford University Press.
Behavioral and Neural Markers of Flexible Attention over Working Memory in Aging
Mok, Robert M.; Myers, Nicholas E.; Wallis, George; Nobre, Anna Christina
2016-01-01
Working memory (WM) declines as we age and, because of its fundamental role in higher order cognition, this can have highly deleterious effects in daily life. We investigated whether older individuals benefit from flexible orienting of attention within WM to mitigate cognitive decline. We measured magnetoencephalography (MEG) in older adults performing a WM precision task with cues during the maintenance period that retroactively predicted the location of the relevant items for performance (retro-cues). WM performance of older adults significantly benefitted from retro-cues. Whereas WM maintenance declined with age, retro-cues conferred strong attentional benefits. A model-based analysis revealed an increase in the probability of recalling the target, a lowered probability of retrieving incorrect items or guessing, and an improvement in memory precision. MEG recordings showed that retro-cues induced a transient lateralization of alpha (8–14 Hz) and beta (15–30 Hz) oscillatory power. Interestingly, shorter durations of alpha/beta lateralization following retro-cues predicted larger cueing benefits, reinforcing recent ideas about the dynamic nature of access to WM representations. Our results suggest that older adults retain flexible control over WM, but individual differences in control correspond to differences in neural dynamics, possibly reflecting the degree of preservation of control in healthy aging. PMID:26865653
Rubright, Jonathan; Sankar, Pamela; Casarett, David J; Gur, Ruben; Xie, Sharon X; Karlawish, Jason
2010-12-01
Early and progressive cognitive impairments of patients with Alzheimer disease (AD) hinder their capacity to provide informed consent. Unfortunately, the limited research on techniques to improve capacity has shown mixed results. Therefore, the authors tested whether a memory and organizational aid improves the performance of patients with AD on measures of capacity and competency to give informed consent. Patients with AD randomly assigned to standard consent or standard plus a memory and organizational aid. Memory and organizational aid summarized the content of information mandated under the informed consent disclosure requirements of the Common Rule at a sixth grade reading level. Three psychiatrists without access to patient data independently reviewed MacArthur Competence Assessment Tool for Clinical Research (MacCAT-CR) interview transcripts to judge whether the patient was capable of providing informed consent. The agreement of at least two of the three experts defined a participant as capable of providing informed consent. Secondary outcomes are MacCAT-CR measures of understanding, appreciation and reasoning, and comparison with cognitively normal older adult norms. AD intervention and control groups were similar in terms of age, education, and cognitive status. The intervention group was more likely to be judged competent than control group and had higher scores on MacCAT-CR measure of understanding. The intervention had no effect on the measures of appreciation or reasoning. A consent process that addresses the deficits in memory and attention of a patient with AD can improve capacity to give informed consent for early phase AD research. The results also validate the MacCAT-CR as an instrument to measure capacity, especially the understanding subscale. ClinicalTrials.Gov#NCT00105612, http://clinicaltrials.gov/show/NCT00105612.
Rubright, Jonathan; Sankar, Pamela; Casarett, David J; Gur, Ruben; Xie, Sharon X; Karlawish, Jason
2010-01-01
Objectives AD patients' early and progressive cognitive impairments hinder their capacity to provide informed consent. Unfortunately, the limited research on techniques to improve capacity has shown mixed results. Therefore, we tested whether a memory and organizational aid improves AD patient performance on measures of capacity and competency to give informed consent. Design, Setting, and Participants AD patients randomly assigned to standard consent, or standard plus a memory and organizational aid. Intervention Memory and organizational aid summarized at a 6th grade reading level the content of information mandated under the Common Rule's informed consent disclosure requirements. Measurements Three psychiatrists without access to patient data independently reviewed MacArthur Competence Assessment Tool for Clinical Research (MacCAT-CR) interview transcripts to judge whether the patient was capable of providing informed consent. The agreement of at least two of three experts defined a participant as capable of providing informed consent. Secondary outcomes are MacCAT-CR measures of understanding, appreciation and reasoning, and comparison to cognitively normal older adult norms. Results AD intervention and control groups were similar in terms of age, education, and cognitive status. The intervention group was more likely to be judged competent than control group and had higher scores on MacCAT-CR measure of understanding. The intervention had no effect on measures of appreciation or reasoning. Conclusions A consent process that addresses an AD patients' deficits in memory and attention can improve capacity to give informed consent for early phase AD research. The results also validate the MacCAT-CR as an instrument to measure capacity, especially the understanding subscale. PMID:20808101
... pdf . Accessed on June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...
NASA Technical Reports Server (NTRS)
Harper, Richard E.; Butler, Bryan P.
1990-01-01
The Draper fault-tolerant processor with fault-tolerant shared memory (FTP/FTSM), which is designed to allow application tasks to continue execution during the memory alignment process, is described. Processor performance is not affected by memory alignment. In addition, the FTP/FTSM incorporates a hardware scrubber device to perform the memory alignment quickly during unused memory access cycles. The FTP/FTSM architecture is described, followed by an estimate of the time required for channel reintegration.
ERIC Educational Resources Information Center
Bäuml, Karl-Heinz T.; Dobler, Ina M.
2015-01-01
Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas…
NASA Astrophysics Data System (ADS)
Erez, Mattan; Dally, William J.
Stream processors, like other multi core architectures partition their functional units and storage into multiple processing elements. In contrast to typical architectures, which contain symmetric general-purpose cores and a cache hierarchy, stream processors have a significantly leaner design. Stream processors are specifically designed for the stream execution model, in which applications have large amounts of explicit parallel computation, structured and predictable control, and memory accesses that can be performed at a coarse granularity. Applications in the streaming model are expressed in a gather-compute-scatter form, yielding programs with explicit control over transferring data to and from on-chip memory. Relying on these characteristics, which are common to many media processing and scientific computing applications, stream architectures redefine the boundary between software and hardware responsibilities with software bearing much of the complexity required to manage concurrency, locality, and latency tolerance. Thus, stream processors have minimal control consisting of fetching medium- and coarse-grained instructions and executing them directly on the many ALUs. Moreover, the on-chip storage hierarchy of stream processors is under explicit software control, as is all communication, eliminating the need for complex reactive hardware mechanisms.
Scalability of voltage-controlled filamentary and nanometallic resistance memory devices.
Lu, Yang; Lee, Jong Ho; Chen, I-Wei
2017-08-31
Much effort has been devoted to device and materials engineering to realize nanoscale resistance random access memory (RRAM) for practical applications, but a rational physical basis to be relied on to design scalable devices spanning many length scales is still lacking. In particular, there is no clear criterion for switching control in those RRAM devices in which resistance changes are limited to localized nanoscale filaments that experience concentrated heat, electric current and field. Here, we demonstrate voltage-controlled resistance switching, always at a constant characteristic critical voltage, for macro and nanodevices in both filamentary RRAM and nanometallic RRAM, and the latter switches uniformly and does not require a forming process. As a result, area-scalability can be achieved under a device-area-proportional current compliance for the low resistance state of the filamentary RRAM, and for both the low and high resistance states of the nanometallic RRAM. This finding will help design area-scalable RRAM at the nanoscale. It also establishes an analogy between RRAM and synapses, in which signal transmission is also voltage-controlled.
Blanket Gate Would Address Blocks Of Memory
NASA Technical Reports Server (NTRS)
Lambe, John; Moopenn, Alexander; Thakoor, Anilkumar P.
1988-01-01
Circuit-chip area used more efficiently. Proposed gate structure selectively allows and restricts access to blocks of memory in electronic neural-type network. By breaking memory into independent blocks, gate greatly simplifies problem of reading from and writing to memory. Since blocks not used simultaneously, share operational amplifiers that prompt and read information stored in memory cells. Fewer operational amplifiers needed, and chip area occupied reduced correspondingly. Cost per bit drops as result.
Memory hierarchy using row-based compression
Loh, Gabriel H.; O'Connor, James M.
2016-10-25
A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.
Fuertes Marraco, Silvia A; Soneson, Charlotte; Delorenzi, Mauro; Speiser, Daniel E
2015-09-01
The live-attenuated Yellow Fever (YF) vaccine YF-17D induces a broad and polyfunctional CD8 T cell response in humans. Recently, we identified a population of stem cell-like memory CD8 T cells induced by YF-17D that persists at stable frequency for at least 25 years after vaccination. The YF-17D is thus a model system of human CD8 T cell biology that furthermore allows to track and study long-lasting and antigen-specific human memory CD8 T cells. Here, we describe in detail the sample characteristics and preparation of a microarray dataset acquired for genome-wide gene expression profiling of long-lasting YF-specific stem cell-like memory CD8 T cells, compared to the reference CD8 T cell differentiation subsets from total CD8 T cells. We also describe the quality controls, annotations and exploratory analyses of the dataset. The microarray data is available from the Gene Expression Omnibus (GEO) public repository with accession number GSE65804.
Schedulers with load-store queue awareness
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.
2017-02-07
In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.
Schedulers with load-store queue awareness
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.
2017-01-24
In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.
NASA Astrophysics Data System (ADS)
Chang, Liang-Shun; Lin, Chrong Jung; King, Ya-Chin
2014-01-01
The temperature dependent characteristics of the random telegraphic noise (RTN) on contact resistive random access memory (CRRAM) are studied in this work. In addition to the bi-level switching, the occurrences of the middle states in the RTN signal are investigated. Based on the unique its temperature dependent characteristics, a new temperature sensing scheme is proposed for applications in ultra-low power sensor modules.
Remote Memory Access Protocol Target Node Intellectual Property
NASA Technical Reports Server (NTRS)
Haddad, Omar
2013-01-01
The MagnetoSpheric Multiscale (MMS) mission had a requirement to use the Remote Memory Access Protocol (RMAP) over its SpaceWire network. At the time, no known intellectual property (IP) cores were available for purchase. Additionally, MMS preferred to implement the RMAP functionality with control over the low-level details of the design. For example, not all the RMAP standard functionality was needed, and it was desired to implement only the portions of the RMAP protocol that were needed. RMAP functionality had been previously implemented in commercial off-the-shelf (COTS) products, but the IP core was not available for purchase. The RMAP Target IP core is a VHDL (VHSIC Hardware Description Language description of a digital logic design suitable for implementation in an FPGA (field-programmable gate array) or ASIC (application-specific integrated circuit) that parses SpaceWire packets that conform to the RMAP standard. The RMAP packet protocol allows a network host to access and control a target device using address mapping. This capability allows SpaceWire devices to be managed in a standardized way that simplifies the hardware design of the device, as well as the development of the software that controls the device. The RMAP Target IP core has some features that are unique and not specified in the RMAP standard. One such feature is the ability to automatically abort transactions if the back-end logic does not respond to read/write requests within a predefined time. When a request times out, the RMAP Target IP core automatically retracts the request and returns a command response with an appropriate status in the response packet s header. Another such feature is the ability to control the SpaceWire node or router using RMAP transactions in the extended address range. This allows the SpaceWire network host to manage the SpaceWire network elements using RMAP packets, which reduces the number of protocols that the network host needs to support.
A simple GPU-accelerated two-dimensional MUSCL-Hancock solver for ideal magnetohydrodynamics
NASA Astrophysics Data System (ADS)
Bard, Christopher M.; Dorelli, John C.
2014-02-01
We describe our experience using NVIDIA's CUDA (Compute Unified Device Architecture) C programming environment to implement a two-dimensional second-order MUSCL-Hancock ideal magnetohydrodynamics (MHD) solver on a GTX 480 Graphics Processing Unit (GPU). Taking a simple approach in which the MHD variables are stored exclusively in the global memory of the GTX 480 and accessed in a cache-friendly manner (without further optimizing memory access by, for example, staging data in the GPU's faster shared memory), we achieved a maximum speed-up of ≈126 for a 10242 grid relative to the sequential C code running on a single Intel Nehalem (2.8 GHz) core. This speedup is consistent with simple estimates based on the known floating point performance, memory throughput and parallel processing capacity of the GTX 480.
Overgeneral Autobiographical Memory and Traumatic Events: An Evaluative Review
ERIC Educational Resources Information Center
Moore, Sally A.; Zoellner, Lori A.
2007-01-01
Does trauma exposure impair retrieval of autobiographical memories? Many theorists have suggested that the reduced ability to access specific memories of life events, termed overgenerality, is a protective mechanism helping attenuate painful emotions associated with trauma. The authors addressed this question by reviewing 24 studies that assessed…
Working Memory Underpins Cognitive Development, Learning, and Education
ERIC Educational Resources Information Center
Cowan, Nelson
2014-01-01
Working memory is the retention of a small amount of information in a readily accessible form. It facilitates planning, comprehension, reasoning, and problem solving. I examine the historical roots and conceptual development of the concept and the theoretical and practical implications of current debates about working memory mechanisms. Then, I…
Library API for Z-Order Memory Layout
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bethel, E. Wes
This library provides a simple-to-use API for implementing an altnerative to traditional row-major order in-memory layout, one based on a Morton- order space filling curve (SFC) , specifically, a Z-order variant of the Morton order curve. The library enables programmers to, after a simple initialization step, to convert a multidimensional array from row-major to Z- order layouts, then use a single, generic API call to access data from any arbitrary (i,j,k) location from within the array, whether it it be stored in row- major or z-order format. The motivation for using a SFC in-memory layout is for improved spatial locality,more » which results in increased use of local high speed cache memory. The basic idea is that with row-major order layouts, a data access to some location that is nearby in index space is likely far away in physical memory, resulting in poor spatial locality and slow runtime. On the other hand, with a SFC-based layout, accesses that are nearby in index space are much more likely to also be nearby in physical memory, resulting in much better spatial locality, and better runtime performance. Numerous studies over the years have shown significant runtime performance gains are realized by using a SFC-based memory layout compared to a row-major layout, sometimes by as much as 50%, which result from the better use of the memory and cache hierarchy that are attendant with a SFC-based layout (see, for example, [Beth2012]). This library implementation is intended for use with codes that work with structured, array-based data in 2 or 3 dimensions. It is not appropriate for use with unstructured or point-based data.« less
Dementia - what to ask your doctor
... recs.pdf . Accessed December 8, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...
Dementia - keeping safe in the home
... recs.pdf . Accessed June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...
Insights from child development on the relationship between episodic and semantic memory.
Robertson, Erin K; Köhler, Stefan
2007-11-05
The present study was motivated by a recent controversy in the neuropsychological literature on semantic dementia as to whether episodic encoding requires semantic processing or whether it can proceed solely based on perceptual processing. We addressed this issue by examining the effect of age-related limitations in semantic competency on episodic memory in 4-6-year-old children (n=67). We administered three different forced-choice recognition memory tests for pictures previously encountered in a single study episode. The tests varied in the degree to which access to semantically encoded information was required at retrieval. Semantic competency predicted recognition performance regardless of whether access to semantic information was required. A direct relation between picture naming at encoding and subsequent recognition was also found for all tests. Our findings emphasize the importance of semantic encoding processes even in retrieval situations that purportedly do not require access to semantic information. They also highlight the importance of testing neuropsychological models of memory in different populations, healthy and brain damaged, at both ends of the developmental continuum.
Memory inhibition as a critical factor preventing creative problem solving.
Gómez-Ariza, Carlos J; Del Prete, Francesco; Prieto Del Val, Laura; Valle, Tania; Bajo, M Teresa; Fernandez, Angel
2017-06-01
The hypothesis that reduced accessibility to relevant information can negatively affect problem solving in a remote associate test (RAT) was tested by using, immediately before the RAT, a retrieval practice procedure to hinder access to target solutions. The results of 2 experiments clearly showed that, relative to baseline, target words that had been competitors during selective retrieval were much less likely to be provided as solutions in the RAT, demonstrating that performance in the problem-solving task was strongly influenced by the predetermined accessibility status of the solutions in memory. Importantly, this was so even when participants were unaware of the relationship between the memory and the problem-solving procedures in the experiments. This finding is consistent with an inhibitory account of retrieval-induced forgetting effects and, more generally, constitutes support for the idea that the activation status of mental representations originating in a given task (e.g., episodic memory) can unwittingly have significant consequences for a different, unrelated task (e.g., problem solving). (PsycINFO Database Record (c) 2017 APA, all rights reserved).
D'Angiulli, Amedeo; Runge, Matthew; Faulkner, Andrew; Zakizadeh, Jila; Chan, Aldrich; Morcos, Selvana
2013-01-01
The relationship between vivid visual mental images and unexpected recall (incidental recall) was replicated, refined, and extended. In Experiment 1, participants were asked to generate mental images from imagery-evoking verbal cues (controlled on several verbal properties) and then, on a trial-by-trial basis, rate the vividness of their images; 30 min later, participants were surprised with a task requiring free recall of the cues. Higher vividness ratings predicted better incidental recall of the cues than individual differences (whose effect was modest). Distributional analysis of image latencies through ex-Gaussian modeling showed an inverse relation between vividness and latency. However, recall was unrelated to image latency. The follow-up Experiment 2 showed that the processes underlying trial-by-trial vividness ratings are unrelated to the Vividness of Visual Imagery Questionnaire (VVIQ), as further supported by a meta-analysis of a randomly selected sample of relevant literature. The present findings suggest that vividness may act as an index of availability of long-term sensory traces, playing a non-epiphenomenal role in facilitating the access of those memories.
D’Angiulli, Amedeo; Runge, Matthew; Faulkner, Andrew; Zakizadeh, Jila; Chan, Aldrich; Morcos, Selvana
2013-01-01
The relationship between vivid visual mental images and unexpected recall (incidental recall) was replicated, refined, and extended. In Experiment 1, participants were asked to generate mental images from imagery-evoking verbal cues (controlled on several verbal properties) and then, on a trial-by-trial basis, rate the vividness of their images; 30 min later, participants were surprised with a task requiring free recall of the cues. Higher vividness ratings predicted better incidental recall of the cues than individual differences (whose effect was modest). Distributional analysis of image latencies through ex-Gaussian modeling showed an inverse relation between vividness and latency. However, recall was unrelated to image latency. The follow-up Experiment 2 showed that the processes underlying trial-by-trial vividness ratings are unrelated to the Vividness of Visual Imagery Questionnaire (VVIQ), as further supported by a meta-analysis of a randomly selected sample of relevant literature. The present findings suggest that vividness may act as an index of availability of long-term sensory traces, playing a non-epiphenomenal role in facilitating the access of those memories. PMID:23382719
If It Is Stored in My Memory I Will Surely Retrieve It: Anatomy of a Metacognitive Belief
ERIC Educational Resources Information Center
Kornell, Nate
2015-01-01
Retrieval failures--moments when a memory will not come to mind--are a universal human experience. Yet many laypeople believe human memory is a reliable storage system in which a stored memory should be accessible. I predicted that people would see retrieval failures as aberrations and predict that fewer retrieval failures would happen in the…
Synesthetic experiences enhance unconscious learning.
Rothen, Nicolas; Scott, Ryan B; Mealor, Andy D; Coolbear, Daniel J; Burckhardt, Vera; Ward, Jamie
2013-01-01
Synesthesia is characterized by consistent extra perceptual experiences in response to normal sensory input. Recent studies provide evidence for a specific profile of enhanced memory performance in synesthesia, but focus exclusively on explicit memory paradigms for which the learned content is consciously accessible. In this study, for the first time, we demonstrate with an implicit memory paradigm that synesthetic experiences also enhance memory performance relating to unconscious knowledge.
Unstructured Adaptive Meshes: Bad for Your Memory?
NASA Technical Reports Server (NTRS)
Biswas, Rupak; Feng, Hui-Yu; VanderWijngaart, Rob
2003-01-01
This viewgraph presentation explores the need for a NASA Advanced Supercomputing (NAS) parallel benchmark for problems with irregular dynamical memory access. This benchmark is important and necessary because: 1) Problems with localized error source benefit from adaptive nonuniform meshes; 2) Certain machines perform poorly on such problems; 3) Parallel implementation may provide further performance improvement but is difficult. Some examples of problems which use irregular dynamical memory access include: 1) Heat transfer problem; 2) Heat source term; 3) Spectral element method; 4) Base functions; 5) Elemental discrete equations; 6) Global discrete equations. Nonconforming Mesh and Mortar Element Method are covered in greater detail in this presentation.
Optical memory development. Volume 2: Gain-assisted holographic storage media
NASA Technical Reports Server (NTRS)
Gange, R. A.; Mezrich, R. S.
1972-01-01
Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.
Ferroelectric tunneling element and memory applications which utilize the tunneling element
Kalinin, Sergei V [Knoxville, TN; Christen, Hans M [Knoxville, TN; Baddorf, Arthur P [Knoxville, TN; Meunier, Vincent [Knoxville, TN; Lee, Ho Nyung [Oak Ridge, TN
2010-07-20
A tunneling element includes a thin film layer of ferroelectric material and a pair of dissimilar electrically-conductive layers disposed on opposite sides of the ferroelectric layer. Because of the dissimilarity in composition or construction between the electrically-conductive layers, the electron transport behavior of the electrically-conductive layers is polarization dependent when the tunneling element is below the Curie temperature of the layer of ferroelectric material. The element can be used as a basis of compact 1R type non-volatile random access memory (RAM). The advantages include extremely simple architecture, ultimate scalability and fast access times generic for all ferroelectric memories.
Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing
NASA Astrophysics Data System (ADS)
Jia, Gangyong; Han, Guangjie; Wang, Hao; Wang, Feng
2018-04-01
Fog computing requires a large main memory capacity to decrease latency and increase the Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly used random access memory, cannot be included into a fog computing system due to its high consumption of power. In recent years, non-volatile memories (NVM) such as Phase-Change Memory (PCM) and Spin-transfer torque RAM (STT-RAM) with their low power consumption have emerged to replace DRAM. Moreover, the currently proposed hybrid main memory, consisting of both DRAM and NVM, have shown promising advantages in terms of scalability and power consumption. However, the drawbacks of NVM, such as long read/write latency give rise to potential problems leading to asymmetric cache misses in the hybrid main memory. Current last level cache (LLC) policies are based on the unified miss cost, and result in poor performance in LLC and add to the cost of using NVM. In order to minimize the cache miss cost in the hybrid main memory, we propose a cost aware cache replacement policy (CACRP) that reduces the number of cache misses from NVM and improves the cache performance for a hybrid memory system. Experimental results show that our CACRP behaves better in LLC performance, improving performance up to 43.6% (15.5% on average) compared to LRU.
Proximity Displays for Access Control
2012-09-01
Jennifer Lucas, and Karen Lindenfelser who greatly helped me with any and all day-to-day administration challenges I brought to them. My family has...factors in computing systems, 2005. 2.2.2, 8.1, 8.5.1 [24] Fergus I.M. Craik and Robert S. Lockhart. Levels of processing: A framework for 136 memory...David Red- miles, Jie Ren, Jennifer Rode, and Roberto Silva Filho. Two experiences designing for effective security. In Proceedings of the Symposium on
Electronics Industry Study Report: Semiconductors and Defense Electronics
2003-01-01
Access Memory (DRAM) chips and microprocessors. Samsung , Micron, Hynix, and Infineon control almost three-fourths of the DRAM market,8 while Intel alone...Country 2001 Sales ($B) 2002 Sales ($B) % Change % 2002 Mkt 1 1 Intel U.S. 23.7 24.0 1% 16.9% 2 3 Samsung Semiconductor S. Korea 6.3...located in four major regions: the United States, Europe, Japan, and the Asia-Pacific region (includes South Korea, China, Singapore, Malaysia , Taiwan
DOD Weapon Systems Software Management Study, Appendix B. Shipborne Systems
1975-06-01
program management, from Inception to development maintenance, 2. Detailed documentation requirements, 3. Standard high -level language development (CS-1...the Guided Missile School (GMS) at Dam Neck. The APL Land-Based Test Site (LETS) consisted of a Mk 152 digital fire control computer, SPG-55B radar...instruction and data segments are respectively placed in low and high core addresses to take advantage of UYK-7 memory accessing time savings. UYK-7
Verified Separate Compilation for C
2015-06-01
simulations, says that the visible set is closed under reachability. These two conditions, plus (6.2) and monotonicity of the REACH relation, imply...erase to a CompCert memory m. By erasure, we mean the removal of the “ juice ” that is unnecessary for execution (as in Curry-style type erasure of...simply typed lambda calculus). The “ juice ” has several components: permission shares controlling access to objects in the program logic; predicates in the
NASA Technical Reports Server (NTRS)
Rogers, David
1988-01-01
The advent of the Connection Machine profoundly changes the world of supercomputers. The highly nontraditional architecture makes possible the exploration of algorithms that were impractical for standard Von Neumann architectures. Sparse distributed memory (SDM) is an example of such an algorithm. Sparse distributed memory is a particularly simple and elegant formulation for an associative memory. The foundations for sparse distributed memory are described, and some simple examples of using the memory are presented. The relationship of sparse distributed memory to three important computational systems is shown: random-access memory, neural networks, and the cerebellum of the brain. Finally, the implementation of the algorithm for sparse distributed memory on the Connection Machine is discussed.
Yang, X Jessie; Wickens, Christopher D; Park, Taezoon; Fong, Liesel; Siah, Kewin T H
2015-12-01
We aimed to examine the effects of information access cost and accountability on medical residents' information retrieval strategy and performance during prehandover preparation. Prior studies observing doctors' prehandover practices witnessed the use of memory-intensive strategies when retrieving patient information. These strategies impose potential threats to patient safety as human memory is prone to errors. Of interest in this work are the underlying determinants of information retrieval strategy and the potential impacts on medical residents' information preparation performance. A two-step research approach was adopted, consisting of semistructured interviews with 21 medical residents and a simulation-based experiment with 32 medical residents. The semistructured interviews revealed that a substantial portion of medical residents (38%) relied largely on memory for preparing handover information. The simulation-based experiment showed that higher information access cost reduced information access attempts and access duration on patient documents and harmed information preparation performance. Higher accountability led to marginally longer access to patient documents. It is important to understand the underlying determinants of medical residents' information retrieval strategy and performance during prehandover preparation. We noted the criticality of easy access to patient documents in prehandover preparation. In addition, accountability marginally influenced medical residents' information retrieval strategy. Findings from this research suggested that the cost of accessing information sources should be minimized in developing handover preparation tools. © 2015, Human Factors and Ergonomics Society.
Kiefer, Gundolf; Lehmann, Helko; Weese, Jürgen
2006-04-01
Maximum intensity projections (MIPs) are an important visualization technique for angiographic data sets. Efficient data inspection requires frame rates of at least five frames per second at preserved image quality. Despite the advances in computer technology, this task remains a challenge. On the one hand, the sizes of computed tomography and magnetic resonance images are increasing rapidly. On the other hand, rendering algorithms do not automatically benefit from the advances in processor technology, especially for large data sets. This is due to the faster evolving processing power and the slower evolving memory access speed, which is bridged by hierarchical cache memory architectures. In this paper, we investigate memory access optimization methods and use them for generating MIPs on general-purpose central processing units (CPUs) and graphics processing units (GPUs), respectively. These methods can work on any level of the memory hierarchy, and we show that properly combined methods can optimize memory access on multiple levels of the hierarchy at the same time. We present performance measurements to compare different algorithm variants and illustrate the influence of the respective techniques. On current hardware, the efficient handling of the memory hierarchy for CPUs improves the rendering performance by a factor of 3 to 4. On GPUs, we observed that the effect is even larger, especially for large data sets. The methods can easily be adjusted to different hardware specifics, although their impact can vary considerably. They can also be used for other rendering techniques than MIPs, and their use for more general image processing task could be investigated in the future.
Ball, B Hunter; DeWitt, Michael R; Knight, Justin B; Hicks, Jason L
2014-09-01
The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were related to the target item but never actually studied. In Experiments 1 and 2, participants studied 1 category member (e.g., onion) from a variety of different categories and at test were presented with an unstudied category label (e.g., vegetable) to probe memory for item and source information. In Experiments 3 and 4, 1 member of unidirectional (e.g., credit or card) or bidirectional (e.g., salt or pepper) associates was studied, whereas the other unstudied member served as a test probe. When recall failed, source information was accessible only when items were processed deeply during encoding (Experiments 1 and 2) and when there was strong forward associative strength between the retrieval cue and target (Experiments 3 and 4). These findings suggest that a retrieval probe diagnostic of semantically related item information reinstantiates information bound in memory during encoding that results in reactivation of associated contextual information, contingent upon sufficient learning of the item itself and the association between the item and its context information.
Spatially rearranged object parts can facilitate perception of intact whole objects.
Cacciamani, Laura; Ayars, Alisabeth A; Peterson, Mary A
2014-01-01
The familiarity of an object depends on the spatial arrangement of its parts; when the parts are spatially rearranged, they form a novel, unrecognizable configuration. Yet the same collection of parts comprises both the familiar and novel configuration. Is it possible that the collection of familiar parts activates a representation of the intact familiar configuration even when they are spatially rearranged? We presented novel configurations as primes before test displays that assayed effects on figure-ground perception from memories of intact familiar objects. In our test displays, two equal-area regions shared a central border; one region depicted a portion of a familiar object. Previous research with such displays has shown that participants are more likely to perceive the region depicting a familiar object as the figure and the abutting region as its ground when the familiar object is depicted in its upright orientation rather than upside down. The novel primes comprised either the same or a different collection of parts as the familiar object in the test display (part-rearranged and control primes, respectively). We found that participants were more likely to perceive the familiar region as figure in upright vs. inverted displays following part-rearranged primes but not control primes. Thus, priming with a novel configuration comprising the same familiar parts as the upcoming figure-ground display facilitated orientation-dependent effects of object memories on figure assignment. Similar results were obtained when the spatially rearranged collection of parts was suggested on the groundside of the prime's border, suggesting that familiar parts in novel configurations access the representation of their corresponding intact whole object before figure assignment. These data demonstrate that familiar parts access memories of familiar objects even when they are arranged in a novel configuration.
Spatially rearranged object parts can facilitate perception of intact whole objects
Cacciamani, Laura; Ayars, Alisabeth A.; Peterson, Mary A.
2014-01-01
The familiarity of an object depends on the spatial arrangement of its parts; when the parts are spatially rearranged, they form a novel, unrecognizable configuration. Yet the same collection of parts comprises both the familiar and novel configuration. Is it possible that the collection of familiar parts activates a representation of the intact familiar configuration even when they are spatially rearranged? We presented novel configurations as primes before test displays that assayed effects on figure-ground perception from memories of intact familiar objects. In our test displays, two equal-area regions shared a central border; one region depicted a portion of a familiar object. Previous research with such displays has shown that participants are more likely to perceive the region depicting a familiar object as the figure and the abutting region as its ground when the familiar object is depicted in its upright orientation rather than upside down. The novel primes comprised either the same or a different collection of parts as the familiar object in the test display (part-rearranged and control primes, respectively). We found that participants were more likely to perceive the familiar region as figure in upright vs. inverted displays following part-rearranged primes but not control primes. Thus, priming with a novel configuration comprising the same familiar parts as the upcoming figure-ground display facilitated orientation-dependent effects of object memories on figure assignment. Similar results were obtained when the spatially rearranged collection of parts was suggested on the groundside of the prime's border, suggesting that familiar parts in novel configurations access the representation of their corresponding intact whole object before figure assignment. These data demonstrate that familiar parts access memories of familiar objects even when they are arranged in a novel configuration. PMID:24904495
Analog Nonvolatile Computer Memory Circuits
NASA Technical Reports Server (NTRS)
MacLeod, Todd
2007-01-01
In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.
ACCESS: A Communicating and Cooperating Expert Systems System.
1988-01-31
therefore more quickly accepted by programmers. This is in part due to the already familiar concepts of multi-processing environments (e.g. semaphores ...Di68] and monitors [Br75]) which can be viewed as a special case of synchronized shared memory models [Di6S]. Heterogeneous systems however, are by...locality of nodes is not possible and frequent access of memory is required. Synchronization of processes also suffers from a loss of efficiency in
Constraints on Access: Costs and Benefits (Spontaneous Memory for Relevant Experiences)
1989-05-01
F. I. M. Craik (Eds.), Levels of processing and human memory. Hillsdale, NJ: Erlbaum. Dewey, J. (1963). How we think. Portions published in R. M...transfer. Pictures (vs. words) and levels of processing and elaborative encoding manipulations are shown to affect directed access but are found to have...includes most 5 6 list-learning experiments, research on schema/script abstraction, and studies of remembering which might manipulate levels of processing
1984-10-31
five colors , page forward, page back, erase, clear the page, store previously annotated material, and later retrieve it. From this developed a four...system to secure sites. These * enchancements are discussed below. -2- .7- -. . . --. J -. . . . .. . . . . . . . ..- . _77 . -.- 2.1 Enhancements to the...and large cache memory of the Winchester drive allows the SGWS software to run much faster when doing file access or direct memory access (DMA) than
Activating representations in permanent memory: different benefits for pictures and words.
Seifert, L S
1997-09-01
Previous research has suggested that pictures have privileged access to semantic memory (W. R. Glaser, 1992), but J. Theios and P. C. Amrhein (1989b) argued that prior studies inappropriately used large pictures and small words. In Experiment 1, participants categorized pictures reliably faster than words, even when both types of items were of optimal perceptual size. In Experiment 2, a poststimulus flashmask and judgments about internal features did not eliminate picture superiority, indicating that it was not due to differences in early visual processing or analysis of visible features. In Experiment 3, when participants made judgments about whether items were related, latencies were reliably faster for categorically related pictures than for words, but there was no picture advantage for noncategorically associated items. Results indicate that pictures have privileged access to semantic memory for categories, but that neither pictures nor words seem to have privileged access to noncategorical associations.
Implementation of Ferroelectric Memories for Space Applications
NASA Technical Reports Server (NTRS)
Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.
2000-01-01
Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.
Reduced Specificity of Autobiographical Memory and Depression
Dalgleish, Tim; Williams, J. Mark G.; Golden, Ann-Marie J.; Perkins, Nicola; Barrett, Lisa Feldman; Barnard, Phillip J.; Yeung, Cecilia Au; Murphy, Victoria; Elward, Rachael; Tchanturia, Kate; Watkins, Edward
2007-01-01
It has been widely established that depressed mood states and clinical depression, as well as a range of other psychiatric disorders, are associated with a relative difficulty in accessing specific autobiographical information in response to emotion-related cue words on an Autobiographical Memory Test (AMT; J. M. G. Williams & K. Broadbent, 1986). In 8 studies the authors examined the extent to which this relationship is a function of impaired executive control associated with these mood states and clinical disorders. Studies 1–4 demonstrated that performance on the AMT is associated with performance on measures of executive control, independent of depressed mood. Furthermore, Study 1 showed that executive control (as measured by verbal fluency) mediated the relationship between both depressed mood and a clinical diagnosis of eating disorder and AMT performance. Using a stratified sample in Study 5, the authors confirmed the positive association between depressed mood and impaired performance on the AMT. Studies 6–8 involved experimental manipulations of the parameters of the AMT designed to further indicate that reduced executive control is to a significant extent driving the relationship between depressed mood and AMT performance. The potential role of executive control in accounting for other aspects of the AMT literature is discussed. PMID:17324083
van Schie, Kevin; Engelhard, Iris M.; van den Hout, Marcel A.
2015-01-01
Earlier studies have shown that when individuals recall an emotional memory while simultaneously doing a demanding dual-task [e.g., playing Tetris, mental arithmetic, making eye movements (EM)], this reduces self-reported vividness and emotionality of the memory. These effects have been found up to 1 week later, but have largely been confined to self-report ratings. This study examined whether this dual-tasking intervention reduces memory performance (i.e., accessibility of emotional memories). Undergraduates (N = 60) studied word-image pairs and rated the retrieved image on vividness and emotionality when cued with the word. Then they viewed the cues and recalled the images with or without making EM. Finally, they re-rated the images on vividness and emotionality. Additionally, fragments from images from all conditions were presented and participants identified which fragment was paired earlier with which cue. Findings showed no effect of the dual-task manipulation on self-reported ratings and latency responses. Several possible explanations for the lack of effects are discussed, but the cued recall procedure in our experiment seems to explain the absence of effects best. The study demonstrates boundaries to the effects of the “dual-tasking” procedure. PMID:25729370
Patterns of Autobiographical Memory in Adults with Autism Spectrum Disorder
ERIC Educational Resources Information Center
Crane, Laura; Pring, Linda; Jukes, Kaylee; Goddard, Lorna
2012-01-01
Two studies are presented that explored the effects of experimental manipulations on the quality and accessibility of autobiographical memories in adults with autism spectrum disorder (ASD), relative to a typical comparison group matched for age, gender and IQ. Both studies found that the adults with ASD generated fewer specific memories than the…
Ames Lab 101: Ultrafast Magnetic Switching
Wang; Jigang
2018-01-01
Ames Laboratory physicists have found a new way to switch magnetism that is at least 1000 times faster than currently used in magnetic memory technologies. Magnetic switching is used to encode information in hard drives, magnetic random access memory and other computing devices. The discovery potentially opens the door to terahertz and faster memory speeds.
Memory for Recently Accessed Visual Attributes
ERIC Educational Resources Information Center
Jiang, Yuhong V.; Shupe, Joshua M.; Swallow, Khena M.; Tan, Deborah H.
2016-01-01
Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's…
Episodic and Semantic Memory Influences on Picture Naming in Alzheimer's Disease
ERIC Educational Resources Information Center
Small, Jeff A.; Sandhu, Nirmaljeet
2008-01-01
This study investigated the relationship between semantic and episodic memory as they support lexical access by healthy younger and older adults and individuals with Alzheimer's disease (AD). In particular, we were interested in examining the pattern of semantic and episodic memory declines in AD (i.e., word-finding difficulty and impaired recent…
Hemispheric Differences in the Organization of Memory for Text Ideas
ERIC Educational Resources Information Center
Long, Debra L.; Johns, Clinton L.; Jonathan, Eunike
2012-01-01
The goal of this study was to examine hemispheric asymmetries in episodic memory for discourse. Access to previously comprehended information is essential for mapping incoming information to representations of "who did what to whom" in memory. An item-priming-in-recognition paradigm was used to examine differences in how the hemispheres represent…
Individual Differences in the Effects of Retrieval from Long-Term Memory
ERIC Educational Resources Information Center
Brewer, Gene A.; Unsworth, Nash
2012-01-01
The current study examined individual differences in the effects of retrieval from long-term memory (i.e., the testing effect). The effects of retrieving from memory make tested information more accessible for future retrieval attempts. Despite the broad applied ramifications of such a potent memorization technique there is a paucity of research…
Semantic Memory and Verbal Working Memory Correlates of N400 to Subordinate Homographs
ERIC Educational Resources Information Center
Salisbury, Dean F.
2004-01-01
N400 is an event-related brain potential that indexes operations in semantic memory conceptual space, whether elicited by language or some other representation (e.g., drawings). Language models typically propose three stages: lexical access or orthographic- and phonological-level analysis; lexical selection or word-level meaning and associate…
Oberauer, Klaus; Lange, Elke B
2009-02-01
The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. Journal of Experimental Psychology: Learning, Memory, and Cognition, 28, 411-421]. Familiarity arises from activated representations in long-term memory, ignoring their relations; recollection retrieves bindings in the capacity-limited component of working memory. In three experiments participants encoded two short lists of nonwords for immediate recognition, one of which was then cued as irrelevant. Probes from the irrelevant list were rejected more slowly than new probes; this was also found with probes recombining letters of irrelevant nonwords, suggesting that familiarity arises from individual letters independent of their relations. When asked to accept probes whose letters were all in the relevant list, regardless of their conjunction, participants accepted probes preserving the original conjunctions faster than recombinations, showing that recollection accessed feature bindings automatically. The model fit the data best when familiarity depended only on matching letters, whereas recollection used binding information.
NASA Astrophysics Data System (ADS)
Nebashi, Ryusuke; Sakimura, Noboru; Sugibayashi, Tadahiko
2017-08-01
We evaluated the soft-error tolerance and energy consumption of an embedded computer with magnetic random access memory (MRAM) using two computer simulators. One is a central processing unit (CPU) simulator of a typical embedded computer system. We simulated the radiation-induced single-event-upset (SEU) probability in a spin-transfer-torque MRAM cell and also the failure rate of a typical embedded computer due to its main memory SEU error. The other is a delay tolerant network (DTN) system simulator. It simulates the power dissipation of wireless sensor network nodes of the system using a revised CPU simulator and a network simulator. We demonstrated that the SEU effect on the embedded computer with 1 Gbit MRAM-based working memory is less than 1 failure in time (FIT). We also demonstrated that the energy consumption of the DTN sensor node with MRAM-based working memory can be reduced to 1/11. These results indicate that MRAM-based working memory enhances the disaster tolerance of embedded computers.
Memory access in shared virtual memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
Berrendorf, R.
1992-01-01
Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.
Memory access in shared virtual memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
Berrendorf, R.
1992-09-01
Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.
Non-Volatile Memory Technology Symposium 2001: Proceedings
NASA Technical Reports Server (NTRS)
Aranki, Nazeeh; Daud, Taher; Strauss, Karl
2001-01-01
This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.
1979-05-17
34 social memory", in the broader context of society. This paper explores some of the possibilities of creating a computer based corporate memory...NUMBER 79-04-03 2. COVT ACCESSION NO. 3. RECIPIENT’S CATALOG NUMBER «. TITLE f«n<* SubfU/.; A CONCEPT OF- CORPORATE MEMORY S. TYPE OF...It. SUPPLEMENTARY NOTES • IJ. KEY WORDS fCon<Jnu» on r»r»r»» mid* It nmcammmrj and Idmntltr bf block numbmr) corporate memory, office
Artificial intelligence applications of fast optical memory access
NASA Astrophysics Data System (ADS)
Henshaw, P. D.; Todtenkopf, A. B.
The operating principles and performance of rapid laser beam-steering (LBS) techniques are reviewed and illustrated with diagrams; their applicability to fast optical-memory (disk) access is evaluated; and the implications of fast access for the design of expert systems are discussed. LBS methods examined include analog deflection (source motion, wavefront tilt, and phased arrays), digital deflection (polarization modulation, reflectivity modulation, interferometric switching, and waveguide deflection), and photorefractive LBS. The disk-access problem is considered, and typical LBS requirements are listed as 38,000 beam positions, rotational latency 25 ms, one-sector rotation time 1.5 ms, and intersector space 87 microsec. The value of rapid access for increasing the power of expert systems (by permitting better organization of blocks of information) is illustrated by summarizing the learning process of the MVP-FORTH system (Park, 1983).
Performance of Compiler-Assisted Memory Safety Checking
2014-08-01
software developer has in mind a particular object to which the pointer should point, the intended referent. A memory access error occurs when an ac...Performance of Compiler-Assisted Memory Safety Checking David Keaton Robert C. Seacord August 2014 TECHNICAL NOTE CMU/SEI-2014-TN...based memory safety checking tool and the performance that can be achieved with two such tools whose source code is freely available. The note then
Active non-volatile memory post-processing
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kannan, Sudarsun; Milojicic, Dejan S.; Talwar, Vanish
A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.
Optically Addressable, Ferroelectric Memory With NDRO
NASA Technical Reports Server (NTRS)
Thakoor, Sarita
1994-01-01
For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.
The Cognitive Bases of Intelligence Analysis.
1984-01-01
the truth of a single proposition or to discriminate among several propositions. Indicators represent the potentially observable events that form the ...serves as a checklist against which to evaluate an actual Intelligance product. * If the Ideal product Is specified In sufficient detail for a particular...34 Interf’arence In accessing memory occurs for both recognition and recall. Memory retrieval is most efficient when the memories are discriminable . Memories for
Memory Loss: When to Seek Help
... a set of symptoms, including impairment in memory, reasoning, judgment, language and other thinking skills. Dementia usually ... et al. Mild cognitive impairment: Epidemiology, pathology and clinical assessment. http://www.uptodate.com/home. Accessed March ...
Memory guidance in distractor suppression is governed by the availability of cognitive control.
Wen, Wen; Hou, Yin; Li, Sheng
2018-03-26
Information stored in the memory systems can affect visual search. Previous studies have shown that holding the to-be-ignored features of distractors in working memory (WM) could accelerate target selection. However, such facilitation effect was only observed when the cued to-be-ignored features remained unchanged within an experimental block (i.e., the fixed cue condition). No search benefit was obtained if the to-be-ignored features varied from trial to trial (i.e., the varied cue condition). In the present study, we conducted three behavioral experiments to investigate whether the WM and long-term memory (LTM) representations of the to-be-ignored features could facilitate visual search in the fixed cue (Experiment 1) and varied cue (Experiments 2 and 3) conditions. Given the importance of the processing time of cognitive control in distractor suppression, we divided visual search trials into five quintiles based on their reaction times (RTs) and examined the temporal characteristics of the suppression effect. Results showed that both the WM and LTM representations of the to-be-ignored features could facilitate distractor suppression in the fixed cue condition, and the facilitation effects were evident across the quintiles in the RT distribution. However, in the varied cue condition, the RT benefits of the WM-matched distractors occurred only in the trials with the longest RTs, whereas no advantage of the LTM-matched distractors was observed. These results suggest that the effective WM-guided distractor suppression depends on the availability of cognitive control and the LTM-guided suppression occurs only if sufficient WM resource is accessible by LTM reactivation.
NASA Astrophysics Data System (ADS)
Croley, D. R.; Garrett, H. B.; Murphy, G. B.; Garrard, T. L.
1995-10-01
The three large solar particle events, beginning on October 19, 1989 and lasting approximately six days, were characterized by high fluences of solar protons and heavy ions at 1 AU. During these events, an abnormally large number of upsets (243) were observed in the random access memory of the attitude control system (ACS) control processing electronics (CPE) on-board the geosynchronous TDRS-1 (Telemetry and Data Relay Satellite). The RAR I unit affected was composed of eight Fairchild 93L422 memory chips. The Galileo spacecraft, launched on October 18, 1989 (one day prior to the solar particle events) observed the fluxes of heavy ions experienced by TDRS-1. Two solid-state detector telescopes on-board Galileo designed to measure heavy ion species and energy, were turned on during time periods within each of the three separate events. The heavy ion data have been modeled and the time history of the events reconstructed to estimate heavy ion fluences. These fluences were converted to effective LET spectra after transport through the estimated shielding distribution around the TDRS-1 ACS system. The number of single event upsets (SEU) expected was calculated by integrating the measured cross section for the Fairchild 93L422 memory chip with average effective LET spectrum. The expected number of heavy ion induced SEUs calculated was 176. GOES-7 proton data, observed during the solar particle events, were used to estimate the number of proton-induced SEUs by integrating the proton fluence spectrum incident on the memory chips, with the two-parameter Bendel cross section for proton SEUs.
A Simple GPU-Accelerated Two-Dimensional MUSCL-Hancock Solver for Ideal Magnetohydrodynamics
NASA Technical Reports Server (NTRS)
Bard, Christopher; Dorelli, John C.
2013-01-01
We describe our experience using NVIDIA's CUDA (Compute Unified Device Architecture) C programming environment to implement a two-dimensional second-order MUSCL-Hancock ideal magnetohydrodynamics (MHD) solver on a GTX 480 Graphics Processing Unit (GPU). Taking a simple approach in which the MHD variables are stored exclusively in the global memory of the GTX 480 and accessed in a cache-friendly manner (without further optimizing memory access by, for example, staging data in the GPU's faster shared memory), we achieved a maximum speed-up of approx. = 126 for a sq 1024 grid relative to the sequential C code running on a single Intel Nehalem (2.8 GHz) core. This speedup is consistent with simple estimates based on the known floating point performance, memory throughput and parallel processing capacity of the GTX 480.
Evaluation of seven hypotheses for metamemory performance in rhesus monkeys
Basile, Benjamin M.; Schroeder, Gabriel R.; Brown, Emily Kathryn; Templer, Victoria L.; Hampton, Robert R.
2014-01-01
Knowing the extent to which nonhumans and humans share mechanisms for metacognition will advance our understanding of cognitive evolution and will improve selection of model systems for biomedical research. Some nonhuman species avoid difficult cognitive tests, seek information when ignorant, or otherwise behave in ways consistent with metacognition. There is agreement that some nonhuman animals “succeed” in these metacognitive tasks, but little consensus about the cognitive mechanisms underlying performance. In one paradigm, rhesus monkeys visually searched for hidden food when ignorant of the location of the food, but acted immediately when knowledgeable. This result has been interpreted as evidence that monkeys introspectively monitored their memory to adaptively control information seeking. However, convincing alternative hypotheses have been advanced that might also account for the adaptive pattern of visual searching. We evaluated seven hypotheses using a computerized task in which monkeys chose either to take memory tests immediately or to see the answer again before proceeding to the test. We found no evidence to support the hypotheses of behavioral cue association, rote response learning, expectancy violation, response competition, generalized search strategy, or postural mediation. In contrast, we repeatedly found evidence to support the memory monitoring hypothesis. Monkeys chose to see the answer when memory was poor, either from natural variation or experimental manipulation. We found limited evidence that monkeys also monitored the fluency of memory access. Overall, the evidence indicates that rhesus monkeys can use memory strength as a discriminative cue for information seeking, consistent with introspective monitoring of explicit memory. PMID:25365530
Cox, Gregory E; Hemmer, Pernille; Aue, William R; Criss, Amy H
2018-04-01
The development of memory theory has been constrained by a focus on isolated tasks rather than the processes and information that are common to situations in which memory is engaged. We present results from a study in which 453 participants took part in five different memory tasks: single-item recognition, associative recognition, cued recall, free recall, and lexical decision. Using hierarchical Bayesian techniques, we jointly analyzed the correlations between tasks within individuals-reflecting the degree to which tasks rely on shared cognitive processes-and within items-reflecting the degree to which tasks rely on the same information conveyed by the item. Among other things, we find that (a) the processes involved in lexical access and episodic memory are largely separate and rely on different kinds of information, (b) access to lexical memory is driven primarily by perceptual aspects of a word, (c) all episodic memory tasks rely to an extent on a set of shared processes which make use of semantic features to encode both single words and associations between words, and (d) recall involves additional processes likely related to contextual cuing and response production. These results provide a large-scale picture of memory across different tasks which can serve to drive the development of comprehensive theories of memory. (PsycINFO Database Record (c) 2018 APA, all rights reserved).
Non-thermalization in trapped atomic ion spin chains
NASA Astrophysics Data System (ADS)
Hess, P. W.; Becker, P.; Kaplan, H. B.; Kyprianidis, A.; Lee, A. C.; Neyenhuis, B.; Pagano, G.; Richerme, P.; Senko, C.; Smith, J.; Tan, W. L.; Zhang, J.; Monroe, C.
2017-10-01
Linear arrays of trapped and laser-cooled atomic ions are a versatile platform for studying strongly interacting many-body quantum systems. Effective spins are encoded in long-lived electronic levels of each ion and made to interact through laser-mediated optical dipole forces. The advantages of experiments with cold trapped ions, including high spatio-temporal resolution, decoupling from the external environment and control over the system Hamiltonian, are used to measure quantum effects not always accessible in natural condensed matter samples. In this review, we highlight recent work using trapped ions to explore a variety of non-ergodic phenomena in long-range interacting spin models, effects that are heralded by the memory of out-of-equilibrium initial conditions. We observe long-lived memory in static magnetizations for quenched many-body localization and prethermalization, while memory is preserved in the periodic oscillations of a driven discrete time crystal state. This article is part of the themed issue 'Breakdown of ergodicity in quantum systems: from solids to synthetic matter'.
Non-thermalization in trapped atomic ion spin chains.
Hess, P W; Becker, P; Kaplan, H B; Kyprianidis, A; Lee, A C; Neyenhuis, B; Pagano, G; Richerme, P; Senko, C; Smith, J; Tan, W L; Zhang, J; Monroe, C
2017-12-13
Linear arrays of trapped and laser-cooled atomic ions are a versatile platform for studying strongly interacting many-body quantum systems. Effective spins are encoded in long-lived electronic levels of each ion and made to interact through laser-mediated optical dipole forces. The advantages of experiments with cold trapped ions, including high spatio-temporal resolution, decoupling from the external environment and control over the system Hamiltonian, are used to measure quantum effects not always accessible in natural condensed matter samples. In this review, we highlight recent work using trapped ions to explore a variety of non-ergodic phenomena in long-range interacting spin models, effects that are heralded by the memory of out-of-equilibrium initial conditions. We observe long-lived memory in static magnetizations for quenched many-body localization and prethermalization, while memory is preserved in the periodic oscillations of a driven discrete time crystal state.This article is part of the themed issue 'Breakdown of ergodicity in quantum systems: from solids to synthetic matter'. © 2017 The Author(s).
Non-Markovian quantum processes: Complete framework and efficient characterization
NASA Astrophysics Data System (ADS)
Pollock, Felix A.; Rodríguez-Rosario, César; Frauenheim, Thomas; Paternostro, Mauro; Modi, Kavan
2018-01-01
Currently, there is no systematic way to describe a quantum process with memory solely in terms of experimentally accessible quantities. However, recent technological advances mean we have control over systems at scales where memory effects are non-negligible. The lack of such an operational description has hindered advances in understanding physical, chemical, and biological processes, where often unjustified theoretical assumptions are made to render a dynamical description tractable. This has led to theories plagued with unphysical results and no consensus on what a quantum Markov (memoryless) process is. Here, we develop a universal framework to characterize arbitrary non-Markovian quantum processes. We show how a multitime non-Markovian process can be reconstructed experimentally, and that it has a natural representation as a many-body quantum state, where temporal correlations are mapped to spatial ones. Moreover, this state is expected to have an efficient matrix-product-operator form in many cases. Our framework constitutes a systematic tool for the effective description of memory-bearing open-system evolutions.
YAPPA: a Compiler-Based Parallelization Framework for Irregular Applications on MPSoCs
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lovergine, Silvia; Tumeo, Antonino; Villa, Oreste
Modern embedded systems include hundreds of cores. Because of the difficulty in providing a fast, coherent memory architecture, these systems usually rely on non-coherent, non-uniform memory architectures with private memories for each core. However, programming these systems poses significant challenges. The developer must extract large amounts of parallelism, while orchestrating communication among cores to optimize application performance. These issues become even more significant with irregular applications, which present data sets difficult to partition, unpredictable memory accesses, unbalanced control flow and fine grained communication. Hand-optimizing every single aspect is hard and time-consuming, and it often does not lead to the expectedmore » performance. There is a growing gap between such complex and highly-parallel architectures and the high level languages used to describe the specification, which were designed for simpler systems and do not consider these new issues. In this paper we introduce YAPPA (Yet Another Parallel Programming Approach), a compilation framework for the automatic parallelization of irregular applications on modern MPSoCs based on LLVM. We start by considering an efficient parallel programming approach for irregular applications on distributed memory systems. We then propose a set of transformations that can reduce the development and optimization effort. The results of our initial prototype confirm the correctness of the proposed approach.« less
Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 5, Appendix D
NASA Technical Reports Server (NTRS)
Klute, A.
1979-01-01
The electrical characterization and qualification test results are presented for the RCA MWS 5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Average input high current, worst case input high current, output low current, and data setup time are some of the results presented.
The Effect of a Previously-Generated Hypothesis on Hypothesis Generation Performance.
1980-08-05
distinction 17I -’ai S between availability and accessibility has been made by Tulving and Pearlstone (1966). A datum may be present in memory, but may...1977. Thorndyke, P.W. The role of inference in discourse comprehension. Journal of Verbal Learning and Verbal Behavior, 1976, 15, 437-446. Tulving ...E. and Pearlstone , Z. Availability versus accessibility of infor- mation in memory for words. Journal of Verbal Learning and Verbal Behavior, 1966, 5
Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C
NASA Technical Reports Server (NTRS)
Klute, A.
1979-01-01
The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.
Zou, Zhengxia; Shi, Zhenwei
2018-03-01
We propose a new paradigm for target detection in high resolution aerial remote sensing images under small target priors. Previous remote sensing target detection methods frame the detection as learning of detection model + inference of class-label and bounding-box coordinates. Instead, we formulate it from a Bayesian view that at inference stage, the detection model is adaptively updated to maximize its posterior that is determined by both training and observation. We call this paradigm "random access memories (RAM)." In this paradigm, "Memories" can be interpreted as any model distribution learned from training data and "random access" means accessing memories and randomly adjusting the model at detection phase to obtain better adaptivity to any unseen distribution of test data. By leveraging some latest detection techniques e.g., deep Convolutional Neural Networks and multi-scale anchors, experimental results on a public remote sensing target detection data set show our method outperforms several other state of the art methods. We also introduce a new data set "LEarning, VIsion and Remote sensing laboratory (LEVIR)", which is one order of magnitude larger than other data sets of this field. LEVIR consists of a large set of Google Earth images, with over 22 k images and 10 k independently labeled targets. RAM gives noticeable upgrade of accuracy (an mean average precision improvement of 1% ~ 4%) of our baseline detectors with acceptable computational overhead.
Application of holographic optical techniques to bulk memory.
NASA Technical Reports Server (NTRS)
Anderson, L. K.
1971-01-01
Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.
Acoustic Neuroma: Questions to Discuss with Your Doctor
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Colonic Polyps: Questions to Discuss with Your Doctor
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When You Visit Your Doctor After a Heart Attack
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When You Visit Your Doctor: Irregular Menstrual Periods
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Visual memory in unilateral spatial neglect: immediate recall versus delayed recognition.
Moreh, Elior; Malkinson, Tal Seidel; Zohary, Ehud; Soroker, Nachum
2014-09-01
Patients with unilateral spatial neglect (USN) often show impaired performance in spatial working memory tasks, apart from the difficulty retrieving "left-sided" spatial data from long-term memory, shown in the "piazza effect" by Bisiach and colleagues. This study's aim was to compare the effect of the spatial position of a visual object on immediate and delayed memory performance in USN patients. Specifically, immediate verbal recall performance, tested using a simultaneous presentation of four visual objects in four quadrants, was compared with memory in a later-provided recognition task, in which objects were individually shown at the screen center. Unlike healthy controls, USN patients showed a left-side disadvantage and a vertical bias in the immediate free recall task (69% vs. 42% recall for right- and left-sided objects, respectively). In the recognition task, the patients correctly recognized half of "old" items, and their correct rejection rate was 95.5%. Importantly, when the analysis focused on previously recalled items (in the immediate task), no statistically significant difference was found in the delayed recognition of objects according to their original quadrant of presentation. Furthermore, USN patients were able to recollect the correct original location of the recognized objects in 60% of the cases, well beyond chance level. This suggests that the memory trace formed in these cases was not only semantic but also contained a visuospatial tag. Finally, successful recognition of objects missed in recall trials points to formation of memory traces for neglected contralesional objects, which may become accessible to retrieval processes in explicit memory.
Integrated Short Range, Low Bandwidth, Wearable Communications Networking Technologies
2012-04-30
Only (FOUO) Table of Contents Introduction 7 Research Discussions 7 1 Specifications 8 2 SAN Radio 9 2.1 R.F. Design Improvements 9 2.1.1 LNA...Characterization and Verification Testing 26 2.2 Digital Design Improvements 26 2.2.1 Improve Processor Access to Memory Resources 26 2.2.2...integrated and tested . A hybrid architecture of the automatic gain control (AGC) was designed to Page 7 of 116 For Official Use Only (FOUO
NASA Astrophysics Data System (ADS)
Kim, Sungjun; Park, Byung-Gook
2016-08-01
A study on the bipolar-resistive switching of an Ni/SiN/Si-based resistive random-access memory (RRAM) device shows that the influences of the reset power and the resistance value of the low-resistance state (LRS) on the reset-switching transitions are strong. For a low LRS with a large conducting path, the sharp reset switching, which requires a high reset power (>7 mW), was observed, whereas for a high LRS with small multiple-conducting paths, the step-by-step reset switching with a low reset power (<7 mW) was observed. The attainment of higher nonlinear current-voltage ( I-V) characteristics in terms of the step-by-step reset switching is due to the steep current-increased region of the trap-controlled space charge-limited current (SCLC) model. A multilevel cell (MLC) operation, for which the reset stop voltage ( V STOP) is used in the DC sweep mode and an incremental amplitude is used in the pulse mode for the step-by-step reset switching, is demonstrated here. The results of the present study suggest that well-controlled conducting paths in a SiN-based RRAM device, which are not too strong and not too weak, offer considerable potential for the realization of low-power and high-density crossbar-array applications.
Hitchcock, Caitlin; Hammond, Emily; Rees, Catrin; Panesar, Inderpal; Watson, Peter; Werner-Seidler, Aliza; Dalgleish, Tim
2015-11-03
Major depressive disorder (MDD) is associated with chronic biases in the allocation of attention and recollection of personal memories. Impaired flexibility in attention and autobiographical memory retrieval is seen to both maintain current symptoms and predict future depression. Development of innovative interventions to reduce maladaptive cognitive patterns and improve cognitive flexibility in the domain of memory may therefore advance current treatment approaches for depression. Memory specificity training and cognitive bias modification techniques have both shown some promise in improving cognitive flexibility. Here we outline plans for a trial of an innovative memory flexibility training programme, MemFlex, which advances current training techniques with the aim of improving flexibility of autobiographical memory retrieval. This trial seeks to estimate the efficacy of MemFlex, provide data on feasibility, and begin to explore mechanisms of change. We plan a single-blind, randomised, controlled, patient-level trial in which 50 individuals with MDD will complete either psychoeducation (n = 25) or MemFlex (n = 25). After completing pre-treatment measures and an orientation session, participants complete eight workbook-based sessions at home. Participants will then be assessed at post-treatment and at 3 month follow-up. The co-primary outcomes are depressive symptoms and diagnostic status at 3 month follow-up. The secondary outcomes are memory flexibility at post-treatment and number of depression free days at 3 month follow-up. Other process outcomes and mediators of any treatment effects will also be explored. This trial will establish the efficacy of MemFlex in improving memory flexibility, and reducing depressive symptoms. Any effects on process measures related to relapse may also indicate whether MemFlex may be helpful in reducing vulnerability to future depressive episodes. The low-intensity and workbook-based format of the programme may improve access to psychological therapies, and, if encouraging, the results of this study will provide a platform for later-phase trials. NCT02371291 (ClinicalTrials.gov), registered 9 February 2015.
Varga, Nicole L.; Stewart, Rebekah A.; Bauer, Patricia J.
2016-01-01
Semantic memory, defined as our store of knowledge about the world, provides representational support for all of our higher order cognitive functions. As such, it is crucial that the contents of semantic memory remain accessible over time. Although memory for knowledge learned through direct observation has been previously investigated, we know very little about the retention of knowledge derived through integration of information acquired across separate learning episodes. The present research investigated cross-episode integration in 4-year-old children. Participants were presented with novel facts via distinct story episodes and tested for knowledge extension through cross-episode integration, as well as for retention of the information over a 1-week delay. In Experiment 1, children retained the self-derived knowledge over the delay, though performance was primarily evidenced in a forced-choice format. In Experiment 2, we sought to facilitate the accessibility and robustness of self-derived knowledge by providing a verbal reminder after the delay. The accessibility of self-derived knowledge increased, irrespective of whether participants successfully demonstrated knowledge of the integration facts during the first visit. The results suggest knowledge extended through integration remains accessible after delays, even in a population in which this learning process is less robust. The findings also demonstrate the facilitative effect of reminders on the accessibility and further extension of knowledge over extended time periods. PMID:26774259
Ginani, G E; Tufik, S; Bueno, O F A; Pradella-Hallinan, M; Rusted, J; Pompéia, S
2011-11-01
The cholinergic system is involved in the modulation of both bottom-up and top-down attentional control. Top-down attention engages multiple executive control processes, but few studies have investigated whether all or selective elements of executive functions are modulated by the cholinergic system. To investigate the acute effects of the pro-cholinergic donepezil in young, healthy volunteers on distinct components of executive functions we conducted a double-blind, placebo-controlled, independent-groups design study including 42 young healthy male participants who were randomly assigned to one of three oral treatments: glucose (placebo), donepezil 5 mg or donepezil 7.5 mg. The test battery included measures of different executive components (shifting, updating, inhibition, dual-task performance, planning, access to long-term memory), tasks that evaluated arousal/vigilance/visuomotor performance, as well as functioning of working memory subsidiary systems. Donepezil improved sustained attention, reaction times, dual-task performance and the executive component of digit span. The positive effects in these executive tasks did not correlate with arousal/visuomotor/vigilance measures. Among the various executive domains investigated donepezil selectively increased dual-task performance in a manner that could not be ascribed to improvement in arousal/vigilance/visuomotor performance nor working memory slave systems. Other executive tasks that rely heavily on visuospatial processing may also be modulated by the cholinergic system.
Belief Inhibition in Children's Reasoning: Memory-Based Evidence
ERIC Educational Resources Information Center
Steegen, Sara; Neys, Wim De
2012-01-01
Adult reasoning has been shown as mediated by the inhibition of intuitive beliefs that are in conflict with logic. The current study introduces a classic procedure from the memory field to investigate belief inhibition in 12- to 17-year-old reasoners. A lexical decision task was used to probe the memory accessibility of beliefs that were cued…
Checkpoint-Restart in User Space
DOE Office of Scientific and Technical Information (OSTI.GOV)
CRUISE implements a user-space file system that stores data in main memory and transparently spills over to other storage, like local flash memory or the parallel file system, as needed. CRUISE also exposes file contents fo remote direct memory access, allowing external tools to copy files to the parallel file system in the background with reduced CPU interruption.
Memory Dynamics and Decision Making in Younger and Older Adults
ERIC Educational Resources Information Center
Lechuga, M. Teresa; Gomez-Ariza, Carlos J.; Iglesias-Parro, Sergio; Pelegrina, Santiago
2012-01-01
The main aim of this research was to study whether memory dynamics influence older people's choices to the same extent as younger's ones. To do so, we adapted the retrieval-practice paradigm to produce variations in memory accessibility of information on which decisions were made later. Based on previous results, we expected to observe…
ERIC Educational Resources Information Center
Unsworth, Nash; Engle, Randall W.
2008-01-01
Three experiments examined the nature of individual differences in switching the focus of attention in working memory. Participants performed 3 versions of a continuous counting task that required successive updating and switching between counts. Across all 3 experiments, individual differences in working memory span and fluid intelligence were…
ERIC Educational Resources Information Center
Ricker, Timothy J.; Cowan, Nelson
2010-01-01
We reexamine the role of time in the loss of information from working memory, the limited information accessible for cognitive tasks. The controversial issue of whether working memory deteriorates over time was investigated using arrays of unconventional visual characters. Each array was followed by a postperceptual mask, a variable retention…
Production, Comprehension, and Theories of the Mental Lexicon. CUNYForum, Numbers 5-6.
ERIC Educational Resources Information Center
Cowart, Wayne
Problems related to the structure of the mental lexicon are considered. The single access assumption, the passive memory assumption, and the heterogeneous memory assumption are rejected in favor of the theory which assumes several active memories, each able to store expression based on only one homogenous set of abstract primitives. One lexicon…
Columbia Crew added to Astronaut Memorial Mirror
2003-07-15
Workers add to the Astronaut Memorial Mirror the names of the Columbia crew who died in the STS-107 accident. Dedicated May 9, 1991, the Astronaut Memorial honors U.S. astronauts who gave their lives for space exploration. The "Space Mirror," 42 1/2 feet high by 50 feet wide, illuminates the names of the fallen astronauts cut through the monument's black granite surface. The Memorial Mirror is accessible through the KSC Visitor Complex.
Parallel processing approach to transform-based image coding
NASA Astrophysics Data System (ADS)
Normile, James O.; Wright, Dan; Chu, Ken; Yeh, Chia L.
1991-06-01
This paper describes a flexible parallel processing architecture designed for use in real time video processing. The system consists of floating point DSP processors connected to each other via fast serial links, each processor has access to a globally shared memory. A multiple bus architecture in combination with a dual ported memory allows communication with a host control processor. The system has been applied to prototyping of video compression and decompression algorithms. The decomposition of transform based algorithms for decompression into a form suitable for parallel processing is described. A technique for automatic load balancing among the processors is developed and discussed, results ar presented with image statistics and data rates. Finally techniques for accelerating the system throughput are analyzed and results from the application of one such modification described.
NASA Astrophysics Data System (ADS)
Wu, Xinghui; Zhang, Qiuhui; Cui, Nana; Xu, Weiwei; Wang, Kefu; Jiang, Wei; Xu, Qixing
2018-06-01
In this paper, we report our investigation of room-temperature-fabricated tungsten/indium tin oxide/gold (W/ITO/Au) resistive random access memory (RRAM), which exhibits asymmetric bipolar resistive switching (BRS) behavior. The device displays good write/erase endurance and data retention properties. The device shows complementary resistive switching (CRS) characteristics after controlling the compliance current. A WO x layer electrically formed at the W/ITO in the forming process. Mobile oxygen ions within ITO migrate toward the electrode/ITO interface and produce a semiconductor-like layer that acts as a free-carrier barrier. The CRS characteristic here can be elucidated in light of the evolution of an asymmetric free-carrier blocking layer at the electrode/ITO interface.
[Episodic autobiographical memory in depression: a review].
Lemogne, C; Piolino, P; Jouvent, R; Allilaire, J-F; Fossati, P
2006-10-01
Autobiographical memory and personal identity (self) are linked by a reciprocal relationship. Autobiographical memory is critical for both grounding and changing the self. Individuals' current self-views, beliefs, and goals influence their recollections of the past. According to Tulving, episodic memory is characterized by autonoetic consciousness, which is associated with a sense of the self in the past (emotions and goals) and mental reliving of an experience. Its close relationship with self and emotion strongly involves episodic autobiographical memory in the psychopathology of depression. However, due to methodological and conceptual issues, little attention has been paid to episodic autobiographical memory in depression. Since the seminal work of Williams et al. 15 years ago, there is now growing interest around this issue. We reviewed the evidence for three major features of autobiographical memory functioning in depression: an increase in general memory retrieval (overgenerality), a mood-congruent memory effect and the high occurrence of intrusive memories of stressful events. Although it was first observed among suicidal patients, overgenerality is actually associated with both depression and post-traumatic stress disorder. Overgenerality is not associated with anxious disorders other than post-traumatic stress disorder, obsessive-compulsive disorder, or borderline personality disorder. Most of controlled studies carried out on autobiographical memory in depression rely on the Williams' Autobiographical Memory Test (AMT). When presented with positive and negative cue words and asked to retrieve specific personal events, depressed patients (unlike matched controls) are less specific in their memories. They tend to recall repeated events (categorical overgeneral memories) rather than single episodes (specific memories). Overgenerality in depression is: 1) more evident with positive than with negative events (mood-congruent memory effect); 2) related to avoidance of intrusive memories; 3) quite stable over time, ie, remaining after remission; and 4) related to short-term prognosis in depression. Although it is not clear whether overgenerality is a cause or an effect of depression, there is some evidence to suggest that overgenerality is a trait marker indicating vulnerability to persistent depression. Mood-congruent effect, a well-known effect in depression, has been addressed in both autobio-graphical and non-autobiographical memory. Depressed patients spontaneously recall more negative than positive memories. With the AMT, depressed patients take longer to respond to positive than to negative cues, whereas controls do the opposite. Depression is also associated with a high occurrence of spontaneous intrusive memories of stressful life events. Studies found intrusions and related avoidance, as measured by the Impact of Event Scale, to be positively correlated with overgenerality, whereas there was no direct link between performance on the Autobiographical Memory Test and stressful life events per se. Both Williams' mnemonic interlock model and Conway's self-memory system are useful models to address the complexity of findings regarding autobiographical memory and depression. According to Williams, repeated avoidance of stressful memories leads depressed patients to have an autobiographical memory functioning characterized by iterative retrievals of categorical overgeneral memories, producing an enduring overgeneral retrieval style. According to Conway, the recollection of autobiographical memories requires a retrieval process that provides access to sensory/perceptual event-specific knowledge (ie perceptions and feelings) via a personal semantic knowledge base (ie lifetime periods and generic events). This retrieval process (generative retrieval mode) relies on both executive functioning and current self-view, namely the working-self. Spontaneous memories, usually vivid, result from a direct retrieval mode in which event-specific knowledge is directly triggered. In line with this model, episodic autobiographical memory impairment in state depression may arise from the working self rather than from autobiographical knowledge. The mood-congruent effect may be explained by the current (depressed) self. The high occurrence of intrusive memories may be explained by lack of executive control during direct retrieval. Overgenerality may rely on the interaction of both executive dysfunction and current (depressed) self, within the working-self, during generative retrieval. Our review suggests that further evidence is needed to address the relationship between executive functioning, self and autobiographical memory in depression.
Kizilirmak, Jasmin M; Rösler, Frank; Bien, Siegfried; Khader, Patrick H
2015-07-21
The attention to memory theory (AtoM) proposes that the same brain regions might be involved in selective processing of perceived stimuli (selective attention) and memory representations (selective retrieval). Although this idea is compelling, given consistently found neural overlap between perceiving and remembering stimuli, recent comparisons brought evidence for overlap as well as considerable differences. Here, we present a paradigm that enables the investigation of the AtoM hypothesis from a novel perspective to gain further insight into the neural resources involved in AtoM. Selective attention in perception is often investigated as a control process that shows lingering effects on immediately following trials. Here, we employed a paradigm capable of modulating selective retrieval in a similarly dynamic manner as in such selective-attention paradigms by inducing trial-to-trial shifts between relevant and irrelevant memory representations as well as changes of the width of the internal focus on memory. We found evidence for an involvement of bilateral inferior parietal lobe and right inferior frontal gyrus in reorienting the attentional focus on previously accessed memory representations. Moreover, we could dissociate the right inferior from the parietal activation in separate contrasts, suggesting that the right inferior frontal gyrus plays a role in facilitating attentional reorienting to memory representations when competing representations have been activated in the preceding trial, potentially by resolving this competition. Our results support the AtoM theory, i.e. that ventral frontal and parietal regions are involved in automatic attentional reorienting in memory, and highlight the importance of further investigations of the overlap and differences between regions involved in internal (memory) and external (perceptual) attentional selection. Copyright © 2015 Elsevier B.V. All rights reserved.
PIMS: Memristor-Based Processing-in-Memory-and-Storage.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Cook, Jeanine
Continued progress in computing has augmented the quest for higher performance with a new quest for higher energy efficiency. This has led to the re-emergence of Processing-In-Memory (PIM) ar- chitectures that offer higher density and performance with some boost in energy efficiency. Past PIM work either integrated a standard CPU with a conventional DRAM to improve the CPU- memory link, or used a bit-level processor with Single Instruction Multiple Data (SIMD) control, but neither matched the energy consumption of the memory to the computation. We originally proposed to develop a new architecture derived from PIM that more effectively addressed energymore » efficiency for high performance scientific, data analytics, and neuromorphic applications. We also originally planned to implement a von Neumann architecture with arithmetic/logic units (ALUs) that matched the power consumption of an advanced storage array to maximize energy efficiency. Implementing this architecture in storage was our original idea, since by augmenting storage (in- stead of memory), the system could address both in-memory computation and applications that accessed larger data sets directly from storage, hence Processing-in-Memory-and-Storage (PIMS). However, as our research matured, we discovered several things that changed our original direc- tion, the most important being that a PIM that implements a standard von Neumann-type archi- tecture results in significant energy efficiency improvement, but only about a O(10) performance improvement. In addition to this, the emergence of new memory technologies moved us to propos- ing a non-von Neumann architecture, called Superstrider, implemented not in storage, but in a new DRAM technology called High Bandwidth Memory (HBM). HBM is a stacked DRAM tech- nology that includes a logic layer where an architecture such as Superstrider could potentially be implemented.« less
Selective memory retrieval in social groups: When silence is golden and when it is not.
Abel, Magdalena; Bäuml, Karl-Heinz T
2015-07-01
Previous research has shown that the selective remembering of a speaker and the resulting silences can cause forgetting of related, but unmentioned information by a listener (Cuc, Koppel, & Hirst, 2007). Guided by more recent work that demonstrated both detrimental and beneficial effects of selective memory retrieval in individuals, the present research explored the effects of selective remembering in social groups when access to the encoding context at retrieval was maintained or impaired. In each of three experiments, selective retrieval by the speaker impaired recall of the listener when access to the encoding context was maintained, but it improved recall of the listener when context access was impaired. The results suggest the existence of two faces of selective memory retrieval in social groups, with a detrimental face when the encoding context is still active at retrieval and a beneficial face when it is not. The role of silence in social recall thus seems to be more complex than was indicated in prior work, and mnemonic silences on the part of a speaker can be "golden" for the memories of a listener under some circumstances, but not be "golden" under others. Copyright © 2015 Elsevier B.V. All rights reserved.
Routes to the past: neural substrates of direct and generative autobiographical memory retrieval.
Addis, Donna Rose; Knapp, Katie; Roberts, Reece P; Schacter, Daniel L
2012-02-01
Models of autobiographical memory propose two routes to retrieval depending on cue specificity. When available cues are specific and personally-relevant, a memory can be directly accessed. However, when available cues are generic, one must engage a generative retrieval process to produce more specific cues to successfully access a relevant memory. The current study sought to characterize the neural bases of these retrieval processes. During functional magnetic resonance imaging (fMRI), participants were shown personally-relevant cues to elicit direct retrieval, or generic cues (nouns) to elicit generative retrieval. We used spatiotemporal partial least squares to characterize the spatial and temporal characteristics of the networks associated with direct and generative retrieval. Both retrieval tasks engaged regions comprising the autobiographical retrieval network, including hippocampus, and medial prefrontal and parietal cortices. However, some key neural differences emerged. Generative retrieval differentially recruited lateral prefrontal and temporal regions early on during the retrieval process, likely supporting the strategic search operations and initial recovery of generic autobiographical information. However, many regions were activated more strongly during direct versus generative retrieval, even when we time-locked the analysis to the successful recovery of events in both conditions. This result suggests that there may be fundamental differences between memories that are accessed directly and those that are recovered via the iterative search and retrieval process that characterizes generative retrieval. Copyright © 2011 Elsevier Inc. All rights reserved.