Cooperative Data Sharing: Simple Support for Clusters of SMP Nodes
NASA Technical Reports Server (NTRS)
DiNucci, David C.; Balley, David H. (Technical Monitor)
1997-01-01
Libraries like PVM and MPI send typed messages to allow for heterogeneous cluster computing. Lower-level libraries, such as GAM, provide more efficient access to communication by removing the need to copy messages between the interface and user space in some cases. still lower-level interfaces, such as UNET, get right down to the hardware level to provide maximum performance. However, these are all still interfaces for passing messages from one process to another, and have limited utility in a shared-memory environment, due primarily to the fact that message passing is just another term for copying. This drawback is made more pertinent by today's hybrid architectures (e.g. clusters of SMPs), where it is difficult to know beforehand whether two communicating processes will share memory. As a result, even portable language tools (like HPF compilers) must either map all interprocess communication, into message passing with the accompanying performance degradation in shared memory environments, or they must check each communication at run-time and implement the shared-memory case separately for efficiency. Cooperative Data Sharing (CDS) is a single user-level API which abstracts all communication between processes into the sharing and access coordination of memory regions, in a model which might be described as "distributed shared messages" or "large-grain distributed shared memory". As a result, the user programs to a simple latency-tolerant abstract communication specification which can be mapped efficiently to either a shared-memory or message-passing based run-time system, depending upon the available architecture. Unlike some distributed shared memory interfaces, the user still has complete control over the assignment of data to processors, the forwarding of data to its next likely destination, and the queuing of data until it is needed, so even the relatively high latency present in clusters can be accomodated. CDS does not require special use of an MMU, which can add overhead to some DSM systems, and does not require an SPMD programming model. unlike some message-passing interfaces, CDS allows the user to implement efficient demand-driven applications where processes must "fight" over data, and does not perform copying if processes share memory and do not attempt concurrent writes. CDS also supports heterogeneous computing, dynamic process creation, handlers, and a very simple thread-arbitration mechanism. Additional support for array subsections is currently being considered. The CDS1 API, which forms the kernel of CDS, is built primarily upon only 2 communication primitives, one process initiation primitive, and some data translation (and marshalling) routines, memory allocation routines, and priority control routines. The entire current collection of 28 routines provides enough functionality to implement most (or all) of MPI 1 and 2, which has a much larger interface consisting of hundreds of routines. still, the API is small enough to consider integrating into standard os interfaces for handling inter-process communication in a network-independent way. This approach would also help to solve many of the problems plaguing other higher-level standards such as MPI and PVM which must, in some cases, "play OS" to adequately address progress and process control issues. The CDS2 API, a higher level of interface roughly equivalent in functionality to MPI and to be built entirely upon CDS1, is still being designed. It is intended to add support for the equivalent of communicators, reduction and other collective operations, process topologies, additional support for process creation, and some automatic memory management. CDS2 will not exactly match MPI, because the copy-free semantics of communication from CDS1 will be supported. CDS2 application programs will be free to carefully also use CDS1. CDS1 has been implemented on networks of workstations running unmodified Unix-based operating systems, using UDP/IP and vendor-supplied high- performance locks. Although its inter-node performance is currently unimpressive due to rudimentary implementation technique, it even now outperforms highly-optimized MPI implementation on intra-node communication due to its support for non-copy communication. The similarity of the CDS1 architecture to that of other projects such as UNET and TRAP suggests that the inter-node performance can be increased significantly to surpass MPI or PVM, and it may be possible to migrate some of its functionality to communication controllers.
Latest generation interconnect technologies in APEnet+ networking infrastructure
NASA Astrophysics Data System (ADS)
Ammendola, Roberto; Biagioni, Andrea; Cretaro, Paolo; Frezza, Ottorino; Lo Cicero, Francesca; Lonardo, Alessandro; Martinelli, Michele; Stanislao Paolucci, Pier; Pastorelli, Elena; Rossetti, Davide; Simula, Francesco; Vicini, Piero
2017-10-01
In this paper we present the status of the 3rd generation design of the APEnet board (V5) built upon the 28nm Altera Stratix V FPGA; it features a PCIe Gen3 x8 interface and enhanced embedded transceivers with a maximum capability of 12.5Gbps each. The network architecture is designed in accordance to the Remote DMA paradigm. The APEnet+ V5 prototype is built upon the Stratix V DevKit with the addition of a proprietary, third party IP core implementing multi-DMA engines. Support for zero-copy communication is assured by the possibility of DMA-accessing either host and GPU memory, offloading the CPU from the chore of data copying. The current implementation plateaus to a bandwidth for memory read of 4.8GB/s. Here we describe the hardware optimization to the memory write process which relies on the use of two independent DMA engines and an improved TLB.
Efficient Memory Access with NumPy Global Arrays using Local Memory Access
DOE Office of Scientific and Technical Information (OSTI.GOV)
Daily, Jeffrey A.; Berghofer, Dan C.
This paper discusses the work completed working with Global Arrays of data on distributed multi-computer systems and improving their performance. The tasks completed were done at Pacific Northwest National Laboratory in the Science Undergrad Laboratory Internship program in the summer of 2013 for the Data Intensive Computing Group in the Fundamental and Computational Sciences DIrectorate. This work was done on the Global Arrays Toolkit developed by this group. This toolkit is an interface for programmers to more easily create arrays of data on networks of computers. This is useful because scientific computation is often done on large amounts of datamore » sometimes so large that individual computers cannot hold all of it. This data is held in array form and can best be processed on supercomputers which often consist of a network of individual computers doing their computation in parallel. One major challenge for this sort of programming is that operations on arrays on multiple computers is very complex and an interface is needed so that these arrays seem like they are on a single computer. This is what global arrays does. The work done here is to use more efficient operations on that data that requires less copying of data to be completed. This saves a lot of time because copying data on many different computers is time intensive. The way this challenge was solved is when data to be operated on with binary operations are on the same computer, they are not copied when they are accessed. When they are on separate computers, only one set is copied when accessed. This saves time because of less copying done although more data access operations were done.« less
The Effects of Working Memory on Brain-Computer Interface Performance
Sprague, Samantha A.; McBee, Matthew; Sellers, Eric W.
2015-01-01
Objective The purpose of the present study is to evaluate the relationship between working memory and BCI performance. Methods Participants took part in two separate sessions. The first session consisted of three computerized tasks. The LSWM was used to measure working memory, the TPVT was used to measure general intelligence, and the DCCS was used to measure executive function, specifically cognitive flexibility. The second session consisted of a P300-based BCI copy-spelling task. Results The results indicate that both working memory and general intelligence are significant predictors of BCI performance. Conclusions This suggests that working memory training could be used to improve performance on a BCI task. Significance Working memory training may help to reduce a portion of the individual differences that exist in BCI performance allowing for a wider range of users to successfully operate the BCI system as well as increase the BCI performance of current users. PMID:26620822
The effects of working memory on brain-computer interface performance.
Sprague, Samantha A; McBee, Matthew T; Sellers, Eric W
2016-02-01
The purpose of the present study is to evaluate the relationship between working memory and BCI performance. Participants took part in two separate sessions. The first session consisted of three computerized tasks. The List Sorting Working Memory Task was used to measure working memory, the Picture Vocabulary Test was used to measure general intelligence, and the Dimensional Change Card Sort Test was used to measure executive function, specifically cognitive flexibility. The second session consisted of a P300-based BCI copy-spelling task. The results indicate that both working memory and general intelligence are significant predictors of BCI performance. This suggests that working memory training could be used to improve performance on a BCI task. Working memory training may help to reduce a portion of the individual differences that exist in BCI performance allowing for a wider range of users to successfully operate the BCI system as well as increase the BCI performance of current users. Copyright © 2015 International Federation of Clinical Neurophysiology. Published by Elsevier Ireland Ltd. All rights reserved.
Senese, Vincenzo Paolo; De Lucia, Natascia; Conson, Massimiliano
2015-01-01
Cognitive models of drawing are mainly based on assessment of copying performance of adults, whereas only a few studies have verified these models in young children. Moreover, developmental investigations have only rarely performed a systematic examination of the contribution of perceptual and representational visuo-spatial processes to copying and drawing from memory. In this study we investigated the role of visual perception and mental representation in both copying and drawing from memory skills in a sample of 227 typically developing children (53% females) aged 7-10 years. Participants underwent a neuropsychological assessment and the Rey-Osterrieth Complex Figure (ROCF). The fit and invariance of the predictive model considering visuo-spatial abilities, working memory, and executive functions were tested by means of hierarchical regressions and path analysis. Results showed that, in a gender invariant way, visual perception abilities and spatial mental representation had a direct effect on copying performance, whereas copying performance was the only specific predictor for drawing from memory. These effects were independent from age and socioeconomic status, and showed that cognitive models of drawing built up for adults could be considered for predicting copying and drawing from memory in children.
CoNNeCT Baseband Processor Module Boot Code SoftWare (BCSW)
NASA Technical Reports Server (NTRS)
Yamamoto, Clifford K.; Orozco, David S.; Byrne, D. J.; Allen, Steven J.; Sahasrabudhe, Adit; Lang, Minh
2012-01-01
This software provides essential startup and initialization routines for the CoNNeCT baseband processor module (BPM) hardware upon power-up. A command and data handling (C&DH) interface is provided via 1553 and diagnostic serial interfaces to invoke operational, reconfiguration, and test commands within the code. The BCSW has features unique to the hardware it is responsible for managing. In this case, the CoNNeCT BPM is configured with an updated CPU (Atmel AT697 SPARC processor) and a unique set of memory and I/O peripherals that require customized software to operate. These features include configuration of new AT697 registers, interfacing to a new HouseKeeper with a flash controller interface, a new dual Xilinx configuration/scrub interface, and an updated 1553 remote terminal (RT) core. The BCSW is intended to provide a "safe" mode for the BPM when initially powered on or when an unexpected trap occurs, causing the processor to reset. The BCSW allows the 1553 bus controller in the spacecraft or payload controller to operate the BPM over 1553 to upload code; upload Xilinx bit files; perform rudimentary tests; read, write, and copy the non-volatile flash memory; and configure the Xilinx interface. Commands also exist over 1553 to cause the CPU to jump or call a specified address to begin execution of user-supplied code. This may be in the form of a real-time operating system, test routine, or specific application code to run on the BPM.
The Raid distributed database system
NASA Technical Reports Server (NTRS)
Bhargava, Bharat; Riedl, John
1989-01-01
Raid, a robust and adaptable distributed database system for transaction processing (TP), is described. Raid is a message-passing system, with server processes on each site to manage concurrent processing, consistent replicated copies during site failures, and atomic distributed commitment. A high-level layered communications package provides a clean location-independent interface between servers. The latest design of the package delivers messages via shared memory in a configuration with several servers linked into a single process. Raid provides the infrastructure to investigate various methods for supporting reliable distributed TP. Measurements on TP and server CPU time are presented, along with data from experiments on communications software, consistent replicated copy control during site failures, and concurrent distributed checkpointing. A software tool for evaluating the implementation of TP algorithms in an operating-system kernel is proposed.
Using DMA for copying performance counter data to memory
Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.
2012-09-25
A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance counter data.
Using DMA for copying performance counter data to memory
Gara, Alan; Salapura, Valentina; Wisniewski, Robert W
2013-12-31
A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance data.
Coherent-state information concentration and purification in atomic memory
NASA Astrophysics Data System (ADS)
Herec, Jiří; Filip, Radim
2006-12-01
We propose a feasible method of coherent-state information concentration and purification utilizing quantum memory. The method allows us to optimally concentrate and purify information carried by many noisy copies of an unknown coherent state (randomly distributed in time) to a single copy. Thus nonclassical resources and operations can be saved, if we compare information processing with many noisy copies and a single copy with concentrated and purified information.
Virtual memory support for distributed computing environments using a shared data object model
NASA Astrophysics Data System (ADS)
Huang, F.; Bacon, J.; Mapp, G.
1995-12-01
Conventional storage management systems provide one interface for accessing memory segments and another for accessing secondary storage objects. This hinders application programming and affects overall system performance due to mandatory data copying and user/kernel boundary crossings, which in the microkernel case may involve context switches. Memory-mapping techniques may be used to provide programmers with a unified view of the storage system. This paper extends such techniques to support a shared data object model for distributed computing environments in which good support for coherence and synchronization is essential. The approach is based on a microkernel, typed memory objects, and integrated coherence control. A microkernel architecture is used to support multiple coherence protocols and the addition of new protocols. Memory objects are typed and applications can choose the most suitable protocols for different types of object to avoid protocol mismatch. Low-level coherence control is integrated with high-level concurrency control so that the number of messages required to maintain memory coherence is reduced and system-wide synchronization is realized without severely impacting the system performance. These features together contribute a novel approach to the support for flexible coherence under application control.
Seidman, Larry J; Lanca, Margaret; Kremen, William S; Faraone, Stephen V; Tsuang, Ming T
2003-10-01
Verbal declarative memory deficits in schizophrenia are well documented whereas visual declarative memory is less studied. Moreover, there are limited data on whether organizational and visual memory deficits are specific to schizophrenic psychoses. We compared visual memory and organizational function in patients with chronic schizophrenia (n=79) and chronic bipolar psychotic disorder (n=14), and in healthy controls (n=84) using the Rey-Osterrieth Complex Figure (ROCF), testing whether organizational impairments (i.e., executive dysfunctions) account for the visual memory deficit. Groups were comparable on age, handedness and expected intellectual ability (based on single word reading). Using analyses of covariance with sex, parental SES and ethnicity as co-variates, patients with schizophrenia were significantly more impaired than controls on copy accuracy, on recall accuracy, and on percent accuracy of recall. Patients with schizophrenia used a more detail-oriented style on copy and recall and had significantly worse recognition memory. After co-varying IQ, copy organization was also significantly different between the groups. Results for accuracy of copy and recall were not significantly attenuated when controlling for copy organization. Duration of illness was associated with visual memory. Bipolar patients performed at an intermediate level between controls and patients with schizophrenia. The data suggest that in schizophrenia, patients have a visual memory disorder characterized by both organizational processing impairments and retention difficulties, and that there is a decline in visual memory functions with duration of illness. Further research is required to determine whether similar mechanisms underlie the neurocognitive deficits in these psychotic disorders.
Proceedings of the second SISAL users` conference
DOE Office of Scientific and Technical Information (OSTI.GOV)
Feo, J T; Frerking, C; Miller, P J
1992-12-01
This report contains papers on the following topics: A sisal code for computing the fourier transform on S{sub N}; five ways to fill your knapsack; simulating material dislocation motion in sisal; candis as an interface for sisal; parallelisation and performance of the burg algorithm on a shared-memory multiprocessor; use of genetic algorithm in sisal to solve the file design problem; implementing FFT`s in sisal; programming and evaluating the performance of signal processing applications in the sisal programming environment; sisal and Von Neumann-based languages: translation and intercommunication; an IF2 code generator for ADAM architecture; program partitioning for NUMA multiprocessor computer systems;more » mapping functional parallelism on distributed memory machines; implicit array copying: prevention is better than cure ; mathematical syntax for sisal; an approach for optimizing recursive functions; implementing arrays in sisal 2.0; Fol: an object oriented extension to the sisal language; twine: a portable, extensible sisal execution kernel; and investigating the memory performance of the optimizing sisal compiler.« less
Performing a local reduction operation on a parallel computer
Blocksome, Michael A; Faraj, Daniel A
2013-06-04
A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.
Performing a local reduction operation on a parallel computer
Blocksome, Michael A.; Faraj, Daniel A.
2012-12-11
A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.
Scalable Cloning on Large-Scale GPU Platforms with Application to Time-Stepped Simulations on Grids
DOE Office of Scientific and Technical Information (OSTI.GOV)
Yoginath, Srikanth B.; Perumalla, Kalyan S.
Cloning is a technique to efficiently simulate a tree of multiple what-if scenarios that are unraveled during the course of a base simulation. However, cloned execution is highly challenging to realize on large, distributed memory computing platforms, due to the dynamic nature of the computational load across clones, and due to the complex dependencies spanning the clone tree. In this paper, we present the conceptual simulation framework, algorithmic foundations, and runtime interface of CloneX, a new system we designed for scalable simulation cloning. It efficiently and dynamically creates whole logical copies of a dynamic tree of simulations across a largemore » parallel system without full physical duplication of computation and memory. The performance of a prototype implementation executed on up to 1,024 graphical processing units of a supercomputing system has been evaluated with three benchmarks—heat diffusion, forest fire, and disease propagation models—delivering a speed up of over two orders of magnitude compared to replicated runs. Finally, the results demonstrate a significantly faster and scalable way to execute many what-if scenario ensembles of large simulations via cloning using the CloneX interface.« less
Scalable Cloning on Large-Scale GPU Platforms with Application to Time-Stepped Simulations on Grids
Yoginath, Srikanth B.; Perumalla, Kalyan S.
2018-01-31
Cloning is a technique to efficiently simulate a tree of multiple what-if scenarios that are unraveled during the course of a base simulation. However, cloned execution is highly challenging to realize on large, distributed memory computing platforms, due to the dynamic nature of the computational load across clones, and due to the complex dependencies spanning the clone tree. In this paper, we present the conceptual simulation framework, algorithmic foundations, and runtime interface of CloneX, a new system we designed for scalable simulation cloning. It efficiently and dynamically creates whole logical copies of a dynamic tree of simulations across a largemore » parallel system without full physical duplication of computation and memory. The performance of a prototype implementation executed on up to 1,024 graphical processing units of a supercomputing system has been evaluated with three benchmarks—heat diffusion, forest fire, and disease propagation models—delivering a speed up of over two orders of magnitude compared to replicated runs. Finally, the results demonstrate a significantly faster and scalable way to execute many what-if scenario ensembles of large simulations via cloning using the CloneX interface.« less
Organizational strategies mediate nonverbal memory impairment in obsessive-compulsive disorder.
Savage, C R; Baer, L; Keuthen, N J; Brown, H D; Rauch, S L; Jenike, M A
1999-04-01
Previous neuropsychological studies of obsessive-compulsive disorder (OCD) have indicated impaired executive functioning and nonverbal memory. The extent to which impaired executive functioning impacts nonverbal memory has not been established. The current study investigated the mediating effects of organizational strategies used when copying a figure on subsequent nonverbal memory for that figure. We examined neuropsychological performance in 20 unmedicated subjects with OCD and 20 matched normal control subjects. Subjects were administered the Rey-Osterrieth Complex Figure Test (RCFT) and neuropsychological tests assessing various aspects of executive function. OCD subjects differed significantly from healthy control subjects in the organizational strategies used to copy the RCFT figure, and they recalled significantly less information on both immediate and delayed testing. Multiple regression analyses indicated that group differences in immediate percent recall were significantly mediated by copy organizational strategies. Further exploratory analyses indicated that organizational problems in OCD may be related to difficulties shifting mental and/or spatial set. Immediate nonverbal memory problems in OCD subjects were mediated by impaired organizational strategies used during the initial copy of the RCFT figure. Thus, the primary deficit was one affecting executive function, which then had a secondary effect on immediate memory. These findings are consistent with current theories proposing frontal-striatal system dysfunction in OCD.
Development of Network Interface Cards for TRIDAQ systems with the NaNet framework
NASA Astrophysics Data System (ADS)
Ammendola, R.; Biagioni, A.; Cretaro, P.; Di Lorenzo, S.; Fiorini, M.; Frezza, O.; Lamanna, G.; Lo Cicero, F.; Lonardo, A.; Martinelli, M.; Neri, I.; Paolucci, P. S.; Pastorelli, E.; Piandani, R.; Pontisso, L.; Rossetti, D.; Simula, F.; Sozzi, M.; Valente, P.; Vicini, P.
2017-03-01
NaNet is a framework for the development of FPGA-based PCI Express (PCIe) Network Interface Cards (NICs) with real-time data transport architecture that can be effectively employed in TRIDAQ systems. Key features of the architecture are the flexibility in the configuration of the number and kind of the I/O channels, the hardware offloading of the network protocol stack, the stream processing capability, and the zero-copy CPU and GPU Remote Direct Memory Access (RDMA). Three NIC designs have been developed with the NaNet framework: NaNet-1 and NaNet-10 for the CERN NA62 low level trigger and NaNet3 for the KM3NeT-IT underwater neutrino telescope DAQ system. We will focus our description on the NaNet-10 design, as it is the most complete of the three in terms of capabilities and integrated IPs of the framework.
Rosenbloom, Margaret J; Sassoon, Stephanie A; Pfefferbaum, Adolf; Sullivan, Edith V
2009-12-01
Visuospatial construction ability as used in drawing complex figures is commonly impaired in chronic alcoholics, but memory for such information can be enhanced by use of a holistic drawing strategy during encoding. We administered the Rey-Osterrieth Complex Figure Test (ROCFT) to 41 alcoholic and 38 control men and women and assessed the contribution of diffusion tensor imaging (DTI) measures of integrity of selected white matter tracts to ROCFT copy accuracy, copy strategy, and recall accuracy. Although alcoholics copied the figure less accurately than controls, a more holistic strategy at copy was associated with better recall in both groups. Greater radial diffusivity, reflecting compromised myelin integrity, in occipital forceps and external capsule was associated with poorer copy accuracy in both groups. Lower FA, reflecting compromised fiber microstructure in the inferior cingulate bundle, which links frontal and medial temporal episodic memory systems, was associated with piecemeal copy strategy and poorer immediate recall in the alcoholics. The correlations were generally modest and should be considered exploratory. To the extent that the inferior cingulate was relatively spared in alcoholics, it may have provided an alternative pathway to the compromised frontal system for successful copy strategy and, by extension, aided recall.
Accessing global data from accelerator devices
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.
Accessing global data from accelerator devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less
1. Historic American Buildings Survey Charles E. Peterson, Photographer Copied ...
1. Historic American Buildings Survey Charles E. Peterson, Photographer Copied July 29, 1940 Copied from old photograph - Joseph R. Brown House, Sam Brown Memorial Park (moved from Dakota Territory), Browns Valley, Traverse County, MN
Flash drive memory apparatus and method
NASA Technical Reports Server (NTRS)
Hinchey, Michael G. (Inventor)
2010-01-01
A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.
Hardware support for collecting performance counters directly to memory
Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.
2012-09-25
Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.
The storage system of PCM based on random access file system
NASA Astrophysics Data System (ADS)
Han, Wenbing; Chen, Xiaogang; Zhou, Mi; Li, Shunfen; Li, Gezi; Song, Zhitang
2016-10-01
Emerging memory technologies such as Phase change memory (PCM) tend to offer fast, random access to persistent storage with better scalability. It's a hot topic of academic and industrial research to establish PCM in storage hierarchy to narrow the performance gap. However, the existing file systems do not perform well with the emerging PCM storage, which access storage medium via a slow, block-based interface. In this paper, we propose a novel file system, RAFS, to bring about good performance of PCM, which is built in the embedded platform. We attach PCM chips to the memory bus and build RAFS on the physical address space. In the proposed file system, we simplify traditional system architecture to eliminate block-related operations and layers. Furthermore, we adopt memory mapping and bypassed page cache to reduce copy overhead between the process address space and storage device. XIP mechanisms are also supported in RAFS. To the best of our knowledge, we are among the first to implement file system on real PCM chips. We have analyzed and evaluated its performance with IOZONE benchmark tools. Our experimental results show that the RAFS on PCM outperforms Ext4fs on SDRAM with small record lengths. Based on DRAM, RAFS is significantly faster than Ext4fs by 18% to 250%.
DMA shared byte counters in a parallel computer
Chen, Dong; Gara, Alan G.; Heidelberger, Philip; Vranas, Pavlos
2010-04-06
A parallel computer system is constructed as a network of interconnected compute nodes. Each of the compute nodes includes at least one processor, a memory and a DMA engine. The DMA engine includes a processor interface for interfacing with the at least one processor, DMA logic, a memory interface for interfacing with the memory, a DMA network interface for interfacing with the network, injection and reception byte counters, injection and reception FIFO metadata, and status registers and control registers. The injection FIFOs maintain memory locations of the injection FIFO metadata memory locations including its current head and tail, and the reception FIFOs maintain the reception FIFO metadata memory locations including its current head and tail. The injection byte counters and reception byte counters may be shared between messages.
NASA Technical Reports Server (NTRS)
Rasmussen, Robert D. (Inventor); Manning, Robert M. (Inventor); Lewis, Blair F. (Inventor); Bolotin, Gary S. (Inventor); Ward, Richard S. (Inventor)
1990-01-01
This is a distributed computing system providing flexible fault tolerance; ease of software design and concurrency specification; and dynamic balance of the loads. The system comprises a plurality of computers each having a first input/output interface and a second input/output interface for interfacing to communications networks each second input/output interface including a bypass for bypassing the associated computer. A global communications network interconnects the first input/output interfaces for providing each computer the ability to broadcast messages simultaneously to the remainder of the computers. A meshwork communications network interconnects the second input/output interfaces providing each computer with the ability to establish a communications link with another of the computers bypassing the remainder of computers. Each computer is controlled by a resident copy of a common operating system. Communications between respective ones of computers is by means of split tokens each having a moving first portion which is sent from computer to computer and a resident second portion which is disposed in the memory of at least one of computer and wherein the location of the second portion is part of the first portion. The split tokens represent both functions to be executed by the computers and data to be employed in the execution of the functions. The first input/output interfaces each include logic for detecting a collision between messages and for terminating the broadcasting of a message whereby collisions between messages are detected and avoided.
CBM First-level Event Selector Input Interface Demonstrator
NASA Astrophysics Data System (ADS)
Hutter, Dirk; de Cuveland, Jan; Lindenstruth, Volker
2017-10-01
CBM is a heavy-ion experiment at the future FAIR facility in Darmstadt, Germany. Featuring self-triggered front-end electronics and free-streaming read-out, event selection will exclusively be done by the First Level Event Selector (FLES). Designed as an HPC cluster with several hundred nodes its task is an online analysis and selection of the physics data at a total input data rate exceeding 1 TByte/s. To allow efficient event selection, the FLES performs timeslice building, which combines the data from all given input links to self-contained, potentially overlapping processing intervals and distributes them to compute nodes. Partitioning the input data streams into specialized containers allows performing this task very efficiently. The FLES Input Interface defines the linkage between the FEE and the FLES data transport framework. A custom FPGA PCIe board, the FLES Interface Board (FLIB), is used to receive data via optical links and transfer them via DMA to the host’s memory. The current prototype of the FLIB features a Kintex-7 FPGA and provides up to eight 10 GBit/s optical links. A custom FPGA design has been developed for this board. DMA transfers and data structures are optimized for subsequent timeslice building. Index tables generated by the FPGA enable fast random access to the written data containers. In addition the DMA target buffers can directly serve as InfiniBand RDMA source buffers without copying the data. The usage of POSIX shared memory for these buffers allows data access from multiple processes. An accompanying HDL module has been developed to integrate the FLES link into the front-end FPGA designs. It implements the front-end logic interface as well as the link protocol. Prototypes of all Input Interface components have been implemented and integrated into the FLES test framework. This allows the implementation and evaluation of the foreseen CBM read-out chain.
37. Photographic copy of the original construction drawing, 1934, by ...
37. Photographic copy of the original construction drawing, 1934, by Sverdrup and Parcel, Consulting Engineers, from microfilm copy at Bridge Division, Missouri Highway and Transportation Department. Stress sheet, continuous span - Mark Twain Memorial Bridge, Spanning Mississippi River at US Route 36, Hannibal, Marion County, MO
59. Photographic copy of the original construction drawing, 1934, by ...
59. Photographic copy of the original construction drawing, 1934, by Sverdrup and Parcel, Consulting Engineers, from microfilm copy at Bridge Division, Missouri Highway and Transportation Department. Construction changes in pier 7 - Mark Twain Memorial Bridge, Spanning Mississippi River at US Route 36, Hannibal, Marion County, MO
45. Photographic copy of the original construction drawing, 1934, by ...
45. Photographic copy of the original construction drawing, 1934, by Sverdrup and Parcel, Consulting Engineers, from microfilm copy at Bridge Division, Missouri Highway and Transportation Department. Cross section--300-ft. span - Mark Twain Memorial Bridge, Spanning Mississippi River at US Route 36, Hannibal, Marion County, MO
44. Photographic copy of the original construction drawing, 1934, by ...
44. Photographic copy of the original construction drawing, 1934, by Sverdrup and Parcel, Consulting Engineers, from microfilm copy at Bridge Division, Missouri Highway and Transportation Department. Details of 300-ft. span - Mark Twain Memorial Bridge, Spanning Mississippi River at US Route 36, Hannibal, Marion County, MO
The association of visual memory with hippocampal volume.
Zammit, Andrea R; Ezzati, Ali; Katz, Mindy J; Zimmerman, Molly E; Lipton, Michael L; Sliwinski, Martin J; Lipton, Richard B
2017-01-01
In this study we investigated the role of hippocampal volume (HV) in visual memory. Participants were a subsample of older adults (> = 70 years) from the Einstein Aging Study. Visual performance was measured using the Complex Figure (CF) copy and delayed recall tasks from the Repeatable Battery for the Assessment of Neuropsychological Status. Linear regressions were fitted to study associations between HV and visual tasks. Participants' (n = 113, mean age = 78.9 years) average scores on the CF copy and delayed recall were 17.4 and 11.6, respectively. CF delayed recall was associated with total (β = .031, p = 0.001) and left (β = 0.031, p = 0.001) and right HVs (β = 0.24, p = 0.012). CF delayed recall remained significantly associated with left HV even after we also included right HV (β = 0.27, p = 0.025) and the CF copy task (β = 0.30, p = 0.009) in the model. CF copy did not show any significant associations with HV. Our results suggest that left HV contributes in retrieval of visual memory in older adults.
Drawing experts have better visual memory while drawing.
Perdreau, Florian; Cavanagh, Patrick
2015-01-01
Drawing involves frequent shifts of gaze between the original and the drawing and visual memory helps compare the original object and the drawing across these gaze shifts while creating and correcting the drawing. It remains unclear whether this memory encodes all of the object or only the features around the current drawing position and whether both the original and the copy are equally well represented. To address these questions, we designed a "drawing" experiment coupled with a change detection task. A polygon was displayed on one screen and participants had to copy it on another, with the original and the drawing presented in alternation. At unpredictable moments during the copying process, modifications were made on the drawing and the original figure (while they were not in view). Participants had to correct their drawing every time they perceived a change so that their drawing always matched the current original figure. Our results show a better memory representation of the original figure than of the drawing, with locations relevant to the current production most accurately represented. Critically, experts showed better memory for both the original and the drawing than did novices, suggesting that experts have specialized advantages for encoding visual shapes.
Ridge, Perry G; Maxwell, Taylor J; Foutz, Spencer J; Bailey, Matthew H; Corcoran, Christopher D; Tschanz, JoAnn T; Norton, Maria C; Munger, Ronald G; O'Brien, Elizabeth; Kerber, Richard A; Cawthon, Richard M; Kauwe, John S K
2014-01-01
The mitochondria are essential organelles and are the location of cellular respiration, which is responsible for the majority of ATP production. Each cell contains multiple mitochondria, and each mitochondrion contains multiple copies of its own circular genome. The ratio of mitochondrial genomes to nuclear genomes is referred to as mitochondrial copy number. Decreases in mitochondrial copy number are known to occur in many tissues as people age, and in certain diseases. The regulation of mitochondrial copy number by nuclear genes has been studied extensively. While mitochondrial variation has been associated with longevity and some of the diseases known to have reduced mitochondrial copy number, the role that the mitochondrial genome itself has in regulating mitochondrial copy number remains poorly understood. We analyzed the complete mitochondrial genomes from 1007 individuals randomly selected from the Cache County Study on Memory Health and Aging utilizing the inferred evolutionary history of the mitochondrial haplotypes present in our dataset to identify sequence variation and mitochondrial haplotypes associated with changes in mitochondrial copy number. Three variants belonging to mitochondrial haplogroups U5A1 and T2 were significantly associated with higher mitochondrial copy number in our dataset. We identified three variants associated with higher mitochondrial copy number and suggest several hypotheses for how these variants influence mitochondrial copy number by interacting with known regulators of mitochondrial copy number. Our results are the first to report sequence variation in the mitochondrial genome that causes changes in mitochondrial copy number. The identification of these variants that increase mtDNA copy number has important implications in understanding the pathological processes that underlie these phenotypes.
Distributed memory compiler methods for irregular problems: Data copy reuse and runtime partitioning
NASA Technical Reports Server (NTRS)
Das, Raja; Ponnusamy, Ravi; Saltz, Joel; Mavriplis, Dimitri
1991-01-01
Outlined here are two methods which we believe will play an important role in any distributed memory compiler able to handle sparse and unstructured problems. We describe how to link runtime partitioners to distributed memory compilers. In our scheme, programmers can implicitly specify how data and loop iterations are to be distributed between processors. This insulates users from having to deal explicitly with potentially complex algorithms that carry out work and data partitioning. We also describe a viable mechanism for tracking and reusing copies of off-processor data. In many programs, several loops access the same off-processor memory locations. As long as it can be verified that the values assigned to off-processor memory locations remain unmodified, we show that we can effectively reuse stored off-processor data. We present experimental data from a 3-D unstructured Euler solver run on iPSC/860 to demonstrate the usefulness of our methods.
Overexpression of α3/α5/β4 nicotinic receptor subunits modifies impulsive-like behavior.
Viñals, Xavier; Molas, Susanna; Gallego, Xavier; Fernández-Montes, Rubén D; Robledo, Patricia; Dierssen, Mara; Maldonado, Rafael
2012-05-01
Recent studies have revealed that sequence variants in genes encoding the α3/α5/β4 nicotinic acetylcholine receptor subunits are associated with nicotine dependence. In this study, we evaluated two specific aspects of executive functioning related to drug addiction (impulsivity and working memory) in transgenic mice over expressing α3/α5/β4 nicotinic receptor subunits. Impulsivity and working memory were evaluated in an operant delayed alternation task, where mice must inhibit responding between 2 and 8s in order to receive food reinforcement. Working memory was also evaluated in a spontaneous alternation task in an open field. Transgenic mice showed less impulsive-like behavior than wild-type controls, and this behavioral phenotype was related to the number of copies of the transgene. Thus, transgenic Line 22 (16-28 copies) showed a more pronounced phenotype than Line 30 (4-5 copies). Overexpression of these subunits in Line 22 reduced spontaneous alternation behavior suggesting deficits in working memory processing in this particular paradigm. These results reveal the involvement of α3/α5/β4 nicotinic receptor subunits in working memory and impulsivity, two behavioral traits directly related to the vulnerability to develop nicotine dependence. Copyright © 2011 Elsevier Ireland Ltd. All rights reserved.
Closing-in behavior: Compensation or attraction?
Ambron, Elisabetta; Beschin, Nicoletta; Cerrone, Chiara; Della Sala, Sergio
2018-03-01
Closing-in behavior (CIB) defines the abnormal misplacement of the copy performance, positioned very closed to or on the top of the model. This symptom is observed in graphic copying by patients suffering from different neurological diseases, most commonly dementia. The cognitive origins of this behavior are still a matter of investigation, and research of the last 10 years has been focused on exploring 2 main accounts of CIB, the compensation and the attraction hypotheses, providing evidence in both directions. While the first account defines CIB as a compensatory strategy to overcome visuospatial and/or working memory deficits during copying tasks, the attraction hypothesis looks at CIB as primitive default behavior in which attention and action are closely coupled and movements are performed toward the focus of attention. We explored these 2 hypotheses in a sample of patients with and without CIB, and controls in 5 experiments: Experiments 1 and 2 tested the attraction hypothesis and, respectively, the prediction that CIB can be elicited in a noncopying dual task condition loading upon attentional resources or by irrelevant attentional grabbing stimuli. The other experiments investigated the compensation hypothesis manipulating the distance between model and copying space (Experiment 3), the task demand (single or dual task loading on verbal working memory; Experiment 4), the task requirements (copying and tracing) and visual demand (visual copy and memory; Experiment 5). The results support the attraction hypothesis of CIB. CIB reflects an impairment of the attention and action system, rather than a compensatory strategy. (PsycINFO Database Record (c) 2018 APA, all rights reserved).
Isolation and characterization of novel mutations in the pSC101 origin that increase copy number
DOE Office of Scientific and Technical Information (OSTI.GOV)
Thompson, Mitchell G.; Sedaghatian, Nima; Barajas, Jesus F.
pSC101 is a narrow host range, low-copy plasmid commonly used for genetically manipulating Escherichia coli. As a byproduct of a genetic screen for a more sensitive lactam biosensor, we identified multiple novel mutations that increase the copy number of plasmids with the pSC101 origin. All mutations identified in this study occurred on plasmids which also contained at least one mutation localized to the RepA protein encoded within the origin. Homology modelling predicts that many of these mutations occur within the dimerization interface of RepA. Mutant RepA resulted in plasmid copy numbers between ~31 and ~113 copies/cell, relative to ~5 copies/cellmore » in wild-type pSC101 plasmids. Combining the mutations that were predicted to disrupt multiple contacts on the dimerization interface resulted in copy numbers of ~500 copies/cell, while also attenuating growth in host strains. Fluorescent protein production expressed from an arabinose-inducible promoter on mutant origin derived plasmids did correlate with copy number. Plasmids harboring RepA with one of two mutations, E83K and N99D, resulted in fluorescent protein production similar to that from p15a- (~20 copies/cell) and ColE1- (~31 copies/cell) based plasmids, respectively. The mutant copy number variants retained compatibility with p15a, pBBR, and ColE1 origins of replication. Thus, these pSC101 variants may be useful in future metabolic engineering efforts that require medium or high-copy vectors compatible with p15a- and ColE1-based plasmids.« less
Isolation and characterization of novel mutations in the pSC101 origin that increase copy number
Thompson, Mitchell G.; Sedaghatian, Nima; Barajas, Jesus F.; ...
2018-01-25
pSC101 is a narrow host range, low-copy plasmid commonly used for genetically manipulating Escherichia coli. As a byproduct of a genetic screen for a more sensitive lactam biosensor, we identified multiple novel mutations that increase the copy number of plasmids with the pSC101 origin. All mutations identified in this study occurred on plasmids which also contained at least one mutation localized to the RepA protein encoded within the origin. Homology modelling predicts that many of these mutations occur within the dimerization interface of RepA. Mutant RepA resulted in plasmid copy numbers between ~31 and ~113 copies/cell, relative to ~5 copies/cellmore » in wild-type pSC101 plasmids. Combining the mutations that were predicted to disrupt multiple contacts on the dimerization interface resulted in copy numbers of ~500 copies/cell, while also attenuating growth in host strains. Fluorescent protein production expressed from an arabinose-inducible promoter on mutant origin derived plasmids did correlate with copy number. Plasmids harboring RepA with one of two mutations, E83K and N99D, resulted in fluorescent protein production similar to that from p15a- (~20 copies/cell) and ColE1- (~31 copies/cell) based plasmids, respectively. The mutant copy number variants retained compatibility with p15a, pBBR, and ColE1 origins of replication. Thus, these pSC101 variants may be useful in future metabolic engineering efforts that require medium or high-copy vectors compatible with p15a- and ColE1-based plasmids.« less
Effect of organizational strategy on visual memory in patients with schizophrenia.
Kim, Myung-Sun; Namgoong, Yoon; Youn, Tak
2008-08-01
The aim of the present study was to examine how copy organization mediated immediate recall among patients with schizophrenia using the Rey-Osterrieth Complex Figure Test (ROCF). The Boston Qualitative Scoring System (BQSS) was applied for qualitative and quantitative analyses of ROCF performances. Subjects included 20 patients with schizophrenia and 20 age- and gender-matched healthy controls. During the copy condition, the schizophrenia group and the control group differed in fragmentation; during the immediate recall condition, the two groups differed in configural presence and planning; and during the delayed recall condition, they differed in several qualitative measurements, including configural presence, cluster presence/placement, detail presence/placement, fragmentation, planning, and neatness. The two groups also differed in several quantitative measurements, including immediate presence and accuracy, immediate retention, delayed retention, and organization. Although organizational strategies used during the copy condition mediated the difference between the two groups during the immediate recall condition, group also had a significant direct effect on immediate recall. Schizophrenia patients are deficient in visual memory, and a piecemeal approach to the figure and organizational deficit seem to be related to the visual memory deficit. But schizophrenia patients also appeared to have some memory problems, including retention and/or retrieval deficits.
Working Memory Influences Processing Speed and Reading Fluency in ADHD
Jacobson, Lisa A.; Ryan, Matthew; Martin, Rebecca B.; Ewen, Joshua; Mostofsky, Stewart H.; Denckla, Martha B.; Mahone, E. Mark
2012-01-01
Processing speed deficits affect reading efficiency, even among individuals who recognize and decode words accurately. Children with ADHD who decode words accurately can still have inefficient reading fluency, leading to a bottleneck in other cognitive processes. This “slowing” in ADHD is associated with deficits in fundamental components of executive function underlying processing speed, including response selection. The purpose of the present study was to deconstruct processing speed in order to determine which components of executive control best explain the “processing” speed deficits related to reading fluency in ADHD. Participants (41 ADHD, 21 controls), ages 9-14, screened for language disorders, word reading deficits, and psychiatric disorders, were administered measures of copying speed, processing speed, reading fluency, working memory, reaction time, inhibition, and auditory attention span. Compared to controls, children with ADHD showed reduced oral and silent reading fluency, and reduced processing speed—driven primarily by deficits on WISC-IV Coding. In contrast, groups did not differ on copying speed. After controlling for copying speed, sex, severity of ADHD-related symptomatology, and GAI, slowed “processing” speed (i.e., Coding) was significantly associated with verbal span and measures of working memory, but not with measures of response control/inhibition, lexical retrieval speed, reaction time, or intra-subject variability. Further, “processing” speed (i.e., Coding, residualized for copying speed) and working memory were significant predictors of oral reading fluency. Abnormalities in working memory and response selection (which are frontally-mediated and enter into the output side of processing speed) may play an important role in deficits in reading fluency in ADHD, potentially more than posteriorally-mediated problems with orienting of attention or perceiving the stimulus. PMID:21287422
Working memory influences processing speed and reading fluency in ADHD.
Jacobson, Lisa A; Ryan, Matthew; Martin, Rebecca B; Ewen, Joshua; Mostofsky, Stewart H; Denckla, Martha B; Mahone, E Mark
2011-01-01
Processing-speed deficits affect reading efficiency, even among individuals who recognize and decode words accurately. Children with ADHD who decode words accurately can still have inefficient reading fluency, leading to a bottleneck in other cognitive processes. This "slowing" in ADHD is associated with deficits in fundamental components of executive function underlying processing speed, including response selection. The purpose of the present study was to deconstruct processing speed in order to determine which components of executive control best explain the "processing" speed deficits related to reading fluency in ADHD. Participants (41 ADHD, 21 controls), ages 9-14 years, screened for language disorders, word reading deficits, and psychiatric disorders, were administered measures of copying speed, processing speed, reading fluency, working memory, reaction time, inhibition, and auditory attention span. Compared to controls, children with ADHD showed reduced oral and silent reading fluency and reduced processing speed-driven primarily by deficits on WISC-IV Coding. In contrast, groups did not differ on copying speed. After controlling for copying speed, sex, severity of ADHD-related symptomatology, and GAI, slowed "processing" speed (i.e., Coding) was significantly associated with verbal span and measures of working memory but not with measures of response control/inhibition, lexical retrieval speed, reaction time, or intrasubject variability. Further, "processing" speed (i.e., Coding, residualized for copying speed) and working memory were significant predictors of oral reading fluency. Abnormalities in working memory and response selection (which are frontally mediated and enter into the output side of processing speed) may play an important role in deficits in reading fluency in ADHD, potentially more than posteriorally mediated problems with orienting of attention or perceiving the stimulus.
Electric-field-controlled interface dipole modulation for Si-based memory devices.
Miyata, Noriyuki
2018-05-31
Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.
Simplified Interface to Complex Memory Hierarchies 1.x
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lang, Michael; Ionkov, Latchesar; Williams, Sean
2017-02-21
Memory systems are expected to get evermore complicated in the coming years, and it isn't clear exactly what form that complexity will take. On the software side, a simple, flexible way of identifying and working with memory pools is needed. Additionally, most developers seek code portability and do not want to learn the intricacies of complex memory. Hence, we believe that a library for interacting with complex memory systems should expose two kinds of abstraction: First, a low-level, mechanism-based interface designed for the runtime or advanced user that wants complete control, with its focus on simplified representation but with allmore » decisions left to the caller. Second, a high-level, policy-based interface designed for ease of use for the application developer, in which we aim for best-practice decisions based on application intent. We have developed such a library, called SICM: Simplified Interface to Complex Memory.« less
Optical mass memory system (AMM-13). AMM/DBMS interface control document
NASA Technical Reports Server (NTRS)
Bailey, G. A.
1980-01-01
The baseline for external interfaces of a 10 to the 13th power bit, optical archival mass memory system (AMM-13) is established. The types of interfaces addressed include data transfer; AMM-13, Data Base Management System, NASA End-to-End Data System computer interconnect; data/control input and output interfaces; test input data source; file management; and facilities interface.
NASA Technical Reports Server (NTRS)
Morfopoulos, Arin C.; Pham, Thang D.
2013-01-01
JPL has produced a series of FPGA (field programmable gate array) vision algorithms that were written with custom interfaces to get data in and out of each vision module. Each module has unique requirements on the data interface, and further vision modules are continually being developed, each with their own custom interfaces. Each memory module had also been designed for direct access to memory or to another memory module.
Ohmacht, Martin
2017-08-15
In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.
Ohmacht, Martin
2014-09-09
In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.
Bermuda Triangle: a subsystem of the 168/E interfacing scheme used by Group B at SLAC
DOE Office of Scientific and Technical Information (OSTI.GOV)
Oxoby, G.J.; Levinson, L.J.; Trang, Q.H.
1979-12-01
The Bermuda Triangle system is a method of interfacing several 168/E microprocessors to a central system for control of the processors and overlaying their memories. The system is a three-way interface with I/O ports to a large buffer memory, a PDP11 Unibus and a bus to the 168/E processors. Data may be transferred bidirectionally between any two ports. Two Bermuda Triangles are used, one for the program memory and one for the data memory. The program buffer memory stores the overlay programs for the 168/E, and the data buffer memory, the incoming raw data, the data portion of the overlays,more » and the outgoing processed events. This buffering is necessary since the memories of 168/E microprocessors are small compared to the main program and the amount of data being processed. The link to the computer facility is via a Unibus to IBM channel interface. A PDP11/04 controls the data flow. 7 figures, 4 tables. (RWR)« less
Checkpoint-Restart in User Space
DOE Office of Scientific and Technical Information (OSTI.GOV)
CRUISE implements a user-space file system that stores data in main memory and transparently spills over to other storage, like local flash memory or the parallel file system, as needed. CRUISE also exposes file contents fo remote direct memory access, allowing external tools to copy files to the parallel file system in the background with reduced CPU interruption.
Development of bubble memory recorder onboard Japan Earth Resources Satellite-1
NASA Astrophysics Data System (ADS)
Araki, Tsunehiko; Ishida, Chu; Ochiai, Kiyoshi; Nozue, Tatsuhiro; Tachibana, Kyozo; Yoshida, Kazutoshi
The Bubble Memory Recorder (BMR) developed for use on the Earth Resources Satellite is described in terms of its design, capabilities, and functions. The specifications of the BMR are given listing memory capacity, functions, and interface types for data, command, and telemetry functions. The BMR has an emergency signal interface to provide contingency recording, and a satellite-separation signal interface can be turned on automatically by signal input. Data are stored in a novolatile memory device so that the memory is retained during power outages. The BMR is characterized by a capability for random access, nonvolatility, and a solid-state design that is useful for space operations since it does not disturb spacecraft attitude.
NASA Astrophysics Data System (ADS)
Chen, Jianhui; Chen, Bingbing; Shen, Yanjiao; Guo, Jianxin; Liu, Baoting; Dai, Xiuhong; Xu, Ying; Mai, Yaohua
2017-11-01
A hysteresis loop of minority carrier lifetime vs voltage is found in polystyrenesulfonate (PSS)/Si organic-inorganic hybrid heterojunctions, implying an interfacial memory effect. Capacitance-voltage and conductance-voltage hysteresis loops are observed and reveal a memory window. A switchable interface state, which can be controlled by charge transfer based on an electrochemical oxidation/deoxidation process, is suggested to be responsible for this hysteresis effect. We perform first-principle total-energy calculations on the influence of external electric fields and electrons or holes, which are injected into interface states on the adsorption energy of PSS on Si. It is demonstrated that the dependence of the interface adsorption energy difference on the electric field is the origin of this two-state switching. These results offer a concept of organic-inorganic hybrid interface memory being optically or electrically readable, low-cost, and compatible with the flexible organic electronics.
Si-based optical I/O for optical memory interface
NASA Astrophysics Data System (ADS)
Ha, Kyoungho; Shin, Dongjae; Byun, Hyunil; Cho, Kwansik; Na, Kyoungwon; Ji, Hochul; Pyo, Junghyung; Hong, Seokyong; Lee, Kwanghyun; Lee, Beomseok; Shin, Yong-hwack; Kim, Junghye; Kim, Seong-gu; Joe, Insung; Suh, Sungdong; Choi, Sanghoon; Han, Sangdeok; Park, Yoondong; Choi, Hanmei; Kuh, Bongjin; Kim, Kichul; Choi, Jinwoo; Park, Sujin; Kim, Hyeunsu; Kim, Kiho; Choi, Jinyong; Lee, Hyunjoo; Yang, Sujin; Park, Sungho; Lee, Minwoo; Cho, Minchang; Kim, Saebyeol; Jeong, Taejin; Hyun, Seokhun; Cho, Cheongryong; Kim, Jeong-kyoum; Yoon, Hong-gu; Nam, Jeongsik; Kwon, Hyukjoon; Lee, Hocheol; Choi, Junghwan; Jang, Sungjin; Choi, Joosun; Chung, Chilhee
2012-01-01
Optical interconnects may provide solutions to the capacity-bandwidth trade-off of recent memory interface systems. For cost-effective optical memory interfaces, Samsung Electronics has been developing silicon photonics platforms on memory-compatible bulk-Si 300-mm wafers. The waveguide of 0.6 dB/mm propagation loss, vertical grating coupler of 2.7 dB coupling loss, modulator of 10 Gbps speed, and Ge/Si photodiode of 12.5 Gbps bandwidth have been achieved on the bulk-Si platform. 2x6.4 Gbps electrical driver circuits have been also fabricated using a CMOS process.
Designing a VMEbus FDDI adapter card
NASA Astrophysics Data System (ADS)
Venkataraman, Raman
1992-03-01
This paper presents a system architecture for a VMEbus FDDI adapter card containing a node core, FDDI block, frame buffer memory and system interface unit. Most of the functions of the PHY and MAC layers of FDDI are implemented with National's FDDI chip set and the SMT implementation is simplified with a low cost microcontroller. The factors that influence the system bus bandwidth utilization and FDDI bandwidth utilization are the data path and frame buffer memory architecture. The VRAM based frame buffer memory has two sections - - LLC frame memory and SMT frame memory. Each section with an independent serial access memory (SAM) port provides an independent access after the initial data transfer cycle on the main port and hence, the throughput is maximized on each port of the memory. The SAM port simplifies the system bus master DMA design and the VMEbus interface can be designed with low-cost off-the-shelf interface chips.
Lange, G; Waked, W; Kirshblum, S; DeLuca, J
2000-01-01
To examine how organizational strategy at encoding influences visual memory performance in stroke patients. Case control study. Postacute rehabilitation hospital. Stroke patients with right hemisphere damage (n = 20) versus left hemisphere damage (n = 15), and stroke patients with cortical damage (n = 11) versus subcortical damage (n = 19). Organizational strategy scores, recall performance on the Rey-Osterrieth Complex Figure (ROCF). Results demonstrated significantly greater organizational impairment and less accurate copy performance (i.e., encoding of visuospatial information on the ROCF) in the right compared to the left hemisphere group, and in the cortical relative to the subcortical group. Organizational strategy and copy accuracy scores were significantly related to each other. The absolute amount of immediate and delayed recall was significantly associated with poor organizational strategy scores. However, relative to the amount of visual information originally encoded, memory performances did not differ between groups. These findings suggest that visual memory impairments after stroke may be caused by a lack of organizational strategy affecting information encoding, rather than an impairment in memory storage or retrieval.
1993-11-01
way is to develop a crude but working model of an entire system. The other is by developing a realistic model of the user interface , leaving out most...devices or by incorporating software for a more user -friendly interface . Automation introduces the possibility of making data entry errors. Multimode...across various human- computer interfaces . 127 a Memory: Minimize the amount of information that the user must maintain in short-term memory
Optimized Infrastructure for the Earth System Prediction Capability
2013-09-30
for referencing memory between its native coupling datatype (MCT Attribute Vectors) and ESMF Arrays. This will reduce the copies required and will...introduced ability within CESM to share memory between ESMF and MCT datatypes makes using both tools together much easier. Using both is appealing
NASA Technical Reports Server (NTRS)
Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)
1983-01-01
A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.
High-speed zero-copy data transfer for DAQ applications
NASA Astrophysics Data System (ADS)
Pisani, Flavio; Cámpora Pérez, Daniel Hugo; Neufeld, Niko
2015-05-01
The LHCb Data Acquisition (DAQ) will be upgraded in 2020 to a trigger-free readout. In order to achieve this goal we will need to connect around 500 nodes with a total network capacity of 32 Tb/s. To get such an high network capacity we are testing zero-copy technology in order to maximize the theoretical link throughput without adding excessive CPU and memory bandwidth overhead, leaving free resources for data processing resulting in less power, space and money used for the same result. We develop a modular test application which can be used with different transport layers. For the zero-copy implementation we choose the OFED IBVerbs API because it can provide low level access and high throughput. We present throughput and CPU usage measurements of 40 GbE solutions using Remote Direct Memory Access (RDMA), for several network configurations to test the scalability of the system.
BIRD: A general interface for sparse distributed memory simulators
NASA Technical Reports Server (NTRS)
Rogers, David
1990-01-01
Kanerva's sparse distributed memory (SDM) has now been implemented for at least six different computers, including SUN3 workstations, the Apple Macintosh, and the Connection Machine. A common interface for input of commands would both aid testing of programs on a broad range of computer architectures and assist users in transferring results from research environments to applications. A common interface also allows secondary programs to generate command sequences for a sparse distributed memory, which may then be executed on the appropriate hardware. The BIRD program is an attempt to create such an interface. Simplifying access to different simulators should assist developers in finding appropriate uses for SDM.
Urgent Virtual Machine Eviction with Enlightened Post-Copy
2015-12-01
memory is in use, almost all of which is by Memcached. MySQL : The VMs run MySQL 5.6, and the clients execute OLTPBenchmark [3] using the Twitter...workload with scale factor of 960. The VMs are each allocated 16 cores and 30 GB of memory, and MySQL is configured with a 16 GB buffer pool in memory. The...operation mix for 5 minutes as a warm-up. At the time of migration, MySQL uses approximately 17 GB of memory, and almost all of the 30 GB memory is
Cognitive retraining for organizational impairment in obsessive-compulsive disorder.
Buhlmann, Ulrike; Deckersbach, Thilo; Engelhard, Iris; Cook, Laura M; Rauch, Scott L; Kathmann, Norbert; Wilhelm, Sabine; Savage, Cary R
2006-11-15
Individuals with obsessive-compulsive disorder (OCD) have difficulties in organizing information during encoding associated with subsequent memory impairments. This study was designed to investigate whether impairments in organization in individuals with OCD can be alleviated with cognitive training. Thirty-five OCD subjects and 36 controls copied and recalled the Rey-Osterrieth Complex Figure Test (RCFT) [Osterrieth, P.A., 1944. Le test de copie d'une figure complexe: Contribution a l'étude de la perception et de la memoire (The test of copying a complex figure: A contribution to the study of perception and memory). Archive de Psychologie 30, 286-350.] before being randomly assigned to a training or non-training condition. The training condition was designed to improve the ability to organize complex visuospatial information in a meaningful way. The intervention phase was followed by another copy and recall trial of the RCFT. Both OCD and control subjects who underwent training improved more in organization and memory than subjects who did not receive organizational training, providing evidence that the training procedure was effective. OCD subjects improved more in organizational during encoding than control subjects, irrespective of whether or not they had received training. This suggests that organization impairment in OCD affects primarily the ability to spontaneously utilize strategies when faced with complex, ambiguous information but that the ability to implement such strategies when provided with additional trials is preserved. These findings support a distinction in OCD between failure to utilize a strategy and incapacity to implement a strategy.
Flexible Peripheral Component Interconnect Input/Output Card
NASA Technical Reports Server (NTRS)
Bigelow, Kirk K.; Jerry, Albert L.; Baricio, Alisha G.; Cummings, Jon K.
2010-01-01
The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.
Low Latency Messages on Distributed Memory Multiprocessors
Rosing, Matt; Saltz, Joel
1995-01-01
This article describes many of the issues in developing an efficient interface for communication on distributed memory machines. Although the hardware component of message latency is less than 1 ws on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 μs. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. This article describes several tests performed and many of the issues involvedmore » in supporting low latency messages on distributed memory machines.« less
NASA Technical Reports Server (NTRS)
Burleigh, Scott C.
2011-01-01
Zero-Copy Objects System software enables application data to be encapsulated in layers of communication protocol without being copied. Indirect referencing enables application source data, either in memory or in a file, to be encapsulated in place within an unlimited number of protocol headers and/or trailers. Zero-copy objects (ZCOs) are abstract data access representations designed to minimize I/O (input/output) in the encapsulation of application source data within one or more layers of communication protocol structure. They are constructed within the heap space of a Simple Data Recorder (SDR) data store to which all participating layers of the stack must have access. Each ZCO contains general information enabling access to the core source data object (an item of application data), together with (a) a linked list of zero or more specific extents that reference portions of this source data object, and (b) linked lists of protocol header and trailer capsules. The concatenation of the headers (in ascending stack sequence), the source data object extents, and the trailers (in descending stack sequence) constitute the transmitted data object constructed from the ZCO. This scheme enables a source data object to be encapsulated in a succession of protocol layers without ever having to be copied from a buffer at one layer of the protocol stack to an encapsulating buffer at a lower layer of the stack. For large source data objects, the savings in copy time and reduction in memory consumption may be considerable.
Deficits of organizational strategy and visual memory in obsessive-compulsive disorder.
Shin, M S; Park, S J; Kim, M S; Lee, Y H; Ha, T H; Kwon, J S
2004-10-01
This study was conducted to investigate the deficits of organizational strategy and visual memory in obsessive-compulsive disorder (OCD). Thirty OCD patients and 30 healthy controls aged 20-35 years participated. The Maudsley Obsessive-Compulsive Inventory, Beck Anxiety Inventory, Wechsler Adult Intelligence Scale, and Rey-Osterrieth Complex Figure (ROCF) test were administered to participants. The authors scored ROCF performances using the Boston Qualitative Scoring System. The OCD patients showed poorer planning ability and higher fragmentation than did healthy controls when copying the ROCF, and they showed even poorer performances in the immediate and delayed recall conditions. The authors found that the Organization score in the copy condition mediated the difference between the OCD group and the healthy group in immediate recall. The direct effect of diagnosis (OCD or healthy) on the immediate recall condition of the ROCF was also significant. This study indicates that people with OCD have poor memory function and organizational deficits.
Low latency messages on distributed memory multiprocessors
NASA Technical Reports Server (NTRS)
Rosing, Matthew; Saltz, Joel
1993-01-01
Many of the issues in developing an efficient interface for communication on distributed memory machines are described and a portable interface is proposed. Although the hardware component of message latency is less than one microsecond on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 microseconds. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. Based on several tests that were run on the iPSC/860, an interface that will better match current distributed memory machines is proposed. The model used in the proposed interface consists of a computation processor and a communication processor on each node. Communication between these processors and other nodes in the system is done through a buffered network. Information that is transmitted is either data or procedures to be executed on the remote processor. The dual processor system is better suited for efficiently handling asynchronous communications compared to a single processor system. The ability to send data or procedure is very flexible for minimizing message latency, based on the type of communication being performed. The test performed and the proposed interface are described.
Palomo, R; Casals-Coll, M; Sánchez-Benavides, G; Quintana, M; Manero, R M; Rognoni, T; Calvo, L; Aranciva, F; Tamayo, F; Peña-Casanova, J
2013-05-01
The Rey-Osterrieth Complex Figure (ROCF) and the Free and Cued Selective Reminding Test (FCSRT) are widely used in clinical practice. The ROCF assesses visual perception, constructional praxis, and visuo-spatial memory. The FCSRT assesses verbal learning and memory. In this study, as part of the Spanish normative studies project in young adults (NEURONORMA young adults), we present age- and education-adjusted normative data for both tests obtained by using linear regression techniques. The sample consisted of 179 healthy participants ranging in age from 18 to 49 years. We provide tables for converting raw scores to scaled scores in addition to tables with scores adjusted by socio-demographic factors. The results showed that education affects scores for some of the memory tests and the figure-copying task. Age was only found to have an effect on the performance of visuo-spatial memory tests, and the effect of sex was negligible. The normative data obtained will be extremely useful in the clinical neuropsychological evaluation of young Spanish adults. Copyright © 2011 Sociedad Española de Neurología. Published by Elsevier Espana. All rights reserved.
A PLATFORM FOR CONTEXTUAL MOBILE PRIVACY
2017-12-01
cen- tralizes all permission management functionality. “Streamline the interface to require less touches to find the information about permissions...APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED STINFO COPY AIR FORCE RESEARCH LABORATORY INFORMATION DIRECTORATE...public, including foreign nationals. Copies may be obtained from the Defense Technical Information Center (DTIC) (http://www.dtic.mil). AFRL
A memory-mapped output interface: Omega navigation output data from the JOLT (TM) microcomputer
NASA Technical Reports Server (NTRS)
Lilley, R. W.
1976-01-01
A hardware interface which allows both digital and analog data output from the JOLT microcomputer is described in the context of a software-based Omega Navigation receiver. The interface hardware described is designed for output of six (or eight with simple extensions) bits of binary output in response to a memory store command from the microcomputer. The interface was produced in breadboard form and is operational as an evaluation aid for the software Omega receiver.
ERIC Educational Resources Information Center
Zambon, Franco
This study sought to determine a useful frequency for refreshing students' memories of complex procedures that involved a formal computer language. Students were required to execute the Microsoft Disc Operating System (MS-DOS) commands for "copy,""backup," and "restore." A total of 126 college students enrolled in six…
1988-02-29
by memory copyin g will degrade system performance on shared-memory multiprocessors. Virtual memor y (VM) remapping, as opposed to memory copying...Bershad, G.D. Giuseppe Facchetti, Kevin Fall, G . Scott Graham, Ellen Nelson , P. Venkat Rangan, Bruno Sartirana, Shin-Yuan Tzou, Raj Vaswani, and Robert...Remote Execution in NEST", IEEE Trans. on Software Eng. 13, 8 (August 1987), 905-912. 3. G . T. Almes, A. P. Black, E. Lazowska and J. Noe, "The Eden
Field Programmable Gate Array Apparatus, Method, and Computer Program
NASA Technical Reports Server (NTRS)
Morfopoulos, Arin C. (Inventor); Pham, Thang D. (Inventor)
2014-01-01
An apparatus is provided that includes a plurality of modules, a plurality of memory banks, and a multiplexor. Each module includes at least one agent that interfaces between a module and a memory bank. Each memory bank includes an arbiter that interfaces between the at least one agent of each module and the memory bank. The multiplexor is configured to assign data paths between the at least one agent of each module and a corresponding arbiter of each memory bank based on the assigned data path. The at least one agent of each module is configured to read data from the corresponding arbiter of the memory bank or write modified data to the corresponding arbiter of the memory bank.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Allada, Veerendra, Benjegerdes, Troy; Bode, Brett
Commodity clusters augmented with application accelerators are evolving as competitive high performance computing systems. The Graphical Processing Unit (GPU) with a very high arithmetic density and performance per price ratio is a good platform for the scientific application acceleration. In addition to the interconnect bottlenecks among the cluster compute nodes, the cost of memory copies between the host and the GPU device have to be carefully amortized to improve the overall efficiency of the application. Scientific applications also rely on efficient implementation of the BAsic Linear Algebra Subroutines (BLAS), among which the General Matrix Multiply (GEMM) is considered as themore » workhorse subroutine. In this paper, they study the performance of the memory copies and GEMM subroutines that are critical to port the computational chemistry algorithms to the GPU clusters. To that end, a benchmark based on the NetPIPE framework is developed to evaluate the latency and bandwidth of the memory copies between the host and the GPU device. The performance of the single and double precision GEMM subroutines from the NVIDIA CUBLAS 2.0 library are studied. The results have been compared with that of the BLAS routines from the Intel Math Kernel Library (MKL) to understand the computational trade-offs. The test bed is a Intel Xeon cluster equipped with NVIDIA Tesla GPUs.« less
SG-ADVISER CNV: copy-number variant annotation and interpretation.
Erikson, Galina A; Deshpande, Neha; Kesavan, Balachandar G; Torkamani, Ali
2015-09-01
Copy-number variants have been associated with a variety of diseases, especially cancer, autism, schizophrenia, and developmental delay. The majority of clinically relevant events occur de novo, necessitating the interpretation of novel events. In this light, we present the Scripps Genome ADVISER CNV annotation pipeline and Web server, which aims to fill the gap between copy number variant detection and interpretation by performing in-depth annotations and functional predictions for copy number variants. The Scripps Genome ADVISER CNV suite includes a Web server interface to a high-performance computing environment for calculations of annotations and a table-based user interface that allows for the execution of numerous annotation-based variant filtration strategies and statistics. The annotation results include details regarding location, impact on the coding portion of genes, allele frequency information (including allele frequencies from the Scripps Wellderly cohort), and overlap information with other reference data sets (including ClinVar, DGV, DECIPHER). A summary variant classification is produced (ADVISER score) based on the American College of Medical Genetics and Genomics scoring guidelines. We demonstrate >90% sensitivity/specificity for detection of pathogenic events. Scripps Genome ADVISER CNV is designed to allow users with no prior bioinformatics expertise to manipulate large volumes of copy-number variant data. Scripps Genome ADVISER CNV is available at http://genomics.scripps.edu/ADVISER/.
NASA Astrophysics Data System (ADS)
Wang, Chenjie; Huo, Zongliang; Liu, Ziyu; Liu, Yu; Cui, Yanxiang; Wang, Yumei; Li, Fanghua; Liu, Ming
2013-07-01
The effects of interfacial fluorination on the metal/Al2O3/HfO2/SiO2/Si (MAHOS) memory structure have been investigated. By comparing MAHOS memories with and without interfacial fluorination, it was identified that the deterioration of the performance and reliability of MAHOS memories is mainly due to the formation of an interfacial layer that generates excess oxygen vacancies at the interface. Interfacial fluorination suppresses the growth of the interfacial layer, which is confirmed by X-ray photoelectron spectroscopy depth profile analysis, increases enhanced program/erase efficiency, and improves data retention characteristics. Moreover, it was observed that fluorination at the SiO-HfO interface achieves a more effective performance enhancement than that at the HfO-AlO interface.
Nanoscale content-addressable memory
NASA Technical Reports Server (NTRS)
Davis, Bryan (Inventor); Principe, Jose C. (Inventor); Fortes, Jose (Inventor)
2009-01-01
A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value.
Effects of Crowding Combined with Mood on Working Memory Performance among College Students
ERIC Educational Resources Information Center
Daniel, Lisa
2012-01-01
This study investigated the effects of crowding combined with mood on working memory performance among college students. [The dissertation citations contained here are published with the permission of ProQuest LLC. Further reproduction is prohibited without permission. Copies of dissertations may be obtained by Telephone (800) 1-800-521-0600. Web…
ERIC Educational Resources Information Center
Mo, Jianhong; McBride, Catherine; Yip, Laiying
2018-01-01
We sought to test a componential model of Chinese written spelling, including the role of orthographic working memory (OWM), among Hong Kong kindergartners. One hundred seventeen kindergartners were recruited. OWM was measured using a visual orthographic judgment and a delayed copying task. Orthographic knowledge, semantic knowledge, and…
Compiler analysis for irregular problems in FORTRAN D
NASA Technical Reports Server (NTRS)
Vonhanxleden, Reinhard; Kennedy, Ken; Koelbel, Charles; Das, Raja; Saltz, Joel
1992-01-01
We developed a dataflow framework which provides a basis for rigorously defining strategies to make use of runtime preprocessing methods for distributed memory multiprocessors. In many programs, several loops access the same off-processor memory locations. Our runtime support gives us a mechanism for tracking and reusing copies of off-processor data. A key aspect of our compiler analysis strategy is to determine when it is safe to reuse copies of off-processor data. Another crucial function of the compiler analysis is to identify situations which allow runtime preprocessing overheads to be amortized. This dataflow analysis will make it possible to effectively use the results of interprocedural analysis in our efforts to reduce interprocessor communication and the need for runtime preprocessing.
Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface
2016-03-17
Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface Austin H. Roach, Matthew J. Gadlage, James D. Ingalls, Aaron...reliability and trust of memories is very important, but because of incomplete documentation provided by commercial vendors and a lack of low-level...shown here that useful information about the trust and reliability of COTS NAND Flash components can be obtained by going beyond the standard product
Abzug, Mark J; Qin, Min; Levin, Myron J; Fenton, Terence; Beeler, Judy A; Bellini, William J; Audet, Susette; Sowers, Sun Bae; Borkowsky, William; Nachman, Sharon A; Pelton, Stephen I; Rosenblatt, Howard M
2012-08-15
Response rates and immunologic memory following measles vaccination are reduced in human immunodeficiency virus (HIV)-infected children in the absence of highly active antiretroviral therapy (HAART). HIV-infected children 2 to <19 years old receiving HAART and with HIV loads <30,000 copies/mL, CD4% ≥15, and ≥1 prior measles-mumps-rubella vaccination (MMR) were given another MMR. Measles antibody concentrations before and 8, 32, and 80 weeks postvaccination were determined by plaque reduction neutralization (PRN). A subset was given another MMR 4-5 years later, and PRN antibody was measured before and 7 and 28 days later. At entry, 52% of 193 subjects were seroprotected (PRN ≥120 mIU/mL). Seroprotection increased to 89% 8 weeks postvaccination, and remained at 80% 80 weeks postvaccination. Of 65 subjects revaccinated 4-5 years later, 85% demonstrated memory based on seroprotection before or 7 days after vaccination. HIV load ≤400 copies/mL at initial study vaccination was associated with higher seroprotection rates, greater antibody concentrations, and memory. Grade 3 fever or fatigue occurred in 2% of subjects. Measles revaccination induced high rates of seroprotection and memory in children receiving HAART. Both endpoints were associated with HIV viral load suppression. NCT00013871 (www.clinicaltrials.gov).
Experimental entanglement of 25 individually accessible atomic quantum interfaces.
Pu, Yunfei; Wu, Yukai; Jiang, Nan; Chang, Wei; Li, Chang; Zhang, Sheng; Duan, Luming
2018-04-01
A quantum interface links the stationary qubits in a quantum memory with flying photonic qubits in optical transmission channels and constitutes a critical element for the future quantum internet. Entanglement of quantum interfaces is an important step for the realization of quantum networks. Through heralded detection of photon interference, we generate multipartite entanglement between 25 (or 9) individually addressable quantum interfaces in a multiplexed atomic quantum memory array and confirm genuine 22-partite (or 9-partite) entanglement. This experimental entanglement of a record-high number of individually addressable quantum interfaces makes an important step toward the realization of quantum networks, long-distance quantum communication, and multipartite quantum information processing.
Hardware enabled performance counters with support for operating system context switching
Salapura, Valentina; Wisniewski, Robert W.
2015-06-30
A device for supporting hardware enabled performance counters with support for context switching include a plurality of performance counters operable to collect information associated with one or more computer system related activities, a first register operable to store a memory address, a second register operable to store a mode indication, and a state machine operable to read the second register and cause the plurality of performance counters to copy the information to memory area indicated by the memory address based on the mode indication.
Large Scale Analysis of Geospatial Data with Dask and XArray
NASA Astrophysics Data System (ADS)
Zender, C. S.; Hamman, J.; Abernathey, R.; Evans, K. J.; Rocklin, M.; Zender, C. S.; Rocklin, M.
2017-12-01
The analysis of geospatial data with high level languages has acceleratedinnovation and the impact of existing data resources. However, as datasetsgrow beyond single-machine memory, data structures within these high levellanguages can become a bottleneck. New libraries like Dask and XArray resolve some of these scalability issues,providing interactive workflows that are both familiar tohigh-level-language researchers while also scaling out to much largerdatasets. This broadens the access of researchers to larger datasets on highperformance computers and, through interactive development, reducestime-to-insight when compared to traditional parallel programming techniques(MPI). This talk describes Dask, a distributed dynamic task scheduler, Dask.array, amulti-dimensional array that copies the popular NumPy interface, and XArray,a library that wraps NumPy/Dask.array with labeled and indexes axes,implementing the CF conventions. We discuss both the basic design of theselibraries and how they change interactive analysis of geospatial data, and alsorecent benefits and challenges of distributed computing on clusters ofmachines.
NASA Astrophysics Data System (ADS)
Cheng, Yunfei; Wang, Wu
2017-10-01
In this work, the photoresponse and photo-induced memory effect were demonstrated in an organic field-effect transistor (OFET) with semiconductor pentacene and SiO2 as the active and gate dielectric layers, respectively. By inserting AlOX nanoparticles (NPs) at the interface of pentacene/SiO2, obvious enhancing photoresponse was obtained in the OFET with the maximum responsivity and photosensitivity of about 15 A/W and 100, respectively. Moreover, the stable photoinduced memory effect was achieved in the OFET, attributing to the photogenerated electrons captured by the interface traps of the AlOX NPs/SiO2.
Reconfigurable Electronics and Non-Volatile Memory Research
2015-11-10
Kirtland AFB, NM 87117-5776 2 cys Official Record Copy AFRL /RVSE/Arthur Edwards 1 cy... AFRL -RV-PS- AFRL -RV-PS- TR-2015-0151 TR-2015-0151 RECONFIGURABLE ELECTRONICS AND NON- VOLATILE MEMORY RESEARCH Kristy A. Campbell Boise State... KIRTLAND AIR FORCE BASE, NM 87117-5776 NOTICE AND SIGNATURE PAGE Using Government drawings, specifications, or other data included in this document for
Sherman, Bonnie J; Savage, Cary R; Eddy, Kamryn T; Blais, Mark A; Deckersbach, Thilo; Jackson, Safia C; Franko, Debra L; Rauch, Scott L; Herzog, David B
2006-09-01
There is growing interest in the relationship between anorexia nervosa (AN) and obsessive-compulsive (OC) spectrum disorders (e.g., OCD, body dysmorphic disorder [BDD]). Previous neuropsychological investigations of OC spectrum disorders have identified problems with the efficient use of strategy on complex measures of learning and memory. This study evaluated nonverbal strategic memory in AN outpatients using an approach previously applied to OC spectrum disorders. Eighteen patients with AN and 19 healthy control participants completed the Rey-Osterrieth Complex Figure Test (RCFT), a widely used measure of nonverbal strategic planning, learning, and memory. Individuals with AN differed significantly from healthy controls in the organizational strategies used to copy the RCFT figure, and they recalled significantly less information on both immediate and delayed testing. Multiple regression analyses indicated that group differences in learning were mediated by copy organizational strategies. These results are identical to study findings in OCD and BDD, indicating important shared neuropsychological features among AN and these OC spectrum disorders. As in OCD and BDD, the essential cognitive deficit in AN was impaired use of organizational strategies, which may inform our understanding of the pathophysiology of AN and potentially offer treatment implications. Copyright (c) 2006 by Wiley Periodicals, Inc.
NASA Astrophysics Data System (ADS)
Liu, L.; Xu, J. P.; Ji, F.; Chen, J. X.; Lai, P. T.
2012-07-01
Charge-trapping memory capacitor with nitrided gadolinium oxide (GdO) as charge storage layer (CSL) is fabricated, and the influence of post-deposition annealing in NH3 on its memory characteristics is investigated. Transmission electron microscopy, x-ray photoelectron spectroscopy, and x-ray diffraction are used to analyze the cross-section and interface quality, composition, and crystallinity of the stack gate dielectric, respectively. It is found that nitrogen incorporation can improve the memory window and achieve a good trade-off among the memory properties due to NH3-annealing-induced reasonable distribution profile of a large quantity of deep-level bulk traps created in the nitrided GdO film and reduction of shallow traps near the CSL/SiO2 interface.
Bekele, Yonas; Graham, Rebecka Lantto; Soeria-Atmadja, Sandra; Nasi, Aikaterini; Zazzi, Maurizio; Vicenti, Ilaria; Naver, Lars; Nilsson, Anna; Chiodi, Francesca
2017-01-01
During anti-retroviral therapy (ART) HIV-1 persists in cellular reservoirs, mostly represented by CD4+ memory T cells. Several approaches are currently being undertaken to develop a cure for HIV-1 infection through elimination (or reduction) of these reservoirs. Few studies have so far been conducted to assess the possibility of reducing the size of HIV-1 reservoirs through vaccination in virologically controlled HIV-1-infected children. We recently conducted a vaccination study with a combined hepatitis A virus (HAV) and hepatitis B virus (HBV) vaccine in 22 HIV-1-infected children. We assessed the size of the virus reservoir, measured as total HIV-1 DNA copies in blood cells, pre- and postvaccination. In addition, we investigated by immunostaining whether the frequencies of CD4+ and CD8+ T cells and parameters of immune activation and proliferation on these cells were modulated by vaccination. At 1 month from the last vaccination dose, we found that 20 out of 22 children mounted a serological response to HBV; a majority of children had antibodies against HAV at baseline. The number of HIV-1 DNA copies in blood at 1 month postvaccination was reduced in comparison to baseline although this reduction was not statistically significant. A significant reduction of HIV-1 DNA copies in blood following vaccination was found in 12 children. The frequencies of CD4+ (naïve, effector memory) and CD8+ (central memory) T-cell subpopulations changed following vaccinations and a reduction in the activation and proliferation pattern of these cells was also noticed. Multivariate linear regression analysis revealed that the frequency of CD8+ effector memory T cells prior to vaccination was strongly predictive of the reduction of HIV-1 DNA copies in blood following vaccination of the 22 HIV-1-infected children. The results of this study suggest a beneficial effect of vaccination to reduce the size of virus reservoir in HIV-1-infected children receiving ART. A reduced frequency of activated CD4+ cells and an increase in central memory CD8+ T cells were associated with this finding. Further studies should assess whether vaccination is a possible tool to reduce HIV-1 reservoirs.
Bekele, Yonas; Graham, Rebecka Lantto; Soeria-Atmadja, Sandra; Nasi, Aikaterini; Zazzi, Maurizio; Vicenti, Ilaria; Naver, Lars; Nilsson, Anna; Chiodi, Francesca
2018-01-01
During anti-retroviral therapy (ART) HIV-1 persists in cellular reservoirs, mostly represented by CD4+ memory T cells. Several approaches are currently being undertaken to develop a cure for HIV-1 infection through elimination (or reduction) of these reservoirs. Few studies have so far been conducted to assess the possibility of reducing the size of HIV-1 reservoirs through vaccination in virologically controlled HIV-1-infected children. We recently conducted a vaccination study with a combined hepatitis A virus (HAV) and hepatitis B virus (HBV) vaccine in 22 HIV-1-infected children. We assessed the size of the virus reservoir, measured as total HIV-1 DNA copies in blood cells, pre- and postvaccination. In addition, we investigated by immunostaining whether the frequencies of CD4+ and CD8+ T cells and parameters of immune activation and proliferation on these cells were modulated by vaccination. At 1 month from the last vaccination dose, we found that 20 out of 22 children mounted a serological response to HBV; a majority of children had antibodies against HAV at baseline. The number of HIV-1 DNA copies in blood at 1 month postvaccination was reduced in comparison to baseline although this reduction was not statistically significant. A significant reduction of HIV-1 DNA copies in blood following vaccination was found in 12 children. The frequencies of CD4+ (naïve, effector memory) and CD8+ (central memory) T-cell subpopulations changed following vaccinations and a reduction in the activation and proliferation pattern of these cells was also noticed. Multivariate linear regression analysis revealed that the frequency of CD8+ effector memory T cells prior to vaccination was strongly predictive of the reduction of HIV-1 DNA copies in blood following vaccination of the 22 HIV-1-infected children. The results of this study suggest a beneficial effect of vaccination to reduce the size of virus reservoir in HIV-1-infected children receiving ART. A reduced frequency of activated CD4+ cells and an increase in central memory CD8+ T cells were associated with this finding. Further studies should assess whether vaccination is a possible tool to reduce HIV-1 reservoirs. PMID:29375579
Experimental entanglement of 25 individually accessible atomic quantum interfaces
Jiang, Nan; Chang, Wei; Li, Chang; Zhang, Sheng
2018-01-01
A quantum interface links the stationary qubits in a quantum memory with flying photonic qubits in optical transmission channels and constitutes a critical element for the future quantum internet. Entanglement of quantum interfaces is an important step for the realization of quantum networks. Through heralded detection of photon interference, we generate multipartite entanglement between 25 (or 9) individually addressable quantum interfaces in a multiplexed atomic quantum memory array and confirm genuine 22-partite (or 9-partite) entanglement. This experimental entanglement of a record-high number of individually addressable quantum interfaces makes an important step toward the realization of quantum networks, long-distance quantum communication, and multipartite quantum information processing. PMID:29725621
Broadband multiresonator quantum memory-interface.
Moiseev, S A; Gerasimov, K I; Latypov, R R; Perminov, N S; Petrovnin, K V; Sherstyukov, O N
2018-03-05
In this paper we experimentally demonstrated a broadband scheme of the multiresonator quantum memory-interface. The microwave photonic scheme consists of the system of mini-resonators strongly interacting with a common broadband resonator coupled with the external waveguide. We have implemented the impedance matched quantum storage in this scheme via controllable tuning of the mini-resonator frequencies and coupling of the common resonator with the external waveguide. Proof-of-principal experiment has been demonstrated for broadband microwave pulses when the quantum efficiency of 16.3% was achieved at room temperature. By using the obtained experimental spectroscopic data, the dynamics of the signal retrieval has been simulated and promising results were found for high-Q mini-resonators in microwave and optical frequency ranges. The results pave the way for the experimental implementation of broadband quantum memory-interface with quite high efficiency η > 0.99 on the basis of modern technologies, including optical quantum memory at room temperature.
Dumping Low and High Resolution Graphics on the Apple IIe Microcomputer System.
ERIC Educational Resources Information Center
Fletcher, Richard K., Jr.; Ruckman, Frank, Jr.
This paper discusses and outlines procedures for obtaining a hard copy of the graphic output of a microcomputer or "dumping a graphic" using the Apple Dot Matrix Printer with the Apple Parallel Interface Card, and the Imagewriter Printer with the Apple Super Serial Interface Card. Hardware configurations and instructions for high…
Figure 1 from Integrative Genomics Viewer: Visualizing Big Data | Office of Cancer Genomics
A screenshot of the IGV user interface at the chromosome view. IGV user interface showing five data types (copy number, methylation, gene expression, and loss of heterozygosity; mutations are overlaid with black boxes) from approximately 80 glioblastoma multiforme samples. Adapted from Figure S1; Robinson et al. 2011
Composing only by thought: Novel application of the P300 brain-computer interface.
Pinegger, Andreas; Hiebel, Hannah; Wriessnegger, Selina C; Müller-Putz, Gernot R
2017-01-01
The P300 event-related potential is a well-known pattern in the electroencephalogram (EEG). This kind of brain signal is used for many different brain-computer interface (BCI) applications, e.g., spellers, environmental controllers, web browsers, or for painting. In recent times, BCI systems are mature enough to leave the laboratories to be used by the end-users, namely severely disabled people. Therefore, new challenges arise and the systems should be implemented and evaluated according to user-centered design (USD) guidelines. We developed and implemented a new system that utilizes the P300 pattern to compose music. Our Brain Composing system consists of three parts: the EEG acquisition device, the P300-based BCI, and the music composing software. Seventeen musical participants and one professional composer performed a copy-spelling, a copy-composing, and a free-composing task with the system. According to the USD guidelines, we investigated the efficiency, the effectiveness and subjective criteria in terms of satisfaction, enjoyment, frustration, and attractiveness. The musical participants group achieved high average accuracies: 88.24% (copy-spelling), 88.58% (copy-composing), and 76.51% (free-composing). The professional composer achieved also high accuracies: 100% (copy-spelling), 93.62% (copy-composing), and 98.20% (free-composing). General results regarding the subjective criteria evaluation were that the participants enjoyed the usage of the Brain Composing system and were highly satisfied with the system. Showing very positive results with healthy people in this study, this was the first step towards a music composing system for severely disabled people.
Composing only by thought: Novel application of the P300 brain-computer interface
Hiebel, Hannah; Wriessnegger, Selina C.; Müller-Putz, Gernot R.
2017-01-01
The P300 event-related potential is a well-known pattern in the electroencephalogram (EEG). This kind of brain signal is used for many different brain-computer interface (BCI) applications, e.g., spellers, environmental controllers, web browsers, or for painting. In recent times, BCI systems are mature enough to leave the laboratories to be used by the end-users, namely severely disabled people. Therefore, new challenges arise and the systems should be implemented and evaluated according to user-centered design (USD) guidelines. We developed and implemented a new system that utilizes the P300 pattern to compose music. Our Brain Composing system consists of three parts: the EEG acquisition device, the P300-based BCI, and the music composing software. Seventeen musical participants and one professional composer performed a copy-spelling, a copy-composing, and a free-composing task with the system. According to the USD guidelines, we investigated the efficiency, the effectiveness and subjective criteria in terms of satisfaction, enjoyment, frustration, and attractiveness. The musical participants group achieved high average accuracies: 88.24% (copy-spelling), 88.58% (copy-composing), and 76.51% (free-composing). The professional composer achieved also high accuracies: 100% (copy-spelling), 93.62% (copy-composing), and 98.20% (free-composing). General results regarding the subjective criteria evaluation were that the participants enjoyed the usage of the Brain Composing system and were highly satisfied with the system. Showing very positive results with healthy people in this study, this was the first step towards a music composing system for severely disabled people. PMID:28877175
SODR Memory Control Buffer Control ASIC
NASA Technical Reports Server (NTRS)
Hodson, Robert F.
1994-01-01
The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.
NASA Technical Reports Server (NTRS)
De Luca, Gianluca; De Luca, Carlo J.; Bergman, Per
2004-01-01
A portable electronic apparatus records electromyographic (EMG) signals in as many as 16 channels at a sampling rate of 1,024 Hz in each channel. The apparatus (see figure) includes 16 differential EMG electrodes (each electrode corresponding to one channel) with cables and attachment hardware, reference electrodes, an input/output-and-power-adapter unit, a 16-bit analog-to-digital converter, and a hand-held computer that contains a removable 256-MB flash memory card. When all 16 EMG electrodes are in use, full-bandwidth data can be recorded in each channel for as long as 8 hours. The apparatus is powered by a battery and is small enough that it can be carried in a waist pouch. The computer is equipped with a small screen that can be used to display the incoming signals on each channel. Amplitude and time adjustments of this display can be made easily by use of touch buttons on the screen. The user can also set up a data-acquisition schedule to conform to experimental protocols or to manage battery energy and memory efficiently. Once the EMG data have been recorded, the flash memory card is removed from the EMG apparatus and placed in a flash-memory- card-reading external drive unit connected to a personal computer (PC). The PC can then read the data recorded in the 16 channels. Preferably, before further analysis, the data should be stored in the hard drive of the PC. The data files are opened and viewed on the PC by use of special- purpose software. The software for operation of the apparatus resides in a random-access memory (RAM), with backup power supplied by a small internal lithium cell. A backup copy of this software resides on the flash memory card. In the event of loss of both main and backup battery power and consequent loss of this software, the backup copy can be used to restore the RAM copy after power has been restored. Accessories for this device are also available. These include goniometers, accelerometers, foot switches, and force gauges.
Performance of FORTRAN floating-point operations on the Flex/32 multicomputer
NASA Technical Reports Server (NTRS)
Crockett, Thomas W.
1987-01-01
A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory.
Conditions Database for the Belle II Experiment
NASA Astrophysics Data System (ADS)
Wood, L.; Elsethagen, T.; Schram, M.; Stephan, E.
2017-10-01
The Belle II experiment at KEK is preparing for first collisions in 2017. Processing the large amounts of data that will be produced will require conditions data to be readily available to systems worldwide in a fast and efficient manner that is straightforward for both the user and maintainer. The Belle II conditions database was designed with a straightforward goal: make it as easily maintainable as possible. To this end, HEP-specific software tools were avoided as much as possible and industry standard tools used instead. HTTP REST services were selected as the application interface, which provide a high-level interface to users through the use of standard libraries such as curl. The application interface itself is written in Java and runs in an embedded Payara-Micro Java EE application server. Scalability at the application interface is provided by use of Hazelcast, an open source In-Memory Data Grid (IMDG) providing distributed in-memory computing and supporting the creation and clustering of new application interface instances as demand increases. The IMDG provides fast and efficient access to conditions data via in-memory caching.
LAVA: Large scale Automated Vulnerability Addition
2016-05-23
memory copy, e.g., are reasonable attack points. If the goal is to inject divide- by-zero, then arithmetic operations involving division will be...ways. First, it introduces deterministic record and replay , which can be used for iterated and expensive analyses that cannot be performed online... memory . Since our approach records the correspondence between source lines and program basic block execution, it would be just as easy to figure out
Statistical Computations Underlying the Dynamics of Memory Updating
Gershman, Samuel J.; Radulescu, Angela; Norman, Kenneth A.; Niv, Yael
2014-01-01
Psychophysical and neurophysiological studies have suggested that memory is not simply a carbon copy of our experience: Memories are modified or new memories are formed depending on the dynamic structure of our experience, and specifically, on how gradually or abruptly the world changes. We present a statistical theory of memory formation in a dynamic environment, based on a nonparametric generalization of the switching Kalman filter. We show that this theory can qualitatively account for several psychophysical and neural phenomena, and present results of a new visual memory experiment aimed at testing the theory directly. Our experimental findings suggest that humans can use temporal discontinuities in the structure of the environment to determine when to form new memory traces. The statistical perspective we offer provides a coherent account of the conditions under which new experience is integrated into an old memory versus forming a new memory, and shows that memory formation depends on inferences about the underlying structure of our experience. PMID:25375816
Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.
Kim, Seung-Yoon; Park, Jong Kyung; Hwang, Wan Sik; Lee, Seung-Jun; Lee, Ki-Hong; Pyi, Seung Ho; Cho, Byung Jin
2016-05-01
We investigated the dependence of grain size on the performance of a polycrystalline silicon (poly-Si) channel TFT for application to 3D NAND Flash memory devices. It has been found that the device performance and memory characteristics are strongly affected by the grain size of the poly-Si channel. Higher on-state current, faster program speed, and poor endurance/reliability properties are observed when the poly-Si grain size is large. These are mainly attributed to the different local electric field induced by an oxide valley at the interface between the poly-Si channel and the gate oxide. In addition, the trap density at the gate oxide interface was successfully measured using a charge pumping method by the separation between the gate oxide interface traps and traps at the grain boundaries in the poly-Si channel. The poly-Si channel with larger grain size has lower interface trap density.
Tian, Long; Xu, Zhongxiao; Chen, Lirong; Ge, Wei; Yuan, Haoxiang; Wen, Yafei; Wang, Shengzhi; Li, Shujing; Wang, Hai
2017-09-29
The light-matter quantum interface that can create quantum correlations or entanglement between a photon and one atomic collective excitation is a fundamental building block for a quantum repeater. The intrinsic limit is that the probability of preparing such nonclassical atom-photon correlations has to be kept low in order to suppress multiexcitation. To enhance this probability without introducing multiexcitation errors, a promising scheme is to apply multimode memories to the interface. Significant progress has been made in temporal, spectral, and spatial multiplexing memories, but the enhanced probability for generating the entangled atom-photon pair has not been experimentally realized. Here, by using six spin-wave-photon entanglement sources, a switching network, and feedforward control, we build a multiplexed light-matter interface and then demonstrate a ∼sixfold (∼fourfold) probability increase in generating entangled atom-photon (photon-photon) pairs. The measured compositive Bell parameter for the multiplexed interface is 2.49±0.03 combined with a memory lifetime of up to ∼51 μs.
Bridging FPGA and GPU technologies for AO real-time control
NASA Astrophysics Data System (ADS)
Perret, Denis; Lainé, Maxime; Bernard, Julien; Gratadour, Damien; Sevin, Arnaud
2016-07-01
Our team has developed a common environment for high performance simulations and real-time control of AO systems based on the use of Graphics Processors Units in the context of the COMPASS project. Such a solution, based on the ability of the real time core in the simulation to provide adequate computing performance, limits the cost of developing AO RTC systems and makes them more scalable. A code developed and validated in the context of the simulation may be injected directly into the system and tested on sky. Furthermore, the use of relatively low cost components also offers significant advantages for the system hardware platform. However, the use of GPUs in an AO loop comes with drawbacks: the traditional way of offloading computation from CPU to GPUs - involving multiple copies and unacceptable overhead in kernel launching - is not well suited in a real time context. This last application requires the implementation of a solution enabling direct memory access (DMA) to the GPU memory from a third party device, bypassing the operating system. This allows this device to communicate directly with the real-time core of the simulation feeding it with the WFS camera pixel stream. We show that DMA between a custom FPGA-based frame-grabber and a computation unit (GPU, FPGA, or Coprocessor such as Xeon-phi) across PCIe allows us to get latencies compatible with what will be needed on ELTs. As a fine-grained synchronization mechanism is not yet made available by GPU vendors, we propose the use of memory polling to avoid interrupts handling and involvement of a CPU. Network and Vision protocols are handled by the FPGA-based Network Interface Card (NIC). We present the results we obtained on a complete AO loop using camera and deformable mirror simulators.
GASPRNG: GPU accelerated scalable parallel random number generator library
NASA Astrophysics Data System (ADS)
Gao, Shuang; Peterson, Gregory D.
2013-04-01
Graphics processors represent a promising technology for accelerating computational science applications. Many computational science applications require fast and scalable random number generation with good statistical properties, so they use the Scalable Parallel Random Number Generators library (SPRNG). We present the GPU Accelerated SPRNG library (GASPRNG) to accelerate SPRNG in GPU-based high performance computing systems. GASPRNG includes code for a host CPU and CUDA code for execution on NVIDIA graphics processing units (GPUs) along with a programming interface to support various usage models for pseudorandom numbers and computational science applications executing on the CPU, GPU, or both. This paper describes the implementation approach used to produce high performance and also describes how to use the programming interface. The programming interface allows a user to be able to use GASPRNG the same way as SPRNG on traditional serial or parallel computers as well as to develop tightly coupled programs executing primarily on the GPU. We also describe how to install GASPRNG and use it. To help illustrate linking with GASPRNG, various demonstration codes are included for the different usage models. GASPRNG on a single GPU shows up to 280x speedup over SPRNG on a single CPU core and is able to scale for larger systems in the same manner as SPRNG. Because GASPRNG generates identical streams of pseudorandom numbers as SPRNG, users can be confident about the quality of GASPRNG for scalable computational science applications. Catalogue identifier: AEOI_v1_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AEOI_v1_0.html Program obtainable from: CPC Program Library, Queen’s University, Belfast, N. Ireland Licensing provisions: UTK license. No. of lines in distributed program, including test data, etc.: 167900 No. of bytes in distributed program, including test data, etc.: 1422058 Distribution format: tar.gz Programming language: C and CUDA. Computer: Any PC or workstation with NVIDIA GPU (Tested on Fermi GTX480, Tesla C1060, Tesla M2070). Operating system: Linux with CUDA version 4.0 or later. Should also run on MacOS, Windows, or UNIX. Has the code been vectorized or parallelized?: Yes. Parallelized using MPI directives. RAM: 512 MB˜ 732 MB (main memory on host CPU, depending on the data type of random numbers.) / 512 MB (GPU global memory) Classification: 4.13, 6.5. Nature of problem: Many computational science applications are able to consume large numbers of random numbers. For example, Monte Carlo simulations are able to consume limitless random numbers for the computation as long as resources for the computing are supported. Moreover, parallel computational science applications require independent streams of random numbers to attain statistically significant results. The SPRNG library provides this capability, but at a significant computational cost. The GASPRNG library presented here accelerates the generators of independent streams of random numbers using graphical processing units (GPUs). Solution method: Multiple copies of random number generators in GPUs allow a computational science application to consume large numbers of random numbers from independent, parallel streams. GASPRNG is a random number generators library to allow a computational science application to employ multiple copies of random number generators to boost performance. Users can interface GASPRNG with software code executing on microprocessors and/or GPUs. Running time: The tests provided take a few minutes to run.
Interface Message Processors for the ARPA Computer Network
1976-07-01
and then clear the location) as its primitive locking facility (i.e., as the necessary multiprocessor lock equivalent to Dijkstra semaphores )[37]. To...of the extra storage required for the redundant copies. There is the problem of maintaining synchronization of multiple copy data bases in the presence...through any of the data base sites. I Update synchronization . Races between conflicting, "concurrent" update requests are resolved in a manner that j
A Design Methodology for Switched-Capacitor DC-DC Converters
2009-05-21
phase piezoelectric energy harvesters ,” IEEE International Solid-State Circuits Conference, pp. 302–303, Feb. 2008. [20] P. Hazucha, G. Schrom, J. Hahn...2007. [42] Y. K. Ramadass and A. P. Chandrakasan, “An efficient piezoelectric energy- harvesting interface circuit using a bias-flip rectifier and...made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to
Abzug, Mark J.; Qin, Min; Levin, Myron J.; Fenton, Terence; Beeler, Judy A.; Bellini, William J.; Audet, Susette; Sowers, Sun Bae; Borkowsky, William; Nachman, Sharon A.; Pelton, Stephen I.; Rosenblatt, Howard M.
2012-01-01
Background. Response rates and immunologic memory following measles vaccination are reduced in human immunodeficiency virus (HIV)–infected children in the absence of highly active antiretroviral therapy (HAART). Methods. HIV-infected children 2 to <19 years old receiving HAART and with HIV loads <30 000 copies/mL, CD4% ≥15, and ≥1 prior measles-mumps-rubella vaccination (MMR) were given another MMR. Measles antibody concentrations before and 8, 32, and 80 weeks postvaccination were determined by plaque reduction neutralization (PRN). A subset was given another MMR 4–5 years later, and PRN antibody was measured before and 7 and 28 days later. Results. At entry, 52% of 193 subjects were seroprotected (PRN ≥120 mIU/mL). Seroprotection increased to 89% 8 weeks postvaccination, and remained at 80% 80 weeks postvaccination. Of 65 subjects revaccinated 4–5 years later, 85% demonstrated memory based on seroprotection before or 7 days after vaccination. HIV load ≤400 copies/mL at initial study vaccination was associated with higher seroprotection rates, greater antibody concentrations, and memory. Grade 3 fever or fatigue occurred in 2% of subjects. Conclusions. Measles revaccination induced high rates of seroprotection and memory in children receiving HAART. Both endpoints were associated with HIV viral load suppression. Clinical Trials Registration: NCT00013871 (www.clinicaltrials.gov). PMID:22693229
Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft
NASA Technical Reports Server (NTRS)
Barry, R. C.
1980-01-01
Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.
NASA Astrophysics Data System (ADS)
Yamaguchi, Yuichiro; Shouji, Masatsugu; Suda, Yoshiyuki
2012-11-01
We have investigated the dependence of the oxide layer structure of our previously proposed metal/SiO2/SiOx/3C-SiC/n-Si/metal metal-insulator-semiconductor (MIS) resistive memory device on the memory operation characteristics. The current-voltage (I-V) measurement and X-ray photoemission spectroscopy results suggest that SiOx defect states mainly caused by the oxidation of 3C-SiC at temperatures below 1000 °C are related to the hysteresis memory behavior in the I-V curve. By restricting the SiOx interface region, the number of switching cycles and the on/off current ratio are more enhanced. Compared with a memory device formed by one-step or two-step oxidation of 3C-SiC, a memory device formed by one-step oxidation of Si/3C-SiC exhibits a more restrictive SiOx interface with a more definitive SiO2 layer and higher memory performances for both the endurance switching cycle and on/off current ratio.
Toward High-Performance Communications Interfaces for Science Problem Solving
ERIC Educational Resources Information Center
Oviatt, Sharon L.; Cohen, Adrienne O.
2010-01-01
From a theoretical viewpoint, educational interfaces that facilitate communicative actions involving representations central to a domain can maximize students' effort associated with constructing new schemas. In addition, interfaces that minimize working memory demands due to the interface per se, for example by mimicking existing non-digital work…
Survey State of the Art: Electrical Load Management Techniques and Equipment.
1986-10-31
automobiles and even appliances. Applications in the area of demand and energy management have been multifaceted, given the needs involved and rapid paybacks...copy of the programming to be reloaded into the controller at any time and by designing this module with erasable and reprogrammable memory, the...points and performs DDC programming is stored in (direct digital control) of output reprogrammable , permanent memory points. A RIM may accommodate up
When Memories Disappear | Alzheimer's disease | NIH MedlinePlus the Magazine
... even before being diagnosed. And she had no intention of sitting still for it. For most of ... many challenges of AD. For copies of this book, contact the Alzheimer's Disease Education and Referral (ADEAR) ...
Hardware support for software controlled fast multiplexing of performance counters
Salapura, Valentina; Wisniewski, Robert W
2013-10-01
Performance counters may be operable to collect one or more counts of one or more selected activities, and registers may be operable to store a set of performance counter configurations. A state machine may be operable to automatically select a register from the registers for reconfiguring the one or more performance counters in response to receiving a first signal. The state machine may be further operable to reconfigure the one or more performance counters based on a configuration specified in the selected register. The state machine yet further may be operable to copy data in selected one or more of the performance counters to a memory location, or to copy data from the memory location to the counters, in response to receiving a second signal. The state machine may be operable to store or restore the counter values and state machine configuration in response to a context switch event.
Hardware support for software controlled fast multiplexing of performance counters
Salapura, Valentina; Wisniewski, Robert W.
2013-01-01
Performance counters may be operable to collect one or more counts of one or more selected activities, and registers may be operable to store a set of performance counter configurations. A state machine may be operable to automatically select a register from the registers for reconfiguring the one or more performance counters in response to receiving a first signal. The state machine may be further operable to reconfigure the one or more performance counters based on a configuration specified in the selected register. The state machine yet further may be operable to copy data in selected one or more of the performance counters to a memory location, or to copy data from the memory location to the counters, in response to receiving a second signal. The state machine may be operable to store or restore the counter values and state machine configuration in response to a context switch event.
CMOS Camera Array With Onboard Memory
NASA Technical Reports Server (NTRS)
Gat, Nahum
2009-01-01
A compact CMOS (complementary metal oxide semiconductor) camera system has been developed with high resolution (1.3 Megapixels), a USB (universal serial bus) 2.0 interface, and an onboard memory. Exposure times, and other operating parameters, are sent from a control PC via the USB port. Data from the camera can be received via the USB port and the interface allows for simple control and data capture through a laptop computer.
Use of general purpose graphics processing units with MODFLOW
Hughes, Joseph D.; White, Jeremy T.
2013-01-01
To evaluate the use of general-purpose graphics processing units (GPGPUs) to improve the performance of MODFLOW, an unstructured preconditioned conjugate gradient (UPCG) solver has been developed. The UPCG solver uses a compressed sparse row storage scheme and includes Jacobi, zero fill-in incomplete, and modified-incomplete lower-upper (LU) factorization, and generalized least-squares polynomial preconditioners. The UPCG solver also includes options for sequential and parallel solution on the central processing unit (CPU) using OpenMP. For simulations utilizing the GPGPU, all basic linear algebra operations are performed on the GPGPU; memory copies between the central processing unit CPU and GPCPU occur prior to the first iteration of the UPCG solver and after satisfying head and flow criteria or exceeding a maximum number of iterations. The efficiency of the UPCG solver for GPGPU and CPU solutions is benchmarked using simulations of a synthetic, heterogeneous unconfined aquifer with tens of thousands to millions of active grid cells. Testing indicates GPGPU speedups on the order of 2 to 8, relative to the standard MODFLOW preconditioned conjugate gradient (PCG) solver, can be achieved when (1) memory copies between the CPU and GPGPU are optimized, (2) the percentage of time performing memory copies between the CPU and GPGPU is small relative to the calculation time, (3) high-performance GPGPU cards are utilized, and (4) CPU-GPGPU combinations are used to execute sequential operations that are difficult to parallelize. Furthermore, UPCG solver testing indicates GPGPU speedups exceed parallel CPU speedups achieved using OpenMP on multicore CPUs for preconditioners that can be easily parallelized.
Data communications in a parallel active messaging interface of a parallel computer
Blocksome, Michael A.; Ratterman, Joseph D.; Smith, Brian E.
2014-09-02
Eager send data communications in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI composed of data communications endpoints that specify a client, a context, and a task, including receiving an eager send data communications instruction with transfer data disposed in a send buffer characterized by a read/write send buffer memory address in a read/write virtual address space of the origin endpoint; determining for the send buffer a read-only send buffer memory address in a read-only virtual address space, the read-only virtual address space shared by both the origin endpoint and the target endpoint, with all frames of physical memory mapped to pages of virtual memory in the read-only virtual address space; and communicating by the origin endpoint to the target endpoint an eager send message header that includes the read-only send buffer memory address.
Data communications in a parallel active messaging interface of a parallel computer
Blocksome, Michael A.; Ratterman, Joseph D.; Smith, Brian E.
2014-09-16
Eager send data communications in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI composed of data communications endpoints that specify a client, a context, and a task, including receiving an eager send data communications instruction with transfer data disposed in a send buffer characterized by a read/write send buffer memory address in a read/write virtual address space of the origin endpoint; determining for the send buffer a read-only send buffer memory address in a read-only virtual address space, the read-only virtual address space shared by both the origin endpoint and the target endpoint, with all frames of physical memory mapped to pages of virtual memory in the read-only virtual address space; and communicating by the origin endpoint to the target endpoint an eager send message header that includes the read-only send buffer memory address.
Implementing a bubble memory hierarchy system
NASA Technical Reports Server (NTRS)
Segura, R.; Nichols, C. D.
1979-01-01
This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.
Runtime and Architecture Support for Efficient Data Exchange in Multi-Accelerator Applications.
Cabezas, Javier; Gelado, Isaac; Stone, John E; Navarro, Nacho; Kirk, David B; Hwu, Wen-Mei
2015-05-01
Heterogeneous parallel computing applications often process large data sets that require multiple GPUs to jointly meet their needs for physical memory capacity and compute throughput. However, the lack of high-level abstractions in previous heterogeneous parallel programming models force programmers to resort to multiple code versions, complex data copy steps and synchronization schemes when exchanging data between multiple GPU devices, which results in high software development cost, poor maintainability, and even poor performance. This paper describes the HPE runtime system, and the associated architecture support, which enables a simple, efficient programming interface for exchanging data between multiple GPUs through either interconnects or cross-node network interfaces. The runtime and architecture support presented in this paper can also be used to support other types of accelerators. We show that the simplified programming interface reduces programming complexity. The research presented in this paper started in 2009. It has been implemented and tested extensively in several generations of HPE runtime systems as well as adopted into the NVIDIA GPU hardware and drivers for CUDA 4.0 and beyond since 2011. The availability of real hardware that support key HPE features gives rise to a rare opportunity for studying the effectiveness of the hardware support by running important benchmarks on real runtime and hardware. Experimental results show that in a exemplar heterogeneous system, peer DMA and double-buffering, pinned buffers, and software techniques can improve the inter-accelerator data communication bandwidth by 2×. They can also improve the execution speed by 1.6× for a 3D finite difference, 2.5× for 1D FFT, and 1.6× for merge sort, all measured on real hardware. The proposed architecture support enables the HPE runtime to transparently deploy these optimizations under simple portable user code, allowing system designers to freely employ devices of different capabilities. We further argue that simple interfaces such as HPE are needed for most applications to benefit from advanced hardware features in practice.
Runtime and Architecture Support for Efficient Data Exchange in Multi-Accelerator Applications
Cabezas, Javier; Gelado, Isaac; Stone, John E.; Navarro, Nacho; Kirk, David B.; Hwu, Wen-mei
2014-01-01
Heterogeneous parallel computing applications often process large data sets that require multiple GPUs to jointly meet their needs for physical memory capacity and compute throughput. However, the lack of high-level abstractions in previous heterogeneous parallel programming models force programmers to resort to multiple code versions, complex data copy steps and synchronization schemes when exchanging data between multiple GPU devices, which results in high software development cost, poor maintainability, and even poor performance. This paper describes the HPE runtime system, and the associated architecture support, which enables a simple, efficient programming interface for exchanging data between multiple GPUs through either interconnects or cross-node network interfaces. The runtime and architecture support presented in this paper can also be used to support other types of accelerators. We show that the simplified programming interface reduces programming complexity. The research presented in this paper started in 2009. It has been implemented and tested extensively in several generations of HPE runtime systems as well as adopted into the NVIDIA GPU hardware and drivers for CUDA 4.0 and beyond since 2011. The availability of real hardware that support key HPE features gives rise to a rare opportunity for studying the effectiveness of the hardware support by running important benchmarks on real runtime and hardware. Experimental results show that in a exemplar heterogeneous system, peer DMA and double-buffering, pinned buffers, and software techniques can improve the inter-accelerator data communication bandwidth by 2×. They can also improve the execution speed by 1.6× for a 3D finite difference, 2.5× for 1D FFT, and 1.6× for merge sort, all measured on real hardware. The proposed architecture support enables the HPE runtime to transparently deploy these optimizations under simple portable user code, allowing system designers to freely employ devices of different capabilities. We further argue that simple interfaces such as HPE are needed for most applications to benefit from advanced hardware features in practice. PMID:26180487
DOE Office of Scientific and Technical Information (OSTI.GOV)
Feo, J.T.
1993-10-01
This report contain papers on: Programmability and performance issues; The case of an iterative partial differential equation solver; Implementing the kernal of the Australian Region Weather Prediction Model in Sisal; Even and quarter-even prime length symmetric FFTs and their Sisal Implementations; Top-down thread generation for Sisal; Overlapping communications and computations on NUMA architechtures; Compiling technique based on dataflow analysis for funtional programming language Valid; Copy elimination for true multidimensional arrays in Sisal 2.0; Increasing parallelism for an optimization that reduces copying in IF2 graphs; Caching in on Sisal; Cache performance of Sisal Vs. FORTRAN; FFT algorithms on a shared-memory multiprocessor;more » A parallel implementation of nonnumeric search problems in Sisal; Computer vision algorithms in Sisal; Compilation of Sisal for a high-performance data driven vector processor; Sisal on distributed memory machines; A virtual shared addressing system for distributed memory Sisal; Developing a high-performance FFT algorithm in Sisal for a vector supercomputer; Implementation issues for IF2 on a static data-flow architechture; and Systematic control of parallelism in array-based data-flow computation. Selected papers have been indexed separately for inclusion in the Energy Science and Technology Database.« less
Interfacial interactions and their impact on redox-based resistive switching memories (ReRAMs)
NASA Astrophysics Data System (ADS)
Valov, Ilia
2017-09-01
Redox-based resistive switching memories are nowadays one of the most studied systems in both academia and industrial communities. These devices are scalable down to an almost atomic level and are supposed to be applicable not only for next-generation nonvolatile memories, but also for neuromorphic computing, alternative logic operations and selector devices. The main characteristic feature of these cells is their nano- to sub-nano dimension. This makes the control and especially prediction of their properties very challenging. One of the ways to achieve better understanding and to improve the control of these systems is to study and modify their interfaces. In this review, first the fundamentals will be discussed, as these are essential for understanding which factors control the nanoscale interface properties. Further, different types of interactions at the electrode/solid electrolyte interface reported for ECM- and VCM-type cells will be exemplarily shown. Finally, the strategies and different solutions used to modify the interfaces and overcome the existing problems on the way to more stable and reliable devices will be highlighted.
Memory interface simulator: A computer design aid
NASA Technical Reports Server (NTRS)
Taylor, D. S.; Williams, T.; Weatherbee, J. E.
1972-01-01
Results are presented of a study conducted with a digital simulation model being used in the design of the Automatically Reconfigurable Modular Multiprocessor System (ARMMS), a candidate computer system for future manned and unmanned space missions. The model simulates the activity involved as instructions are fetched from random access memory for execution in one of the system central processing units. A series of model runs measured instruction execution time under various assumptions pertaining to the CPU's and the interface between the CPU's and RAM. Design tradeoffs are presented in the following areas: Bus widths, CPU microprogram read only memory cycle time, multiple instruction fetch, and instruction mix.
Multiprocessor shared-memory information exchange
DOE Office of Scientific and Technical Information (OSTI.GOV)
Santoline, L.L.; Bowers, M.D.; Crew, A.W.
1989-02-01
In distributed microprocessor-based instrumentation and control systems, the inter-and intra-subsystem communication requirements ultimately form the basis for the overall system architecture. This paper describes a software protocol which addresses the intra-subsystem communications problem. Specifically the protocol allows for multiple processors to exchange information via a shared-memory interface. The authors primary goal is to provide a reliable means for information to be exchanged between central application processor boards (masters) and dedicated function processor boards (slaves) in a single computer chassis. The resultant Multiprocessor Shared-Memory Information Exchange (MSMIE) protocol, a standard master-slave shared-memory interface suitable for use in nuclear safety systems, ismore » designed to pass unidirectional buffers of information between the processors while providing a minimum, deterministic cycle time for this data exchange.« less
Image reproduction with interactive graphics
NASA Technical Reports Server (NTRS)
Buckner, J. D.; Council, H. W.; Edwards, T. R.
1974-01-01
Software application or development in optical image digital data processing requires a fast, good quality, yet inexpensive hard copy of processed images. To achieve this, a Cambo camera with an f 2.8/150-mm Xenotar lens in a Copal shutter having a Graflok back for 4 x 5 Polaroid type 57 pack-film has been interfaced to an existing Adage, AGT-30/Electro-Mechanical Research, EMR 6050 graphic computer system. Time-lapse photography in conjunction with a log to linear voltage transformation has resulted in an interactive system capable of producing a hard copy in 54 sec. The interactive aspect of the system lies in a Tektronix 4002 graphic computer terminal and its associated hard copy unit.
Cognitive profile of patients with rotated drawing at copy or recall: a controlled group study.
Molteni, Federica; Traficante, Debora; Ferri, Francesca; Isella, Valeria
2014-03-01
When copying or recalling a figure from memory, some patient with dementia or focal brain lesions may rotate the drawing through ±90° or 180°. We have tried to clarify the nature of this phenomenon by investigating the cognitive profile of 22 patients who rotated the copy of the Rey-Osterrieth Complex Figure and 27 who rotated (only) the recall, and two control groups of cases with the same neuropsychiatric diagnoses, but no misorientation deficit. Brain MRI and FDG-PET images were also analysed. Predictor of rotation at the copy versus rotation at the recall was visuospatial impairment as measured by the copy of the Rey Figure; predictors of rotation at the copy versus no rotation were, again, visuospatial deficits, in addition to an abnormal performance at the task of selective attention. No specific profile of cognitive impairment distinguished patients with and without rotation at the recall. Disproportionate temporo-parieto-occipital atrophy or hypometabolism were evident in cases with misorientation of the copy, while predominant frontal abnormalities were found in cases of rotated recall. Based on these findings, rotated drawing at the copy is interpreted as a dorsal visual stream deficit, whose occurrence is more probable when attentional control is impaired. Rotation at recall seems to have a distinct, more anterior, neural substrate, but its dysexecutive nature has yet to be demonstrated. Copyright © 2014 Elsevier Inc. All rights reserved.
Ware, Taylor; Simon, Dustin; Hearon, Keith; Liu, Clive; Shah, Sagar; Reeder, Jonathan; Khodaparast, Navid; Kilgard, Michael P; Maitland, Duncan J; Rennaker, Robert L; Voit, Walter E
2012-12-01
Planar electronics processing methods have enabled neural interfaces to become more precise and deliver more information. However, this processing paradigm is inherently 2D and rigid. The resulting mechanical and geometrical mismatch at the biotic-abiotic interface can elicit an immune response that prevents effective stimulation. In this work, a thiol-ene/acrylate shape memory polymer is utilized to create 3D softening substrates for stimulation electrodes. This substrate system is shown to soften in vivo from more than 600 to 6 MPa. A nerve cuff electrode that coils around the vagus nerve in a rat and that drives neural activity is demonstrated.
Multi-port, optically addressed RAM
NASA Technical Reports Server (NTRS)
Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)
1989-01-01
A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.
Computational Model-Based Prediction of Human Episodic Memory Performance Based on Eye Movements
NASA Astrophysics Data System (ADS)
Sato, Naoyuki; Yamaguchi, Yoko
Subjects' episodic memory performance is not simply reflected by eye movements. We use a ‘theta phase coding’ model of the hippocampus to predict subjects' memory performance from their eye movements. Results demonstrate the ability of the model to predict subjects' memory performance. These studies provide a novel approach to computational modeling in the human-machine interface.
Kacsoh, Balint Z; Greene, Casey S; Bosco, Giovanni
2017-11-06
High-throughput experiments are becoming increasingly common, and scientists must balance hypothesis-driven experiments with genome-wide data acquisition. We sought to predict novel genes involved in Drosophila learning and long-term memory from existing public high-throughput data. We performed an analysis using PILGRM, which analyzes public gene expression compendia using machine learning. We evaluated the top prediction alongside genes involved in learning and memory in IMP, an interface for functional relationship networks. We identified Grunge/Atrophin ( Gug/Atro ), a transcriptional repressor, histone deacetylase, as our top candidate. We find, through multiple, distinct assays, that Gug has an active role as a modulator of memory retention in the fly and its function is required in the adult mushroom body. Depletion of Gug specifically in neurons of the adult mushroom body, after cell division and neuronal development is complete, suggests that Gug function is important for memory retention through regulation of neuronal activity, and not by altering neurodevelopment. Our study provides a previously uncharacterized role for Gug as a possible regulator of neuronal plasticity at the interface of memory retention and memory extinction. Copyright © 2017 Kacsoh et al.
Emerging Depression Is Associated with Face Memory Deficits in Adolescent Girls
ERIC Educational Resources Information Center
Guyer, Amanda E.; Choate, Victoria R.; Grimm, Kevin J.; Pine, Daniel S.; Keenan, Kate
2011-01-01
Objective: To examine the association between memory for previously encoded emotional faces and depression symptoms assessed over 4 years in adolescent girls. Investigating the interface between memory deficits and depression in adolescent girls may provide clues about depression pathophysiology. Method: Participants were 213 girls recruited from…
Fast Initialization of Bubble-Memory Systems
NASA Technical Reports Server (NTRS)
Looney, K. T.; Nichols, C. D.; Hayes, P. J.
1986-01-01
Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.
Gupta, Varun K.; Pech, Ulrike; Fulterer, Andreas; Ender, Anatoli; Mauermann, Stephan F.; Andlauer, Till F. M.; Beuschel, Christine; Thriene, Kerstin; Quentin, Christine; Schwärzel, Martin; Mielke, Thorsten; Madeo, Frank; Dengjel, Joern; Fiala, André; Sigrist, Stephan J.
2016-01-01
Memories are assumed to be formed by sets of synapses changing their structural or functional performance. The efficacy of forming new memories declines with advancing age, but the synaptic changes underlying age-induced memory impairment remain poorly understood. Recently, we found spermidine feeding to specifically suppress age-dependent impairments in forming olfactory memories, providing a mean to search for synaptic changes involved in age-dependent memory impairment. Here, we show that a specific synaptic compartment, the presynaptic active zone (AZ), increases the size of its ultrastructural elaboration and releases significantly more synaptic vesicles with advancing age. These age-induced AZ changes, however, were fully suppressed by spermidine feeding. A genetically enforced enlargement of AZ scaffolds (four gene-copies of BRP) impaired memory formation in young animals. Thus, in the Drosophila nervous system, aging AZs seem to steer towards the upper limit of their operational range, limiting synaptic plasticity and contributing to impairment of memory formation. Spermidine feeding suppresses age-dependent memory impairment by counteracting these age-dependent changes directly at the synapse. PMID:27684064
Brain computer interface to enhance episodic memory in human participants
Burke, John F.; Merkow, Maxwell B.; Jacobs, Joshua; Kahana, Michael J.
2015-01-01
Recent research has revealed that neural oscillations in the theta (4–8 Hz) and alpha (9–14 Hz) bands are predictive of future success in memory encoding. Because these signals occur before the presentation of an upcoming stimulus, they are considered stimulus-independent in that they correlate with enhanced memory encoding independent of the item being encoded. Thus, such stimulus-independent activity has important implications for the neural mechanisms underlying episodic memory as well as the development of cognitive neural prosthetics. Here, we developed a brain computer interface (BCI) to test the ability of such pre-stimulus activity to modulate subsequent memory encoding. We recorded intracranial electroencephalography (iEEG) in neurosurgical patients as they performed a free recall memory task, and detected iEEG theta and alpha oscillations that correlated with optimal memory encoding. We then used these detected oscillatory changes to trigger the presentation of items in the free recall task. We found that item presentation contingent upon the presence of pre-stimulus theta and alpha oscillations modulated memory performance in more sessions than expected by chance. Our results suggest that an electrophysiological signal may be causally linked to a specific behavioral condition, and contingent stimulus presentation has the potential to modulate human memory encoding. PMID:25653605
32 CFR 701.54 - Collection of fees and fee rates for technical data.
Code of Federal Regulations, 2014 CFR
2014-07-01
...) Computer search is based on the total cost of the central processing unit, input-output devices, and memory... charge for office copy up to six images)—$3.50 Each additional image—$ .10 Each typewritten page—$3.50...
32 CFR 701.54 - Collection of fees and fee rates for technical data.
Code of Federal Regulations, 2010 CFR
2010-07-01
...) Computer search is based on the total cost of the central processing unit, input-output devices, and memory... charge for office copy up to six images)—$3.50 Each additional image—$ .10 Each typewritten page—$3.50...
Migration of interfacial oxygen ions modulated resistive switching in oxide-based memory devices
NASA Astrophysics Data System (ADS)
Chen, C.; Gao, S.; Zeng, F.; Tang, G. S.; Li, S. Z.; Song, C.; Fu, H. D.; Pan, F.
2013-07-01
Oxides-based resistive switching memory induced by oxygen ions migration is attractive for future nonvolatile memories. Numerous works had focused their attentions on the sandwiched oxide materials for depressing the characteristic variations, but the comprehensive studies of the dependence of electrodes on the migration behavior of oxygen ions are overshadowed. Here, we investigated the interaction of various metals (Ni, Co, Al, Ti, Zr, and Hf) with oxygen atoms at the metal/Ta2O5 interface under electric stress and explored the effect of top electrode on the characteristic variations of Ta2O5-based memory device. It is demonstrated that chemically inert electrodes (Ni and Co) lead to the scattering switching characteristics and destructive gas bubbles, while the highly chemically active metals (Hf and Zr) formed a thick and dense interfacial intermediate oxide layer at the metal/Ta2O5 interface, which also degraded the resistive switching behavior. The relatively chemically active metals (Al and Ti) can absorb oxygen ions from the Ta2O5 film and avoid forming the problematic interfacial layer, which is benefit to the formation of oxygen vacancies composed conduction filaments in Ta2O5 film thus exhibit the minimum variations of switching characteristics. The clarification of oxygen ions migration behavior at the interface can lead further optimization of resistive switching performance in Ta2O5-based memory device and guide the rule of electrode selection for other oxide-based resistive switching memories.
General purpose programmable accelerator board
Robertson, Perry J.; Witzke, Edward L.
2001-01-01
A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.
Extended memory management under RTOS
NASA Technical Reports Server (NTRS)
Plummer, M.
1981-01-01
A technique for extended memory management in ROLM 1666 computers using FORTRAN is presented. A general software system is described for which the technique can be ideally applied. The memory manager interface with the system is described. The protocols by which the manager is invoked are presented, as well as the methods used by the manager.
Knowledge representation and user interface concepts to support mixed-initiative diagnosis
NASA Technical Reports Server (NTRS)
Sobelman, Beverly H.; Holtzblatt, Lester J.
1989-01-01
The Remote Maintenance Monitoring System (RMMS) provides automated support for the maintenance and repair of ModComp computer systems used in the Launch Processing System (LPS) at Kennedy Space Center. RMMS supports manual and automated diagnosis of intermittent hardware failures, providing an efficient means for accessing and analyzing the data generated by catastrophic failure recovery procedures. This paper describes the design and functionality of the user interface for interactive analysis of memory dump data, relating it to the underlying declarative representation of memory dumps.
Interfacing laboratory instruments to multiuser, virtual memory computers
NASA Technical Reports Server (NTRS)
Generazio, Edward R.; Stang, David B.; Roth, Don J.
1989-01-01
Incentives, problems and solutions associated with interfacing laboratory equipment with multiuser, virtual memory computers are presented. The major difficulty concerns how to utilize these computers effectively in a medium sized research group. This entails optimization of hardware interconnections and software to facilitate multiple instrument control, data acquisition and processing. The architecture of the system that was devised, and associated programming and subroutines are described. An example program involving computer controlled hardware for ultrasonic scan imaging is provided to illustrate the operational features.
Memory-built-in quantum cloning in a hybrid solid-state spin register
NASA Astrophysics Data System (ADS)
Wang, W.-B.; Zu, C.; He, L.; Zhang, W.-G.; Duan, L.-M.
2015-07-01
As a way to circumvent the quantum no-cloning theorem, approximate quantum cloning protocols have received wide attention with remarkable applications. Copying of quantum states to memory qubits provides an important strategy for eavesdropping in quantum cryptography. We report an experiment that realizes cloning of quantum states from an electron spin to a nuclear spin in a hybrid solid-state spin register with near-optimal fidelity. The nuclear spin provides an ideal memory qubit at room temperature, which stores the cloned quantum states for a millisecond under ambient conditions, exceeding the lifetime of the original quantum state carried by the electron spin by orders of magnitude. The realization of a cloning machine with built-in quantum memory provides a key step for application of quantum cloning in quantum information science.
Memory-built-in quantum cloning in a hybrid solid-state spin register.
Wang, W-B; Zu, C; He, L; Zhang, W-G; Duan, L-M
2015-07-16
As a way to circumvent the quantum no-cloning theorem, approximate quantum cloning protocols have received wide attention with remarkable applications. Copying of quantum states to memory qubits provides an important strategy for eavesdropping in quantum cryptography. We report an experiment that realizes cloning of quantum states from an electron spin to a nuclear spin in a hybrid solid-state spin register with near-optimal fidelity. The nuclear spin provides an ideal memory qubit at room temperature, which stores the cloned quantum states for a millisecond under ambient conditions, exceeding the lifetime of the original quantum state carried by the electron spin by orders of magnitude. The realization of a cloning machine with built-in quantum memory provides a key step for application of quantum cloning in quantum information science.
A waveguide frequency converter connecting rubidium-based quantum memories to the telecom C-band.
Albrecht, Boris; Farrera, Pau; Fernandez-Gonzalvo, Xavier; Cristiani, Matteo; de Riedmatten, Hugues
2014-02-27
Coherently converting the frequency and temporal waveform of single and entangled photons will be crucial to interconnect the various elements of future quantum information networks. Of particular importance is the quantum frequency conversion of photons emitted by material systems able to store quantum information, so-called quantum memories. There have been significant efforts to implement quantum frequency conversion using nonlinear crystals, with non-classical light from broadband photon-pair sources and solid-state emitters. However, solid state quantum frequency conversion has not yet been achieved with long-lived optical quantum memories. Here we demonstrate an ultra-low-noise solid state photonic quantum interface suitable for connecting quantum memories based on atomic ensembles to the telecommunication fibre network. The interface is based on an integrated-waveguide nonlinear device. We convert heralded single photons at 780 nm from a rubidium-based quantum memory to the telecommunication wavelength of 1,552 nm, showing significant non-classical correlations between the converted photon and the heralding signal.
Ávila, Rafaela T; de Paula, Jonas J; Bicalho, Maria A; Moraes, Edgar N; Nicolato, Rodrigo; Malloy-Diniz, Leandro F; Diniz, Breno S
2015-05-01
Previous studies suggest that executive functions influence the performance on visuoconstructional tasks. This study aims to investigate whether the relationship between planning ability and the copy of complex figures is mediated by distinct components of executive functions (i.e., working memory, inhibitory control and cognitive flexibility). We included a 129 older adults with Alzheimer's disease (n=36, AD), mild cognitive impairment (MCI, n=67), and with no evidence of cognitive impairment (controls, n=26). We evaluated the mediation effect of planning abilities, working memory, cognitive flexibility and inhibitory control on visuoconstructional tasks using a multiple mediation models. We found a significant direct effect of planning on visuoconstructional abilities and a partial mediation effect of working memory and cognitive flexibility on visuoconstructional abilities. The present results indicate that the performance on visuoconstructional task is mediated by multiple interrelated executive functions components, in particular working memory and cognitive flexibility.
Internode data communications in a parallel computer
Archer, Charles J.; Blocksome, Michael A.; Miller, Douglas R.; Parker, Jeffrey J.; Ratterman, Joseph D.; Smith, Brian E.
2013-09-03
Internode data communications in a parallel computer that includes compute nodes that each include main memory and a messaging unit, the messaging unit including computer memory and coupling compute nodes for data communications, in which, for each compute node at compute node boot time: a messaging unit allocates, in the messaging unit's computer memory, a predefined number of message buffers, each message buffer associated with a process to be initialized on the compute node; receives, prior to initialization of a particular process on the compute node, a data communications message intended for the particular process; and stores the data communications message in the message buffer associated with the particular process. Upon initialization of the particular process, the process establishes a messaging buffer in main memory of the compute node and copies the data communications message from the message buffer of the messaging unit into the message buffer of main memory.
Internode data communications in a parallel computer
Archer, Charles J; Blocksome, Michael A; Miller, Douglas R; Parker, Jeffrey J; Ratterman, Joseph D; Smith, Brian E
2014-02-11
Internode data communications in a parallel computer that includes compute nodes that each include main memory and a messaging unit, the messaging unit including computer memory and coupling compute nodes for data communications, in which, for each compute node at compute node boot time: a messaging unit allocates, in the messaging unit's computer memory, a predefined number of message buffers, each message buffer associated with a process to be initialized on the compute node; receives, prior to initialization of a particular process on the compute node, a data communications message intended for the particular process; and stores the data communications message in the message buffer associated with the particular process. Upon initialization of the particular process, the process establishes a messaging buffer in main memory of the compute node and copies the data communications message from the message buffer of the messaging unit into the message buffer of main memory.
Kixmiller, J S; Verfaellie, M M; Mather, M M; Cermak, L S
2000-04-01
To examine the contribution of visual-perceptual and visual-organizational factors to visual memory in amnesia, Korsakoff, medial temporal, and anterior communicating artery (ACoA) aneurysm amnesics' copy, organization, and recall performance on the Rey-Osterrieth Complex Figure was assessed. Korsakoff patients were matched to medial temporal patients in terms of severity of amnesia, while the ACoA group, which was less severely amnesic, was matched to the Korsakoff patients on performance on executive tasks. Results indicated that while both the ACoA and Korsakoff groups had poorer copy accuracy and organization than controls, only the Korsakoff patients' copy accuracy was worse than the other two amnesic groups. While the Korsakoff patient's visuoperceptual deficits could partially explain this group's poor performance at immediate recall, the Korsakoff group's comparatively worse performance at delayed recall could not be accounted for by poor copy accuracy, reduced visual organization, or even the combined influence of these two factors.
Scattering on plane waves and the double copy
NASA Astrophysics Data System (ADS)
Adamo, Tim; Casali, Eduardo; Mason, Lionel; Nekovar, Stefan
2018-01-01
Perturbatively around flat space, the scattering amplitudes of gravity are related to those of Yang–Mills by colour-kinematic duality, under which gravitational amplitudes are obtained as the ‘double copy’ of the corresponding gauge theory amplitudes. We consider the question of how to extend this relationship to curved scattering backgrounds, focusing on certain ‘sandwich’ plane waves. We calculate the 3-point amplitudes on these backgrounds and find that a notion of double copy remains in the presence of background curvature: graviton amplitudes on a gravitational plane wave are the double copy of gluon amplitudes on a gauge field plane wave. This is non-trivial in that it requires a non-local replacement rule for the background fields and the momenta and polarization vectors of the fields scattering on the backgrounds. It must also account for new ‘tail’ terms arising from scattering off the background. These encode a memory effect in the scattering amplitudes, which naturally double copies as well.
Toward High-Performance Communications Interfaces for Science Problem Solving
NASA Astrophysics Data System (ADS)
Oviatt, Sharon L.; Cohen, Adrienne O.
2010-12-01
From a theoretical viewpoint, educational interfaces that facilitate communicative actions involving representations central to a domain can maximize students' effort associated with constructing new schemas. In addition, interfaces that minimize working memory demands due to the interface per se, for example by mimicking existing non-digital work practice, can preserve students' attentional focus on their learning task. In this research, we asked the question: What type of interface input capabilities provide best support for science problem solving in both low- and high- performing students? High school students' ability to solve a diverse range of biology problems was compared over longitudinal sessions while they used: (1) hardcopy paper and pencil (2) a digital paper and pen interface (3) pen tablet interface, and (4) graphical tablet interface. Post-test evaluations revealed that time to solve problems, meta-cognitive control, solution correctness, and memory all were significantly enhanced when using the digital pen and paper interface, compared with tablet interfaces. The tangible pen and paper interface also was the only alternative that significantly facilitated skill acquisition in low-performing students. Paradoxically, all students nonetheless believed that the tablet interfaces provided best support for their performance, revealing a lack of self-awareness about how to use computational tools to best advantage. Implications are discussed for how pen interfaces can be optimized for future educational purposes, and for establishing technology fluency curricula to improve students' awareness of the impact of digital tools on their performance.
Lactuca capensis reverses memory deficits in Aβ1-42-induced an animal model of Alzheimer's disease.
Postu, Paula Alexandra; Noumedem, Jaures A K; Cioanca, Oana; Hancianu, Monica; Mihasan, Marius; Ciorpac, Mitica; Gorgan, Dragos Lucian; Petre, Brindusa Alina; Hritcu, Lucian
2018-01-01
We investigated the neuropharmacological effects of the methanolic extract from Lactuca capensis Thunb. leaves (100 and 200 mg/kg) for 21 days on memory impairment in an Alzheimer's disease (AD) rat model produced by direct intraventricular delivery of amyloid-β1-42 (Aβ1-42). Behavioural assays such as Y-maze and radial arm maze test were used for assessing memory performance. Aβ1-42 decreased cognitive performance in the behavioural tests which were ameliorated by pre-treatment with the methanolic extract. Acetylcholinesterase activity and oxidant-antioxidant balance in the rat hippocampus were abnormally altered by Aβ1-42 treatment while these deficits were recovered by pre-treatment with the methanolic extract. In addition, rats were given Aβ1-42 exhibited in the hippocampus decreased brain-derived neurotrophic factor (BDNF) mRNA copy number and increased IL-1β mRNA copy number which was reversed by the methanolic extract administration. These findings suggest that the methanolic extract could be a potent neuropharmacological agent against dementia via modulating cholinergic activity, increasing of BDNF levels and promoting antioxidant action in the rat hippocampus. © 2017 The Authors. Journal of Cellular and Molecular Medicine published by John Wiley & Sons Ltd and Foundation for Cellular and Molecular Medicine.
Quasi-light storage for optical data packets.
Schneider, Thomas; Preußler, Stefan
2014-02-06
Today's telecommunication is based on optical packets which transmit the information in optical fiber networks around the world. Currently, the processing of the signals is done in the electrical domain. Direct storage in the optical domain would avoid the transfer of the packets to the electrical and back to the optical domain in every network node and, therefore, increase the speed and possibly reduce the energy consumption of telecommunications. However, light consists of photons which propagate with the speed of light in vacuum. Thus, the storage of light is a big challenge. There exist some methods to slow down the speed of the light, or to store it in excitations of a medium. However, these methods cannot be used for the storage of optical data packets used in telecommunications networks. Here we show how the time-frequency-coherence, which holds for every signal and therefore for optical packets as well, can be exploited to build an optical memory. We will review the background and show in detail and through examples, how a frequency comb can be used for the copying of an optical packet which enters the memory. One of these time domain copies is then extracted from the memory by a time domain switch. We will show this method for intensity as well as for phase modulated signals.
Blocksome, Michael A.; Mamidala, Amith R.
2013-09-03
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Blocksome, Michael A; Mamidala, Amith R
2014-02-11
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Interface traps and quantum size effects on the retention time in nanoscale memory devices
2013-01-01
Based on the analysis of Poisson equation, an analytical surface potential model including interface charge density for nanocrystalline (NC) germanium (Ge) memory devices with p-type silicon substrate has been proposed. Thus, the effects of Pb defects at Si(110)/SiO2, Si(111)/SiO2, and Si(100)/SiO2 interfaces on the retention time have been calculated after quantum size effects have been considered. The results show that the interface trap density has a large effect on the electric field across the tunneling oxide layer and leakage current. This letter demonstrates that the retention time firstly increases with the decrease in diameter of NC Ge and then rapidly decreases with the diameter when it is a few nanometers. This implies that the interface defects, its energy distribution, and the NC size should be seriously considered in the aim to improve the retention time from different technological processes. The experimental data reported in the literature support the theoretical expectation. PMID:23984827
Wang, Xue-Feng; Tian, He; Zhao, Hai-Ming; Zhang, Tian-Yu; Mao, Wei-Quan; Qiao, Yan-Cong; Pang, Yu; Li, Yu-Xing; Yang, Yi; Ren, Tian-Ling
2018-01-01
Metal oxide-based resistive random access memory (RRAM) has attracted a lot of attention for its scalability, temperature robustness, and potential to achieve machine learning. However, a thick oxide layer results in relatively high program voltage while a thin one causes large leakage current and a small window. Owing to these fundamental limitations, by optimizing the oxide layer itself a novel interface engineering idea is proposed to reduce the programming voltage, increase the uniformity and on/off ratio. According to this idea, a molybdenum disulfide (MoS 2 )-palladium nanoparticles hybrid structure is used to engineer the oxide/electrode interface of hafnium oxide (HfO x )-based RRAM. Through its interface engineering, the set voltage can be greatly lowered (from -3.5 to -0.8 V) with better uniformity under a relatively thick HfO x layer (≈15 nm), and a 30 times improvement of the memory window can be obtained. Moreover, due to the atomic thickness of MoS 2 film and high transmittance of ITO, the proposed RRAM exhibits high transparency in visible light. As the proposed interface-engineering RRAM exhibits good transparency, low SET voltage, and a large resistive switching window, it has huge potential in data storage in transparent circuits and wearable electronics with relatively low supply voltage. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
pyCTQW: A continuous-time quantum walk simulator on distributed memory computers
NASA Astrophysics Data System (ADS)
Izaac, Josh A.; Wang, Jingbo B.
2015-01-01
In the general field of quantum information and computation, quantum walks are playing an increasingly important role in constructing physical models and quantum algorithms. We have recently developed a distributed memory software package pyCTQW, with an object-oriented Python interface, that allows efficient simulation of large multi-particle CTQW (continuous-time quantum walk)-based systems. In this paper, we present an introduction to the Python and Fortran interfaces of pyCTQW, discuss various numerical methods of calculating the matrix exponential, and demonstrate the performance behavior of pyCTQW on a distributed memory cluster. In particular, the Chebyshev and Krylov-subspace methods for calculating the quantum walk propagation are provided, as well as methods for visualization and data analysis.
Memory-Based Structured Application Specific Integrated Circuit (ASIC) Study
2008-10-01
memory interface, arbiter/ schedulers for rescheduling the memory requests according to some schedule policy, and memory channels for communicating...between the power-savings and the wakeup overhead with respect to both wakeup power and wakeup delay. For example, dream mode can save 50% more static...power than sleep mode, but at the expense of twice the wake delay and three times the wakeup energy. The user can specify power-gating modes for various components.
VOTable JAVA Streaming Writer and Applications.
NASA Astrophysics Data System (ADS)
Kulkarni, P.; Kembhavi, A.; Kale, S.
2004-07-01
Virtual Observatory related tools use a new standard for data transfer called the VOTable format. This is a variant of the xml format that enables easy transfer of data over the web. We describe a streaming interface that can bridge the VOTable format, through a user friendly graphical interface, with the FITS and ASCII formats, which are commonly used by astronomers. A streaming interface is important for efficient use of memory because of the large size of catalogues. The tools are developed in JAVA to provide a platform independent interface. We have also developed a stand-alone version that can be used to convert data stored in ASCII or FITS format on a local machine. The Streaming writer is successfully being used in VOPlot (See Kale et al 2004 for a description of VOPlot).We present the test results of converting huge FITS and ASCII data into the VOTable format on machines that have only limited memory.
NASA Astrophysics Data System (ADS)
Kim, Youngjun; Cho, Seongeun; Kim, Hyeran; Seo, Soonjoo; Lee, Hyun Uk; Lee, Jouhahn; Ko, Hyungduk; Chang, Mincheol; Park, Byoungnam
2017-09-01
Electric field-induced charge trapping and exciton dissociation were demonstrated at a penatcene/grapheme quantum dot (GQD) interface using a bottom contact bi-layer field effect transistor (FET) as an electrical nano-probe. Large threshold voltage shift in a pentacene/GQD FET in the dark arises from field-induced carrier trapping in the GQD layer or GQD-induced trap states at the pentacene/GQD interface. As the gate electric field increases, hysteresis characterized by the threshold voltage shift depending on the direction of the gate voltage scan becomes stronger due to carrier trapping associated with the presence of a GQD layer. Upon illumination, exciton dissociation and gate electric field-induced charge trapping simultaneously contribute to increase the threshold voltage window, which can potentially be exploited for photoelectric memory and/or photovoltaic devices through interface engineering.
ERIC Educational Resources Information Center
LaGuardia, Cheryl; Huber, Chuck
1992-01-01
Discusses proposals for more standardized practices in CD-ROM development, sales, and distribution. Topics discussed include availability of trial copies; pricing policies; installation, including software, instructions, and compatibility; interface procedures; manuals; and vendor support services. A sidebar discusses proposals being addressed by…
Performance analysis of replication ALOHA for fading mobile communications channels
NASA Technical Reports Server (NTRS)
Yan, Tsun-Yee; Clare, Loren P.
1986-01-01
This paper describes an ALOHA random access protocol for fading communications channels. A two-state Markov model is used for the channel error process to account for the channel fading memory. The ALOHA protocol is modified to send multiple contiguous copies of a message at each transmission attempt. Both pure and slotted ALOHA channels are considered. The analysis is applicable to fading environments where the channel memory is short compared to the propagation delay. It is shown that smaller delay may be achieved using replications and, in noisy conditions, can also improve throughput.
NASA Technical Reports Server (NTRS)
Denning, Peter J.
1988-01-01
The worm, Trojan horse, bacterium, and virus are destructive programs that attack information stored in a computer's memory. Virus programs, which propagate by incorporating copies of themselves into other programs, are a growing menace in the late-1980s world of unprotected, networked workstations and personal computers. Limited immunity is offered by memory protection hardware, digitally authenticated object programs,and antibody programs that kill specific viruses. Additional immunity can be gained from the practice of digital hygiene, primarily the refusal to use software from untrusted sources. Full immunity requires attention in a social dimension, the accountability of programmers.
Cross-cultural differences for three visual memory tasks in Brazilian children.
Santos, F H; Mello, C B; Bueno, O F A; Dellatolas, G
2005-10-01
Norms for three visual memory tasks, including Corsi's block tapping test and the BEM 144 complex figures and visual recognition, were developed for neuropsychological assessment in Brazilian children. The tasks were measured in 127 children ages 7 to 10 years from rural and urban areas of the States of São Paulo and Minas Gerais. Analysis indicated age-related but not sex-related differences. A cross-cultural effect was observed in relation to copying and recall of Complex pictures. Different performances between rural and urban children were noted.
Nonmonotonic Aging and Memory in a Frictional Interface
NASA Astrophysics Data System (ADS)
Dillavou, Sam; Rubinstein, Shmuel M.
2018-06-01
We measure the static frictional resistance and the real area of contact between two solid blocks subjected to a normal load. We show that following a two-step change in the normal load the system exhibits nonmonotonic aging and memory effects, two hallmarks of glassy dynamics. These dynamics are strongly influenced by the discrete geometry of the frictional interface, characterized by the attachment and detachment of unique microcontacts. The results are in good agreement with a theoretical model we propose that incorporates this geometry into the framework recently used to describe Kovacs-like relaxation in glasses as well as thermal disordered systems. These results indicate that a frictional interface is a glassy system and strengthen the notion that nonmonotonic relaxation behavior is generic in such systems.
Memory-built-in quantum cloning in a hybrid solid-state spin register
Wang, W.-B.; Zu, C.; He, L.; Zhang, W.-G.; Duan, L.-M.
2015-01-01
As a way to circumvent the quantum no-cloning theorem, approximate quantum cloning protocols have received wide attention with remarkable applications. Copying of quantum states to memory qubits provides an important strategy for eavesdropping in quantum cryptography. We report an experiment that realizes cloning of quantum states from an electron spin to a nuclear spin in a hybrid solid-state spin register with near-optimal fidelity. The nuclear spin provides an ideal memory qubit at room temperature, which stores the cloned quantum states for a millisecond under ambient conditions, exceeding the lifetime of the original quantum state carried by the electron spin by orders of magnitude. The realization of a cloning machine with built-in quantum memory provides a key step for application of quantum cloning in quantum information science. PMID:26178617
Virginia's New Hamster: A Thirteen States Mnemonic.
ERIC Educational Resources Information Center
Gallenstein, Nancy L.
2000-01-01
Provides an activity that enables students to learn and remember the names of the original thirteen states in the United States. Uses a humorous story that incorporates a mnemonic (a memory aid) strategy. Includes a copy of the story and a map of the original thirteen states in 1776. (CMK)
NASA Technical Reports Server (NTRS)
Thakoor, Sarita (Inventor)
1992-01-01
Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.
NASA Technical Reports Server (NTRS)
Thakoor, Sarita (Inventor)
1994-01-01
Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.
Microcontroller for automation application
NASA Technical Reports Server (NTRS)
Cooper, H. W.
1975-01-01
The description of a microcontroller currently being developed for automation application was given. It is basically an 8-bit microcomputer with a 40K byte random access memory/read only memory, and can control a maximum of 12 devices through standard 15-line interface ports.
Emmerdinger, Kathrin J.; Kuhbandner, Christof
2018-01-01
Numerous studies have shown that retrieving contents from memory in a test improves long-term retention for those contents, even when compared to restudying (i.e., the “testing effect”). The beneficial effect of retrieval practice has been demonstrated for many different types of memory representations; however, one particularly important memory system has not been addressed in previous testing effect research: autobiographical memory. The aim of the present study was to examine the effect of retrieving memories for personally experienced events on long-term memory for those events. In an initial elicitation session, participants described memories for personally experienced events in response to a variety of cue words. In a retrieval practice/restudy session the following day, they repeatedly practiced retrieval for half of their memories by recalling and writing down the previously described events; the other half of memories was restudied by rereading and copying the event descriptions. Long-term retention of all previously collected memories was assessed at two different retention intervals (2 weeks and 13 weeks). In the retrieval practice session, a hypermnesic effect emerged, with memory performance increasing across the practice cycles. Long-term memory performance significantly dropped from the 2-weeks to the 13-weeks retention interval, but no significant difference in memory performance was observed between previously repeatedly retrieved and previously repeatedly restudied memories. Thus, in autobiographical memory, retrieval practice seems to be no more beneficial for long-term retention than repeated re-exposure. PMID:29881365
Emmerdinger, Kathrin J; Kuhbandner, Christof
2018-01-01
Numerous studies have shown that retrieving contents from memory in a test improves long-term retention for those contents, even when compared to restudying (i.e., the "testing effect"). The beneficial effect of retrieval practice has been demonstrated for many different types of memory representations; however, one particularly important memory system has not been addressed in previous testing effect research: autobiographical memory. The aim of the present study was to examine the effect of retrieving memories for personally experienced events on long-term memory for those events. In an initial elicitation session, participants described memories for personally experienced events in response to a variety of cue words. In a retrieval practice/restudy session the following day, they repeatedly practiced retrieval for half of their memories by recalling and writing down the previously described events; the other half of memories was restudied by rereading and copying the event descriptions. Long-term retention of all previously collected memories was assessed at two different retention intervals (2 weeks and 13 weeks). In the retrieval practice session, a hypermnesic effect emerged, with memory performance increasing across the practice cycles. Long-term memory performance significantly dropped from the 2-weeks to the 13-weeks retention interval, but no significant difference in memory performance was observed between previously repeatedly retrieved and previously repeatedly restudied memories. Thus, in autobiographical memory, retrieval practice seems to be no more beneficial for long-term retention than repeated re-exposure.
Reversible Shape Memory Polymers and Composites: Synthesis, Modeling and Design
2013-03-01
Polymer; and (iii) Development of a Shape Memory Assisted Self - Healing Polymer. Page 3 of 19 Mather/FA9550-09-1-0195 IV(i) Modeling and Model...0195 IV(iii) Development of a Shape Memory Assisted Self - Healing Polymer Erika D. Rodriguez, X. Luo, and P.T. Mather, “Linear and Crosslinked...Poly (ε- Caprolactone) Polymers for Shape Memory Assisted Self - Healing (SMASH),” ACS Applied Materials and Interfaces 3 152-161 (2011). Self
Organization of the ER–Golgi interface for membrane traffic control
Brandizzi, Federica; Barlowe, Charles
2014-01-01
Coat protein complex I (COPI) and COPII are required for bidirectional membrane trafficking between the endoplasmic reticulum (ER) and the Golgi. While these core coat machineries and other transport factors are highly conserved across species, high-resolution imaging studies indicate that the organization of the ER–Golgi interface is varied in eukaryotic cells. Regulation of COPII assembly, in some cases to manage distinct cellular cargo, is emerging as one important component in determining this structure. Comparison of the ER–Golgi interface across different systems, particularly mammalian and plant cells, reveals fundamental elements and distinct organization of this interface. A better understanding of how these interfaces are regulated to meet varying cellular secretory demands should provide key insights into the mechanisms that control efficient trafficking of proteins and lipids through the secretory pathway. PMID:23698585
Computer Program Development Specification for Tactical Interface System.
1981-07-31
CNTL CNTL TO ONE VT~i.AE CR1 & TWELVE VT100 LCARD READER VIDEO TERMINALS, SIX LA12O) HARD- COPY TERMINALS, & VECTOR GRAPHICS RPO % TERMINAL 17%M DISK...this data into the TIS para - .. meter tables in the TISGBL common area. ICEHANDL will send test interface ICE to PSS in one of two modes: perio- dically...STOPCauss te TI sotwar toexit ,9.*9~ .r .~ * ~%.’h .9~ .. a .~ .. a. 1 , , p * % .’.-:. .m 7 P : SDSS-MMP-BI ." 31 July 1981 TCL commands authorized
Intelligent Multi-Media Integrated Interface Project
1990-06-01
RADC (COES) Griffiss AFB NY 13441-5700. This will assist us in main- taining a current mailing list. Do not return copies of this report unless...contractual obligations or notices on a specific document require that it be returned. INTELLIGENT MULTI-MEDIA INTEGRATED INTERFACE PROJECT J. G. Neal J. M...lure ag. A = W qMN 1. AGENCY USE ONLY AM BW 2. REPORT DATE R,,PE AND DATES COYERED June 1990 Final Oct 87 to Oct 89 4. TTLE AND SUIlllLE S. FUNDING
Interface Provides Standard-Bus Communication
NASA Technical Reports Server (NTRS)
Culliton, William G.
1995-01-01
Microprocessor-controlled interface (IEEE-488/LVABI) incorporates service-request and direct-memory-access features. Is circuit card enabling digital communication between system called "laser auto-covariance buffer interface" (LVABI) and compatible personal computer via general-purpose interface bus (GPIB) conforming to Institute for Electrical and Electronics Engineers (IEEE) Standard 488. Interface serves as second interface enabling first interface to exploit advantages of GPIB, via utility software written specifically for GPIB. Advantages include compatibility with multitasking and support of communication among multiple computers. Basic concept also applied in designing interfaces for circuits other than LVABI for unidirectional or bidirectional handling of parallel data up to 16 bits wide.
Centrally managed unified shared virtual address space
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wilkes, John
Systems, apparatuses, and methods for managing a unified shared virtual address space. A host may execute system software and manage a plurality of nodes coupled to the host. The host may send work tasks to the nodes, and for each node, the host may externally manage the node's view of the system's virtual address space. Each node may have a central processing unit (CPU) style memory management unit (MMU) with an internal translation lookaside buffer (TLB). In one embodiment, the host may be coupled to a given node via an input/output memory management unit (IOMMU) interface, where the IOMMU frontendmore » interface shares the TLB with the given node's MMU. In another embodiment, the host may control the given node's view of virtual address space via memory-mapped control registers.« less
MPEG-1 low-cost encoder solution
NASA Astrophysics Data System (ADS)
Grueger, Klaus; Schirrmeister, Frank; Filor, Lutz; von Reventlow, Christian; Schneider, Ulrich; Mueller, Gerriet; Sefzik, Nicolai; Fiedrich, Sven
1995-02-01
A solution for real-time compression of digital YCRCB video data to an MPEG-1 video data stream has been developed. As an additional option, motion JPEG and video telephone streams (H.261) can be generated. For MPEG-1, up to two bidirectional predicted images are supported. The required computational power for motion estimation and DCT/IDCT, memory size and memory bandwidth have been the main challenges. The design uses fast-page-mode memory accesses and requires only one single 80 ns EDO-DRAM with 256 X 16 organization for video encoding. This can be achieved only by using adequate access and coding strategies. The architecture consists of an input processing and filter unit, a memory interface, a motion estimation unit, a motion compensation unit, a DCT unit, a quantization control, a VLC unit and a bus interface. For using the available memory bandwidth by the processing tasks, a fixed schedule for memory accesses has been applied, that can be interrupted for asynchronous events. The motion estimation unit implements a highly sophisticated hierarchical search strategy based on block matching. The DCT unit uses a separated fast-DCT flowgraph realized by a switchable hardware unit for both DCT and IDCT operation. By appropriate multiplexing, only one multiplier is required for: DCT, quantization, inverse quantization, and IDCT. The VLC unit generates the video-stream up to the video sequence layer and is directly coupled with an intelligent bus-interface. Thus, the assembly of video, audio and system data can easily be performed by the host computer. Having a relatively low complexity and only small requirements for DRAM circuits, the developed solution can be applied to low-cost encoding products for consumer electronics.
de França, Danilo Gonzaga; Morais, Maria Helena; das Neves, Flávio D; Carreiro, Adriana Fonte; Barbosa, Gustavo As
The aim of this study was to evaluate the effectiveness of fabrication methods (computer-aided design/computer-aided manufacture [CAD/CAM], copy-milling, and conventional casting) in the fit accuracy of three-unit, screw-retained fixed dental prostheses. Sixteen three-unit implant-supported screw-retained frameworks were fabricated to fit an in vitro model. Eight frameworks were fabricated using the CAD/CAM system, four in zirconia and four in cobalt-chromium. Four zirconia frameworks were fabricated using the copy-milled system, and four were cast in cobalt-chromium using conventional casting with premachined abutments. The vertical and horizontal misfit at the implant-framework interface was measured using scanning electron microscopy at ×250. The results for vertical misfit were analyzed using Kruskal-Wallis and Mann-Whitney tests. The horizontal misfits were categorized as underextended, equally extended, or overextended. Statistical analysis established differences between groups according to the chi-square test (α = .05). The mean vertical misfit was 5.9 ± 3.6 μm for CAD/CAM-fabricated zirconia, 1.2 ± 2.2 μm for CAD/CAM-fabricated cobalt-chromium frameworks, 7.6 ± 9.2 μm for copy-milling-fabricated zirconia frameworks, and 11.8 (9.8) μm for conventionally fabricated frameworks. The Mann-Whitney test revealed significant differences between all but the zirconia-fabricated frameworks. A significant association was observed between the horizontal misfits and the fabrication method. The percentage of horizontal misfits that were underextended and overextended was higher in milled zirconia (83.3%), CAD/CAM cobaltchromium (66.7%), cast cobalt-chromium (58.3%), and CAD/CAM zirconia (33.3%) frameworks. CAD/CAM-fabricated frameworks exhibit better vertical misfit and low variability compared with copy-milled and conventionally fabricated frameworks. The percentage of interfaces equally extended was higher when CAD/CAM and zirconia were used.
Berkeley Lab - Materials Sciences Division
Chemical and Mechanical Properties of Surfaces, Interfaces and Nanostructures Inorganic-Organic (2016). top Inorganic-Organic Nanocomposites Program Leader: Ting Xu Co-PI's: A. Paul Alivisatos, Yi Liu , Miquel Salmeron, Lin-Wang Wang The organic/inorganic nanocomposite program aims to design and synthesize
1981-03-01
elements which fall outside the original box initiate new clusters. 65 ELL. CH ECK This routine provides the calculation which determines if a target...US Air Force Project Rand Report 3-152b-PR, March 197 88 INITIAL DISTRIBUTION LIST 1o. Copies 1. Defense Technical Information Center 2 Cameron
NASA Astrophysics Data System (ADS)
Zaghi, S.
2014-07-01
OFF, an open source (free software) code for performing fluid dynamics simulations, is presented. The aim of OFF is to solve, numerically, the unsteady (and steady) compressible Navier-Stokes equations of fluid dynamics by means of finite volume techniques: the research background is mainly focused on high-order (WENO) schemes for multi-fluids, multi-phase flows over complex geometries. To this purpose a highly modular, object-oriented application program interface (API) has been developed. In particular, the concepts of data encapsulation and inheritance available within Fortran language (from standard 2003) have been stressed in order to represent each fluid dynamics "entity" (e.g. the conservative variables of a finite volume, its geometry, etc…) by a single object so that a large variety of computational libraries can be easily (and efficiently) developed upon these objects. The main features of OFF can be summarized as follows: Programming LanguageOFF is written in standard (compliant) Fortran 2003; its design is highly modular in order to enhance simplicity of use and maintenance without compromising the efficiency; Parallel Frameworks Supported the development of OFF has been also targeted to maximize the computational efficiency: the code is designed to run on shared-memory multi-cores workstations and distributed-memory clusters of shared-memory nodes (supercomputers); the code's parallelization is based on Open Multiprocessing (OpenMP) and Message Passing Interface (MPI) paradigms; Usability, Maintenance and Enhancement in order to improve the usability, maintenance and enhancement of the code also the documentation has been carefully taken into account; the documentation is built upon comprehensive comments placed directly into the source files (no external documentation files needed): these comments are parsed by means of doxygen free software producing high quality html and latex documentation pages; the distributed versioning system referred as git has been adopted in order to facilitate the collaborative maintenance and improvement of the code; CopyrightsOFF is a free software that anyone can use, copy, distribute, study, change and improve under the GNU Public License version 3. The present paper is a manifesto of OFF code and presents the currently implemented features and ongoing developments. This work is focused on the computational techniques adopted and a detailed description of the main API characteristics is reported. OFF capabilities are demonstrated by means of one and two dimensional examples and a three dimensional real application.
High Performance Data Transfer for Distributed Data Intensive Sciences
DOE Office of Scientific and Technical Information (OSTI.GOV)
Fang, Chin; Cottrell, R 'Les' A.; Hanushevsky, Andrew B.
We report on the development of ZX software providing high performance data transfer and encryption. The design scales in: computation power, network interfaces, and IOPS while carefully balancing the available resources. Two U.S. patent-pending algorithms help tackle data sets containing lots of small files and very large files, and provide insensitivity to network latency. It has a cluster-oriented architecture, using peer-to-peer technologies to ease deployment, operation, usage, and resource discovery. Its unique optimizations enable effective use of flash memory. Using a pair of existing data transfer nodes at SLAC and NERSC, we compared its performance to that of bbcp andmore » GridFTP and determined that they were comparable. With a proof of concept created using two four-node clusters with multiple distributed multi-core CPUs, network interfaces and flash memory, we achieved 155Gbps memory-to-memory over a 2x100Gbps link aggregated channel and 70Gbps file-to-file with encryption over a 5000 mile 100Gbps link.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Blocksome, Michael A.; Mamidala, Amith R.
2013-09-03
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segmentmore » of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.« less
Memory-built-in quantum cloning in a hybrid solid-state spin register
NASA Astrophysics Data System (ADS)
Wang, Weibin; Zu, Chong; He, Li; Zhang, Wengang; Duan, Luming
2015-05-01
As a way to circumvent the quantum no-cloning theorem, approximate quantum cloning protocols have received wide attention with remarkable applications. Copying of quantum states to memory qubits provides an important strategy for eavesdropping in quantum cryptography. We report an experiment that realizes cloning of quantum states from an electron spin to a nuclear spin in a hybrid solid-state spin register with near-optimal fidelity. The nuclear spin provides an ideal memory qubit at room temperature, which stores the cloned quantum states for a millisecond under ambient conditions, exceeding the lifetime of the original quantum state carried by the electron spin by orders of magnitude, and making it an ideal memory qubit. Our experiment is based on control of an individual nitrogen vacancy (NV) center in the diamond, which is a diamond defect that attracts strong interest in recent years with great potential for implementation of quantum information protocols.
Dakota and Ojibwe People in Minnesota.
ERIC Educational Resources Information Center
Densmore, Frances
1977-01-01
A biographical sketch of Frances Densmore, ethnologist of Native American music, and seven articles describing the lives of the Dakota and Ojibwe people as Densmore saw them are presented. The biographical sketch recounts Ms. Densmore's study of Ojibwe music and her ability to copy songs from memory when listening to them at fairs or attending…
The Effect of Chronotype on Emotional Memory, Sustained Attention and Stress Response
2014-05-01
purify DNA from cells through the disruption of the cells and removal of membrane lipids, proteins, and RNA. PCR then amplifies a single copy of a DNA...comparison. The current study also did not collect data on female participants’ menstrual cycles to control for any hormonal influences on any of the
1991-09-01
addition, support for Saltz was provided by NSF from NSF Grant ASC-8819374. i 1, introduction Over the past fewyers, ,we have devoped -methods needed to... network . In Third Conf. on Hypercube Concurrent Computers and Applications, pages 241-27278, 1988. [17] G. Fox, S. Hiranandani, K. Kennedy, C. Koelbel
2012-01-01
Excellent resistive switching memory characteristics were demonstrated for an Al/Cu/Ti/TaOx/W structure with a Ti nanolayer at the Cu/TaOx interface under low voltage operation of ± 1.5 V and a range of current compliances (CCs) from 0.1 to 500 μA. Oxygen accumulation at the Ti nanolayer and formation of a defective high-κ TaOx film were confirmed by high-resolution transmission electron microscopy, energy dispersive X-ray spectroscopy, and X-ray photo-electron spectroscopy. The resistive switching memory characteristics of the Al/Cu/Ti/TaOx/W structure, such as HRS/LRS (approximately 104), stable switching cycle stability (>106) and multi-level operation, were improved compared with those of Al/Cu/TaOx/W devices. These results were attributed to the control of Cu migration/dissolution by the insertion of a Ti nanolayer at the Cu/TaOx interface. In contrast, CuOx formation at the Cu/TaOx interface was observed in an Al/Cu/TaOx/W structure, which hindered dissolution of the Cu filament and resulted in a small resistance ratio of approximately 10 at a CC of 500 μA. A high charge-trapping density of 6.9 × 1016 /cm2 was observed in the Al/Cu/Ti/TaOx/W structure from capacitance-voltage hysteresis characteristics, indicating the migration of Cu ions through defect sites. The switching mechanism was successfully explained for structures with and without the Ti nanolayer. By using a new approach, the nanoscale diameter of Cu filament decreased from 10.4 to 0.17 nm as the CC decreased from 500 to 0.1 μA, resulting in a large memory size of 7.6 T to 28 Pbit/sq in. Extrapolated 10-year data retention of the Ti nanolayer device was also obtained. The findings of this study will not only improve resistive switching memory performance but also aid future design of nanoscale nonvolatile memory. PMID:22734564
Distributed parallel messaging for multiprocessor systems
Chen, Dong; Heidelberger, Philip; Salapura, Valentina; Senger, Robert M; Steinmacher-Burrow, Burhard; Sugawara, Yutaka
2013-06-04
A method and apparatus for distributed parallel messaging in a parallel computing system. The apparatus includes, at each node of a multiprocessor network, multiple injection messaging engine units and reception messaging engine units, each implementing a DMA engine and each supporting both multiple packet injection into and multiple reception from a network, in parallel. The reception side of the messaging unit (MU) includes a switch interface enabling writing of data of a packet received from the network to the memory system. The transmission side of the messaging unit, includes switch interface for reading from the memory system when injecting packets into the network.
Three-dimensional user interfaces for scientific visualization
NASA Technical Reports Server (NTRS)
Vandam, Andries
1995-01-01
The main goal of this project is to develop novel and productive user interface techniques for creating and managing visualizations of computational fluid dynamics (CFD) datasets. We have implemented an application framework in which we can visualize computational fluid dynamics user interfaces. This UI technology allows users to interactively place visualization probes in a dataset and modify some of their parameters. We have also implemented a time-critical scheduling system which strives to maintain a constant frame-rate regardless of the number of visualization techniques. In the past year, we have published parts of this research at two conferences, the research annotation system at Visualization 1994, and the 3D user interface at UIST 1994. The real-time scheduling system has been submitted to SIGGRAPH 1995 conference. Copies of these documents are included with this report.
Scalable polylithic on-package integratable apparatus and method
DOE Office of Scientific and Technical Information (OSTI.GOV)
Khare, Surhud; Somasekhar, Dinesh; Borkar, Shekhar Y.
Described is an apparatus which comprises: a first die including: a processing core; a crossbar switch coupled to the processing core; and a first edge interface coupled to the crossbar switch; and a second die including: a first edge interface positioned at a periphery of the second die and coupled to the first edge interface of the first die, wherein the first edge interface of the first die and the first edge interface of the second die are positioned across each other; a clock synchronization circuit coupled to the second edge interface; and a memory interface coupled to the clockmore » synchronization circuit.« less
High-Fidelity Visual Long-Term Memory within an Unattended Blink of an Eye.
Kuhbandner, Christof; Rosas-Corona, Elizabeth A; Spachtholz, Philipp
2017-01-01
What is stored in long-term memory from current sensations is a question that has attracted considerable interest. Over time, several prominent theories have consistently proposed that only attended sensory information leaves a durable memory trace whereas unattended information is not stored beyond the current moment, an assumption that seems to be supported by abundant empirical evidence. Here we show, by using a more sensitive memory test than in previous studies, that this is actually not true. Observers viewed a rapid stream of real-world object pictures overlapped by words (presentation duration per stimulus: 500 ms, interstimulus interval: 200 ms), with the instruction to attend to the words and detect word repetitions, without knowing that their memory would be tested later. In a surprise two-alternative forced-choice recognition test, memory for the unattended object pictures was tested. Memory performance was substantially above chance, even when detailed feature knowledge was necessary for correct recognition, even when tested 24 h later, and even although participants reported that they do not have any memories. These findings suggests that humans have the ability to store at high speed detailed copies of current visual stimulations in long-term memory independently of current intentions and the current attentional focus.
NASA Technical Reports Server (NTRS)
Raible, E.
1994-01-01
The Panel Library and Editor is a graphical user interface (GUI) builder for the Silicon Graphics IRIS workstation family. The toolkit creates "widgets" which can be manipulated by the user. Its appearance is similar to that of the X-Windows System. The Panel Library is written in C and is used by programmers writing user-friendly mouse-driven applications for the IRIS. GUIs built using the Panel Library consist of "actuators" and "panels." Actuators are buttons, dials, sliders, or other mouse-driven symbols. Panels are groups of actuators that occupy separate windows on the IRIS workstation. The application user can alter variables in the graphics program, or fire off functions with a click on a button. The evolution of data values can be tracked with meters and strip charts, and dialog boxes with text processing can be built. Panels can be stored as icons when not in use. The Panel Editor is a program used to interactively create and test panel library interfaces in a simple and efficient way. The Panel Editor itself uses a panel library interface, so all actions are mouse driven. Extensive context-sensitive on-line help is provided. Programmers can graphically create and test the user interface without writing a single line of code. Once an interface is judged satisfactory, the Panel Editor will dump it out as a file of C code that can be used in an application. The Panel Library (v9.8) and Editor (v1.1) are written in C-Language (63%) and Scheme, a dialect of LISP, (37%) for Silicon Graphics 4D series workstations running IRIX 3.2 or higher. Approximately 10Mb of disk space is required once compiled. 1.5Mb of main memory is required to execute the panel editor. This program is available on a .25 inch streaming magnetic tape cartridge in UNIX tar format for an IRIS, and includes a copy of XScheme, the public-domain Scheme interpreter used by the Panel Editor. The Panel Library Programmer's Manual is included on the distribution media. The Panel Library and Editor were released to COSMIC in 1991. Silicon Graphics, IRIS, and IRIX are trademarks of Silicon Graphics, Inc. X-Window System is a trademark of Massachusetts Institute of Technology.
Interactive graphical computer-aided design system
NASA Technical Reports Server (NTRS)
Edge, T. M.
1975-01-01
System is used for design, layout, and modification of large-scale-integrated (LSI) metal-oxide semiconductor (MOS) arrays. System is structured around small computer which provides real-time support for graphics storage display unit with keyboard, slave display unit, hard copy unit, and graphics tablet for designer/computer interface.
Interfacing a high performance disk array file server to a Gigabit LAN
NASA Technical Reports Server (NTRS)
Seshan, Srinivasan; Katz, Randy H.
1993-01-01
Our previous prototype, RAID-1, identified several bottlenecks in typical file server architectures. The most important bottleneck was the lack of a high-bandwidth path between disk, memory, and the network. Workstation servers, such as the Sun-4/280, have very slow access to peripherals on busses far from the CPU. For the RAID-2 system, we addressed this problem by designing a crossbar interconnect, Xbus board, that provides a 40MB/s path between disk, memory, and the network interfaces. However, this interconnect does not provide the system CPU with low latency access to control the various interfaces. To provide a high data rate to clients on the network, we were forced to carefully and efficiently design the network software. A block diagram of the system hardware architecture is given. In the following subsections, we describe pieces of the RAID-2 file server hardware that had a significant impact on the design of the network interface.
Spin-photon interface and spin-controlled photon switching in a nanobeam waveguide
NASA Astrophysics Data System (ADS)
Javadi, Alisa; Ding, Dapeng; Appel, Martin Hayhurst; Mahmoodian, Sahand; Löbl, Matthias Christian; Söllner, Immo; Schott, Rüdiger; Papon, Camille; Pregnolato, Tommaso; Stobbe, Søren; Midolo, Leonardo; Schröder, Tim; Wieck, Andreas Dirk; Ludwig, Arne; Warburton, Richard John; Lodahl, Peter
2018-05-01
The spin of an electron is a promising memory state and qubit. Connecting spin states that are spatially far apart will enable quantum nodes and quantum networks based on the electron spin. Towards this goal, an integrated spin-photon interface would be a major leap forward as it combines the memory capability of a single spin with the efficient transfer of information by photons. Here, we demonstrate such an efficient and optically programmable interface between the spin of an electron in a quantum dot and photons in a nanophotonic waveguide. The spin can be deterministically prepared in the ground state with a fidelity of up to 96%. Subsequently, the system is used to implement a single-spin photonic switch, in which the spin state of the electron directs the flow of photons through the waveguide. The spin-photon interface may enable on-chip photon-photon gates, single-photon transistors and the efficient generation of a photonic cluster state.
AFTOMS Technology Issues and Alternatives Report
1989-12-01
color , resolu- power requirements, physi- tion; memory , processor speed; cal and weather rugged- IAN interfaces, etc,) f,: these ness. display...Telephone and Telegraph 3 CD-I Compact Disk - Interactive CD-ROM Compact Disk-Read Only Memory CGM Computer Graphics Metafile CNWDI Critical Nuclear...Database Management System RFP Request For Proposal 3 RFS Remote File System ROM Read Only Memory 3 S SA-ALC San Antonio Air Logistics Center 3 SAC
NASA Technical Reports Server (NTRS)
Chow, Edward T.; Schatzel, Donald V.; Whitaker, William D.; Sterling, Thomas
2008-01-01
A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.
Arnold, O H
1999-01-01
In addition to the existence of complex memory (similar to the implicit nondeclarative memory of Squire), the existence of a phylogenetically old apparatus of a memory of situations (SMA) is supposed, which is to some extent comparable with the declarative memory of Squire. During actual sensory information the SMA generates a general frame and forms a general 'mark', indicating whether a given information has its origin inside or outside the body, and whether it is new or known. The procedure of this marking process can be explained as the time-depending arrest of a copy of the actual original information-transporting signal 'shower'; this copy must last until the feedback from thalamocortical centers indicates the termination of the processing of the original signal showers. The arrest of the shower copies is the performance of neuronal networks of the entorhinal cortex (EC) and the gyrus dentatus (GD). The psychopathological and biochemical analyses of experimental dibenamine psychosis show a different effect of dibenamine on the noradrenaline (NA) receptors of the EC and GD, respectively: these effects are responsible for the repeated perception cycles of a single situation. N,N-Dibencylamine blocks the postsynaptic alpha(1)-receptors of the EC without influencing the beta-receptors of the GD. Thus the interaction between EC and GD is changed: instead of new scenes, perceptions that have just been experienced get repeated presence and the quality of familiarity. The prolonged arrest of shower copies simultaneously blocks the entrance of new signal showers from the EC to the GD. No information-transporting signal showers can come in as long as the arrest lasts. In case of a disturbance in NA-dependent actions within the EC and the GD, the duration of arrest of information-transporting signal showers is shortened. Thus the formal frame of experience receives the quality of novelty instead of familiarity, and in addition the qualities of uncertainty, vagueness, and alienity. These very changes in perception and experience represent the basic disturbance of schizophrenia. All the symptoms of schizophrenia may be explained by this basic disturbance. The analysis of biochemical aspects turns attention to the energetic situation of NA and N-methyl-D-aspartate systems. These considerations suggest a genetic background of the basic disturbance of schizophrenia: transmitter effects on membranes of neurons and possibly also on glial cells, and energy supply of these effects may be predetermined genetically. It may be assumed that the compensation of such membrane-dependent disturbances will be possible within wide areas of the neural network, except for the 'bottleneck' of the overlapping region of the iso- and allocortex.
General-purpose interface bus for multiuser, multitasking computer system
NASA Technical Reports Server (NTRS)
Generazio, Edward R.; Roth, Don J.; Stang, David B.
1990-01-01
The architecture of a multiuser, multitasking, virtual-memory computer system intended for the use by a medium-size research group is described. There are three central processing units (CPU) in the configuration, each with 16 MB memory, and two 474 MB hard disks attached. CPU 1 is designed for data analysis and contains an array processor for fast-Fourier transformations. In addition, CPU 1 shares display images viewed with the image processor. CPU 2 is designed for image analysis and display. CPU 3 is designed for data acquisition and contains 8 GPIB channels and an analog-to-digital conversion input/output interface with 16 channels. Up to 9 users can access the third CPU simultaneously for data acquisition. Focus is placed on the optimization of hardware interfaces and software, facilitating instrument control, data acquisition, and processing.
MIDI Keyboards: Memory Skills and Building Values toward School.
ERIC Educational Resources Information Center
Marcinkiewicz, Henryk R.; And Others
This document summarizes the results of a study which evaluated whether school instruction with Musical Instrument Digital Interface (MIDI) keyboards improves memory skill and whether school instruction with MIDI keyboards improves sentiments toward school and instructional media. Pupils in early elementary grades at five schools were evaluated…
Uniform Interfaces for Distributed Systems.
1980-05-01
in data str ’.ctures on stable storage (such as disk). The Virtual Terminals associated with a particular user (i.e., rM display terminal) are all...vec MESSAGESIZE let error = nil [S ReceiveAny (msg) // The copy is made so that lower-level routines may // munge the message template without losing
The APA Style Converter: a Web-based interface for converting articles to APA style for publication.
Li, Ping; Cunningham, Krystal
2005-05-01
The APA Style Converter is a Web-based tool with which authors may prepare their articles in APA style according to the APA Publication Manual (5th ed.). The Converter provides a user-friendly interface that allows authors to copy and paste text and upload figures through the Web, and it automatically converts all texts, references, and figures to a structured article in APA style. The output is saved in PDF or RTF format, ready for either electronic submission or hardcopy printing.
VIRTUAL FRAME BUFFER INTERFACE
NASA Technical Reports Server (NTRS)
Wolfe, T. L.
1994-01-01
Large image processing systems use multiple frame buffers with differing architectures and vendor supplied user interfaces. This variety of architectures and interfaces creates software development, maintenance, and portability problems for application programs. The Virtual Frame Buffer Interface program makes all frame buffers appear as a generic frame buffer with a specified set of characteristics, allowing programmers to write code which will run unmodified on all supported hardware. The Virtual Frame Buffer Interface converts generic commands to actual device commands. The virtual frame buffer consists of a definition of capabilities and FORTRAN subroutines that are called by application programs. The virtual frame buffer routines may be treated as subroutines, logical functions, or integer functions by the application program. Routines are included that allocate and manage hardware resources such as frame buffers, monitors, video switches, trackballs, tablets and joysticks; access image memory planes; and perform alphanumeric font or text generation. The subroutines for the various "real" frame buffers are in separate VAX/VMS shared libraries allowing modification, correction or enhancement of the virtual interface without affecting application programs. The Virtual Frame Buffer Interface program was developed in FORTRAN 77 for a DEC VAX 11/780 or a DEC VAX 11/750 under VMS 4.X. It supports ADAGE IK3000, DEANZA IP8500, Low Resolution RAMTEK 9460, and High Resolution RAMTEK 9460 Frame Buffers. It has a central memory requirement of approximately 150K. This program was developed in 1985.
SpaceWire Driver Software for Special DSPs
NASA Technical Reports Server (NTRS)
Clark, Douglas; Lux, James; Nishimoto, Kouji; Lang, Minh
2003-01-01
A computer program provides a high-level C-language interface to electronics circuitry that controls a SpaceWire interface in a system based on a space qualified version of the ADSP-21020 digital signal processor (DSP). SpaceWire is a spacecraft-oriented standard for packet-switching data-communication networks that comprise nodes connected through bidirectional digital serial links that utilize low-voltage differential signaling (LVDS). The software is tailored to the SMCS-332 application-specific integrated circuit (ASIC) (also available as the TSS901E), which provides three highspeed (150 Mbps) serial point-to-point links compliant with the proposed Institute of Electrical and Electronics Engineers (IEEE) Standard 1355.2 and equivalent European Space Agency (ESA) Standard ECSS-E-50-12. In the specific application of this software, the SpaceWire ASIC was combined with the DSP processor, memory, and control logic in a Multi-Chip Module DSP (MCM-DSP). The software is a collection of low-level driver routines that provide a simple message-passing application programming interface (API) for software running on the DSP. Routines are provided for interrupt-driven access to the two styles of interface provided by the SMCS: (1) the "word at a time" conventional host interface (HOCI); and (2) a higher performance "dual port memory" style interface (COMI).
Perpendicular magnetic anisotropy at transition metal/oxide interfaces and applications
NASA Astrophysics Data System (ADS)
Dieny, B.; Chshiev, M.
2017-04-01
Spin electronics is a rapidly expanding field stimulated by a strong synergy between breakthrough basic research discoveries and industrial applications in the fields of magnetic recording, magnetic field sensors, nonvolatile memories [magnetic random access memories (MRAM) and especially spin-transfer-torque MRAM (STT-MRAM)]. In addition to the discovery of several physical phenomena (giant magnetoresistance, tunnel magnetoresistance, spin-transfer torque, spin-orbit torque, spin Hall effect, spin Seebeck effect, etc.), outstanding progress has been made on the growth and nanopatterning of magnetic multilayered films and nanostructures in which these phenomena are observed. Magnetic anisotropy is usually observed in materials that have large spin-orbit interactions. However, in 2002 perpendicular magnetic anisotropy (PMA) was discovered to exist at magnetic metal/oxide interfaces [for instance Co (Fe )/alumina ]. Surprisingly, this PMA is observed in systems where spin-orbit interactions are quite weak, but its amplitude is remarkably large—comparable to that measured at Co /Pt interfaces, a reference for large interfacial anisotropy (anisotropy˜1.4 erg /cm2=1.4 mJ /m2 ). Actually, this PMA was found to be very common at magnetic metal/oxide interfaces since it has been observed with a large variety of amorphous or crystalline oxides, including AlOx, MgO, TaOx, HfOx, etc. This PMA is thought to be the result of electronic hybridization between the oxygen and the magnetic transition metal orbit across the interface, a hypothesis supported by ab initio calculations. Interest in this phenomenon was sparked in 2010 when it was demonstrated that the PMA at magnetic transition metal/oxide interfaces could be used to build out-of-plane magnetized magnetic tunnel junctions for STT-MRAM cells. In these systems, the PMA at the CoFeB /MgO interface can be used to simultaneously obtain good memory retention, thanks to the large PMA amplitude, and a low write current, thanks to a relatively weak Gilbert damping. These two requirements for memories tend to be difficult to reconcile since they rely on the same spin-orbit coupling. PMA-based approaches have now become ubiquitous in the designs for perpendicular STT-MRAM, and major microelectronics companies are actively working on their development with the first goal of addressing embedded FLASH and static random access memory-type of applications. Scalability of STT-MRAM devices based on this interfacial PMA is expected to soon exceed the 20-nm nodes. Several very active new fields of research also rely on interfacial PMA at magnetic metal/oxide interfaces, including spin-orbit torques associated with Rashba or spin Hall effects, record high speed domain wall propagation in buffer/magnetic metal/oxide-based magnetic wires, and voltage-based control of anisotropy. This review deals with PMA at magnetic metal/oxide interfaces from its discovery, by examining the diversity of systems in which it has been observed and the physicochemical methods through which the key roles played by the electronic hybridization at the metal/oxide interface were elucidated. The physical origins of the phenomenon are also covered and how these are supported by ab initio calculations is dealt with. Finally, some examples of applications of this interfacial PMA in STT-MRAM are listed along with the various emerging research topics taking advantage of this PMA.
NASA Astrophysics Data System (ADS)
Dolui, Kapildeb; Nikolić, Branislav K.
2017-12-01
Spin-memory loss (SML) of electrons traversing ferromagnetic-metal/heavy-metal (FM/HM), FM/normal-metal (FM/NM), and HM/NM interfaces is a fundamental phenomenon that must be invoked to explain consistently large numbers of spintronic experiments. However, its strength extracted by fitting experimental data to phenomenological semiclassical theory, which replaces each interface by a fictitious bulk diffusive layer, is poorly understood from a microscopic quantum framework and/or materials properties. Here we describe an ensemble of flowing spin quantum states using spin-density matrix, so that SML is measured like any decoherence process by the decay of its off-diagonal elements or, equivalently, by the reduction of the magnitude of polarization vector. By combining this framework with density functional theory, we examine how all three components of the polarization vector change at Co/Ta, Co/Pt, Co/Cu, Pt/Cu, and Pt/Au interfaces embedded within Cu/FM/HM/Cu vertical heterostructures. In addition, we use ab initio Green's functions to compute spectral functions and spin textures over FM, HM, and NM monolayers around these interfaces which quantify interfacial spin-orbit coupling and explain the microscopic origin of SML in long-standing puzzles, such as why it is nonzero at the Co/Cu interface; why it is very large at the Pt/Cu interface; and why it occurs even in the absence of disorder, intermixing and magnons at the interface.
Regional information guidance system based on hypermedia concept
NASA Astrophysics Data System (ADS)
Matoba, Hiroshi; Hara, Yoshinori; Kasahara, Yutako
1990-08-01
A regional information guidance system has been developed on an image workstation. Two main features of this system are hypermedia data structure and friendly visual interface realized by the full-color frame memory system. As the hypermedia data structure manages regional information such as maps, pictures and explanations of points of interest, users can retrieve those information one by one, next to next according to their interest change. For example, users can retrieve explanation of a picture through the link between pictures and text explanations. Users can also traverse from one document to another by using keywords as cross reference indices. The second feature is to utilize a full-color, high resolution and wide space frame memory for visual interface design. This frame memory system enables real-time operation of image data and natural scene representation. The system also provides half tone representing function which enables fade-in/out presentations. This fade-in/out functions used in displaying and erasing menu and image data, makes visual interface soft for human eyes. The system we have developed is a typical example of multimedia applications. We expect the image workstation will play an important role as a platform for multimedia applications.
Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
Asaad, Sameh W.; Kapur, Mohit
2016-03-15
A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.
NASA Technical Reports Server (NTRS)
Fura, David A.; Windley, Phillip J.; Cohen, Gerald C.
1993-01-01
This technical report contains the HOL listings of the specification of the design and major portions of the requirements for a commercially developed processor interface unit (or PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU specification as it currently exists. Section two of this report contains general-purpose HOL theories that support the PIU specification. These theories include definitions for the hardware components used in the PIU, our implementation of bit words, and our implementation of temporal logic. Section three contains the HOL listings for the PIU design specification. Aside from the PIU internal bus (I-Bus), this specification is complete. Section four contains the HOL listings for a major portion of the PIU requirements specification. Specifically, it contains most of the definition for the PIU behavior associated with memory accesses initiated by the local processor.
System architecture of a gallium arsenide one-gigahertz digital IC tester
NASA Technical Reports Server (NTRS)
Fouts, Douglas J.; Johnson, John M.; Butner, Steven E.; Long, Stephen I.
1987-01-01
The design for a 1-GHz digital integrated circuit tester for the evaluation of custom GaAs chips and subsystems is discussed. Technology-related problems affecting the design of a GaAs computer are discussed, with emphasis on the problems introduced by long printed-circuit-board interconnect. High-speed interface modules provide a link between the low-speed microprocessor and the chip under test. Memory-multiplexer and memory-shift register architectures for the storage of test vectors are described in addition to an architecture for local data storage consisting of a long chain of GaAs shift registers. The tester is constructed around a VME system card cage and backplane, and very little high-speed interconnect exists between boards. The tester has a three part self-test consisting of a CPU board confidence test, a main memory confidence test, and a high-speed interface module functional test.
Inflated speedups in parallel simulations via malloc()
NASA Technical Reports Server (NTRS)
Nicol, David M.
1990-01-01
Discrete-event simulation programs make heavy use of dynamic memory allocation in order to support simulation's very dynamic space requirements. When programming in C one is likely to use the malloc() routine. However, a parallel simulation which uses the standard Unix System V malloc() implementation may achieve an overly optimistic speedup, possibly superlinear. An alternate implementation provided on some (but not all systems) can avoid the speedup anomaly, but at the price of significantly reduced available free space. This is especially severe on most parallel architectures, which tend not to support virtual memory. It is shown how a simply implemented user-constructed interface to malloc() can both avoid artificially inflated speedups, and make efficient use of the dynamic memory space. The interface simply catches blocks on the basis of their size. The problem is demonstrated empirically, and the effectiveness of the solution is shown both empirically and analytically.
Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems
DOE Office of Scientific and Technical Information (OSTI.GOV)
Schreiber, Robert
Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports variousmore » NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint ReRAM array [Niu 2012b]. We have conducted an in depth analysis of the circuit and system level design implications of multi-layer cross-point Resistive RAM (MLCReRAM) from performance, power and reliability perspectives [Xu 2013]. The objective of this study is to understand the design trade-offs of this technology with respect to the MLC Phase Change Memory (MLCPCM).Our MLC ReRAM design at the circuit and system levels indicates that different resistance allocation schemes, programming strategies, peripheral designs, and material selections profoundly affect the area, latency, power, and reliability of MLC ReRAM. Based on this analysis, we conduct two case studies: first we compare MLC ReRAM design against MLC phase-change memory (PCM) and multi-layer cross-point ReRAM design, and point out why multi-level ReRAM is appealing; second we further explore the design space for MLC ReRAM. Architecture and Application We explored hybrid checkpointing using phase-change memory for future exascale systems [Dong 2011] and showed that the use of nonvolatile memory for local checkpointing significantly increases the number of faults covered by local checkpoints and reduces the probability of a global failure in the middle of a global checkpoint to less than 1%. We also proposed a technique called i2WAP to mitigate the write variations in NVM-based last-level cache for the improvement of the NVM lifetime [Wang 2013]. Our wear leveling technique attempts to work around the limitations of write endurance by arranging data access so that write operations can be distributed evenly across all the storage cells. During our intensive research on fault-tolerant NVM design, we found that ECC cannot effectively tolerate hard errors from limited write endurance and process imperfection. Therefore, we devised a novel Point and Discard (PAD) architecture in in [ 2012] as a hard-error-tolerant architecture for ReRAM-based Last Level Caches. PAD improves the lifetime of ReRAM caches by 1.6X-440X under different process variations without performance overhead in the system's early life. We have investigated the applicability of NVM for persistent memory design [Zhao 2013]. New byte addressable NVM enables fast persistent memory that allows in-memory persistent data objects to be updated with much higher throughput. Despite the significant improvement, the performance of these designs is only 50% of the native system with no persistence support, due to the logging or copy-on-write mechanisms used to update the persistent memory. A challenge in this approach is therefore how to efficiently enable atomic, consistent, and durable updates to ensure data persistence that survives application and/or system failures. We have designed a persistent memory system, called Klin, that can provide performance as close as that of the native system. The Klin design adopts a non-volatile cache and a non-volatile main memory for constructing a multi-versioned durable memory system, enabling atomic updates without logging or copy-on-write. Our evaluation shows that the proposed Kiln mechanism can achieve up to 2X of performance improvement to NVRAM-based persistent memory employing write-ahead logging. In addition, our design has numerous practical advantages: a simple and intuitive abstract interface, microarchitecture-level optimizations, fast recovery from failures, and no redundant writes to slow non-volatile storage media. The work was published in MICRO 2013 and received Best Paper Honorable Mentioned Award.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Castellana, Vito G.; Tumeo, Antonino; Ferrandi, Fabrizio
Emerging applications such as data mining, bioinformatics, knowledge discovery, social network analysis are irregular. They use data structures based on pointers or linked lists, such as graphs, unbalanced trees or unstructures grids, which generates unpredictable memory accesses. These data structures usually are large, but difficult to partition. These applications mostly are memory bandwidth bounded and have high synchronization intensity. However, they also have large amounts of inherent dynamic parallelism, because they potentially perform a task for each one of the element they are exploring. Several efforts are looking at accelerating these applications on hybrid architectures, which integrate general purpose processorsmore » with reconfigurable devices. Some solutions, which demonstrated significant speedups, include custom-hand tuned accelerators or even full processor architectures on the reconfigurable logic. In this paper we present an approach for the automatic synthesis of accelerators from C, targeted at irregular applications. In contrast to typical High Level Synthesis paradigms, which construct a centralized Finite State Machine, our approach generates dynamically scheduled hardware components. While parallelism exploitation in typical HLS-generated accelerators is usually bound within a single execution flow, our solution allows concurrently running multiple execution flow, thus also exploiting the coarser grain task parallelism of irregular applications. Our approach supports multiple, multi-ported and distributed memories, and atomic memory operations. Its main objective is parallelizing as many memory operations as possible, independently from their execution time, to maximize the memory bandwidth utilization. This significantly differs from current HLS flows, which usually consider a single memory port and require precise scheduling of memory operations. A key innovation of our approach is the generation of a memory interface controller, which dynamically maps concurrent memory accesses to multiple ports. We present a case study on a typical irregular kernel, Graph Breadth First search (BFS), exploring different tradeoffs in terms of parallelism and number of memories.« less
NASA Technical Reports Server (NTRS)
Byrne, F.
1981-01-01
Time-shared interface speeds data processing in distributed computer network. Two-level high-speed scanning approach routes information to buffer, portion of which is reserved for series of "first-in, first-out" memory stacks. Buffer address structure and memory are protected from noise or failed components by error correcting code. System is applicable to any computer or processing language.
Memory effect versus exchange bias for maghemite nanoparticles
NASA Astrophysics Data System (ADS)
Nadeem, K.; Krenn, H.; Szabó, D. V.
2015-11-01
We studied the temperature dependence of memory and exchange bias effects and their dependence on each other in maghemite (γ-Fe2O3) nanoparticles by using magnetization studies. Memory effect in zero field cooled process in nanoparticles is a fingerprint of spin-glass behavior which can be due to i) surface disordered spins (surface spin-glass) and/or ii) randomly frozen and interacting nanoparticles core spins (super spin-glass). Temperature region (25-70 K) for measurements has been chosen just below the average blocking temperature (TB=75 K) of the nanoparticles. Memory effect (ME) shows a non-monotonous behavior with temperature. It shows a decreasing trend with decreasing temperature and nearly vanishes below 30 K. However it also decreased again near the blocking temperature of the nanoparticles e.g., 70 K. Exchange bias (EB) in these nanoparticles arises due to core/shell interface interactions. The EB increases sharply below 30 K due to increase in core/shell interactions, while ME starts vanishing below 30 K. We conclude that the core/shell interface interactions or EB have not enhanced the ME but may reduce it in these nanoparticles.
Economic impact of off-line PC viewer for private folder management
NASA Astrophysics Data System (ADS)
Song, Koun-Sik; Shin, Myung J.; Lee, Joo Hee; Auh, Yong H.
1999-07-01
We developed a PC-based clinical workstation and implemented at Asan Medical Center in Seoul, Korea, Hardwares used were Pentium-II, 8M video memory, 64-128 MB RAM, 19 inch color monitor, and 10/100Mbps network adaptor. One of the unique features of this workstation is management tool for folders reside both in PACS short-term storage unit and local hard disk. Users can copy the entire study or part of the study to local hard disk, removable storages, or CD recorder. Even the images in private folders in PACS short-term storage can be copied to local storage devices. All images are saved as DICOM 3.0 file format with 2:1 lossless compression. We compared the prices of copy films and storage medias considering the possible savings of expensive PACS short- term storage and network traffic. Price savings of copy film is most remarkable in MR exam. Price savings arising from minimal use of short-term unit was 50,000 dollars. It as hard to calculate the price savings arising from the network usage. Off-line PC viewer is a cost-effective way of handling private folder management under the PACS environment.
[Neuropsychiatric background of severe drawing disturbances].
Molnár, Gábor
2008-01-01
Drawing ability is a primary human skill, which first appeared in the paleolithic art. In spite of this fact, neuropsychology of drawing has been a neglected subject of brain research. In the Crisis Intervention Department at the Budapest Social Center (Hungary), five patients with local brain lesions were identified, who had severe drawing disturbances. This was defined when the form representation in the House-Tree-Person drawing test was was not maintained and was associated with altered figure-perception. Patients were underwent detailed neurological, mental and neuropsychological assessment. Computer tomography of the head was performed at different hospitals in Budapest. House-Tree-Person drawing test was used, which was complemented with copy and visual memory tasks (with Rey-picture), as well as with spontaneous drawing, if it was necessary. Severe drawing disturbances were found in patients with severe right frontal, right temporo-parietal, diffuse right fronto-parieto-temporal, left occipito-temporal lesions and with bilateral basal ganglia lesions with enlarged ventriculi. Impairment of copying figures was sometimes seen without associated impairment of drawing on verbal instructions. Visual memory, visual images in long-term memory, visual analysis, the ability of adequat placement of parts into the whole representation, visuomotor transfer and perhaps the motor drawing programs could be altered separately. Severe drawing disturbance might occur with perfectly maintained writing capabilities. The data indicated that drawing ability requires the intact activity of nearly the whole brain, but it also includes several subfunctions, which could be altered relatively separately.
Synchronization of heteroclinic circuits through learning in coupled neural networks
NASA Astrophysics Data System (ADS)
Selskii, Anton; Makarov, Valeri A.
2016-01-01
The synchronization of oscillatory activity in neural networks is usually implemented by coupling the state variables describing neuronal dynamics. Here we study another, but complementary mechanism based on a learning process with memory. A driver network, acting as a teacher, exhibits winner-less competition (WLC) dynamics, while a driven network, a learner, tunes its internal couplings according to the oscillations observed in the teacher. We show that under appropriate training the learner can "copy" the coupling structure and thus synchronize oscillations with the teacher. The replication of the WLC dynamics occurs for intermediate memory lengths only, consequently, the learner network exhibits a phenomenon of learning resonance.
Mania, Katerina; Wooldridge, Dave; Coxon, Matthew; Robinson, Andrew
2006-01-01
Accuracy of memory performance per se is an imperfect reflection of the cognitive activity (awareness states) that underlies performance in memory tasks. The aim of this research is to investigate the effect of varied visual and interaction fidelity of immersive virtual environments on memory awareness states. A between groups experiment was carried out to explore the effect of rendering quality on location-based recognition memory for objects and associated states of awareness. The experimental space, consisting of two interconnected rooms, was rendered either flat-shaded or using radiosity rendering. The computer graphics simulations were displayed on a stereo head-tracked Head Mounted Display. Participants completed a recognition memory task after exposure to the experimental space and reported one of four states of awareness following object recognition. These reflected the level of visual mental imagery involved during retrieval, the familiarity of the recollection, and also included guesses. Experimental results revealed variations in the distribution of participants' awareness states across conditions while memory performance failed to reveal any. Interestingly, results revealed a higher proportion of recollections associated with mental imagery in the flat-shaded condition. These findings comply with similar effects revealed in two earlier studies summarized here, which demonstrated that the less "naturalistic" interaction interface or interface of low interaction fidelity provoked a higher proportion of recognitions based on visual mental images.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Appel, Gordon John
Sandia National Laboratories (SNL) Fuel Cycle Technologies (FCT) program activities are conducted in accordance with FCT Quality Assurance Program Document (FCT-QAPD) requirements. The FCT-QAPD interfaces with SNL approved Quality Assurance Program Description (SNL-QAPD) as explained in the Sandia National Laboratories QA Program Interface Document for FCT Activities (Interface Document). This plan describes SNL's FY16 assessment of SNL's FY15 FCT M2 milestone deliverable's compliance with program QA requirements, including SNL R&A requirements. The assessment is intended to confirm that SNL's FY15 milestone deliverables contain the appropriate authenticated review documentation and that there is a copy marked with SNL R&A numbers.
A 128K-bit CCD buffer memory system
NASA Technical Reports Server (NTRS)
Siemens, K. H.; Wallace, R. W.; Robinson, C. R.
1976-01-01
A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.
ERIC Educational Resources Information Center
Blandford, A. E.; Smith, P. R.
1986-01-01
Describes the style of design of computer simulations developed by Computer Assisted Teaching Unit at Queen Mary College with reference to user interface, input and initialization, input data vetting, effective display screen use, graphical results presentation, and need for hard copy. Procedures and problems relating to academic involvement are…
Struggling Writers' Use of iPad Art and Text Apps for Story Writing
ERIC Educational Resources Information Center
Dunn, Michael
2015-01-01
Many children struggle with writing. Idea generation, planning, organizing ideas, editing, and encoding a final text all have a part in a child's producing a publishable copy. Part of the challenge for these students is how working memory can be overloaded when initially planning and writing at the same time. To address this issue, the author…
NASA Astrophysics Data System (ADS)
Miyaji, Kousuke; Sun, Chao; Soga, Ayumi; Takeuchi, Ken
2014-01-01
A relational database management system (RDBMS) is designed based on NAND flash solid-state drive (SSD) for storage. By vertically integrating the storage engine (SE) and the flash translation layer (FTL), system performance is maximized and the internal SSD overhead is minimized. The proposed RDBMS SE utilizes physical information about the NAND flash memory which is supplied from the FTL. The query operation is also optimized for SSD. By these treatments, page-copy-less garbage collection is achieved and data fragmentation in the NAND flash memory is suppressed. As a result, RDBMS performance increases by 3.8 times, power consumption of SSD decreases by 46% and SSD life time is increased by 61%. The effectiveness of the proposed scheme increases with larger erase block sizes, which matches the future scaling trend of three-dimensional (3D-) NAND flash memories. The preferable row data size of the proposed scheme is below 500 byte for 16 kbyte page size.
SUMC fault tolerant computer system
NASA Technical Reports Server (NTRS)
1980-01-01
The results of the trade studies are presented. These trades cover: establishing the basic configuration, establishing the CPU/memory configuration, establishing an approach to crosstrapping interfaces, defining the requirements of the redundancy management unit (RMU), establishing a spare plane switching strategy for the fault-tolerant memory (FTM), and identifying the most cost effective way of extending the memory addressing capability beyond the 64 K-bytes (K=1024) of SUMC-II B. The results of the design are compiled in Contract End Item (CEI) Specification for the NASA Standard Spacecraft Computer II (NSSC-II), IBM 7934507. The implementation of the FTM and memory address expansion.
A simple modern correctness condition for a space-based high-performance multiprocessor
NASA Technical Reports Server (NTRS)
Probst, David K.; Li, Hon F.
1992-01-01
A number of U.S. national programs, including space-based detection of ballistic missile launches, envisage putting significant computing power into space. Given sufficient progress in low-power VLSI, multichip-module packaging and liquid-cooling technologies, we will see design of high-performance multiprocessors for individual satellites. In very high speed implementations, performance depends critically on tolerating large latencies in interprocessor communication; without latency tolerance, performance is limited by the vastly differing time scales in processor and data-memory modules, including interconnect times. The modern approach to tolerating remote-communication cost in scalable, shared-memory multiprocessors is to use a multithreaded architecture, and alter the semantics of shared memory slightly, at the price of forcing the programmer either to reason about program correctness in a relaxed consistency model or to agree to program in a constrained style. The literature on multiprocessor correctness conditions has become increasingly complex, and sometimes confusing, which may hinder its practical application. We propose a simple modern correctness condition for a high-performance, shared-memory multiprocessor; the correctness condition is based on a simple interface between the multiprocessor architecture and a high-performance, shared-memory multiprocessor; the correctness condition is based on a simple interface between the multiprocessor architecture and the parallel programming system.
Preprocessing film-copied MRI for studying morphological brain changes.
Pham, Tuan D; Eisenblätter, Uwe; Baune, Bernhard T; Berger, Klaus
2009-06-15
The magnetic resonance imaging (MRI) of the brain is one of the important data items for studying memory and morbidity in elderly as these images can provide useful information through the quantitative measures of various regions of interest of the brain. As an effort to fully automate the biomedical analysis of the brain that can be combined with the genetic data of the same human population and where the records of the original MRI data are missing, this paper presents two effective methods for addressing this imaging problem. The first method handles the restoration of the film-copied MRI. The second method involves the segmentation of the image data. Experimental results and comparisons with other methods suggest the usefulness of the proposed image analysis methodology.
NASA Astrophysics Data System (ADS)
Tůma, K.; Stupkiewicz, S.; Petryk, H.
2016-10-01
A finite-strain phase field model for martensitic phase transformation and twinning in shape memory alloys is developed and confronted with the corresponding sharp-interface approach extended to interfacial energy effects. The model is set in the energy framework so that the kinetic equations and conditions of mechanical equilibrium are fully defined by specifying the free energy and dissipation potentials. The free energy density involves the bulk and interfacial energy contributions, the latter describing the energy of diffuse interfaces in a manner typical for phase-field approaches. To ensure volume preservation during martensite reorientation at finite deformation within a diffuse interface, it is proposed to apply linear mixing of the logarithmic transformation strains. The physically different nature of phase interfaces and twin boundaries in the martensitic phase is reflected by introducing two order-parameters in a hierarchical manner, one as the reference volume fraction of austenite, and thus of the whole martensite, and the second as the volume fraction of one variant of martensite in the martensitic phase only. The microstructure evolution problem is given a variational formulation in terms of incremental fields of displacement and order parameters, with unilateral constraints on volume fractions explicitly enforced by applying the augmented Lagrangian method. As an application, size-dependent microstructures with diffuse interfaces are calculated for the cubic-to-orthorhombic transformation in a CuAlNi shape memory alloy and compared with the sharp-interface microstructures with interfacial energy effects.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dasari, Venkat; Sadlier, Ronald J; Geerhart, Mr. Billy
Well-defined and stable quantum networks are essential to realize functional quantum applications. Quantum networks are complex and must use both quantum and classical channels to support quantum applications like QKD, teleportation, and superdense coding. In particular, the no-cloning theorem prevents the reliable copying of quantum signals such that the quantum and classical channels must be highly coordinated using robust and extensible methods. We develop new network abstractions and interfaces for building programmable quantum networks. Our approach leverages new OpenFlow data structures and table type patterns to build programmable quantum networks and to support quantum applications.
Two demonstrators and a simulator for a sparse, distributed memory
NASA Technical Reports Server (NTRS)
Brown, Robert L.
1987-01-01
Described are two programs demonstrating different aspects of Kanerva's Sparse, Distributed Memory (SDM). These programs run on Sun 3 workstations, one using color, and have straightforward graphically oriented user interfaces and graphical output. Presented are descriptions of the programs, how to use them, and what they show. Additionally, this paper describes the software simulator behind each program.
2008-05-01
patterns. Our strategy to nucleate Ag nanoparticles has been to use a templating protein (e.g., streptavidin) that has been chemically pre- charged with...assembly is used to direct the formation of switching devices and wires to create logic circuitry, memory, and I/O interfaces . We can control the reaction...determines the formation of structures (through complementarity ). Sequence design is important because it determines many aspects of the target DNA
Knowledge information management toolkit and method
Hempstead, Antoinette R.; Brown, Kenneth L.
2006-08-15
A system is provided for managing user entry and/or modification of knowledge information into a knowledge base file having an integrator support component and a data source access support component. The system includes processing circuitry, memory, a user interface, and a knowledge base toolkit. The memory communicates with the processing circuitry and is configured to store at least one knowledge base. The user interface communicates with the processing circuitry and is configured for user entry and/or modification of knowledge pieces within a knowledge base. The knowledge base toolkit is configured for converting knowledge in at least one knowledge base from a first knowledge base form into a second knowledge base form. A method is also provided.
Remote direct memory access over datagrams
Grant, Ryan Eric; Rashti, Mohammad Javad; Balaji, Pavan; Afsahi, Ahmad
2014-12-02
A communication stack for providing remote direct memory access (RDMA) over a datagram network is disclosed. The communication stack has a user level interface configured to accept datagram related input and communicate with an RDMA enabled network interface card (NIC) via an NIC driver. The communication stack also has an RDMA protocol layer configured to supply one or more data transfer primitives for the datagram related input of the user level. The communication stack further has a direct data placement (DDP) layer configured to transfer the datagram related input from a user storage to a transport layer based on the one or more data transfer primitives by way of a lower layer protocol (LLP) over the datagram network.
Synaptic plasticity and oscillation at zinc tin oxide/silver oxide interfaces
NASA Astrophysics Data System (ADS)
Murdoch, Billy J.; McCulloch, Dougal G.; Partridge, James G.
2017-02-01
Short-term plasticity, long-term potentiation, and pulse interval dependent plasticity learning/memory functions have been observed in junctions between amorphous zinc-tin-oxide and silver-oxide. The same junctions exhibited current-controlled negative differential resistance and when connected in an appropriate circuit, they behaved as relaxation oscillators. These oscillators produced voltage pulses suitable for device programming. Transmission electron microscopy, energy dispersive X-ray spectroscopy, and electrical measurements suggest that the characteristics of these junctions arise from Ag+/O- electromigration across a highly resistive interface layer. With memory/learning functions and programming spikes provided in a single device structure, arrays of similar devices could be used to form transistor-free neuromorphic circuits.
NASA Astrophysics Data System (ADS)
Huang, Wei; Shi, Wei; Han, Shijiao; Yu, Junsheng
2013-05-01
Hysteresis mechanism of pentacene organic field-effect transistors (OFETs) with polyvinyl alcohol (PVA) and/or polymethyl methacrylate (PMMA) dielectrics is studied. Through analyzing the electrical characteristics of OFETs with various PVA/PMMA arrangements, it shows that charge, which is trapped in PVA bulk and at the interface of pentacene/PVA, is one of the origins of hysteresis. The results also show that memory window is proportional to both trap amount in PVA and charge density at the gate/PVA or PVA/pentacene interfaces. Hence, the controllable memory window of around 0 ˜ 10 V can be realized by controlling the thickness and combination of triple-layer polymer dielectrics.
TMS communications hardware. Volume 1: Computer interfaces
NASA Technical Reports Server (NTRS)
Brown, J. S.; Weinrich, S. S.
1979-01-01
A prototpye coaxial cable bus communications system was designed to be used in the Trend Monitoring System (TMS) to connect intelligent graphics terminals (based around a Data General NOVA/3 computer) to a MODCOMP IV host minicomputer. The direct memory access (DMA) interfaces which were utilized for each of these computers are identified. It is shown that for the MODCOMP, an off-the-shell board was suitable, while for the NOVAs, custon interface circuitry was designed and implemented.
NASA Technical Reports Server (NTRS)
Bartram, Peter N.
1989-01-01
The current Life Sciences Laboratory Equipment (LSLE) microcomputer for life sciences experiment data acquisition is now obsolete. Among the weaknesses of the current microcomputer are small memory size, relatively slow analog data sampling rates, and the lack of a bulk data storage device. While life science investigators normally prefer data to be transmitted to Earth as it is taken, this is not always possible. No down-link exists for experiments performed in the Shuttle middeck region. One important aspect of a replacement microcomputer is provision for in-flight storage of experimental data. The Write Once, Read Many (WORM) optical disk was studied because of its high storage density, data integrity, and the availability of a space-qualified unit. In keeping with the goals for a replacement microcomputer based upon commercially available components and standard interfaces, the system studied includes a Small Computer System Interface (SCSI) for interfacing the WORM drive. The system itself is designed around the STD bus, using readily available boards. Configurations examined were: (1) master processor board and slave processor board with the SCSI interface; (2) master processor with SCSI interface; (3) master processor with SCSI and Direct Memory Access (DMA); (4) master processor controlling a separate STD bus SCSI board; and (5) master processor controlling a separate STD bus SCSI board with DMA.
2018-01-01
Stoichiometric balance, or dosage balance, implies that proteins that are subunits of obligate complexes (e.g. the ribosome) should have copy numbers expressed to match their stoichiometry in that complex. Establishing balance (or imbalance) is an important tool for inferring subunit function and assembly bottlenecks. We show here that these correlations in protein copy numbers can extend beyond complex subunits to larger protein-protein interactions networks (PPIN) involving a range of reversible binding interactions. We develop a simple method for quantifying balance in any interface-resolved PPINs based on network structure and experimentally observed protein copy numbers. By analyzing such a network for the clathrin-mediated endocytosis (CME) system in yeast, we found that the real protein copy numbers were significantly more balanced in relation to their binding partners compared to randomly sampled sets of yeast copy numbers. The observed balance is not perfect, highlighting both under and overexpressed proteins. We evaluate the potential cost and benefits of imbalance using two criteria. First, a potential cost to imbalance is that ‘leftover’ proteins without remaining functional partners are free to misinteract. We systematically quantify how this misinteraction cost is most dangerous for strong-binding protein interactions and for network topologies observed in biological PPINs. Second, a more direct consequence of imbalance is that the formation of specific functional complexes depends on relative copy numbers. We therefore construct simple kinetic models of two sub-networks in the CME network to assess multi-protein assembly of the ARP2/3 complex and a minimal, nine-protein clathrin-coated vesicle forming module. We find that the observed, imperfectly balanced copy numbers are less effective than balanced copy numbers in producing fast and complete multi-protein assemblies. However, we speculate that strategic imbalance in the vesicle forming module allows cells to tune where endocytosis occurs, providing sensitive control over cargo uptake via clathrin-coated vesicles. PMID:29518071
Holland, David O; Johnson, Margaret E
2018-03-01
Stoichiometric balance, or dosage balance, implies that proteins that are subunits of obligate complexes (e.g. the ribosome) should have copy numbers expressed to match their stoichiometry in that complex. Establishing balance (or imbalance) is an important tool for inferring subunit function and assembly bottlenecks. We show here that these correlations in protein copy numbers can extend beyond complex subunits to larger protein-protein interactions networks (PPIN) involving a range of reversible binding interactions. We develop a simple method for quantifying balance in any interface-resolved PPINs based on network structure and experimentally observed protein copy numbers. By analyzing such a network for the clathrin-mediated endocytosis (CME) system in yeast, we found that the real protein copy numbers were significantly more balanced in relation to their binding partners compared to randomly sampled sets of yeast copy numbers. The observed balance is not perfect, highlighting both under and overexpressed proteins. We evaluate the potential cost and benefits of imbalance using two criteria. First, a potential cost to imbalance is that 'leftover' proteins without remaining functional partners are free to misinteract. We systematically quantify how this misinteraction cost is most dangerous for strong-binding protein interactions and for network topologies observed in biological PPINs. Second, a more direct consequence of imbalance is that the formation of specific functional complexes depends on relative copy numbers. We therefore construct simple kinetic models of two sub-networks in the CME network to assess multi-protein assembly of the ARP2/3 complex and a minimal, nine-protein clathrin-coated vesicle forming module. We find that the observed, imperfectly balanced copy numbers are less effective than balanced copy numbers in producing fast and complete multi-protein assemblies. However, we speculate that strategic imbalance in the vesicle forming module allows cells to tune where endocytosis occurs, providing sensitive control over cargo uptake via clathrin-coated vesicles.
Kim, Eui-Hyun; Lee, Hyunbae; Kim, Jae-Hwan; Bae, Seung-Muk; Hwang, Heesu; Yang, Heesun; Choi, Eunsoo; Hwang, Jin-Ha
2018-02-22
Self-healing is an essential property of smart concrete structures. In contrast to other structural metals, shape memory alloys (SMAs) offer two unique effects: shape memory effects, and superelastic effects. Composites composed of SMA wires and conventional cements can overcome the mechanical weaknesses associated with tensile fractures in conventional concretes. Under specialized environments, the material interface between the cementitious component and the SMA materials plays an important role in achieving the enhanced mechanical performance and robustness of the SMA/cement interface. This material interface is traditionally evaluated in terms of mechanical aspects, i.e., strain-stress characteristics. However, the current work attempts to simultaneously characterize the mechanical load-displacement relationships synchronized with impedance spectroscopy as a function of displacement. Frequency-dependent impedance spectroscopy is tested as an in situ monitoring tool for structural variations in smart composites composed of non-conducting cementitious materials and conducting metals. The artificial geometry change in the SMA wires is associated with an improved anchoring action that is compatible with the smallest variation in resistance compared with prismatic SMA wires embedded into a cement matrix. The significant increase in resistance is interpreted to be associated with the slip of the SMA fibers following the elastic deformation and the debonding of the SMA fiber/matrix.
Giant Electroresistive Ferroelectric Diode on 2DEG
Kim, Shin-Ik; Jin Gwon, Hyo; Kim, Dai-Hong; Keun Kim, Seong; Choi, Ji-Won; Yoon, Seok-Jin; Jung Chang, Hye; Kang, Chong-Yun; Kwon, Beomjin; Bark, Chung-Wung; Hong, Seong-Hyeon; Kim, Jin-Sang; Baek, Seung-Hyub
2015-01-01
Manipulation of electrons in a solid through transmitting, storing, and switching is the fundamental basis for the microelectronic devices. Recently, the electroresistance effect in the ferroelectric capacitors has provided a novel way to modulate the electron transport by polarization reversal. Here, we demonstrate a giant electroresistive ferroelectric diode integrating a ferroelectric capacitor into two-dimensional electron gas (2DEG) at oxide interface. As a model system, we fabricate an epitaxial Au/Pb(Zr0.2Ti0.8)O3/LaAlO3/SrTiO3 heterostructure, where 2DEG is formed at LaAlO3/SrTiO3 interface. This device functions as a two-terminal, non-volatile memory of 1 diode-1 resistor with a large I+/I− ratio (>108 at ±6 V) and Ion/Ioff ratio (>107). This is attributed to not only Schottky barrier modulation at metal/ferroelectric interface by polarization reversal but also the field-effect metal-insulator transition of 2DEG. Moreover, using this heterostructure, we can demonstrate a memristive behavior for an artificial synapse memory, where the resistance can be continuously tuned by partial polarization switching, and the electrons are only unidirectionally transmitted. Beyond non-volatile memory and logic devices, our results will provide new opportunities to emerging electronic devices such as multifunctional nanoelectronics and neuromorphic electronics. PMID:26014446
System Framework for a Multi-Band, Multi-Mode Software Defined Radio
2014-06-01
detection, while the VITA Radio Transport ( VRT ) protocol over Gigabit Ethernet (GIGE) is implemented for the data interface. In addition to the SoC...CTRL VGA CTRL C2 GPP C2 CORE SW ARM0 RX SYN CTRL PL MEMORY MAP DR CTRL GENERIC INTERRUPT CONTROLLER DR GPP VITERBI ALGORITHM & VRT INTERFACE ARM1
BAOBAB: a Java editor for large phylogenetic trees.
Dutheil, J; Galtier, N
2002-06-01
BAOBAB is a Java user interface dedicated to viewing and editing large phylogenetic trees. Original features include: (i) a colour-mediated overview of magnified subtrees; (ii) copy/cut/paste of (sub)trees within or between windows; (iii) compressing/ uncompressing subtrees; and (iv) managing sequence files together with tree files. http://www.univ-montp2.fr/~genetix/.
Figure 2 from Integrative Genomics Viewer: Visualizing Big Data | Office of Cancer Genomics
Grouping and sorting genomic data in IGV. The IGV user interface displaying 202 glioblastoma samples from TCGA. Samples are grouped by tumor subtype (second annotation column) and data type (first annotation column) and sorted by copy number of the EGFR locus (middle column). Adapted from Figure 1; Robinson et al. 2011
Key-value store with internal key-value storage interface
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bent, John M.; Faibish, Sorin; Ting, Dennis P. J.
A key-value store is provided having one or more key-value storage interfaces. A key-value store on at least one compute node comprises a memory for storing a plurality of key-value pairs; and an abstract storage interface comprising a software interface module that communicates with at least one persistent storage device providing a key-value interface for persistent storage of one or more of the plurality of key-value pairs, wherein the software interface module provides the one or more key-value pairs to the at least one persistent storage device in a key-value format. The abstract storage interface optionally processes one or moremore » batch operations on the plurality of key-value pairs. A distributed embodiment for a partitioned key-value store is also provided.« less
Lins, Brittney R; Ballendine, Stephanie A; Howland, John G
2014-02-07
Temporal order memory refers to the ability to distinguish past experiences in the order that they occurred. Temporal order memory for objects is often tested in rodents using spontaneous object recognition paradigms. The circuitry mediating memory in these tests is distributed and involves ionotropic glutamate receptors in the perirhinal cortex and medial prefrontal cortex. It is unknown what role, if any, metabotropic glutamate receptors have in temporal order memory for objects. The present experiment examined the role of metabotropic glutamate receptors in temporal memory retrieval using the group II metabotropic glutamate receptor selective agonist LY379268. Rats were trained on a temporal memory test with three phases: two sample phases (60 min between them) in which rats explored two novel objects and a test phase (60 min after the second sample phase) which included a copy of each object previously encountered. Under these conditions, we confirmed that rats showed a significant exploratory preference for the object presented during the first sample phase. In a second experiment, we found that LY379268 (0.3, 1.0, or 3.0mg/kg; i.p.; 30 min before the test phase) had no effect on temporal memory retrieval but dose-dependently reduced time spent exploring the objects. Our results show that enhancing mGluR2 activity under conditions when TM is intact does not influence memory retrieval. Copyright © 2013 Elsevier Ireland Ltd. All rights reserved.
1983-10-19
knowledge -based symbolic reasoning, it nonetheless remains de- pendent on the lower levels of iconic processing for its raw information . Both sorts of...priori knowledge of where any particular line might go, and therefore no information regarding the extent of memory access required for the local...IC FILE COPY ,. c 4/t/7 ISG Report 104 IMAGE UNDERSTANDING RESEARCH Final Technical Report Covering Research Activity During the Period October 1
ERIC Educational Resources Information Center
Prontera, Paolo; Serino, Domenico; Caldini, Bernardo; Scarponi, Laura; Merla, Giuseppe; Testa, Giuseppe; Muti, Marco; Napolioni, Valerio; Mazzotta, Giovanni; Piccirilli, Massimo; Donti, Emilio
2014-01-01
The duplication of the Williams-Beuren syndrome (WBS) region (7q11.23) is a copy number variant associated with autism spectrum disorder (ASD). One of the most intriguing aspects is that the reciprocal microdeletion causes WBS, characterized by hypersociability, marked empathy, and a relative capacity in verbal short-term memory and language.…
DOE Office of Scientific and Technical Information (OSTI.GOV)
LITTENBERG, L.; RUBINSTEIN, R.; SAMIOS, N.
2000-05-19
On the afternoon of May 19 2000, a Memorial Seminar was held in the BNL physics Large Seminar Room to honor the memory of Ted Kyeia, a prominent particle physicist who had been a member of the BNL staff for 40 years. Although it was understandably a somewhat sad occasion because Ted was no longer with us, nevertheless there was much for his colleagues and friends to celebrate in recalling the outstanding contributions that he had made in those four decades. The Seminar speakers were all people who had worked with Ted during that period; each discussed one aspect ofmore » his career, but also included anecdotes and personal reminiscences. This booklet contains the Seminar program, listing the speakers, and also copies of transparencies of the talks (and one paper which was a later expansion of a talk); sadly, not all of the personal remarks appeared on the transparencies.« less
ERIC Educational Resources Information Center
Kock, Ned; Chatelain-Jardón, Ruth; Carmona, Jesus
2009-01-01
It seems that surprise events have the potential to turn short-term memories into long-term memories, an unusual phenomenon that may have limited but interesting applications in learning tasks. This surprise-enhanced cognition phenomenon is theoretically modeled based on the notion that many human mental traits have evolved through natural…
Hybrid quantum processors: molecular ensembles as quantum memory for solid state circuits.
Rabl, P; DeMille, D; Doyle, J M; Lukin, M D; Schoelkopf, R J; Zoller, P
2006-07-21
We investigate a hybrid quantum circuit where ensembles of cold polar molecules serve as long-lived quantum memories and optical interfaces for solid state quantum processors. The quantum memory realized by collective spin states (ensemble qubit) is coupled to a high-Q stripline cavity via microwave Raman processes. We show that, for convenient trap-surface distances of a few microm, strong coupling between the cavity and ensemble qubit can be achieved. We discuss basic quantum information protocols, including a swap from the cavity photon bus to the molecular quantum memory, and a deterministic two qubit gate. Finally, we investigate coherence properties of molecular ensemble quantum bits.
Holographic storage of biphoton entanglement.
Dai, Han-Ning; Zhang, Han; Yang, Sheng-Jun; Zhao, Tian-Ming; Rui, Jun; Deng, You-Jin; Li, Li; Liu, Nai-Le; Chen, Shuai; Bao, Xiao-Hui; Jin, Xian-Min; Zhao, Bo; Pan, Jian-Wei
2012-05-25
Coherent and reversible storage of multiphoton entanglement with a multimode quantum memory is essential for scalable all-optical quantum information processing. Although a single photon has been successfully stored in different quantum systems, storage of multiphoton entanglement remains challenging because of the critical requirement for coherent control of the photonic entanglement source, multimode quantum memory, and quantum interface between them. Here we demonstrate a coherent and reversible storage of biphoton Bell-type entanglement with a holographic multimode atomic-ensemble-based quantum memory. The retrieved biphoton entanglement violates the Bell inequality for 1 μs storage time and a memory-process fidelity of 98% is demonstrated by quantum state tomography.
Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory
NASA Astrophysics Data System (ADS)
Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa
2014-01-01
An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.
Memory Network For Distributed Data Processors
NASA Technical Reports Server (NTRS)
Bolen, David; Jensen, Dean; Millard, ED; Robinson, Dave; Scanlon, George
1992-01-01
Universal Memory Network (UMN) is modular, digital data-communication system enabling computers with differing bus architectures to share 32-bit-wide data between locations up to 3 km apart with less than one millisecond of latency. Makes it possible to design sophisticated real-time and near-real-time data-processing systems without data-transfer "bottlenecks". This enterprise network permits transmission of volume of data equivalent to an encyclopedia each second. Facilities benefiting from Universal Memory Network include telemetry stations, simulation facilities, power-plants, and large laboratories or any facility sharing very large volumes of data. Main hub of UMN is reflection center including smaller hubs called Shared Memory Interfaces.
The microstructural changes of Ge2Sb2Te5 thin film during crystallization process
NASA Astrophysics Data System (ADS)
Xu, Jingbo; Qi, Chao; Chen, Limin; Zheng, Long; Xie, Qiyun
2018-05-01
Phase change memory is known as the most promising candidate for the next generation nonvolatile memory technology. In this paper, the microstructural changes of Ge2Sb2Te5 film, which is the most common choice of phase change memory material, has been carefully studied by the combination of several characterization techniques. The combination of resistance measurements, X-ray diffraction, Raman spectroscopy and X-ray reflectivity allows us to simultaneously extract the characteristics of microstructural changes during crystallization process. The existence of surface/interface Ge2Sb2Te5 layer has been proposed here based on X-ray reflectivity measurements. Although the total film thickness decreases, as a result of the phase transition from amorphous to metastable crystalline cubic and then to the stable hexagonal phase, the surface/interface thickness increases after crystallization. Moreover, the increase of average grain size, density and surface roughness has been confirmed during thermal annealing process.
Improving the effectiveness of an interruption lag by inducing a memory-based strategy.
Morgan, Phillip L; Patrick, John; Tiley, Leyanne
2013-01-01
The memory for goals model (Altmann & Trafton, 2002) posits the importance of a short delay (the 'interruption lag') before an interrupting task to encode suspended goals for retrieval post-interruption. Two experiments used the theory of soft constraints (Gray, Simms, Fu & Schoelles, 2006) to investigate whether the efficacy of an interruption lag could be improved by increasing goal-state access cost to induce a more memory-based encoding strategy. Both experiments used a copying task with three access cost conditions (Low, Medium, and High) and a 5-s interruption lag with a no lag control condition. Experiment 1 found that the participants in the High access cost condition resumed more interrupted trials and executed more actions correctly from memory when coupled with an interruption lag. Experiment 2 used a prospective memory test post-interruption and an eyetracker recorded gaze activity during the interruption lag. The participants in the High access cost condition with an interruption lag were best at encoding target information during the interruption lag, evidenced by higher scores on the prospective memory measure and more gaze activity on the goal-state during the interruption lag. Theoretical and practical issues regarding the use of goal-state access cost and an interruption lag are discussed. Copyright © 2012. Published by Elsevier B.V.
Rose, Mark; Frampton, Ian J; Lask, Bryan
2014-01-01
The vast majority of studies in anorexia nervosa that have investigated the domains of central coherence, organizational strategy, and visuospatial memory have focused on adult samples. In addition, studies investigating visuospatial memory have focused on free recall. No study to date has reported the association between recognition memory and central coherence or organizational strategy in younger people with this disorder, yet the capacity to recognize previously seen visual stimuli may contribute to overall visuospatial ability. Therefore, we investigate these domains in children and adolescents with anorexia nervosa compared to age- and gender-matched healthy controls. There were no significant group differences in immediate, delayed, or recognition memory, central coherence, or organization strategy. When compared with controls, patients with anorexia nervosa scored significantly higher on accuracy and took significantly longer when copying the Rey Complex Figure Task. Caution must be taken when interpreting these findings due to lower-than-expected scores in memory performance in the control group and because of a potential lack of sensitivity in the measures used when assessing this younger population. For neuropsychological functions where no normative data exist, we need a deeper, more thorough knowledge of the developmental trajectory and its assessment in young people in the general population before drawing conclusions in anorexia nervosa.
Quantum memories: emerging applications and recent advances
NASA Astrophysics Data System (ADS)
Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.
2016-11-01
Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.
Quantum memories: emerging applications and recent advances.
Heshami, Khabat; England, Duncan G; Humphreys, Peter C; Bustard, Philip J; Acosta, Victor M; Nunn, Joshua; Sussman, Benjamin J
2016-11-12
Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.
Neuroanatomic organization of sound memory in humans.
Kraut, Michael A; Pitcock, Jeffery A; Calhoun, Vince; Li, Juan; Freeman, Thomas; Hart, John
2006-11-01
The neural interface between sensory perception and memory is a central issue in neuroscience, particularly initial memory organization following perceptual analyses. We used functional magnetic resonance imaging to identify anatomic regions extracting initial auditory semantic memory information related to environmental sounds. Two distinct anatomic foci were detected in the right superior temporal gyrus when subjects identified sounds representing either animals or threatening items. Threatening animal stimuli elicited signal changes in both foci, suggesting a distributed neural representation. Our results demonstrate both category- and feature-specific responses to nonverbal sounds in early stages of extracting semantic memory information from these sounds. This organization allows for these category-feature detection nodes to extract early, semantic memory information for efficient processing of transient sound stimuli. Neural regions selective for threatening sounds are similar to those of nonhuman primates, demonstrating semantic memory organization for basic biological/survival primitives are present across species.
Quantum memories: emerging applications and recent advances
Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.
2016-01-01
Quantum light–matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories. PMID:27695198
A wide bandwidth CCD buffer memory system
NASA Technical Reports Server (NTRS)
Siemens, K.; Wallace, R. W.; Robinson, C. R.
1978-01-01
A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.
A multiplexed light-matter interface for fibre-based quantum networks
Saglamyurek, Erhan; Grimau Puigibert, Marcelli; Zhou, Qiang; Giner, Lambert; Marsili, Francesco; Verma, Varun B.; Woo Nam, Sae; Oesterling, Lee; Nippa, David; Oblak, Daniel; Tittel, Wolfgang
2016-01-01
Processing and distributing quantum information using photons through fibre-optic or free-space links are essential for building future quantum networks. The scalability needed for such networks can be achieved by employing photonic quantum states that are multiplexed into time and/or frequency, and light-matter interfaces that are able to store and process such states with large time-bandwidth product and multimode capacities. Despite important progress in developing such devices, the demonstration of these capabilities using non-classical light remains challenging. Here, employing the atomic frequency comb quantum memory protocol in a cryogenically cooled erbium-doped optical fibre, we report the quantum storage of heralded single photons at a telecom-wavelength (1.53 μm) with a time-bandwidth product approaching 800. Furthermore, we demonstrate frequency-multimode storage and memory-based spectral-temporal photon manipulation. Notably, our demonstrations rely on fully integrated quantum technologies operating at telecommunication wavelengths. With improved storage efficiency, our light-matter interface may become a useful tool in future quantum networks. PMID:27046076
A multiplexed light-matter interface for fibre-based quantum networks.
Saglamyurek, Erhan; Grimau Puigibert, Marcelli; Zhou, Qiang; Giner, Lambert; Marsili, Francesco; Verma, Varun B; Woo Nam, Sae; Oesterling, Lee; Nippa, David; Oblak, Daniel; Tittel, Wolfgang
2016-04-05
Processing and distributing quantum information using photons through fibre-optic or free-space links are essential for building future quantum networks. The scalability needed for such networks can be achieved by employing photonic quantum states that are multiplexed into time and/or frequency, and light-matter interfaces that are able to store and process such states with large time-bandwidth product and multimode capacities. Despite important progress in developing such devices, the demonstration of these capabilities using non-classical light remains challenging. Here, employing the atomic frequency comb quantum memory protocol in a cryogenically cooled erbium-doped optical fibre, we report the quantum storage of heralded single photons at a telecom-wavelength (1.53 μm) with a time-bandwidth product approaching 800. Furthermore, we demonstrate frequency-multimode storage and memory-based spectral-temporal photon manipulation. Notably, our demonstrations rely on fully integrated quantum technologies operating at telecommunication wavelengths. With improved storage efficiency, our light-matter interface may become a useful tool in future quantum networks.
Interface methods for using intranet portal organizational memory information system.
Ji, Yong Gu; Salvendy, Gavriel
2004-12-01
In this paper, an intranet portal is considered as an information infrastructure (organizational memory information system, OMIS) supporting organizational learning. The properties and the hierarchical structure of information and knowledge in an intranet portal OMIS was identified as a problem for navigation tools of an intranet portal interface. The problem relates to navigation and retrieval functions of intranet portal OMIS and is expected to adversely affect user performance, satisfaction, and usefulness. To solve the problem, a conceptual model for navigation tools of an intranet portal interface was proposed and an experiment using a crossover design was conducted with 10 participants. In the experiment, a separate access method (tabbed tree tool) was compared to an unified access method (single tree tool). The results indicate that each information/knowledge repository for which a user has a different structural knowledge should be handled separately with a separate access to increase user satisfaction and the usefulness of the OMIS and to improve user performance in navigation.
Interactive communication channel
NASA Astrophysics Data System (ADS)
Chan, R. H.; Mann, M. R.; Ciarrocchi, J. A.
1985-10-01
Discussed is an interactive communications channel (ICC) for providing a digital computer with high-performance multi-channel interfaces. Sixteen full duplex channels can be serviced in the ICC with the sequence or scan pattern being programmable and dependent upon the number or channels and their speed. A channel buffer system is used for line interface, and character exchange. The channel buffer system is on a byte basis. The ICC performs frame start and frame end functions, bit stripping and bit stuffing. Data is stored in a memory in block format (256 bytes maximum) by a program control and the ICC maintains byte address information and a block byte count. Data exchange with a memory is made by cycle steals. Error detection is also provided for using a cyclic redundancy check technique.
The atomic level structure of the TiO(2)-NiTi interface.
Nolan, M; Tofail, S A M
2010-09-07
The biocompatibility of NiTi shape memory alloys (SMA) has made possible applications in invasive and minimally invasive biomedical devices. The NiTi intermetallic alloy spontaneously forms a thin passive layer of TiO(2), which provides its biocompatibility. The oxide layer is thought to form as Ti in the alloy reacts with oxygen. In this paper, we study the details of the oxide-alloy interface. The atomic model is the (110) NiTi surface interfaced with the (100) rutile TiO(2) surface; this combination provides the best lattice match of alloy and oxide. When the interface forms, static minimisations and molecular dynamics show that there is no migration of atoms between the alloy and the oxide. In the alloy there are some notable structural relaxations. We find that a columnar structure appears in which alternating long and short Ni-Ti bonds are present in each surface and subsurface plane into the fourth subsurface layer. The oxide undergoes some structural changes as a result of terminal oxygen coordinating to Ti in the NiTi surface. The electronic structure shows that Ti(3+) species are present at the interface, with Ti(4+) in the bulk of the oxide layer and that the metallic character of the alloy is unaffected by the interaction with oxygen, all of which is consistent with experiment. A thermodynamic analysis is used to examine the stability of different possible structures-a perfect interface and one with Ti and O vacancies. We find that under conditions typical of oxidation and shape memory treatments, the most stable interface structure is that with Ti vacancies in the alloy surface, leaving an Ni-rich layer, consistent with the experimental findings for this interface.
Structure and properties of a model conductive filament/host oxide interface in HfO2-based ReRAM
NASA Astrophysics Data System (ADS)
Padilha, A. C. M.; McKenna, K. P.
2018-04-01
Resistive random-access memory (ReRAM) is a promising class of nonvolatile memory capable of storing information via its resistance state. In the case of hafnium oxide-based devices, experimental evidence shows that a conductive oxygen-deficient filament is formed and broken inside of the device by oxygen migration, leading to switching of its resistance state. However, little is known about the nature of this conductive phase, its interface with the host oxide, or the associated interdiffusion of oxygen, presenting a challenge to understanding the switching mechanism and device properties. To address these problems, we present atomic-scale first-principles simulations of a prototypical conductive phase (HfO), the electronic properties of its interface with HfO2, as well as stability with respect to oxygen diffusion across the interface. We show that the conduction-band offset between HfO and HfO2 is 1.3 eV, smaller than typical electrode-HfO2 band offsets, suggesting that positive charging and band bending should occur at the conductive filament-HfO2 interface. We also show that transfer of oxygen across the interface, from HfO2 into HfO, costs around 1.2 eV per atom and leads to a gradual opening of the HfO band gap, and hence disruption of the electrical conductivity. These results provide invaluable insights into understanding the switching mechanism for HfO2-based ReRAM.
NASA Astrophysics Data System (ADS)
Dasari, Venkat R.; Sadlier, Ronald J.; Geerhart, Billy E.; Snow, Nikolai A.; Williams, Brian P.; Humble, Travis S.
2017-05-01
Well-defined and stable quantum networks are essential to realize functional quantum communication applications. Quantum networks are complex and must use both quantum and classical channels to support quantum applications like QKD, teleportation, and superdense coding. In particular, the no-cloning theorem prevents the reliable copying of quantum signals such that the quantum and classical channels must be highly coordinated using robust and extensible methods. In this paper, we describe new network abstractions and interfaces for building programmable quantum networks. Our approach leverages new OpenFlow data structures and table type patterns to build programmable quantum networks and to support quantum applications.
A brain computer interface-based explorer.
Bai, Lijuan; Yu, Tianyou; Li, Yuanqing
2015-04-15
In recent years, various applications of brain computer interfaces (BCIs) have been studied. In this paper, we present a hybrid BCI combining P300 and motor imagery to operate an explorer. Our system is mainly composed of a BCI mouse, a BCI speller and an explorer. Through this system, the user can access his computer and manipulate (open, close, copy, paste, and delete) files such as documents, pictures, music, movies and so on. The system has been tested with five subjects, and the experimental results show that the explorer can be successfully operated according to subjects' intentions. Copyright © 2014 Elsevier B.V. All rights reserved.
78 FR 11129 - Office of Engineering and Technology Seeks Comment on Updated OET-69 Software
Federal Register 2010, 2011, 2012, 2013, 2014
2013-02-15
... cell level, and also speeds calculations since the study grid only needs to be established one time... who choose to file by paper must file an original and one copy of each filing. If more than one docket... interface (implemented in Java), used to establish the parameters of the study and which draws data from...
Daig, Isolde; Mahlberg, Richard; Schroeder, Franziska; Gudlowski, Yehonala; Wrase, Jana; Wertenauer, Florian; Bschor, Tom; Esser, Guenter; Heinz, Andreas; Kienast, Thorsten
2010-12-14
Alcohol-dependent patients in early abstinence show an impairment of cognitive functions which can be seen in poor implementation of newly learned skills for avoiding relapse. Executive dysfunction may persist during abstinence in alcohol-dependent persons, thus mitigating long-term abstinence. This study assessed visual memory function and choice of organizational strategies in alcoholics, as these are major factors necessary to implement ongoing behavior changes which are required for maintaining abstinence. We investigated 25 severely alcohol-dependent male patients between days 7 to 10 of abstinence, immediately after clinical withdrawal symptoms have ceased, compared to 15 healthy age, sex, and education matched controls. Pharmacological therapy had been terminated at least four half-lifes before inclusion into the study. Visual perceptual learning and organizational strategies were assessed with the Rey-Osterrieth Complex Figure Test (R-OCF). There were no group differences in copying or recalling the figure, but time differences occurred. Alcoholics and healthy controls performed worse in recalling than in copying. But, alcoholics used less effective organizational strategies. There was a deficit in choice of organizational strategy in newly abstinent and unmedicated alcohol-dependent patients. Due to the imperfect organizational strategies, alcoholics might need auxiliary therapeutic care to strengthen their cognitive ability.
The role of retrieval practice in memory and analogical problem-solving.
Hostetter, Autumn B; Penix, Elizabeth A; Norman, Mackenzie Z; Batsell, W Robert; Carr, Thomas H
2018-05-01
Retrieval practice (e.g., testing) has been shown to facilitate long-term retention of information. In two experiments, we examine whether retrieval practice also facilitates use of the practised information when it is needed to solve analogous problems. When retrieval practice was not limited to the information most relevant to the problems (Experiment 1), it improved memory for the information a week later compared with copying or rereading the information, although we found no evidence that it improved participants' ability to apply the information to the problems. In contrast, when retrieval practice was limited to only the information most relevant to the problems (Experiment 2), we found that retrieval practice enhanced memory for the critical information, the ability to identify the schematic similarities between the two sources of information, and the ability to apply that information to solve an analogous problem after a hint was given to do so. These results suggest that retrieval practice, through its effect on memory, can facilitate application of information to solve novel problems but has minimal effects on spontaneous realisation that the information is relevant.
Thermodynamic framework for information in nanoscale systems with memory
NASA Astrophysics Data System (ADS)
Arias-Gonzalez, J. Ricardo
2017-11-01
Information is represented by linear strings of symbols with memory that carry errors as a result of their stochastic nature. Proofreading and edition are assumed to improve certainty although such processes may not be effective. Here, we develop a thermodynamic theory for material chains made up of nanoscopic subunits with symbolic meaning in the presence of memory. This framework is based on the characterization of single sequences of symbols constructed under a protocol and is used to derive the behavior of ensembles of sequences similarly constructed. We then analyze the role of proofreading and edition in the presence of memory finding conditions to make revision an effective process, namely, to decrease the entropy of the chain. Finally, we apply our formalism to DNA replication and RNA transcription finding that Watson and Crick hybridization energies with which nucleotides are branched to the template strand during the copying process are optimal to regulate the fidelity in proofreading. These results are important in applications of information theory to a variety of solid-state physical systems and other biomolecular processes.
Neural mechanisms of vocal imitation: The role of sleep replay in shaping mirror neurons.
Giret, Nicolas; Edeline, Jean-Marc; Del Negro, Catherine
2017-06-01
Learning by imitation involves not only perceiving another individual's action to copy it, but also the formation of a memory trace in order to gradually establish a correspondence between the sensory and motor codes, which represent this action through sensorimotor experience. Memory and sensorimotor processes are closely intertwined. Mirror neurons, which fire both when the same action is performed or perceived, have received considerable attention in the context of imitation. An influential view of memory processes considers that the consolidation of newly acquired information or skills involves an active offline reprocessing of memories during sleep within the neuronal networks that were initially used for encoding. Here, we review the recent advances in the field of mirror neurons and offline processes in the songbird. We further propose a theoretical framework that could establish the neurobiological foundations of sensorimotor learning by imitation. We propose that the reactivation of neuronal assemblies during offline periods contributes to the integration of sensory feedback information and the establishment of sensorimotor mirroring activity at the neuronal level. Copyright © 2017 Elsevier Ltd. All rights reserved.
A neural network model of memory and higher cognitive functions.
Vogel, David D
2005-01-01
I first describe a neural network model of associative memory in a small region of the brain. The model depends, unconventionally, on disinhibition of inhibitory links between excitatory neurons rather than long-term potentiation (LTP) of excitatory projections. The model may be shown to have advantages over traditional neural network models both in terms of information storage capacity and biological plausibility. The learning and recall algorithms are independent of network architecture, and require no thresholds or finely graded synaptic strengths. Several copies of this local network are then connected by means of many, weak, reciprocal, excitatory projections that allow one region to control the recall of information in another to produce behaviors analogous to serial memory, classical and operant conditioning, secondary reinforcement, refabrication of memory, and fabrication of possible future events. The network distinguishes between perceived and recalled events, and can predicate its response on the absence as well as the presence of particular stimuli. Some of these behaviors are achieved in ways that seem to provide instances of self-awareness and imagination, suggesting that consciousness may emerge as an epiphenomenon in simple brains.
Thermodynamic framework for information in nanoscale systems with memory.
Arias-Gonzalez, J Ricardo
2017-11-28
Information is represented by linear strings of symbols with memory that carry errors as a result of their stochastic nature. Proofreading and edition are assumed to improve certainty although such processes may not be effective. Here, we develop a thermodynamic theory for material chains made up of nanoscopic subunits with symbolic meaning in the presence of memory. This framework is based on the characterization of single sequences of symbols constructed under a protocol and is used to derive the behavior of ensembles of sequences similarly constructed. We then analyze the role of proofreading and edition in the presence of memory finding conditions to make revision an effective process, namely, to decrease the entropy of the chain. Finally, we apply our formalism to DNA replication and RNA transcription finding that Watson and Crick hybridization energies with which nucleotides are branched to the template strand during the copying process are optimal to regulate the fidelity in proofreading. These results are important in applications of information theory to a variety of solid-state physical systems and other biomolecular processes.
General-Purpose Serial Interface For Remote Control
NASA Technical Reports Server (NTRS)
Busquets, Anthony M.; Gupton, Lawrence E.
1990-01-01
Computer controls remote television camera. General-purpose controller developed to serve as interface between host computer and pan/tilt/zoom/focus functions on series of automated video cameras. Interface port based on 8251 programmable communications-interface circuit configured for tristated outputs, and connects controller system to any host computer with RS-232 input/output (I/O) port. Accepts byte-coded data from host, compares them with prestored codes in read-only memory (ROM), and closes or opens appropriate switches. Six output ports control opening and closing of as many as 48 switches. Operator controls remote television camera by speaking commands, in system including general-purpose controller.
Cabbage, Kathryn; Brinkley, Shara; Gray, Shelley; Alt, Mary; Cowan, Nelson; Green, Samuel; Kuo, Trudy; Hogan, Tiffany P
2017-06-12
The Comprehensive Assessment Battery for Children - Working Memory (CABC-WM) is a computer-based battery designed to assess different components of working memory in young school-age children. Working memory deficits have been identified in children with language-based learning disabilities, including dyslexia 1 , 2 and language impairment 3 , 4 , but it is not clear whether these children exhibit deficits in subcomponents of working memory, such as visuospatial or phonological working memory. The CABC-WM is administered on a desktop computer with a touchscreen interface and was specifically developed to be engaging and motivating for children. Although the long-term goal of the CABC-WM is to provide individualized working memory profiles in children, the present study focuses on the initial success and utility of the CABC-WM for measuring central executive, visuospatial, phonological loop, and binding constructs in children with typical development. Immediate next steps are to administer the CABC-WM to children with specific language impairment, dyslexia, and comorbid specific language impairment and dyslexia.
[Working memory and work with memory: visual-spatial and further components of processing].
Velichkovsky, B M; Challis, B H; Pomplun, M
1995-01-01
Empirical and theoretical evidence for the concept of working memory is considered. We argue that the major weakness of this concept is its loose connection with the knowledge about background perceptive and cognitive processes. Results of two relevant experiments are provided. The first study demonstrated the classical chunking effect in a speeded visual search and comparison task, the proper domain of a large-capacity very short term sensory store. Our second study was a kind of extended levels-of-processing experiment. We attempted to manipulate visual, phonological, and (different) executive components of long-term memory in the hope of finding some systematic relationships between these forms of processing. Indeed, the results demonstrated a high degree of systematicity without any apparent need for a concept such as working memory for the explanation. Accordingly, the place for working memory is at all the interfaces where our metacognitive strategies interfere with mostly domain-specific cognitive mechanisms. Working memory is simply our work with memory.
Optoelectronic-cache memory system architecture.
Chiarulli, D M; Levitan, S P
1996-05-10
We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.
Fetterhoff, Dustin; Opris, Ioan; Simpson, Sean L.; Deadwyler, Sam A.; Hampson, Robert E.; Kraft, Robert A.
2014-01-01
Background Multifractal analysis quantifies the time-scale-invariant properties in data by describing the structure of variability over time. By applying this analysis to hippocampal interspike interval sequences recorded during performance of a working memory task, a measure of long-range temporal correlations and multifractal dynamics can reveal single neuron correlates of information processing. New method Wavelet leaders-based multifractal analysis (WLMA) was applied to hippocampal interspike intervals recorded during a working memory task. WLMA can be used to identify neurons likely to exhibit information processing relevant to operation of brain–computer interfaces and nonlinear neuronal models. Results Neurons involved in memory processing (“Functional Cell Types” or FCTs) showed a greater degree of multifractal firing properties than neurons without task-relevant firing characteristics. In addition, previously unidentified FCTs were revealed because multifractal analysis suggested further functional classification. The cannabinoid-type 1 receptor partial agonist, tetrahydrocannabinol (THC), selectively reduced multifractal dynamics in FCT neurons compared to non-FCT neurons. Comparison with existing methods WLMA is an objective tool for quantifying the memory-correlated complexity represented by FCTs that reveals additional information compared to classification of FCTs using traditional z-scores to identify neuronal correlates of behavioral events. Conclusion z-Score-based FCT classification provides limited information about the dynamical range of neuronal activity characterized by WLMA. Increased complexity, as measured with multifractal analysis, may be a marker of functional involvement in memory processing. The level of multifractal attributes can be used to differentially emphasize neural signals to improve computational models and algorithms underlying brain–computer interfaces. PMID:25086297
England, Duncan G; Fisher, Kent A G; MacLean, Jean-Philippe W; Bustard, Philip J; Lausten, Rune; Resch, Kevin J; Sussman, Benjamin J
2015-02-06
We report the storage and retrieval of single photons, via a quantum memory, in the optical phonons of a room-temperature bulk diamond. The THz-bandwidth heralded photons are generated by spontaneous parametric down-conversion and mapped to phonons via a Raman transition, stored for a variable delay, and released on demand. The second-order correlation of the memory output is g((2))(0)=0.65±0.07, demonstrating a preservation of nonclassical photon statistics throughout storage and retrieval. The memory is low noise, high speed and broadly tunable; it therefore promises to be a versatile light-matter interface for local quantum processing applications.
A microcomputer interface for a digital audio processor-based data recording system.
Croxton, T L; Stump, S J; Armstrong, W M
1987-10-01
An inexpensive interface is described that performs direct transfer of digitized data from the digital audio processor and video cassette recorder based data acquisition system designed by Bezanilla (1985, Biophys. J., 47:437-441) to an IBM PC/XT microcomputer. The FORTRAN callable software that drives this interface is capable of controlling the video cassette recorder and starting data collection immediately after recognition of a segment of previously collected data. This permits piecewise analysis of long intervals of data that would otherwise exceed the memory capability of the microcomputer.
A microcomputer interface for a digital audio processor-based data recording system.
Croxton, T L; Stump, S J; Armstrong, W M
1987-01-01
An inexpensive interface is described that performs direct transfer of digitized data from the digital audio processor and video cassette recorder based data acquisition system designed by Bezanilla (1985, Biophys. J., 47:437-441) to an IBM PC/XT microcomputer. The FORTRAN callable software that drives this interface is capable of controlling the video cassette recorder and starting data collection immediately after recognition of a segment of previously collected data. This permits piecewise analysis of long intervals of data that would otherwise exceed the memory capability of the microcomputer. PMID:3676444
A High Performance Micro Channel Interface for Real-Time Industrial Image Processing
Thomas H. Drayer; Joseph G. Tront; Richard W. Conners
1995-01-01
Data collection and transfer devices are critical to the performance of any machine vision system. The interface described in this paper collects image data from a color line scan camera and transfers the data obtained into the system memory of a Micro Channel-based host computer. A maximum data transfer rate of 20 Mbytes/sec can be achieved using the DMA capabilities...
shinyheatmap: Ultra fast low memory heatmap web interface for big data genomics.
Khomtchouk, Bohdan B; Hennessy, James R; Wahlestedt, Claes
2017-01-01
Transcriptomics, metabolomics, metagenomics, and other various next-generation sequencing (-omics) fields are known for their production of large datasets, especially across single-cell sequencing studies. Visualizing such big data has posed technical challenges in biology, both in terms of available computational resources as well as programming acumen. Since heatmaps are used to depict high-dimensional numerical data as a colored grid of cells, efficiency and speed have often proven to be critical considerations in the process of successfully converting data into graphics. For example, rendering interactive heatmaps from large input datasets (e.g., 100k+ rows) has been computationally infeasible on both desktop computers and web browsers. In addition to memory requirements, programming skills and knowledge have frequently been barriers-to-entry for creating highly customizable heatmaps. We propose shinyheatmap: an advanced user-friendly heatmap software suite capable of efficiently creating highly customizable static and interactive biological heatmaps in a web browser. shinyheatmap is a low memory footprint program, making it particularly well-suited for the interactive visualization of extremely large datasets that cannot typically be computed in-memory due to size restrictions. Also, shinyheatmap features a built-in high performance web plug-in, fastheatmap, for rapidly plotting interactive heatmaps of datasets as large as 105-107 rows within seconds, effectively shattering previous performance benchmarks of heatmap rendering speed. shinyheatmap is hosted online as a freely available web server with an intuitive graphical user interface: http://shinyheatmap.com. The methods are implemented in R, and are available as part of the shinyheatmap project at: https://github.com/Bohdan-Khomtchouk/shinyheatmap. Users can access fastheatmap directly from within the shinyheatmap web interface, and all source code has been made publicly available on Github: https://github.com/Bohdan-Khomtchouk/fastheatmap.
Demonstration of holographic smart card system using the optical memory technology
NASA Astrophysics Data System (ADS)
Kim, JungHoi; Choi, JaeKwang; An, JunWon; Kim, Nam; Lee, KwonYeon; Jeon, SeckHee
2003-05-01
In this paper, we demonstrate the holographic smart card system using digital holographic memory technique that uses reference beam encrypted by the random phase mask to prevent unauthorized users from accessing the stored digital page. The input data that include document data, a picture of face, and a fingerprint for identification is encoded digitally and then coupled with the reference beam modulated by a random phase mask. Therefore, this proposed system can execute recording in the order of MB~GB and readout all personal information from just one card without any additional database system. Also, recorded digital holograms can't be reconstructed without a phase key and can't be copied by using computers, scanners, or photography.
Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier.
Ahn, Chiyui; Fong, Scott W; Kim, Yongsung; Lee, Seunghyun; Sood, Aditya; Neumann, Christopher M; Asheghi, Mehdi; Goodson, Kenneth E; Pop, Eric; Wong, H-S Philip
2015-10-14
Phase-change memory (PCM) is an important class of data storage, yet lowering the programming current of individual devices is known to be a significant challenge. Here we improve the energy-efficiency of PCM by placing a graphene layer at the interface between the phase-change material, Ge2Sb2Te5 (GST), and the bottom electrode (W) heater. Graphene-PCM (G-PCM) devices have ∼40% lower RESET current compared to control devices without the graphene. This is attributed to the graphene as an added interfacial thermal resistance which helps confine the generated heat inside the active PCM volume. The G-PCM achieves programming up to 10(5) cycles, and the graphene could further enhance the PCM endurance by limiting atomic migration or material segregation at the bottom electrode interface.
NASA Astrophysics Data System (ADS)
Wu, Xinghui; Zhang, Qiuhui; Cui, Nana; Xu, Weiwei; Wang, Kefu; Jiang, Wei; Xu, Qixing
2018-06-01
In this paper, we report our investigation of room-temperature-fabricated tungsten/indium tin oxide/gold (W/ITO/Au) resistive random access memory (RRAM), which exhibits asymmetric bipolar resistive switching (BRS) behavior. The device displays good write/erase endurance and data retention properties. The device shows complementary resistive switching (CRS) characteristics after controlling the compliance current. A WO x layer electrically formed at the W/ITO in the forming process. Mobile oxygen ions within ITO migrate toward the electrode/ITO interface and produce a semiconductor-like layer that acts as a free-carrier barrier. The CRS characteristic here can be elucidated in light of the evolution of an asymmetric free-carrier blocking layer at the electrode/ITO interface.
Tian, He; Chen, Hong-Yu; Gao, Bin; Yu, Shimeng; Liang, Jiale; Yang, Yi; Xie, Dan; Kang, Jinfeng; Ren, Tian-Ling; Zhang, Yuegang; Wong, H-S Philip
2013-02-13
In this paper, we employed Ramen spectroscopy to monitor oxygen movement at the electrode/oxide interface by inserting single-layer graphene (SLG). Raman area mapping and single-point measurements show noticeable changes in the D-band, G-band, and 2D-band signals of the SLG during consecutive electrical programming repeated for nine cycles. In addition, the inserted SLG enables the reduction of RESET current by 22 times and programming power consumption by 47 times. Collectively, our results show that monitoring the oxygen movement by Raman spectroscopy for a resistive random access memory (RRAM) is made possible by inserting a single-layer graphene at electrode/oxide interface. This may open up an important analysis tool for investigation of switching mechanism of RRAM.
Advanced aerosense display interfaces
NASA Astrophysics Data System (ADS)
Hopper, Darrel G.; Meyer, Frederick M.
1998-09-01
High-resolution display technologies are being developed to meet the ever-increasing demand for realistic detail. The requirement for evermore visual information exceeds the capacity of fielded aerospace display interfaces. In this paper we begin an exploration of display interfaces and evolving aerospace requirements. Current and evolving standards for avionics, commercial, and flat panel displays are summarized and compared to near term goals for military and aerospace applications. Aerospace and military applications prior to 2005 up to UXGA and digital HDTV resolution can be met by using commercial interface standard developments. Advanced aerospace requirements require yet higher resolutions (2560 X 2048 color pixels, 5120 X 4096 color pixels at 85 Hz, etc.) and necessitate the initiation of discussion herein of an 'ultra digital interface standard (UDIS)' which includes 'smart interface' features such as large memory and blazingly fast resizing microcomputer. Interface capacity, IT, increased about 105 from 1973 to 1998; 102 more is needed for UDIS.
An implementation and evaluation of the MPI 3.0 one-sided communication interface
Dinan, James S.; Balaji, Pavan; Buntinas, Darius T.; ...
2016-01-09
The Q1 Message Passing Interface (MPI) 3.0 standard includes a significant revision to MPI’s remote memory access (RMA) interface, which provides support for one-sided communication. MPI-3 RMA is expected to greatly enhance the usability and performance ofMPI RMA.We present the first complete implementation of MPI-3 RMA and document implementation techniques and performance optimization opportunities enabled by the new interface. Our implementation targets messaging-based networks and is publicly available in the latest release of the MPICH MPI implementation. Here using this implementation, we explore the performance impact of new MPI-3 functionality and semantics. Results indicate that the MPI-3 RMA interface providesmore » significant advantages over the MPI-2 interface by enabling increased communication concurrency through relaxed semantics in the interface and additional routines that provide new window types, synchronization modes, and atomic operations.« less
An implementation and evaluation of the MPI 3.0 one-sided communication interface
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dinan, James S.; Balaji, Pavan; Buntinas, Darius T.
The Q1 Message Passing Interface (MPI) 3.0 standard includes a significant revision to MPI’s remote memory access (RMA) interface, which provides support for one-sided communication. MPI-3 RMA is expected to greatly enhance the usability and performance ofMPI RMA.We present the first complete implementation of MPI-3 RMA and document implementation techniques and performance optimization opportunities enabled by the new interface. Our implementation targets messaging-based networks and is publicly available in the latest release of the MPICH MPI implementation. Here using this implementation, we explore the performance impact of new MPI-3 functionality and semantics. Results indicate that the MPI-3 RMA interface providesmore » significant advantages over the MPI-2 interface by enabling increased communication concurrency through relaxed semantics in the interface and additional routines that provide new window types, synchronization modes, and atomic operations.« less
Interface Engineering for Nanoelectronics.
Hacker, C A; Bruce, R C; Pookpanratana, S J
2017-01-01
Innovation in the electronics industry is tied to interface engineering as devices increasingly incorporate new materials and shrink. Molecular layers offer a versatile means of tuning interfacial electronic, chemical, physical, and magnetic properties enabled by a wide variety of molecules available. This paper will describe three instances where we manipulate molecular interfaces with a specific focus on the nanometer scale characterization and the impact on the resulting performance. The three primary themes include, 1-designer interfaces, 2-electronic junction formation, and 3-advancing metrology for nanoelectronics. We show the ability to engineer interfaces through a variety of techniques and demonstrate the impact on technologies such as molecular memory and spin injection for organic electronics. Underpinning the successful modification of interfaces is the ability to accurately characterize the chemical and electronic properties and we will highlight some measurement advances key to our understanding of the interface engineering for nanoelectronics.
Interface Engineering for Nanoelectronics
Hacker, C. A.; Bruce, R. C.; Pookpanratana, S. J.
2017-01-01
Innovation in the electronics industry is tied to interface engineering as devices increasingly incorporate new materials and shrink. Molecular layers offer a versatile means of tuning interfacial electronic, chemical, physical, and magnetic properties enabled by a wide variety of molecules available. This paper will describe three instances where we manipulate molecular interfaces with a specific focus on the nanometer scale characterization and the impact on the resulting performance. The three primary themes include, 1-designer interfaces, 2-electronic junction formation, and 3-advancing metrology for nanoelectronics. We show the ability to engineer interfaces through a variety of techniques and demonstrate the impact on technologies such as molecular memory and spin injection for organic electronics. Underpinning the successful modification of interfaces is the ability to accurately characterize the chemical and electronic properties and we will highlight some measurement advances key to our understanding of the interface engineering for nanoelectronics. PMID:29276553
Low-Complexity Discriminative Feature Selection From EEG Before and After Short-Term Memory Task.
Behzadfar, Neda; Firoozabadi, S Mohammad P; Badie, Kambiz
2016-10-01
A reliable and unobtrusive quantification of changes in cortical activity during short-term memory task can be used to evaluate the efficacy of interfaces and to provide real-time user-state information. In this article, we investigate changes in electroencephalogram signals in short-term memory with respect to the baseline activity. The electroencephalogram signals have been analyzed using 9 linear and nonlinear/dynamic measures. We applied statistical Wilcoxon examination and Davis-Bouldian criterion to select optimal discriminative features. The results show that among the features, the permutation entropy significantly increased in frontal lobe and the occipital second lower alpha band activity decreased during memory task. These 2 features reflect the same mental task; however, their correlation with memory task varies in different intervals. In conclusion, it is suggested that the combination of the 2 features would improve the performance of memory based neurofeedback systems. © EEG and Clinical Neuroscience Society (ECNS) 2016.
Four-Channel PC/104 MIL-STD-1553 Circuit Board
NASA Technical Reports Server (NTRS)
Cox, Gary L.
2004-01-01
The mini bus interface card (miniBIC) is the first four-channel electronic circuit board that conforms to MIL-STD-1553 and to the electrical-footprint portion of PC/104. [MIL-STD-1553 is a military standard that encompasses a method of communication and electrical- interface requirements for digital electronic subsystems connected to a data bus. PC/104 is an industry standard for compact, stackable modules that are fully compatible (in architecture, hardware, and software) with personal-computer data- and power-bus circuitry.] Prior to the development of the miniBIC, only one- and two-channel PC/104 MIL-STD-1553 boards were available. To obtain four channels, it was necessary to include at least two boards in a PC/104 stack. In comparison with such a two-board stack, the miniBIC takes up less space, consumes less power, and is more reliable. In addition, the miniBIC includes 32 digital input/output channels. The miniBIC (see figure) contains four MIL-STD-1553B hybrid integrated circuits (ICs), four transformers, a field-programmable gate array (FPGA), and an Industry Standard Architecture (ISA) interface. Each hybrid IC includes a MILSTD-1553 dual transceiver, memory-management circuitry, processor interface logic circuitry, and 64Kx16 bits of shared static random access memory. The memory is used to configure message and data blocks. In addition, 23 16-bit registers are available for (1) configuring the hybrid IC for, and starting it in, various modes of operation; (2) reading the status of the functionality of the hybrid IC; and (3) resetting the hybrid IC to a known state. The miniBIC can operate as a remote terminal, bus controller, or bus monitor. The FPGA provides the chip-select and data-strobe signals needed for operation of the hybrid ICs. The FPGA also receives interruption signals and forwards them to the ISA bus. The ISA interface connects the address, data, and control interfaces of the hybrid ICs to the ISA backplane. Each channel is, in effect, a MIL-STD-1553 interface that can operate either independently of the others or else as a redundant version of one of the others. The transformer in each channel provides electrical isolation between the rest of the miniBIC circuitry and the bus to which that channel is connected.
Coupling device with improved thermal interface
NASA Astrophysics Data System (ADS)
Milam, Malcolm Bruce
1992-04-01
The primary object of the present invention is to provide a simple, reliable, and lightweight coupling that will also have an efficient thermal interface. A further object of the invention is to provide a coupling that is capable of blind mating with little or no insertion forces. Another object of the invention is to provide a coupling that acts as a thermal regulator to maintain a constant temperature on one side of the coupling. Another object of the invention is to increase the available surface area of a coupling thus providing a larger area for the conduction of heat across the thermal interface. Another object of the invention is to provide a fluidic coupling that has no fluid passing across the interface, thus reducing the likelihood of leaks and contamination. The foregoing objects are achieved by utilizing, as in the prior art, a hot area (at an elevated temperature as compared to a cold area) with a need to remove excess heat from the hot area to a cold area. In this device, the thermal interface will occur not on a planar horizontal surface, but along a non-planar vertical surface, which will reduce the reaction forces and increase the thermal conductivity of the device. One non-planar surface is a surface on a cold pin extending from the cold area and the other non-planar surface is a surface on a hot pin extending from the hot area. The cold pin is fixed and does not move while the hot pin is a flexible member and its movement towards the cold pin will bring the two non-planar surfaces together forming the thermal interface. The actuating member for the device is a shape-memory actuation wire which is attached through an aperture to the hot pin and through another aperture to an actuation wire retainer. By properly programming the actuation wire, heat from the hot area will cause the actuation wire to bend the hot wire. Heat from the hot area will cause the actuation wire to bend the hot pin towards the cold pin forming the coupling and the desired thermal interface. The shape-memory actuation wire is made of a shape-memory-effect alloy such as Nitinol.
1983-12-01
4 Multiuser Support ...... .......... 11-5 User Interface . .. .. ................ .. 11- 7 Inter -user Communications ................ 11- 7 Memory...user will greatly help facilitate the learning process. Inter -User Communication The inter -user communications of the operating system can be done using... inter -user communications would be met by using one or both of them. AMemory and File Management Memory and file management is concerned with four basic
Extending Mondrian Memory Protection
2010-11-01
a kernel semaphore is locked or unlocked. In addition, we extended the system call interface to receive notifications about user-land locking...operations (such as calls to the mutex and semaphore code provided by the C library). By patching the dynamically loadable GLibC5, we are able to test... semaphores , and spinlocks. RTO-MP-IST-091 10- 9 Extending Mondrian Memory Protection to loading extension plugins. This prevents any untrusted code
Implementation Of The Configurable Fault Tolerant System Experiment On NPSAT 1
2016-03-01
REPORT TYPE AND DATES COVERED Master’s thesis 4. TITLE AND SUBTITLE IMPLEMENTATION OF THE CONFIGURABLE FAULT TOLERANT SYSTEM EXPERIMENT ON NPSAT...open-source microprocessor without interlocked pipeline stages (MIPS) based processor softcore, a cached memory structure capable of accessing double...data rate type three and secure digital card memories, an interface to the main satellite bus, and XILINX’s soft error mitigation softcore. The
Tunable ion-photon entanglement in an optical cavity.
Stute, A; Casabone, B; Schindler, P; Monz, T; Schmidt, P O; Brandstätter, B; Northup, T E; Blatt, R
2012-05-23
Proposed quantum networks require both a quantum interface between light and matter and the coherent control of quantum states. A quantum interface can be realized by entangling the state of a single photon with the state of an atomic or solid-state quantum memory, as demonstrated in recent experiments with trapped ions, neutral atoms, atomic ensembles and nitrogen-vacancy spins. The entangling interaction couples an initial quantum memory state to two possible light-matter states, and the atomic level structure of the memory determines the available coupling paths. In previous work, the transition parameters of these paths determined the phase and amplitude of the final entangled state, unless the memory was initially prepared in a superposition state (a step that requires coherent control). Here we report fully tunable entanglement between a single (40)Ca(+) ion and the polarization state of a single photon within an optical resonator. Our method, based on a bichromatic, cavity-mediated Raman transition, allows us to select two coupling paths and adjust their relative phase and amplitude. The cavity setting enables intrinsically deterministic, high-fidelity generation of any two-qubit entangled state. This approach is applicable to a broad range of candidate systems and thus is a promising method for distributing information within quantum networks.
Current And Future Directions Of Lens Design Software
NASA Astrophysics Data System (ADS)
Gustafson, Darryl E.
1983-10-01
The most effective environment for doing lens design continues to evolve as new computer hardware and software tools become available. Important recent hardware developments include: Low-cost but powerful interactive multi-user 32 bit computers with virtual memory that are totally software-compatible with prior larger and more expensive members of the family. A rapidly growing variety of graphics devices for both hard-copy and screen graphics, including many with color capability. In addition, with optical design software readily accessible in many forms, optical design has become a part-time activity for a large number of engineers instead of being restricted to a small number of full-time specialists. A designer interface that is friendly for the part-time user while remaining efficient for the full-time designer is thus becoming more important as well as more practical. Along with these developments, software tools in other scientific and engineering disciplines are proliferating. Thus, the optical designer is less and less unique in his use of computer-aided techniques and faces the challenge and opportunity of efficiently communicating his designs to other computer-aided-design (CAD), computer-aided-manufacturing (CAM), structural, thermal, and mechanical software tools. This paper will address the impact of these developments on the current and future directions of the CODE VTM optical design software package, its implementation, and the resulting lens design environment.
7 CFR 1755.910 - RUS specification for outside plant housings and serving area interface systems.
Code of Federal Regulations, 2010 CFR
2010-01-01
... accordance with 5 U.S.C. 552(a) and 1 CFR part 51. A copy of the UL standard is available for inspection... approved by the Director of the Federal Register in accordance with 5 U.S.C. 552(a) and 7 CFR part 51... or nonmetallic materials in different sizes and configurations to suit a variety of applications. The...
Ma, Buyong; Pan, Yongping; Gunasekaran, K; Venkataraghavan, R Babu; Levine, Arnold J; Nussinov, Ruth
2005-03-15
p53, the tumor suppressor protein, functions as a dimer of dimers. However, how the tetramer binds to the DNA is still an open question. In the crystal structure, three copies of the p53 monomers (containing chains A, B, and C) were crystallized with the DNA-consensus element. Although the structure provides crucial data on the p53-DNA contacts, the active oligomeric state is unclear because the two dimeric (A-B and B-C) interfaces present in the crystal cannot both exist in the tetramer. Here, we address the question of which of these two dimeric interfaces may be more biologically relevant. We analyze the sequence and structural properties of the p53-p53 dimeric interfaces and carry out extensive molecular dynamics simulations of the crystal structures of the human and mouse p53 dimers. We find that the A-B interface residues are more conserved than those of the B-C. Molecular dynamics simulations show that the A-B interface can provide a stable DNA-binding motif in the dimeric state, unlike B-C. Our results indicate that the interface between chains A-B in the p53-DNA complex constitutes a better candidate for a stable biological interface, whereas the B-C interface is more likely to be due to crystal packing. Thus, they have significant implications toward our understanding of DNA binding by p53 as well as p53-mediated interactions with other proteins.
Prakash, Amit; Maikap, Siddheswar; Banerjee, Writam; Jana, Debanjan; Lai, Chao-Sung
2013-09-06
Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled 'SET/RESET' current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.
Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei
2017-05-01
Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
8. OLD AMORYBIGBEE BRIDGE MISSISSIPPI, MONROE CO., AMORY MS. 6, ...
8. OLD AMORY-BIGBEE BRIDGE MISSISSIPPI, MONROE CO., AMORY MS. 6, 1.5 mi. NW of Amory. Road 2.5 mi. N of Bull Mtn. Cr. Copy of 8x10 photo taken at completion of work, 1899. Swing bridge is fully open. View from S. Credit to Evans Memorial Library, Aberdeen, Ms. Sarcone Photography, Columbus, Ms. September 1978. - Bridges of the Upper Tombigbee River Valley, Columbus, Lowndes County, MS
6. OLD AMORYBIGBEE BRIDGE Tombigbee R. MISSISSIPPI, MONROE CO., AMORY ...
6. OLD AMORY-BIGBEE BRIDGE Tombigbee R. MISSISSIPPI, MONROE CO., AMORY MS. 6, 1.5 mi. NW of Amory. Road 2.5 mi. N of Bull Mtn. Cr. Copy of 8x10 photo taken at completion of work, 1899. Swing bridge is fully open. View from S. Credit to Evans Memorial Library, Aberdeen, Ms. Sarcone Photography, Columbus, Ms. September 1978. - Bridges of the Upper Tombigbee River Valley, Columbus, Lowndes County, MS
7. OLD AMORYBIGBEE BRIDGE MISSISSIPPI, MONROE CO., AMORY MS. 6, ...
7. OLD AMORY-BIGBEE BRIDGE MISSISSIPPI, MONROE CO., AMORY MS. 6, 1.5 mi. NW of Amory. Road 2.5 mi. N of Bull Mtn. Cr. Copy of 8x10 photo taken at completion of work, 1899. Swing bridge is fully open. View from S. Credit to Evans Memorial Library, Aberdeen, Ms. Sarcone Photography, Columbus, Ms. September 1978. - Bridges of the Upper Tombigbee River Valley, Columbus, Lowndes County, MS
Efficient checkpointing schemes for depletion perturbation solutions on memory-limited architectures
DOE Office of Scientific and Technical Information (OSTI.GOV)
Stripling, H. F.; Adams, M. L.; Hawkins, W. D.
2013-07-01
We describe a methodology for decreasing the memory footprint and machine I/O load associated with the need to access a forward solution during an adjoint solve. Specifically, we are interested in the depletion perturbation equations, where terms in the adjoint Bateman and transport equations depend on the forward flux solution. Checkpointing is the procedure of storing snapshots of the forward solution to disk and using these snapshots to recompute the parts of the forward solution that are necessary for the adjoint solve. For large problems, however, the storage cost of just a few copies of an angular flux vector canmore » exceed the available RAM on the host machine. We propose a methodology that does not checkpoint the angular flux vector; instead, we write and store converged source moments, which are typically of a much lower dimension than the angular flux solution. This reduces the memory footprint and I/O load of the problem, but requires that we perform single sweeps to reconstruct flux vectors on demand. We argue that this trade-off is exactly the kind of algorithm that will scale on advanced, memory-limited architectures. We analyze the cost, in terms of FLOPS and memory footprint, of five checkpointing schemes. We also provide computational results that support the analysis and show that the memory-for-work trade off does improve time to solution. (authors)« less
Celano, Umberto; Op de Beeck, Jonathan; Clima, Sergiu; Luebben, Michael; Koenraad, Paul M; Goux, Ludovic; Valov, Ilia; Vandervorst, Wilfried
2017-03-29
A great improvement in valence change memory performance has been recently achieved by adding another metallic layer to the simple metal-insulator-metal (MIM) structure. This metal layer is often referred to as oxygen exchange layer (OEL) and is introduced between one of the electrodes and the oxide. The OEL is believed to induce a distributed reservoir of defects at the metal-insulator interface thus providing an unlimited availability of building blocks for the conductive filament (CF). However, its role remains elusive and controversial owing to the difficulties to probe the interface between the OEL and the CF. Here, using Scalpel SPM we probe multiple functions of the OEL which have not yet been directly measured, for two popular VCMs material systems: Hf/HfO 2 and Ta/Ta 2 O 5 . We locate and characterize in three-dimensions the volume containing the oxygen exchange layer and the CF with nanometer lateral resolution. We demonstrate that the OEL induces a thermodynamic barrier for the CF and estimate the minimum thickness of the OEL/oxide interface to guarantee the proper switching operations is ca. 3 nm. Our experimental observations are combined to first-principles thermodynamics and defect kinetics to elucidate the role of the OEL for device optimization.
Smart photodetector arrays for error control in page-oriented optical memory
NASA Astrophysics Data System (ADS)
Schaffer, Maureen Elizabeth
1998-12-01
Page-oriented optical memories (POMs) have been proposed to meet high speed, high capacity storage requirements for input/output intensive computer applications. This technology offers the capability for storage and retrieval of optical data in two-dimensional pages resulting in high throughput data rates. Since currently measured raw bit error rates for these systems fall several orders of magnitude short of industry requirements for binary data storage, powerful error control codes must be adopted. These codes must be designed to take advantage of the two-dimensional memory output. In addition, POMs require an optoelectronic interface to transfer the optical data pages to one or more electronic host systems. Conventional charge coupled device (CCD) arrays can receive optical data in parallel, but the relatively slow serial electronic output of these devices creates a system bottleneck thereby eliminating the POM advantage of high transfer rates. Also, CCD arrays are "unintelligent" interfaces in that they offer little data processing capabilities. The optical data page can be received by two-dimensional arrays of "smart" photo-detector elements that replace conventional CCD arrays. These smart photodetector arrays (SPAs) can perform fast parallel data decoding and error control, thereby providing an efficient optoelectronic interface between the memory and the electronic computer. This approach optimizes the computer memory system by combining the massive parallelism and high speed of optics with the diverse functionality, low cost, and local interconnection efficiency of electronics. In this dissertation we examine the design of smart photodetector arrays for use as the optoelectronic interface for page-oriented optical memory. We review options and technologies for SPA fabrication, develop SPA requirements, and determine SPA scalability constraints with respect to pixel complexity, electrical power dissipation, and optical power limits. Next, we examine data modulation and error correction coding for the purpose of error control in the POM system. These techniques are adapted, where possible, for 2D data and evaluated as to their suitability for a SPA implementation in terms of BER, code rate, decoder time and pixel complexity. Our analysis shows that differential data modulation combined with relatively simple block codes known as array codes provide a powerful means to achieve the desired data transfer rates while reducing error rates to industry requirements. Finally, we demonstrate the first smart photodetector array designed to perform parallel error correction on an entire page of data and satisfy the sustained data rates of page-oriented optical memories. Our implementation integrates a monolithic PN photodiode array and differential input receiver for optoelectronic signal conversion with a cluster error correction code using 0.35-mum CMOS. This approach provides high sensitivity, low electrical power dissipation, and fast parallel correction of 2 x 2-bit cluster errors in an 8 x 8 bit code block to achieve corrected output data rates scalable to 102 Gbps in the current technology increasing to 1.88 Tbps in 0.1-mum CMOS.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bowers, Geoffrey
United States Department of Energy grant DE-FG02-10ER16128, “Computational and Spectroscopic Investigations of the Molecular Scale Structure and Dynamics of Geologically Important Fluids and Mineral-Fluid Interfaces” (Geoffrey M. Bowers, P.I.) focused on developing a molecular-scale understanding of processes that occur in fluids and at solid-fluid interfaces using the combination of spectroscopic, microscopic, and diffraction studies with molecular dynamics computer modeling. The work is intimately tied to the twin proposal at Michigan State University (DOE DE-FG02-08ER15929; same title: R. James Kirkpatrick, P.I. and A. Ozgur Yazaydin, co-P.I.).
Concurrent Image Processing Executive (CIPE)
NASA Technical Reports Server (NTRS)
Lee, Meemong; Cooper, Gregory T.; Groom, Steven L.; Mazer, Alan S.; Williams, Winifred I.
1988-01-01
The design and implementation of a Concurrent Image Processing Executive (CIPE), which is intended to become the support system software for a prototype high performance science analysis workstation are discussed. The target machine for this software is a JPL/Caltech Mark IIIfp Hypercube hosted by either a MASSCOMP 5600 or a Sun-3, Sun-4 workstation; however, the design will accommodate other concurrent machines of similar architecture, i.e., local memory, multiple-instruction-multiple-data (MIMD) machines. The CIPE system provides both a multimode user interface and an applications programmer interface, and has been designed around four loosely coupled modules; (1) user interface, (2) host-resident executive, (3) hypercube-resident executive, and (4) application functions. The loose coupling between modules allows modification of a particular module without significantly affecting the other modules in the system. In order to enhance hypercube memory utilization and to allow expansion of image processing capabilities, a specialized program management method, incremental loading, was devised. To minimize data transfer between host and hypercube a data management method which distributes, redistributes, and tracks data set information was implemented.
G-cueing microcontroller (a microprocessor application in simulators)
NASA Technical Reports Server (NTRS)
Horattas, C. G.
1980-01-01
A g cueing microcontroller is described which consists of a tandem pair of microprocessors, dedicated to the task of simulating pilot sensed cues caused by gravity effects. This task includes execution of a g cueing model which drives actuators that alter the configuration of the pilot's seat. The g cueing microcontroller receives acceleration commands from the aerodynamics model in the main computer and creates the stimuli that produce physical acceleration effects of the aircraft seat on the pilots anatomy. One of the two microprocessors is a fixed instruction processor that performs all control and interface functions. The other, a specially designed bipolar bit slice microprocessor, is a microprogrammable processor dedicated to all arithmetic operations. The two processors communicate with each other by a shared memory. The g cueing microcontroller contains its own dedicated I/O conversion modules for interface with the seat actuators and controls, and a DMA controller for interfacing with the simulation computer. Any application which can be microcoded within the available memory, the available real time and the available I/O channels, could be implemented in the same controller.
Forming mechanism of Te-based conductive-bridge memories
NASA Astrophysics Data System (ADS)
Mendes, M. Kazar; Martinez, E.; Marty, A.; Veillerot, M.; Yamashita, Y.; Gassilloud, R.; Bernard, M.; Renault, O.; Barrett, N.
2018-02-01
We investigated origins of the resistivity change during the forming of ZrTe/Al2O3 based conductive-bridge resistive random access memories. Non-destructive hard X-ray photoelectron spectroscopy was used to investigate redox processes with sufficient depth sensitivity. Results highlighted the reduction of alumina correlated to the oxidation of zirconium at the interface between the solid electrolyte and the active electrode. In addition the resistance switching caused a decrease of Zr-Te bonds and an increase of elemental Te showing an enrichment of tellurium at the ZrTe/Al2O3 interface. XPS depth profiling using argon clusters ion beam confirmed the oxygen diffusion towards the top electrode. A four-layer capacitor model showed an increase of both the ZrO2 and AlOx interfacial layers, confirming the redox process located at the ZrTe/Al2O3 interface. Oxygen vacancies created in the alumina help the filament formation by acting as preferential conductive paths. This study provides a first direct evidence of the physico-chemical phenomena involved in resistive switching of such devices.
Systems, methods, and products for graphically illustrating and controlling a droplet actuator
NASA Technical Reports Server (NTRS)
Brafford, Keith R. (Inventor); Pamula, Vamsee K. (Inventor); Paik, Philip Y. (Inventor); Pollack, Michael G. (Inventor); Sturmer, Ryan A. (Inventor); Smith, Gregory F. (Inventor)
2010-01-01
Systems for controlling a droplet microactuator are provided. According to one embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, and a display device displaying a user interface electronically coupled to the controller, wherein the system is programmed and configured to permit a user to effect a droplet manipulation by interacting with the user interface. According to another embodiment, a system is provided and includes a processor, a display device electronically coupled to the processor, and software loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller and programmed to display an interactive map of a droplet microactuator. According to yet another embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, a display device displaying a user interface electronically coupled to the controller, and software for executing a protocol loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller.
Support for Diagnosis of Custom Computer Hardware
NASA Technical Reports Server (NTRS)
Molock, Dwaine S.
2008-01-01
The Coldfire SDN Diagnostics software is a flexible means of exercising, testing, and debugging custom computer hardware. The software is a set of routines that, collectively, serve as a common software interface through which one can gain access to various parts of the hardware under test and/or cause the hardware to perform various functions. The routines can be used to construct tests to exercise, and verify the operation of, various processors and hardware interfaces. More specifically, the software can be used to gain access to memory, to execute timer delays, to configure interrupts, and configure processor cache, floating-point, and direct-memory-access units. The software is designed to be used on diverse NASA projects, and can be customized for use with different processors and interfaces. The routines are supported, regardless of the architecture of a processor that one seeks to diagnose. The present version of the software is configured for Coldfire processors on the Subsystem Data Node processor boards of the Solar Dynamics Observatory. There is also support for the software with respect to Mongoose V, RAD750, and PPC405 processors or their equivalents.
Diffuse-interface model for rapid phase transformations in nonequilibrium systems.
Galenko, Peter; Jou, David
2005-04-01
A thermodynamic approach to rapid phase transformations within a diffuse interface in a binary system is developed. Assuming an extended set of independent thermodynamic variables formed by the union of the classic set of slow variables and the space of fast variables, we introduce finiteness of the heat and solute diffusive propagation at the finite speed of the interface advancing. To describe transformations within the diffuse interface, we use the phase-field model which allows us to follow steep but smooth changes of phase within the width of the diffuse interface. Governing equations of the phase-field model are derived for the hyperbolic model, a model with memory, and a model of nonlinear evolution of transformation within the diffuse interface. The consistency of the model is proved by the verification of the validity of the condition of positive entropy production and by outcomes of the fluctuation-dissipation theorem. A comparison with existing sharp-interface and diffuse-interface versions of the model is given.
Cheng, Shaowu; Cao, Dongfeng; Hottman, David A; Yuan, LiLian; Bergo, Martin O; Li, Ling
2013-12-13
Isoprenoids and prenylated proteins have been implicated in the pathophysiology of Alzheimer disease (AD), including amyloid-β precursor protein metabolism, Tau phosphorylation, synaptic plasticity, and neuroinflammation. However, little is known about the relative importance of the two protein prenyltransferases, farnesyltransferase (FT) and geranylgeranyltransferase-1 (GGT), in the pathogenesis of AD. In this study, we defined the impact of deleting one copy of FT or GGT on the development of amyloid-β (Aβ)-associated neuropathology and learning/memory impairments in APPPS1 double transgenic mice, a well established model of AD. Heterozygous deletion of FT reduced Aβ deposition and neuroinflammation and rescued spatial learning and memory function in APPPS1 mice. Heterozygous deletion of GGT reduced the levels of Aβ and neuroinflammation but had no impact on learning and memory. These results document that farnesylation and geranylgeranylation play differential roles in AD pathogenesis and suggest that specific inhibition of protein farnesylation could be a potential strategy for effectively treating AD.
Barker, Lynne Ann; Morton, Nicholas; Romanowski, Charles A J; Gosden, Kevin
2013-10-24
We report a rare case of a patient unable to read (alexic) and write (agraphic) after a mild head injury. He had preserved speech and comprehension, could spell aloud, identify words spelt aloud and copy letter features. He was unable to visualise letters but showed no problems with digits. Neuropsychological testing revealed general visual memory, processing speed and imaging deficits. Imaging data revealed an 8 mm colloid cyst of the third ventricle that splayed the fornix. Little is known about functions mediated by fornical connectivity, but this region is thought to contribute to memory recall. Other regions thought to mediate letter recognition and letter imagery, visual word form area and visual pathways were intact. We remediated reading and writing by multimodal letter retraining. The study raises issues about the neural substrates of reading, role of fornical tracts to selective memory in the absence of other pathology, and effective remediation strategies for selective functional deficits.
Microterminal/Microfiche System for Computer-Based Instruction: Hardware and Software Development.
1980-10-01
Circuit Description and Schematic of Adaptor Module 57 Appendix C Circuit Description The schematics for circuitry used in the microfiche viewer and the...composed of four major components and associated interfaces. The major components are (a) mirroterminal. (Is) microfiche reader. (0) memory module , and (d...sensing of the position of the platen containing the microfiche so that frame locations can be verified by the microterminal software. The memory module is
Crew Interface Analysis: Selected Articles on Space Human Factors Research, 1987 - 1991
1993-07-01
recognitions to that distractor ) suggest that the perceptual type of the graph has a strong representation in memory . We found that both training with... processing strategy. If my goal were to compare the value of variables or (possibly) to compare a trend, I would select a perceptual strategy. If...be needed to determine specific processing models for different questions using the perceptual strategy. In addition, predictions about the memory
A Multi-scale Cognitive Approach to Intrusion Detection and Response
2015-12-28
the behavior of the traffic on the network, either by using mathematical formulas or by replaying packet streams. As a result, simulators depend...large scale. Summary of the most important results We obtained a powerful machine, which has 768 cores and 1.25 TB memory . RBG has been...time. Each client is configured with 1GB memory , 10 GB disk space, and one 100M Ethernet interface. The server nodes include web servers
Radiation-Hardened Solid-State Drive
NASA Technical Reports Server (NTRS)
Sheldon, Douglas J.
2010-01-01
A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.
Clerici, Francesca; Ghiretti, Roberta; Di Pucchio, Alessandra; Pomati, Simone; Cucumo, Valentina; Marcone, Alessandra; Vanacore, Nicola; Mariani, Claudio; Cappa, Stefano Francesco
2017-06-01
The Free and Cued Selective Reminding Test (FCSRT) is the memory test recommended by the International Working Group on Alzheimer's disease (AD) for the detection of amnestic syndrome of the medial temporal type in prodromal AD. Assessing the construct validity and internal consistency of the Italian version of the FCSRT is thus crucial. The FCSRT was administered to 338 community-dwelling participants with memory complaints (57% females, age 74.5 ± 7.7 years), including 34 with AD, 203 with Mild Cognitive Impairment, and 101 with Subjective Memory Impairment. Internal Consistency was estimated using Cronbach's alpha coefficient. To assess convergent validity, five FCSRT scores (Immediate Free Recall, Immediate Total Recall, Delayed Free Recall, Delayed Total Recall, and Index of Sensitivity of Cueing) were correlated with three well-validated memory tests: Story Recall, Rey Auditory Verbal Learning test, and Rey Complex Figure (RCF) recall (partial correlation analysis). To assess divergent validity, a principal component analysis (an exploratory factor analysis) was performed including, in addition to the above-mentioned memory tasks, the following tests: Word Fluencies, RCF copy, Clock Drawing Test, Trail Making Test, Frontal Assessment Battery, Raven Coloured Progressive Matrices, and Stroop Colour-Word Test. Cronbach's alpha coefficients for immediate recalls (IFR and ITR) and delayed recalls (DFR and DTR) were, respectively, .84 and .81. All FCSRT scores were highly correlated with those of the three well-validated memory tests. The factor analysis showed that the FCSRT does not load on the factors saturated by non-memory tests. These findings indicate that the FCSRT has a good internal consistency and has an excellent construct validity as an episodic memory measure. © 2015 The British Psychological Society.
Avettand-Fenoël, Véronique; Nembot, Georges; Mélard, Adeline; Blanc, Catherine; Lascoux-Combe, Caroline; Slama, Laurence; Allegre, Thierry; Allavena, Clotilde; Yazdanpanah, Yazdan; Duvivier, Claudine; Katlama, Christine; Goujard, Cécile; Seksik, Bao Chau Phung; Leplatois, Anne; Molina, Jean-Michel; Meyer, Laurence; Autran, Brigitte; Rouzioux, Christine
2013-01-01
Optimizing therapeutic strategies for an HIV cure requires better understanding the characteristics of early HIV-1 spread among resting CD4+ cells within the first month of primary HIV-1 infection (PHI). We studied the immune distribution, diversity, and inducibility of total HIV-DNA among the following cell subsets: monocytes, peripheral blood activated and resting CD4 T cells, long-lived (naive [TN] and central-memory [TCM]) and short-lived (transitional-memory [TTM] and effector-memory cells [TEM]) resting CD4+T cells from 12 acutely-infected individuals recruited at a median 36 days from infection. Cells were sorted for total HIV-DNA quantification, phylogenetic analysis and inducibility, all studied in relation to activation status and cell signaling. One month post-infection, a single CCR5-restricted viral cluster was massively distributed in all resting CD4+ subsets from 88% subjects, while one subject showed a slight diversity. High levels of total HIV-DNA were measured among TN (median 3.4 log copies/million cells), although 10-fold less (p = 0.0005) than in equally infected TCM (4.5), TTM (4.7) and TEM (4.6) cells. CD3−CD4+ monocytes harbored a low viral burden (median 2.3 log copies/million cells), unlike equally infected resting and activated CD4+ T cells (4.5 log copies/million cells). The skewed repartition of resting CD4 subsets influenced their contribution to the pool of resting infected CD4+T cells, two thirds of which consisted of short-lived TTM and TEM subsets, whereas long-lived TN and TCM subsets contributed the balance. Each resting CD4 subset produced HIV in vitro after stimulation with anti-CD3/anti-CD28+IL-2 with kinetics and magnitude varying according to subset differentiation, while IL-7 preferentially induced virus production from long-lived resting TN cells. In conclusion, within a month of infection, a clonal HIV-1 cluster is massively distributed among resting CD4 T-cell subsets with a flexible inducibility, suggesting that subset activation and skewed immune homeostasis determine the conditions of viral dissemination and early establishment of the HIV reservoir. PMID:23691172
Stand-alone development system using a KIM-1 microcomputer module
NASA Technical Reports Server (NTRS)
Nickum, J. D.
1978-01-01
A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.
A PDP-15 to industrial-14 interface at the Lewis Research Center's cyclotron
NASA Technical Reports Server (NTRS)
Kebberly, F. R.; Leonard, R. F.
1977-01-01
An interface (hardware and software) was built which permits the loading, monitoring, and control of a digital equipment industrial-14/30 programmable controller by a PDP-15 computer. The interface utilizes the serial mode for data transfer to and from the controller, so that the required hardware is essentially that of a teletype unit except for the speed of transmission. Software described here permits the user to load binary paper tape, read or load individual controller memory locations, and if desired turn controller outputs on and off directly from the computer.
NASA Technical Reports Server (NTRS)
Bohning, O. D.; Becker, F. J.
1980-01-01
Design, fabrication and test of partially populated prototype recorder using 100 kilobit serial chips is described. Electrical interface, operating modes, and mechanical design of several module configurations are discussed. Fabrication and test of the module demonstrated the practicality of multiplexing resulting in lower power, weight, and volume. This effort resulted in the completion of a module consisting of a fully engineered printed circuit storage board populated with 5 of 8 possible cells and a wire wrapped electronics board. Interface of the module is 16 bits parallel at a maximum of 1.33 megabits per second data rate on either of two interface buses.
Multiplexer/Demultiplexer Loading Tool (MDMLT)
NASA Technical Reports Server (NTRS)
Brewer, Lenox Allen; Hale, Elizabeth; Martella, Robert; Gyorfi, Ryan
2012-01-01
The purpose of the MDMLT is to improve the reliability and speed of loading multiplexers/demultiplexers (MDMs) in the Software Development and Integration Laboratory (SDIL) by automating the configuration management (CM) of the loads in the MDMs, automating the loading procedure, and providing the capability to load multiple or all MDMs concurrently. This loading may be accomplished in parallel, or single MDMs (remote). The MDMLT is a Web-based tool that is capable of loading the entire International Space Station (ISS) MDM configuration in parallel. It is able to load Flight Equivalent Units (FEUs), enhanced, standard, and prototype MDMs as well as both EEPROM (Electrically Erasable Programmable Read-Only Memory) and SSMMU (Solid State Mass Memory Unit) (MASS Memory). This software has extensive configuration management to track loading history, and the performance improvement means of loading the entire ISS MDM configuration of 49 MDMs in approximately 30 minutes, as opposed to 36 hours, which is what it took previously utilizing the flight method of S-Band uplink. The laptop version recently added to the MDMLT suite allows remote lab loading with the CM of information entered into a common database when it is reconnected to the network. This allows the program to reconfigure the test rigs quickly between shifts, allowing the lab to support a variety of onboard configurations during a single day, based on upcoming or current missions. The MDMLT Computer Software Configuration Item (CSCI) supports a Web-based command and control interface to the user. An interface to the SDIL File Transfer Protocol (FTP) server is supported to import Integrated Flight Loads (IFLs) and Internal Product Release Notes (IPRNs) into the database. An interface to the Monitor and Control System (MCS) is supported to control the power state, and to enable or disable the debug port of the MDMs to be loaded. Two direct interfaces to the MDM are supported: a serial interface (debug port) to receive MDM memory dump data and the calculated checksum, and the Small Computer System Interface (SCSI) to transfer load files to MDMs with hard disks. File transfer from the MDM Loading Tool to EEPROM within the MDM is performed via the MILSTD- 1553 bus, making use of the Real- Time Input/Output Processors (RTIOP) when using the rig-based MDMLT, and via a bus box when using the laptop MDMLT. The bus box is a cost-effective alternative to PC-1553 cards for the laptop. It is noted that this system can be modified and adapted to any avionic laboratory for spacecraft computer loading, ship avionics, or aircraft avionics where multiple configurations and strong configuration management of software/firmware loads are required.
New Initiatives for Electronic Scholarly Publishing: Academic Information Sources on the Internet
2004-12-01
parallel with the changing economics of publishing. A strong movement, among researchers and academics ( user community), seeks to free scientific...interface between the user and a vast amount of published and unpublished information (Oppenheim 1997: 398), which was made available in hard copy, via...have implemented facilities that enable the user to exercise clear options for selectively retrieving material (OpCit), to discuss and rank the articles
Information Processing Techniques Program. Volume 1. Packet Speech Systems Technology
1980-03-31
DMA transfer is enabled from the 2652 serial I/O device to the buffer memory. This enables automatic recep- tion of an incoming packet without (’PU...conference speaker. Producing multiple copies at the source wastes network bandwidth and is likely to cause local overload conditions for a large... wasted . If the setup fails because ST can fird no route with sufficient capacity, the phone will have rung and possibly been answered 18 but the call will
ERIC Educational Resources Information Center
Steele, Emalia C.; McLaughlin, Thomas; Derby, K. Mark; Weber, Kimberly P.; Donica, Denise K.; McKenzie, Michelle
2015-01-01
The main purpose of this study was to evaluate the effectiveness of the prewriting and handwriting curriculum Handwriting Without Tears® (HWT) in a preschool setting with a single student who has developmental delays and a suspected Autism Spectrum Disorder (ASD) diagnosis. Data were collected during the regular preschool day. The behavior…
ERIC Educational Resources Information Center
Morice, Elise; Andreae, Laura C.; Cooke, Sam F.; Vanes, Lesley; Fisher, Elizabeth M. C.; Tybulewicz, Victor L. J.; Bliss, Timothy V. P.
2008-01-01
Down syndrome (DS) is a genetic disorder arising from the presence of a third copy of the human chromosome 21 (Hsa21). Recently, O'Doherty and colleagues in an earlier study generated a new genetic mouse model of DS (Tc1) that carries an almost complete Hsa21. Since DS is the most common genetic cause of mental retardation, we have undertaken a…
Forensic Memory Analysis for Apple OS X
2012-06-14
x86. Table 5. Template interface fields. Variable Python Type Description template dict template implementing the C stuct interface MBR_NAME str ...dictionary key, variable name for a struct member template[MBR_NAME] tuple dictionary value, a struct member description MBR_TYPE str C type of the...named member OFFSET int offset in bytes for the member SIZE int size in bytes for the member type FIELD str lsof field represented by member
Onboard System Evaluation of Rotors Vibration, Engines (OBSERVE) monitoring System
1992-07-01
consists of a Data Acquisiiton Unit (DAU), Control and Display Unit ( CADU ), Universal Tracking Devices (UTD), Remote Cockpit Display (RCD) and a PC...and Display Unit ( CADU ) - The CADU provides data storage and a graphical user interface neccesary to display both the measured data and diagnostic...information. The CADU has an interface to a Credit Card Memory (CCM) which operates similar to a disk drive, allowing the storage of data and programs. The
A general graphical user interface for automatic reliability modeling
NASA Technical Reports Server (NTRS)
Liceaga, Carlos A.; Siewiorek, Daniel P.
1991-01-01
Reported here is a general Graphical User Interface (GUI) for automatic reliability modeling of Processor Memory Switch (PMS) structures using a Markov model. This GUI is based on a hierarchy of windows. One window has graphical editing capabilities for specifying the system's communication structure, hierarchy, reconfiguration capabilities, and requirements. Other windows have field texts, popup menus, and buttons for specifying parameters and selecting actions. An example application of the GUI is given.
Advanced Military Pay System Concepts. Evaluation of Opportunities through Information Technology.
1980-07-01
trans- mdtter (UART) to interface with a modem . The main processor was then responsible for input and output between main memory and the UART...digital, "run-length" encoding scheme which is very effective in reducing the amount of data to be transmitted. Machines of this type include a modem ...Output control as well as data compression will be combined with appropriate modems or interfaces to digital transmission channels and microprocessor
Qian, Min; Pan, Yiming; Liu, Fengyuan; Wang, Miao; Shen, Haoliang; He, Daowei; Wang, Baigeng; Shi, Yi; Miao, Feng; Wang, Xinran
2014-05-28
Memristive devices based on vertical heterostructures of graphene and TiOx show a significant power reduction that is up to ∼10(3) times smaller than that of conventional structures. This power reduction arises as a result of a tunneling barrier at the interface. The barrier is tunable, opening up the possibility of engineering several key memory characteristics. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Brun, B.
1997-07-01
Computer technology has improved tremendously during the last years with larger media capacity, memory and more computational power. Visual computing with high-performance graphic interface and desktop computational power have changed the way engineers accomplish everyday tasks, development and safety studies analysis. The emergence of parallel computing will permit simulation over a larger domain. In addition, new development methods, languages and tools have appeared in the last several years.
Modified scoring criteria for the RBANS figures.
Duff, Kevin; Leber, W R; Patton, Doyle E; Schoenberg, Mike R; Mold, James W; Scott, James G; Adams, Russell L
2007-01-01
Visual construction and memory tasks are routinely used in neuropsychological assessment, but their subjective scoring criteria can negatively affect the reliability of these instruments. The current study examined the standard scoring criteria for the Figure Copy and Recall subtests of the RBANS and compared them to a modified set of scoring criteria in two samples. In both a large community dwelling sample of older adults and in a mixed clinical sample, the original scoring criteria consistently led to lower scores than the modified criteria. Inter-rater reliability was high for the modified scoring criteria, and no age effects were found with the modified scoring criteria. In both samples, the modified scoring criteria led to Figure Copy scores that more closely approximated other performances on the RBANS compared to the standard criteria, whereas both scoring systems led to plausible Figure Recall scores. Despite these results, the present study cannot identify one scoring criterion as the "better," but only points out the significant differences between them. Such differences can have important clinical implications, and practitioners and researchers who utilize the RBANS with patient samples should be cautious when interpreting low scores on Figure Copy and Recall if the standard criteria are used.
Linking brain imaging and genomics in the study of Alzheimer's disease and aging.
Reiman, Eric M
2007-02-01
My colleagues and I have been using positron emission tomography (PET) and magnetic resonance imaging (MRI) to detect and track the brain changes associated with Alzheimer's disease (AD) and normal brain aging in cognitively normal persons with two copies, one copy, and no copies of the apolipoprotein E (APOE) epsilon4 allele, a common AD susceptibility gene. In this review article, I consider how brain imaging techniques could be used to evaluate putative AD prevention therapies in cognitively normal APOE epsilon4 carriers and putative age-modifying therapies in cognitively normal APOE epsilon4 noncarriers, how they could help investigate the individual and aggregate effects of putative AD risk modifiers, and how they could help guide the investigation of a molecular mechanism associated with AD vulnerability and normal neurological aging. I suggest how high-resolution genome-wide genetic and transcriptomic studies could further help in the scientific understanding of AD, aging, and other common and genetically complex phenotypes, such as variation in normal human memory performance, and in the discovery and evaluation of promising treatments for these phenotypes. Finally, I illustrate the push-pull relationship between brain imaging, genomics research, and other neuroscientific research in the study of AD and aging.
Lyon, Louisa; Burnet, Philip WJ; Kew, James NC; Corti, Corrado; Rawlins, J Nicholas P; Lane, Tracy; De Filippis, Bianca; Harrison, Paul J; Bannerman, David M
2011-01-01
Group II metabotropic glutamate receptors (mGluR2 and mGluR3, encoded by GRM2 and GRM3) are implicated in hippocampal function and cognition, and in the pathophysiology and treatment of schizophrenia and other psychiatric disorders. However, pharmacological and behavioral studies with group II mGluR agonists and antagonists have produced complex results. Here, we studied hippocampus-dependent memory in GRM2/3 double knockout (GRM2/3−/−) mice in an iterative sequence of experiments. We found that they were impaired on appetitively motivated spatial reference and working memory tasks, and on a spatial novelty preference task that relies on animals' exploratory drive, but were unimpaired on aversively motivated spatial memory paradigms. GRM2/3−/− mice also performed normally on an appetitively motivated, non-spatial, visual discrimination task. These results likely reflect an interaction between GRM2/3 genotype and the arousal-inducing properties of the experimental paradigm. The deficit seen on appetitive and exploratory spatial memory tasks may be absent in aversive tasks because the latter induce higher levels of arousal, which rescue spatial learning. Consistent with an altered arousal–cognition relationship in GRM2/3−/− mice, injection stress worsened appetitively motivated, spatial working memory in wild-types, but enhanced performance in GRM2/3−/− mice. GRM2/3−/− mice were also hypoactive in response to amphetamine. This fractionation of hippocampus-dependent memory depending on the appetitive-aversive context is to our knowledge unique, and suggests a role for group II mGluRs at the interface of arousal and cognition. These arousal-dependent effects may explain apparently conflicting data from previous studies, and have translational relevance for the involvement of these receptors in schizophrenia and other disorders. PMID:21832989
Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng
2012-03-01
The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Li, H. K.; Chen, T. P., E-mail: echentp@ntu.edu.sg; Liu, P.
In this work, a synaptic transistor based on the indium gallium zinc oxide (IGZO)–aluminum oxide (Al{sub 2}O{sub 3}) thin film structure, which uses ultraviolet (UV) light pulses as the pre-synaptic stimulus, has been demonstrated. The synaptic transistor exhibits the behavior of synaptic plasticity like the paired-pulse facilitation. In addition, it also shows the brain's memory behaviors including the transition from short-term memory to long-term memory and the Ebbinghaus forgetting curve. The synapse-like behavior and memory behaviors of the transistor are due to the trapping and detrapping processes of the holes, which are generated by the UV pulses, at the IGZO/Al{submore » 2}O{sub 3} interface and/or in the Al{sub 2}O{sub 3} layer.« less
Static Memory Deduplication for Performance Optimization in Cloud Computing.
Jia, Gangyong; Han, Guangjie; Wang, Hao; Yang, Xuan
2017-04-27
In a cloud computing environment, the number of virtual machines (VMs) on a single physical server and the number of applications running on each VM are continuously growing. This has led to an enormous increase in the demand of memory capacity and subsequent increase in the energy consumption in the cloud. Lack of enough memory has become a major bottleneck for scalability and performance of virtualization interfaces in cloud computing. To address this problem, memory deduplication techniques which reduce memory demand through page sharing are being adopted. However, such techniques suffer from overheads in terms of number of online comparisons required for the memory deduplication. In this paper, we propose a static memory deduplication (SMD) technique which can reduce memory capacity requirement and provide performance optimization in cloud computing. The main innovation of SMD is that the process of page detection is performed offline, thus potentially reducing the performance cost, especially in terms of response time. In SMD, page comparisons are restricted to the code segment, which has the highest shared content. Our experimental results show that SMD efficiently reduces memory capacity requirement and improves performance. We demonstrate that, compared to other approaches, the cost in terms of the response time is negligible.
Static Memory Deduplication for Performance Optimization in Cloud Computing
Jia, Gangyong; Han, Guangjie; Wang, Hao; Yang, Xuan
2017-01-01
In a cloud computing environment, the number of virtual machines (VMs) on a single physical server and the number of applications running on each VM are continuously growing. This has led to an enormous increase in the demand of memory capacity and subsequent increase in the energy consumption in the cloud. Lack of enough memory has become a major bottleneck for scalability and performance of virtualization interfaces in cloud computing. To address this problem, memory deduplication techniques which reduce memory demand through page sharing are being adopted. However, such techniques suffer from overheads in terms of number of online comparisons required for the memory deduplication. In this paper, we propose a static memory deduplication (SMD) technique which can reduce memory capacity requirement and provide performance optimization in cloud computing. The main innovation of SMD is that the process of page detection is performed offline, thus potentially reducing the performance cost, especially in terms of response time. In SMD, page comparisons are restricted to the code segment, which has the highest shared content. Our experimental results show that SMD efficiently reduces memory capacity requirement and improves performance. We demonstrate that, compared to other approaches, the cost in terms of the response time is negligible. PMID:28448434
Biological Signal Processing with a Genetic Toggle Switch
Hillenbrand, Patrick; Fritz, Georg; Gerland, Ulrich
2013-01-01
Complex gene regulation requires responses that depend not only on the current levels of input signals but also on signals received in the past. In digital electronics, logic circuits with this property are referred to as sequential logic, in contrast to the simpler combinatorial logic without such internal memory. In molecular biology, memory is implemented in various forms such as biochemical modification of proteins or multistable gene circuits, but the design of the regulatory interface, which processes the input signals and the memory content, is often not well understood. Here, we explore design constraints for such regulatory interfaces using coarse-grained nonlinear models and stochastic simulations of detailed biochemical reaction networks. We test different designs for biological analogs of the most versatile memory element in digital electronics, the JK-latch. Our analysis shows that simple protein-protein interactions and protein-DNA binding are sufficient, in principle, to implement genetic circuits with the capabilities of a JK-latch. However, it also exposes fundamental limitations to its reliability, due to the fact that biological signal processing is asynchronous, in contrast to most digital electronics systems that feature a central clock to orchestrate the timing of all operations. We describe a seemingly natural way to improve the reliability by invoking the master-slave concept from digital electronics design. This concept could be useful to interpret the design of natural regulatory circuits, and for the design of synthetic biological systems. PMID:23874595
Perceptual Considerations in Icon Design for Instructional Communication.
ERIC Educational Resources Information Center
Lee, Shih-Chung
1996-01-01
Discusses the use of icons in computer interface design. Highlights include picture processing time, complexity, recognition memory, differences between picture icons and picture/text icons, the use of color, size, placement, and touch design. (LRW)
NASA Astrophysics Data System (ADS)
Kern, Bastian; Jöckel, Patrick
2016-10-01
Numerical climate and weather models have advanced to finer scales, accompanied by large amounts of output data. The model systems hit the input and output (I/O) bottleneck of modern high-performance computing (HPC) systems. We aim to apply diagnostic methods online during the model simulation instead of applying them as a post-processing step to written output data, to reduce the amount of I/O. To include diagnostic tools into the model system, we implemented a standardised, easy-to-use interface based on the Modular Earth Submodel System (MESSy) into the ICOsahedral Non-hydrostatic (ICON) modelling framework. The integration of the diagnostic interface into the model system is briefly described. Furthermore, we present a prototype implementation of an advanced online diagnostic tool for the aggregation of model data onto a user-defined regular coarse grid. This diagnostic tool will be used to reduce the amount of model output in future simulations. Performance tests of the interface and of two different diagnostic tools show, that the interface itself introduces no overhead in form of additional runtime to the model system. The diagnostic tools, however, have significant impact on the model system's runtime. This overhead strongly depends on the characteristics and implementation of the diagnostic tool. A diagnostic tool with high inter-process communication introduces large overhead, whereas the additional runtime of a diagnostic tool without inter-process communication is low. We briefly describe our efforts to reduce the additional runtime from the diagnostic tools, and present a brief analysis of memory consumption. Future work will focus on optimisation of the memory footprint and the I/O operations of the diagnostic interface.
Formal design specification of a Processor Interface Unit
NASA Technical Reports Server (NTRS)
Fura, David A.; Windley, Phillip J.; Cohen, Gerald C.
1992-01-01
This report describes work to formally specify the requirements and design of a processor interface unit (PIU), a single-chip subsystem providing memory-interface bus-interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. The need for high-quality design assurance in such applications is an undisputed fact, given the disastrous consequences that even a single design flaw can produce. Thus, the further development and application of formal methods to fault-tolerant systems is of critical importance as these systems see increasing use in modern society.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Saadi, M.; CNRS, LTM, F-38000 Grenoble; El Manar University, LMOP, 2092 Tunis
Resistance switching is studied in HfO{sub 2} as a function of the anode metal (Au, Cu, and Ag) in view of its application to resistive memories (resistive random access memories, RRAM). Current-voltage (I-V) and current-time (I-t) characteristics are presented. For Au anodes, resistance transition is controlled by oxygen vacancies (oxygen-based resistive random access memory, OxRRAM). For Ag anodes, resistance switching is governed by cation injection (Conducting Bridge random access memory, CBRAM). Cu anodes lead to an intermediate case. I-t experiments are shown to be a valuable tool to distinguish between OxRRAM and CBRAM behaviors. A model is proposed to explainmore » the high-to-low resistance transition in CBRAMs. The model is based on the theory of low-temperature oxidation of metals (Cabrera-Mott theory). Upon electron injection, oxygen vacancies and oxygen ions are generated in the oxide. Oxygen ions are drifted to the anode, and an interfacial oxide is formed at the HfO{sub 2}/anode interface. If oxygen ion mobility is low in the interfacial oxide, a negative space charge builds-up at the HfO{sub 2}/oxide interface. This negative space charge is the source of a strong electric field across the interfacial oxide thickness, which pulls out cations from the anode (CBRAM case). Inversely, if oxygen ions migration through the interfacial oxide is important (or if the anode does not oxidize such as Au), bulk oxygen vacancies govern resistance transition (OxRRAM case).« less
Protect sensitive data with lightweight memory encryption
NASA Astrophysics Data System (ADS)
Zhou, Hongwei; Yuan, Jinhui; Xiao, Rui; Zhang, Kai; Sun, Jingyao
2018-04-01
Since current commercial processor is not able to deal with the data in the cipher text, the sensitive data have to be exposed in the memory. It leaves a window for the adversary. To protect the sensitive data, a direct idea is to encrypt the data when the processor does not access them. On the observation, we have developed a lightweight memory encryption, called LeMe, to protect the sensitive data in the application. LeMe marks the sensitive data in the memory with the page table entry, and encrypts the data in their free time. LeMe is built on the Linux with a 3.17.6 kernel, and provides four user interfaces as dynamic link library. Our evaluations show LeMe is effective to protect the sensitive data and incurs an acceptable performance overhead.
Coherent spin control of a nanocavity-enhanced qubit in diamond
Li, Luozhou; Lu, Ming; Schroder, Tim; ...
2015-01-28
A central aim of quantum information processing is the efficient entanglement of multiple stationary quantum memories via photons. Among solid-state systems, the nitrogen-vacancy centre in diamond has emerged as an excellent optically addressable memory with second-scale electron spin coherence times. Recently, quantum entanglement and teleportation have been shown between two nitrogen-vacancy memories, but scaling to larger networks requires more efficient spin-photon interfaces such as optical resonators. Here we report such nitrogen-vacancy nanocavity systems in strong Purcell regime with optical quality factors approaching 10,000 and electron spin coherence times exceeding 200 µs using a silicon hard-mask fabrication process. This spin-photon interfacemore » is integrated with on-chip microwave striplines for coherent spin control, providing an efficient quantum memory for quantum networks.« less
Handling of the demilitarized zone using service providers in SAP
NASA Astrophysics Data System (ADS)
Iovan, A.; Robu, R.
2016-02-01
External collaboration needs to allow data access from the Internet. In a trusted Internet collaboration scenario where the external user works on the same data like the internal user direct access to the data in the Intranet is required. The paper presents a solution to get access to certain data in the Enterprise Resource Planning system, having the User Interface on a system in the Demilitarized Zone and the database on a system which is located in the trusted area. Using the Service Provider Interface framework, connections between separate systems can be created in different areas of the network. The paper demonstrates how to connect the two systems, one in the Demilitarized Zone and one in the trusted area, using SAP ERP 6.0 with Enhancement Package 7. In order to use the Service Provider Interface SAP Business Suite Foundation component must be installed in both systems. The advantage of using the Service Provider Interface framework is that the external user works on the same data like the internal user (and not on copies). This assures data consistency and less overhead for backup and security systems.
Impaired Dendritic Development and Memory in Sorbs2 Knock-Out Mice
Zhang, Qiangge; Gao, Xian; Li, Chenchen; Feliciano, Catia; Wang, Dongqing; Zhou, Dingxi; Mei, Yuan; Monteiro, Patricia; Anand, Michelle; Itohara, Shigeyoshi; Dong, Xiaowei; Fu, Zhanyan
2016-01-01
Intellectual disability is a common neurodevelopmental disorder characterized by impaired intellectual and adaptive functioning. Both environmental insults and genetic defects contribute to the etiology of intellectual disability. Copy number variations of SORBS2 have been linked to intellectual disability. However, the neurobiological function of SORBS2 in the brain is unknown. The SORBS2 gene encodes ArgBP2 (Arg/c-Abl kinase binding protein 2) protein in non-neuronal tissues and is alternatively spliced in the brain to encode nArgBP2 protein. We found nArgBP2 colocalized with F-actin at dendritic spines and growth cones in cultured hippocampal neurons. In the mouse brain, nArgBP2 was highly expressed in the cortex, amygdala, and hippocampus, and enriched in the outer one-third of the molecular layer in dentate gyrus. Genetic deletion of Sorbs2 in mice led to reduced dendritic complexity and decreased frequency of AMPAR-miniature spontaneous EPSCs in dentate gyrus granule cells. Behavioral characterization revealed that Sorbs2 deletion led to a reduced acoustic startle response, and defective long-term object recognition memory and contextual fear memory. Together, our findings demonstrate, for the first time, an important role for nArgBP2 in neuronal dendritic development and excitatory synaptic transmission, which may thus inform exploration of neurobiological basis of SORBS2 deficiency in intellectual disability. SIGNIFICANCE STATEMENT Copy number variations of the SORBS2 gene are linked to intellectual disability, but the neurobiological mechanisms are unknown. We found that nArgBP2, the only neuronal isoform encoded by SORBS2, colocalizes with F-actin at neuronal dendritic growth cones and spines. nArgBP2 is highly expressed in the cortex, amygdala, and dentate gyrus in the mouse brain. Genetic deletion of Sorbs2 in mice leads to impaired dendritic complexity and reduced excitatory synaptic transmission in dentate gyrus granule cells, accompanied by behavioral deficits in acoustic startle response and long-term memory. This is the first study of Sorbs2 function in the brain, and our findings may facilitate the study of neurobiological mechanisms underlying SORBS2 deficiency in the development of intellectual disability. PMID:26888934
Xu, Yin; Bailey, Michelle; Seddiki, Nabila; Suzuki, Kazuo; Murray, John M.; Gao, Yuan; Yan, Celine; Cooper, David A.; Kelleher, Anthony D.; Koelsch, Kersten K.; Zaunders, John
2013-01-01
Abstract Memory CD4+ T lymphocytes in peripheral blood that express integrins α4ß7 preferentially recirculate through gut-associated lymphoid tissue (GALT), a proposed site of significant HIV-1 replication. Tregs and activated CD4+ T cells in GALT could also be particularly susceptible to infection. We therefore hypothesized that infection of these subsets of memory CD4+ T cells may contribute disproportionately to the HIV-1 reservoir. A cross-sectional study of CD4+ T cell subsets of memory CD45RO+ cells in peripheral blood mononuclear cells (PBMCs) was conducted using leukapheresis from eight subjects with untreated chronic HIV-1 infection. Real-time polymerase chain reaction (PCR) was used to quantify total and integrated HIV-1 DNA levels from memory CD4+ T cells sorted into integrin β7+ vs. β7−, CD25+CD127low Treg vs. CD127high, and activated CD38+ vs. CD38−. More than 80% of total HIV-1 DNA was found to reside in the integrin β7-negative non-gut-homing subset of CD45RO+ memory CD4+ T cells. Less than 10% was found in highly purified Tregs or CD38+ activated memory cells. Similarly, integrated HIV-1 DNA copies were found to be more abundant in resting non-gut-homing memory CD4+ T cells (76%) than in their activated counterparts (23%). Our investigations showed that the majority of both total and integrated HIV-1 DNA was found within non-gut-homing resting CD4+ T cells. PMID:23971972
Improvements to the National Transport Code Collaboration Data Server
NASA Astrophysics Data System (ADS)
Alexander, David A.
2001-10-01
The data server of the National Transport Code Colaboration Project provides a universal network interface to interpolated or raw transport data accessible by a universal set of names. Data can be acquired from a local copy of the Iternational Multi-Tokamak (ITER) profile database as well as from TRANSP trees of MDS Plus data systems on the net. Data is provided to the user's network client via a CORBA interface, thus providing stateful data server instances, which have the advantage of remembering the desired interpolation, data set, etc. This paper will review the status and discuss the recent improvements made to the data server, such as the modularization of the data server and the addition of hdf5 and MDS Plus data file writing capability.
The UMLS Knowledge Sources: Tools for Building Better User Interfaces
Lindberg, Donald A. B.; Humphreys, Betsy L.
1990-01-01
The current focus of the National Library of Medicine's Unified Medical Language System (UMLS) project is the development, testing, and evaluation of the first versions of three new knowledge sources: the Metathesaurus, the Semantic Network, and the Information Sources Map. These three knowledge sources can be used by interface programs to conduct an intelligent interaction with the user and to make the conceptual link between the user's question and relevant machine-readable information. NLM is providing experimental copies of the initial versions of the UMLS knowledge sources in exchange for feedback on ways they can and should be improved. The hope is that the results of such experimentation will provide both immediate improvements in biomedical information service and useful suggestions for enhancements to the UMLS.
Multiple channel data acquisition system
Crawley, H. Bert; Rosenberg, Eli I.; Meyer, W. Thomas; Gorbics, Mark S.; Thomas, William D.; McKay, Roy L.; Homer, Jr., John F.
1990-05-22
A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler.
Multiple channel data acquisition system
Crawley, H.B.; Rosenberg, E.I.; Meyer, W.T.; Gorbics, M.S.; Thomas, W.D.; McKay, R.L.; Homer, J.F. Jr.
1990-05-22
A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler. 25 figs.
Shark: SQL and Analytics with Cost-Based Query Optimization on Coarse-Grained Distributed Memory
2014-01-13
RDBMS and contains a database (often MySQL or Derby) with a namespace for tables, table metadata and partition information. Table data is stored in an...serialization/deserialization) Java interface implementations with corresponding object inspectors. The Hive driver controls the processing of queries, coordinat...native API, RDD operations are invoked through a functional interface similar to DryadLINQ [32] in Scala, Java or Python. For example, the Scala code for
Development of a front end controller/heap manager for PHENIX
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ericson, M.N.; Allen, M.D.; Musrock, M.S.
1996-12-31
A controller/heap manager has been designed for applicability to all detector subsystem types of PHENIX. the heap manager performs all functions associated with front end electronics control including ADC and analog memory control, data collection, command interpretation and execution, and data packet forming and communication. Interfaces to the unit consist of a timing and control bus, a serial bus, a parallel data bus, and a trigger interface. The topology developed is modular so that many functional blocks are identical for a number of subsystem types. Programmability is maximized through the use of flexible modular functions and implementation using field programmablemore » gate arrays (FPGAs). Details of unit design and functionality will be discussed with particular detail given to subsystems having analog memory-based front end electronics. In addition, mode control, serial functions, and FPGA implementation details will be presented.« less
Interfacial Metal-Oxide Interactions in Resistive Switching Memories.
Cho, Deok-Yong; Luebben, Michael; Wiefels, Stefan; Lee, Kug-Seung; Valov, Ilia
2017-06-07
Metal oxides are commonly used as electrolytes for redox-based resistive switching memories. In most cases, non-noble metals are directly deposited as ohmic electrodes. We demonstrate that irrespective of bulk thermodynamics predictions an intermediate oxide film a few nanometers in thickness is always formed at the metal/insulator interface, and this layer significantly contributes to the development of reliable switching characteristics. We have tested metal electrodes and metal oxides mostly used for memristive devices, that is, Ta, Hf, and Ti and Ta 2 O 5 , HfO 2 , and SiO 2 . Intermediate oxide layers are always formed at the interfaces, whereas only the rate of the electrode oxidation depends on the oxygen affinity of the metal and the chemical stability of the oxide matrix. Device failure is associated with complete transition of short-range order to a more disordered main matrix structure.
Allenstein, Uta; Selle, Susanne; Tadsen, Meike; Patzig, Christian; Höche, Thomas; Zink, Mareike; Mayr, Stefan G
2015-07-22
Durable, mechanically robust osseointegration of metal implants poses one of the largest challenges in contemporary orthopedics. The application of biomimetic hydroxyapatite (HAp) coatings as mediators for enhanced mechanical coupling to natural bone constitutes a promising approach. Motivated by recent advances in the field of smart metals that might open the venue for alternate therapeutic concepts, we explore their mechanical coupling to sputter-deposited HAp layers in a combined experimental-theoretical study. While experimental delamination tests and comprehensive structural characterization, including high-resolution transmission electron microscopy, are utilized to establish structure-property relationships, density functional theory based total energy calculations unravel the underlying physics and chemistry of bonding and confirm the experimental findings. Experiments and modeling indicate that sputter-deposited HAp coatings are strongly adherent to the exemplary ferromagnetic shape-memory alloys, Ni-Mn-Ga and Fe-Pd, with delamination stresses and interface bonding strength exceeding the physiological scales by orders of magnitude.
Fencing data transfers in a parallel active messaging interface of a parallel computer
Blocksome, Michael A.; Mamidala, Amith R.
2015-06-02
Fencing data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task; the compute nodes coupled for data communications through the PAMI and through data communications resources including at least one segment of shared random access memory; including initiating execution through the PAMI of an ordered sequence of active SEND instructions for SEND data transfers between two endpoints, effecting deterministic SEND data transfers through a segment of shared memory; and executing through the PAMI, with no FENCE accounting for SEND data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all SEND instructions initiated prior to execution of the FENCE instruction for SEND data transfers between the two endpoints.
Fencing data transfers in a parallel active messaging interface of a parallel computer
Blocksome, Michael A.; Mamidala, Amith R.
2015-06-09
Fencing data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task; the compute nodes coupled for data communications through the PAMI and through data communications resources including at least one segment of shared random access memory; including initiating execution through the PAMI of an ordered sequence of active SEND instructions for SEND data transfers between two endpoints, effecting deterministic SEND data transfers through a segment of shared memory; and executing through the PAMI, with no FENCE accounting for SEND data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all SEND instructions initiated prior to execution of the FENCE instruction for SEND data transfers between the two endpoints.
Blocksome, Michael A.; Mamidala, Amith R.
2015-07-07
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Blocksome, Michael A.; Mamidala, Amith R.
2015-07-14
Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
Copy Hiding Application Interface
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jones, Holger; Poliakoff, David; Robinson, Peter
2016-10-06
CHAI is a light-weight framework which abstracts the automated movement of data (e.g. to/from Host/Device) via RAJA like performance portability programming model constructs. It can be viewed as a utility framework and an adjunct to FAJA (A Performance Portability Framework). Performance Portability is a technique that abstracts the complexities of modern Heterogeneous Architectures while allowing the original program to undergo incremental minimally invasive code changes in order to adapt to the newer architectures.
Color confinement from fluctuating topology
Kharzeev, Dmitri E.
2016-10-19
QCD possesses a compact gauge group, and this implies a non-trivial topological structure of the vacuum. In this contribution to the Gribov-85 Memorial volume, we first discuss the origin of Gribov copies and their interpretation in terms of fluctuating topology in the QCD vacuum. We then describe the recent work with E. Levin that links the confinement of gluons and color screening to the fluctuating topology, and discuss implications for spin physics, high energy scattering, and the physics of quark-gluon plasma.
1992-06-01
system capabilities \\Jch as memory management and network communications are provided by a virtual machine-type operating environment. Various human ...thinking. The elements of this substrate include representational formality, genericity, a method of formal analysis, and augmentation of human analytical...the form of identifying: the data entity itself; its aliases (including how the data is presented th programs or human users in the form of copy
A membrane-separator interface for mass-spectrometric analysis of blood plasma
NASA Astrophysics Data System (ADS)
Elizarov, A. Yu.; Gerasimov, D. G.
2014-09-01
We demonstrate the possibility of rapid mass-spectrometric determination of the content of anesthetic agents in blood plasma with the aid of a membrane-separator interface. The interface employs a hydrophobic selective membrane that is capable of separating various anesthetic drugs (including inhalation anesthetic sevofluran, noninhalation anesthetic thiopental, hypnotic propofol, and opioid analgesic fentanyl) from the blood plasma and introducing samples into a mass spectrometer. Analysis of the blood plasma was not accompanied by the memory effect and did not lead to membrane degradation. Results of clinical investigation of the concentration of anesthetics in the blood plasma of patients are presented.
Stuart, James Ian; Delport, Johan; Lannigan, Robert; Zahariadis, George
2014-01-01
BACKGROUND: Disease monitoring of viruses using real-time polymerase chain reaction (PCR) requires knowledge of the precision of the test to determine what constitutes a significant change. Calculation of quantitative PCR confidence limits requires bivariate statistical methods. OBJECTIVE: To develop a simple-to-use graphical user interface to determine the uncertainty of measurement (UOM) of BK virus, cytomegalovirus (CMV) and Epstein-Barr virus (EBV) real-time PCR assays. METHODS: Thirty positive clinical samples for each of the three viral assays were repeated once. A graphical user interface was developed using a spreadsheet (Excel, Microsoft Corporation, USA) to enable data entry and calculation of the UOM (according to Fieller’s theorem) and PCR efficiency. RESULTS: The confidence limits for the BK virus, CMV and EBV tests were ∼0.5 log, 0.5 log to 1.0 log, and 0.5 log to 1.0 log, respectively. The efficiencies of these assays, in the same order were 105%, 119% and 90%. The confidence limits remained stable over the linear range of all three tests. DISCUSSION: A >5 fold (0.7 log) and a >3-fold (0.5 log) change in viral load were significant for CMV and EBV when the results were ≤1000 copies/mL and >1000 copies/mL, respectively. A >3-fold (0.5 log) change in viral load was significant for BK virus over its entire linear range. PCR efficiency was ideal for BK virus and EBV but not CMV. Standardized international reference materials and shared reporting of UOM among laboratories are required for the development of treatment guidelines for BK virus, CMV and EBV in the context of changes in viral load. PMID:25285125
Stuart, James Ian; Delport, Johan; Lannigan, Robert; Zahariadis, George
2014-07-01
Disease monitoring of viruses using real-time polymerase chain reaction (PCR) requires knowledge of the precision of the test to determine what constitutes a significant change. Calculation of quantitative PCR confidence limits requires bivariate statistical methods. To develop a simple-to-use graphical user interface to determine the uncertainty of measurement (UOM) of BK virus, cytomegalovirus (CMV) and Epstein-Barr virus (EBV) real-time PCR assays. Thirty positive clinical samples for each of the three viral assays were repeated once. A graphical user interface was developed using a spreadsheet (Excel, Microsoft Corporation, USA) to enable data entry and calculation of the UOM (according to Fieller's theorem) and PCR efficiency. The confidence limits for the BK virus, CMV and EBV tests were ∼0.5 log, 0.5 log to 1.0 log, and 0.5 log to 1.0 log, respectively. The efficiencies of these assays, in the same order were 105%, 119% and 90%. The confidence limits remained stable over the linear range of all three tests. A >5 fold (0.7 log) and a >3-fold (0.5 log) change in viral load were significant for CMV and EBV when the results were ≤1000 copies/mL and >1000 copies/mL, respectively. A >3-fold (0.5 log) change in viral load was significant for BK virus over its entire linear range. PCR efficiency was ideal for BK virus and EBV but not CMV. Standardized international reference materials and shared reporting of UOM among laboratories are required for the development of treatment guidelines for BK virus, CMV and EBV in the context of changes in viral load.
An Experimental Investigation of the Boundary Layer under Pack Ice
1975-01-01
current-meter interface ( CMIF ) consists of a very stable, 20-Kllz crystal oscillator and counter, a master memory-address buffer, and a buffer for each...data channel to a specific location in the computer’s memory, The CMIF also generates computer interrupts at a rate determined by the program (12.8... CMIF can handle up to 128 channels and is designed so that even if all channels have simultaneous dipulses, the processing delay is less than .05 msec
Altered Episodic Memory in Introverted Young Adults Carrying the BDNFMet Allele
Bombardier, Andreanne; Beauchemin, Maude; Gosselin, Nadia; Poirier, Judes; De Beaumont, Louis
2016-01-01
While most studies have been interested in the distinct, predisposing roles of the common BDNF Val66Met variant and extraversion personality traits on episodic memory, very few studies have looked at the synergistic effects of genetic and personality factors to account for cognitive variance. This is surprising considering recent reports challenging the long-held belief that the BDNFMet variant negatively impacts cognitive function. A total of 75 young healthy adults (26 of them carried at least one copy of the BDNFMet allele) took part in this study consisting of genetic profiling from saliva, personality assessment using the Revised NEO Personality Inventory (NEO PI-R) and a short battery of neuropsychological tests. An ANOVA revealed that BDNFMet carriers were significantly less extraverted than BDNFVal carriers (F1,73 = 9.54; p < 0.01; ηp2 = 0.126). Moreover, extraversion was found to significantly moderate the relationship between the BDNF genotype and episodic memory performance (p = 0.03). Subsequent correlational analyses yielded a strong and significant correlation (r = 0.542; p < 0.005) between introversion and delayed episodic memory specific to BDNFMet individuals. The present study suggests that introversion and the BDNFMet variant synergistically interact to reduce episodic memory performance in healthy, young adults. These findings reaffirm that a more accurate explanation of cognitive variance can be achieved by looking at the synergistic effects of genotype and phenotype factors. PMID:27845759
Altered Episodic Memory in Introverted Young Adults Carrying the BDNFMet Allele.
Bombardier, Andreanne; Beauchemin, Maude; Gosselin, Nadia; Poirier, Judes; De Beaumont, Louis
2016-11-12
While most studies have been interested in the distinct, predisposing roles of the common BDNF Val66Met variant and extraversion personality traits on episodic memory, very few studies have looked at the synergistic effects of genetic and personality factors to account for cognitive variance. This is surprising considering recent reports challenging the long-held belief that the BDNF Met variant negatively impacts cognitive function. A total of 75 young healthy adults (26 of them carried at least one copy of the BDNF Met allele) took part in this study consisting of genetic profiling from saliva, personality assessment using the Revised NEO Personality Inventory (NEO PI-R) and a short battery of neuropsychological tests. An ANOVA revealed that BDNF Met carriers were significantly less extraverted than BDNF Val carriers ( F 1,73 = 9.54; p < 0.01; η p ² = 0.126). Moreover, extraversion was found to significantly moderate the relationship between the BDNF genotype and episodic memory performance ( p = 0.03). Subsequent correlational analyses yielded a strong and significant correlation ( r = 0.542; p < 0.005) between introversion and delayed episodic memory specific to BDNF Met individuals. The present study suggests that introversion and the BDNF Met variant synergistically interact to reduce episodic memory performance in healthy, young adults. These findings reaffirm that a more accurate explanation of cognitive variance can be achieved by looking at the synergistic effects of genotype and phenotype factors.
Brébion, G; Stephan-Otto, C; Huerta-Ramos, E; Usall, J; Perez Del Olmo, M; Contel, M; Haro, J M; Ochoa, S
2014-10-01
Verbal working memory span is decreased in patients with schizophrenia, and this might contribute to impairment in higher cognitive functions as well as to the formation of certain clinical symptoms. Processing speed has been identified as a crucial factor in cognitive efficiency in this population. We tested the hypothesis that decreased processing speed underlies the verbal working memory deficit in patients and mediates the associations between working memory span and clinical symptoms. Forty-nine schizophrenia inpatients recruited from units for chronic and acute patients, and forty-five healthy participants, were involved in the study. Verbal working memory span was assessed by means of the letter-number span. The Digit Copy test was used to assess motor speed, and the Digit Symbol Substitution Test to assess cognitive speed. The working memory span was significantly impaired in patients (F(1,90)=4.6, P<0.05). However, the group difference was eliminated when either the motor or the cognitive speed measure was controlled (F(1,89)=0.03, P=0.86, and F(1,89)=0.03, P=0.88). In the patient group, working memory span was significantly correlated with negative symptoms (r=-0.52, P<0.0001) and thought disorganisation (r=-0.34, P<0.025) scores. Regression analyses showed that the association with negative symptoms was no longer significant when the motor speed measure was controlled (β=-0.12, P=0.20), while the association with thought disorganisation was no longer significant when the cognitive speed measure was controlled (β=-0.10, P=0.26). Decrement in motor and cognitive speed plays a significant role in both the verbal working memory impairment observed in patients and the associations between verbal working memory impairment and clinical symptoms. Copyright © 2014 Elsevier Masson SAS. All rights reserved.
Gericke, G S
2010-05-01
Previous reports of specific patterns of increased fragility at common chromosomal fragile sites (CFS) found in association with certain neurobehavioural disorders did not attract attention at the time due to a shift towards molecular approaches to delineate neuropsychiatric disorder candidate genes. Links with miRNA, altered methylation and the origin of copy number variation indicate that CFS region characteristics may be part of chromatinomic mechanisms that are increasingly linked with neuroplasticity and memory. Current reports of large-scale double-stranded DNA breaks in differentiating neurons and evidence of ongoing DNA demethylation of specific gene promoters in adult hippocampus may shed new light on the dynamic epigenetic changes that are increasingly appreciated as contributing to long-term memory consolidation. The expression of immune recombination activating genes in key stress-induced memory regions suggests the adoption by the brain of this ancient pattern recognition and memory system to establish a structural basis for long-term memory through controlled chromosomal breakage at highly specific genomic regions. It is furthermore considered that these mechanisms for management of epigenetic information related to stress memory could be linked, in some instances, with the transfer of the somatically acquired information to the germline. Here, rearranged sequences can be subjected to further selection and possible eventual retrotranscription to become part of the more stable coding machinery if proven to be crucial for survival and reproduction. While linkage of cognitive memory with stress and fear circuitry and memory establishment through structural DNA modification is proposed as a normal process, inappropriate activation of immune-like genomic rearrangement processes through traumatic stress memory may have the potential to lead to undesirable activation of neuro-inflammatory processes. These theories could have a significant impact on the interpretation of risks posed by heredity and the environment and the search for neuropsychiatric candidate genes.
Zhang, Hongtao; Guo, Xuefeng; Hui, Jingshu; Hu, Shuxin; Xu, Wei; Zhu, Daoben
2011-11-09
Interface modification is an effective and promising route for developing functional organic field-effect transistors (OFETs). In this context, however, researchers have not created a reliable method of functionalizing the interfaces existing in OFETs, although this has been crucial for the technological development of high-performance CMOS circuits. Here, we demonstrate a novel approach that enables us to reversibly photocontrol the carrier density at the interface by using photochromic spiropyran (SP) self-assembled monolayers (SAMs) sandwiched between active semiconductors and gate insulators. Reversible changes in dipole moment of SPs in SAMs triggered by lights with different wavelengths produce two distinct built-in electric fields on the OFET that can modulate the channel conductance and consequently threshold voltage values, thus leading to a low-cost noninvasive memory device. This concept of interface functionalization offers attractive new prospects for the development of organic electronic devices with tailored electronic and other properties.
Accurate reactions open up the way for more cooperative societies
NASA Astrophysics Data System (ADS)
Vukov, Jeromos
2014-09-01
We consider a prisoner's dilemma model where the interaction neighborhood is defined by a square lattice. Players are equipped with basic cognitive abilities such as being able to distinguish their partners, remember their actions, and react to their strategy. By means of their short-term memory, they can remember not only the last action of their partner but the way they reacted to it themselves. This additional accuracy in the memory enables the handling of different interaction patterns in a more appropriate way and this results in a cooperative community with a strikingly high cooperation level for any temptation value. However, the more developed cognitive abilities can only be effective if the copying process of the strategies is accurate enough. The excessive extent of faulty decisions can deal a fatal blow to the possibility of stable cooperative relations.
Propulsion/flight control integration technology (PROFIT) design analysis status
NASA Technical Reports Server (NTRS)
Carlin, C. M.; Hastings, W. J.
1978-01-01
The propulsion flight control integration technology (PROFIT) program was designed to develop a flying testbed dedicated to controls research. The preliminary design, analysis, and feasibility studies conducted in support of the PROFIT program are reported. The PROFIT system was built around existing IPCS hardware. In order to achieve the desired system flexibility and capability, additional interfaces between the IPCS hardware and F-15 systems were required. The requirements for additions and modifications to the existing hardware were defined. Those interfaces involving the more significant changes were studied. The DCU memory expansion to 32K with flight qualified hardware was completed on a brassboard basis. The uplink interface breadboard and a brassboard of the central computer interface were also tested. Two preliminary designs and corresponding program plans are presented.
NASA Technical Reports Server (NTRS)
Hall, William A. (Inventor)
1993-01-01
A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.
Experimentation and Evaluation of Advanced Integrated System Concepts.
1980-09-26
ART). (b) Selects one of four trunk circuits from each trunk (m) Dual Modem and Loop Interface (DMLI) card. circuit card. (n) Dictation and paging...Arbitrator L Bus - Modems ET _Modems Modems Figure 4-1 Certain Telenet Processor models (see Section 4.3 for details) can be equipped with redundancy to...JMemory Bank B Memory Bank A ArbittrAto Arbitrator A t a i Interface U a Modems $ Figure 4-2 In a system with common logic redundancy all centrally
Yang, Li; Tong, Rui; Wang, Zhanhua; Xia, Hesheng
2018-03-25
A new kind of fast near-infrared (NIR) light-responsive shape-memory polymer composites was prepared by introducing polydopamine particles (PDAPs) into commercial shape-memory polyurethane (SMPU). The toughness and strength of the polydopamine-particle-filled polyurethane composites (SMPU-PDAPs) were significantly enhanced with the addition of PDAPs due to the strong interface interaction between PDAPs and polyurethane segments. Owing to the outstanding photothermal effect of PDAPs, the composites exhibit a rapid light-responsive shape-memory process in 60 s with a PDAPs content of 0.01 wt%. Due to the excellent dispersion and convenient preparation method, PDAPs have great potential to be used as high-efficiency and environmentally friendly fillers to obtain novel photoactive functional polymer composites. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Runtime support for parallelizing data mining algorithms
NASA Astrophysics Data System (ADS)
Jin, Ruoming; Agrawal, Gagan
2002-03-01
With recent technological advances, shared memory parallel machines have become more scalable, and offer large main memories and high bus bandwidths. They are emerging as good platforms for data warehousing and data mining. In this paper, we focus on shared memory parallelization of data mining algorithms. We have developed a series of techniques for parallelization of data mining algorithms, including full replication, full locking, fixed locking, optimized full locking, and cache-sensitive locking. Unlike previous work on shared memory parallelization of specific data mining algorithms, all of our techniques apply to a large number of common data mining algorithms. In addition, we propose a reduction-object based interface for specifying a data mining algorithm. We show how our runtime system can apply any of the technique we have developed starting from a common specification of the algorithm.
NASA Astrophysics Data System (ADS)
Calafiura, Paolo; Leggett, Charles; Seuster, Rolf; Tsulaia, Vakhtang; Van Gemmeren, Peter
2015-12-01
AthenaMP is a multi-process version of the ATLAS reconstruction, simulation and data analysis framework Athena. By leveraging Linux fork and copy-on-write mechanisms, it allows for sharing of memory pages between event processors running on the same compute node with little to no change in the application code. Originally targeted to optimize the memory footprint of reconstruction jobs, AthenaMP has demonstrated that it can reduce the memory usage of certain configurations of ATLAS production jobs by a factor of 2. AthenaMP has also evolved to become the parallel event-processing core of the recently developed ATLAS infrastructure for fine-grained event processing (Event Service) which allows the running of AthenaMP inside massively parallel distributed applications on hundreds of compute nodes simultaneously. We present the architecture of AthenaMP, various strategies implemented by AthenaMP for scheduling workload to worker processes (for example: Shared Event Queue and Shared Distributor of Event Tokens) and the usage of AthenaMP in the diversity of ATLAS event processing workloads on various computing resources: Grid, opportunistic resources and HPC.
Park, Jun-Ho; Park, Myung-Joo; Lee, Jang-Sik
2017-01-05
The development of paper electronics would enable realization of extremely cheap devices for portable, disposable, and environmentally-benign electronics. Here, we propose a simple dry-writing tool similar to a pencil, which can be used to draw electrically conducting lines on paper for use in paper-based electronic devices. The fabricated pencil is composed of silver nanoparticles decorated on graphene layers to construct layered hybrid nanostructures. This pencil can draw highly conductive lines that are flexible and foldable on conventional papers. Electrodes drawn using this pencil on conventional copy paper are stable during repetitive mechanical folding and highly resistant to moisture/chemicals. This pencil can draw a conductive line where its resistance can be tuned by changing the amount of nanoparticles. A nonvolatile memory device is realized on papers by hand written lines with different resistance. All memory elements are composed of carbons on papers, so complete data security can be achieved by burning the memory papers. This work will provide a new opportunity to fabricate electronic devices on real papers with good conductivity as well as robust mechanical/chemical stability.
Construction of RNA-Quantum Dot Chimera for Nanoscale Resistive Biomemory Application.
Lee, Taek; Yagati, Ajay Kumar; Pi, Fengmei; Sharma, Ashwani; Choi, Jeong-Woo; Guo, Peixuan
2015-07-28
RNA nanotechnology offers advantages to construct thermally and chemically stable nanoparticles with well-defined shape and structure. Here we report the development of an RNA-QD (quantum dot) chimera for resistive biomolecular memory application. Each QD holds two copies of the pRNA three-way junction (pRNA-3WJ) of the bacteriophage phi29 DNA packaging motor. The fixed quantity of two RNAs per QD was achieved by immobilizing the pRNA-3WJ with a Sephadex aptamer for resin binding. Two thiolated pRNA-3WJ serve as two feet of the chimera that stand on the gold plate. The RNA nanostructure served as both an insulator and a mediator to provide defined distance between the QD and gold. Immobilization of the chimera nanoparticle was confirmed with scanning tunneling microscopy. As revealed by scanning tunneling spectroscopy, the conjugated pRNA-3WJ-QD chimera exhibited an excellent electrical bistability signal for biomolecular memory function, demonstrating great potential for the development of resistive biomolecular memory and a nano-bio-inspired electronic device for information processing and computing.
Chunks in expert memory: evidence for the magical number four ... or is it two?
Gobet, Fernand; Clarkson, Gary
2004-11-01
This study aims to test the divergent predictions of the chunking theory (Chase & Simon, 1973) and template theory (Gobet & Simon, 1996a, 2000) with respect to the number of chunks held in visual short-term memory and the size of chunks used by experts. We presented game and random chessboards in both a copy and a recall task. In a within-subject design, the stimuli were displayed using two presentation media: (a) physical board and pieces, as in Chase and Simon's (1973) study; and (b) a computer display, as in Gobet and Simon's (1998) study. Results show that, in most cases, no more than three chunks were replaced in the recall task, as predicted by template theory. In addition, with game positions in the computer condition, chess Masters replaced very large chunks (up to 15 pieces), again in line with template theory. Overall, the results suggest that the original chunking theory overestimated short-term memory capacity and underestimated the size of chunks used, in particular with Masters. They also suggest that Cowan's (2001) proposal that STM holds four chunks may be an overestimate.
NASA Astrophysics Data System (ADS)
Liu, Jiping; Kang, Xiaochen; Dong, Chun; Xu, Shenghua
2017-12-01
Surface area estimation is a widely used tool for resource evaluation in the physical world. When processing large scale spatial data, the input/output (I/O) can easily become the bottleneck in parallelizing the algorithm due to the limited physical memory resources and the very slow disk transfer rate. In this paper, we proposed a stream tilling approach to surface area estimation that first decomposed a spatial data set into tiles with topological expansions. With these tiles, the one-to-one mapping relationship between the input and the computing process was broken. Then, we realized a streaming framework towards the scheduling of the I/O processes and computing units. Herein, each computing unit encapsulated a same copy of the estimation algorithm, and multiple asynchronous computing units could work individually in parallel. Finally, the performed experiment demonstrated that our stream tilling estimation can efficiently alleviate the heavy pressures from the I/O-bound work, and the measured speedup after being optimized have greatly outperformed the directly parallel versions in shared memory systems with multi-core processors.
Construction of RNA-Quantum Dot Chimera for Nanoscale Resistive Biomemory Application
Lee, Taek; Yagati, Ajay Kumar; Pi, Fengmei; Sharma, Ashwani; Choi, Jeong-Woo; Guo, Peixuan
2015-01-01
RNA nanotechnology offer advantages to construct thermally and chemically stable nanoparticles with well-defined shape and structure. Here we report the development of an RNA-Qd (quantum dot) chimera for resistive biomolecular memory application. Each Qd holds two copies of the pRNA three-way junction (pRNA-3WJ) of bacteriophage phi29 DNA-packaging motor. The fixed quantity of two RNA per Qd was achieved by immobilizing pRNA-3WJ harboring Sephadex aptamer for resin binding. Two thiolated pRNA-3WJ serves as two feet of the chimera to stand on the gold plate. The RNA nanostructure served as both an insulator and a mediator to provide defined distance between Qd and gold. Immobilization of chimera nanoparticle was confirmed through scanning tunneling microscopy (STM). As revealed by scanning tunneling spectroscopy (STS), the conjugated pRNA-3WJ-Qd chimera exhibited excellent electrical bi-stability signal for biomolecular memory function, demonstrating great potential for the development of resistive biomolecular memory and nanobio-inspired electronic device for information processing and computing. PMID:26135474
Development of the FITS tools package for multiple software environments
NASA Technical Reports Server (NTRS)
Pence, W. D.; Blackburn, J. K.
1992-01-01
The HEASARC is developing a package of general purpose software for analyzing data files in FITS format. This paper describes the design philosophy which makes the software both machine-independent (it runs on VAXs, Suns, and DEC-stations) and software environment-independent. Currently the software can be compiled and linked to produce IRAF tasks, or alternatively, the same source code can be used to generate stand-alone tasks using one of two implementations of a user-parameter interface library. The machine independence of the software is achieved by writing the source code in ANSI standard Fortran or C, using the machine-independent FITSIO subroutine interface for all data file I/O, and using a standard user-parameter subroutine interface for all user I/O. The latter interface is based on the Fortran IRAF Parameter File interface developed at STScI. The IRAF tasks are built by linking to the IRAF implementation of this parameter interface library. Two other implementations of this parameter interface library, which have no IRAF dependencies, are now available which can be used to generate stand-alone executable tasks. These stand-alone tasks can simply be executed from the machine operating system prompt either by supplying all the task parameters on the command line or by entering the task name after which the user will be prompted for any required parameters. A first release of this FTOOLS package is now publicly available. The currently available tasks are described, along with instructions on how to obtain a copy of the software.
2015-04-03
08 and AFRL/ CA policy clarification memorandum dated 16 Jan 09. This report is available to the general public, including foreign nationals. Copies... doped graphene micro-ribbon array and a quantum-well electron gas sitting at an interface between a half-space of air and another half-space of a... doped semiconductor substrate which supports a surface-plasmon mode in our system. The coupling between a spatially-modulated total electromagnetic
NASA Astrophysics Data System (ADS)
Mak, Joseph N.; McFarland, Dennis J.; Vaughan, Theresa M.; McCane, Lynn M.; Tsui, Phillippa Z.; Zeitlin, Debra J.; Sellers, Eric W.; Wolpaw, Jonathan R.
2012-04-01
The purpose of this study was to identify electroencephalography (EEG) features that correlate with P300-based brain-computer interface (P300 BCI) performance in people with amyotrophic lateral sclerosis (ALS). Twenty people with ALS used a P300 BCI spelling application in copy-spelling mode. Three types of EEG features were found to be good predictors of P300 BCI performance: (1) the root-mean-square amplitude and (2) the negative peak amplitude of the event-related potential to target stimuli (target ERP) at Fz, Cz, P3, Pz, and P4; and (3) EEG theta frequency (4.5-8 Hz) power at Fz, Cz, P3, Pz, P4, PO7, PO8 and Oz. A statistical prediction model that used a subset of these features accounted for >60% of the variance in copy-spelling performance (p < 0.001, mean R2 = 0.6175). The correlations reflected between-subject, rather than within-subject, effects. The results enhance understanding of performance differences among P300 BCI users. The predictors found in this study might help in: (1) identifying suitable candidates for long-term P300 BCI operation; (2) assessing performance online. Further work on within-subject effects needs to be done to establish whether P300 BCI user performance could be improved by optimizing one or more of these EEG features.
Phast4Windows: A 3D graphical user interface for the reactive-transport simulator PHAST
Charlton, Scott R.; Parkhurst, David L.
2013-01-01
Phast4Windows is a Windows® program for developing and running groundwater-flow and reactive-transport models with the PHAST simulator. This graphical user interface allows definition of grid-independent spatial distributions of model properties—the porous media properties, the initial head and chemistry conditions, boundary conditions, and locations of wells, rivers, drains, and accounting zones—and other parameters necessary for a simulation. Spatial data can be defined without reference to a grid by drawing, by point-by-point definitions, or by importing files, including ArcInfo® shape and raster files. All definitions can be inspected, edited, deleted, moved, copied, and switched from hidden to visible through the data tree of the interface. Model features are visualized in the main panel of the interface, so that it is possible to zoom, pan, and rotate features in three dimensions (3D). PHAST simulates single phase, constant density, saturated groundwater flow under confined or unconfined conditions. Reactions among multiple solutes include mineral equilibria, cation exchange, surface complexation, solid solutions, and general kinetic reactions. The interface can be used to develop and run simple or complex models, and is ideal for use in the classroom, for analysis of laboratory column experiments, and for development of field-scale simulations of geochemical processes and contaminant transport.
Hierarchical resilience with lightweight threads.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wheeler, Kyle Bruce
2011-10-01
This paper proposes methodology for providing robustness and resilience for a highly threaded distributed- and shared-memory environment based on well-defined inputs and outputs to lightweight tasks. These inputs and outputs form a failure 'barrier', allowing tasks to be restarted or duplicated as necessary. These barriers must be expanded based on task behavior, such as communication between tasks, but do not prohibit any given behavior. One of the trends in high-performance computing codes seems to be a trend toward self-contained functions that mimic functional programming. Software designers are trending toward a model of software design where their core functions are specifiedmore » in side-effect free or low-side-effect ways, wherein the inputs and outputs of the functions are well-defined. This provides the ability to copy the inputs to wherever they need to be - whether that's the other side of the PCI bus or the other side of the network - do work on that input using local memory, and then copy the outputs back (as needed). This design pattern is popular among new distributed threading environment designs. Such designs include the Barcelona STARS system, distributed OpenMP systems, the Habanero-C and Habanero-Java systems from Vivek Sarkar at Rice University, the HPX/ParalleX model from LSU, as well as our own Scalable Parallel Runtime effort (SPR) and the Trilinos stateless kernels. This design pattern is also shared by CUDA and several OpenMP extensions for GPU-type accelerators (e.g. the PGI OpenMP extensions).« less
ERIC Educational Resources Information Center
Connolly, Bruce, Comp.
1986-01-01
This first installment of four-part "Online/Database Laserdisk Directory" reports on aspects of laserdisks including: product name; product description; company name; conpatibility information; type of laserdisk (compact disc read-only-memory, videodisk); software used; interface with magnetic media capability; conditions of usage;…
NASA Astrophysics Data System (ADS)
Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.
2015-10-01
Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e
Neuropsychological findings in childhood neglect and their relationships to pediatric PTSD.
DE Bellis, Michael D; Hooper, Stephen R; Spratt, Eve G; Woolley, Donald P
2009-11-01
Although child neglect is the most prevalent form of child maltreatment, the neurocognitive effects of neglect are understudied. We examined IQ, reading, mathematics, and neurocognitive domains of fine-motor skills, language, visual-spatial, memory/learning, and attention/executive functions in two groups of nonsexually abused medically healthy neglected children, one with DSM-IV posttraumatic stress disorder (PTSD) and one without, and a demographically similar healthy nonmaltreated control group. Significantly lower IQ, reading, mathematics, and selected differences in complex visual attention, visual memory, language, verbal memory and learning, planning, problem solving, and speeded naming were seen in Neglect Groups. The Neglect with PTSD Group performed worse than controls on NEPSY Design Copying, NEPSY Tower, and Mathematics; and performed worse than controls and Neglect without PTSD on NEPSY Memory for Faces-Delayed. Negative correlations were seen between PTSD symptoms, PTSD severity, and maltreatment variables, and IQ, Academic Achievement, and neurocognitive domains. Neglected children demonstrated significantly lower neurocognitive outcomes and academic achievement than controls. Lower IQ, neurocognitive functions, and achievement may be associated with more PTSD symptoms (particularly re-experiencing symptoms), greater PTSD severity, and a greater number of maltreatment experiences. Trauma experiences may additionally contribute to subsequent neurodevelopmental risk in neglected children. (JINS, 2009, 15, 868-878.).
Fractional Steps methods for transient problems on commodity computer architectures
NASA Astrophysics Data System (ADS)
Krotkiewski, M.; Dabrowski, M.; Podladchikov, Y. Y.
2008-12-01
Fractional Steps methods are suitable for modeling transient processes that are central to many geological applications. Low memory requirements and modest computational complexity facilitates calculations on high-resolution three-dimensional models. An efficient implementation of Alternating Direction Implicit/Locally One-Dimensional schemes for an Opteron-based shared memory system is presented. The memory bandwidth usage, the main bottleneck on modern computer architectures, is specially addressed. High efficiency of above 2 GFlops per CPU is sustained for problems of 1 billion degrees of freedom. The optimized sequential implementation of all 1D sweeps is comparable in execution time to copying the used data in the memory. Scalability of the parallel implementation on up to 8 CPUs is close to perfect. Performing one timestep of the Locally One-Dimensional scheme on a system of 1000 3 unknowns on 8 CPUs takes only 11 s. We validate the LOD scheme using a computational model of an isolated inclusion subject to a constant far field flux. Next, we study numerically the evolution of a diffusion front and the effective thermal conductivity of composites consisting of multiple inclusions and compare the results with predictions based on the differential effective medium approach. Finally, application of the developed parabolic solver is suggested for a real-world problem of fluid transport and reactions inside a reservoir.
Neuropsychological Findings in Childhood Neglect and their Relationships to Pediatric PTSD
De Bellis, Michael D.; Hooper, Stephen R.; Spratt, Eve G.; Woolley, Donald P.
2011-01-01
Statement of the problem Although child neglect is the most prevalent form of child maltreatment, the neurocognitive effects of neglect is understudied. Methods We examined IQ, reading, mathematics, and neurocognitive domains of fine-motor skills, language, visual-spatial, memory/learning, and attention/executive functions in two groups of non-sexually abused medically healthy neglected children, one with DSM-IV posttraumatic stress disorder (PTSD) and one without, and a demographically similar healthy non-maltreated control group. Key findings Significantly lower IQ, reading, mathematics, and selected differences in complex visual attention, visual memory, language, verbal memory and learning, planning, problem solving, and speeded naming were seen in Neglect Groups. The Neglect with PTSD Group performed worse than controls on NEPSY Design Copying, NEPSY Tower, and Mathematics; and performed worse than controls and Neglect without PTSD on NEPSY Memory for Faces-Delayed. Negative correlations were seen between PTSD symptoms, PTSD severity, and maltreatment variables, and IQ, Academic Achievement, and neurocognitive domains. Conclusions Neglected children demonstrated significantly lower neurocognitive outcomes and academic achievement than controls. Lower IQ, neurocognitive functions, and achievement may be associated with more PTSD symptoms (particularly re-experiencing symptoms), greater PTSD severity, and a greater number of maltreatment experiences. Trauma experiences may additionally contribute to subsequent neurodevelopmental risk in neglected children. PMID:19703321
Location-specific effects of attention during visual short-term memory maintenance.
Matsukura, Michi; Cosman, Joshua D; Roper, Zachary J J; Vatterott, Daniel B; Vecera, Shaun P
2014-06-01
Recent neuroimaging studies suggest that early sensory areas such as area V1 are recruited to actively maintain a selected feature of the item held in visual short-term memory (VSTM). These findings raise the possibility that visual attention operates in similar manners across perceptual and memory representations to a certain extent, despite memory-level and perception-level selections are functionally dissociable. If VSTM operates by retaining "reasonable copies" of scenes constructed during sensory processing (Serences et al., 2009, p. 207, the sensory recruitment hypothesis), then it is possible that selective attention can be guided by both exogenous (peripheral) and endogenous (central) cues during VSTM maintenance. Yet, the results from the previous studies that examined this issue are inconsistent. In the present study, we investigated whether attention can be directed to a specific item's location represented in VSTM with the exogenous cue in a well-controlled setting. The results from the four experiments suggest that, as observed with the endogenous cue, the exogenous cue can efficiently guide selective attention during VSTM maintenance. The finding is not only consistent with the sensory recruitment hypothesis but also validates the legitimacy of the exogenous cue use in past and future studies. PsycINFO Database Record (c) 2014 APA, all rights reserved.
NASA Astrophysics Data System (ADS)
Chien, W. C.; Chen, Y. C.; Lai, E. K.; Lee, F. M.; Lin, Y. Y.; Chuang, Alfred T. H.; Chang, K. P.; Yao, Y. D.; Chou, T. H.; Lin, H. M.; Lee, M. H.; Shih, Y. H.; Hsieh, K. Y.; Lu, Chih-Yuan
2011-03-01
Tungsten oxide (WO X ) resistive memory (ReRAM), a two-terminal CMOS compatible nonvolatile memory, has shown promise to surpass the existing flash memory in terms of scalability, switching speed, and potential for 3D stacking. The memory layer, WO X , can be easily fabricated by down-stream plasma oxidation (DSPO) or rapid thermal oxidation (RTO) of W plugs universally used in CMOS circuits. Results of conductive AFM (C-AFM) experiment suggest the switching mechanism is dominated by the REDOX (Reduction-oxidation) reaction—the creation of conducting filaments leads to a low resistance state and the rupturing of the filaments results in a high resistance state. Our experimental results show that the reactions happen at the TE/WO X interface. With this understanding in mind, we proposed two approaches to boost the memory performance: (i) using DSPO to treat the RTO WO X surface and (ii) using Pt TE, which forms a Schottky barrier with WO X . Both approaches, especially the latter, significantly reduce the forming current and enlarge the memory window.
Monolayer optical memory cells based on artificial trap-mediated charge storage and release
NASA Astrophysics Data System (ADS)
Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min
2017-03-01
Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.
Cheng, Xue-Feng; Hou, Xiang; Qian, Wen-Hu; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei
2017-08-23
Herein, for the first time, quaternary resistive memory based on an organic molecule is achieved via surface engineering. A layer of poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT-PSS) was inserted between the indium tin oxide (ITO) electrode and the organic layer (squaraine, SA-Bu) to form an ITO/PEDOT-PSS/SA-Bu/Al architecture. The modified resistive random-access memory (RRAM) devices achieve quaternary memory switching with the highest yield (∼41%) to date. Surface morphology, crystallinity, and mosaicity of the deposited organic grains are greatly improved after insertion of a PEDOT-PSS interlayer, which provides better contacts at the grain boundaries as well as the electrode/active layer interface. The PEDOT-PSS interlayer also reduces the hole injection barrier from the electrode to the active layer. Thus, the threshold voltage of each switching is greatly reduced, allowing for more quaternary switching in a certain voltage window. Our results provide a simple yet powerful strategy as an alternative to molecular design to achieve organic quaternary resistive memory.
Short-Term Memory Trace in Rapidly Adapting Synapses of Inferior Temporal Cortex
Sugase-Miyamoto, Yasuko; Liu, Zheng; Wiener, Matthew C.; Optican, Lance M.; Richmond, Barry J.
2008-01-01
Visual short-term memory tasks depend upon both the inferior temporal cortex (ITC) and the prefrontal cortex (PFC). Activity in some neurons persists after the first (sample) stimulus is shown. This delay-period activity has been proposed as an important mechanism for working memory. In ITC neurons, intervening (nonmatching) stimuli wipe out the delay-period activity; hence, the role of ITC in memory must depend upon a different mechanism. Here, we look for a possible mechanism by contrasting memory effects in two architectonically different parts of ITC: area TE and the perirhinal cortex. We found that a large proportion (80%) of stimulus-selective neurons in area TE of macaque ITCs exhibit a memory effect during the stimulus interval. During a sequential delayed matching-to-sample task (DMS), the noise in the neuronal response to the test image was correlated with the noise in the neuronal response to the sample image. Neurons in perirhinal cortex did not show this correlation. These results led us to hypothesize that area TE contributes to short-term memory by acting as a matched filter. When the sample image appears, each TE neuron captures a static copy of its inputs by rapidly adjusting its synaptic weights to match the strength of their individual inputs. Input signals from subsequent images are multiplied by those synaptic weights, thereby computing a measure of the correlation between the past and present inputs. The total activity in area TE is sufficient to quantify the similarity between the two images. This matched filter theory provides an explanation of what is remembered, where the trace is stored, and how comparison is done across time, all without requiring delay period activity. Simulations of a matched filter model match the experimental results, suggesting that area TE neurons store a synaptic memory trace during short-term visual memory. PMID:18464917
NASA Technical Reports Server (NTRS)
Nissley, L. E.
1979-01-01
The Aerospace Ground Equipment (AGE) provides an interface between a human operator and a complete spaceborne sequence timing device with a memory storage program. The AGE provides a means for composing, editing, syntax checking, and storing timing device programs. The AGE is implemented with a standard Hewlett-Packard 2649A terminal system and a minimum of special hardware. The terminal's dual tape interface is used to store timing device programs and to read in special AGE operating system software. To compose a new program for the timing device the keyboard is used to fill in a form displayed on the screen.
Coherent Dynamics of a Hybrid Quantum Spin-Mechanical Oscillator System
NASA Astrophysics Data System (ADS)
Lee, Kenneth William, III
A fully functional quantum computer must contain at least two important components: a quantum memory for storing and manipulating quantum information and a quantum data bus to securely transfer information between quantum memories. Typically, a quantum memory is composed of a matter system, such as an atom or an electron spin, due to their prolonged quantum coherence. Alternatively, a quantum data bus is typically composed of some propagating degree of freedom, such as a photon, which can retain quantum information over long distances. Therefore, a quantum computer will likely be a hybrid quantum device, consisting of two or more disparate quantum systems. However, there must be a reliable and controllable quantum interface between the memory and bus in order to faithfully interconvert quantum information. The current engineering challenge for quantum computers is scaling the device to large numbers of controllable quantum systems, which will ultimately depend on the choice of the quantum elements and interfaces utilized in the device. In this thesis, we present and characterize a hybrid quantum device comprised of single nitrogen-vacancy (NV) centers embedded in a high quality factor diamond mechanical oscillator. The electron spin of the NV center is a leading candidate for the realization of a quantum memory due to its exceptional quantum coherence times. On the other hand, mechanical oscillators are highly sensitive to a wide variety of external forces, and have the potential to serve as a long-range quantum bus between quantum systems of disparate energy scales. These two elements are interfaced through crystal strain generated by vibrations of the mechanical oscillator. Importantly, a strain interface allows for a scalable architecture, and furthermore, opens the door to integration into a larger quantum network through coupling to an optical interface. There are a few important engineering challenges associated with this device. First, there have been no previous demonstrations of a strain-mediated spin-mechanical interface and hence the system is largely uncharacterized. Second, fabricating high quality diamond mechanical oscillators is difficult due to the robust and chemically inert nature of diamond. Finally, engineering highly coherent NV centers with a coherent optical interface in nanostructured diamond remains an outstanding challenge. In this thesis, we theoretically and experimentally address each of these challenges, and show that with future improvements, this device is suitable for future quantum-enabled applications. First, we theoretically and experimentally demonstrate a dynamic, strain-mediated coupling between the spin and orbital degrees of freedom of the NV center and the driven mechanical motion of a single-crystal diamond cantilever. We employ Ramsey interferometry to demonstrate coherent, mechanical driving of the NV spin evolution. Using this interferometry technique, we present the first demonstration of nanoscale strain imaging, and quantitatively characterize the previously unknown spin-strain coupling constants. Next, we use the driven motion of the cantilever to perform deterministic control of the frequency and polarization dependence of the optical transitions of the NV center. Importantly, this experiment constitutes the first demonstration of on-chip control of both the frequency and polarization state of a single photon produced by a quantum emitter. In the final experiment, we use mechanical driving to engineer a series of spin ``clock" states and demonstrate a significant increase in the spin coherence time of the NV center. We conclude this thesis with a theoretical discussion of prospective applications for this device, including generation of non-classical mechanical states and spin-spin entanglement, as well as an evaluation of the current limitations of our devices, including a possible avenues for improvement to reach the regime of strong spin-phonon coupling.
Unconditional polarization qubit quantum memory at room temperature
NASA Astrophysics Data System (ADS)
Namazi, Mehdi; Kupchak, Connor; Jordaan, Bertus; Shahrokhshahi, Reihaneh; Figueroa, Eden
2016-05-01
The creation of global quantum key distribution and quantum communication networks requires multiple operational quantum memories. Achieving a considerable reduction in experimental and cost overhead in these implementations is thus a major challenge. Here we present a polarization qubit quantum memory fully-operational at 330K, an unheard frontier in the development of useful qubit quantum technology. This result is achieved through extensive study of how optical response of cold atomic medium is transformed by the motion of atoms at room temperature leading to an optimal characterization of room temperature quantum light-matter interfaces. Our quantum memory shows an average fidelity of 86.6 +/- 0.6% for optical pulses containing on average 1 photon per pulse, thereby defeating any classical strategy exploiting the non-unitary character of the memory efficiency. Our system significantly decreases the technological overhead required to achieve quantum memory operation and will serve as a building block for scalable and technologically simpler many-memory quantum machines. The work was supported by the US-Navy Office of Naval Research, Grant Number N00141410801 and the Simons Foundation, Grant Number SBF241180. B. J. acknowledges financial assistance of the National Research Foundation (NRF) of South Africa.
Importance of balanced architectures in the design of high-performance imaging systems
NASA Astrophysics Data System (ADS)
Sgro, Joseph A.; Stanton, Paul C.
1999-03-01
Imaging systems employed in demanding military and industrial applications, such as automatic target recognition and computer vision, typically require real-time high-performance computing resources. While high- performances computing systems have traditionally relied on proprietary architectures and custom components, recent advances in high performance general-purpose microprocessor technology have produced an abundance of low cost components suitable for use in high-performance computing systems. A common pitfall in the design of high performance imaging system, particularly systems employing scalable multiprocessor architectures, is the failure to balance computational and memory bandwidth. The performance of standard cluster designs, for example, in which several processors share a common memory bus, is typically constrained by memory bandwidth. The symptom characteristic of this problem is failure to the performance of the system to scale as more processors are added. The problem becomes exacerbated if I/O and memory functions share the same bus. The recent introduction of microprocessors with large internal caches and high performance external memory interfaces makes it practical to design high performance imaging system with balanced computational and memory bandwidth. Real word examples of such designs will be presented, along with a discussion of adapting algorithm design to best utilize available memory bandwidth.
NASA Astrophysics Data System (ADS)
Schroeder, T.; Lupina, G.; Sohal, R.; Lippert, G.; Wenger, Ch.; Seifarth, O.; Tallarida, M.; Schmeisser, D.
2007-07-01
Engineered dielectrics combined with compatible metal electrodes are important materials science approaches to scale three-dimensional trench dynamic random access memory (DRAM) cells. Highly insulating dielectrics with high dielectric constants were engineered in this study on TiN metal electrodes by partly substituting Al in the wide band gap insulator Al2O3 by Pr cations. High quality PrAlO3 metal-insulator-metal capacitors were processed with a dielectric constant of 19, three times higher than in the case of Al2O3 reference cells. As a parasitic low dielectric constant interface layer between PrAlO3 and TiN limits the total performance gain, a systematic nondestructive synchrotron x-ray photoelectron spectroscopy study on the interface chemistry of PrxAl2-xO3 (x =0-2) dielectrics on TiN layers was applied to unveil its chemical origin. The interface layer results from the decreasing chemical reactivity of PrxAl2-xO3 dielectrics with increasing Pr content x to reduce native Ti oxide compounds present on unprotected TiN films. Accordingly, PrAlO3 based DRAM capacitors require strict control of the surface chemistry of the TiN electrode, a parameter furthermore of importance to engineer the band offsets of PrxAl2-xO3/TiN heterojunctions.
Polarization and interface charge coupling in ferroelectric/AlGaN/GaN heterostructure
NASA Astrophysics Data System (ADS)
Zhang, Min; Kong, Yuechan; Zhou, Jianjun; Xue, Fangshi; Li, Liang; Jiang, Wenhai; Hao, Lanzhong; Luo, Wenbo; Zeng, Huizhong
2012-03-01
Asymmetrical shift behaviors of capacitance-voltage (C-V) curve with opposite direction are observed in two AlGaN/GaN metal-ferroelectric-semiconductor (MFS) heterostructures with Pb(Zr,Ti)O3 and LiNbO3 gate dielectrics. By incorporating the switchable polar nature of the ferroelectric into a self-consistent calculation, the coupling effect between the ferroelectric and the interface charges is disclosed. The opposite initial orientation of ferroelectric dipoles determined by the interface charges is essentially responsible for the different C-V characteristics. A critical fixed charge density of -1.27 × 1013cm-2 is obtained, which plays a key role in the dependence of the C-V characteristic on the ferroelectric polarization. The results pave the way for design of memory devices based on MFS structure with heteropolar interface.
NASA Astrophysics Data System (ADS)
Nishida, M.; Okunishi, E.; Nishiura, T.; Kawano, H.; Inamura, T.; S., Ii; Hara, T.
2012-06-01
Four characteristic interface microstructures between habit plane variants (HPVs) in the self-accommodation morphologies of B19‧ martensite in Ti-Ni alloys have been investigated by scanning transmission electron microscopy (STEM). The straight interface of a ? B19‧ type I twin is present at interface I. The relaxation of the transformation strain at interface II is achieved by a volume reduction of the minor correspondence variants (CVs) in the relevant habit plane variants (HPVs). The relaxation of the transformation strain at interface III is mainly due to the formation of a ? B19‧ type I twin between the two major CVs. Subsequently, local strain around the tips of the minor CVs perpendicular to the interface is released by the formation of micro-twins with the ⟨011⟩B19‧ type II and/or ? B19‧ type I relation. The major and minor CVs in each HPV are alternately connected through fine variants with the ? B19‧ type I twin relation parallel to interface IV. The results are compared with macroscopic observations and the predictions of PTMC analysis.
Spacecraft optical disk recorder memory buffer control
NASA Technical Reports Server (NTRS)
Hodson, Robert F.
1992-01-01
The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).
Performance Analysis of Multilevel Parallel Applications on Shared Memory Architectures
NASA Technical Reports Server (NTRS)
Jost, Gabriele; Jin, Haoqiang; Labarta, Jesus; Gimenez, Judit; Caubet, Jordi; Biegel, Bryan A. (Technical Monitor)
2002-01-01
In this paper we describe how to apply powerful performance analysis techniques to understand the behavior of multilevel parallel applications. We use the Paraver/OMPItrace performance analysis system for our study. This system consists of two major components: The OMPItrace dynamic instrumentation mechanism, which allows the tracing of processes and threads and the Paraver graphical user interface for inspection and analyses of the generated traces. We describe how to use the system to conduct a detailed comparative study of a benchmark code implemented in five different programming paradigms applicable for shared memory
The ASSIST: Bringing Information and Software Together for Scientists
NASA Technical Reports Server (NTRS)
Mandel, Eric
1997-01-01
The ASSIST was developed as a step toward overcoming the problems faced by researchers when trying to utilize complex and often conflicting astronomical data analysis systems. It implements a uniform graphical interface to analysis systems, documentation, data, and organizational memory. It is layered on top of the Answer Garden Substrate (AGS), a system specially designed to facilitate the collection and dissemination of organizational memory. Under the AISRP program, we further developed the ASSIST to make it even easier for researchers to overcome the difficulties of accessing software and information in a complex computer environment.
NASA Astrophysics Data System (ADS)
Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir
2013-11-01
This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.
Parallelization of KENO-Va Monte Carlo code
NASA Astrophysics Data System (ADS)
Ramón, Javier; Peña, Jorge
1995-07-01
KENO-Va is a code integrated within the SCALE system developed by Oak Ridge that solves the transport equation through the Monte Carlo Method. It is being used at the Consejo de Seguridad Nuclear (CSN) to perform criticality calculations for fuel storage pools and shipping casks. Two parallel versions of the code: one for shared memory machines and other for distributed memory systems using the message-passing interface PVM have been generated. In both versions the neutrons of each generation are tracked in parallel. In order to preserve the reproducibility of the results in both versions, advanced seeds for random numbers were used. The CONVEX C3440 with four processors and shared memory at CSN was used to implement the shared memory version. A FDDI network of 6 HP9000/735 was employed to implement the message-passing version using proprietary PVM. The speedup obtained was 3.6 in both cases.
Quantum storage of entangled telecom-wavelength photons in an erbium-doped optical fibre
NASA Astrophysics Data System (ADS)
Saglamyurek, Erhan; Jin, Jeongwan; Verma, Varun B.; Shaw, Matthew D.; Marsili, Francesco; Nam, Sae Woo; Oblak, Daniel; Tittel, Wolfgang
2015-02-01
The realization of a future quantum Internet requires the processing and storage of quantum information at local nodes and interconnecting distant nodes using free-space and fibre-optic links. Quantum memories for light are key elements of such quantum networks. However, to date, neither an atomic quantum memory for non-classical states of light operating at a wavelength compatible with standard telecom fibre infrastructure, nor a fibre-based implementation of a quantum memory, has been reported. Here, we demonstrate the storage and faithful recall of the state of a 1,532 nm wavelength photon entangled with a 795 nm photon, in an ensemble of cryogenically cooled erbium ions doped into a 20-m-long silica fibre, using a photon-echo quantum memory protocol. Despite its currently limited efficiency and storage time, our broadband light-matter interface brings fibre-based quantum networks one step closer to reality.
NASA Technical Reports Server (NTRS)
Hamilton, M. H.
1972-01-01
Erasable-memory programs (EMPs) designed for the guidance computers used in the command (CMC) and lunar modules (LGC) are described. CMC programs are designated COLOSSUS 3, and the associated EMPs are identified by a three-digit number beginning with 5. LGC programs are designated LUMINARY 1E, and the associated EMPs are identified, with one exception, by a three-digit number beginning with 1. The exception is EMP 99. The EMPs vary in complexity from a simple flagbit setting to a long and intricate logical structure. They all, however, cause the computer to behave in a way not intended in the original design of the programs; they accomplish this off-nominal behavior by some alteration of erasable memory to interface with existing fixed-memory programs to effect a desired result.
A Comprehensive Study on Energy Efficiency and Performance of Flash-based SSD
DOE Office of Scientific and Technical Information (OSTI.GOV)
Park, Seon-Yeon; Kim, Youngjae; Urgaonkar, Bhuvan
2011-01-01
Use of flash memory as a storage medium is becoming popular in diverse computing environments. However, because of differences in interface, flash memory requires a hard-disk-emulation layer, called FTL (flash translation layer). Although the FTL enables flash memory storages to replace conventional hard disks, it induces significant computational and space overhead. Despite the low power consumption of flash memory, this overhead leads to significant power consumption in an overall storage system. In this paper, we analyze the characteristics of flash-based storage devices from the viewpoint of power consumption and energy efficiency by using various methodologies. First, we utilize simulation tomore » investigate the interior operation of flash-based storage of flash-based storages. Subsequently, we measure the performance and energy efficiency of commodity flash-based SSDs by using microbenchmarks to identify the block-device level characteristics and macrobenchmarks to reveal their filesystem level characteristics.« less
Implementation of Parallel Dynamic Simulation on Shared-Memory vs. Distributed-Memory Environments
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jin, Shuangshuang; Chen, Yousu; Wu, Di
2015-12-09
Power system dynamic simulation computes the system response to a sequence of large disturbance, such as sudden changes in generation or load, or a network short circuit followed by protective branch switching operation. It consists of a large set of differential and algebraic equations, which is computational intensive and challenging to solve using single-processor based dynamic simulation solution. High-performance computing (HPC) based parallel computing is a very promising technology to speed up the computation and facilitate the simulation process. This paper presents two different parallel implementations of power grid dynamic simulation using Open Multi-processing (OpenMP) on shared-memory platform, and Messagemore » Passing Interface (MPI) on distributed-memory clusters, respectively. The difference of the parallel simulation algorithms and architectures of the two HPC technologies are illustrated, and their performances for running parallel dynamic simulation are compared and demonstrated.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Clima, Sergiu, E-mail: clima@imec.be; Chen, Yang Yin; Goux, Ludovic
Resistive Random Access Memories are among the most promising candidates for the next generation of non-volatile memory. Transition metal oxides such as HfOx and TaOx attracted a lot of attention due to their CMOS compatibility. Furthermore, these materials do not require the inclusion of extrinsic conducting defects since their operation is based on intrinsic ones (oxygen vacancies). Using Density Functional Theory, we evaluated the thermodynamics of the defects formation and the kinetics of diffusion of the conducting species active in transition metal oxide RRAM materials. The gained insights based on the thermodynamics in the Top Electrode, Insulating Matrix and Bottommore » Electrode and at the interfaces are used to design a proper defect reservoir, which is needed for a low-energy reliable switching device. The defect reservoir has also a direct impact on the retention of the Low Resistance State due to the resulting thermodynamic driving forces. The kinetics of the diffusing conducting defects in the Insulating Matrix determine the switching dynamics and resistance retention. The interface at the Bottom Electrode has a significant impact on the low-current operation and long endurance of the memory cell. Our first-principles findings are confirmed by experimental measurements on fabricated RRAM devices.« less
Chips of Hope: Neuro-Electronic Hybrids for Brain Repair
NASA Astrophysics Data System (ADS)
Ben-Jacob, Eshel
2010-03-01
The field of Neuro-Electronic Hybrids kicked off 30 years ago when researchers in the US first tweaked the technology of recording and stimulation of networks of live neurons grown in a Petri dish and interfaced with a computer via an array of electrodes. Since then, many researchers have searched for ways to imprint in neural networks new ``memories" without erasing old ones. I will describe our new generation of Neuro-Electronic Hybrids and how we succeeded to turn them into the first learning Neurochips - memory and information processing chips made of live neurons. To imprint multiple memories in our new chip we used chemical stimulation at specific locations that were selected by analyzing the networks activity in real time according to our new information encoding principle. Currently we develop new-generation of neuro chips using special carbon nano tubes (CNT). These electrodes enable to engineer the networks topology and efficient electrical interfacing with the neurons. This advance bears the promise to pave the way for building a new experimental platform for testing new drugs and developing new methods for neural networks repair and regeneration. Looking into the future, the development brings us a step closer towards the dream of Brain Repair by implementable Neuro-Electronic hybrid chips.
Um, Ki Sung; Kwak, Yun Sik; Cho, Hune; Kim, Il Kon
2005-11-01
A basic assumption of Health Level Seven (HL7) protocol is 'No limitation of message length'. However, most existing commercial HL7 interface engines do limit message length because they use the string array method, which is run in the main memory for the HL7 message parsing process. Specifically, messages with image and multi-media data create a long string array and thus cause the computer system to raise critical and fatal problem. Consequently, HL7 messages cannot handle the image and multi-media data necessary in modern medical records. This study aims to solve this problem with the 'streaming algorithm' method. This new method for HL7 message parsing applies the character-stream object which process character by character between the main memory and hard disk device with the consequence that the processing load on main memory could be alleviated. The main functions of this new engine are generating, parsing, validating, browsing, sending, and receiving HL7 messages. Also, the engine can parse and generate XML-formatted HL7 messages. This new HL7 engine successfully exchanged HL7 messages with 10 megabyte size images and discharge summary information between two university hospitals.
Resistive switching near electrode interfaces: Estimations by a current model
NASA Astrophysics Data System (ADS)
Schroeder, Herbert; Zurhelle, Alexander; Stemmer, Stefanie; Marchewka, Astrid; Waser, Rainer
2013-02-01
The growing resistive switching database is accompanied by many detailed mechanisms which often are pure hypotheses. Some of these suggested models can be verified by checking their predictions with the benchmarks of future memory cells. The valence change memory model assumes that the different resistances in ON and OFF states are made by changing the defect density profiles in a sheet near one working electrode during switching. The resulting different READ current densities in ON and OFF states were calculated by using an appropriate simulation model with variation of several important defect and material parameters of the metal/insulator (oxide)/metal thin film stack such as defect density and its profile change in density and thickness, height of the interface barrier, dielectric permittivity, applied voltage. The results were compared to the benchmarks and some memory windows of the varied parameters can be defined: The required ON state READ current density of 105 A/cm2 can only be achieved for barriers smaller than 0.7 eV and defect densities larger than 3 × 1020 cm-3. The required current ratio between ON and OFF states of at least 10 requests defect density reduction of approximately an order of magnitude in a sheet of several nanometers near the working electrode.
Vacuum-induced quantum memory in an opto-electromechanical system
NASA Astrophysics Data System (ADS)
Qin, Li-Guo; Wang, Zhong-Yang; Wu, Shi-Chao; Gong, Shang-Qing; Ma, Hong-Yang; Jing, Jun
2018-03-01
We propose a scheme to implement electrically controlled quantum memory based on vacuum-induced transparency (VIT) in a high-Q tunable cavity, which is capacitively coupled to a mechanically variable capacitor by a charged mechanical cavity mirror as an interface. We analyze the changes of the cavity photons arising from vacuum-induced-Raman process and discuss VIT in an atomic ensemble trapped in the cavity. By slowly adjusting the voltage on the capacitor, the VIT can be adiabatically switched on or off, meanwhile, the transfer between the probe photon state and the atomic spin state can be electrically and adiabatically modulated. Therefore, we demonstrate a vacuum-induced quantum memory by electrically manipulating the mechanical mirror of the cavity based on electromagnetically induced transparency mechanism.
Titanium oxide nonvolatile memory device and its application
NASA Astrophysics Data System (ADS)
Wang, Wei
In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.
A memory efficient user interface for CLIPS micro-computer applications
NASA Technical Reports Server (NTRS)
Sterle, Mark E.; Mayer, Richard J.; Jordan, Janice A.; Brodale, Howard N.; Lin, Min-Jin
1990-01-01
The goal of the Integrated Southern Pine Beetle Expert System (ISPBEX) is to provide expert level knowledge concerning treatment advice that is convenient and easy to use for Forest Service personnel. ISPBEX was developed in CLIPS and delivered on an IBM PC AT class micro-computer, operating with an MS/DOS operating system. This restricted the size of the run time system to 640K. In order to provide a robust expert system, with on-line explanation, help, and alternative actions menus, as well as features that allow the user to back up or execute 'what if' scenarios, a memory efficient menuing system was developed to interface with the CLIPS programs. By robust, we mean an expert system that (1) is user friendly, (2) provides reasonable solutions for a wide variety of domain specific problems, (3) explains why some solutions were suggested but others were not, and (4) provides technical information relating to the problem solution. Several advantages were gained by using this type of user interface (UI). First, by storing the menus on the hard disk (instead of main memory) during program execution, a more robust system could be implemented. Second, since the menus were built rapidly, development time was reduced. Third, the user may try a new scenario by backing up to any of the input screens and revising segments of the original input without having to retype all the information. And fourth, asserting facts from the menus provided for a dynamic and flexible fact base. This UI technology has been applied successfully in expert systems applications in forest management, agriculture, and manufacturing. This paper discusses the architecture of the UI system, human factors considerations, and the menu syntax design.
Adaptive online inverse control of a shape memory alloy wire actuator using a dynamic neural network
NASA Astrophysics Data System (ADS)
Mai, Huanhuan; Song, Gangbing; Liao, Xiaofeng
2013-01-01
Shape memory alloy (SMA) actuators exhibit severe hysteresis, a nonlinear behavior, which complicates control strategies and limits their applications. This paper presents a new approach to controlling an SMA actuator through an adaptive inverse model based controller that consists of a dynamic neural network (DNN) identifier, a copy dynamic neural network (CDNN) feedforward term and a proportional (P) feedback action. Unlike fixed hysteresis models used in most inverse controllers, the proposed one uses a DNN to identify online the relationship between the applied voltage to the actuator and the displacement (the inverse model). Even without a priori knowledge of the SMA hysteresis and without pre-training, the proposed controller can precisely control the SMA wire actuator in various tracking tasks by identifying online the inverse model of the SMA actuator. Experiments were conducted, and experimental results demonstrated real-time modeling capabilities of DNN and the performance of the adaptive inverse controller.
Handling debugger breakpoints in a shared instruction system
Gooding, Thomas Michael; Shok, Richard Michael
2014-01-21
A debugger debugs processes that execute shared instructions so that a breakpoint set for one process will not cause a breakpoint to occur in the other processes. A breakpoint is set by recording the original instruction at the desired location and writing a trap instruction to the shared instructions at that location. When a process encounters the breakpoint, the process passes control to the debugger for breakpoint processing if the breakpoint was set at that location for that process. If the trap was not set at that location for that process, the cacheline containing the trap is copied to a small scratchpad memory, and the virtual memory mappings are changed to translate the virtual address of the cacheline to the scratchpad. The original instruction is then written to replace the trap instruction in the scratchpad, so that process can execute the instructions in the scatchpad thereby avoiding the trap instruction.
Morgan, Phillip L; Patrick, John; Waldron, Samuel M; King, Sophia L; Patrick, Tanya
2009-12-01
Forgetting what one was doing prior to interruption is an everyday problem. The recent soft constraints hypothesis (Gray, Sims, Fu, & Schoelles, 2006) emphasizes the strategic adaptation of information processing strategy to the task environment. It predicts that increasing information access cost (IAC: the time, and physical and mental effort involved in accessing information) encourages a more memory-intensive strategy. Like interruptions, access costs are also intrinsic to most work environments, such as when opening documents and e-mails. Three experiments investigated whether increasing IAC during a simple copying task can be an effective method for reducing forgetting following interruption. IAC was designated Low (all information permanently visible), Medium (a mouse movement to uncover target information), or High (an additional few seconds to uncover such information). Experiment 1 found that recall improved across all three levels of IAC. Subsequent experiments found that High IAC facilitated resumption after interruption, particularly when interruption occurred on half of all trials (Experiment 2), and improved prospective memory following two different interrupting tasks, even when one involved the disruptive effect of using the same type of resource as the primary task (Experiment 3). The improvement of memory after interruption with increased IAC supports the prediction of the soft constraints hypothesis. The main disadvantage of a high access cost was a reduction in speed of task completion. The practicality of manipulating IAC as a design method for inducing a memory-intensive strategy to protect against forgetting is discussed. Copyright 2009 APA
Morice, Elise; Andreae, Laura C; Cooke, Sam F; Vanes, Lesley; Fisher, Elizabeth M C; Tybulewicz, Victor L J; Bliss, Timothy V P
2008-07-01
Down syndrome (DS) is a genetic disorder arising from the presence of a third copy of the human chromosome 21 (Hsa21). Recently, O'Doherty and colleagues in an earlier study generated a new genetic mouse model of DS (Tc1) that carries an almost complete Hsa21. Since DS is the most common genetic cause of mental retardation, we have undertaken a detailed analysis of cognitive function and synaptic plasticity in Tc1 mice. Here we show that Tc1 mice have impaired spatial working memory (WM) but spared long-term spatial reference memory (RM) in the Morris watermaze. Similarly, Tc1 mice are selectively impaired in short-term memory (STM) but have intact long-term memory (LTM) in the novel object recognition task. The pattern of impaired STM and normal LTM is paralleled by a corresponding phenotype in long-term potentiation (LTP). Freely-moving Tc1 mice exhibit reduced LTP 1 h after induction but normal maintenance over days in the dentate gyrus of the hippocampal formation. Biochemical analysis revealed a reduction in membrane surface expression of the AMPAR (alpha-amino-3-hydroxy-5-methyl-4-propionic acid receptor) subunit GluR1 in the hippocampus of Tc1 mice, suggesting a potential mechanism for the impairment in early LTP. Our observations also provide further evidence that STM and LTM for hippocampus-dependent tasks are subserved by parallel processing streams.
Lidar-based door and stair detection from a mobile robot
NASA Astrophysics Data System (ADS)
Bansal, Mayank; Southall, Ben; Matei, Bogdan; Eledath, Jayan; Sawhney, Harpreet
2010-04-01
We present an on-the-move LIDAR-based object detection system for autonomous and semi-autonomous unmanned vehicle systems. In this paper we make several contributions: (i) we describe an algorithm for real-time detection of objects such as doors and stairs in indoor environments; (ii) we describe efficient data structures and algorithms for processing 3D point clouds acquired by laser scanners in a streaming manner, which minimize the memory copying and access. We show qualitative results demonstrating the effectiveness of our approach on runs in an indoor office environment.
Concurrent Image Processing Executive (CIPE). Volume 1: Design overview
NASA Technical Reports Server (NTRS)
Lee, Meemong; Groom, Steven L.; Mazer, Alan S.; Williams, Winifred I.
1990-01-01
The design and implementation of a Concurrent Image Processing Executive (CIPE), which is intended to become the support system software for a prototype high performance science analysis workstation are described. The target machine for this software is a JPL/Caltech Mark 3fp Hypercube hosted by either a MASSCOMP 5600 or a Sun-3, Sun-4 workstation; however, the design will accommodate other concurrent machines of similar architecture, i.e., local memory, multiple-instruction-multiple-data (MIMD) machines. The CIPE system provides both a multimode user interface and an applications programmer interface, and has been designed around four loosely coupled modules: user interface, host-resident executive, hypercube-resident executive, and application functions. The loose coupling between modules allows modification of a particular module without significantly affecting the other modules in the system. In order to enhance hypercube memory utilization and to allow expansion of image processing capabilities, a specialized program management method, incremental loading, was devised. To minimize data transfer between host and hypercube, a data management method which distributes, redistributes, and tracks data set information was implemented. The data management also allows data sharing among application programs. The CIPE software architecture provides a flexible environment for scientific analysis of complex remote sensing image data, such as planetary data and imaging spectrometry, utilizing state-of-the-art concurrent computation capabilities.
Wu, Rui; Kursumovic, Ahmed; Gao, Xingyao; Yun, Chao; Vickers, Mary E; Wang, Haiyan; Cho, Seungho; MacManus-Driscoll, Judith L
2018-05-30
Electric field control of magnetism is a critical future technology for low-power, ultrahigh density memory. However, despite intensive research efforts, no practical material systems have emerged. Interface-coupled, composite systems containing ferroelectric and ferri-/ferromagnetic elements have been widely explored, but they have a range of problems, for example, substrate clamping, large leakage, and inability to miniaturize. In this work, through careful material selection, design, and nanoengineering, a high-performance room-temperature magnetoelectric system is demonstrated. The clamping problem is overcome by using a vertically aligned nanocomposite structure in which the strain coupling is independent of the substrate. To overcome the leakage problem, three key novel advances are introduced: a low leakage ferroelectric, Na 0.5 Bi 0.5 TiO 3 ; ferroelectric-ferrimagnetic vertical interfaces which are not conducting; and current blockage via a rectifying interface between the film and the Nb-doped SrTiO 3 substrate. The new multiferroic nanocomposite (Na 0.5 Bi 0.5 TiO 3 -CoFe 2 O 4 ) thin-film system enables, for the first time, large-scale in situ electric field control of magnetic anisotropy at room temperature in a system applicable for magnetoelectric random access memory, with a magnetoelectric coefficient of 1.25 × 10 -9 s m -1 .
IAC-1.5 - INTEGRATED ANALYSIS CAPABILITY
NASA Technical Reports Server (NTRS)
Vos, R. G.
1994-01-01
The objective of the Integrated Analysis Capability (IAC) system is to provide a highly effective, interactive analysis tool for the integrated design of large structures. IAC was developed to interface programs from the fields of structures, thermodynamics, controls, and system dynamics with an executive system and a database to yield a highly efficient multi-disciplinary system. Special attention is given to user requirements such as data handling and on-line assistance with operational features, and the ability to add new modules of the user's choice at a future date. IAC contains an executive system, a database, general utilities, interfaces to various engineering programs, and a framework for building interfaces to other programs. IAC has shown itself to be effective in automating data transfer among analysis programs. The IAC system architecture is modular in design. 1) The executive module contains an input command processor, an extensive data management system, and driver code to execute the application modules. 2) Technical modules provide standalone computational capability as well as support for various solution paths or coupled analyses. 3) Graphics and model generation modules are supplied for building and viewing models. 4) Interface modules provide for the required data flow between IAC and other modules. 5) User modules can be arbitrary executable programs or JCL procedures with no pre-defined relationship to IAC. 6) Special purpose modules are included, such as MIMIC (Model Integration via Mesh Interpolation Coefficients), which transforms field values from one model to another; LINK, which simplifies incorporation of user specific modules into IAC modules; and DATAPAC, the National Bureau of Standards statistical analysis package. The IAC database contains structured files which provide a common basis for communication between modules and the executive system, and can contain unstructured files such as NASTRAN checkpoint files, DISCOS plot files, object code, etc. The user can define groups of data and relations between them. A full data manipulation and query system operates with the database. The current interface modules comprise five groups: 1) Structural analysis - IAC contains a NASTRAN interface for standalone analysis or certain structural/control/thermal combinations. IAC provides enhanced structural capabilities for normal modes and static deformation analysis via special DMAP sequences. 2) Thermal analysis - IAC supports finite element and finite difference techniques for steady state or transient analysis. There are interfaces for the NASTRAN thermal analyzer, SINDA/SINFLO, and TRASYS II. 3) System dynamics - A DISCOS interface allows full use of this simulation program for either nonlinear time domain analysis or linear frequency domain analysis. 4) Control analysis - Interfaces for the ORACLS, SAMSAN, NBOD2, and INCA programs allow a wide range of control system analyses and synthesis techniques. 5) Graphics - The graphics packages PLOT and MOSAIC are included in IAC. PLOT generates vector displays of tabular data in the form of curves, charts, correlation tables, etc., while MOSAIC generates color raster displays of either tabular of array type data. Either DI3000 or PLOT-10 graphics software is required for full graphics capability. IAC is available by license for a period of 10 years to approved licensees. The licensed program product includes one complete set of supporting documentation. Additional copies of the documentation may be purchased separately. IAC is written in FORTRAN 77 and has been implemented on a DEC VAX series computer operating under VMS. IAC can be executed by multiple concurrent users in batch or interactive mode. The basic central memory requirement is approximately 750KB. IAC includes the executive system, graphics modules, a database, general utilities, and the interfaces to all analysis and controls programs described above. Source code is provided for the control programs ORACLS, SAMSAN, NBOD2, and DISCOS. The following programs are also available from COSMIC a
IAC-1.5 - INTEGRATED ANALYSIS CAPABILITY
NASA Technical Reports Server (NTRS)
Vos, R. G.
1994-01-01
The objective of the Integrated Analysis Capability (IAC) system is to provide a highly effective, interactive analysis tool for the integrated design of large structures. IAC was developed to interface programs from the fields of structures, thermodynamics, controls, and system dynamics with an executive system and a database to yield a highly efficient multi-disciplinary system. Special attention is given to user requirements such as data handling and on-line assistance with operational features, and the ability to add new modules of the user's choice at a future date. IAC contains an executive system, a database, general utilities, interfaces to various engineering programs, and a framework for building interfaces to other programs. IAC has shown itself to be effective in automating data transfer among analysis programs. The IAC system architecture is modular in design. 1) The executive module contains an input command processor, an extensive data management system, and driver code to execute the application modules. 2) Technical modules provide standalone computational capability as well as support for various solution paths or coupled analyses. 3) Graphics and model generation modules are supplied for building and viewing models. 4) Interface modules provide for the required data flow between IAC and other modules. 5) User modules can be arbitrary executable programs or JCL procedures with no pre-defined relationship to IAC. 6) Special purpose modules are included, such as MIMIC (Model Integration via Mesh Interpolation Coefficients), which transforms field values from one model to another; LINK, which simplifies incorporation of user specific modules into IAC modules; and DATAPAC, the National Bureau of Standards statistical analysis package. The IAC database contains structured files which provide a common basis for communication between modules and the executive system, and can contain unstructured files such as NASTRAN checkpoint files, DISCOS plot files, object code, etc. The user can define groups of data and relations between them. A full data manipulation and query system operates with the database. The current interface modules comprise five groups: 1) Structural analysis - IAC contains a NASTRAN interface for standalone analysis or certain structural/control/thermal combinations. IAC provides enhanced structural capabilities for normal modes and static deformation analysis via special DMAP sequences. 2) Thermal analysis - IAC supports finite element and finite difference techniques for steady state or transient analysis. There are interfaces for the NASTRAN thermal analyzer, SINDA/SINFLO, and TRASYS II. 3) System dynamics - A DISCOS interface allows full use of this simulation program for either nonlinear time domain analysis or linear frequency domain analysis. 4) Control analysis - Interfaces for the ORACLS, SAMSAN, NBOD2, and INCA programs allow a wide range of control system analyses and synthesis techniques. 5) Graphics - The graphics packages PLOT and MOSAIC are included in IAC. PLOT generates vector displays of tabular data in the form of curves, charts, correlation tables, etc., while MOSAIC generates color raster displays of either tabular of array type data. Either DI3000 or PLOT-10 graphics software is required for full graphics capability. IAC is available by license for a period of 10 years to approved licensees. The licensed program product includes one complete set of supporting documentation. Additional copies of the documentation may be purchased separately. IAC is written in FORTRAN 77 and has been implemented on a DEC VAX series computer operating under VMS. IAC can be executed by multiple concurrent users in batch or interactive mode. The basic central memory requirement is approximately 750KB. IAC includes the executive system, graphics modules, a database, general utilities, and the interfaces to all analysis and controls programs described above. Source code is provided for the control programs ORACLS, SAMSAN, NBOD2, and DISCOS. The following programs are also available from COSMIC as separate packages: NASTRAN, SINDA/SINFLO, TRASYS II, DISCOS, ORACLS, SAMSAN, NBOD2, and INCA. IAC was developed in 1985.
Object Persistence Enhances Spatial Navigation: A Case Study in Smartphone Vision Science.
Liverence, Brandon M; Scholl, Brian J
2015-07-01
Violations of spatiotemporal continuity disrupt performance in many tasks involving attention and working memory, but experiments on this topic have been limited to the study of moment-by-moment on-line perception, typically assessed by passive monitoring tasks. We tested whether persisting object representations also serve as underlying units of longer-term memory and active spatial navigation, using a novel paradigm inspired by the visual interfaces common to many smartphones. Participants used key presses to navigate through simple visual environments consisting of grids of icons (depicting real-world objects), only one of which was visible at a time through a static virtual window. Participants found target icons faster when navigation involved persistence cues (via sliding animations) than when persistence was disrupted (e.g., via temporally matched fading animations), with all transitions inspired by smartphone interfaces. Moreover, this difference occurred even after explicit memorization of the relevant information, which demonstrates that object persistence enhances spatial navigation in an automatic and irresistible fashion. © The Author(s) 2015.
NASA Astrophysics Data System (ADS)
Gîlcă, G.; Bîzdoacă, N. G.; Diaconu, I.
2016-08-01
This article aims to implement some practical applications using the Socibot Desktop social robot. We mean to realize three applications: creating a speech sequence using the Kiosk menu of the browser interface, creating a program in the Virtual Robot browser interface and making a new guise to be loaded into the robot's memory in order to be projected onto it face. The first application is actually created in the Compose submenu that contains 5 file categories: audio, eyes, face, head, mood, this being helpful in the creation of the projected sequence. The second application is more complex, the completed program containing: audio files, speeches (can be created in over 20 languages), head movements, the robot's facial parameters function of each action units (AUs) of the facial muscles, its expressions and its line of sight. Last application aims to change the robot's appearance with the guise created by us. The guise was created in Adobe Photoshop and then loaded into the robot's memory.
Amini, Abbas; Cheng, Chun
2013-01-01
Due to a distinct nature of thermomechanical smart materials' reaction to applied loads, a revolutionary approach is needed to measure the hardness and to understand its size effect for pseudoelastic NiTi shape memory alloys (SMAs) during the solid-state phase transition. Spherical hardness is increased with depths during the phase transition in NiTi SMAs. This behaviour is contrary to the decrease in the hardness of NiTi SMAs with depths using sharp tips and the depth-insensitive hardness of traditional metallic alloys using spherical tips. In contrast with the common dislocation theory for the hardness measurement, the nature of NiTi SMAs' hardness is explained by the balance between the interface and the bulk energy of phase transformed SMAs. Contrary to the energy balance in the indentation zone using sharp tips, the interface energy was numerically shown to be less dominant than the bulk energy of the phase transition zone using spherical tips. PMID:23963305
S-Band POSIX Device Drivers for RTEMS
NASA Technical Reports Server (NTRS)
Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.
2011-01-01
This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).
A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics
NASA Astrophysics Data System (ADS)
Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas
2017-04-01
Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.
NASA Technical Reports Server (NTRS)
Spicer, W. E.
1985-01-01
A sketch is given of the development of photoemission electron spectroscopy (PES) with emphasis on the author's own experience. Emphasis is placed: (1) on the period between 1958-1970; (2) on the various developments which were required for PES to emerge; and (3) on the strong interactions between applied/fundamental and knowledge/empirically based research. A more detailed discussion is given of the recent (1975-present) application of PES to study the interfaces of III-V semiconductors.
PILOT: A Precision Intercoastal Loran Translocator. Volume 3. Software.
1982-03-01
includes a second loran receiver (for cross chain operation), an interface or modem for remotely entering TD bias values, and a printer. b. The nucleus...developing an interface board to connect to the ship’s gyro, and a TD bias modem or box, replacing the large general purpose keyboard with a small predefined...The PILOT program has divided this memory into 8K of RAM and 56K of EPROM. Of the 56K bytes of EPROM, 40K are HP code and 16K are PILOT code (see Fig. 3
Ostrowski, Sisse R; Katzenstein, Terese L; Thim, Per T; Pedersen, Bente K; Gerstoft, Jan; Ullum, Henrik
2005-02-01
Immunological and virological consequences of low-level viremia in human immunodeficiency virus (HIV) type 1-infected patients receiving highly active antiretroviral therapy (HAART) remain to be determined. For 24 months, 101 HAART-treated, HIV-1-infected patients with HIV RNA levels =200 copies/mL were followed prospectively: HIV RNA level and CD4 and CD8 cell counts were investigated every 3 months, and proviral DNA and T cell subsets were investigated every 6 months. During follow-up, 33 patients had HIV RNA levels =20 copies/mL at all visits (uVL patients), whereas 68 patients had HIV RNA levels >20 copies/mL at >/=1 visit (dVL patients) (median increase, 81 copies/mL [interquartile range, 37-480 copies/mL]). dVL patients had higher concentrations of CD8 cells, activated and memory T cells, and proviral DNA, compared with uVL patients (P<.05). A higher HIV RNA level was independently associated with reduced CD4 gain (P<.001). A higher HIV RNA level also was associated with increases in activated CD8(+)CD38(+) and CD8(+)HLA-DR(+) cells (P<.05), and a higher level of activated CD8(+)CD38(+) cells was independently associated with reduced CD4 gain (P<.05). A higher proviral DNA level was associated with increases in CD4(+)CD45RA(-)CD28(-) effector cells and reductions in naive CD4(+)CD45RA(+)CD62L(+) and CD8(+)CD45RA(+)CD62L(+) cells (P<.05). Higher levels of activated CD4(+)HLA-DR(+) and early differentiated CD4(+)CD45RA(-)CD28(+) cells predicted increased risk of subsequent detectable viremia in patients with undetectable HIV RNA (P<.05). These findings indicate that low-level viremia and proviral DNA are intimately associated with the immunological and virological equilibrium in patients receiving HAART.
NASA Technical Reports Server (NTRS)
Fura, David A.; Windley, Phillip J.; Cohen, Gerald C.
1993-01-01
This technical report contains the Higher-Order Logic (HOL) listings of the partial verification of the requirements and design for a commercially developed processor interface unit (PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault tolerant computer system. This system, the Fault Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU verification as it currently exists. Section two of this report contains general-purpose HOL theories and definitions that support the PIU verification. These include arithmetic theories dealing with inequalities and associativity, and a collection of tactics used in the PIU proofs. Section three contains the HOL listings for the completed PIU design verification. Section 4 contains the HOL listings for the partial requirements verification of the P-Port.
Implementation of relational data base management systems on micro-computers
DOE Office of Scientific and Technical Information (OSTI.GOV)
Huang, C.L.
1982-01-01
This dissertation describes an implementation of a Relational Data Base Management System on a microcomputer. A specific floppy disk based hardward called TERAK is being used, and high level query interface which is similar to a subset of the SEQUEL language is provided. The system contains sub-systems such as I/O, file management, virtual memory management, query system, B-tree management, scanner, command interpreter, expression compiler, garbage collection, linked list manipulation, disk space management, etc. The software has been implemented to fulfill the following goals: (1) it is highly modularized. (2) The system is physically segmented into 16 logically independent, overlayable segments,more » in a way such that a minimal amount of memory is needed at execution time. (3) Virtual memory system is simulated that provides the system with seemingly unlimited memory space. (4) A language translator is applied to recognize user requests in the query language. The code generation of this translator generates compact code for the execution of UPDATE, DELETE, and QUERY commands. (5) A complete set of basic functions needed for on-line data base manipulations is provided through the use of a friendly query interface. (6) To eliminate the dependency on the environment (both software and hardware) as much as possible, so that it would be easy to transplant the system to other computers. (7) To simulate each relation as a sequential file. It is intended to be a highly efficient, single user system suited to be used by small or medium sized organizations for, say, administrative purposes. Experiments show that quite satisfying results have indeed been achieved.« less
Impaired Dendritic Development and Memory in Sorbs2 Knock-Out Mice.
Zhang, Qiangge; Gao, Xian; Li, Chenchen; Feliciano, Catia; Wang, Dongqing; Zhou, Dingxi; Mei, Yuan; Monteiro, Patricia; Anand, Michelle; Itohara, Shigeyoshi; Dong, Xiaowei; Fu, Zhanyan; Feng, Guoping
2016-02-17
Intellectual disability is a common neurodevelopmental disorder characterized by impaired intellectual and adaptive functioning. Both environmental insults and genetic defects contribute to the etiology of intellectual disability. Copy number variations of SORBS2 have been linked to intellectual disability. However, the neurobiological function of SORBS2 in the brain is unknown. The SORBS2 gene encodes ArgBP2 (Arg/c-Abl kinase binding protein 2) protein in non-neuronal tissues and is alternatively spliced in the brain to encode nArgBP2 protein. We found nArgBP2 colocalized with F-actin at dendritic spines and growth cones in cultured hippocampal neurons. In the mouse brain, nArgBP2 was highly expressed in the cortex, amygdala, and hippocampus, and enriched in the outer one-third of the molecular layer in dentate gyrus. Genetic deletion of Sorbs2 in mice led to reduced dendritic complexity and decreased frequency of AMPAR-miniature spontaneous EPSCs in dentate gyrus granule cells. Behavioral characterization revealed that Sorbs2 deletion led to a reduced acoustic startle response, and defective long-term object recognition memory and contextual fear memory. Together, our findings demonstrate, for the first time, an important role for nArgBP2 in neuronal dendritic development and excitatory synaptic transmission, which may thus inform exploration of neurobiological basis of SORBS2 deficiency in intellectual disability. Copy number variations of the SORBS2 gene are linked to intellectual disability, but the neurobiological mechanisms are unknown. We found that nArgBP2, the only neuronal isoform encoded by SORBS2, colocalizes with F-actin at neuronal dendritic growth cones and spines. nArgBP2 is highly expressed in the cortex, amygdala, and dentate gyrus in the mouse brain. Genetic deletion of Sorbs2 in mice leads to impaired dendritic complexity and reduced excitatory synaptic transmission in dentate gyrus granule cells, accompanied by behavioral deficits in acoustic startle response and long-term memory. This is the first study of Sorbs2 function in the brain, and our findings may facilitate the study of neurobiological mechanisms underlying SORBS2 deficiency in the development of intellectual disability. Copyright © 2016 the authors 0270-6474/16/362248-14$15.00/0.
Remote Control and Monitoring of VLBI Experiments by Smartphones
NASA Astrophysics Data System (ADS)
Ruztort, C. H.; Hase, H.; Zapata, O.; Pedreros, F.
2012-12-01
For the remote control and monitoring of VLBI operations, we developed a software optimized for smartphones. This is a new tool based on a client-server architecture with a Web interface optimized for smartphone screens and cellphone networks. The server uses variables of the Field System and its station specific parameters stored in the shared memory. The client running on the smartphone by a Web interface analyzes and visualizes the current status of the radio telescope, receiver, schedule, and recorder. In addition, it allows commands to be sent remotely to the Field System computer and displays the log entries. The user has full access to the entire operation process, which is important in emergency cases. The software also integrates a webcam interface.
MicroShell Minimalist Shell for Xilinx Microprocessors
NASA Technical Reports Server (NTRS)
Werne, Thomas A.
2011-01-01
MicroShell is a lightweight shell environment for engineers and software developers working with embedded microprocessors in Xilinx FPGAs. (MicroShell has also been successfully ported to run on ARM Cortex-M1 microprocessors in Actel ProASIC3 FPGAs, but without project-integration support.) Micro Shell decreases the time spent performing initial tests of field-programmable gate array (FPGA) designs, simplifies running customizable one-time-only experiments, and provides a familiar-feeling command-line interface. The program comes with a collection of useful functions and enables the designer to add an unlimited number of custom commands, which are callable from the command-line. The commands are parameterizable (using the C-based command-line parameter idiom), so the designer can use one function to exercise hardware with different values. Also, since many hardware peripherals instantiated in FPGAs have reasonably simple register-mapped I/O interfaces, the engineer can edit and view hardware parameter settings at any time without stopping the processor. MicroShell comes with a set of support scripts that interface seamlessly with Xilinx's EDK tool. Adding an instance of MicroShell to a project is as simple as marking a check box in a library configuration dialog box and specifying a software project directory. The support scripts then examine the hardware design, build design-specific functions, conditionally include processor-specific functions, and complete the compilation process. For code-size constrained designs, most of the stock functionality can be excluded from the compiled library. When all of the configurable options are removed from the binary, MicroShell has an unoptimized memory footprint of about 4.8 kB and a size-optimized footprint of about 2.3 kB. Since MicroShell allows unfettered access to all processor-accessible memory locations, it is possible to perform live patching on a running system. This can be useful, for instance, if a bug is discovered in a routine but the system cannot be rebooted: Shell allows a skilled operator to directly edit the binary executable in memory. With some forethought, MicroShell code can be located in a different memory location from custom code, permitting the custom functionality to be overwritten at any time without stopping the controlling shell.
The Utility of Handheld Programmable Calculators in Aircraft Life Cycle Cost Estimation.
1982-09-01
are available for extended mem - ory, hardcopy printout, video interface, and special application software. Any calculator of comparable memory could...condi- tioning system. OG Total number of engine, air turbine motor (ATM) and auxiliary power unit (APU) driven generator/alternators. OHP Total number
Observer's Interface for Solar System Target Specification
NASA Astrophysics Data System (ADS)
Roman, Anthony; Link, Miranda; Moriarty, Christopher; Stansberry, John A.
2016-10-01
When observing an asteroid or comet with HST, it has been necessary for the observer to manually enter the target's orbital elements into the Astronomer's Proposal Tool (APT). This allowed possible copy/paste transcription errors from the observer's source of orbital elements data. In order to address this issue, APT has now been improved with the capability to identify targets in and then download orbital elements from JPL Horizons. The observer will first use a target name resolver to choose the intended target from the Horizons database, and then download the orbital elements from Horizons directly into APT. A manual entry option is also still retained if the observer does not wish to use elements from Horizons. This new capability is available for HST observing, and it will also be supported for JWST observing. The poster shows examples of this new interface.
Observer's Interface for Solar System Target Specification
NASA Astrophysics Data System (ADS)
Roman, Anthony; Link, Miranda; Moriarty, Christopher; Stansberry, John A.
2016-01-01
When observing an asteroid or comet with HST, it has been necessary for the observer to manually enter the target's orbital elements into the Astronomer's Proposal Tool (APT). This allowed possible copy/paste transcription errors from the observer's source of orbital elements data. In order to address this issue, APT has now been improved with the capability to identify targets in and then download orbital elements from JPL Horizons. The observer will first use a target name resolver to choose the intended target from the Horizons database, and then download the orbital elements from Horizons directly into APT. A manual entry option is also still retained if the observer does not wish to use elements from Horizons. This new capability is available for HST observing, and it will also be supported for JWST observing. The poster shows examples of this new interface.
MIL-STD-1553 dynamic bus controller/remote terminal hybrid set
NASA Astrophysics Data System (ADS)
Friedman, S. N.
This paper describes the performance, physical and electrical requirements of a Dual Redundant BUS Interface Unit (BIU) acting as a BUS Controller Interface Unit (BCIU) or Remote Terminal Unit (RTU) between a Motorola 68000 VME BUS and MIL-STD-1553B Multiplex Data Bus. A discussion of how the BIU Hybrid set is programmed, and operates as a BCIU or RTU, will be included. This paper will review Dynamic Bus Control and other Mode Code capabilities. The BIU Hybrid Set interfaces to a 68000 Microprocessor with a VME Bus using programmed I/O transfers. This special interface will be discussed along with the internal Dual Access Memory (4K x 16) used to support the data exchanges between the CPU and the BIU Hybrid Set. The hybrid set's physical size and power requirements will be covered. This includes the present Double Eurocard the BIU function is presently being offered on.
Towards the formal specification of the requirements and design of a processor interface unit
NASA Technical Reports Server (NTRS)
Fura, David A.; Windley, Phillip J.; Cohen, Gerald C.
1993-01-01
Work to formally specify the requirements and design of a Processor Interface Unit (PIU), a single-chip subsystem providing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system, is described. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance free operation, or both. The approaches that were developed for modeling the PIU requirements and for composition of the PIU subcomponents at high levels of abstraction are described. These approaches were used to specify and verify a nontrivial subset of the PIU behavior. The PIU specification in Higher Order Logic (HOL) is documented in a companion NASA contractor report entitled 'Towards the Formal Specification of the Requirements and Design of a Processor Interfacs Unit - HOL Listings.' The subsequent verification approach and HOL listings are documented in NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit' and NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit - HOL Listings.'
Phast4Windows: a 3D graphical user interface for the reactive-transport simulator PHAST.
Charlton, Scott R; Parkhurst, David L
2013-01-01
Phast4Windows is a Windows® program for developing and running groundwater-flow and reactive-transport models with the PHAST simulator. This graphical user interface allows definition of grid-independent spatial distributions of model properties-the porous media properties, the initial head and chemistry conditions, boundary conditions, and locations of wells, rivers, drains, and accounting zones-and other parameters necessary for a simulation. Spatial data can be defined without reference to a grid by drawing, by point-by-point definitions, or by importing files, including ArcInfo® shape and raster files. All definitions can be inspected, edited, deleted, moved, copied, and switched from hidden to visible through the data tree of the interface. Model features are visualized in the main panel of the interface, so that it is possible to zoom, pan, and rotate features in three dimensions (3D). PHAST simulates single phase, constant density, saturated groundwater flow under confined or unconfined conditions. Reactions among multiple solutes include mineral equilibria, cation exchange, surface complexation, solid solutions, and general kinetic reactions. The interface can be used to develop and run simple or complex models, and is ideal for use in the classroom, for analysis of laboratory column experiments, and for development of field-scale simulations of geochemical processes and contaminant transport. Published 2012. This article is a U.S. Government work and is in the public domain in the USA.
Veal, Colin D.; Xu, Hang; Reekie, Katherine; Free, Robert; Hardwick, Robert J.; McVey, David; Brookes, Anthony J.; Hollox, Edward J.; Talbot, Christopher J.
2013-01-01
Motivation: Genomic copy number variation (CNV) can influence susceptibility to common diseases. High-throughput measurement of gene copy number on large numbers of samples is a challenging, yet critical, stage in confirming observations from sequencing or array Comparative Genome Hybridization (CGH). The paralogue ratio test (PRT) is a simple, cost-effective method of accurately determining copy number by quantifying the amplification ratio between a target and reference amplicon. PRT has been successfully applied to several studies analyzing common CNV. However, its use has not been widespread because of difficulties in assay design. Results: We present PRTPrimer (www.prtprimer.org) software for automated PRT assay design. In addition to stand-alone software, the web site includes a database of pre-designed assays for the human genome at an average spacing of 6 kb and a web interface for custom assay design. Other reference genomes can also be analyzed through local installation of the software. The usefulness of PRTPrimer was tested within known CNV, and showed reproducible quantification. This software and database provide assays that can rapidly genotype CNV, cost-effectively, on a large number of samples and will enable the widespread adoption of PRT. Availability: PRTPrimer is available in two forms: a Perl script (version 5.14 and higher) that can be run from the command line on Linux systems and as a service on the PRTPrimer web site (www.prtprimer.org). Contact: cjt14@le.ac.uk Supplementary Information: Supplementary data are available at Bioinformatics online. PMID:23742985
Mechanisms for widespread hippocampal involvement in cognition
Shohamy, Daphna; Turk-Browne, Nicholas B.
2014-01-01
The quintessential memory system in the human brain — the hippocampus and surrounding medial temporal lobe (MTL) — is often treated as a module for the formation of conscious, or declarative memories. However, growing evidence suggests that the hippocampus plays a broader role in memory and cognition and that theories organizing memory into strictly dedicated systems may need to be updated. We first consider the historical evidence for the specialized role of the hippocampus in declarative memory. Then, we describe the serendipitous encounter that motivated this special section, based on parallel research from our labs that suggested a more pervasive contribution of the hippocampus to cognition beyond declarative memory. Finally, we develop a theoretical framework that describes two general mechanisms for how the hippocampus interacts with other brain systems and cognitive processes: the Memory Modulation Hypothesis, in which mnemonic representations in the hippocampus modulate the operation of other systems, and the Adaptive Function Hypothesis, in which specialized computations in the hippocampus are recruited as a component of both mnemonic and non-mnemonic functions. This framework is consistent with an emerging view that the most fertile ground for discovery in cognitive psychology and neuroscience lies at the interface between parts of the mind and brain that have traditionally been studied in isolation. PMID:24246058
NASA Technical Reports Server (NTRS)
Recksiedler, A. L.; Lutes, C. L.
1972-01-01
The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.
Advanced Compact Holographic Data Storage System
NASA Technical Reports Server (NTRS)
Chao, Tien-Hsin; Zhou, Hanying; Reyes, George
2000-01-01
JPL, under current sponsorship from NASA Space Science and Earth Science Programs, is developing a high-density, nonvolatile and rad-hard Advanced Holographic Memory (AHM) system to enable large-capacity, high-speed, low power consumption, and read/write of data in a space environment. The entire read/write operation will be controlled with electro-optic mechanism without any moving parts. This CHDS will consist of laser diodes, photorefractive crystal, spatial light modulator, photodetector array, and I/O electronic interface. In operation, pages of information would be recorded and retrieved with random access and highspeed. The nonvolatile, rad-hard characteristics of the holographic memory will provide a revolutionary memory technology to enhance mission capabilities for all NASA's Earth Science Mission. In this paper, recent technology progress in developing this CHDS at JPL will be presented.
PCIE interface design for high-speed image storage system based on SSD
NASA Astrophysics Data System (ADS)
Wang, Shiming
2015-02-01
This paper proposes and implements a standard interface of miniaturized high-speed image storage system, which combines PowerPC with FPGA and utilizes PCIE bus as the high speed switching channel. Attached to the PowerPC, mSATA interface SSD(Solid State Drive) realizes RAID3 array storage. At the same time, a high-speed real-time image compression patent IP core also can be embedded in FPGA, which is in the leading domestic level with compression rate and image quality, making that the system can record higher image data rate or achieve longer recording time. The notebook memory card buckle type design is used in the mSATA interface SSD, which make it possible to complete the replacement in 5 seconds just using single hand, thus the total length of repeated recordings is increased. MSI (Message Signaled Interrupts) interruption guarantees the stability and reliability of continuous DMA transmission. Furthermore, only through the gigabit network, the remote display, control and upload to backup function can be realized. According to an optional 25 frame/s or 30 frame/s, upload speeds can be up to more than 84 MB/s. Compared with the existing FLASH array high-speed memory systems, it has higher degree of modularity, better stability and higher efficiency on development, maintenance and upgrading. Its data access rate is up to 300MB/s, realizing the high speed image storage system miniaturization, standardization and modularization, thus it is fit for image acquisition, storage and real-time transmission to server on mobile equipment.
Integrating Commercial Off-The-Shelf (COTS) graphics and extended memory packages with CLIPS
NASA Technical Reports Server (NTRS)
Callegari, Andres C.
1990-01-01
This paper addresses the question of how to mix CLIPS with graphics and how to overcome PC's memory limitations by using the extended memory available in the computer. By adding graphics and extended memory capabilities, CLIPS can be converted into a complete and powerful system development tool, on the other most economical and popular computer platform. New models of PCs have amazing processing capabilities and graphic resolutions that cannot be ignored and should be used to the fullest of their resources. CLIPS is a powerful expert system development tool, but it cannot be complete without the support of a graphics package needed to create user interfaces and general purpose graphics, or without enough memory to handle large knowledge bases. Now, a well known limitation on the PC's is the usage of real memory which limits CLIPS to use only 640 Kb of real memory, but now that problem can be solved by developing a version of CLIPS that uses extended memory. The user has access of up to 16 MB of memory on 80286 based computers and, practically, all the available memory (4 GB) on computers that use the 80386 processor. So if we give CLIPS a self-configuring graphics package that will automatically detect the graphics hardware and pointing device present in the computer, and we add the availability of the extended memory that exists in the computer (with no special hardware needed), the user will be able to create more powerful systems at a fraction of the cost and on the most popular, portable, and economic platform available such as the PC platform.
Physical activity and cognitive trajectories in cognitively normal adults: the adult children study.
Pizzie, Rachel; Hindman, Halley; Roe, Catherine M; Head, Denise; Grant, Elizabeth; Morris, John C; Hassenstab, Jason J
2014-01-01
Increased physical activity may protect against cognitive decline, the primary symptom of Alzheimer disease. In this study, we examined the relationship between physical activity and trajectories of cognitive functioning over serial assessments. Cognitively normal (Clinical Dementia Rating 0) middle-aged and older adults (N=173; mean age, 60.7 ± 7.8 y) completed a self-report measure of physical activity and a battery of standard neuropsychological tests assessing processing speed, attention, executive functioning, and verbal memory. At baseline, individuals with higher physical activity levels performed better on tests of episodic memory and visuospatial functioning. Over subsequent follow-up visits, higher physical activity was associated with small performance gains on executive functioning and working memory tasks in participants with one or more copies of the apolipoprotein ε4 allele (APOE4). In APOE4 noncarriers, slopes of cognitive performance over time were not related to baseline physical activity. Our results suggest that cognitively normal older adults who report higher levels of physical activity may have slightly better cognitive performance, but the potential cognitive benefits of higher levels of physical activity over time may be most evident in individuals at genetic risk for Alzheimer disease.
Preliminary design for a standard 10 sup 7 bit Solid State Memory (SSM)
NASA Technical Reports Server (NTRS)
Hayes, P. J.; Howle, W. M., Jr.; Stermer, R. L., Jr.
1978-01-01
A modular concept with three separate modules roughly separating bubble domain technology, control logic technology, and power supply technology was employed. These modules were respectively the standard memory module (SMM), the data control unit (DCU), and power supply module (PSM). The storage medium was provided by bubble domain chips organized into memory cells. These cells and the circuitry for parallel data access to the cells make up the SMM. The DCU provides a flexible serial data interface to the SMM. The PSM provides adequate power to enable one DCU and one SMM to operate simultaneously at the maximum data rate. The SSM was designed to handle asynchronous data rates from dc to 1.024 Mbs with a bit error rate less than 1 error in 10 to the eight power bits. Two versions of the SSM, a serial data memory and a dual parallel data memory were specified using the standard modules. The SSM specification includes requirements for radiation hardness, temperature and mechanical environments, dc magnetic field emission and susceptibility, electromagnetic compatibility, and reliability.
Kokkos: Enabling manycore performance portability through polymorphic memory access patterns
Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel
2014-07-22
The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less
Shehzad, Danish; Bozkuş, Zeki
2016-01-01
Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models.
Avalanche atomic switching in strain engineered Sb2Te3-GeTe interfacial phase-change memory cells
NASA Astrophysics Data System (ADS)
Zhou, Xilin; Behera, Jitendra K.; Lv, Shilong; Wu, Liangcai; Song, Zhitang; Simpson, Robert E.
2017-09-01
By confining phase transitions to the nanoscale interface between two different crystals, interfacial phase change memory heterostructures represent the state of the art for energy efficient data storage. We present the effect of strain engineering on the electrical switching performance of the {{Sb}}2{{Te}}3-GeTe superlattice van der Waals devices. Multiple Ge atoms switching through a two-dimensional Te layer reduces the activation barrier for further atoms to switch; an effect that can be enhanced by biaxial strain. The out-of-plane phonon mode of the GeTe crystal remains active in the superlattice heterostructures. The large in-plane biaxial strain imposed by the {{Sb}}2{{Te}}3 layers on the GeTe layers substantially improves the switching speed, reset energy, and cyclability of the superlattice memory devices. Moreover, carefully controlling residual stress in the layers of {{Sb}}2{{Te}}3-GeTe interfacial phase change memories provides a new degree of freedom to design the properties of functional superlattice structures for memory and photonics applications.
Bozkuş, Zeki
2016-01-01
Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models. PMID:27413363
Role of the lateral habenula in memory through online processing of information.
Mathis, Victor; Lecourtier, Lucas
2017-11-01
Our memory abilities, whether they involve short-term working memory or long-term episodic or procedural memories, are essential for our well-being, our capacity to adapt to constraints of our environment and survival. Therefore, several key brain regions and neurotransmitter systems are engaged in the processing of sensory information to either maintain such information in working memory so that it will quickly be used, and/or participate in the elaboration and storage of enduring traces useful for longer periods of time. Animal research has recently attracted attention on the lateral habenula which, as shown in rodents and non-human primates, seems to process information stemming in the main regions involved in memory processing, e.g., the medial prefrontal cortex, the hippocampus, the amygdala, the septal region, the basal ganglia, and participates in the control of key memory-related neurotransmitters systems, i.e., dopamine, serotonin, acetylcholine. Recently, the lateral habenula has been involved in working and spatial reference memories, in rodents, likely by participating in online processing of contextual information. In addition, several behavioral studies strongly suggest that it is also involved in the processing of the emotional valance of incoming information in order to adapt to particularly stressful situations. Therefore, the lateral habenula appears like a key region at the interface between cognition and emotion to participate in the selection of appropriate behaviors. Copyright © 2017 Elsevier Inc. All rights reserved.
Genome-wide identification of significant aberrations in cancer genome.
Yuan, Xiguo; Yu, Guoqiang; Hou, Xuchu; Shih, Ie-Ming; Clarke, Robert; Zhang, Junying; Hoffman, Eric P; Wang, Roger R; Zhang, Zhen; Wang, Yue
2012-07-27
Somatic Copy Number Alterations (CNAs) in human genomes are present in almost all human cancers. Systematic efforts to characterize such structural variants must effectively distinguish significant consensus events from random background aberrations. Here we introduce Significant Aberration in Cancer (SAIC), a new method for characterizing and assessing the statistical significance of recurrent CNA units. Three main features of SAIC include: (1) exploiting the intrinsic correlation among consecutive probes to assign a score to each CNA unit instead of single probes; (2) performing permutations on CNA units that preserve correlations inherent in the copy number data; and (3) iteratively detecting Significant Copy Number Aberrations (SCAs) and estimating an unbiased null distribution by applying an SCA-exclusive permutation scheme. We test and compare the performance of SAIC against four peer methods (GISTIC, STAC, KC-SMART, CMDS) on a large number of simulation datasets. Experimental results show that SAIC outperforms peer methods in terms of larger area under the Receiver Operating Characteristics curve and increased detection power. We then apply SAIC to analyze structural genomic aberrations acquired in four real cancer genome-wide copy number data sets (ovarian cancer, metastatic prostate cancer, lung adenocarcinoma, glioblastoma). When compared with previously reported results, SAIC successfully identifies most SCAs known to be of biological significance and associated with oncogenes (e.g., KRAS, CCNE1, and MYC) or tumor suppressor genes (e.g., CDKN2A/B). Furthermore, SAIC identifies a number of novel SCAs in these copy number data that encompass tumor related genes and may warrant further studies. Supported by a well-grounded theoretical framework, SAIC has been developed and used to identify SCAs in various cancer copy number data sets, providing useful information to study the landscape of cancer genomes. Open-source and platform-independent SAIC software is implemented using C++, together with R scripts for data formatting and Perl scripts for user interfacing, and it is easy to install and efficient to use. The source code and documentation are freely available at http://www.cbil.ece.vt.edu/software.htm.
Hi Fi Audio Tape to Sun Workstation Transfer System for Digital Audio Data
1994-03-01
33 Figure 13 The Interface Memory Map (for 64K X 32 SRAM ). [Ref. 10] ..... 35 Figure 14 Main board data bus connection to the DM bus...module are described separately below. DSP-LINK’C OR SCSI 2K x 32 SRAM 40MMO 51K x 32 atuffersOM C SBus TMS320C30 - - Slave Floating Point A t a...and an ENABLE signal is sent to the device along with a read or a write signal. The memory map of the board with 64k SRAM is shown in Figure 13. The
Distributed-Memory Computing With the Langley Aerothermodynamic Upwind Relaxation Algorithm (LAURA)
NASA Technical Reports Server (NTRS)
Riley, Christopher J.; Cheatwood, F. McNeil
1997-01-01
The Langley Aerothermodynamic Upwind Relaxation Algorithm (LAURA), a Navier-Stokes solver, has been modified for use in a parallel, distributed-memory environment using the Message-Passing Interface (MPI) standard. A standard domain decomposition strategy is used in which the computational domain is divided into subdomains with each subdomain assigned to a processor. Performance is examined on dedicated parallel machines and a network of desktop workstations. The effect of domain decomposition and frequency of boundary updates on performance and convergence is also examined for several realistic configurations and conditions typical of large-scale computational fluid dynamic analysis.
Samwald, Matthias; Lim, Ernest; Masiar, Peter; Marenco, Luis; Chen, Huajun; Morse, Thomas; Mutalik, Pradeep; Shepherd, Gordon; Miller, Perry; Cheung, Kei-Hoi
2009-01-01
The amount of biomedical data available in Semantic Web formats has been rapidly growing in recent years. While these formats are machine-friendly, user-friendly web interfaces allowing easy querying of these data are typically lacking. We present "Entrez Neuron", a pilot neuron-centric interface that allows for keyword-based queries against a coherent repository of OWL ontologies. These ontologies describe neuronal structures, physiology, mathematical models and microscopy images. The returned query results are organized hierarchically according to brain architecture. Where possible, the application makes use of entities from the Open Biomedical Ontologies (OBO) and the 'HCLS knowledgebase' developed by the W3C Interest Group for Health Care and Life Science. It makes use of the emerging RDFa standard to embed ontology fragments and semantic annotations within its HTML-based user interface. The application and underlying ontologies demonstrate how Semantic Web technologies can be used for information integration within a curated information repository and between curated information repositories. It also demonstrates how information integration can be accomplished on the client side, through simple copying and pasting of portions of documents that contain RDFa markup.
Role of the Bed Nucleus of the Stria Terminalis in Aversive Learning and Memory
ERIC Educational Resources Information Center
Goode, Travis D.; Maren, Stephen
2017-01-01
Surviving threats in the environment requires brain circuits for detecting (or anticipating) danger and for coordinating appropriate defensive responses (e.g., increased cardiac output, stress hormone release, and freezing behavior). The bed nucleus of the stria terminalis (BNST) is a critical interface between the "affective…
Elaborated Resources: An Instructional Design Strategy for Hypermedia.
ERIC Educational Resources Information Center
Rezabek, Randall H.; Ragan, Tillman J.
The concept of hypertext was introduced by Ted Nelson in 1965, but only recently has the widely available technology caught up with the idea. The new generation of microcomputers featuring large internal memories, graphic interfaces, and large data storage capacities have made the commercial development of hypertext/hypermedia software possible. A…
Networking the Light Fantastic--CD-ROMs on LANs.
ERIC Educational Resources Information Center
Kittle, Paul W.
1992-01-01
Describes the development of a local area network (LAN) at Loma Linda University that allows remote access for both IBM and Macintosh microcomputers to CD-ROMs. Topics discussed include types of networks; fiber optic technology; networking CD-ROM drives; remote access; modems; CD-ROM databases; memory management; interface software; and future…
CoNNeCT Baseband Processor Module
NASA Technical Reports Server (NTRS)
Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.
2011-01-01
A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.
Rana, Anwar Manzoor; Akbar, Tahira; Ismail, Muhammad; Ahmad, Ejaz; Hussain, Fayyaz; Talib, Ijaz; Imran, Muhammad; Mehmood, Khalid; Iqbal, Khalid; Nadeem, M. Younus
2017-01-01
Resistance switching characteristics of CeO2/Ti/CeO2 tri-layered films sandwiched between Pt bottom electrode and two different top electrodes (Ti and TaN) with different work functions have been investigated. RRAM memory cells composed of TaN/CeO2/Ti/CeO2/Pt reveal better resistive switching performance instead of Ti/CeO2/Ti/CeO2/Pt memory stacks. As compared to the Ti/CeO2 interface, much better ability of TaN/CeO2 interface to store and exchange plays a key role in the RS performance improvement, including lower forming/SET voltages, large memory window (~102) and no significant data degradation during endurance test of >104 switching cycles. The formation of TaON thinner interfacial layer between TaN TE and CeO2 film is found to be accountable for improved resistance switching behavior. Partial charge density of states is analyzed using density functional theory. It is found that the conductive filaments formed in CeO2 based devices is assisted by interstitial Ti dopant. Better stability and reproducibility in cycle-to-cycle (C2C) resistance distribution and Vset/Vreset uniformity were achieved due to the modulation of current conduction mechanism from Ohmic in low field region to Schottky emission in high field region. PMID:28079056
DOE Office of Scientific and Technical Information (OSTI.GOV)
An, Ho-Myoung; Kim, Hee-Dong; Kim, Tae Geun, E-mail: tgkim1@korea.ac.kr
Graphical abstract: The degradation tendency extracted by CP technique was almost the same in both the bulk-type and TFT-type cells. - Highlights: • D{sub it} is directly investigated from bulk-type and TFT-type CTF memory. • Charge pumping technique was employed to analyze the D{sub it} information. • To apply the CP technique to monitor the reliability of the 3D NAND flash. - Abstract: The energy distribution and density of interface traps (D{sub it}) are directly investigated from bulk-type and thin-film transistor (TFT)-type charge trap flash memory cells with tunnel oxide degradation, under program/erase (P/E) cycling using a charge pumping (CP)more » technique, in view of application in a 3-demension stackable NAND flash memory cell. After P/E cycling in bulk-type devices, the interface trap density gradually increased from 1.55 × 10{sup 12} cm{sup −2} eV{sup −1} to 3.66 × 10{sup 13} cm{sup −2} eV{sup −1} due to tunnel oxide damage, which was consistent with the subthreshold swing and transconductance degradation after P/E cycling. Its distribution moved toward shallow energy levels with increasing cycling numbers, which coincided with the decay rate degradation with short-term retention time. The tendency extracted with the CP technique for D{sub it} of the TFT-type cells was similar to those of bulk-type cells.« less
NASA Technical Reports Server (NTRS)
Bohnhoff-Hlavacek, Gail
1992-01-01
One of the objectives of the team supporting the LDEF Systems and Materials Special Investigative Groups is to develop databases of experimental findings. These databases identify the hardware flown, summarize results and conclusions, and provide a system for acknowledging investigators, tracing sources of data, and future design suggestions. To date, databases covering the optical experiments, and thermal control materials (chromic acid anodized aluminum, silverized Teflon blankets, and paints) have been developed at Boeing. We used the Filemaker Pro software, the database manager for the Macintosh computer produced by the Claris Corporation. It is a flat, text-retrievable database that provides access to the data via an intuitive user interface, without tedious programming. Though this software is available only for the Macintosh computer at this time, copies of the databases can be saved to a format that is readable on a personal computer as well. Further, the data can be exported to more powerful relational databases, capabilities, and use of the LDEF databases and describe how to get copies of the database for your own research.
NASA Astrophysics Data System (ADS)
Nellist, Michael R.; Laskowski, Forrest A. L.; Qiu, Jingjing; Hajibabaei, Hamed; Sivula, Kevin; Hamann, Thomas W.; Boettcher, Shannon W.
2018-01-01
Heterogeneous electrochemical phenomena, such as (photo)electrochemical water splitting to generate hydrogen using semiconductors and/or electrocatalysts, are driven by the accumulated charge carriers and thus the interfacial electrochemical potential gradients that promote charge transfer. However, measurements of the "surface" electrochemical potential during operation are not generally possible using conventional electrochemical techniques, which measure/control the potential of a conducting electrode substrate. Here we show that the nanoscale conducting tip of an atomic force microscope cantilever can sense the surface electrochemical potential of electrocatalysts in operando. To demonstrate utility, we measure the potential-dependent and thickness-dependent electronic properties of cobalt (oxy)hydroxide phosphate (CoPi). We then show that CoPi, when deposited on illuminated haematite (α-Fe2O3) photoelectrodes, acts as both a hole collector and an oxygen evolution catalyst. We demonstrate the versatility of the technique by comparing surface potentials of CoPi-decorated planar and mesoporous haematite and discuss viability for broader application in the study of electrochemical phenomena.
High-dose estradiol improves cognition for women with AD: results of a randomized study.
Asthana, S; Baker, L D; Craft, S; Stanczyk, F Z; Veith, R C; Raskind, M A; Plymate, S R
2001-08-28
To characterize the cognitive and neuroendocrine response to treatment with a high dose of estrogen for postmenopausal women with AD. Twenty postmenopausal women with AD were randomized to receive either 0.10 mg/day of 17 beta-estradiol by skin patch or a placebo patch for 8 weeks. Subjects were evaluated at baseline, at weeks 3, 5, and 8 during treatment, and again 8 weeks after treatment termination. During each visit, cognition was assessed with a battery of neuropsychological tests, and blood samples were collected to measure plasma estradiol as well as several other neuroendocrine markers of interest. Significant effects of estrogen treatment were observed on attention (Stroop Color Word Interference Test), verbal memory (Buschke Selective Reminding Test), and visual memory (Figure Copy/Memory). In addition, women treated with estrogen demonstrated improved performance on a test of semantic memory (Boston Naming Test) compared with subjects who received a placebo. Estrogen appeared to have a suppressive effect on the insulin-like growth factor (IGF) system such that plasma concentration of IGF binding protein-3 was significantly reduced and plasma levels of estradiol and IGF-I were negatively correlated during estrogen treatment. Administration of a higher dose of estrogen may enhance attention and memory for postmenopausal women with AD. Although these findings provide further clinical evidence to support a cognitive benefit of estrogen for women with AD, studies evaluating the effect of estradiol administration, in particular, using larger sample sizes and for longer treatment durations are warranted before the therapeutic potential of estrogen replacement for women with AD can be firmly established.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Welcome, Michael L.; Bell, Christian S.
GASNet (Global-Address Space Networking) is a language-independent, low-level networking layer that provides network-independent, high-performance communication primitives tailored for implementing parallel global address space SPMD languages such as UPC and Titanium. The interface is primarily intended as a compilation target and for use by runtime library writers (as opposed to end users), and the primary goals are high performance, interface portability, and expressiveness. GASNet is designed specifically to support high-performance, portable implementations of global address space languages on modern high-end communication networks. The interface provides the flexibility and extensibility required to express a wide variety of communication patterns without sacrificing performancemore » by imposing large computational overheads in the interface. The design of the GASNet interface is partitioned into two layers to maximize porting ease without sacrificing performance: the lower level is a narrow but very general interface called the GASNet core API - the design is basedheavily on Active Messages, and is implemented directly on top of each individual network architecture. The upper level is a wider and more expressive interface called GASNet extended API, which provides high-level operations such as remote memory access and various collective operations. This release implements GASNet over MPI, the Quadrics "elan" API, the Myrinet "GM" API and the "LAPI" interface to the IBM SP switch. A template is provided for adding support for additional network interfaces.« less
Quantum memory and gates using a Λ -type quantum emitter coupled to a chiral waveguide
NASA Astrophysics Data System (ADS)
Li, Tao; Miranowicz, Adam; Hu, Xuedong; Xia, Keyu; Nori, Franco
2018-06-01
By coupling a Λ -type quantum emitter to a chiral waveguide, in which the polarization of a photon is locked to its propagation direction, we propose a controllable photon-emitter interface for quantum networks. We show that this chiral system enables the swap gate and a hybrid-entangling gate between the emitter and a flying single photon. It also allows deterministic storage and retrieval of single-photon states with high fidelities and efficiencies. In short, this chirally coupled emitter-photon interface can be a critical building block toward a large-scale quantum network.