A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Ferroelectric Memory Devices and a Proposed Standardized Test System Design

DTIC Science & Technology

1992-06-01

positive clock transition. This provides automatic data protection in case of power loss. The device is being evaluated for applications such as automobile ...systems requiring nonvolatile memory and as these systems become more complex, the demand for reprogrammable nonvolatile memory increases. The...complexity and cost in making conventional nonvolatile memory reprogrammable also increases, so the potential for using ferroelectric memory as a replacement

Application of graphene oxide-poly (vinyl alcohol) polymer nanocomposite for memory devices

NASA Astrophysics Data System (ADS)

Kaushal, Jyoti; Kaur, Ravneet; Sharma, Jadab; Tripathi, S. K.

2018-05-01

Significant attention has been gained by polymer nanocomposites because of their possible demands in future electronic memory devices. In the present work, device based on Graphene Oxide (GO) and polyvinyl alcohol (PVA) has been made and examined for the memory device application. The prepared Graphene oxide (GO) and GO-PVA nanocomposite (NC) has been characterized by X-ray Diffraction (XRD). GO nanosheets show the diffraction peak at 2θ = 11.60° and the interlayer spacing of 0.761 nm. The XRD of GO-PVA NC shows the diffraction peak at 2θ =18.56°. The fabricated device shows bipolar switching behavior having ON/OFF current ratio ˜102. The Write-Read-Erase-Read (WRER) cycles test shows that the Al/GO-PVA/Ag device has good stability and repeatability.

Device and methods for writing and erasing analog information in small memory units via voltage pulses

DOEpatents

El Gabaly Marquez, Farid; Talin, Albert Alec

2018-04-17

Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

Biomaterial-based Memory Device Development by Conducting Metallic DNA

DTIC Science & Technology

2013-05-28

time. Therefore, we have created a multiple-states memory system . This is the first multi-states resistance memory device by using bio-nanowire of the...world. Based on this achievement, logic device and application will be developed in the near future, too. Moreover, by using Ni-DNA detection system ...ions in DNA can change the resistance of Ni-DNA by applying different polar bias and time. Therefore, we have created a multiple-states memory system

Titanium oxide nonvolatile memory device and its application

NASA Astrophysics Data System (ADS)

Wang, Wei

In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line

NASA Astrophysics Data System (ADS)

León Pérez, Edgar A. A.; Guenery, Pierre-Vincent; Abouzaid, Oumaïma; Ayadi, Khaled; Brottet, Solène; Moeyaert, Jérémy; Labau, Sébastien; Baron, Thierry; Blanchard, Nicholas; Baboux, Nicolas; Militaru, Liviu; Souifi, Abdelkader

2018-05-01

We report on the fabrication and characterization of Resistive Random Access Memory (RRAM) devices based on nanoparticles in MIM structures. Our approach is based on the use of indium oxide (In2O3) nanoparticles embedded in a dielectric matrix using CMOS-full-compatible fabrication processes in view of back-end-off-line integration for non-volatile memory (NVM) applications. A bipolar switching behavior has been observed using current-voltage measurements (I-V) for all devices. Very high ION/IOFF ratios have been obtained up to 108. Our results provide insights for further integration of In2O3 nanoparticles-based devices for NVM applications. He is currently a Postdoctoral Researcher in the Institute of Nanotechnologies of Lyon (INL), INSA de Lyon, France, in the Electronics Department. His current research include indium oxide nanoparticles for non-volatile memory applications, and the integrations of these devices in CMOS BEOL.

Transistor and memory devices based on novel organic and biomaterials

NASA Astrophysics Data System (ADS)

Tseng, Jia-Hung

Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with platinum nanoparticles. It is established that the effective barrier height in the materials systems needs to be further engineered in order to have sufficiently long retention times. Finally other novel architectures such as negative differential resistance devices and high density memory arrays are investigated for their influence on memory technology.

Development of a high capacity bubble domain memory element and related epitaxial garnet materials for application in spacecraft data recorders. Item 2: The optimization of material-device parameters for application in bubble domain memory elements for spacecraft data recorders

NASA Technical Reports Server (NTRS)

Besser, P. J.

1976-01-01

Bubble domain materials and devices are discussed. One of the materials development goals was a materials system suitable for operation of 16 micrometer period bubble domain devices at 150 kHz over the temperature range -10 C to +60 C. Several material compositions and hard bubble suppression techniques were characterized and the most promising candidates were evaluated in device structures. The technique of pulsed laser stroboscopic microscopy was used to characterize bubble dynamic properties and device performance at 150 kHz. Techniques for large area LPE film growth were developed as a separate task. Device studies included detector optimization, passive replicator design and test and on-chip bridge evaluation. As a technology demonstration an 8 chip memory cell was designed, tested and delivered. The memory elements used in the cell were 10 kilobit serial registers.

Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

NASA Astrophysics Data System (ADS)

Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

2015-10-01

Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e

Metal-organic molecular device for non-volatile memory storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Radha, B., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in

Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organicmore » complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.« less

Application of nanomaterials in two-terminal resistive-switching memory devices

PubMed Central

Ouyang, Jianyong

2010-01-01

Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs), nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. PMID:22110862

Electrical studies of Ge4Sb1Te5 devices for memory applications

NASA Astrophysics Data System (ADS)

Sangeetha, B. G.; Shylashree, N.

2018-05-01

In this paper, the Ge4Sb1Te5 thin film device preparation and electrical studies for memory devices were carried out. The device was deposited using vapor-evaporation technique. RESET to SET state switching was shown using current-voltage characterization. The current-voltage characterization shows the switching between SET to RESET state and it was found that it requires a low energy for transition. Switching between amorphous to crystalline nature was studied using resistance-voltage characteristics. The endurance showed the effective use of this composition for memory device.

Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices.

PubMed

Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A

2017-10-17

A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.

Wide memory window in graphene oxide charge storage nodes

NASA Astrophysics Data System (ADS)

Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping

2010-04-01

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

Opportunities for nonvolatile memory systems in extreme-scale high-performance computing

DOE PAGES

Vetter, Jeffrey S.; Mittal, Sparsh

2015-01-12

For extreme-scale high-performance computing systems, system-wide power consumption has been identified as one of the key constraints moving forward, where DRAM main memory systems account for about 30 to 50 percent of a node's overall power consumption. As the benefits of device scaling for DRAM memory slow, it will become increasingly difficult to keep memory capacities balanced with increasing computational rates offered by next-generation processors. However, several emerging memory technologies related to nonvolatile memory (NVM) devices are being investigated as an alternative for DRAM. Moving forward, NVM devices could offer solutions for HPC architectures. Researchers are investigating how to integratemore » these emerging technologies into future extreme-scale HPC systems and how to expose these capabilities in the software stack and applications. In addition, current results show several of these strategies could offer high-bandwidth I/O, larger main memory capacities, persistent data structures, and new approaches for application resilience and output postprocessing, such as transaction-based incremental checkpointing and in situ visualization, respectively.« less

Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

PubMed

Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

2016-05-01

We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

Fast Initialization of Bubble-Memory Systems

NASA Technical Reports Server (NTRS)

Looney, K. T.; Nichols, C. D.; Hayes, P. J.

1986-01-01

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Operation mode switchable charge-trap memory based on few-layer MoS2

NASA Astrophysics Data System (ADS)

Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-03-01

Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.

Analysis of a digital RF memory in a signal-delay application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jelinek, D.A.

1992-03-01

Laboratory simulation of the approach of a radar fuze towards a target is an important factor in our ability to accurately measure the radar's performance. This simulation is achieved, in part, by dynamically delaying and attenuating the radar's transmitted pulse and sending the result back to the radar's receiver. Historically, the device used to perform the dynamic delay has been a limiting factor in the evaluation of a radar's performance and characteristics. A new device has been proposed that appears to have more capability than previous dynamic delay devices. This device is the digital RF memory. This report presents themore » results of an analysis of a digital RF memory used in a signal-delay application. 2 refs.« less

Solution processed molecular floating gate for flexible flash memories

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-10-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.

Solution processed molecular floating gate for flexible flash memories

PubMed Central

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-01-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758

CMOS-compatible spintronic devices: a review

NASA Astrophysics Data System (ADS)

Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

2016-11-01

For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

Electrical Switching of Perovskite Thin-Film Resistors

NASA Technical Reports Server (NTRS)

Liu, Shangqing; Wu, Juan; Ignatiev, Alex

2010-01-01

Electronic devices that exploit electrical switching of physical properties of thin films of perovskite materials (especially colossal magnetoresistive materials) have been invented. Unlike some related prior devices, these devices function at room temperature and do not depend on externally applied magnetic fields. Devices of this type can be designed to function as sensors (exhibiting varying electrical resistance in response to varying temperature, magnetic field, electric field, and/or mechanical pressure) and as elements of electronic memories. The underlying principle is that the application of one or more short electrical pulse(s) can induce a reversible, irreversible, or partly reversible change in the electrical, thermal, mechanical, and magnetic properties of a thin perovskite film. The energy in the pulse must be large enough to induce the desired change but not so large as to destroy the film. Depending on the requirements of a specific application, the pulse(s) can have any of a large variety of waveforms (e.g., square, triangular, or sine) and be of positive, negative, or alternating polarity. In some applications, it could be necessary to use multiple pulses to induce successive incremental physical changes. In one class of applications, electrical pulses of suitable shapes, sizes, and polarities are applied to vary the detection sensitivities of sensors. Another class of applications arises in electronic circuits in which certain resistance values are required to be variable: Incorporating the affected resistors into devices of the present type makes it possible to control their resistances electrically over wide ranges, and the lifetimes of electrically variable resistors exceed those of conventional mechanically variable resistors. Another and potentially the most important class of applications is that of resistance-based nonvolatile-memory devices, such as a resistance random access memory (RRAM) described in the immediately following article, Electrically Variable Resistive Memory Devices (MFS-32511-1).

Impacts of Co doping on ZnO transparent switching memory device characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar

2016-05-02

The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less

Electronic device aspects of neural network memories

NASA Technical Reports Server (NTRS)

Lambe, J.; Moopenn, A.; Thakoor, A. P.

1985-01-01

The basic issues related to the electronic implementation of the neural network model (NNM) for content addressable memories are examined. A brief introduction to the principles of the NNM is followed by an analysis of the information storage of the neural network in the form of a binary connection matrix and the recall capability of such matrix memories based on a hardware simulation study. In addition, materials and device architecture issues involved in the future realization of such networks in VLSI-compatible ultrahigh-density memories are considered. A possible space application of such devices would be in the area of large-scale information storage without mechanical devices.

Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang, Yu-Chi; Wang, Yeong-Her, E-mail: yhw@ee.ncku.edu.tw

2015-03-23

Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10{sup 5}), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect ofmore » Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications.« less

High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

NASA Astrophysics Data System (ADS)

Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

2016-02-01

Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices.

Homogeneous-oxide stack in IGZO thin-film transistors for multi-level-cell NAND memory application

NASA Astrophysics Data System (ADS)

Ji, Hao; Wei, Yehui; Zhang, Xinlei; Jiang, Ran

2017-11-01

A nonvolatile charge-trap-flash memory that is based on amorphous indium-gallium-zinc-oxide thin film transistors was fabricated with a homogeneous-oxide structure for a multi-level-cell application. All oxide layers, i.e., tunneling layer, charge trapping layer, and blocking layer, were fabricated with Al2O3 films. The fabrication condition (including temperature and deposition method) of the charge trapping layer was different from those of the other oxide layers. This device demonstrated a considerable large memory window of 4 V between the states fully erased and programmed with the operation voltage less than 14 V. This kind of device shows a good prospect for multi-level-cell memory applications.

Investigation of fast initialization of spacecraft bubble memory systems

NASA Technical Reports Server (NTRS)

Looney, K. T.; Nichols, C. D.; Hayes, P. J.

1984-01-01

Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

Analysis of a digital RF memory in a signal-delay application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jelinek, D.A.

1992-03-01

Laboratory simulation of the approach of a radar fuze towards a target is an important factor in our ability to accurately measure the radar`s performance. This simulation is achieved, in part, by dynamically delaying and attenuating the radar`s transmitted pulse and sending the result back to the radar`s receiver. Historically, the device used to perform the dynamic delay has been a limiting factor in the evaluation of a radar`s performance and characteristics. A new device has been proposed that appears to have more capability than previous dynamic delay devices. This device is the digital RF memory. This report presents themore » results of an analysis of a digital RF memory used in a signal-delay application. 2 refs.« less

Medical applications of shape memory polymers

NASA Technical Reports Server (NTRS)

Sokolowski, Witold M.

2005-01-01

Shape memory polymers are described here and major advantages in some applications are identified over other medical materials such as shape memory alloys (SMA). A number of medical applications are anticipated for shape memory polymers. Some simple applications are already utilized in medical world, others are in examination process. Lately, several important applications are being considered for CHEM foams for self-deployable vascular and coronary devices. One of these potential applications, the endovascular treatment of aneurysm was experimentally investigated with encouraging results and is described in this paper as well.

Filamentary model in resistive switching materials

NASA Astrophysics Data System (ADS)

Jasmin, Alladin C.

2017-12-01

The need for next generation computer devices is increasing as the demand for efficient data processing increases. The amount of data generated every second also increases which requires large data storage devices. Oxide-based memory devices are being studied to explore new research frontiers thanks to modern advances in nanofabrication. Various oxide materials are studied as active layers for non-volatile memory. This technology has potential application in resistive random-access-memory (ReRAM) and can be easily integrated in CMOS technologies. The long term perspective of this research field is to develop devices which mimic how the brain processes information. To realize such application, a thorough understanding of the charge transport and switching mechanism is important. A new perspective in the multistate resistive switching based on current-induced filament dynamics will be discussed. A simple equivalent circuit of the device gives quantitative information about the nature of the conducting filament at different resistance states.

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

Novel synaptic memory device for neuromorphic computing

NASA Astrophysics Data System (ADS)

Mandal, Saptarshi; El-Amin, Ammaarah; Alexander, Kaitlyn; Rajendran, Bipin; Jha, Rashmi

2014-06-01

This report discusses the electrical characteristics of two-terminal synaptic memory devices capable of demonstrating an analog change in conductance in response to the varying amplitude and pulse-width of the applied signal. The devices are based on Mn doped HfO2 material. The mechanism behind reconfiguration was studied and a unified model is presented to explain the underlying device physics. The model was then utilized to show the application of these devices in speech recognition. A comparison between a 20 nm × 20 nm sized synaptic memory device with that of a state-of-the-art VLSI SRAM synapse showed ~10× reduction in area and >106 times reduction in the power consumption per learning cycle.

Internal filament modulation in low-dielectric gap design for built-in selector-less resistive switching memory application

NASA Astrophysics Data System (ADS)

Chen, Ying-Chen; Lin, Chih-Yang; Huang, Hui-Chun; Kim, Sungjun; Fowler, Burt; Chang, Yao-Feng; Wu, Xiaohan; Xu, Gaobo; Chang, Ting-Chang; Lee, Jack C.

2018-02-01

Sneak path current is a severe hindrance for the application of high-density resistive random-access memory (RRAM) array designs. In this work, we demonstrate nonlinear (NL) resistive switching characteristics of a HfO x /SiO x -based stacking structure as a realization for selector-less RRAM devices. The NL characteristic was obtained and designed by optimizing the internal filament location with a low effective dielectric constant in the HfO x /SiO x structure. The stacking HfO x /SiO x -based RRAM device as the one-resistor-only memory cell is applicable without needing an additional selector device to solve the sneak path issue with a switching voltage of ~1 V, which is desirable for low-power operating in built-in nonlinearity crossbar array configurations.

Role of nanorods insertion layer in ZnO-based electrochemical metallization memory cell

NASA Astrophysics Data System (ADS)

Mangasa Simanjuntak, Firman; Singh, Pragya; Chandrasekaran, Sridhar; Juanda Lumbantoruan, Franky; Yang, Chih-Chieh; Huang, Chu-Jie; Lin, Chun-Chieh; Tseng, Tseung-Yuen

2017-12-01

An engineering nanorod array in a ZnO-based electrochemical metallization device for nonvolatile memory applications was investigated. A hydrothermally synthesized nanorod layer was inserted into a Cu/ZnO/ITO device structure. Another device was fabricated without nanorods for comparison, and this device demonstrated a diode-like behavior with no switching behavior at a low current compliance (CC). The switching became clear only when the CC was increased to 75 mA. The insertion of a nanorods layer induced switching characteristics at a low operation current and improve the endurance and retention performances. The morphology of the nanorods may control the switching characteristics. A forming-free electrochemical metallization memory device having long switching cycles (>104 cycles) with a sufficient memory window (103 times) for data storage application, good switching stability and sufficient retention was successfully fabricated by adjusting the morphology and defect concentration of the inserted nanorod layer. The nanorod layer not only contributed to inducing resistive switching characteristics but also acted as both a switching layer and a cation diffusion control layer.

Ultra-low power, highly uniform polymer memory by inserted multilayer graphene electrode

NASA Astrophysics Data System (ADS)

Jang, Byung Chul; Seong, Hyejeong; Kim, Jong Yun; Koo, Beom Jun; Kim, Sung Kyu; Yang, Sang Yoon; Gap Im, Sung; Choi, Sung-Yool

2015-12-01

Filament type resistive random access memory (RRAM) based on polymer thin films is a promising device for next generation, flexible nonvolatile memory. However, the resistive switching nonuniformity and the high power consumption found in the general filament type RRAM devices present critical issues for practical memory applications. Here, we introduce a novel approach not only to reduce the power consumption but also to improve the resistive switching uniformity in RRAM devices based on poly(1,3,5-trimethyl-3,4,5-trivinyl cyclotrisiloxane) by inserting multilayer graphene (MLG) at the electrode/polymer interface. The resistive switching uniformity was thereby significantly improved, and the power consumption was markedly reduced by 250 times. Furthermore, the inserted MLG film enabled a transition of the resistive switching operation from unipolar resistive switching to bipolar resistive switching and induced self-compliance behavior. The findings of this study can pave the way toward a new area of application for graphene in electronic devices.

From dead leaves to sustainable organic resistive switching memory.

PubMed

Sun, Bai; Zhu, Shouhui; Mao, Shuangsuo; Zheng, Pingping; Xia, Yudong; Yang, Feng; Lei, Ming; Zhao, Yong

2018-03-01

An environmental-friendly, sustainable, pollution-free, biodegradable, flexible and wearable electronic device hold advanced potential applications. Here, an organic resistive switching memory device with Ag/Leaves/Ti/PET structure on a flexible polyethylene terephthalate (PET) substrate was fabricated for the first time. We observed an obvious resistive switching memory characteristic with large switching resistance ratio and stable cycle performance at room temperature. This work demonstrates that leaves, a useless waste, can be properly treated to make useful devices. Furthermore, the as-fabricated devices can be degraded naturally without damage to the environment. Copyright © 2017 Elsevier Inc. All rights reserved.

Resistive switching effect in the planar structure of all-printed, flexible and rewritable memory device based on advanced 2D nanocomposite of graphene quantum dots and white graphene flakes

NASA Astrophysics Data System (ADS)

Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Kim, Sowon; Choi, Kyung Hyun

2017-08-01

Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al2O3) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications.

Novel conformal organic antireflective coatings for advanced I-line lithography

NASA Astrophysics Data System (ADS)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Brownmillerite thin films as fast ion conductors for ultimate-performance resistance switching memory.

PubMed

Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk

2017-07-27

An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.

CMOS imager for pointing and tracking applications

NASA Technical Reports Server (NTRS)

Sun, Chao (Inventor); Pain, Bedabrata (Inventor); Yang, Guang (Inventor); Heynssens, Julie B. (Inventor)

2006-01-01

Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

Memristive effects in oxygenated amorphous carbon nanodevices

NASA Astrophysics Data System (ADS)

Bachmann, T. A.; Koelmans, W. W.; Jonnalagadda, V. P.; Le Gallo, M.; Santini, C. A.; Sebastian, A.; Eleftheriou, E.; Craciun, M. F.; Wright, C. D.

2018-01-01

Computing with resistive-switching (memristive) memory devices has shown much recent progress and offers an attractive route to circumvent the von-Neumann bottleneck, i.e. the separation of processing and memory, which limits the performance of conventional computer architectures. Due to their good scalability and nanosecond switching speeds, carbon-based resistive-switching memory devices could play an important role in this respect. However, devices based on elemental carbon, such as tetrahedral amorphous carbon or ta-C, typically suffer from a low cycling endurance. A material that has proven to be capable of combining the advantages of elemental carbon-based memories with simple fabrication methods and good endurance performance for binary memory applications is oxygenated amorphous carbon, or a-CO x . Here, we examine the memristive capabilities of nanoscale a-CO x devices, in particular their ability to provide the multilevel and accumulation properties that underpin computing type applications. We show the successful operation of nanoscale a-CO x memory cells for both the storage of multilevel states (here 3-level) and for the provision of an arithmetic accumulator. We implement a base-16, or hexadecimal, accumulator and show how such a device can carry out hexadecimal arithmetic and simultaneously store the computed result in the self-same a-CO x cell, all using fast (sub-10 ns) and low-energy (sub-pJ) input pulses.

Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

DOE PAGES

Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

2014-07-22

The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less

Computing with volatile memristors: an application of non-pinched hysteresis

NASA Astrophysics Data System (ADS)

Pershin, Y. V.; Shevchenko, S. N.

2017-02-01

The possibility of in-memory computing with volatile memristive devices, namely, memristors requiring a power source to sustain their memory, is demonstrated theoretically. We have adopted a hysteretic graphene-based field emission structure as a prototype of a volatile memristor, which is characterized by a non-pinched hysteresis loop. A memristive model of the structure is developed and used to simulate a polymorphic circuit implementing stateful logic gates, such as the material implication. Specific regions of parameter space realizing useful logic functions are identified. Our results are applicable to other realizations of volatile memory devices, such as certain NEMS switches.

Nanogap-Engineerable Electromechanical System for Ultralow Power Memory.

PubMed

Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei; Chu, Weiguo; Zhou, Haiqing; Sun, Lianfeng

2018-02-01

Nanogap engineering of low-dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub-5 nm nanogaped single-walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10 -19 J bit -1 ), ON/OFF ratio of 10 5 , stable switching ON operations, and over 30 h retention time in ambient conditions.

Nanogap‐Engineerable Electromechanical System for Ultralow Power Memory

PubMed Central

Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei

2017-01-01

Abstract Nanogap engineering of low‐dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub‐5 nm nanogaped single‐walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10−19 J bit−1), ON/OFF ratio of 105, stable switching ON operations, and over 30 h retention time in ambient conditions. PMID:29619307

Electrical reliability, multilevel data storage and mechanical stability of MoS2-PMMA nanocomposite-based non-volatile memory device

NASA Astrophysics Data System (ADS)

Bhattacharjee, Snigdha; Sarkar, Pranab Kumar; Prajapat, Manoj; Roy, Asim

2017-07-01

Molybdenum disulfide (MoS2) is of great interest for its applicability in various optoelectronic devices. Here we report the resistive switching properties of polymethylmethacrylate embedding MoS2 nano-crystals. The devices are developed on an ITO-coated PET substrate with copper as the top electrode. Systematic evaluation of resistive switching parameters, on the basis of MoS2 content, suggests non-volatile memory characteristics. A decent ON/OFF ratio, high retention time and long endurance of 3  ×  103, 105 s and 105 cycles are respectively recorded in a device with 1 weight percent (wt%) of MoS2. The bending cyclic measurements confirm the flexibility of the memory devices with good electrical reliability as well as mechanical stability. In addition, multilevel storage has been demonstrated by controlling the current compliance and span of voltage sweeping in the memory device.

Write once read many memory device from Tris-8 (-hydroxyquinoline) aluminum and Indium tin oxide nano particles

NASA Astrophysics Data System (ADS)

Aneesh, J.; Predeep, P.

2011-10-01

Consequent to the fast increase in data storage requirements new materials and device structures are explored in a war footing. Organic memory devices are attracting lot of interest among the researchers and are becoming a hot topic of investigations. This study is an attempt to develop a tri-layer organic memory device using indium tin oxide (ITO) nanoparticles as charge trapping middle layer between tris-8(-hydroxyquinoline)aluminum (Alq3) layers employing spin coating technique. Device switching is studied by applying a current-voltage (I-V) sweep. On increasing the applied bias the device switched from the initial high resistance (OFF) state to a low resistance (ON) state at a switch on voltage of around 4 V. ON/OFF ratio is of the order of 100 at a read voltage of 2 V. The device is found to remain in the low resistance state on further scans, showing the applicability of this device as a write once read many times (WORM) memory.

Investigation of resistive switching behaviours in WO3-based RRAM devices

NASA Astrophysics Data System (ADS)

Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming

2011-01-01

In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.

Resistive switching behaviors of Au/pentacene/Si-nanowire arrays/heavily doped n-type Si devices for memory applications

NASA Astrophysics Data System (ADS)

Tsao, Hou-Yen; Lin, Yow-Jon

2014-02-01

The fabrication of memory devices based on the Au/pentacene/heavily doped n-type Si (n+-Si), Au/pentacene/Si nanowires (SiNWs)/n+-Si, and Au/pentacene/H2O2-treated SiNWs/n+-Si structures and their resistive switching characteristics were reported. A pentacene memory structure using SiNW arrays as charge storage nodes was demonstrated. The Au/pentacene/SiNWs/n+-Si devices show hysteresis behavior. H2O2 treatment may lead to the hysteresis degradation. However, no hysteresis-type current-voltage characteristics were observed for Au/pentacene/n+-Si devices, indicating that the resistive switching characteristic is sensitive to SiNWs and the charge trapping effect originates from SiNWs. The concept of nanowires within the organic layer opens a promising direction for organic memory devices.

Forming free and ultralow-power erase operation in atomically crystal TiO2 resistive switching

NASA Astrophysics Data System (ADS)

Dai, Yawei; Bao, Wenzhong; Hu, Linfeng; Liu, Chunsen; Yan, Xiao; Chen, Lin; Sun, Qingqing; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-06-01

Two-dimensional layered materials (2DLMs) have attracted broad interest from fundamental sciences to industrial applications. Their applications in memory devices have been demonstrated, yet much still remains to explore optimal materials and device structure for practical application. In this work, a forming-free, bipolar resistive switching behavior are demonstrated in 2D TiO2-based resistive random access memory (RRAM). Physical adsorption method is adopted to achieve high quality, continuous 2D TiO2 network efficiently. The 2D TiO2 RRAM devices exhibit superior properties such as fast switching capability (20 ns of erase operation) and extremely low erase energy consumption (0.16 fJ). Furthermore, the resistive switching mechanism is attributed to the formation and rupture of oxygen vacancies-based percolation path in 2D TiO2 crystals. Our results pave the way for the implementation of high performance 2DLMs-based RRAM in the next generation non-volatile memory (NVM) application.

Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx, GdOx, HfOx, and TaOx switching materials.

PubMed

Prakash, Amit; Maikap, Siddheswar; Banerjee, Writam; Jana, Debanjan; Lai, Chao-Sung

2013-09-06

Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled 'SET/RESET' current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.

Microcontroller for automation application

NASA Technical Reports Server (NTRS)

Cooper, H. W.

1975-01-01

The description of a microcontroller currently being developed for automation application was given. It is basically an 8-bit microcomputer with a 40K byte random access memory/read only memory, and can control a maximum of 12 devices through standard 15-line interface ports.

Recent Advances of Flexible Data Storage Devices Based on Organic Nanoscaled Materials.

PubMed

Zhou, Li; Mao, Jingyu; Ren, Yi; Han, Su-Ting; Roy, Vellaisamy A L; Zhou, Ye

2018-03-01

Following the trend of miniaturization as per Moore's law, and facing the strong demand of next-generation electronic devices that should be highly portable, wearable, transplantable, and lightweight, growing endeavors have been made to develop novel flexible data storage devices possessing nonvolatile ability, high-density storage, high-switching speed, and reliable endurance properties. Nonvolatile organic data storage devices including memory devices on the basis of floating-gate, charge-trapping, and ferroelectric architectures, as well as organic resistive memory are believed to be favorable candidates for future data storage applications. In this Review, typical information on device structure, memory characteristics, device operation mechanisms, mechanical properties, challenges, and recent progress of the above categories of flexible data storage devices based on organic nanoscaled materials is summarized. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures

PubMed Central

Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo

2018-01-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.

PubMed

Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun

2018-04-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

PubMed Central

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

PubMed

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

Signal and noise extraction from analog memory elements for neuromorphic computing.

PubMed

Gong, N; Idé, T; Kim, S; Boybat, I; Sebastian, A; Narayanan, V; Ando, T

2018-05-29

Dense crossbar arrays of non-volatile memory (NVM) can potentially enable massively parallel and highly energy-efficient neuromorphic computing systems. The key requirements for the NVM elements are continuous (analog-like) conductance tuning capability and switching symmetry with acceptable noise levels. However, most NVM devices show non-linear and asymmetric switching behaviors. Such non-linear behaviors render separation of signal and noise extremely difficult with conventional characterization techniques. In this study, we establish a practical methodology based on Gaussian process regression to address this issue. The methodology is agnostic to switching mechanisms and applicable to various NVM devices. We show tradeoff between switching symmetry and signal-to-noise ratio for HfO 2 -based resistive random access memory. Then, we characterize 1000 phase-change memory devices based on Ge 2 Sb 2 Te 5 and separate total variability into device-to-device variability and inherent randomness from individual devices. These results highlight the usefulness of our methodology to realize ideal NVM devices for neuromorphic computing.

Charge Carrier Transport Mechanism Based on Stable Low Voltage Organic Bistable Memory Device.

PubMed

Ramana, V V; Moodley, M K; Kumar, A B V Kiran; Kannan, V

2015-05-01

A solution processed two terminal organic bistable memory device was fabricated utilizing films of polymethyl methacrylate PMMA/ZnO/PMMA on top of ITO coated glass. Electrical characterization of the device structure showed that the two terminal device exhibited favorable switching characteristics with an ON/OFF ratio greater than 1 x 10(4) when the voltage was swept between - 2 V and +3 V. The device maintained its state after removal of the bias voltage. The device did not show degradation after a 1-h retention test at 120 degrees C. The memory functionality was consistent even after fifty cycles of operation. The charge transport switching mechanism is discussed on the basis of carrier transport mechanism and our analysis of the data shows that the charge carrier trans- port mechanism of the device during the writing process can be explained by thermionic emission (TE) and space-charge-limited-current (SCLC) mechanism models while erasing process could be explained by the FN tunneling mechanism. This demonstration provides a class of memory devices with the potential for low-cost, low-power consumption applications, such as a digital memory cell.

Inserting Thienyl Linkers into Conjugated Molecules for Efficient Multilevel Electronic Memory: A New Understanding of Charge-Trapping in Organic Materials.

PubMed

Li, Yang; Li, Hua; He, Jinghui; Xu, Qingfeng; Li, Najun; Chen, Dongyun; Lu, Jianmei

2016-03-18

The practical application of organic memory devices requires low power consumption and reliable device quality. Herein, we report that inserting thienyl units into D-π-A molecules can improve these parameters by tuning the texture of the film. Theoretical calculations revealed that introducing thienyl π bridges increased the planarity of the molecular backbone and extended the D-A conjugation. Thus, molecules with more thienyl spacers showed improved stacking and orientation in the film state relative to the substrates. The corresponding sandwiched memory devices showed enhanced ternary memory behavior, with lower threshold voltages and better repeatability. The conductive switching and variation in the performance of the memory devices were interpreted by using an extended-charge-trapping mechanism. Our study suggests that judicious molecular engineering can facilitate control of the orientation of the crystallite in the solid state to achieve superior multilevel memory performance. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Conference on Charge-Coupled Device Technology and Applications

NASA Technical Reports Server (NTRS)

1976-01-01

Papers were presented from the conference on charge coupled device technology and applications. The following topics were investigated: data processing; infrared; devices and testing; electron-in, x-ray, radiation; and applications. The emphasis was on the advances of mutual relevance and potential significance both to industry and NASA's current and future requirements in all fields of imaging, signal processing and memory.

Investigations on the effects of electrode materials on the device characteristics of ferroelectric memory thin film transistors fabricated on flexible substrates

NASA Astrophysics Data System (ADS)

Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min

2018-03-01

For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.

Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

2018-01-01

In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Energy efficient hybrid computing systems using spin devices

NASA Astrophysics Data System (ADS)

Sharad, Mrigank

Emerging spin-devices like magnetic tunnel junctions (MTJ's), spin-valves and domain wall magnets (DWM) have opened new avenues for spin-based logic design. This work explored potential computing applications which can exploit such devices for higher energy-efficiency and performance. The proposed applications involve hybrid design schemes, where charge-based devices supplement the spin-devices, to gain large benefits at the system level. As an example, lateral spin valves (LSV) involve switching of nanomagnets using spin-polarized current injection through a metallic channel such as Cu. Such spin-torque based devices possess several interesting properties that can be exploited for ultra-low power computation. Analog characteristic of spin current facilitate non-Boolean computation like majority evaluation that can be used to model a neuron. The magneto-metallic neurons can operate at ultra-low terminal voltage of ˜20mV, thereby resulting in small computation power. Moreover, since nano-magnets inherently act as memory elements, these devices can facilitate integration of logic and memory in interesting ways. The spin based neurons can be integrated with CMOS and other emerging devices leading to different classes of neuromorphic/non-Von-Neumann architectures. The spin-based designs involve `mixed-mode' processing and hence can provide very compact and ultra-low energy solutions for complex computation blocks, both digital as well as analog. Such low-power, hybrid designs can be suitable for various data processing applications like cognitive computing, associative memory, and currentmode on-chip global interconnects. Simulation results for these applications based on device-circuit co-simulation framework predict more than ˜100x improvement in computation energy as compared to state of the art CMOS design, for optimal spin-device parameters.

Preparation and characterization of Sb2Se3 devices for memory applications

NASA Astrophysics Data System (ADS)

Shylashree, N.; Uma B., V.; Dhanush, S.; Abachi, Sagar; Nisarga, A.; Aashith, K.; Sangeetha B., G.

2018-05-01

In this paper, A phase change material of Sb2Se3 was proposed for non volatile memory application. The thin film device preparation and characterization were carried out. The deposition method used was vapor evaporation technique and a thickness of 180nm was deposited. The switching between the SET and RESET state is shown by the I-V characterization. The change of phase was studied using R-V characterization. Different fundamental modes were also identified using Raman spectroscopy.

Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications

NASA Astrophysics Data System (ADS)

He, Long-Fei; Zhu, Hao; Xu, Jing; Liu, Hao; Nie, Xin-Ran; Chen, Lin; Sun, Qing-Qing; Xia, Yang; Wei Zhang, David

2017-11-01

The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.

Eternal Sunshine of the Spotless Machine: Protecting Privacy with Ephemeral Channels

PubMed Central

Dunn, Alan M.; Lee, Michael Z.; Jana, Suman; Kim, Sangman; Silberstein, Mark; Xu, Yuanzhong; Shmatikov, Vitaly; Witchel, Emmett

2014-01-01

Modern systems keep long memories. As we show in this paper, an adversary who gains access to a Linux system, even one that implements secure deallocation, can recover the contents of applications’ windows, audio buffers, and data remaining in device drivers—long after the applications have terminated. We design and implement Lacuna, a system that allows users to run programs in “private sessions.” After the session is over, all memories of its execution are erased. The key abstraction in Lacuna is an ephemeral channel, which allows the protected program to talk to peripheral devices while making it possible to delete the memories of this communication from the host. Lacuna can run unmodified applications that use graphics, sound, USB input devices, and the network, with only 20 percentage points of additional CPU utilization. PMID:24755709

VOP memory management in MPEG-4

NASA Astrophysics Data System (ADS)

Vaithianathan, Karthikeyan; Panchanathan, Sethuraman

2001-03-01

MPEG-4 is a multimedia standard that requires Video Object Planes (VOPs). Generation of VOPs for any kind of video sequence is still a challenging problem that largely remains unsolved. Nevertheless, if this problem is treated by imposing certain constraints, solutions for specific application domains can be found. MPEG-4 applications in mobile devices is one such domain where the opposite goals namely low power and high throughput are required to be met. Efficient memory management plays a major role in reducing the power consumption. Specifically, efficient memory management for VOPs is difficult because the lifetimes of these objects vary and these life times may be overlapping. Varying life times of the objects requires dynamic memory management where memory fragmentation is a key problem that needs to be addressed. In general, memory management systems address this problem by following a combination of strategy, policy and mechanism. For MPEG4 based mobile devices that lack instruction processors, a hardware based memory management solution is necessary. In MPEG4 based mobile devices that have a RISC processor, using a Real time operating system (RTOS) for this memory management task is not expected to be efficient because the strategies and policies used by the ROTS is often tuned for handling memory segments of smaller sizes compared to object sizes. Hence, a memory management scheme specifically tuned for VOPs is important. In this paper, different strategies, policies and mechanisms for memory management are considered and an efficient combination is proposed for the case of VOP memory management along with a hardware architecture, which can handle the proposed combination.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Forming-free and self-rectifying resistive switching of the simple Pt/TaOx/n-Si structure for access device-free high-density memory application

NASA Astrophysics Data System (ADS)

Gao, Shuang; Zeng, Fei; Li, Fan; Wang, Minjuan; Mao, Haijun; Wang, Guangyue; Song, Cheng; Pan, Feng

2015-03-01

The search for self-rectifying resistive memories has aroused great attention due to their potential in high-density memory applications without additional access devices. Here we report the forming-free and self-rectifying bipolar resistive switching behavior of a simple Pt/TaOx/n-Si tri-layer structure. The forming-free phenomenon is attributed to the generation of a large amount of oxygen vacancies, in a TaOx region that is in close proximity to the TaOx/n-Si interface, via out-diffusion of oxygen ions from TaOx to n-Si. A maximum rectification ratio of ~6 × 102 is obtained when the Pt/TaOx/n-Si devices stay in a low resistance state, which originates from the existence of a Schottky barrier between the formed oxygen vacancy filament and the n-Si electrode. More importantly, numerical simulation reveals that the self-rectifying behavior itself can guarantee a maximum crossbar size of 212 × 212 (~44 kbit) on the premise of 10% read margin. Moreover, satisfactory switching uniformity and retention performance are observed based on this simple tri-layer structure. All of these results demonstrate the great potential of this simple Pt/TaOx/n-Si tri-layer structure for access device-free high-density memory applications.The search for self-rectifying resistive memories has aroused great attention due to their potential in high-density memory applications without additional access devices. Here we report the forming-free and self-rectifying bipolar resistive switching behavior of a simple Pt/TaOx/n-Si tri-layer structure. The forming-free phenomenon is attributed to the generation of a large amount of oxygen vacancies, in a TaOx region that is in close proximity to the TaOx/n-Si interface, via out-diffusion of oxygen ions from TaOx to n-Si. A maximum rectification ratio of ~6 × 102 is obtained when the Pt/TaOx/n-Si devices stay in a low resistance state, which originates from the existence of a Schottky barrier between the formed oxygen vacancy filament and the n-Si electrode. More importantly, numerical simulation reveals that the self-rectifying behavior itself can guarantee a maximum crossbar size of 212 × 212 (~44 kbit) on the premise of 10% read margin. Moreover, satisfactory switching uniformity and retention performance are observed based on this simple tri-layer structure. All of these results demonstrate the great potential of this simple Pt/TaOx/n-Si tri-layer structure for access device-free high-density memory applications. Electronic supplementary information (ESI) available. See DOI: 10.1039/c4nr06406b

TaOx-based resistive switching memories: prospective and challenges

PubMed Central

2013-01-01

Resistive switching memories (RRAMs) are attractive for replacement of conventional flash in the future. Although different switching materials have been reported; however, low-current operated devices (<100 μA) are necessary for productive RRAM applications. Therefore, TaOx is one of the prospective switching materials because of two stable phases of TaO2 and Ta2O5, which can also control the stable low- and high-resistance states. Long program/erase endurance and data retention at high temperature under low-current operation are also reported in published literature. So far, bilayered TaOx with inert electrodes (Pt and/or Ir) or single layer TaOx with semi-reactive electrodes (W and Ti/W or Ta/Pt) is proposed for real RRAM applications. It is found that the memory characteristics at current compliance (CC) of 80 μA is acceptable for real application; however, data are becoming worst at CC of 10 μA. Therefore, it is very challenging to reduce the operation current (few microampere) of the RRAM devices. This study investigates the switching mode, mechanism, and performance of low-current operated TaOx-based devices as compared to other RRAM devices. This topical review will not only help for application of TaOx-based nanoscale RRAM devices but also encourage researcher to overcome the challenges in the future production. PMID:24107610

Fast, Capacious Disk Memory Device

NASA Technical Reports Server (NTRS)

Muller, Ronald M.

1990-01-01

Device for recording digital data on, and playing back data from, memory disks has high recording or playback rate and utilizes available recording area more fully. Two disks, each with own reading/writing head, used to record data at same time. Head on disk A operates on one of tracks numbered from outside in; head on disk B operates on track of same number in sequence from inside out. Underlying concept of device applicable to magnetic or optical disks.

Thickness effect of nickel oxide thin films on associated solution-processed write-once-read-many-times memory devices

NASA Astrophysics Data System (ADS)

Wang, Xiao Lin; Liu, Zhen; Wen, Chao; Liu, Yang; Wang, Hong Zhe; Chen, T. P.; Zhang, Hai Yan

2018-06-01

With self-prepared nickel acetate based solution, NiO thin films with different thicknesses have been fabricated by spin coating followed by thermal annealing. By forming a two-terminal Ag/NiO/ITO structure on glass, write-once-read-many-times (WORM) memory devices are realized. The WORM memory behavior is based on a permanent switching from an initial high-resistance state (HRS) to an irreversible low-resistance state (LRS) under the application of a writing voltage, due to the formation of a solid bridge across Ag and ITO electrodes by conductive filaments (CFs). The memory performance is investigated as a function of the NiO film thickness, which is determined by the number of spin-coated NiO layers. For devices with 4 and 6 NiO layers, data retention up to 104 s and endurance of 103 reading operations in the measurement range have been obtained with memory window maintained above four orders for both HRS and LRS. Before and after writing, the devices show the hopping and ohmic conduction behaviors, respectively, confirming that the CF formation could be the mechanism responsible for writing in the WORM memory devices.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

NASA Astrophysics Data System (ADS)

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-07-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

Monolayer optical memory cells based on artificial trap-mediated charge storage and release

NASA Astrophysics Data System (ADS)

Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min

2017-03-01

Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

NASA Astrophysics Data System (ADS)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Low-power resistive random access memory by confining the formation of conducting filaments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, Yi-Jen; Lee, Si-Chen, E-mail: sclee@ntu.edu.tw; Shen, Tzu-Hsien

2016-06-15

Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiO{sub x}/silver nanoparticles/TiO{sub x}/AlTiO{sub x}, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistancemore » state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiO{sub x} layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.« less

4D Printing of Shape Memory-Based Personalized Endoluminal Medical Devices.

PubMed

Zarek, Matt; Mansour, Nicola; Shapira, Shir; Cohn, Daniel

2017-01-01

The convergence of additive manufacturing and shape-morphing materials is promising for the advancement of personalized medical devices. The capability to transform 3D objects from one shape to another, right off the print bed, is known as 4D printing. Shape memory thermosets can be tailored to have a range of thermomechanical properties favorable to medical devices, but processing them is a challenge because they are insoluble and do not flow at any temperature. This study presents here a strategy to capitalize on a series of medical imaging modalities to construct a printable shape memory endoluminal device, exemplified by a tracheal stent. A methacrylated polycaprolactone precursor with a molecular weight of 10 000 g mol -1 is printed with a UV-LED stereolithography printer based on anatomical data. This approach converges with the zeitgeist of personalized medicine and it is anticipated that it will broadly expand the application of shape memory-exhibiting biomedical devices to myriad clinical indications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Hierarchically Self-Assembled Block Copolymer Blends for Templating Hollow Phase-Change Nanostructures with an Extremely Low Switching Current

DOE PAGES

Park, Woon Ik; Kim, Jong Min; Jeong, Jae Won; ...

2015-03-17

Phase change memory (PCM) is one of the most promising candidates for next-generation nonvolatile memory devices because of its high speed, excellent reliability, and outstanding scalability. But, the high switching current of PCM devices has been a critical hurdle to realize low-power operation. Although one solution is to reduce the switching volume of the memory, the resolution limit of photolithography hinders further miniaturization of device dimensions. Here, we employed unconventional self-assembly geometries obtained from blends of block copolymers (BCPs) to form ring-shaped hollow PCM nanostructures with an ultrasmall contact area between a phase-change material (Ge 2Sb 2Te 5) and amore » heater (TiN) electrode. The high-density (approximately 0.1 terabits per square inch) PCM nanoring arrays showed extremely small switching current of 2-3 mu A. Furthermore, the relatively small reset current of the ring-shaped PCM compared to the pillar-shaped devices is attributed to smaller switching volume, which is well supported by electro-thermal simulation results. Our approach may also be extended to other nonvolatile memory device applications such as resistive switching memory and magnetic storage devices, where the control of nanoscale geometry can significantly affect device performances.« less

Realization of Minimum and Maximum Gate Function in Ta2O5-based Memristive Devices

NASA Astrophysics Data System (ADS)

Breuer, Thomas; Nielen, Lutz; Roesgen, Bernd; Waser, Rainer; Rana, Vikas; Linn, Eike

2016-04-01

Redox-based resistive switching devices (ReRAM) are considered key enablers for future non-volatile memory and logic applications. Functionally enhanced ReRAM devices could enable new hardware concepts, e.g. logic-in-memory or neuromorphic applications. In this work, we demonstrate the implementation of ReRAM-based fuzzy logic gates using Ta2O5 devices to enable analogous Minimum and Maximum operations. The realized gates consist of two anti-serially connected ReRAM cells offering two inputs and one output. The cells offer an endurance up to 106 cycles. By means of exemplary input signals, each gate functionality is verified and signal constraints are highlighted. This realization could improve the efficiency of analogous processing tasks such as sorting networks in the future.

Memory characteristics of metal-oxide-semiconductor structures based on Ge nanoclusters-embedded GeO(x) films grown at low temperature.

PubMed

Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng

2012-03-01

The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.

The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V. A. L.

2013-02-01

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics.The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics. Electronic supplementary information (ESI) available: UV-vis spectrum of Au nanoparticle aqueous solution, transfer characteristics of the transistors without inserting an Au nanoparticle monolayer, AFM image of the pentacene layer, transfer characteristics at different program voltages and memory windows with respect to the P/E voltage. See DOI: 10.1039/c2nr32579a

High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

2017-08-01

Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

High‐Performance Nonvolatile Organic Field‐Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers

PubMed Central

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn

2017-01-01

Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619

Realization of reliable solid-state quantum memory for photonic polarization qubit.

PubMed

Zhou, Zong-Quan; Lin, Wei-Bin; Yang, Ming; Li, Chuan-Feng; Guo, Guang-Can

2012-05-11

Faithfully storing an unknown quantum light state is essential to advanced quantum communication and distributed quantum computation applications. The required quantum memory must have high fidelity to improve the performance of a quantum network. Here we report the reversible transfer of photonic polarization states into collective atomic excitation in a compact solid-state device. The quantum memory is based on an atomic frequency comb (AFC) in rare-earth ion-doped crystals. We obtain up to 0.999 process fidelity for the storage and retrieval process of single-photon-level coherent pulse. This reliable quantum memory is a crucial step toward quantum networks based on solid-state devices.

Nonvolatile Memory Technology for Space Applications

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

2010-01-01

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

NASA Astrophysics Data System (ADS)

Sahay, Shubham; Suri, Manan

2017-12-01

This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

NASA Astrophysics Data System (ADS)

Ghoneim, M. T.; Hussain, M. M.

2015-08-01

Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

Configurable memory system and method for providing atomic counting operations in a memory device

DOEpatents

Bellofatto, Ralph E.; Gara, Alan G.; Giampapa, Mark E.; Ohmacht, Martin

2010-09-14

A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

Amorphous blue phase III polymer scaffold as a sub-millisecond switching electro-optical memory device

NASA Astrophysics Data System (ADS)

Gandhi, Sahil Sandesh; Kim, Min Su; Hwang, Jeoung-Yeon; Chien, Liang-Chy

2017-02-01

We demonstrate the application of the nanostructured scaffold of BPIII as a resuable EO device that retains the BPIII ordering and sub-millisecond EO switching characteristics, that is, "EO-memory" of the original BPIII even after removal of the cholesteric blue phase liquid crystal (LC) and subsequent refilling with different nematic LCs. We also fabricate scaffolds mimicking the isotropic phase and cubic blue phase I (BPI) to demonstrate the versatility of our material system to nano-engineer EO-memory scaffolds of various structures. We envisage that this work will promote new experimental investigations of the mysterious BPIII and the development of novel device architectures and optically functional nanomaterials.

Nonvolatile floating gate organic memory device based on pentacene/CdSe quantum dot heterojuction

NASA Astrophysics Data System (ADS)

Shin, Ik-Soo; Kim, Jung-Min; Jeun, Jun-Ho; Yoo, Seok-Hyun; Ge, Ziyi; Hong, Jong-In; Ho Bang, Jin; Kim, Yong-Sang

2012-04-01

An organic floating-gate memory device using CdSe quantum dots (QDs) as a charge-trapping element was fabricated. CdSe QDs were localized beneath a pentacene without any tunneling insulator, and the QD layer played a role as hole-trapping sites. The band bending formed at the junction between pentacene and QD layers inhibited back-injection of holes trapped in CdSe into pentacene, which appeared as a hysteretic capacitance-voltage response during the operation of the device. Nearly, 60% of trapped charge was sustained even after 104 s in programmed state, and this long retention time can be potentially useful in practical applications of non-volatile memory.

SRAM Based Re-programmable FPGA for Space Applications

NASA Technical Reports Server (NTRS)

Wang, J. J.; Sun, J. S.; Cronquist, B. E.; McCollum, J. L.; Speers, T. M.; Plants, W. C.; Katz, R. B.

1999-01-01

An SRAM (static random access memory)-based reprogrammable FPGA (field programmable gate array) is investigated for space applications. A new commercial prototype, named the RS family, was used as an example for the investigation. The device is fabricated in a 0.25 micrometers CMOS technology. Its architecture is reviewed to provide a better understanding of the impact of single event upset (SEU) on the device during operation. The SEU effect of different memories available on the device is evaluated. Heavy ion test data and SPICE simulations are used integrally to extract the threshold LET (linear energy transfer). Together with the saturation cross-section measurement from the layout, a rate prediction is done on each memory type. The SEU in the configuration SRAM is identified as the dominant failure mode and is discussed in detail. The single event transient error in combinational logic is also investigated and simulated by SPICE. SEU mitigation by hardening the memories and employing EDAC (error detection and correction) at the device level are presented. For the configuration SRAM (CSRAM) cell, the trade-off between resistor de-coupling and redundancy hardening techniques are investigated with interesting results. Preliminary heavy ion test data show no sign of SEL (single event latch-up). With regard to ionizing radiation effects, the increase in static leakage current (static I(sub CC)) measured indicates a device tolerance of approximately 50krad(Si).

Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response

NASA Astrophysics Data System (ADS)

Clark, Lawrence T.; Holbert, Keith E.; Adams, James W.; Navale, Harshad; Anderson, Blake C.

2015-12-01

Flash memory is an essential part of systems used in harsh environments, experienced by both terrestrial and aerospace TID applications. This paper presents studies of COTS flash memory TID hardness. While there is substantial literature on flash memory TID response, this work focuses for the first time on 1.5 transistor per cell flash memory. The experimental results show hardness varying from about 100 krad(Si) to over 250 krad(Si) depending on the usage model. We explore the circuit and device aspects of the results, based on the extensive reliability literature for this flash memory type. Failure modes indicate both device damage and circuit marginalities. Sector erase failure limits, but read only operation allows TID exceeding 200 krad(Si). The failures are analyzed by type.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

PubMed Central

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-01-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

Capacitance-voltage measurement in memory devices using ferroelectric polymer

NASA Astrophysics Data System (ADS)

Nguyen, Chien A.; Lee, Pooi See

2006-01-01

Application of thin polymer film as storing mean for non-volatile memory devices is investigated. Capacitance-voltage (C-V) measurement of metal-ferroelectric-metal device using ferroelectric copolymer P(VDF-TrFE) as dielectric layer shows stable 'butter-fly' curve. The two peaks in C-V measurement corresponding to the largest capacitance are coincidental at the coercive voltages that give rise to zero polarization in the polarization hysteresis measurement. By comparing data of C-V and P-E measurement, a correlation between two types of hysteresis is established in which it reveals simultaneous electrical processes occurring inside the device. These processes are caused by the response of irreversible and reversible polarization to the applied electric field that can be used to present a memory window. The memory effect of ferroelectric copolymer is further demonstrated for fabricating polymeric non-volatile memory devices using metal-ferroelectric-insulator-semiconductor structure (MFIS). By applying different sweeping voltages at the gate, bidirectional flat-band voltage shift is observed in the ferroelectric capacitor. The asymmetrical shift after negative sweeping is resulted from charge accumulation at the surface of Si substrate caused by the dipole direction in the polymer layer. The effect is reversed for positive voltage sweeping.

Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Hao; Han, Lili; Lin, Peng

Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less

Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor

DOE PAGES

Jiang, Hao; Han, Lili; Lin, Peng; ...

2016-06-23

Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Recent progress in tungsten oxides based memristors and their neuromorphological applications

NASA Astrophysics Data System (ADS)

Qu, Bo; Younis, Adnan; Chu, Dewei

2016-09-01

The advance in conventional silicon based semiconductor industry is now becoming indeterminacy as it still along the road of Moore's Law and concomitant problems associated with it are the emergence of a number of practical issues such as short channel effect. In terms of memory applications, it is generally believed that transistors based memory devices will approach to their scaling limits up to 2018. Therefore, one of the most prominent challenges today in semiconductor industry is the need of a new memory technology which is able to combine the best characterises of current devices. The resistive switching memories which are regarded as "memristors" thus gain great attentions thanks to their specific nonlinear electrical properties. More importantly, their behaviour resembles with the transmission characteristic of synapse in biology. Therefore, the research of synapses biomimetic devices based on memristor will certainly bring a great research prospect in studying synapse emulation as well as building artificial neural networks. Tungsten oxides (WO x ) exhibits many essential characteristics as a great candidate for memristive devices including: accredited endurance (over 105 cycles), stoichiometric flexibility, complimentary metal-oxide-semiconductor (CMOS) process compatibility and configurable properties including non-volatile rectification, memorization and learning functions. Herein, recent progress on Tungsten oxide based materials and its associating memory devices had been reviewed. The possible implementation of this material as a bio-inspired artificial synapse is also highlighted. The penultimate section summaries the current research progress for tungsten oxide based biological synapses and end up with several proposals that have been suggested for possible future developments.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung

Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while themore » electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research.« less

Radiation Effects of Commercial Resistive Random Access Memories

NASA Technical Reports Server (NTRS)

Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

2014-01-01

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

Interventional Application of Shape Memory Polymer Foam Final Report CRADA No. TC-02067-03

DOE Office of Scientific and Technical Information (OSTI.GOV)

Maitland, D.; Metzger, M. F.

This was a collaborative effort between The Regents of the University of California, Lawrence Livermore National Laboratory (LLNL) and Sierra Interventions, LLC, to develop shape memory polymer foam devices for treating hemorrhagic stroke.

Electrically Variable Resistive Memory Devices

NASA Technical Reports Server (NTRS)

Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.

2010-01-01

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Rapid recovery from transient faults in the fault-tolerant processor with fault-tolerant shared memory

NASA Technical Reports Server (NTRS)

Harper, Richard E.; Butler, Bryan P.

1990-01-01

The Draper fault-tolerant processor with fault-tolerant shared memory (FTP/FTSM), which is designed to allow application tasks to continue execution during the memory alignment process, is described. Processor performance is not affected by memory alignment. In addition, the FTP/FTSM incorporates a hardware scrubber device to perform the memory alignment quickly during unused memory access cycles. The FTP/FTSM architecture is described, followed by an estimate of the time required for channel reintegration.

Rapid thermal responsive conductive hybrid cryogels with shape memory properties, photothermal properties and pressure dependent conductivity.

PubMed

Deng, Zexing; Guo, Yi; Ma, Peter X; Guo, Baolin

2018-09-15

Stimuli responsive cryogels with multi-functionality have potential application for electrical devices, actuators, sensors and biomedical devices. However, conventional thermal sensitive poly(N-isopropylacrylamide) cryogels show slow temperature response speed and lack of multi-functionality, which greatly limit their practical application. Herein we present conductive fast (2 min for both deswelling and reswelling behavior) thermally responsive poly(N-isopropylacrylamide) cryogels with rapid shape memory properties (3 s for shape recovery), near-infrared (NIR) light sensitivity and pressure dependent conductivity, and further demonstrated their applications as temperature sensitive on-off switch, NIR light sensitive on-off switch, water triggered shape memory on-off switch and pressure dependent device. These cryogels were first prepared in dimethyl sulfoxide below its melting temperature in ice bath and subsequently put into aniline or pyrrole solution to in situ deposition of conducting polyaniline or polypyrrole nanoparticles. The continuous macroporous sponge-like structure provides cryogels with rapid responsivity both in deswelling, reswelling kinetics and good elasticity. After incorporating electrically conductive polyaniline or polypyrrole nanoaggregates, the hybrid cryogels exhibit desirable conductivity, photothermal property, pressure dependent conductivity and good cytocompatibility. These multifunctional hybrid cryogels make them great potential as stimuli responsive electrical device, tissue engineering scaffolds, drug delivery vehicle and electronic skin. Copyright © 2018 Elsevier Inc. All rights reserved.

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures

NASA Astrophysics Data System (ADS)

Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H.; Seo, Sunae; Chung, U.-In; Yoo, In-Kyeong; Kim, Kinam

2011-08-01

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaOx-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 1012. Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Quantum memories: emerging applications and recent advances

NASA Astrophysics Data System (ADS)

Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.

2016-11-01

Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.

Quantum memories: emerging applications and recent advances.

PubMed

Heshami, Khabat; England, Duncan G; Humphreys, Peter C; Bustard, Philip J; Acosta, Victor M; Nunn, Joshua; Sussman, Benjamin J

2016-11-12

Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.

Quantum memories: emerging applications and recent advances

PubMed Central

Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.

2016-01-01

Quantum light–matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories. PMID:27695198

Designing Multi-Channel Web Frameworks for Cultural Tourism Applications: The MUSE Case Study.

ERIC Educational Resources Information Center

Garzotto, Franca; Salmon, Tullio; Pigozzi, Massimiliano

A framework for the design of multi-channel (MC) applications in the cultural tourism domain is presented. Several heterogeneous interface devices are supported including location-sensitive mobile units, on-site stationary devices, and personalized CDs that extend the on-site experience beyond the visit time thanks to personal memories gathered…

Multilevel Resistance Programming in Conductive Bridge Resistive Memory

NASA Astrophysics Data System (ADS)

Mahalanabis, Debayan

This work focuses on the existence of multiple resistance states in a type of emerging non-volatile resistive memory device known commonly as Programmable Metallization Cell (PMC) or Conductive Bridge Random Access Memory (CBRAM), which can be important for applications such as multi-bit memory as well as non-volatile logic and neuromorphic computing. First, experimental data from small signal, quasi-static and pulsed mode electrical characterization of such devices are presented which clearly demonstrate the inherent multi-level resistance programmability property in CBRAM devices. A physics based analytical CBRAM compact model is then presented which simulates the ion-transport dynamics and filamentary growth mechanism that causes resistance change in such devices. Simulation results from the model are fitted to experimental dynamic resistance switching characteristics. The model designed using Verilog-a language is computation-efficient and can be integrated with industry standard circuit simulation tools for design and analysis of hybrid circuits involving both CMOS and CBRAM devices. Three main circuit applications for CBRAM devices are explored in this work. Firstly, the susceptibility of CBRAM memory arrays to single event induced upsets is analyzed via compact model simulation and experimental heavy ion testing data that show possibility of both high resistance to low resistance and low resistance to high resistance transitions due to ion strikes. Next, a non-volatile sense amplifier based flip-flop architecture is proposed which can help make leakage power consumption negligible by allowing complete shutdown of power supply while retaining its output data in CBRAM devices. Reliability and energy consumption of the flip-flop circuit for different CBRAM low resistance levels and supply voltage values are analyzed and compared to CMOS designs. Possible extension of this architecture for threshold logic function computation using the CBRAM devices as re-configurable resistive weights is also discussed. Lastly, Spike timing dependent plasticity (STDP) based gradual resistance change behavior in CBRAM device fabricated in back-end-of-line on a CMOS die containing integrate and fire CMOS neuron circuits is demonstrated for the first time which indicates the feasibility of using CBRAM devices as electronic synapses in spiking neural network hardware implementations for non-Boolean neuromorphic computing.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Investigation of multilayer magnetic domain lattice file

NASA Technical Reports Server (NTRS)

Torok, E. J.; Kamin, M.; Tolman, C. H.

1980-01-01

The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.

Direct Observation of Conducting Filaments in Tungsten Oxide Based Transparent Resistive Switching Memory.

PubMed

Qian, Kai; Cai, Guofa; Nguyen, Viet Cuong; Chen, Tupei; Lee, Pooi See

2016-10-05

Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO 3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/-0.42 V), and long retention time (>10 4 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive memory devices.

Optically Addressable, Ferroelectric Memory With NDRO

NASA Technical Reports Server (NTRS)

Thakoor, Sarita

1994-01-01

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

Emerging Applications for High K Materials in VLSI Technology

PubMed Central

Clark, Robert D.

2014-01-01

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

A High-Performance Optical Memory Array Based on Inhomogeneity of Organic Semiconductors.

PubMed

Pei, Ke; Ren, Xiaochen; Zhou, Zhiwen; Zhang, Zhichao; Ji, Xudong; Chan, Paddy Kwok Leung

2018-03-01

Organic optical memory devices keep attracting intensive interests for diverse optoelectronic applications including optical sensors and memories. Here, flexible nonvolatile optical memory devices are developed based on the bis[1]benzothieno[2,3-d;2',3'-d']naphtho[2,3-b;6,7-b']dithiophene (BBTNDT) organic field-effect transistors with charge trapping centers induced by the inhomogeneity (nanosprouts) of the organic thin film. The devices exhibit average mobility as high as 7.7 cm 2 V -1 s -1 , photoresponsivity of 433 A W -1 , and long retention time for more than 6 h with a current ratio larger than 10 6 . Compared with the standard floating gate memory transistors, the BBTNDT devices can reduce the fabrication complexity, cost, and time. Based on the reasonable performance of the single device on a rigid substrate, the optical memory transistor is further scaled up to a 16 × 16 active matrix array on a flexible substrate with operating voltage less than 3 V, and it is used to map out 2D optical images. The findings reveal the potentials of utilizing [1]benzothieno[3,2-b][1]benzothiophene (BTBT) derivatives as organic semiconductors for high-performance optical memory transistors with a facile structure. A detailed study on the charge trapping mechanism in the derivatives of BTBT materials is also provided, which is closely related to the nanosprouts formed inside the organic active layer. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Properties and medical applications of shape memory alloys.

PubMed

Tarniţă, Daniela; Tarniţă, D N; Bîzdoacă, N; Mîndrilă, I; Vasilescu, Mirela

2009-01-01

One of the most known intelligent material is nitinol, which offers many functional advantages over conventional implantable alloys. Applications of SMA to the biomedical field have been successful because of their functional qualities, enhancing both the possibility and the execution of less invasive surgeries. The biocompatibility of these alloys is one of their most important features. Different applications exploit the shape memory effect (one-way or two-way) and the super elasticity, so that they can be employed in orthopedic and cardiovascular applications, as well as in the manufacture of new surgical tools. Therefore, one can say that smart materials, especially SMA, are becoming noticeable in the biomedical field. Super elastic NiTi has become a material of strategic importance as it allows to overcome a wide range of technical and design issues relating to the miniaturization of medical devices and the increasing trend for less invasive and therefore less traumatic procedures. This paper will consider just why the main properties of shape memory alloys hold so many opportunities for medical devices and will review a selection of current applications.

Camera memory study for large space telescope. [charge coupled devices

NASA Technical Reports Server (NTRS)

Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

1975-01-01

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Exploiting heat treatment effects on SMAs macro and microscopic properties in developing fire protection devices

NASA Astrophysics Data System (ADS)

Burlacu, L.; Cimpoeşu, N.; Bujoreanu, L. G.; Lohan, N. M.

2017-08-01

Ni-Ti shape memory alloys (SMAs) are intelligent alloys which demonstrate unique properties, such as shape memory effect, two-way shape memory effect, super-elasticity and vibration damping which, accompanied by good processability, excellent corrosion resistance and biocompatibility as well as fair wear resistance and cyclic stability, enabled the development of important industrial applications (such as sensors, actuators, fasteners, couplings and valves), medical applications (such as stents, bone implants, orthodontic archwires, minimal invasive surgical equipment) as well as environmental health and safety devices (anti-seismic dampers, fire safety devices). The phase transitions in Ni-Ti SMAs are strongly influenced by processing methods, chemical compositions and thermomechanical history. This paper presents a study of the effects of heat treatment on the mechanical and thermal properties of commercial Ni-Ti shape memory alloy (SMA). The experimental work involved subjecting a SMA rod to heat-treatment consisting in heating up to 500°C, 10 minutes-maintaining and water quenching. Mechanical properties were highlighted by microhardness tests while thermal characteristics were emphasized by differential scanning calorimetry (DSC). The presence of chemical composition fluctuations was checked by X-ray energy dispersive spectroscopy performed with an EDAX Bruker analyzer.

A memristor-based nonvolatile latch circuit

NASA Astrophysics Data System (ADS)

Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-06-01

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Towards Scalable Graph Computation on Mobile Devices.

PubMed

Chen, Yiqi; Lin, Zhiyuan; Pienta, Robert; Kahng, Minsuk; Chau, Duen Horng

2014-10-01

Mobile devices have become increasingly central to our everyday activities, due to their portability, multi-touch capabilities, and ever-improving computational power. Such attractive features have spurred research interest in leveraging mobile devices for computation. We explore a novel approach that aims to use a single mobile device to perform scalable graph computation on large graphs that do not fit in the device's limited main memory, opening up the possibility of performing on-device analysis of large datasets, without relying on the cloud. Based on the familiar memory mapping capability provided by today's mobile operating systems, our approach to scale up computation is powerful and intentionally kept simple to maximize its applicability across the iOS and Android platforms. Our experiments demonstrate that an iPad mini can perform fast computation on large real graphs with as many as 272 million edges (Google+ social graph), at a speed that is only a few times slower than a 13″ Macbook Pro. Through creating a real world iOS app with this technique, we demonstrate the strong potential application for scalable graph computation on a single mobile device using our approach.

Towards Scalable Graph Computation on Mobile Devices

PubMed Central

Chen, Yiqi; Lin, Zhiyuan; Pienta, Robert; Kahng, Minsuk; Chau, Duen Horng

2015-01-01

Mobile devices have become increasingly central to our everyday activities, due to their portability, multi-touch capabilities, and ever-improving computational power. Such attractive features have spurred research interest in leveraging mobile devices for computation. We explore a novel approach that aims to use a single mobile device to perform scalable graph computation on large graphs that do not fit in the device's limited main memory, opening up the possibility of performing on-device analysis of large datasets, without relying on the cloud. Based on the familiar memory mapping capability provided by today's mobile operating systems, our approach to scale up computation is powerful and intentionally kept simple to maximize its applicability across the iOS and Android platforms. Our experiments demonstrate that an iPad mini can perform fast computation on large real graphs with as many as 272 million edges (Google+ social graph), at a speed that is only a few times slower than a 13″ Macbook Pro. Through creating a real world iOS app with this technique, we demonstrate the strong potential application for scalable graph computation on a single mobile device using our approach. PMID:25859564

Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa

Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygenmore » and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.« less

Design and Verification of a Shape Memory Polymer Peripheral Occlusion Device

PubMed Central

Landsman, Todd L.; Bush, Ruth L.; Glowczwski, Alan; Horn, John; Jessen, Staci L.; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R.; Hasan, Sayyeda M.; Nash, Daniel; Clubb, Fred J.; Maitland, Duncan J.

2017-01-01

Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. PMID:27419615

Design and verification of a shape memory polymer peripheral occlusion device.

PubMed

Landsman, Todd L; Bush, Ruth L; Glowczwski, Alan; Horn, John; Jessen, Staci L; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R; Hasan, Sayyeda M; Nash, Daniel; Clubb, Fred J; Maitland, Duncan J

2016-10-01

Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. Copyright © 2016 Elsevier Ltd. All rights reserved.

Evolutionary Metal Oxide Clusters for Novel Applications: Toward High-Density Data Storage in Nonvolatile Memories.

PubMed

Chen, Xiaoli; Zhou, Ye; Roy, Vellaisamy A L; Han, Su-Ting

2018-01-01

Because of current fabrication limitations, miniaturizing nonvolatile memory devices for managing the explosive increase in big data is challenging. Molecular memories constitute a promising candidate for next-generation memories because their properties can be readily modulated through chemical synthesis. Moreover, these memories can be fabricated through mild solution processing, which can be easily scaled up. Among the various materials, polyoxometalate (POM) molecules have attracted considerable attention for use as novel data-storage nodes for nonvolatile memories. Here, an overview of recent advances in the development of POMs for nonvolatile memories is presented. The general background knowledge of the structure and property diversity of POMs is also summarized. Finally, the challenges and perspectives in the application of POMs in memories are discussed. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Evaluation of switchable organic devices for nonvolatile memory applications

NASA Astrophysics Data System (ADS)

Campbell Scott, J.

2007-03-01

Many organic electronic devices exhibit switching behavior and have therefore been proposed as the basis for a nonvolatile memory technology. In particular, bistable resistive elements, in which a high or low current state is selected by application of a specific voltage, may be used as the elements of a crosspoint memory array. This architecture places very stringent requirements on the electrical response of the individual devices, in terms of on-state current density, switching and retention times, cycling endurance, rectification and size-scaling. In this talk, I will describe the progress that we and others have made towards satisfying these requirements. In many cases, the mechanisms responsible for conduction and switching are not fully understood. In some devices, it has been shown that current flows in a few highly localized regions. These so-called ``filaments'' are not necessarily metallic bridges between the electrodes, but may be associated with chains of nanoparticles introduced into the organic matrix either deliberately or accidentally. Coulomb blockade effects can then explain the switching behavior observed in some devices. This work was done in collaboration with L. D. Bozano, M. Beinhoff, K. R. Carter, V. R. Deline, B. W. Kean, G. M. McClelland, D. C. Miller, P. M. Rice, J. R. Salem, and S. A. Swanson.

High-speed noise-free optical quantum memory

NASA Astrophysics Data System (ADS)

Kaczmarek, K. T.; Ledingham, P. M.; Brecht, B.; Thomas, S. E.; Thekkadath, G. S.; Lazo-Arjona, O.; Munns, J. H. D.; Poem, E.; Feizpour, A.; Saunders, D. J.; Nunn, J.; Walmsley, I. A.

2018-04-01

Optical quantum memories are devices that store and recall quantum light and are vital to the realization of future photonic quantum networks. To date, much effort has been put into improving storage times and efficiencies of such devices to enable long-distance communications. However, less attention has been devoted to building quantum memories which add zero noise to the output. Even small additional noise can render the memory classical by destroying the fragile quantum signatures of the stored light. Therefore, noise performance is a critical parameter for all quantum memories. Here we introduce an intrinsically noise-free quantum memory protocol based on two-photon off-resonant cascaded absorption (ORCA). We demonstrate successful storage of GHz-bandwidth heralded single photons in a warm atomic vapor with no added noise, confirmed by the unaltered photon-number statistics upon recall. Our ORCA memory meets the stringent noise requirements for quantum memories while combining high-speed and room-temperature operation with technical simplicity, and therefore is immediately applicable to low-latency quantum networks.

Low operation voltage and high thermal stability of a WSi2 nanocrystal memory device using an Al2O3/HfO2/Al2O3 tunnel layer

NASA Astrophysics Data System (ADS)

Uk Lee, Dong; Jun Lee, Hyo; Kyu Kim, Eun; You, Hee-Wook; Cho, Won-Ju

2012-02-01

A WSi2 nanocrystal nonvolatile memory device was fabricated with an Al2O3/HfO2/Al2O3 (AHA) tunnel layer and its electrical characteristics were evaluated at 25, 50, 70, 100, and 125 °C. The program/erase (P/E) speed at 125 °C was approximately 500 μs under threshold voltage shifts of 1 V during voltage sweeping of 8 V/-8 V. When the applied pulse voltage was ±9 V for 1 s for the P/E conditions, the memory window at 125 °C was approximately 1.25 V after 105 s. The activation energies for the charge losses of 5%, 10%, 15%, 20%, 25%, 30%, and 35% were approximately 0.05, 0.11, 0.17, 0.21, 0.23, 0.23, and 0.23 eV, respectively. The charge loss mechanisms were direct tunneling and Pool-Frenkel emission between the WSi2 nanocrystals and the AHA barrier engineered tunneling layer. The WSi2 nanocrystal memory device with multi-stacked high-K tunnel layers showed strong potential for applications in nonvolatile memory devices.

Spin-transfer torque switched magnetic tunnel junctions in magnetic random access memory

NASA Astrophysics Data System (ADS)

Sun, Jonathan Z.

2016-10-01

Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.

Transparent resistive switching memory using aluminum oxide on a flexible substrate

NASA Astrophysics Data System (ADS)

Yeom, Seung-Won; Shin, Sang-Chul; Kim, Tan-Young; Ha, Hyeon Jun; Lee, Yun-Hi; Shim, Jae Won; Ju, Byeong-Kwon

2016-02-01

Resistive switching memory (ReRAM) has attracted much attention in recent times owing to its fast switching, simple structure, and non-volatility. Flexible and transparent electronic devices have also attracted considerable attention. We therefore fabricated an Al2O3-based ReRAM with transparent indium-zinc-oxide (IZO) electrodes on a flexible substrate. The device transmittance was found to be higher than 80% in the visible region (400-800 nm). Bended states (radius = 10 mm) of the device also did not affect the memory performance because of the flexibility of the two transparent IZO electrodes and the thin Al2O3 layer. The conduction mechanism of the resistive switching of our device was explained by ohmic conduction and a Poole-Frenkel emission model. The conduction mechanism was proved by oxygen vacancies in the Al2O3 layer, as analyzed by x-ray photoelectron spectroscopy analysis. These results encourage the application of ReRAM in flexible and transparent electronic devices.

Unipolar resistive switching behaviors and mechanisms in an annealed Ni/ZrO2/TaN memory device

NASA Astrophysics Data System (ADS)

Tsai, Tsung-Ling; Ho, Tsung-Han; Tseng, Tseung-Yuen

2015-01-01

The effects of Ni/ZrO2/TaN resistive switching memory devices without and with a 400 °C annealing process on switching properties are investigated. The devices exhibit unipolar resistive switching behaviors with low set and reset voltages because of a large amount of Ni diffusion with no reaction with ZrO2 after the annealing process, which is confirmed by ToF-SIMS and XPS analyses. A physical model based on a Ni filament is constructed to explain such phenomena. The device that undergoes the 400 °C annealing process exhibits an excellent endurance of more than 1.5  ×  104 cycles. The improvement can be attributed to the enhancement of oxygen ion migration along grain boundaries, which result in less oxygen ion consumption during the reset process. The device also performs good retention up to 105 s at 150 °C. Therefore, it has great potential for high-density nonvolatile memory applications.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

PubMed Central

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-01-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced. PMID:27834352

Role of Al2O3 thin layer on improving the resistive switching properties of Ta5Si3-based conductive bridge random accesses memory device

NASA Astrophysics Data System (ADS)

Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

2018-04-01

Ta5Si3-based conductive bridge random access memory (CBRAM) devices have been investigated to improve their resistive switching characteristics for their application in future nonvolatile memory technology. Changes in the switching characteristics by the addition of a thin Al2O3 layer of different thicknesses at the bottom electrode interface of a Ta5Si3-based CBRAM devices have been studied. The double-layer device with a 1 nm Al2O3 layer has shown improved resistive switching characteristics over the single layer one with a high on/off resistance ratio of 102, high endurance of more than 104 cycles, and good retention for more than 105 s at the temperature of 130 °C. The higher thermal conductivity of Al2O3 over Ta5Si3 has been attributed to the enhanced switching properties of the double-layer devices.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic.

PubMed

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-11

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

NASA Astrophysics Data System (ADS)

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature.

PubMed

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-11-22

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

PubMed Central

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-01-01

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer.

PubMed

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V A L

2013-03-07

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al(2)O(3)) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al(2)O(3) dielectric layer) could be potentially integrated with large area flexible electronics.

Ultralow Power Consumption Flexible Biomemristors.

PubMed

Kim, Min-Kyu; Lee, Jang-Sik

2018-03-28

Low power consumption is the important requirement in memory devices for saving energy. In particular, improved energy efficiency is essential in implantable electronic devices for operation under a limited power supply. Here, we demonstrate the use of κ-carrageenan (κ-car) as the resistive switching layer to achieve memory that has low power consumption. A carboxymethyl (CM) group is introduced to the κ-car to increase its ionic conductivity. Ag was doped in CM:κ-car to improve the resistive switching properties of the devices. Memory devices based on Ag-doped CM:κ-car showed electroforming-free resistive switching. This device exhibited low reset voltage (∼0.05 V), fast switching speed (50 ns), and high on/off ratio (>10 3 ) under low compliance current (10 -5 A). Its power consumption (∼0.35 μW) is much lower than those of the previously reported biomemristors. The resistive switching may be a result of an electrochemical redox process and Ag filament formation in the CM:κ-car under an electric field. This biopolymer memory can also be fabricated on flexible substrate. This study verifies the feasibility of using biopolymers for applications to future implantable and biocompatible nanoelectronics.

Matrix-addressed analog ferroelectric memory

NASA Astrophysics Data System (ADS)

Lemons, R. A.; Grogan, J. K.; Thompson, J. S.

1980-08-01

A matrix addressed analog memory which uses multiple ferroelectric domain walls to address columns of words, is demonstrated. It is shown that the analog information is stored as a pattern in the metallization on the surface of the crystal, making a read-only memory. The pattern is done photolithographically in a way compatible with the simultaneous fabrication of many devices. Attention is given to the performance results, noting that the advantage of the device is that analog information can be stored with a high density in a single mask step. Finally, it is shown that potential applications are in systems which require repetitive output from a limited vocabulary of spoken words.

Anatomy of filamentary threshold switching in amorphous niobium oxide.

PubMed

Li, Shuai; Liu, Xinjun; Nandi, Sanjoy Kumar; Elliman, Robert Glen

2018-06-25

The threshold switching behaviour of Pt/NbOx/TiN devices is investigated as a function device area and NbOx film thickness and shown to reveal important insight into the structure of the self-assembled switching region. The devices exhibit combined selector-memory (1S1R) behavior after an initial voltage-controlled forming process, but exhibit symmetric threshold switching when the RESET and SET currents are kept below a critical value. In this mode, the threshold and hold voltages are independent of the device area and film thickness but the threshold current (power), while independent of device area, decreases with increasing film thickness. These results are shown to be consistent with a structure in which the threshold switching volume is confined, both laterally and vertically, to the region between the residual memory filament and the TiN electrode, and where the memory filament has a core-shell structure comprising a metallic core and a semiconducting shell. The veracity of this structure is demonstrated by comparing experimental results with the predictions of a simple circuit model, and more detailed finite element simulations. These results provide further insight into the structure and operation of NbOx threshold switching devices that have application in emerging memory and neuromorphic computing fields. © 2018 IOP Publishing Ltd.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Lanthanum Gadolinium Oxide: A New Electronic Device Material for CMOS Logic and Memory Devices

PubMed Central

Pavunny, Shojan P.; Scott, James F.; Katiyar, Ram S.

2014-01-01

A comprehensive study on the ternary dielectric, LaGdO3, synthesized and qualified in our laboratory as a novel high-k dielectric material for logic and memory device applications in terms of its excellent features that include a high linear dielectric constant (k) of ~22 and a large energy bandgap of ~5.6 eV, resulting in sufficient electron and hole band offsets of ~2.57 eV and ~1.91 eV, respectively, on silicon, good thermal stability with Si and lower gate leakage current densities within the International Technology Roadmap for Semiconductors (ITRS) specified limits at the sub-nanometer electrical functional thickness level, which are desirable for advanced complementary metal-oxide-semiconductor (CMOS), bipolar (Bi) and BiCMOS chips applications, is presented in this review article. PMID:28788589

Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

PubMed Central

Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

2015-01-01

We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

Multifunctional shape-memory polymers.

PubMed

Behl, Marc; Razzaq, Muhammad Yasar; Lendlein, Andreas

2010-08-17

The thermally-induced shape-memory effect (SME) is the capability of a material to change its shape in a predefined way in response to heat. In shape-memory polymers (SMP) this shape change is the entropy-driven recovery of a mechanical deformation, which was obtained before by application of external stress and was temporarily fixed by formation of physical crosslinks. The high technological significance of SMP becomes apparent in many established products (e.g., packaging materials, assembling devices, textiles, and membranes) and the broad SMP development activities in the field of biomedical as well as aerospace applications (e.g., medical devices or morphing structures for aerospace vehicles). Inspired by the complex and diverse requirements of these applications fundamental research is aiming at multifunctional SMP, in which SME is combined with additional functions and is proceeding rapidly. In this review different concepts for the creation of multifunctionality are derived from the various polymer network architectures of thermally-induced SMP. Multimaterial systems, such as nanocomposites, are described as well as one-component polymer systems, in which independent functions are integrated. Future challenges will be to transfer the concept of multifunctionality to other emerging shape-memory technologies like light-sensitive SMP, reversible shape changing effects or triple-shape polymers.

Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

PubMed

Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

2017-10-11

The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer

NASA Astrophysics Data System (ADS)

Zheng, Zhiwei; Huo, Zongliang; Zhang, Manhong; Zhu, Chenxin; Liu, Jing; Liu, Ming

2011-10-01

This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer. In comparison to a memory capacitor with a single HfO2 trapping layer, the erase speed of a memory capacitor with a stacked HfO2/Ta2O5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔVFB = 4 V, the device with a stacked HfO2/Ta2O5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO2/Ta2O5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application.

Controllable SET process in O-Ti-Sb-Te based phase change memory for synaptic application

NASA Astrophysics Data System (ADS)

Ren, Kun; Li, Ruiheng; Chen, Xin; Wang, Yong; Shen, Jiabin; Xia, Mengjiao; Lv, Shilong; Ji, Zhenguo; Song, Zhitang

2018-02-01

The nonlinear resistance change and small bit resolution of phase change memory (PCM) under identical operation pulses will limit its performance as a synaptic device. The octahedral Ti-Te units in Ti-Sb-Te, regarded as nucleation seeds, are degenerated when Ti is bonded with O, causing a slower crystallization and a controllable SET process in PCM cells. A linear resistance change under identical pulses, a resolution of ˜8 bits, and an ON/OFF ratio of ˜102 has been achieved in O-Ti-Sb-Te based PCM, showing its potential application as a synaptic device to improve recognition performance of the neural network.

Improvement of Bipolar Switching Properties of Gd:SiOx RRAM Devices on Indium Tin Oxide Electrode by Low-Temperature Supercritical CO2 Treatment.

PubMed

Chen, Kai-Huang; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Liang, Shu-Ping; Young, Tai-Fa; Syu, Yong-En; Sze, Simon M

2016-12-01

Bipolar switching resistance behaviors of the Gd:SiO2 resistive random access memory (RRAM) devices on indium tin oxide electrode by the low-temperature supercritical CO2-treated technology were investigated. For physical and electrical measurement results obtained, the improvement on oxygen qualities, properties of indium tin oxide electrode, and operation current of the Gd:SiO2 RRAM devices were also observed. In addition, the initial metallic filament-forming model analyses and conduction transferred mechanism in switching resistance properties of the RRAM devices were verified and explained. Finally, the electrical reliability and retention properties of the Gd:SiO2 RRAM devices for low-resistance state (LRS)/high-resistance state (HRS) in different switching cycles were also measured for applications in nonvolatile random memory devices.

Novel nano materials for high performance logic and memory devices

NASA Astrophysics Data System (ADS)

Das, Saptarshi

After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the device area -- in this way ultimately improving the packing density and leading towards high performance memory devices.

Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

PubMed

Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-05-01

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

NASA Astrophysics Data System (ADS)

Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

2003-05-01

Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

PubMed Central

Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang

2012-01-01

This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording. PMID:22666012

Effect of oxide insertion layer on resistance switching properties of copper phthalocyanine

NASA Astrophysics Data System (ADS)

Joshi, Nikhil G.; Pandya, Nirav C.; Joshi, U. S.

2013-02-01

Organic memory device showing resistance switching properties is a next-generation of the electrical memory unit. We have investigated the bistable resistance switching in current-voltage (I-V) characteristics of organic diode based on copper phthalocyanine (CuPc) film sandwiched between aluminum (Al) electrodes. Pronounced hysteresis in the I-V curves revealed a resistance switching with on-off ratio of the order of 85%. In order to control the charge injection in the CuPc, nanoscale indium oxide buffer layer was inserted to form Al/CuPc/In2O3/Al device. Analysis of I-V measurements revealed space charge limited switching conduction at the Al/CuPc interface. The traps in the organic layer and charge blocking by oxide insertion layer have been used to explain the absence of resistance switching in the oxide buffer layered memory device cell. Present study offer potential applications for CuPc organic semiconductor in low power non volatile resistive switching memory and logic circuits.

Electrical latching of microelectromechanical devices

DOEpatents

Garcia, Ernest J.; Sleefe, Gerard E.

2004-11-02

Methods are disclosed for row and column addressing of an array of microelectromechanical (MEM) devices. The methods of the present invention are applicable to MEM micromirrors or memory elements and allow the MEM array to be programmed and maintained latched in a programmed state with a voltage that is generally lower than the voltage required for electrostatically switching the MEM devices.

Hafnia-based resistive switching devices for non-volatile memory applications and effects of gamma irradiation on device performance

NASA Astrophysics Data System (ADS)

Arun, N.; Kumar, K. Vinod; Pathak, A. P.; Avasthi, D. K.; Nageswara Rao, S. V. S.

2018-04-01

Non-volatile memory (NVM) devices were fabricated as a Metal- Insulator-Metal (MIM) structures by sandwiching Hafnium dioxide (HfO2) thin film in between two metal electrodes. The top and bottom metal electrodes were deposited by using the thermal evaporation, and the oxide layer was deposited by using the RF magnetron sputtering technique. The Resistive Random Access Memory (RRAM) device structures such as Ag/HfO2/Au/Si were fabricated and I-V characteristics for the pristine and gamma-irradiated devices with a dose 24 kGy were measured. Further we have studied the thermal annealing effects, in the range of 100°-400°C in a tubular furnace for the HfO2/Au/Si samples. The X-ray diffraction (XRD), Rutherford Backscattering Spectrometry (RBS), field emission-scanning electron microscopy (FESEM) analysis measurements were performed to determine the thickness, crystallinity and stoichiometry of these films. The electrical characteristics such as resistive switching, endurance, retention time and switching speed were measured by a semiconductor device analyser. The effects of gamma irradiation on the switching properties of these RRAM devices have been studied.

Review of multi-layered magnetoelectric composite materials and devices applications

NASA Astrophysics Data System (ADS)

Chu, Zhaoqiang; PourhosseiniAsl, MohammadJavad; Dong, Shuxiang

2018-06-01

Multiferroic materials with the coexistence of at least two ferroic orders, such as ferroelectricity, ferromagnetism, or ferroelasticity, have recently attracted ever-increasing attention due to their potential for multifunctional device applications, including magnetic and current sensors, energy harvesters, magnetoelectric (ME) random access memory and logic devices, tunable microwave devices, and ME antenna. In this article, we provide a review of the recent and ongoing research efforts in the field of multi-layered ME composites. After a brief introduction to ME composites and ME coupling mechanisms, we review recent advances in multi-layered ME composites as well as their device applications based on the direct ME effect, magnetic sensors in particular. Finally, some remaining challenges and future perspective of ME composites and their engineering applications will be discussed.

Transferable and flexible label-like macromolecular memory on arbitrary substrates with high performance and a facile methodology.

PubMed

Lai, Ying-Chih; Hsu, Fang-Chi; Chen, Jian-Yu; He, Jr-Hau; Chang, Ting-Chang; Hsieh, Ya-Ping; Lin, Tai-Yuan; Yang, Ying-Jay; Chen, Yang-Fang

2013-05-21

A newly designed transferable and flexible label-like organic memory based on a graphene electrode behaves like a sticker, and can be readily placed on desired substrates or devices for diversified purposes. The memory label reveals excellent performance despite its physical presentation. This may greatly extend the memory applications in various advanced electronics and provide a simple scheme to integrate with other electronics. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Towards Low-Cost Effective and Homogeneous Thermal Activation of Shape Memory Polymers

PubMed Central

Lantada, Andrés Díaz; Rebollo, María Ángeles Santamaría

2013-01-01

A typical limitation of intelligent devices based on the use of shape-memory polymers as actuators is linked to the widespread use of distributed heating resistors, via Joule effect, as activation method, which involves several relevant issues needing attention, such as: (a) Final device size is importantly increased due to the additional space required for the resistances; (b) the use of resistances limits materials’ strength and the obtained devices are normally weaker; (c) the activation process through heating resistances is not homogeneous, thus leading to important temperature differences among the polymeric structure and to undesirable thermal gradients and stresses, also limiting the application fields of shape-memory polymers. In our present work we describe interesting activation alternatives, based on coating shape-memory polymers with different kinds of conductive materials, including textiles, conductive threads and conductive paint, which stand out for their easy, rapid and very cheap implementation. Distributed heating and homogeneous activation can be achieved in several of the alternatives studied and the technical results are comparable to those obtained by using advanced shape-memory nanocomposites, which have to deal with complex synthesis, processing and security aspects. Different combinations of shape memory epoxy resin with several coating electrotextiles, conductive films and paints are prepared, simulated with the help of thermal finite element method based resources and characterized using infrared thermography for validating the simulations and overall design process. A final application linked to an active catheter pincer is detailed and the advantages of using distributed heating instead of conventional resistors are discussed. PMID:28788401

Responsive Biomaterials: Advances in Materials Based on Shape-Memory Polymers.

PubMed

Hardy, John G; Palma, Matteo; Wind, Shalom J; Biggs, Manus J

2016-07-01

Shape-memory polymers (SMPs) are morphologically responsive materials with potential for a variety of biomedical applications, particularly as devices for minimally invasive surgery and the delivery of therapeutics and cells for tissue engineering. A brief introduction to SMPs is followed by a discussion of the current progress toward the development of SMP-based biomaterials for clinically relevant biomedical applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Non-volatile memory for checkpoint storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.

A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, themore » non-volatile memory is a pluggable flash memory card.« less

Opportunity of spinel ferrite materials in nonvolatile memory device applications based on their resistive switching performances.

PubMed

Hu, Wei; Qin, Ni; Wu, Guangheng; Lin, Yanting; Li, Shuwei; Bao, Dinghua

2012-09-12

The opportunity of spinel ferrites in nonvolatile memory device applications has been demonstrated by the resistive switching performance characteristics of a Pt/NiFe(2)O(4)/Pt structure, such as low operating voltage, high device yield, long retention time (up to 10(5) s), and good endurance (up to 2.2 × 10(4) cycles). The dominant conduction mechanisms are Ohmic conduction in the low-resistance state and in the lower-voltage region of the high-resistance state and Schottky emission in the higher-voltage region of the high-resistance state. On the basis of measurements of the temperature dependence of the resistances and magnetic properties in different resistance states, we explain the physical mechanism of resistive switching of Pt/NiFe(2)O(4)/Pt devices using the model of formation and rupture of conducting filaments by considering the thermal effect of oxygen vacancies and changes in the valences of cations due to the redox effect.

Thermal annealing and temperature dependences of memory effect in organic memory transistor

NASA Astrophysics Data System (ADS)

Ren, X. C.; Wang, S. M.; Leung, C. W.; Yan, F.; Chan, P. K. L.

2011-07-01

We investigate the annealing and thermal effects of organic non-volatile memory with floating silver nanoparticles by real-time transfer curve measurements. During annealing, the memory window shows shrinkage of 23% due to structural variation of the nanoparticles. However, by increasing the device operating temperature from 20 to 90 °C after annealing, the memory window demonstrates an enlargement up to 100%. The differences in the thermal responses are explained and confirmed by the co-existence of electron and hole traps. Our findings provide a better understanding of organic memory performances under various operating temperatures and validate their applications for temperature sensing or thermal memories.

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

NASA Astrophysics Data System (ADS)

Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

2014-05-01

Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

Comparison of resistive switching characteristics using copper and aluminum electrodes on GeOx/W cross-point memories

PubMed Central

2013-01-01

Comparison of resistive switching memory characteristics using copper (Cu) and aluminum (Al) electrodes on GeOx/W cross-points has been reported under low current compliances (CCs) of 1 nA to 50 μA. The cross-point memory devices are observed by high-resolution transmission electron microscopy (HRTEM). Improved memory characteristics are observed for the Cu/GeOx/W structures as compared to the Al/GeOx/W cross-points owing to AlOx formation at the Al/GeOx interface. The RESET current increases with the increase of the CCs varying from 1 nA to 50 μA for the Cu electrode devices, while the RESET current is high (>1 mA) and independent of CCs varying from 1 nA to 500 μA for the Al electrode devices. An extra formation voltage is needed for the Al/GeOx/W devices, while a low operation voltage of ±2 V is needed for the Cu/GeOx/W cross-point devices. Repeatable bipolar resistive switching characteristics of the Cu/GeOx/W cross-point memory devices are observed with CC varying from 1 nA to 50 μA, and unipolar resistive switching is observed with CC >100 μA. High resistance ratios of 102 to 104 for the bipolar mode (CCs of 1 nA to 50 μA) and approximately 108 for the unipolar mode are obtained for the Cu/GeOx/W cross-points. In addition, repeatable switching cycles and data retention of 103 s are observed under a low current of 1 nA for future low-power, high-density, nonvolatile, nanoscale memory applications. PMID:24305116

Ferroelectric FET for nonvolatile memory application with two-dimensional MoSe2 channels

NASA Astrophysics Data System (ADS)

Wang, Xudong; Liu, Chunsen; Chen, Yan; Wu, Guangjian; Yan, Xiao; Huang, Hai; Wang, Peng; Tian, Bobo; Hong, Zhenchen; Wang, Yutao; Sun, Shuo; Shen, Hong; Lin, Tie; Hu, Weida; Tang, Minghua; Zhou, Peng; Wang, Jianlu; Sun, Jinglan; Meng, Xiangjian; Chu, Junhao; Li, Zheng

2017-06-01

Graphene and other two-dimensional materials have received considerable attention regarding their potential applications in nano-electronics. Here, we report top-gate nonvolatile memory field-effect transistors (FETs) with different layers of MoSe2 nanosheets channel gated by ferroelectric film. The conventional gate dielectric of FETs was replaced by a ferroelectric thin film that provides a ferroelectric polarization electric field, and therefore defined as an Fe-FET where the poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) was used as the gate dielectric. Among the devices with MoSe2 channels of different thicknesses, the device with a single layer of MoSe2 exhibited a large hysteresis of electronic transport with an over 105 write/erase ratio, and displayed excellent retention and endurance performance. The possible mechanism of the device’s good properties was qualitatively analyzed using band theory. Additionally, a comprehensive study comparing the memory properties of MoSe2 channels of different thicknesses is presented. Increasing the numbers of MoSe2 layers was found to cause a reduced memory window. However, MoSe2 thickness of 5 nm yielded a write/erase ratio of more than 103. The results indicate that, based on a Fe-FET structure, the combination of two-dimensional semiconductors and organic ferroelectric gate dielectrics shows good promise for future applications in nonvolatile ferroelectric memory.

Elucidation and Optimization of Resistive Random Access Memory Switching Behavior for Advanced Computing Applications

NASA Astrophysics Data System (ADS)

Alamgir, Zahiruddin

RRAM has recently emerged as a strong candidate for non-volatile memory (NVM). Beyond memory applications, RRAM holds promise for use in performing logic functions, mimicking neuromorphic activities, enabling multi-level switching, and as one of the key elements of hardware based encryption or signal processing systems. It has been shown previously that RRAM resistance levels can be changed by adjusting compliance current or voltage level. This characteristic makes RRAM suitable for use in setting the synaptic weight in neuromorphic computing circuits. RRAM is also considered as a key element in hardware encryption systems, to produce unique and reproducible signals. However, a key challenge to implement RRAM in these applications is significant cycle to cycle performance variability. We sought to develop RRAM that can be tuned to different resistance levels gradually, with high reliability, and low variability. To achieve this goal, we focused on elucidating the conduction mechanisms underlying the resistive switching behavior for these devices. Electrical conduction mechanisms were determined by curve fitting I-V data using different current conduction equations. Temperature studies were also performed to corroborate these data. It was found that Schottky barrier height and width modulation was one of the key parameters that could be tuned to achieve different resistance levels, and for switching resistance states, primarily via oxygen vacancy movement. Oxygen exchange layers with different electronegativity were placed between top electrode and the oxide layer of TaOx devices to determine the effect of oxygen vacancy concentrations and gradients in these devices. It was found that devices with OELs with lower electronegativity tend to yield greater separation in the OFF vs. ON state resistance levels. As an extension of this work, TaOx based RRAM with Hf as the OEL was fabricated and could be tuned to different resistance level using pulse width and height modulation, yielding excellent uniformity and reliability. These findings improve our understanding of conduction within TaO x-based RRAM devices, providing a physical basis for switching in these devices. The value of this work lies in the demonstration of devices with excellent performance and demonstrated devices constitute a significant step toward real-world applications.

Super non-linear RRAM with ultra-low power for 3D vertical nano-crossbar arrays.

PubMed

Luo, Qing; Xu, Xiaoxin; Liu, Hongtao; Lv, Hangbing; Gong, Tiancheng; Long, Shibing; Liu, Qi; Sun, Haitao; Banerjee, Writam; Li, Ling; Gao, Jianfeng; Lu, Nianduan; Liu, Ming

2016-08-25

Vertical crossbar arrays provide a cost-effective approach for high density three-dimensional (3D) integration of resistive random access memory. However, an individual selector device is not allowed to be integrated with the memory cell separately. The development of V-RRAM has impeded the lack of satisfactory self-selective cells. In this study, we have developed a high performance bilayer self-selective device using HfO2 as the memory switching layer and a mixed ionic and electron conductor as the selective layer. The device exhibits high non-linearity (>10(3)) and ultra-low half-select leakage (<0.1 pA). A four layer vertical crossbar array was successfully demonstrated based on the developed self-selective device. High uniformity, ultra-low leakage, sub-nA operation, self-compliance, and excellent read/write disturbance immunity were achieved. The robust array level performance shows attractive potential for low power and high density 3D data storage applications.

Bipolar resistive switching in graphene oxide based metal insulator metal structure for non-volatile memory applications

NASA Astrophysics Data System (ADS)

Singh, Rakesh; Kumar, Ravi; Kumar, Anil; Kashyap, Rajesh; Kumar, Mukesh; Kumar, Dinesh

2018-05-01

Graphene oxide based devices have attracted much attention recently because of their possible application in next generation electronic devices. In this study, bipolar resistive switching characteristics of graphene oxide based metal insulator metal structure were investigated for nonvolatile memories. The graphene oxide was prepared by the conventional Hummer's method and deposited on ITO coated glass by spin-coating technique. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament inside the graphene oxide. The conduction mechanism for low and high resistance states are dominated by two mechanism the ohmic conduction and space charge limited current (SCLC) mechanism, respectively. Atomic Force Microscopy, X-ray diffraction, Cyclic-Voltammetry were conducted to observe the morphology, structure and behavior of the material. The fabricated device with Al/GO/ITO structure exhibited reliable bipolar resistive switching with set & reset voltage of -2.3 V and 3V respectively.

Photonic Diagnostic Technique For Thin Photoactive Films

NASA Technical Reports Server (NTRS)

Thakoor, Sarita

1996-01-01

Photonic diagnostic technique developed for use in noninvasive, rapid evaluation of thin paraelectric/ferroelectric films. Method proves useful in basic research, on-line monitoring for quality control at any stage of fabrication, and development of novel optoelectronic systems. Used to predict imprint-prone memory cells, and to study time evolution of defects in ferroelectric memories during processing. Plays vital role in enabling high-density ferroelectric memory manufacturing. One potential application lies in use of photoresponse for nondestructive readout of polarization memory states in high-density, high-speed memory devices. In another application, extension of basic concept of method makes possible to develop specially tailored ferrocapacitor to act as programmable detector, wherein remanent polarization used to modulate photoresponse. Large arrays of such detectors useful in optoelectronic processing, computing, and communication.

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

Temperature induced complementary switching in titanium oxide resistive random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Panda, D., E-mail: dpanda@nist.edu; Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan; Simanjuntak, F. M.

2016-07-15

On the way towards high memory density and computer performance, a considerable development in energy efficiency represents the foremost aspiration in future information technology. Complementary resistive switch consists of two antiserial resistive switching memory (RRAM) elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption. Here we present a titanium oxide based complementary RRAM (CRRAM) device with Pt top and TiN bottom electrode. A subsequent post metal annealing at 400°C induces CRRAM. Forming voltage of 4.3 V is required for this device tomore » initiate switching process. The same device also exhibiting bipolar switching at lower compliance current, Ic <50 μA. The CRRAM device have high reliabilities. Formation of intermediate titanium oxi-nitride layer is confirmed from the cross-sectional HRTEM analysis. The origin of complementary switching mechanism have been discussed with AES, HRTEM analysis and schematic diagram. This paper provides valuable data along with analysis on the origin of CRRAM for the application in nanoscale devices.« less

Organic-Inorganic Hybrid Halide Perovskites for Memories, Transistors, and Artificial Synapses.

PubMed

Choi, Jaeho; Han, Ji Su; Hong, Kootak; Kim, Soo Young; Jang, Ho Won

2018-05-30

Fascinating characteristics of halide perovskites (HPs), which cannot be seen in conventional semiconductors and metal oxides, have boosted the application of HPs in electronic devices beyond optoelectronics such as solar cells, photodetectors, and light-emitting diodes. Here, recent advances in HP-based memory and logic devices such as resistive-switching memories (i.e., resistive random access memory (RRAM) or memristors), transistors, and artificial synapses are reviewed, focusing on inherently exotic properties of HPs: i) tunable bandgap, ii) facile majority carrier control, iii) fast ion migration, and iv) superflexibility. Various fabrication techniques of HP thin films from solution-based methods to vacuum processes are introduced. Up-to-date work in the field, emphasizing the compositional flexibility of HPs, suggest that HPs are promising candidates for next-generation electronic devices. Taking advantages of their unique electrical properties, low-cost and low-temperature synthesis, and compositional and mechanical flexibility, HPs have enormous potential to provide a new platform for future electronic devices and explosively intensive studies will pave the way in finding new HP materials beyond conventional silicon-based semiconductors to keep up with "More-than-Moore" times. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Quantifying data retention of perpendicular spin-transfer-torque magnetic random access memory chips using an effective thermal stability factor method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Thomas, Luc, E-mail: luc.thomas@headway.com; Jan, Guenole; Le, Son

The thermal stability of perpendicular Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) devices is investigated at chip level. Experimental data are analyzed in the framework of the Néel-Brown model including distributions of the thermal stability factor Δ. We show that in the low error rate regime important for applications, the effect of distributions of Δ can be described by a single quantity, the effective thermal stability factor Δ{sub eff}, which encompasses both the median and the standard deviation of the distributions. Data retention of memory chips can be assessed accurately by measuring Δ{sub eff} as a function of device diameter andmore » temperature. We apply this method to show that 54 nm devices based on our perpendicular STT-MRAM design meet our 10 year data retention target up to 120 °C.« less

Printing an ITO-free flexible poly (4-vinylphenol) resistive switching device

NASA Astrophysics Data System (ADS)

Ali, Junaid; Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Aziz, Shahid; Choi, Kyung Hyun

2018-02-01

Resistive switching in a sandwich structure of silver (Ag)/Polyvinyl phenol (PVP)/carbon nanotube (CNTs)-silver nanowires (AgNWs) coated on a flexible PET substrate is reported in this work. Densely populated networks of one dimensional nano materials (1DNM), CNTs-AgNWs have been used as the conductive bottom electrode with the prominent features of high flexibility and low sheet resistance of 90 Ω/sq. Thin, yet uniform active layer of PVP was deposited on top of the spin coated 1DNM thin film through state of the art printing technique of electrohydrodynamic atomization (EHDA) with an average thickness of 170 ± 28 nm. Ag dots with an active area of ∼0.1 mm2 were deposited through roll to plate printing system as the top electrodes to complete the device fabrication of flexible memory device. Our memory device exhibited suitable electrical characteristics with OFF/ON ratio of 100:1, retention time of 60 min and electrical endurance for 100 voltage sweeps without any noticeable decay in performance. The resistive switching characteristics at a low current compliance of 3 nA were also evaluated for the application of low power consumption. This memory device is flexible and can sustain more than 100 bending cycles at a bending diameter of 2 cm with stable HRS and LRS values. Our proposed device shows promise to be used as a future potential nonvolatile memory device in flexible electronics.

Scoliosis correction with shape-memory metal: results of an experimental study.

PubMed

Wever, D J; Elstrodt, J A; Veldhuizen, A G; v Horn, J R

2002-04-01

The biocompatibility and functionality of a new scoliosis correction device, based on the properties of the shape-memory metal nickel-titanium alloy, were studied. With this device, the shape recovery forces of a shape-memory metal rod are used to achieve a gradual three-dimensional scoliosis correction. In the experimental study the action of the new device was inverted: the device was used to induce a scoliotic curve instead of correcting one. Surgical procedures were performed in six pigs. An originally curved squared rod, in the cold condition, was straightened and fixed to the spine with pedicle screws. Peroperatively, the memory effect of the rod was activated by heating the rod to 50 degrees C by a low-voltage, high-frequency current. After 3 and after 6 months the animals were sacrificed. The first radiographs, obtained immediately after surgery, showed in all animals an induced curve of about 40 degrees Cobb angle - the original curve of the rod. This curve remained constant during the follow-up. The postoperative serum nickel measurements were around the detection limit, and were not significantly higher compared to the preoperative nickel concentration. Macroscopic inspection after 3 and 6 months showed that the device was almost overgrown with newly formed bone. Corrosion and fretting processes were not observed. Histologic examination of the sections of the surrounding tissues and sections of the lung, liver, spleen and kidney showed no evidence of a foreign body response. In view of the initiation of the scoliotic deformation, it is expected that the shape-memory metal based scoliosis correction device also has the capacity to correct a scoliotic curve. Moreover, it is expected that the new device will show good biocompatibility in clinical application. Extensive fatigue testing of the whole system should be performed before clinical trials are initiated.

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

2014-02-18

Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

Ion conduction in crystalline superionic solids and its applications

NASA Astrophysics Data System (ADS)

Chandra, Angesh

2014-06-01

Superionic solids an area of multidisciplinary research activity, incorporates to study the physical, chemical and technological aspects of rapid ion movements within the bulk of the special class of ionic materials. It is an emerging area of materials science, as these solids show tremendous technological scopes to develop wide variety of solid state electrochemical devices such as batteries, fuel cells, supercapacitors, sensors, electrochromic displays (ECDs), memories, etc. These devices have wide range of applicabilities viz. power sources for IC microchips to transport vehicles, novel sensors for controlling atmospheric pollution, new kind of memories for computers, smart windows/display panels, etc. The field grew with a rapid pace since then, especially with regards to designing new materials as well as to explore their device potentialities. Amongst the known superionic solids, fast Ag+ ion conducting crystalline solid electrolytes are attracted special attention due to their relatively higher room temperature conductivity as well as ease of materials handling/synthesis. Ion conduction in these electrolytes is very much interesting part of today. In the present review article, the ion conducting phenomenon and some device applications of crystalline/polycrystalline superionic solid electrolytes have been reviewed in brief. Synthesis and characterization tools have also been discussed in the present review article.

A review of the Z2-FET 1T-DRAM memory: Operation mechanisms and key parameters

NASA Astrophysics Data System (ADS)

Cristoloveanu, S.; Lee, K. H.; Parihar, M. S.; El Dirani, H.; Lacord, J.; Martinie, S.; Le Royer, C.; Barbe, J.-Ch.; Mescot, X.; Fonteneau, P.; Galy, Ph.; Gamiz, F.; Navarro, C.; Cheng, B.; Duan, M.; Adamu-Lema, F.; Asenov, A.; Taur, Y.; Xu, Y.; Kim, Y.-T.; Wan, J.; Bawedin, M.

2018-05-01

The band-modulation and sharp-switching mechanisms in Z2-FET device operated as a capacitorless 1T-DRAM memory are reviewed. The main parameters that govern the memory performance are discussed based on detailed experiments and simulations. This 1T-DRAM memory does not suffer from super-coupling effect and can be integrated in sub-10 nm thick SOI films. It offers low leakage current, high current margin, long retention, low operating voltage especially for programming, and high speed. The Z2-FET is suitable for embedded memory applications.

Coherent optical pulse sequencer for quantum applications.

PubMed

Hosseini, Mahdi; Sparkes, Ben M; Hétet, Gabriel; Longdell, Jevon J; Lam, Ping Koy; Buchler, Ben C

2009-09-10

The bandwidth and versatility of optical devices have revolutionized information technology systems and communication networks. Precise and arbitrary control of an optical field that preserves optical coherence is an important requisite for many proposed photonic technologies. For quantum information applications, a device that allows storage and on-demand retrieval of arbitrary quantum states of light would form an ideal quantum optical memory. Recently, significant progress has been made in implementing atomic quantum memories using electromagnetically induced transparency, photon echo spectroscopy, off-resonance Raman spectroscopy and other atom-light interaction processes. Single-photon and bright-optical-field storage with quantum states have both been successfully demonstrated. Here we present a coherent optical memory based on photon echoes induced through controlled reversible inhomogeneous broadening. Our scheme allows storage of multiple pulses of light within a chosen frequency bandwidth, and stored pulses can be recalled in arbitrary order with any chosen delay between each recalled pulse. Furthermore, pulses can be time-compressed, time-stretched or split into multiple smaller pulses and recalled in several pieces at chosen times. Although our experimental results are so far limited to classical light pulses, our technique should enable the construction of an optical random-access memory for time-bin quantum information, and have potential applications in quantum information processing.

Shape Memory Polymers for Body Motion Energy Harvesting and Self-Powered Mechanosensing.

PubMed

Liu, Ruiyuan; Kuang, Xiao; Deng, Jianan; Wang, Yi-Cheng; Wang, Aurelia C; Ding, Wenbo; Lai, Ying-Chih; Chen, Jun; Wang, Peihong; Lin, Zhiqun; Qi, H Jerry; Sun, Baoquan; Wang, Zhong Lin

2018-02-01

Growing demand in portable electronics raises a requirement to electronic devices being stretchable, deformable, and durable, for which functional polymers are ideal choices of materials. Here, the first transformable smart energy harvester and self-powered mechanosensation sensor using shape memory polymers is demonstrated. The device is based on the mechanism of a flexible triboelectric nanogenerator using the thermally triggered shape transformation of organic materials for effectively harvesting mechanical energy. This work paves a new direction for functional polymers, especially in the field of mechanosensation for potential applications in areas such as soft robotics, biomedical devices, and wearable electronics. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

NASA Technical Reports Server (NTRS)

Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

2001-01-01

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Preface to ISIF 2009 special issue of Journal of Applied Physics : science and technology of integrated functionalities.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Auciello, O.; Dey, S.; Paz de Araujo, C.

2011-05-01

The science and technology of ferroelectric thin films and their applications have attracted many researchers and experienced tremendous progress in the past 20 years. The recent worldwide increase in commercial applications of ferroelectric devices such as smart cards based on nonvolatile ferroelectric random access memories is a symbol of both the maturity and the acceptance of the technology. The 21st International Symposium on Integrated Ferroelectrics (ISIF 2009), held on September 22 to October 2, 2009 in Colorado Springs, CO, provided a forum for the academic and national laboratories research community and industry to present and share their new findings, achievements,more » and opinions on integrated ferroelectrics and their applications. The International Symposium on Integrated Ferroelectrics hosted the ISIF 2009. This was the first year where the ISIF held the conference in its new format under the name of International Symposium on Integrated Functionalities. The General Chairs of the ISIF in consultation with the Advisory Board and the ISIF community decided to revise the focus of the conference in order to broaden the scope to the science and technology of multifunctional materials and devices. This decision was taken in view that a new paradigm in materials, materials integration, and devices is emerging with a view to the development of a new generation of micro- and nanoscale multifunctional devices. The program included three plenary presentations on diverse topics such as 'The Role of Nonvolatile Memory in Ubiquitous Computing,' 'Ferroelectrics and High Density Memory Technology,' 'Nanoscale Ferroelectrics and Interfaces: Size Effects,' four tutorial lectures on diverse topics, such as 'Magnetic Memory Applications,' 'Ferroelectrics and Ferroelectric Devices,' 'Challenges for High-K Dielectrics on High Mobility Channels,' 'Solar Cell Materials,' one poster session, and eight oral sessions. Thanks to the great efforts made by the ISIF organization committee and the session chairs, the conference successfully achieved its objectives and the work presented reflected very well the most recent advances of integrated ferroelectrics and their applications, as well as advances in other areas related to the new theme of Integrated Functionalities. Many aspects of ferroelectric, piezoelectric, high-K dielectric, magnetic, and phase change materials, including the science and technology of these materials in thin film form, integration with other thin film materials (metals or oxide electrodes), and fabrication of micro- and nanostructures based on these heterostructure layers, and device architecture and physics, were addressed from the experimental point of view. Work on theory and computer simulations of the mentioned materials and devices were discussed also with a view to the promising applications to multifunctional devices. In addition, the ISIF 2009 featured discussions of alternative nonvolatile memory concepts and materials, such as phase change memories, research on multiferroics and magnetoelectric materials, ferroelectric photovoltaics, and new directions on the science of perovskites such as biomolecular/polarizable interfaces, and bio-ferroelectric and other oxide interfaces. Following the standard submission and peer review process of Journal of Applied Physics, the selected papers presented in ISIF 2009 in Colorado Springs are published in this special issue. We believe that the papers in this special issue represent the forefront contributions to ISIF 2009 in the various areas of fundamental and applied science of integrated ferroelectrics and functionalities and their applications. We would like to take this opportunity to thank the following organizations and companies for their support and sponsorship for ISIF 2009, namely: Aixact Systems GMBH, Radiant Technologies, Symetrix Corporation, and Taylor and Francis Publishers. We would also like to thank the conference and session chairs, advisory and organizing committee members for their hard work that resulted in a very successful ISIF 2009, now in its new future-looking modality of Integrated Functionalities.« less

Dual drain MOSFET detector for crosstie memory systems

NASA Astrophysics Data System (ADS)

Bluzer, N.

1985-03-01

This patent application, which discloses a circuit for detecting binary information in crosstie memory systems includes a dual drain MOSFET device having a single channel with a common source and an integrated, thin-film strip of magnetic material suitable for the storage and propagation of Bloch line-crosstie pairs acting as both a shift register and the device's gate. Current flowing through the device, in the absence of a magnetic field, is equally distributed to each drain; however, changing magnetic fields, normal to the plane of the device and generated by Bloch line-crosstie pairs in the strip, interact with the current such that a distribution imbalance exists and one drain or the other receives a disproportionate fraction of the current depending upon the direction of the magnetic field.

Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

NASA Astrophysics Data System (ADS)

Briggs, Benjamin D.

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

Frequency-controlled wireless shape memory polymer microactuator for drug delivery application.

PubMed

Zainal, M A; Ahmad, A; Mohamed Ali, M S

2017-03-01

This paper reports the wireless Shape-Memory-Polymer actuator operated by external radio frequency magnetic fields and its application in a drug delivery device. The actuator is driven by a frequency-sensitive wireless resonant heater which is bonded directly to the Shape-Memory-Polymer and is activated only when the field frequency is tuned to the resonant frequency of heater. The heater is fabricated using a double-sided Cu-clad Polyimide with much simpler fabrication steps compared to previously reported methods. The actuation range of 140 μm as the tip opening distance is achieved at device temperature 44 °C in 30 s using 0.05 W RF power. A repeatability test shows that the actuator's average maximum displacement is 110 μm and standard deviation of 12 μm. An experiment is conducted to demonstrate drug release with 5 μL of an acidic solution loaded in the reservoir and the device is immersed in DI water. The actuator is successfully operated in water through wireless activation. The acidic solution is released and diffused in water with an average release rate of 0.172 μL/min.

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

2014-11-04

Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

Light sensitivity of a one transistor-one capacitor memory cell when used as a micromirror actuator in projector applications

NASA Astrophysics Data System (ADS)

Huffman, James Douglas

2001-11-01

The most important issue facing the future business success of the Digital Micromirror Device or DMD™ produced by Texas Instruments is the cost of the actual device. As the business and consumer markets call for higher resolution displays, the array size will have to be increased to incorporate more pixels. The manufacturing costs associated with building these higher resolution displays follow an exponential relation with the number of pixels due to yield loss and reduced number of chips per silicon wafer. Each pixel is actuated by electrostatics that are provided by a memory cell that is built in the underlying silicon substrate. One way to decrease cost of the wafer is to change the memory cell architecture from a static random access configuration or SRAM to a dynamic random access configuration or DRAM. This change has the benefits of having fewer components per area and a lower metal density. This reduction in the component count and metal density has a dramatic effect on the yield of the memory array by reducing the particle sensitivity of the underlying cell. The main drawback to using a DRAM configuration in a display application is the light sensitivity of a charge storage device built in the silicon substrate. As the photons pass through the mechanical micromirrors and illuminate the DRAM cell, the effective electrostatic potential of the memory element used for the mirror actuation is reduced. This dissertation outlines the issues associated with the light sensitivity of a DRAM memory cell as the actuation element for a micromirror. The concept of charge depletion on a silicon capacitor due to recombination of photogenerated carriers is explored and experimentally verified. The effects of the reduced potential on the capacitor on the micromirror are also explored. Optical modeling is used to determine the incoming photon flux to determine the benefits of adding a charge recombination region as part of the DRAM memory cell. Several options are explored to reduce the effect of the incoming photons on the potential of the memory cell. The results will show that a 1T1C memory cell with N-type recombination regions and maximum light shielding is sufficient for a projector application.

Multipulse addressing of a Raman quantum memory: configurable beam splitting and efficient readout.

PubMed

Reim, K F; Nunn, J; Jin, X-M; Michelberger, P S; Champion, T F M; England, D G; Lee, K C; Kolthammer, W S; Langford, N K; Walmsley, I A

2012-06-29

Quantum memories are vital to the scalability of photonic quantum information processing (PQIP), since the storage of photons enables repeat-until-success strategies. On the other hand, the key element of all PQIP architectures is the beam splitter, which allows us to coherently couple optical modes. Here, we show how to combine these crucial functionalities by addressing a Raman quantum memory with multiple control pulses. The result is a coherent optical storage device with an extremely large time bandwidth product, that functions as an array of dynamically configurable beam splitters, and that can be read out with arbitrarily high efficiency. Networks of such devices would allow fully scalable PQIP, with applications in quantum computation, long distance quantum communications and quantum metrology.

A Supramolecular Nanofiber-Based Passive Memory Device for Remembering Past Humidity.

PubMed

Mogera, Umesha; Gedda, Murali; George, Subi J; Kulkarni, Giridhar U

2017-09-20

Memorizing the magnitude of a physical parameter such as relative humidity in a consignment may be useful for maintaining recommended conditions over a period of time. In relation to cost and energy considerations, it is important that the memorizing device works in the unpowered passive state. In this article, we report the fabrication of a humidity-responsive device that can memorize the humidity condition it had experienced while being unpowered. The device makes use of supramolecular nanofibers obtained from the self-assembly of donor-acceptor (D-A) molecules, coronene tetracarboxylate salt (CS) and dodecyl methyl viologen (DMV), respectively, from aqueous medium. The fibers, while being highly sensitive to humidity, tend to develop electrically induced disorder under constant voltage, leading to increased resistance with time. The conducting state can be regained via self-assembly by exposing the device to humidity in the absence of applied voltage, the extent of recovery depending on the magnitude of the humidity applied under no bias. This nature of the fibers has been exploited in reading the humidity memory state, which interestingly is independent of the lapsed time since the humidity exposure as well as the duration of exposure. Importantly, the device is capable of differentiating the profiles of varying humidity conditions from its memory. The device finds use in applications requiring stringent condition monitoring.

Direct Writing of Three-Dimensional Macroporous Photonic Crystals on Pressure-Responsive Shape Memory Polymers.

PubMed

Fang, Yin; Ni, Yongliang; Leo, Sin-Yen; Wang, Bingchen; Basile, Vito; Taylor, Curtis; Jiang, Peng

2015-10-28

Here we report a single-step direct writing technology for making three-dimensional (3D) macroporous photonic crystal patterns on a new type of pressure-responsive shape memory polymer (SMP). This approach integrates two disparate fields that do not typically intersect: the well-established templating nanofabrication and shape memory materials. Periodic arrays of polymer macropores templated from self-assembled colloidal crystals are squeezed into disordered arrays in an unusual shape memory "cold" programming process. The recovery of the original macroporous photonic crystal lattices can be triggered by direct writing at ambient conditions using both macroscopic and nanoscopic tools, like a pencil or a nanoindenter. Interestingly, this shape memory disorder-order transition is reversible and the photonic crystal patterns can be erased and regenerated hundreds of times, promising the making of reconfigurable/rewritable nanooptical devices. Quantitative insights into the shape memory recovery of collapsed macropores induced by the lateral shear stresses in direct writing are gained through fundamental investigations on important process parameters, including the tip material, the critical pressure and writing speed for triggering the recovery of the deformed macropores, and the minimal feature size that can be directly written on the SMP membranes. Besides straightforward applications in photonic crystal devices, these smart mechanochromic SMPs that are sensitive to various mechanical stresses could render important technological applications ranging from chromogenic stress and impact sensors to rewritable high-density optical data storage media.

Ultra Low Density Shape Memory Polymer Foams With Tunable Physicochemical Properties for Treatment of intracranial Aneurysms

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singhal, Pooja

Shape memory polymers (SMPs) are a rapidly emerging class of smart materials that can be stored in a deformed temporary shape, and can actively return to their original shape upon application of an external stimulus such as heat, pH or light. This behavior is particularly advantageous for minimally invasive biomedical applications comprising embolic/regenerative scaffolds, as it enables a transcatheter delivery of the device to the target site. The focus of this work was to exploit this shape memory behavior of polyurethanes, and develop an efficient embolic SMP foam device for the treatment of intracranial aneurysms.In summary, this work reports amore » novel family of ultra low density polymer foams which can be delivered via a minimally invasive surgery to the aneurysm site, actuated in a controlled manner to efficiently embolize the aneurysm while promoting physiological fluid/blood flow through the reticulated/open porous structure, and eventually biodegrade leading to complete healing of the vasculature.« less

Microgravity

NASA Image and Video Library

1999-11-10

Space Vacuum Epitaxy Center works with industry and government laboratories to develop advanced thin film materials and devices by utilizing the most abundant free resource in orbit: the vacuum of space. SVEC, along with its affiliates, is developing semiconductor mid-IR lasers for environmental sensing and defense applications, high efficiency solar cells for space satellite applications, oxide thin films for computer memory applications, and ultra-hard thin film coatings for wear resistance in micro devices. Performance of these vacuum deposited thin film materials and devices can be enhanced by using the ultra-vacuum of space for which SVEC has developed the Wake Shield Facility---a free flying research platform dedicated to thin film materials development in space.

Microgravity

NASA Image and Video Library

2000-11-10

Space Vacuum Epitaxy Center works with industry and government laboratories to develop advanced thin film materials and devices by utilizing the most abundant free resource in orbit: the vacuum of space. SVEC, along with its affiliates, is developing semiconductor mid-IR lasers for environmental sensing and defense applications, high efficiency solar cells for space satellite applications, oxide thin films for computer memory applications, and ultra-hard thin film coatings for wear resistance in micro devices. Performance of these vacuum deposited thin film materials and devices can be enhanced by using the ultra-vacuum of space for which SVEC has developed the Wake Shield Facility---a free flying research platform dedicated to thin film materials development in space.

Two-dimensional multiferroics in monolayer group IV monochalcogenides

NASA Astrophysics Data System (ADS)

Wang, Hua; Qian, Xiaofeng

2017-03-01

Low-dimensional multiferroic materials hold great promises in miniaturized device applications such as nanoscale transducers, actuators, sensors, photovoltaics, and nonvolatile memories. Here, using first-principles theory we predict that two-dimensional (2D) monolayer group IV monochalcogenides including GeS, GeSe, SnS, and SnSe are a class of 2D semiconducting multiferroics with giant strongly-coupled in-plane spontaneous ferroelectric polarization and spontaneous ferroelastic lattice strain that are thermodynamically stable at room temperature and beyond, and can be effectively modulated by elastic strain engineering. Their optical absorption spectra exhibit strong in-plane anisotropy with visible-spectrum excitonic gaps and sizable exciton binding energies, rendering the unique characteristics of low-dimensional semiconductors. More importantly, the predicted low domain wall energy and small migration barrier together with the coupled multiferroic order and anisotropic electronic structures suggest their great potentials for tunable multiferroic functional devices by manipulating external electrical, mechanical, and optical field to control the internal responses, and enable the development of four device concepts including 2D ferroelectric memory, 2D ferroelastic memory, and 2D ferroelastoelectric nonvolatile photonic memory as well as 2D ferroelectric excitonic photovoltaics.

Cryogenic Memories based on Spin-Singlet and Spin-Triplet Ferromagnetic Josephson Junctions

NASA Astrophysics Data System (ADS)

Gingrich, Eric

The last several decades have seen an explosion in the use and size of computers for scientific applications. The US Department of Energy has set an ExaScale computing goal for high performance computing that is projected to be unattainable by current CMOS computing designs. This has led to a renewed interest in superconducting computing as a means of beating these projections. One of the primary requirements of this thrust is the development of an efficient cryogenic memory. Estimates of power consumption of early Rapid Single Flux Quantum (RSFQ) memory designs are on the order of MW, far too steep for any real application. Therefore, other memory concepts are required. S/F/S Josephson Junctions, a class of device in which two superconductors (S) are separated by one or more ferromagnetic layers (F) has shown promise as a memory element. Several different systems have been proposed utilizing either the spin-singlet or spin-triplet superconducting states. This talk will discuss the concepts underpinning these devices, and the recent work done to demonstrate their feasibility. This research is supported in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), via U.S. Army Research Office Contract W911NF-14-C-0115.

Performance analysis and kernel size study of the Lynx real-time operating system

NASA Technical Reports Server (NTRS)

Liu, Yuan-Kwei; Gibson, James S.; Fernquist, Alan R.

1993-01-01

This paper analyzes the Lynx real-time operating system (LynxOS), which has been selected as the operating system for the Space Station Freedom Data Management System (DMS). The features of LynxOS are compared to other Unix-based operating system (OS). The tools for measuring the performance of LynxOS, which include a high-speed digital timer/counter board, a device driver program, and an application program, are analyzed. The timings for interrupt response, process creation and deletion, threads, semaphores, shared memory, and signals are measured. The memory size of the DMS Embedded Data Processor (EDP) is limited. Besides, virtual memory is not suitable for real-time applications because page swap timing may not be deterministic. Therefore, the DMS software, including LynxOS, has to fit in the main memory of an EDP. To reduce the LynxOS kernel size, the following steps are taken: analyzing the factors that influence the kernel size; identifying the modules of LynxOS that may not be needed in an EDP; adjusting the system parameters of LynxOS; reconfiguring the device drivers used in the LynxOS; and analyzing the symbol table. The reductions in kernel disk size, kernel memory size and total kernel size reduction from each step mentioned above are listed and analyzed.

System and method for programmable bank selection for banked memory subsystems

DOEpatents

Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

2010-09-07

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Observation of conducting filament growth in nanoscale resistive memories

NASA Astrophysics Data System (ADS)

Yang, Yuchao; Gao, Peng; Gaba, Siddharth; Chang, Ting; Pan, Xiaoqing; Lu, Wei

2012-03-01

Nanoscale resistive switching devices, sometimes termed memristors, have recently generated significant interest for memory, logic and neuromorphic applications. Resistive switching effects in dielectric-based devices are normally assumed to be caused by conducting filament formation across the electrodes, but the nature of the filaments and their growth dynamics remain controversial. Here we report direct transmission electron microscopy imaging, and structural and compositional analysis of the nanoscale conducting filaments. Through systematic ex-situ and in-situ transmission electron microscopy studies on devices under different programming conditions, we found that the filament growth can be dominated by cation transport in the dielectric film. Unexpectedly, two different growth modes were observed for the first time in materials with different microstructures. Regardless of the growth direction, the narrowest region of the filament was found to be near the dielectric/inert-electrode interface in these devices, suggesting that this region deserves particular attention for continued device optimization.

Accessing global data from accelerator devices

DOEpatents

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

Electrochromic conductive polymer fuses for hybrid organic/inorganic semiconductor memories

NASA Astrophysics Data System (ADS)

Möller, Sven; Forrest, Stephen R.; Perlov, Craig; Jackson, Warren; Taussig, Carl

2003-12-01

We demonstrate a nonvolatile, write-once-read-many-times (WORM) memory device employing a hybrid organic/inorganic semiconductor architecture consisting of thin film p-i-n silicon diode on a stainless steel substrate integrated in series with a conductive polymer fuse. The nonlinearity of the silicon diodes enables a passive matrix memory architecture, while the conductive polyethylenedioxythiophene:polystyrene sulfonic acid polymer serves as a reliable switch with fuse-like behavior for data storage. The polymer can be switched at ˜2 μs, resulting in a permanent decrease of conductivity of the memory pixel by up to a factor of 103. The switching mechanism is primarily due to a current and thermally dependent redox reaction in the polymer, limited by the double injection of both holes and electrons. The switched device performance does not degrade after many thousand read cycles in ambient at room temperature. Our results suggest that low cost, organic/inorganic WORM memories are feasible for light weight, high density, robust, and fast archival storage applications.

An UV photochromic memory effect in proton-based WO3 electrochromic devices

NASA Astrophysics Data System (ADS)

Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

2008-11-01

We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

3D Printing of Highly Stretchable, Shape-Memory, and Self-Healing Elastomer toward Novel 4D Printing.

PubMed

Kuang, Xiao; Chen, Kaijuan; Dunn, Conner K; Wu, Jiangtao; Li, Vincent C F; Qi, H Jerry

2018-02-28

The three-dimensional (3D) printing of flexible and stretchable materials with smart functions such as shape memory (SM) and self-healing (SH) is highly desirable for the development of future 4D printing technology for myriad applications, such as soft actuators, deployable smart medical devices, and flexible electronics. Here, we report a novel ink that can be used for the 3D printing of highly stretchable, SM, and SH elastomer via UV-light-assisted direct-ink-write printing. An ink containing urethane diacrylate and a linear semicrystalline polymer is developed for the 3D printing of a semi-interpenetrating polymer network elastomer that can be stretched by up to 600%. The 3D-printed complex structures show interesting functional properties, such as high strain SM and SM -assisted SH capability. We demonstrate that such a 3D-printed SM elastomer has the potential application for biomedical devices, such as vascular repair devices. This research paves a new way for the further development of novel 4D printing, soft robotics, and biomedical devices.

Critical role of a double-layer configuration in solution-based unipolar resistive switching memories.

PubMed

Carlos, Emanuel; Kiazadeh, Asal; Deuermeier, Jonas; Branquinho, Rita; Martins, Rodrigo; Fortunato, Elvira

2018-08-24

Lately, resistive switching memories (ReRAM) have been attracting a lot of attention due to their possibilities of fast operation, lower power consumption and simple fabrication process and they can also be scaled to very small dimensions. However, most of these ReRAM are produced by physical methods and nowadays the industry demands more simplicity, typically associated with low cost manufacturing. As such, ReRAMs in this work are developed from a solution-based aluminum oxide (Al 2 O 3 ) using a simple combustion synthesis process. The device performance is optimized by two-stage deposition of the Al 2 O 3 film. The resistive switching properties of the bilayer devices are reproducible with a yield of 100%. The ReRAM devices show unipolar resistive switching behavior with good endurance and retention time up to 10 5 s at 85 °C. The devices can be programmed in a multi-level cell operation mode by application of different reset voltages. Temperature analysis of various resistance states reveals a filamentary nature based on the oxygen vacancies. The optimized film was stacked between ITO and indium zinc oxide, targeting a fully transparent device for applications on transparent system-on-panel technology.

Long-term reliable physically unclonable function based on oxide tunnel barrier breakdown on two-transistors two-magnetic-tunnel-junctions cell-based embedded spin transfer torque magnetoresistive random access memory

NASA Astrophysics Data System (ADS)

Takaya, Satoshi; Tanamoto, Tetsufumi; Noguchi, Hiroki; Ikegami, Kazutaka; Abe, Keiko; Fujita, Shinobu

2017-04-01

Among the diverse applications of spintronics, security for internet-of-things (IoT) devices is one of the most important. A physically unclonable function (PUF) with a spin device (spin transfer torque magnetoresistive random access memory, STT-MRAM) is presented. Oxide tunnel barrier breakdown is used to realize long-term stability for PUFs. A secure PUF has been confirmed by evaluating the Hamming distance of a 32-bit STT-MRAM-PUF fabricated using 65 nm CMOS technology.

A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986

NASA Astrophysics Data System (ADS)

Riley, J. L.

1987-08-01

This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.

Voltage switching of a VO{sub 2} memory metasurface using ionic gel

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goldflam, M. D.; Liu, M. K.; Chapler, B. C.

2014-07-28

We demonstrate an electrolyte-based voltage tunable vanadium dioxide (VO{sub 2}) memory metasurface. Large spatial scale, low voltage, non-volatile switching of terahertz (THz) metasurface resonances is achieved through voltage application using an ionic gel to drive the insulator-to-metal transition in an underlying VO{sub 2} layer. Positive and negative voltage application can selectively tune the metasurface resonance into the “off” or “on” state by pushing the VO{sub 2} into a more conductive or insulating regime respectively. Compared to graphene based control devices, the relatively long saturation time of resonance modification in VO{sub 2} based devices suggests that this voltage-induced switching originates primarilymore » from electrochemical effects related to oxygen migration across the electrolyte–VO{sub 2} interface.« less

Conductive bridge random access memory characteristics of SiCN based transparent device due to indium diffusion

NASA Astrophysics Data System (ADS)

Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

2018-03-01

In this work, the transparent bipolar resistive switching characteristics of a SiCN-based ITO/SiCN/AZO structure due to In diffusion from ITO is studied. The SiCN based device is found to be 80% transparent in the visible wavelength region. This device, with AZO as both top and bottom electrodes, does not show any RRAM property due to deposition of the high quality O2-free SiCN film. Replacing the AZO top electrode with ITO in this device results in good resistive switching (RS) characteristics with a high on/off ratio and long retention. Replacing the SiCN film with ZrO2 also results in excellent RS characteristics due to the formation of an oxygen vacancies filament inside the ZrO2 film. A resistance ratio of on/off is found to be higher in the SiCN based device compared to that of the ZrO2 device. Diffusion of In from ITO into the SiCN film on application of high positive voltage during forming can be attributed to the occurrence of RS in the device, which is confirmed by the analyses of energy dispersive spectroscopy and secondary-ion mass spectrometry. This study shows a pathway for the fabrication of CBRAM based transparent devices for non-volatile memory application.

mHealth and memory aids: levels of smartphone ownership in patients.

PubMed

Migo, Ellen M; Haynes, Becky I; Harris, Lara; Friedner, Kim; Humphreys, Kate; Kopelman, Michael D

2015-01-01

The use of mobile devices to deliver healthcare has not yet been exploited in neuropsychological rehabilitation. Smartphones have the potential to serve as multi-functional memory aids. To investigate whether patients attending a clinic for mixed memory problems own smartphones, to determine whether this could be a widely applicable medium to use as a memory aids device. A questionnaire on smartphone ownership was given to an opportunity sample of consecutive patients attending a neuropsychiatry and memory disorders outpatient clinic. Data were collected in 2012 and repeated 12 months later in 2013 to assess changes over time. Ownership of mobile phones was stable between 2012 (81%) and 2013 (85%), but ownership of smartphones showed a significant increase (from 26% to 40%). Age negatively predicted smartphone ownership. Despite cognitive or psychiatric problems, our patient group are as likely to own a mobile phone as a member of the general population. Ownership levels are at 40% and likely to increase in the future. Exploring how smartphones and their apps could function as memory aids is likely to be useful for a large enough number of patients to be clinically worthwhile.

Multiple negative differential resistance devices with ultra-high peak-to-valley current ratio for practical multi-valued logic and memory applications

NASA Astrophysics Data System (ADS)

Shin, Sunhae; Rok Kim, Kyung

2015-06-01

In this paper, we propose a novel multiple negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) over 106 by combining tunnel diode with a conventional MOSFET, which suppresses the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) in tunnel junction provides the first peak, and the second peak and valley are generated from the suppression of diffusion current in tunnel diode by the off-state MOSFET. The multiple NDR curves can be controlled by doping concentration of tunnel junction and the threshold voltage of MOSFET. By using complementary multiple NDR devices, five-state memory is demonstrated only with six transistors.

Fabrication and characterization of cylindrical light diffusers comprised of shape memory polymer.

PubMed

Small, Ward; Buckley, Patrick R; Wilson, Thomas S; Loge, Jeffrey M; Maitland, Kristen D; Maitland, Duncan J

2008-01-01

We developed a technique for constructing light diffusing devices comprised of a flexible shape memory polymer (SMP) cylindrical diffuser attached to the tip of an optical fiber. The devices are fabricated by casting an SMP rod over the cleaved tip of an optical fiber and media blasting the SMP rod to create a light diffusing surface. The axial and polar emission profiles and circumferential (azimuthal) uniformity are characterized for various blasting pressures, nozzle-to-sample distances, and nozzle translation speeds. The diffusers are generally strongly forward-directed and consistently withstand over 8 W of incident IR laser light without suffering damage when immersed in water. These devices are suitable for various endoluminal and interstitial biomedical applications.

Fabrication and characterization of cylindrical light diffusers comprised of shape memory polymer

PubMed Central

Small, Ward; Buckley, Patrick R.; Wilson, Thomas S.; Loge, Jeffrey M.; Maitland, Kristen D.; Maitland, Duncan J.

2009-01-01

We developed a technique for constructing light diffusing devices comprised of a flexible shape memory polymer (SMP) cylindrical diffuser attached to the tip of an optical fiber. The devices are fabricated by casting an SMP rod over the cleaved tip of an optical fiber and media blasting the SMP rod to create a light diffusing surface. The axial and polar emission profiles and circumferential (azimuthal) uniformity are characterized for various blasting pressures, nozzle-to-sample distances, and nozzle translation speeds. The diffusers are generally strongly forward-directed and consistently withstand over 8 W of incident IR laser light without suffering damage when immersed in water. These devices are suitable for various endoluminal and interstitial biomedical applications. PMID:18465981

Multilevel resistance switching effect in Au/La2/3Ba1/3MnO3/Pt heterostructure manipulated by external fields

NASA Astrophysics Data System (ADS)

Wen, Jiahong; Zhao, Xiaoyu; Li, Qian; Zhang, Sheng; Wang, Dunhui; Du, Youwei

2018-04-01

Multilevel resistance switching (RS) effect has attracted more and more attention due to its promising potential for the increase of storage density in memory devices. In this work, the transport properties are investigated in an Au/La2/3Ba1/3MnO3 (LBMO)/Pt heterostructure. Taking advantage of the strong interplay among the spin, charge, orbital and lattice of LBMO, the Au/LBMO/Pt device can exhibit bipolar RS effect and magnetoresistance effect simultaneously. Under the coaction of electric field and magnetic field, four different resistance states are achieved in this device. These resistance states show excellent repeatability and retentivity and can be switched between any two states, which suggest the potential applications in the multilevel RS memory devices with enhanced storage density.

Memristive behavior in BaTiO 3 thin films integrated with semiconductors

NASA Astrophysics Data System (ADS)

Singamaneni, Srinivasa Rao; Prater, John; Narayan, Jay

BaTiO3 has been studied for emerging non-volatile memory applications. However, most of the previous work has focused on this material when it was deposited on insulting oxide substrates such as SrTiO3. Unfortunately, this substrate is not suitable for CMOS-based microelectronics applications. This motivated us to carry out the present work. We have studied the resistive switching behavior in BaTiO3/La0.7Sr0.3MnO3 (BTO/LSMO) heterostructures integrated with Si (100) using pulsed laser deposition1,2. I-V measurements were conducted on BTO (500nm)/LSMO (25nm) devices at 200K, with the compliance current of 10mA. Here, Pt was used as a top electrode and LSMO served as bottom electrode. A few important observations are noted: (a) broad hysteresis in forward and reverse voltage sweeps -ideal for memory applications, (b) the ratio of high resistance to low resistance state is ~600 -important for switching devices, (c) the device is stable at least up to 50 cycles. However, we found that hysteretic behavior was collapsed after 36 cycles upon oxygen annealing of the device at 1 atmospheric pressure, 200o C for 1 hour, inferring the important role of oxygen vacancies in the resistive switching behavior of BTO/LSMO device. The comprehensive experimental data will be presented and discussed.1,2.

System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

NASA Technical Reports Server (NTRS)

Hall, William A. (Inventor)

1993-01-01

A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

Stress-induced reversible and irreversible ferroelectric domain switching

NASA Astrophysics Data System (ADS)

Chen, Zibin; Huang, Qianwei; Wang, Feifei; Ringer, Simon P.; Luo, Haosu; Liao, Xiaozhou

2018-04-01

Ferroelectric materials have been extensively explored for applications in electronic devices because of their ferroelectric/ferroelastic domain switching behaviour under electric bias or mechanical stress. Recent findings on applying mechanical loading to manipulate reversible logical signals in non-volatile ferroelectric memory devices make ferroelectric materials more attractive to scientists and engineers. However, the dynamical microscopic structural behaviour of ferroelectric domains under stress is not well understood, which limits the applications of ferroelectric/ferroelastic switching in memory devices. Here, the kinetics of reversible and irreversible ferroelectric domain switching induced by mechanical stress in relaxor-based ferroelectrics was explored. In-situ transmission electron microscopy investigation revealed that 90° ferroelastic and 180° ferroelectric domain switching can be induced by low and high mechanical stresses. The nucleation and growth of nanoscale domains overwhelm the defect-induced pinning effect on the stable micro-domain walls. This study provides deep insights for exploring the mechanical kinetics for ferroelectric/ferroelastic domains and a clear pathway to overcome the domain pinning effect of defects in ferroelectrics.

pH Memory Effects of Tunable Block Copolymer Photonic Gels and Their Applications

NASA Astrophysics Data System (ADS)

Kang, Youngjong; Thomas, Edwin L.

2007-03-01

Materials with hysteresis, showing a bistable state to the external stimuli, have been widely investigated due to their potential applications. For example, they could be used as memory devices or optical switches when they have magnetic or optical hysteresis response to the external stimuli. Here we report pH tunable photonic gels which are spontaneously assembled from block copolymers. The general idea of this research is based on the selective swelling of block copolymer lamellar mesogels, where the solubility of one block is responsive to the change of pH. In this system, the domain spacing of the lamellar is varied with the extent of swelling. As a model system, we used protonated polystyrene-b-poly(2-vinly pyridine) (PS-b-P2VP) block copolymers forming lamellar structures. The photonic gel films prepared from protonated PS-b-P2VP show a strong reflectance in aqueous solution and the band position was varied with pH. Interestingly, a very strong optical hysteresis was observed while the reflection band of photonic gels was tuned by changing pH. We anticipate that pH tunable photonic gels with hysteresis can be applicable to novel applications such as a component of memory devices, photonic switches or drug delivery vehicles.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Allada, Veerendra, Benjegerdes, Troy; Bode, Brett

Commodity clusters augmented with application accelerators are evolving as competitive high performance computing systems. The Graphical Processing Unit (GPU) with a very high arithmetic density and performance per price ratio is a good platform for the scientific application acceleration. In addition to the interconnect bottlenecks among the cluster compute nodes, the cost of memory copies between the host and the GPU device have to be carefully amortized to improve the overall efficiency of the application. Scientific applications also rely on efficient implementation of the BAsic Linear Algebra Subroutines (BLAS), among which the General Matrix Multiply (GEMM) is considered as themore » workhorse subroutine. In this paper, they study the performance of the memory copies and GEMM subroutines that are critical to port the computational chemistry algorithms to the GPU clusters. To that end, a benchmark based on the NetPIPE framework is developed to evaluate the latency and bandwidth of the memory copies between the host and the GPU device. The performance of the single and double precision GEMM subroutines from the NVIDIA CUBLAS 2.0 library are studied. The results have been compared with that of the BLAS routines from the Intel Math Kernel Library (MKL) to understand the computational trade-offs. The test bed is a Intel Xeon cluster equipped with NVIDIA Tesla GPUs.« less

Improved charge trapping properties by embedded graphene oxide quantum-dots for flash memory application

NASA Astrophysics Data System (ADS)

Jia, Xinlei; Yan, Xiaobing; Wang, Hong; Yang, Tao; Zhou, Zhenyu; Zhao, Jianhui

2018-06-01

In this work, we have investigated two kinds of charge trapping memory devices with Pd/Al2O3/ZnO/SiO2/p-Si and Pd/Al2O3/ZnO/graphene oxide quantum-dots (GOQDs)/ZnO/SiO2/p-Si structure. Compared with the single ZnO sample, the memory window of the ZnO-GOQDs-ZnO sample reaches a larger value (more than doubled) of 2.7 V under the sweeping gate voltage ± 7 V, indicating a better charge storage capability and the significant charge trapping effects by embedding the GOQDs trapping layer. The ZnO-GOQDs-ZnO devices have better date retention properties with the high and low capacitances loss of ˜ 1.1 and ˜ 6.9%, respectively, as well as planar density of the trapped charges of 1.48 × 1012 cm- 2. It is proposed that the GOQDs play an important role in the outstanding memory characteristics due to the deep quantum potential wells and the discrete distribution of the GOQDs. The long date retention time might have resulted from the high potential barrier which suppressed both the back tunneling and the leakage current. Intercalating GOQDs in the memory device is a promising method to realize large memory window, low-power consumption and excellent retention properties.

Accessing global data from accelerator devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less

Skyrmion-based multi-channel racetrack

NASA Astrophysics Data System (ADS)

Song, Chengkun; Jin, Chendong; Wang, Jinshuai; Xia, Haiyan; Wang, Jianbo; Liu, Qingfang

2017-11-01

Magnetic skyrmions are promising for the application of racetrack memories, logic gates, and other nano-devices, owing to their topologically protected stability, small size, and low driving current. In this work, we propose a skyrmion-based multi-channel racetrack memory where the skyrmion moves in the selected channel by applying voltage-controlled magnetic anisotropy gates. It is demonstrated numerically that a current-dependent skyrmion Hall effect can be restrained by the additional potential of the voltage-controlled region, and the skyrmion velocity and moving channel in the racetrack can be operated by tuning the voltage-controlled magnetic anisotropy, gate position, and current density. Our results offer a potential application of racetrack memory based on skyrmions.

Coexistence of diode-like volatile and multilevel nonvolatile resistive switching in a ZrO2/TiO2 stack structure.

PubMed

Li, Yingtao; Yuan, Peng; Fu, Liping; Li, Rongrong; Gao, Xiaoping; Tao, Chunlan

2015-10-02

Diode-like volatile resistive switching as well as nonvolatile resistive switching behaviors in a Cu/ZrO₂/TiO₂/Ti stack are investigated. Depending on the current compliance during the electroforming process, either volatile resistive switching or nonvolatile resistive switching is observed. With a lower current compliance (<10 μA), the Cu/ZrO₂/TiO₂/Ti device exhibits diode-like volatile resistive switching with a rectifying ratio over 10(6). The permanent transition from volatile to nonvolatile resistive switching can be obtained by applying a higher current compliance of 100 μA. Furthermore, by using different reset voltages, the Cu/ZrO₂/TiO₂/Ti device exhibits multilevel memory characteristics with high uniformity. The coexistence of nonvolatile multilevel memory and diode-like volatile resistive switching behaviors in the same Cu/ZrO₂/TiO₂/Ti device opens areas of applications in high-density storage, logic circuits, neural networks, and passive crossbar memory selectors.

Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

PubMed Central

Song, Ji-Min; Lee, Jang-Sik

2016-01-01

Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122

End-group-directed self-assembly of organic compounds useful for photovoltaic applications

DOEpatents

Beaujuge, Pierre M.; Lee, Olivia P.; Yiu, Alan T.; Frechet, Jean M.J.

2016-05-31

The present invention provides for an organic compound comprising electron deficient unit covalently linked to two or more electron rich units. The present invention also provides for a device comprising the organic compound, such as a light-emitting diode, thin-film transistor, chemical biosensor, non-emissive electrochromic, memory device, photovoltaic cells, or the like.

An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

NASA Technical Reports Server (NTRS)

Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

2001-01-01

Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

Radiation-Hardened Solid-State Drive

NASA Technical Reports Server (NTRS)

Sheldon, Douglas J.

2010-01-01

A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.

Memory hierarchy using row-based compression

DOEpatents

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

Lowering data retention voltage in static random access memory array by post fabrication self-improvement of cell stability by multiple stress application

NASA Astrophysics Data System (ADS)

Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

We propose a new version of the post fabrication static random access memory (SRAM) self-improvement technique, which utilizes multiple stress application. It is demonstrated that, using a device matrix array (DMA) test element group (TEG) with intrinsic channel fully depleted (FD) silicon-on-thin-buried-oxide (SOTB) six-transistor (6T) SRAM cells fabricated by the 65 nm technology, the lowering of data retention voltage (DRV) is more effectively achieved than using the previously proposed single stress technique.

Near-Field Thermal Radiation for Solar Thermophotovoltaics and High Temperature Thermal Logic and Memory Applications

NASA Astrophysics Data System (ADS)

Elzouka, Mahmoud

This dissertation investigates Near-Field Thermal Radiation (NFTR) applied to MEMS-based concentrated solar thermophotovoltaics (STPV) energy conversion and thermal memory and logics. NFTR is the exchange of thermal radiation energy at nano/microscale; when separation between the hot and cold objects is less than dominant radiation wavelength (˜1 mum). NFTR is particularly of interest to the above applications due to its high rate of energy transfer, exceeding the blackbody limit by orders of magnitude, and its strong dependence on separation gap size, surface nano/microstructure and material properties. Concentrated STPV system converts solar radiation to electricity using heat as an intermediary through a thermally coupled absorber/emitter, which causes STPV to have one of the highest solar-to-electricity conversion efficiency limits (85.4%). Modeling of a near-field concentrated STPV microsystem is carried out to investigate the use of STPV based solid-state energy conversion as high power density MEMS power generator. Numerical results for In 0.18Ga0.82Sb PV cell illuminated with tungsten emitter showed significant enhancement in energy transfer, resulting in output power densities as high as 60 W/cm2; 30 times higher than the equivalent far-field power density. On thermal computing, this dissertation demonstrates near-field heat transfer enabled high temperature NanoThermoMechanical memory and logics. Unlike electronics, NanoThermoMechanical memory and logic devices use heat instead of electricity to record and process data; hence they can operate in harsh environments where electronics typically fail. NanoThermoMechanical devices achieve memory and thermal rectification functions through the coupling of near-field thermal radiation and thermal expansion in microstructures, resulting in nonlinear heat transfer between two temperature terminals. Numerical modeling of a conceptual NanoThermoMechanical is carried out; results include the dynamic response under write/read cycles for a practical silicon-based device. NanoThermoMechanical rectification is achieved experimentally--for the first time--with measurements at a high temperature of 600 K, demonstrating the feasibility of NanoThermoMechanical to operate in harsh environments. The proof-of-concept device has shown a maximum rectification of 10.9%. This dissertation proposes using meshed photonic crystal structures to enhance NFTR between surfaces. Numerical results show thermal rectification as high as 2500%. Incorporating these structures in thermal memory and rectification devices will significantly enhance their functionality and performance.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

Resistive switching characteristics and mechanisms in silicon oxide memory devices

NASA Astrophysics Data System (ADS)

Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Zhou, Fei; Wu, Xiaohan; Chen, Yen-Ting; Wang, Yanzhen; Xue, Fei; Lee, Jack C.

2016-05-01

Intrinsic unipolar SiOx-based resistance random access memories (ReRAM) characterization, switching mechanisms, and applications have been investigated. Device structures, material compositions, and electrical characteristics are identified that enable ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide semiconductor transistor (CMOS)-compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical control, and external factors to help understand resistive switching (RS) mechanisms. Measured temperature effects, pulse response, and carrier transport behaviors lead to compact models of RS mechanisms and energy band diagrams in order to aid the development of computer-aided design for ultralarge-v scale integration. This chapter presents a comprehensive investigation of SiOx-based RS characteristics and mechanisms for the post-CMOS device era.

Carbon nanotube switches for memory, RF communications and sensing applications, and methods of making the same

NASA Technical Reports Server (NTRS)

Kaul, Anupama B. (Inventor); Wong, Eric W. (Inventor); Baron, Richard L. (Inventor); Epp, Larry (Inventor)

2008-01-01

Switches having an in situ grown carbon nanotube as an element thereof, and methods of fabricating such switches. A carbon nanotube is grown in situ in mechanical connection with a conductive substrate, such as a heavily doped silicon wafer or an SOI wafer. The carbon nanotube is electrically connected at one location to a terminal. At another location of the carbon nanotube there is situated a pull electrode that can be used to elecrostatically displace the carbon nanotube so that it selectively makes contact with either the pull electrode or with a contact electrode. Connection to the pull electrode is sufficient to operate the device as a simple switch, while connection to a contact electrode is useful to operate the device in a manner analogous to a relay. In various embodiments, the devices disclosed are useful as at least switches for various signals, multi-state memory, computational devices, and multiplexers.

SIERRA - A 3-D device simulator for reliability modeling

NASA Astrophysics Data System (ADS)

Chern, Jue-Hsien; Arledge, Lawrence A., Jr.; Yang, Ping; Maeda, John T.

1989-05-01

SIERRA is a three-dimensional general-purpose semiconductor-device simulation program which serves as a foundation for investigating integrated-circuit (IC) device and reliability issues. This program solves the Poisson and continuity equations in silicon under dc, transient, and small-signal conditions. Executing on a vector/parallel minisupercomputer, SIERRA utilizes a matrix solver which uses an incomplete LU (ILU) preconditioned conjugate gradient square (CGS, BCG) method. The ILU-CGS method provides a good compromise between memory size and convergence rate. The authors have observed a 5x to 7x speedup over standard direct methods in simulations of transient problems containing highly coupled Poisson and continuity equations such as those found in reliability-oriented simulations. The application of SIERRA to parasitic CMOS latchup and dynamic random-access memory single-event-upset studies is described.

Shape-Memory Polymers for Biomedical Applications

NASA Astrophysics Data System (ADS)

Yakacki, Christopher M.; Gall, Ken

Shape-memory polymers (SMPs) are a class of mechanically functional "smart" materials that have generated substantial interest for biomedical applications. SMPs offer the ability to promote minimally invasive surgery, provide structural support, exert stabilizing forces, elute therapeutic agents, and biodegrade. This review focuses on several areas of biomedicine including vascular, orthopedic, and neuronal applications with respect to the progress and potential for SMPs to improve the standard of treatment in these areas. Fundamental studies on proposed biomedical SMP systems are discussed with regards to biodegradability, tailorability, sterilization, and biocompatibility. Lastly, a proposed research and development pathway for SMP-based biomedical devices is proposed based on trends in the recent literature.

GPU-based Parallel Application Design for Emerging Mobile Devices

NASA Astrophysics Data System (ADS)

Gupta, Kshitij

A revolution is underway in the computing world that is causing a fundamental paradigm shift in device capabilities and form-factor, with a move from well-established legacy desktop/laptop computers to mobile devices in varying sizes and shapes. Amongst all the tasks these devices must support, graphics has emerged as the 'killer app' for providing a fluid user interface and high-fidelity game rendering, effectively making the graphics processor (GPU) one of the key components in (present and future) mobile systems. By utilizing the GPU as a general-purpose parallel processor, this dissertation explores the GPU computing design space from an applications standpoint, in the mobile context, by focusing on key challenges presented by these devices---limited compute, memory bandwidth, and stringent power consumption requirements---while improving the overall application efficiency of the increasingly important speech recognition workload for mobile user interaction. We broadly partition trends in GPU computing into four major categories. We analyze hardware and programming model limitations in current-generation GPUs and detail an alternate programming style called Persistent Threads, identify four use case patterns, and propose minimal modifications that would be required for extending native support. We show how by manually extracting data locality and altering the speech recognition pipeline, we are able to achieve significant savings in memory bandwidth while simultaneously reducing the compute burden on GPU-like parallel processors. As we foresee GPU computing to evolve from its current 'co-processor' model into an independent 'applications processor' that is capable of executing complex work independently, we create an alternate application framework that enables the GPU to handle all control-flow dependencies autonomously at run-time while minimizing host involvement to just issuing commands, that facilitates an efficient application implementation. Finally, as compute and communication capabilities of mobile devices improve, we analyze energy implications of processing speech recognition locally (on-chip) and offloading it to servers (in-cloud).

Feasibility and limitations of anti-fuses based on bistable non-volatile switches for power electronic applications

NASA Astrophysics Data System (ADS)

Erlbacher, T.; Huerner, A.; Bauer, A. J.; Frey, L.

2012-09-01

Anti-fuse devices based on non-volatile memory cells and suitable for power electronic applications are demonstrated for the first time using silicon technology. These devices may be applied as stand alone devices or integrated using standard junction-isolation into application-specific and smart-power integrated circuits. The on-resistance of such devices can be permanently switched by nine orders of magnitude by triggering the anti-fuse with a positive voltage pulse. Extrapolation of measurement data and 2D TCAD process and device simulations indicate that 20 A anti-fuses with 10 mΩ can be reliably fabricated in 0.35 μm technology with a footprint of 2.5 mm2. Moreover, this concept offers distinguished added-values compared to existing mechanical relays, e.g. pre-test, temporary and permanent reset functions, gradual turn-on mode, non-volatility, and extendibility to high voltage capability.

Conductive bridging random access memory—materials, devices and applications

NASA Astrophysics Data System (ADS)

Kozicki, Michael N.; Barnaby, Hugh J.

2016-11-01

We present a review and primer on the subject of conductive bridging random access memory (CBRAM), a metal ion-based resistive switching technology, in the context of current research and the near-term requirements of the electronics industry in ultra-low energy devices and new computing paradigms. We include extensive discussions of the materials involved, the underlying physics and electrochemistry, the critical roles of ion transport and electrode reactions in conducting filament formation and device switching, and the electrical characteristics of the devices. Two general cation material systems are given—a fast ion chacogenide electrolyte and a lower ion mobility oxide ion conductor, and numerical examples are offered to enhance understanding of the operation of devices based on these. The effect of device conditioning on the activation energy for ion transport and consequent switching speed is discussed, as well as the mechanisms involved in the removal of the conducting bridge. The morphology of the filament and how this could be influenced by the solid electrolyte structure is described, and the electrical characteristics of filaments with atomic-scale constrictions are discussed. Consideration is also given to the thermal and mechanical environments within the devices. Finite element and compact modelling illustrations are given and aspects of CBRAM storage elements in memory circuits and arrays are included. Considerable emphasis is placed on the effects of ionizing radiation on CBRAM since this is important in various high reliability applications, and the potential uses of the devices in reconfigurable logic and neuromorphic systems is also discussed.

Shape-memory effect by specific biodegradable polymer blending for biomedical applications.

PubMed

Cha, Kook Jin; Lih, Eugene; Choi, Jiyeon; Joung, Yoon Ki; Ahn, Dong Jun; Han, Dong Keun

2014-05-01

Specific biodegradable polymers having shape-memory properties through "polymer-blend" method are investigated and their shape-switching in body temperature (37 °C) is characterized. Poly(L-lactide-co-caprolactone) (PLCL) and poly(L-lactide-co-glycolide) (PLGA) are dissolved in chloroform and the films of several blending ratios of PLCL/PLGA are prepared by solvent casting. The shape-memory properties of films are also examined using dynamic mechanical analysis (DMA). Among the blending ratios, the PLCL50/PLGA50 film shows good performance of shape-fixity and shape-recovery based on glass transition temperature. It displays that the degree of shape recovery is 100% at 37 °C and the shape recovery proceeds within only 15 s. In vitro biocompatibility studies are shown to have good blood compatibility and cytocompatibility for the PLCL50/PLGA50 films. It is expected that this blended biodegradable polymer can be potentially used as a material for blood-contacting medical devices such as a self-expended vascular polymer stents and vascular closure devices in biomedical applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A 128K-bit CCD buffer memory system

NASA Technical Reports Server (NTRS)

Siemens, K. H.; Wallace, R. W.; Robinson, C. R.

1976-01-01

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.

Remote hardware-reconfigurable robotic camera

NASA Astrophysics Data System (ADS)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar; Maya-Rueda, Selene E.

2001-10-01

In this work, a camera with integrated image processing capabilities is discussed. The camera is based on an imager coupled to an FPGA device (Field Programmable Gate Array) which contains an architecture for real-time computer vision low-level processing. The architecture can be reprogrammed remotely for application specific purposes. The system is intended for rapid modification and adaptation for inspection and recognition applications, with the flexibility of hardware and software reprogrammability. FPGA reconfiguration allows the same ease of upgrade in hardware as a software upgrade process. The camera is composed of a digital imager coupled to an FPGA device, two memory banks, and a microcontroller. The microcontroller is used for communication tasks and FPGA programming. The system implements a software architecture to handle multiple FPGA architectures in the device, and the possibility to download a software/hardware object from the host computer into its internal context memory. System advantages are: small size, low power consumption, and a library of hardware/software functionalities that can be exchanged during run time. The system has been validated with an edge detection and a motion processing architecture, which will be presented in the paper. Applications targeted are in robotics, mobile robotics, and vision based quality control.

Voltage-controlled low-energy switching of nanomagnets through Ruderman-Kittel-Kasuya-Yosida interactions for magnetoelectric device applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ghosh, Bahniman, E-mail: bghosh@utexas.edu; Dey, Rik; Register, Leonard F.

2016-07-21

In this article, we consider through simulation low-energy switching of nanomagnets via electrostatically gated inter-magnet Ruderman-Kittel-Kasuya-Yosida (RKKY) interactions on the surface of three-dimensional topological insulators, for possible memory and nonvolatile logic applications. We model the possibility and dynamics of RKKY-based switching of one nanomagnet by coupling to one or more nanomagnets of set orientation. Potential applications to both memory and nonvolatile logic are illustrated. Sub-attojoule switching energies, far below conventional spin transfer torque (STT)-based memories and even below CMOS logic appear possible. Switching times on the order of a few nanoseconds, comparable to times for STT switching, are estimated formore » ferromagnetic nanomagnets, but the approach also appears compatible with the use of antiferromagnets which may allow for faster switching.« less

Unconstrained Recovery Characterization of Shape-Memory Polymer Networks for Cardiovascular Applications

PubMed Central

Yakacki, Christopher M.; Shandas, Robin; Lanning, Craig; Rech, Bryan; Eckstein, Alex; Gall, Ken

2009-01-01

Shape-memory materials have been proposed in biomedical device design due to their ability to facilitate minimally invasive surgery and recover to a predetermined shape in-vivo. Use of the shape-memory effect in polymers is proposed for cardiovascular stent interventions to reduce the catheter size for delivery and offer highly controlled and tailored deployment at body temperature. Shape-memory polymer networks were synthesized via photopolymerization of tert-butyl acrylate and poly (ethylene glycol) dimethacrylate to provide precise control over the thermomechanical response of the system. The free recovery response of the polymer stents at body temperature was studied as a function of glass transition temperature (Tg), crosslink density, geometrical perforation, and deformation temperature, all of which can be independently controlled. Room temperature storage of the stents was shown to be highly dependent on Tg and crosslink density. The pressurized response of the stents is also demonstrated to depend on crosslink density. This polymer system exhibits a wide range of shape-memory and thermomechanical responses to adapt and meet specific needs of minimally invasive cardiovascular devices. PMID:17296222

Nonvolatile memory chips: critical technology for high-performance recce systems

NASA Astrophysics Data System (ADS)

Kaufman, Bruce

2000-11-01

Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

Avalanche atomic switching in strain engineered Sb2Te3-GeTe interfacial phase-change memory cells

NASA Astrophysics Data System (ADS)

Zhou, Xilin; Behera, Jitendra K.; Lv, Shilong; Wu, Liangcai; Song, Zhitang; Simpson, Robert E.

2017-09-01

By confining phase transitions to the nanoscale interface between two different crystals, interfacial phase change memory heterostructures represent the state of the art for energy efficient data storage. We present the effect of strain engineering on the electrical switching performance of the {{Sb}}2{{Te}}3-GeTe superlattice van der Waals devices. Multiple Ge atoms switching through a two-dimensional Te layer reduces the activation barrier for further atoms to switch; an effect that can be enhanced by biaxial strain. The out-of-plane phonon mode of the GeTe crystal remains active in the superlattice heterostructures. The large in-plane biaxial strain imposed by the {{Sb}}2{{Te}}3 layers on the GeTe layers substantially improves the switching speed, reset energy, and cyclability of the superlattice memory devices. Moreover, carefully controlling residual stress in the layers of {{Sb}}2{{Te}}3-GeTe interfacial phase change memories provides a new degree of freedom to design the properties of functional superlattice structures for memory and photonics applications.

A low switching voltage organic-on-inorganic heterojunction memory element utilizing a conductive polymer fuse on a doped silicon substrate

NASA Astrophysics Data System (ADS)

Smith, Shawn; Forrest, Stephen R.

2004-06-01

We present a simple, nonvolatile, write-once-read-many-times (WORM) memory device utilizing an organic-on-inorganic heterojunction (OI-HJ) diode with a conductive polymer fuse consisting of polyethylene dioxythiophene:polysterene sulfonic acid (PEDOT:PSS) forming one side of the rectifying junction. Current transients are used to change the fuse from a conducting to a nonconducting state to record a logical "1" or "0", while the nonlinearity of the OI-HJ allows for passive matrix memory addressing. The device switches at 2 and 4 V for 50 nm thick PEDOT:PSS films on p-type Si and n-type Si, respectively. This is significantly lower than the switching voltage used in PEDOT:PSS/p-i-n Si memory elements [J. Appl Phys. 94, 7811 (2003)]. The switching results in a permanent reduction of forward-bias current by approximately five orders of magnitude. These results suggest that the OI-HJ structure has potential for use in low-cost passive matrix WORM memories for archival storage applications.

Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure.

PubMed

Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

2009-01-14

The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

Development of a high capacity bubble domain memory element and related epitaxial garnet materials for application in spacecraft data recorders. Item 1: Development of a high capacity memory element

NASA Technical Reports Server (NTRS)

Besser, P. J.

1977-01-01

Several versions of the 100K bit chip, which is configured as a single serial loop, were designed, fabricated and evaluated. Design and process modifications were introduced into each succeeding version to increase device performance and yield. At an intrinsic field rate of 150 KHz the final design operates from -10 C to +60 C with typical bias margins of 12 and 8 percent, respectively, for continuous operation. Asynchronous operation with first bit detection on start-up produces essentially the same margins over the temperature range. Cost projections made from fabrication yield runs on the 100K bit devices indicate that the memory element cost will be less than 10 millicents/bit in volume production.

Dynamic-load-enabled ultra-low power multiple-state RRAM devices.

PubMed

Yang, Xiang; Chen, I-Wei

2012-01-01

Bipolar resistance-switching materials allowing intermediate states of wide-varying resistance values hold the potential of drastically reduced power for non-volatile memory. To exploit this potential, we have introduced into a nanometallic resistance-random-access-memory (RRAM) device an asymmetric dynamic load, which can reliably lower switching power by orders of magnitude. The dynamic load is highly resistive during on-switching allowing access to the highly resistive intermediate states; during off-switching the load vanishes to enable switching at low voltage. This approach is entirely scalable and applicable to other bipolar RRAM with intermediate states. The projected power is 12 nW for a 100 × 100 nm(2) device and 500 pW for a 10 × 10 nm(2) device. The dynamic range of the load can be increased to allow power to be further decreased by taking advantage of the exponential decay of wave-function in a newly discovered nanometallic random material, reaching possibly 1 pW for a 10×10 nm(2) nanometallic RRAM device.

Implementation of poly(ε-caprolactone) sheet-based shape-memory polymer microvalves into plastic-based microfluidic devices

NASA Astrophysics Data System (ADS)

Jiang, Chenyang; Uto, Koichiro; Ebara, Mitsuhiro; Aoyagi, Takao; Ichiki, Takanori

2015-06-01

Implementation of shape-memory polymer (SMP) sheet-based microvalves into plastic-based microfluidic devices has been studied toward the use in disposable and mass producible micro total analysis devices. Poly(ε-caprolactone) (PCL) and poly(methyl methacrylate-co-styrene) (MS) were used as SMP and main substrate materials, respectively. Bonding between PCL sheets and MS plates was the critical issue in the practical implementation. We found the pristine PCL sheet has relatively rough surface with Ra of 85.14 nm, which is the cause of poor bonding. Hence, by introducing the post-anneal treatment with sandwiched between two flat glass plates, the PCL surface could be smoothed to Ra of 12.50 nm, and tight bonding could be obtained. Consequently, microfluidic devices consisting of plastic/PCL/plastic layers were successfully fabricated and therein the actuation of SMP valves without any leakage was demonstrated. The present technology is expected to be applicable to disposable microfluidic devices as required for point-of-care testing.

A PDA-based electrocardiogram/blood pressure telemonitor for telemedicine.

PubMed

Bolanos, Marcos; Nazeran, Homayoun; Gonzalez, Izzac; Parra, Ricardo; Martinez, Christopher

2004-01-01

An electrocardiogram (ECG) / blood pressure (BP) telemonitor consisting of comprehensive integration of various electrical engineering concepts, devices, and methods was developed. This personal digital assistant-based (PDAbased) system focused on integration of biopotential amplifiers, photoplethysmographic measurement of blood pressure, microcontroller devices, programming methods, wireless transmission, signal filtering and analysis, interfacing, and long term memory devices (24 hours) to develop a state-of-the-art ECG/BP telemonitor. These instrumentation modules were developed and tested to realize a complete and compact system that could be deployed to assist in telemedicine applications and heart rate variability studies. The specific objective of this device was to facilitate the long term monitoring and recording of ECG and blood pressure signals. This device was able to acquire ECG/BP waveforms, transmit them wirelessly to a PDA, save them onto a compact flash memory, and display them on the LCD screen of the PDA. It was also capable of calculating the heart rate (HR) in beats per minute, and providing systolic and diastolic blood pressure values.

Energy-band engineering for tunable memory characteristics through controlled doping of reduced graphene oxide.

PubMed

Han, Su-Ting; Zhou, Ye; Yang, Qing Dan; Zhou, Li; Huang, Long-Biao; Yan, Yan; Lee, Chun-Sing; Roy, Vellaisamy A L

2014-02-25

Tunable memory characteristics are used in multioperational mode circuits where memory cells with various functionalities are needed in one combined device. It is always a challenge to obtain control over threshold voltage for multimode operation. On this regard, we use a strategy of shifting the work function of reduced graphene oxide (rGO) in a controlled manner through doping gold chloride (AuCl3) and obtained a gradient increase of rGO work function. By inserting doped rGO as floating gate, a controlled threshold voltage (Vth) shift has been achieved in both p- and n-type low voltage flexible memory devices with large memory window (up to 4 times for p-type and 8 times for n-type memory devices) in comparison with pristine rGO floating gate memory devices. By proper energy band engineering, we demonstrated a flexible floating gate memory device with larger memory window and controlled threshold voltage shifts.

Current-driven domain wall motion based memory devices: Application to a ratchet ferromagnetic strip

NASA Astrophysics Data System (ADS)

Sánchez-Tejerina, Luis; Martínez, Eduardo; Raposo, Víctor; Alejos, Óscar

2018-04-01

Ratchet memories, where perpendicular magnetocristalline anisotropy is tailored so as to precisely control the magnetic transitions, has been recently proven to be a feasible device to store and manipulate data bits. For such devices, it has been shown that the current-driven regime of domain walls can improve their performances with respect to the field-driven one. However, the relaxing time required by the traveling domain walls constitutes a certain drawback if the former regime is considered, since it results in longer device latencies. In order to speed up the bit shifting procedure, it is demonstrated here that the application of a current of inverse polarity during the DW relaxing time may reduce such latencies. The reverse current must be sufficiently high as to drive the DW to the equilibrium position faster than the anisotropy slope itself, but with an amplitude sufficiently low as to avoid DW backward shifting. Alternatively, it is possible to use such a reverse current to increase the proper range of operation for a given relaxing time, i.e., the pair of values of the current amplitude and pulse time that ensures single DW jumps for a certain latency time.

Core-Shell Zn x Cd1- x Se/Zn y Cd1- y Se Quantum Dots for Nonvolatile Memory and Electroluminescent Device Applications

NASA Astrophysics Data System (ADS)

Al-Amoody, Fuad; Suarez, Ernesto; Rodriguez, Angel; Heller, E.; Huang, Wenli; Jain, F.

2011-08-01

This paper presents a floating quantum dot (QD) gate nonvolatile memory device using high-energy-gap Zn y Cd1- y Se-cladded Zn x Cd1- x Se quantum dots ( y > x) with tunneling layers comprising nearly lattice-matched semiconductors (e.g., ZnS/ZnMgS) on Si channels. Also presented is the fabrication of an electroluminescent (EL) device with embedded cladded ZnCdSe quantum dots. These ZnCdSe quantum dots were embedded between indium tin oxide (ITO) on glass and a top Schottky metal electrode deposited on a thin CsF barrier. These QDs, which were nucleated in a photo-assisted microwave plasma (PMP) metalorganic chemical vapor deposition (MOCVD) reactor, were grown between the source and drain regions on a p-type silicon substrate of the nonvolatile memory device. The composition of QD cladding, which relates to the value of y in Zn y Cd1- y Se, was engineered by the intensity of ultraviolet light, which controlled the incorporation of zinc in ZnCdSe. The QD quality is comparable to those deposited by other methods. Characteristics and modeling of the II-VI quantum dots as well as two diverse types of devices are presented in this paper.

In-situ, In-Memory Stateful Vector Logic Operations based on Voltage Controlled Magnetic Anisotropy.

PubMed

Jaiswal, Akhilesh; Agrawal, Amogh; Roy, Kaushik

2018-04-10

Recently, the exponential increase in compute requirements demanded by emerging applications like artificial intelligence, Internet of things, etc. have rendered the state-of-art von-Neumann machines inefficient in terms of energy and throughput owing to the well-known von-Neumann bottleneck. A promising approach to mitigate the bottleneck is to do computations as close to the memory units as possible. One extreme possibility is to do in-situ Boolean logic computations by using stateful devices. Stateful devices are those that can act both as a compute engine and storage device, simultaneously. We propose such stateful, vector, in-memory operations using voltage controlled magnetic anisotropy (VCMA) effect in magnetic tunnel junctions (MTJ). Our proposal is based on the well known manufacturable 1-transistor - 1-MTJ bit-cell and does not require any modifications in the bit-cell circuit or the magnetic device. Instead, we leverage the very physics of the VCMA effect to enable stateful computations. Specifically, we exploit the voltage asymmetry of the VCMA effect to construct stateful IMP (implication) gate and use the precessional switching dynamics of the VCMA devices to propose a massively parallel NOT operation. Further, we show that other gates like AND, OR, NAND, NOR, NIMP (complement of implication) can be implemented using multi-cycle operations.

Investigating the origins of high multilevel resistive switching in forming free Ti/TiO2-x-based memory devices through experiments and simulations

NASA Astrophysics Data System (ADS)

Bousoulas, P.; Giannopoulos, I.; Asenov, P.; Karageorgiou, I.; Tsoukalas, D.

2017-03-01

Although multilevel capability is probably the most important property of resistive random access memory (RRAM) technology, it is vulnerable to reliability issues due to the stochastic nature of conducting filament (CF) creation. As a result, the various resistance states cannot be clearly distinguished, which leads to memory capacity failure. In this work, due to the gradual resistance switching pattern of TiO2-x-based RRAM devices, we demonstrate at least six resistance states with distinct memory margin and promising temporal variability. It is shown that the formation of small CFs with high density of oxygen vacancies enhances the uniformity of the switching characteristics in spite of the random nature of the switching effect. Insight into the origin of the gradual resistance modulation mechanisms is gained by the application of a trap-assisted-tunneling model together with numerical simulations of the filament formation physical processes.

Investigation of single crystal ferrite thin films

NASA Technical Reports Server (NTRS)

Mee, J. E.; Besser, P. J.; Elkins, P. E.; Glass, H. L.; Whitcomb, E. C.

1972-01-01

Materials suitable for use in magnetic bubble domain memories were developed for aerospace applications. Practical techniques for the preparation of such materials in forms required for fabrication of computer memory devices were considered. The materials studied were epitaxial films of various compositions of the gallium-substituted yttrium gadolinium iron garnet system. The major emphasis was to determine their bubble properties and the conditions necessary for growing uncracked, high quality films.

Thermally driven microfluidic pumping via reversible shape memory polymers

NASA Astrophysics Data System (ADS)

Robertson, J. M.; Rodriguez, R. X.; Holmes, L. R., Jr.; Mather, P. T.; Wetzel, E. D.

2016-08-01

The need exists for autonomous microfluidic pumping systems that utilize environmental cues to transport fluid within a network of channels for such purposes as heat distribution, self-healing, or optical reconfiguration. Here, we report on reversible thermally driven microfluidic pumping enabled by two-way shape memory polymers. After developing a suitable shape memory polymer (SMP) through variation in the crosslink density, thin and flexible microfluidic devices were constructed by lamination of plastic films with channels defined by laser-cutting of double-sided adhesive film. SMP blisters integrated into the devices provide thermally driven pumping, while opposing elastic blisters are used to generate backpressure for reversible operation. Thermal cycling of the device was found to drive reversible fluid flow: upon heating to 60 °C, the SMP rapidly contracted to fill the surface channels with a transparent fluid, and upon cooling to 8 °C the flow reversed and the channel re-filled with black ink. Combined with a metallized backing layer, this device results in refection of incident light at high temperatures and absorption of light (at the portions covered with channels) at low temperatures. We discuss power-free, autonomous applications ranging from thermal regulation of structures to thermal indication via color change.

Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

NASA Astrophysics Data System (ADS)

Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

2016-04-01

The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

NASA Astrophysics Data System (ADS)

Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

2016-05-01

The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr00505e

Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell

NASA Astrophysics Data System (ADS)

Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

2016-06-01

Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr03169b

An Adaptive Memory Interface Controller for Improving Bandwidth Utilization of Hybrid and Reconfigurable Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Castellana, Vito G.; Tumeo, Antonino; Ferrandi, Fabrizio

Emerging applications such as data mining, bioinformatics, knowledge discovery, social network analysis are irregular. They use data structures based on pointers or linked lists, such as graphs, unbalanced trees or unstructures grids, which generates unpredictable memory accesses. These data structures usually are large, but difficult to partition. These applications mostly are memory bandwidth bounded and have high synchronization intensity. However, they also have large amounts of inherent dynamic parallelism, because they potentially perform a task for each one of the element they are exploring. Several efforts are looking at accelerating these applications on hybrid architectures, which integrate general purpose processorsmore » with reconfigurable devices. Some solutions, which demonstrated significant speedups, include custom-hand tuned accelerators or even full processor architectures on the reconfigurable logic. In this paper we present an approach for the automatic synthesis of accelerators from C, targeted at irregular applications. In contrast to typical High Level Synthesis paradigms, which construct a centralized Finite State Machine, our approach generates dynamically scheduled hardware components. While parallelism exploitation in typical HLS-generated accelerators is usually bound within a single execution flow, our solution allows concurrently running multiple execution flow, thus also exploiting the coarser grain task parallelism of irregular applications. Our approach supports multiple, multi-ported and distributed memories, and atomic memory operations. Its main objective is parallelizing as many memory operations as possible, independently from their execution time, to maximize the memory bandwidth utilization. This significantly differs from current HLS flows, which usually consider a single memory port and require precise scheduling of memory operations. A key innovation of our approach is the generation of a memory interface controller, which dynamically maps concurrent memory accesses to multiple ports. We present a case study on a typical irregular kernel, Graph Breadth First search (BFS), exploring different tradeoffs in terms of parallelism and number of memories.« less

Reconfigurable pipelined processor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saccardi, R.J.

1989-09-19

This patent describes a reconfigurable pipelined processor for processing data. It comprises: a plurality of memory devices for storing bits of data; a plurality of arithmetic units for performing arithmetic functions with the data; cross bar means for connecting the memory devices with the arithmetic units for transferring data therebetween; at least one counter connected with the cross bar means for providing a source of addresses to the memory devices; at least one variable tick delay device connected with each of the memory devices and arithmetic units; and means for providing control bits to the variable tick delay device formore » variably controlling the input and output operations thereof to selectively delay the memory devices and arithmetic units to align the data for processing in a selected sequence.« less

Exploiting spatio-temporal characteristics of human vision for mobile video applications

NASA Astrophysics Data System (ADS)

Jillani, Rashad; Kalva, Hari

2008-08-01

Video applications on handheld devices such as smart phones pose a significant challenge to achieve high quality user experience. Recent advances in processor and wireless networking technology are producing a new class of multimedia applications (e.g. video streaming) for mobile handheld devices. These devices are light weight and have modest sizes, and therefore very limited resources - lower processing power, smaller display resolution, lesser memory, and limited battery life as compared to desktop and laptop systems. Multimedia applications on the other hand have extensive processing requirements which make the mobile devices extremely resource hungry. In addition, the device specific properties (e.g. display screen) significantly influence the human perception of multimedia quality. In this paper we propose a saliency based framework that exploits the structure in content creation as well as the human vision system to find the salient points in the incoming bitstream and adapt it according to the target device, thus improving the quality of new adapted area around salient points. Our experimental results indicate that the adaptation process that is cognizant of video content and user preferences can produce better perceptual quality video for mobile devices. Furthermore, we demonstrated how such a framework can affect user experience on a handheld device.

Forced Ion Migration for Chalcogenide Phase Change Memory Device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2011-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2012-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Formation of SiGe nanocrystals embedded in Al2O3 for the application of write-once-read-many-times memory

NASA Astrophysics Data System (ADS)

Wu, Min-Lin; Wu, Yung-Hsien; Lin, Chia-Chun; Chen, Lun-Lun

2012-10-01

The structure of SiGe nanocrystals embedded in Al2O3 formed by sequential deposition of Al2O3/Si/Ge/Al2O3 and a subsequent annealing was confirmed by transmission electron microscopy and energy dispersive spectroscopy (EDS), and its application for write-once-read-many-times (WORM) memory devices was explored in this study. By applying a -10 V pulse for 1 s, a large amount of holes injected from Si substrate are stored in the nanocrystals and consequently, the current at +1.5 V increases by a factor of 104 as compared to that of the initial state. Even with a smaller -5 V pulse for 1 μs, a sufficiently large current ratio of 36 can still be obtained, verifying the low power operation. Since holes are stored in nanocrystals which are isolated from Si substrate by Al2O3 with good integrity and correspond to a large valence band offset with respect to Al2O3, desirable read endurance up to 105 cycles and excellent retention over 100 yr are achieved. Combining these promising characteristics, WORM memory devices are appropriate for high-performance archival storage applications.

Reduced distribution of threshold voltage shift in double layer NiSi2 nanocrystals for nano-floating gate memory applications.

PubMed

Choi, Sungjin; Lee, Junhyuk; Kim, Donghyoun; Oh, Seulki; Song, Wangyu; Choi, Seonjun; Choi, Eunsuk; Lee, Seung-Beck

2011-12-01

We report on the fabrication and capacitance-voltage characteristics of double layer nickel-silicide nanocrystals with Si3N4 interlayer tunnel barrier for nano-floating gate memory applications. Compared with devices using SiO2 interlayer, the use of Si3N4 interlayer separation reduced the average size (4 nm) and distribution (+/- 2.5 nm) of NiSi2 nanocrystal (NC) charge traps by more than 50% and giving a two fold increase in NC density to 2.3 x 10(12) cm(-2). The increased density and reduced NC size distribution resulted in a significantly decrease in the distribution of the device C-V characteristics. For each program voltage, the distribution of the shift in the threshold voltage was reduced by more than 50% on average to less than 0.7 V demonstrating possible multi-level-cell operation.

Development and characterization of a ferroelectric non-volatile memory for flexible electronics

NASA Astrophysics Data System (ADS)

Mao, Duo

Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P(VDF-TrFE) ferroelectric capacitor for a one-transistor-one-capacitor (1T1C) memory cell. The 1T1C devices were fabricated at low temperature and demonstrated a memory window (DeltaVBL) of 2.3 V and 3.5 V, depending on the device dimensions. Next, FRAM arrays (4-bit, 16-bit and 64-bit) based on the two-transistor-two-capacitor (2T2C) memory cell architecture were designed and fabricated using a photolithographic process with 9 masks. The fabricated FRAM arrays were packaged in 28-pin ceramic packages. The read/write schemes were developed and the FRAM arrays show successful program and erase with a memory window of approximately 1 V at the output of the sense amplifier.

Architecture of security management unit for safe hosting of multiple agents

NASA Astrophysics Data System (ADS)

Gilmont, Tanguy; Legat, Jean-Didier; Quisquater, Jean-Jacques

1999-04-01

In such growing areas as remote applications in large public networks, electronic commerce, digital signature, intellectual property and copyright protection, and even operating system extensibility, the hardware security level offered by existing processors is insufficient. They lack protection mechanisms that prevent the user from tampering critical data owned by those applications. Some devices make exception, but have not enough processing power nor enough memory to stand up to such applications (e.g. smart cards). This paper proposes an architecture of secure processor, in which the classical memory management unit is extended into a new security management unit. It allows ciphered code execution and ciphered data processing. An internal permanent memory can store cipher keys and critical data for several client agents simultaneously. The ordinary supervisor privilege scheme is replaced by a privilege inheritance mechanism that is more suited to operating system extensibility. The result is a secure processor that has hardware support for extensible multitask operating systems, and can be used for both general applications and critical applications needing strong protection. The security management unit and the internal permanent memory can be added to an existing CPU core without loss of performance, and do not require it to be modified.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

An upconverted photonic nonvolatile memory.

PubMed

Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L

2014-08-21

Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

Reconfigurable and Reprocessable Thermoset Shape Memory Polymer with Synergetic Triple Dynamic Covalent Bonds.

PubMed

Wang, Yongwei; Pan, Yi; Zheng, Zhaohui; Ding, Xiaobin

2018-04-20

Degradable shape memory polymers (SMPs), especially for polyurethane-based SMPs, have shown great potential for biomedical applications. How to reasonably fabricate SMPs with the ideal combination of degradability, shape reconfigurability, and reprocessability is a critical issue and remains a challenge for medical disposable materials. Herein, a shape memory poly(urethane-urea) with synergetic triple dynamic covalent bonds is reported via embedding polycaprolactone unit into poly(urethane-urea) with the hindered urea dynamic bond. The single polymer network is biodegradable, thermadapt, and reprocessable, without sacrificing the outstanding shape memory performance. Such a shape memory network with plasticity and reprocessability is expected to have significant and positive impact on the medical device industry. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nanoscale phase change memory materials.

PubMed

Caldwell, Marissa A; Jeyasingh, Rakesh Gnana David; Wong, H-S Philip; Milliron, Delia J

2012-08-07

Phase change memory materials store information through their reversible transitions between crystalline and amorphous states. For typical metal chalcogenide compounds, their phase transition properties directly impact critical memory characteristics and the manipulation of these is a major focus in the field. Here, we discuss recent work that explores the tuning of such properties by scaling the materials to nanoscale dimensions, including fabrication and synthetic strategies used to produce nanoscale phase change memory materials. The trends that emerge are relevant to understanding how such memory technologies will function as they scale to ever smaller dimensions and also suggest new approaches to designing materials for phase change applications. Finally, the challenges and opportunities raised by integrating nanoscale phase change materials into switching devices are discussed.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

Ionic current devices-Recent progress in the merging of electronic, microfluidic, and biomimetic structures.

PubMed

Koo, Hyung-Jun; Velev, Orlin D

2013-05-09

We review the recent progress in the emerging area of devices and circuits operating on the basis of ionic currents. These devices operate at the intersection of electrochemistry, electronics, and microfluidics, and their potential applications are inspired by essential biological processes such as neural transmission. Ionic current rectification has been demonstrated in diode-like devices containing electrolyte solutions, hydrogel, or hydrated nanofilms. More complex functions have been realized in ionic current based transistors, solar cells, and switching memory devices. Microfluidic channels and networks-an intrinsic component of the ionic devices-could play the role of wires and circuits in conventional electronics.

Shape memory polymer network with thermally distinct elasticity and plasticity.

PubMed

Zhao, Qian; Zou, Weike; Luo, Yingwu; Xie, Tao

2016-01-01

Stimuli-responsive materials with sophisticated yet controllable shape-changing behaviors are highly desirable for real-world device applications. Among various shape-changing materials, the elastic nature of shape memory polymers allows fixation of temporary shapes that can recover on demand, whereas polymers with exchangeable bonds can undergo permanent shape change via plasticity. We integrate the elasticity and plasticity into a single polymer network. Rational molecular design allows these two opposite behaviors to be realized at different temperature ranges without any overlap. By exploring the cumulative nature of the plasticity, we demonstrate easy manipulation of highly complex shapes that is otherwise extremely challenging. The dynamic shape-changing behavior paves a new way for fabricating geometrically complex multifunctional devices.

Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

2012-02-01

Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

Similarity between the response of memristive and memcapacitive circuits subjected to ramped voltage

NASA Astrophysics Data System (ADS)

Kanygin, Mikhail A.; Katkov, Mikhail V.; Pershin, Yuriy V.

2017-07-01

We report a similar feature in the response of resistor-memristor and capacitor-memcapacitor circuits with threshold-type memory devices driven by triangular waveform voltage. In both cases, the voltage across the memory device is stabilized during the switching of the memory device state. While in the memristive circuit this feature is observed when the applied voltage changes in one direction, the memcapacitive circuit with a ferroelectric memcapacitor demonstrates the voltage stabilization effect at both sweep directions. The discovered behavior of capacitor-memcapacitor circuit is also demonstrated experimentally. We anticipate that our observation can be used in the design of electronic circuits with emergent memory devices as well as in the identification and characterization of memory effects in threshold-type memory devices.

Interfacial interactions and their impact on redox-based resistive switching memories (ReRAMs)

NASA Astrophysics Data System (ADS)

Valov, Ilia

2017-09-01

Redox-based resistive switching memories are nowadays one of the most studied systems in both academia and industrial communities. These devices are scalable down to an almost atomic level and are supposed to be applicable not only for next-generation nonvolatile memories, but also for neuromorphic computing, alternative logic operations and selector devices. The main characteristic feature of these cells is their nano- to sub-nano dimension. This makes the control and especially prediction of their properties very challenging. One of the ways to achieve better understanding and to improve the control of these systems is to study and modify their interfaces. In this review, first the fundamentals will be discussed, as these are essential for understanding which factors control the nanoscale interface properties. Further, different types of interactions at the electrode/solid electrolyte interface reported for ECM- and VCM-type cells will be exemplarily shown. Finally, the strategies and different solutions used to modify the interfaces and overcome the existing problems on the way to more stable and reliable devices will be highlighted.

Design and Clinical Application of Proximal Humerus Memory Connector

NASA Astrophysics Data System (ADS)

Xu, Shuo-Gui; Zhang, Chun-Cai

2011-02-01

Treatment for comminuted proximal humerus fractures and nonunions are a substantial challenge for orthopedic surgeons. Plate and screw fixation does not provide enough stability to allow patients to begin functional exercises early after surgery. Using shape memory material nickel titanium alloy, we designed a new device for treating severe comminuted proximal humerus fractures that accommodates for the anatomical features of the proximal humerus. Twenty-two cases of comminuted fracture, malunion, and nonunion of the proximal humerus were treated with the proximal humeral memory connector (PHMC). No external fixation was needed after the operation and patients began active shoulder exercises an average of 8 days after the operation. Follow-up evaluation (mean 18.5 months) revealed that bone healing with lamellar bone formation occurred an average of 3.6 months after surgery for the fracture cases and 4.5 months after surgery for the nonunion cases. Average shoulder function was 88.5 according to the criteria of Michael Reese. PHMC is an effective new device to treat comminuted proximal humerus fractures and nonunions. The use of this device may reduce the need for shoulder joint arthroplasty.

Oxide-based materials by atomic layer deposition

NASA Astrophysics Data System (ADS)

Godlewski, Marek; Pietruszka, Rafał; Kaszewski, Jarosław; Witkowski, Bartłomiej S.; Gierałtowska, Sylwia; Wachnicki, Łukasz; Godlewski, Michał M.; Slonska, Anna; Gajewski, Zdzisław

2017-02-01

Thin films of wide band-gap oxides grown by Atomic Layer Deposition (ALD) are suitable for a range of applications. Some of these applications will be presented. First of all, ALD-grown high-k HfO2 is used as a gate oxide in the electronic devices. Moreover, ALD-grown oxides can be used in memory devices, in transparent transistors, or as elements of solar cells. Regarding photovoltaics (PV), ALD-grown thin films of Al2O3 are already used as anti-reflection layers. In addition, thin films of ZnO are tested as replacement of ITO in PV devices. New applications in organic photovoltaics, electronics and optoelectronics are also demonstrated Considering new applications, the same layers, as used in electronics, can also find applications in biology, medicine and in a food industry. This is because layers of high-k oxides show antibacterial activity, as discussed in this work.

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

DOEpatents

Asaad, Sameh W.; Kapur, Mohit

2016-03-15

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

Memory and Spin Injection Devices Involving Half Metals

DOE PAGES

Shaughnessy, M.; Snow, Ryan; Damewood, L.; ...

2011-01-01

We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

NASA Technical Reports Server (NTRS)

Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)

2000-01-01

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

High-Performance Flexible Organic Nano-Floating Gate Memory Devices Functionalized with Cobalt Ferrite Nanoparticles.

PubMed

Jung, Ji Hyung; Kim, Sunghwan; Kim, Hyeonjung; Park, Jongnam; Oh, Joon Hak

2015-10-07

Nano-floating gate memory (NFGM) devices are transistor-type memory devices that use nanostructured materials as charge trap sites. They have recently attracted a great deal of attention due to their excellent performance, capability for multilevel programming, and suitability as platforms for integrated circuits. Herein, novel NFGM devices have been fabricated using semiconducting cobalt ferrite (CoFe2O4) nanoparticles (NPs) as charge trap sites and pentacene as a p-type semiconductor. Monodisperse CoFe2O4 NPs with different diameters have been synthesized by thermal decomposition and embedded in NFGM devices. The particle size effects on the memory performance have been investigated in terms of energy levels and particle-particle interactions. CoFe2O4 NP-based memory devices exhibit a large memory window (≈73.84 V), a high read current on/off ratio (read I(on)/I(off)) of ≈2.98 × 10(3), and excellent data retention. Fast switching behaviors are observed due to the exceptional charge trapping/release capability of CoFe2O4 NPs surrounded by the oleate layer, which acts as an alternative tunneling dielectric layer and simplifies the device fabrication process. Furthermore, the NFGM devices show excellent thermal stability, and flexible memory devices fabricated on plastic substrates exhibit remarkable mechanical and electrical stability. This study demonstrates a viable means of fabricating highly flexible, high-performance organic memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Extended write combining using a write continuation hint flag

DOEpatents

Chen, Dong; Gara, Alan; Heidelberger, Philip; Ohmacht, Martin; Vranas, Pavlos

2013-06-04

A computing apparatus for reducing the amount of processing in a network computing system which includes a network system device of a receiving node for receiving electronic messages comprising data. The electronic messages are transmitted from a sending node. The network system device determines when more data of a specific electronic message is being transmitted. A memory device stores the electronic message data and communicating with the network system device. A memory subsystem communicates with the memory device. The memory subsystem stores a portion of the electronic message when more data of the specific message will be received, and the buffer combines the portion with later received data and moves the data to the memory device for accessible storage.

Modeling of Nano-Scale Transistors and Memory Devices for Low Power Applications

NASA Astrophysics Data System (ADS)

Cao, Xi

As the featuring size of transistors scaled down to sub-20 nm, the continuous scaling of power has become one of the main challenges of the semiconductor industry. The power issue is raised by the barely scalable supply voltage and a limitation on the subthreshold swing (SS) of conventional metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, self-consistent quantum transport device simulators are developed to examine the nanoscale transistors based on black phosphorus (BP) materials. The scaling limit of double-gated BP MOSFETs is assessed. To reduce the SS below the thermionic limit for ultra-steep switching, tunnel FETs (TFETs) and vertical ballistic impact ionization FETs based on BP and its heterojunctions are investigated. Furthermore, the ferroelectric tunneling junction (FTJ) is modeled and examined for potential low power memory applications. For BP MOSFETs, the device physics at the ultimate scaling limit are examined. The performance of monolayer BP MOSFETs is projected to sub-10 nm and compared with the International Technology Roadmap for Semiconductors (ITRS) requirements. And the interplay of quantum mechanical effects and the highly anisotropic bandstructure of BP at this scale is investigated. By choice of layer number and crystalline direction, BP materials can offer a range of bandgap and effective mass values, which is attractive for TFET applications. Therefore, scaling behaviors of BP TFETs near and below the 10 nm scale are studied. The gate oxide thickness scaling and the effect of high-k dielectric are compared between the TFETs and the MOSFETs. For the TFETs with the gate lengths beyond 10 nm and at the sub-10 nm scale, the direct-source-to-drain tunneling issues are evaluated, and different strategies to achieve ultra-steep switching are specified. In a sub-10 nm graphene-BP-graphene heterojunction transistor, the sharp turnon behavior was observed, under a small source-drain bias of 0.1 V. The fast switch is attributed to a ballistic energy-dependent impact ionization mechanism. A device model is developed, which shows agreement with experiment results. The model is applied to explore the gate oxide scaling behavior and the effect of graphene doping, and to optimize the device for low power applications. Finally, to keep the integrity of the computing system, the FTJ is studied for its possible use as a low power memory device. A compact model for FTJ, dealing with both static and dynamic behaviors, is developed and compared with experimental data. The write energy consumed by the memory cell, comprising one transistor and one FTJ, is estimated by applying the compact model to circuit simulation. And a way to reduce the write energy is suggested.

RF assisted switching in magnetic Josephson junctions

NASA Astrophysics Data System (ADS)

Caruso, R.; Massarotti, D.; Bolginov, V. V.; Ben Hamida, A.; Karelina, L. N.; Miano, A.; Vernik, I. V.; Tafuri, F.; Ryazanov, V. V.; Mukhanov, O. A.; Pepe, G. P.

2018-04-01

We test the effect of an external RF field on the switching processes of magnetic Josephson junctions (MJJs) suitable for the realization of fast, scalable cryogenic memories compatible with Single Flux Quantum logic. We show that the combined application of microwaves and magnetic field pulses can improve the performances of the device, increasing the separation between the critical current levels corresponding to logical "0" and "1." The enhancement of the current level separation can be as high as 80% using an optimal set of parameters. We demonstrate that external RF fields can be used as an additional tool to manipulate the memory states, and we expect that this approach may lead to the development of new methods of selecting MJJs and manipulating their states in memory arrays for various applications.

One‐Dimensional Ferroelectric Nanostructures: Synthesis, Properties, and Applications

PubMed Central

Liang, Longyue; Kang, Xueliang

2016-01-01

One‐dimensional (1D) ferroelectric nanostructures, such as nanowires, nanorods, nanotubes, nanobelts, and nanofibers, have been studied with increasing intensity in recent years. Because of their excellent ferroelectric, ferroelastic, pyroelectric, piezoelectric, inverse piezoelectric, ferroelectric‐photovoltaic (FE‐PV), and other unique physical properties, 1D ferroelectric nanostructures have been widely used in energy‐harvesting devices, nonvolatile random access memory applications, nanoelectromechanical systems, advanced sensors, FE‐PV devices, and photocatalysis mechanisms. This review summarizes the current state of 1D ferroelectric nanostructures and provides an overview of the synthesis methods, properties, and practical applications of 1D nanostructures. Finally, the prospects for future investigations are outlined. PMID:27812477

Conducting Polymeric Hydrogel Electrolyte Based on Carboxymethylcellulose and Polyacrylamide/Polyaniline for Supercapacitor Applications

NASA Astrophysics Data System (ADS)

Suganya, N.; Jaisankar, V.; Sivakumar, E. K. T.

Conducting polymer hydrogels represent a unique class of materials that possess enormous application in flexible electronic devices. In the present work, conducting carboxymethylcellulose (CMC)-co-polyacrylamide (PAAm)/polyaniline was synthesized by a two-step interpenetrating network solution polymerization technique. The synthesized CMC-co-PAAm/polyaniline with interpenetrating network structure was prepared by in situ polymerization of aniline to enhance conductivity. The molecular structure and morphology of the copolymer hydrogels were characterized by Fourier transform infrared spectroscopy and scanning electron microscopy. The novel conducting polymer hydrogels show good electrical and electrochemical behavior, which makes them potentially useful in electronic devices such as supercapacitors, biosensors, bioelectronics, solar cells and memory devices.

Effects of device size and material on the bending performance of resistive-switching memory devices fabricated on flexible substrates

NASA Astrophysics Data System (ADS)

Lee, Won-Ho; Yoon, Sung-Min

2017-05-01

The resistive change memory (RCM) devices using amorphous In-Ga-Zn-O (IGZO) and microcrystalline Al-doped ZnO (AZO) thin films were fabricated on plastic substrates and characterized for flexible electronic applications. The device cell sizes were varied to 25 × 25, 50 × 50, 100 × 100, and 200 × 200 μm2 to examine the effects of cell size on the resistive-switching (RS) behaviors at a flat state and under bending conditions. First, it was found that the high-resistance state programmed currents markedly increased with the increase in the cell size. Second, while the AZO RCM devices did not exhibit RESET operations at a curvature radius smaller than 8.0 mm, the IGZO RCM devices showed sound RS behaviors even at a curvature radius of 4.5 mm. Third, for the IGZO RCM devices with the cell size bigger than 100 × 100 μm2, the RESET operation could not be performed at a curvature radius smaller than 6.5 mm. Thus, it was elucidated that the RS characteristics of the flexible RCM devices using oxide semiconductor thin films were closely related to the types of RS materials and the cell size of the device.

Reconfigurable photonic crystals enabled by pressure-responsive shape-memory polymers

PubMed Central

Fang, Yin; Ni, Yongliang; Leo, Sin-Yen; Taylor, Curtis; Basile, Vito; Jiang, Peng

2015-01-01

Smart shape-memory polymers can memorize and recover their permanent shape in response to an external stimulus (for example, heat). They have been extensively exploited for a wide spectrum of applications ranging from biomedical devices to aerospace morphing structures. However, most of the existing shape-memory polymers are thermoresponsive and their performance is hindered by heat-demanding programming and recovery steps. Although pressure is an easily adjustable process variable such as temperature, pressure-responsive shape-memory polymers are largely unexplored. Here we report a series of shape-memory polymers that enable unusual ‘cold' programming and instantaneous shape recovery triggered by applying a contact pressure at ambient conditions. Moreover, the interdisciplinary integration of scientific principles drawn from two disparate fields—the fast-growing photonic crystal and shape-memory polymer technologies—enables fabrication of reconfigurable photonic crystals and simultaneously provides a simple and sensitive optical technique for investigating the intriguing shape-memory effects at nanoscale. PMID:26074349

Satellite Test of Radiation Impact on Ramtron 512K FRAM

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Sayyah, Rana; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

2009-01-01

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

Shape Memory Polymers Containing Higher Acrylate Content Display Increased Endothelial Cell Attachment

PubMed Central

Govindarajan, Tina; Shandas, Robin

2018-01-01

Shape Memory Polymers (SMPs) are smart materials that can recall their shape upon the application of a stimulus, which makes them appealing materials for a variety of applications, especially in biomedical devices. Most prior SMP research has focused on tuning bulk properties; studying surface effects of SMPs may extend the use of these materials to blood-contacting applications, such as cardiovascular stents, where surfaces that support rapid endothelialization have been correlated to stent success. Here, we evaluate endothelial attachment onto the surfaces of a family of SMPs previously developed in our group that have shown promise for biomedical devices. Nine SMP formulations containing varying amounts of tert-Butyl acrylate (tBA) and Poly(ethylene glycol) dimethacrylate (PEGDMA) were analyzed for endothelial cell attachment. Dynamic mechanical analysis (DMA), contact angle studies, and atomic force microscopy (AFM) were used to verify bulk and surface properties of the SMPs. Human umbilical vein endothelial cell (HUVEC) attachment and viability was verified using fluorescent methods. Endothelial cells preferentially attached to SMPs with higher tBA content, which have rougher, more hydrophobic surfaces. HUVECs also displayed an increased metabolic activity on these high tBA SMPs over the course of the study. This class of SMPs may be promising candidates for next generation blood-contacting devices. PMID:29707382

Characterization of mechanical properties of pseudoelastic shape memory alloys under harmonic excitation

NASA Astrophysics Data System (ADS)

Böttcher, J.; Jahn, M.; Tatzko, S.

2017-12-01

Pseudoelastic shape memory alloys exhibit a stress-induced phase transformation which leads to high strains during deformation of the material. The stress-strain characteristic during this thermomechanical process is hysteretic and results in the conversion of mechanical energy into thermal energy. This energy conversion allows for the use of shape memory alloys in vibration reduction. For the application of shape memory alloys as vibration damping devices a dynamic modeling of the material behavior is necessary. In this context experimentally determined material parameters which accurately represent the material behavior are essential for a reliable material model. Subject of this publication is the declaration of suitable material parameters for pseudoelastic shape memory alloys and the methodology of their identification from experimental investigations. The used test rig was specifically designed for the characterization of pseudoelastic shape memory alloys.

Shape‐Controlled, Self‐Wrapped Carbon Nanotube 3D Electronics

PubMed Central

Wang, Huiliang; Wang, Yanming; Tee, Benjamin C.‐K.; Kim, Kwanpyo; Lopez, Jeffrey; Cai, Wei

2015-01-01

The mechanical flexibility and structural softness of ultrathin devices based on organic thin films and low‐dimensional nanomaterials have enabled a wide range of applications including flexible display, artificial skin, and health monitoring devices. However, both living systems and inanimate systems that are encountered in daily lives are all 3D. It is therefore desirable to either create freestanding electronics in a 3D form or to incorporate electronics onto 3D objects. Here, a technique is reported to utilize shape‐memory polymers together with carbon nanotube flexible electronics to achieve this goal. Temperature‐assisted shape control of these freestanding electronics in a programmable manner is demonstrated, with theoretical analysis for understanding the shape evolution. The shape control process can be executed with prepatterned heaters, desirable for 3D shape formation in an enclosed environment. The incorporation of carbon nanotube transistors, gas sensors, temperature sensors, and memory devices that are capable of self‐wrapping onto any irregular shaped‐objects without degradations in device performance is demonstrated. PMID:27980972

(Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, X.; Mamaluy, D.; Cyr, E. C.

As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. In orderTo facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. Moreover, the model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device ismore » determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.« less

(Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices

DOE PAGES

Gao, X.; Mamaluy, D.; Cyr, E. C.; ...

2016-05-10

As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. In orderTo facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. Moreover, the model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device ismore » determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.« less

Two-Way Communication Using RFID Equipment and Techniques

NASA Technical Reports Server (NTRS)

Jedry, Thomas; Archer, Eric

2007-01-01

Equipment and techniques used in radio-frequency identification (RFID) would be extended, according to a proposal, to enable short-range, two-way communication between electronic products and host computers. In one example of a typical contemplated application, the purpose of the short-range radio communication would be to transfer image data from a user s digital still or video camera to the user s computer for recording and/or processing. The concept is also applicable to consumer electronic products other than digital cameras (for example, cellular telephones, portable computers, or motion sensors in alarm systems), and to a variety of industrial and scientific sensors and other devices that generate data. Until now, RFID has been used to exchange small amounts of mostly static information for identifying and tracking assets. Information pertaining to an asset (typically, an object in inventory to be tracked) is contained in miniature electronic circuitry in an RFID tag attached to the object. Conventional RFID equipment and techniques enable a host computer to read data from and, in some cases, to write data to, RFID tags, but they do not enable such additional functions as sending commands to, or retrieving possibly large quantities of dynamic data from, RFID-tagged devices. The proposal would enable such additional functions. The figure schematically depicts an implementation of the proposal for a sensory device (e.g., a digital camera) that includes circuitry that converts sensory information to digital data. In addition to the basic sensory device, there would be a controller and a memory that would store the sensor data and/or data from the controller. The device would also be equipped with a conventional RFID chipset and antenna, which would communicate with a host computer via an RFID reader. The controller would function partly as a communication interface, implementing two-way communication protocols at all levels (including RFID if needed) between the sensory device and the memory and between the host computer and the memory. The controller would perform power V

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

NASA Astrophysics Data System (ADS)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

Parallel design patterns for a low-power, software-defined compressed video encoder

NASA Astrophysics Data System (ADS)

Bruns, Michael W.; Hunt, Martin A.; Prasad, Durga; Gunupudi, Nageswara R.; Sonachalam, Sekar

2011-06-01

Video compression algorithms such as H.264 offer much potential for parallel processing that is not always exploited by the technology of a particular implementation. Consumer mobile encoding devices often achieve real-time performance and low power consumption through parallel processing in Application Specific Integrated Circuit (ASIC) technology, but many other applications require a software-defined encoder. High quality compression features needed for some applications such as 10-bit sample depth or 4:2:2 chroma format often go beyond the capability of a typical consumer electronics device. An application may also need to efficiently combine compression with other functions such as noise reduction, image stabilization, real time clocks, GPS data, mission/ESD/user data or software-defined radio in a low power, field upgradable implementation. Low power, software-defined encoders may be implemented using a massively parallel memory-network processor array with 100 or more cores and distributed memory. The large number of processor elements allow the silicon device to operate more efficiently than conventional DSP or CPU technology. A dataflow programming methodology may be used to express all of the encoding processes including motion compensation, transform and quantization, and entropy coding. This is a declarative programming model in which the parallelism of the compression algorithm is expressed as a hierarchical graph of tasks with message communication. Data parallel and task parallel design patterns are supported without the need for explicit global synchronization control. An example is described of an H.264 encoder developed for a commercially available, massively parallel memorynetwork processor device.

Electric-field-controlled interface dipole modulation for Si-based memory devices.

PubMed

Miyata, Noriyuki

2018-05-31

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Distributed multiport memory architecture

NASA Technical Reports Server (NTRS)

Kohl, W. H. (Inventor)

1983-01-01

A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

Tunable bandgap energy of fluorinated nanocrystals for flash memory applications produced by low-damage plasma treatment.

PubMed

Huang, Chi-Hsien; Lin, Chih-Ting; Wang, Jer-Chyi; Chou, Chien; Ye, Yu-Ren; Cheng, Bing-Ming; Lai, Chao-Sung

2012-11-30

A plasma system with a complementary filter to shield samples from damage during tetrafluoromethane (CF(4)) plasma treatment was proposed in order to incorporate fluorine atoms into gadolinium oxide nanocrystals (Gd(2)O(3)-NCs) for flash memory applications. X-ray photoelectron spectroscopy confirmed that fluorine atoms were successfully introduced into the Gd(2)O(3)-NCs despite the use of a filter in the plasma-enhanced chemical vapour deposition system to shield against several potentially damaging species. The number of incorporated fluorine atoms can be controlled by varying the treatment time. The optimized memory window of the resulting flash memory devices was twice that of devices treated by a filterless system because more fluorine atoms were incorporated into the Gd(2)O(3)-NCs film with very little damage. This enlarged the bandgap energy from 5.48 to 6.83 eV, as observed by ultraviolet absorption measurements. This bandgap expansion can provide a large built-in electric field that allows more charges to be stored in the Gd(2)O(3)-NCs. The maximum improvement in the retention characteristic was >60%. Because plasma damage during treatment is minimal, maximum fluorination can be achieved. The concept of simply adding a filter to a plasma system to prevent plasma damage exhibits great promise for functionalization or modification of nanomaterials for advanced nanoelectronics while introducing minimal defects.

Memory device for two-dimensional radiant energy array computers

NASA Technical Reports Server (NTRS)

Schaefer, D. H.; Strong, J. P., III (Inventor)

1977-01-01

A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

Scalability of voltage-controlled filamentary and nanometallic resistance memory devices.

PubMed

Lu, Yang; Lee, Jong Ho; Chen, I-Wei

2017-08-31

Much effort has been devoted to device and materials engineering to realize nanoscale resistance random access memory (RRAM) for practical applications, but a rational physical basis to be relied on to design scalable devices spanning many length scales is still lacking. In particular, there is no clear criterion for switching control in those RRAM devices in which resistance changes are limited to localized nanoscale filaments that experience concentrated heat, electric current and field. Here, we demonstrate voltage-controlled resistance switching, always at a constant characteristic critical voltage, for macro and nanodevices in both filamentary RRAM and nanometallic RRAM, and the latter switches uniformly and does not require a forming process. As a result, area-scalability can be achieved under a device-area-proportional current compliance for the low resistance state of the filamentary RRAM, and for both the low and high resistance states of the nanometallic RRAM. This finding will help design area-scalable RRAM at the nanoscale. It also establishes an analogy between RRAM and synapses, in which signal transmission is also voltage-controlled.

Acoustical holographic recording with coherent optical read-out and image processing

NASA Astrophysics Data System (ADS)

Liu, H. K.

1980-10-01

New acoustic holographic wave memory devices have been designed for real-time in-situ recording applications. The basic operating principles of these devices and experimental results through the use of some of the prototypes of the devices are presented. Recording media used in the device include thermoplastic resin, Crisco vegetable oil, and Wilson corn oil. In addition, nonlinear coherent optical image processing techniques including equidensitometry, A-D conversion, and pseudo-color, all based on the new contact screen technique, are discussed with regard to the enhancement of the normally poor-resolved acoustical holographic images.

The study of surface acoustic wave charge transfer device

NASA Technical Reports Server (NTRS)

Papanicolaou, N.; Lin, H. C.

1978-01-01

A surface acoustic wave-charge transfer device, consisting of an n-type silicon substrate, a thermally grown silicon dioxide layer, and a sputtered film of piezoelectric zinc oxide is proposed as a means of circumventing problems associated with charge-coupled device (CCD) applications in memory, signal processing, and imaging. The proposed device creates traveling longitudinal electric fields in the silicon and replaces the multiphase clocks in CCD's. The traveling electric fields create potential wells which carry along charges stored there. These charges may be injected into the wells by light or by using a p-n junction as in conventional CCD's.

A Facile and General Approach to Recoverable High-Strain Multishape Shape Memory Polymers.

PubMed

Li, Xingjian; Pan, Yi; Zheng, Zhaohui; Ding, Xiaobin

2018-03-01

Fabricating a single polymer network with no need to design complex structures to achieve an ideal combination of tunable high-strain multiple-shape memory effects and highly recoverable shape memory property is a great challenge for the real applications of advanced shape memory devices. Here, a facile and general approach to recoverable high-strain multishape shape memory polymers is presented via a random copolymerization of acrylate monomers and a chain-extended multiblock copolymer crosslinker. As-prepared shape memory networks show a large width at the half-peak height of the glass transition, far wider than current classical multishape shape memory polymers. A combination of tunable high-strain multishape memory effect and as high as 1000% recoverable strain in a single chemical-crosslinking network can be obtained. To the best of our knowledge, this is the first thermosetting material with a combination of highly recoverable strain and tunable high-strain multiple-shape memory effects. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Stretchable carbon nanotube charge-trap floating-gate memory and logic devices for wearable electronics.

PubMed

Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong

2015-05-26

Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.

Revealing the glass transition in shape memory polymers using Brillouin spectroscopy.

PubMed

Steelman, Zachary A; Weems, Andrew C; Traverso, Andrew J; Szafron, Jason M; Maitland, Duncan J; Yakovlev, Vladislav V

2017-12-11

Emerging medical devices which employ shape memory polymers (SMPs) require precise measurements of the glass transition temperature (T g ) to ensure highly controlled shape recovery kinetics. Conventional techniques like differential scanning calorimetry (DSC) and dynamic mechanical analysis (DMA) have limitations that prevent utilization for certain devices, including limited accuracy and the need for sacrificial samples. In this report, we employ an approach based on Brillouin spectroscopy to probe the glass transition of SMPs rapidly, remotely, and nondestructively. Further, we compare the T g obtained from Brillouin scattering with DMA- and DSC-measured T g to demonstrate the accuracy of Brillouin scattering for this application. We conclude that Brillouin spectroscopy is an accurate technique for obtaining the glass transition temperature of SMPs, aligning closely with the most common laboratory standards while providing a rapid, remote, and nondestructive method for the analysis of unique polymeric medical devices.

Revealing the glass transition in shape memory polymers using Brillouin spectroscopy

NASA Astrophysics Data System (ADS)

Steelman, Zachary A.; Weems, Andrew C.; Traverso, Andrew J.; Szafron, Jason M.; Maitland, Duncan J.; Yakovlev, Vladislav V.

2017-12-01

Emerging medical devices which employ shape memory polymers (SMPs) require precise measurements of the glass transition temperature (Tg) to ensure highly controlled shape recovery kinetics. Conventional techniques like differential scanning calorimetry (DSC) and dynamic mechanical analysis (DMA) have limitations that prevent utilization for certain devices, including limited accuracy and the need for sacrificial samples. In this report, we employ an approach based on Brillouin spectroscopy to probe the glass transition of SMPs rapidly, remotely, and nondestructively. Further, we compare the Tg obtained from Brillouin scattering with DMA- and DSC-measured Tg to demonstrate the accuracy of Brillouin scattering for this application. We conclude that Brillouin spectroscopy is an accurate technique for obtaining the glass transition temperature of SMPs, aligning closely with the most common laboratory standards while providing a rapid, remote, and nondestructive method for the analysis of unique polymeric medical devices.

Smart Cards and remote entrusting

NASA Astrophysics Data System (ADS)

Aussel, Jean-Daniel; D'Annoville, Jerome; Castillo, Laurent; Durand, Stephane; Fabre, Thierry; Lu, Karen; Ali, Asad

Smart cards are widely used to provide security in end-to-end communication involving servers and a variety of terminals, including mobile handsets or payment terminals. Sometime, end-to-end server to smart card security is not applicable, and smart cards must communicate directly with an application executing on a terminal, like a personal computer, without communicating with a server. In this case, the smart card must somehow trust the terminal application before performing some secure operation it was designed for. This paper presents a novel method to remotely trust a terminal application from the smart card. For terminals such as personal computers, this method is based on an advanced secure device connected through the USB and consisting of a smart card bundled with flash memory. This device, or USB dongle, can be used in the context of remote untrusting to secure portable applications conveyed in the dongle flash memory. White-box cryptography is used to set the secure channel and a mechanism based on thumbprint is described to provide external authentication when session keys need to be renewed. Although not as secure as end-to-end server to smart card security, remote entrusting with smart cards is easy to deploy for mass-market applications and can provide a reasonable level of security.

Thin film Heusler compounds manganese nickel gallium

NASA Astrophysics Data System (ADS)

Jenkins, Catherine Ann

Multiferroic Heusler compounds Mn3--xNi xGa (x=0,1,2) have a tetragonal unit cell that can variously be used for magneto-mechanically coupled shape memory ( x=1,2) and spin-mechanical applications (x=0). The first fabrication of fully epitaxial thin films of these and electronically related compounds by sputtering is discussed. Traditional and custom lab characterization of the magnetic and temperature driven multiferroic behavior is augmented by more detailed synchrotron-based high energy photoemission spectroscopic techniques to describe the atomic and electronic structure. Integration of the MnNi2Ga magnetic shape memory compound in microwave patch antennas and active free-standing structures represents a fraction of the available and promising applications for these compounds. Prototype magnetic tunnel junctions are demonstrated by Mn3Ga electrodes with perpendicular anisotropy for spin torque transfer memory structures. The main body of the work concentrates on the definition and exploration of the material series Mn3--xNi xGa (x=0,1,2) and the relevant multiferroic phenomena exhibited as a function of preparation and external stimuli. Engineering results on each x=0,1,2 are presented with device prototypes where relevant. In the appendices the process of the materials design undertaken with the goal of developing new ternary intermetallics with enhanced properties is presented with a full exploration of the road from band structure calculations to device implementation. Cobalt based compounds in single crystal and nanoparticle form are fabricated with an eye to developing the production methods for new cobalt- and iron-based magnetic shape memory compounds for device applications in different forms. Mn2CoSn, a compound isolectronic and with similar atomic ordering to Mn2NiGa is experimentally determined to be a nearly half-metallic ferromagnet in contrast to the metallic ferrimagnetism in the parent compound. High energy photoemission spectroscopy is shown to be applicable to the analysis and observation of deeply buried metallic and semiconducting interface in an analysis of chalcopyrite solar cell heterolayers and model magnetic tunnel junctions with half-metalic Heusler electrodes.

Energy Dissipation and Transport in Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Pop, Eric

2011-03-01

Power consumption is a significant challenge in electronics, often limiting the performance of integrated circuits from mobile devices to massive data centers. Carbon nanotubes have emerged as potentially energy-efficient future devices and interconnects, with both large mobility and thermal conductivity. This talk will focus on understanding and controlling energy dissipation [1-3] and transport [4-6] in carbon nanotubes, with applications to low-energy devices, interconnects, heat sinks, and memory elements. Experiments have been used to gain new insight into the fundamental behavior of such devices, and to better inform practical device models. The results suggest much room for energy optimization in nanoelectronics through the design of geometry, interfaces, and materials..

Interface engineered ferrite@ferroelectric core-shell nanostructures: A facile approach to impart superior magneto-electric coupling

NASA Astrophysics Data System (ADS)

Abraham, Ann Rose; Raneesh, B.; Das, Dipankar; Oluwafemi, Oluwatobi Samuel; Thomas, Sabu; Kalarikkal, Nandakumar

2018-04-01

The electric field control of magnetism in multiferroics is attractive for the realization of ultra-fast and miniaturized low power device applications like nonvolatile memories. Room temperature hybrid multiferroic heterostructures with core-shell (0-0) architecture (ferrite core and ferroelectric shell) were developed via a two-step method. High-Resolution Transmission Electron Microscopy (HRTEM) images confirm the core-shell structure. The temperature dependant magnetization measurements and Mossbauer spectra reveal superparamagnetic nature of the core-shell sample. The ferroelectric hysteresis loops reveal leaky nature of the samples. The results indicate the promising applications of the samples for magneto-electric memories and spintronics.

Comparisons of switching characteristics between Ti/Al2O3/Pt and TiN/Al2O3/Pt RRAM devices with various compliance currents

NASA Astrophysics Data System (ADS)

Qi, Yanfei; Zhao, Ce Zhou; Liu, Chenguang; Fang, Yuxiao; He, Jiahuan; Luo, Tian; Yang, Li; Zhao, Chun

2018-04-01

In this study, the influence of the Ti and TiN top electrodes on the switching behaviors of the Al2O3/Pt resistive random access memory devices with various compliance currents (CCs, 1-15 mA) has been compared. Based on the similar statistical results of the resistive switching (RS) parameters such as V set/V reset, R HRS/R LRS (measured at 0.10 V) and resistance ratio with various CCs for both devices, the Ti/Al2O3/Pt device differs from the TiN/Al2O3/Pt device mainly in the forming process rather than in the following switching cycles. Apart from the initial isolated state, the Ti/Al2O3/Pt device has the initial intermediate state as well. In addition, its forming voltage is relatively lower. The conduction mechanisms of the ON and OFF state for both devices are demonstrated as ohmic conduction and Frenkel-Poole emission, respectively. Therefore, with the combined modulations of the CCs and the stop voltages, the TiN/Al2O3/Pt device is more stable for nonvolatile memory applications to further improve the RS performance.

MemFlash device: floating gate transistors as memristive devices for neuromorphic computing

NASA Astrophysics Data System (ADS)

Riggert, C.; Ziegler, M.; Schroeder, D.; Krautschneider, W. H.; Kohlstedt, H.

2014-10-01

Memristive devices are promising candidates for future non-volatile memory applications and mixed-signal circuits. In the field of neuromorphic engineering these devices are especially interesting to emulate neuronal functionality. Therefore, new materials and material combinations are currently investigated, which are often not compatible with Si-technology processes. The underlying mechanisms of the device often remain unclear and are paired with low device endurance and yield. These facts define the current most challenging development tasks towards a reliable memristive device technology. In this respect, the MemFlash concept is of particular interest. A MemFlash device results from a diode configuration wiring scheme of a floating gate transistor, which enables the persistent device resistance to be varied according to the history of the charge flow through the device. In this study, we investigate the scaling conditions of the floating gate oxide thickness with respect to possible applications in the field of neuromorphic engineering. We show that MemFlash cells exhibit essential features with respect to neuromorphic applications. In particular, cells with thin floating gate oxides show a limited synaptic weight growth together with low energy dissipation. MemFlash cells present an attractive alternative for state-of-art memresitive devices. The emulation of associative learning is discussed by implementing a single MemFlash cell in an analogue circuit.

Resistive switching and memory effects of AgI thin film

NASA Astrophysics Data System (ADS)

Liang, X. F.; Chen, Y.; Shi, L.; Lin, J.; Yin, J.; Liu, Z. G.

2007-08-01

A memory device has been fabricated using an AgI film sandwiched between a Pt film and an Ag film with the lateral size of the device scaled down to 300 nm. The AgI film was made by the iodination of the Ag film at room temperature and under ambient pressure. The switching between high- and low-resistance states can be realized by applying voltages of different polarities. The switching can be performed under the application of voltage pulses with a 100 Hz frequency for ~103 times. The switching times are in the order of microseconds and the retention time is about a week. The switching effects are explained as the electrochemical growth and dissolution of Ag in AgI.

Multiple switching modes and multiple level states in memristive devices

NASA Astrophysics Data System (ADS)

Miao, Feng; Yang, J. Joshua; Borghetti, Julien; Strachan, John Paul; Zhang, M.-X.; Goldfarb, Ilan; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2011-03-01

As one of the most promising technologies for next generation non-volatile memory, metal oxide based memristive devices have demonstrated great advantages on scalability, operating speed and power consumption. Here we report the observation of multiple switching modes and multiple level states in different memristive systems. The multiple switching modes can be obtained by limiting the current during electroforming, and related transport behaviors, including ionic and electronic motions, are characterized. Such observation can be rationalized by a model of two effective switching layers adjacent to the bottom and top electrodes. Multiple level states, corresponding to different composition of the conducting channel, will also be discussed in the context of multiple-level storage for high density, non-volatile memory applications.

Shape memory polymer network with thermally distinct elasticity and plasticity

PubMed Central

Zhao, Qian; Zou, Weike; Luo, Yingwu; Xie, Tao

2016-01-01

Stimuli-responsive materials with sophisticated yet controllable shape-changing behaviors are highly desirable for real-world device applications. Among various shape-changing materials, the elastic nature of shape memory polymers allows fixation of temporary shapes that can recover on demand, whereas polymers with exchangeable bonds can undergo permanent shape change via plasticity. We integrate the elasticity and plasticity into a single polymer network. Rational molecular design allows these two opposite behaviors to be realized at different temperature ranges without any overlap. By exploring the cumulative nature of the plasticity, we demonstrate easy manipulation of highly complex shapes that is otherwise extremely challenging. The dynamic shape-changing behavior paves a new way for fabricating geometrically complex multifunctional devices. PMID:26824077

Projected phase-change memory devices.

PubMed

Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

2015-09-03

Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.

PubMed

Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei

2010-07-27

A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.

Formation of SiGe nanocrystals embedded in Al{sub 2}O{sub 3} for the application of write-once-read-many-times memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Min-Lin; Wu, Yung-Hsien; Lin, Chia-Chun

2012-10-15

The structure of SiGe nanocrystals embedded in Al{sub 2}O{sub 3} formed by sequential deposition of Al{sub 2}O{sub 3}/Si/Ge/Al{sub 2}O{sub 3} and a subsequent annealing was confirmed by transmission electron microscopy and energy dispersive spectroscopy (EDS), and its application for write-once-read-many-times (WORM) memory devices was explored in this study. By applying a -10 V pulse for 1 s, a large amount of holes injected from Si substrate are stored in the nanocrystals and consequently, the current at +1.5 V increases by a factor of 10{sup 4} as compared to that of the initial state. Even with a smaller -5 V pulsemore » for 1 {mu}s, a sufficiently large current ratio of 36 can still be obtained, verifying the low power operation. Since holes are stored in nanocrystals which are isolated from Si substrate by Al{sub 2}O{sub 3} with good integrity and correspond to a large valence band offset with respect to Al{sub 2}O{sub 3}, desirable read endurance up to 10{sup 5} cycles and excellent retention over 100 yr are achieved. Combining these promising characteristics, WORM memory devices are appropriate for high-performance archival storage applications.« less

Thermally activated hysteresis in high quality graphene/h-BN devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cadore, A. R., E-mail: alissoncadore@gmail.com, E-mail: lccampos@fisica.ufmg.br; Mania, E.; Lacerda, R. G.

2016-06-06

We report on gate hysteresis of resistance in high quality graphene/hexagonal boron nitride (h-BN) devices. We observe a thermally activated hysteretic behavior in resistance as a function of the applied gate voltage at temperatures above 375 K. In order to investigate the origin of the hysteretic phenomenon, we compare graphene/h-BN heterostructure devices with SiO{sub 2}/Si back gate electrodes to devices with graphite back gate electrodes. The gate hysteretic behavior of the resistance is present only in devices with an h-BN/SiO{sub 2} interface and is dependent on the orientation of the applied gate electric field and sweep rate. We describe a phenomenologicalmore » model which captures all of our findings based on charges trapped at the h-BN/SiO{sub 2} interface. Such hysteretic behavior in graphene resistance must be considered in high temperature applications for graphene devices and may open new routes for applications in digital electronics and memory devices.« less

A Middleware Based Approach to Dynamically Deploy Location Based Services onto Heterogeneous Mobile Devices Using Bluetooth in Indoor Environment

NASA Astrophysics Data System (ADS)

Sadhukhan, Pampa; Sen, Rijurekha; Das, Pradip K.

Several methods for providing location based service (LBS) to mobile devices in indoor environment using wireless technologies like WLAN, RFID and Bluetooth have been proposed, implemented and evaluated. However, most of them do not focus on heterogeneity of mobile platforms, memory constraint of mobile devices, the adaptability of client or device to the new services it discovers whenever it reaches a new location. In this paper, we have proposed a Middleware based approach of LBS provision in the indoor environment, where a Bluetooth enabled Base Station (BS) detects Bluetooth enabled mobile devices and pushes a proper client application only to those devices that belong to some registered subscriber of LBS. This dynamic deployment enables the mobile clients to access any new service without having preinstalled interface to that service beforehand and thus the client's memory consumption is reduced. Our proposed work also addresses the other issues like authenticating the clients before providing them LBSs and introducing paid services. We have evaluated its performance in term of file transfer time with respect to file size and throughput with respect to distance. Experimental results on service consumption time by the mobile client for different services are also presented.

Device applications and structural and optical properties of Indigo - A biodegradable, low-cost organic semiconductor

NASA Astrophysics Data System (ADS)

Wang, Zhengjun; Pisane, Kelly L.; Sierros, Konstantinos; Seehra, Mohindar S.; Korakakis, Dimitris

2015-03-01

Currently, memory devices based on organic materials are attracting great attention due to their simplicity in device structure, mechanical flexibility, potential for scalability, low-cost potential, low-power operation, and large capacity for data storage. In a recent paper from our group, Indigo-based nonvolatile organic write-once-read-many-times (WORM) memory device, consisting of a 100nm layer of indigo sandwiched between an indium tin oxide (ITO) cathode and an Al anode, has been reported. This device is found to be at its low resistance state (ON state) and can be switched to high resistance state (OFF state) by applying a positive bias with ON/OFF current ratio of the device being up to 1.02 × e6. A summary of these results along with the structural and optical properties of indigo powder will be reported. Analysis of x-ray diffraction shows a monoclinic structure with lattice parameters a(b)[c] = 0.924(0.577)[0.1222]nm and β =117° . Optical absorption shows a band edge at 1.70 eV with peak of absorption occurring at 1.90 eV. These results will be interpreted in terms of the HOMO-LUMO bands of Indigo.

Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

NASA Astrophysics Data System (ADS)

Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

2017-12-01

Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

A flexible nonvolatile resistive switching memory device based on ZnO film fabricated on a foldable PET substrate.

PubMed

Sun, Bai; Zhang, Xuejiao; Zhou, Guangdong; Yu, Tian; Mao, Shuangsuo; Zhu, Shouhui; Zhao, Yong; Xia, Yudong

2018-06-15

In this work, a flexible resistive switching memory device based on ZnO film was fabricated using a foldable Polyethylene terephthalate (PET) film as substrate while Ag and Ti acts top and bottom electrode. Our as-prepared device represents an outstanding nonvolatile memory behavior with good "write-read-erase-read" stability at room temperature. Finally, a physical model of Ag conductive filament is constructed to understanding the observed memory characteristics. The work provides a new way for the preparation of flexible memory devices based on ZnO films, and especially provides an experimental basis for the exploration of high-performance and portable nonvolatile resistance random memory (RRAM). Copyright © 2018 Elsevier Inc. All rights reserved.

Review on open source operating systems for internet of things

NASA Astrophysics Data System (ADS)

Wang, Zhengmin; Li, Wei; Dong, Huiliang

2017-08-01

Internet of Things (IoT) is an environment in which everywhere and every device became smart in a smart world. Internet of Things is growing vastly; it is an integrated system of uniquely identifiable communicating devices which exchange information in a connected network to provide extensive services. IoT devices have very limited memory, computational power, and power supply. Traditional operating systems (OS) have no way to meet the needs of IoT systems. In this paper, we thus analyze the challenges of IoT OS and survey applicable open source OSs.

Acoustic charge transport technology investigation for advanced development transponder

NASA Technical Reports Server (NTRS)

Kayalar, S.

1993-01-01

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

NASA Technical Reports Server (NTRS)

Li, Yue (Inventor); Bruck, Jehoshua (Inventor)

2018-01-01

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Quasi-perfect FIFO: Synchronous or asynchronous with application in controller design for the UNICON laser memory. [digital memory and buffer storage

NASA Technical Reports Server (NTRS)

Lim, R. S.

1974-01-01

The first-in-first-out memory buffer (FIFO), is an elastic digital memory whose main application is in data buffering between devices operating at different rates. Data written into the top is moved autonomously down toward the bottom of the FIFO to the lowest unoccupied location, and data read from the bottom of the FIFO will cause data from the top to move autonomously down toward the bottom. The FIFO is available in MOS LSI asynchronous form with data rate in the 1 MHz region. The FIFO described yields a simple high-speed iterative implementation, either synchronous of asynchronous. Because of this simple iterative structure, the FIFO is expandable in both number of words and bits per word, and it is attractive from the viewpoint of integrated-circuit production. For the synchronous FIFO, a model was built and successfully used in the controller for the UNICON laser memory. For the asynchronous FIFO, a model was built and also successfully used in a high-performance magnetic tape controller.

Flexible non-volatile memory devices based on organic semiconductors

NASA Astrophysics Data System (ADS)

Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

2015-09-01

The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

Initial Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

NASA Technical Reports Server (NTRS)

MacLeond, Todd C.; Sims, W. Herb; Varnavas,Kosta A.; Ho, Fat D.

2011-01-01

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite that launched in November 2010. The memory device being tested is a commercial Ramtron Inc. 512K memory device. The circuit was designed into the satellite avionics and is not used to control the satellite. The test consists of writing and reading data with the ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is sent to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test is one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The initial data from the test is presented. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices

NASA Astrophysics Data System (ADS)

Yadav, Manoj; Velampati, Ravi Shankar R.; Mandal, D.; Sharma, Rohit

2018-03-01

Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance-voltage (C-V) and capacitance-time (C-t) response of the fabricated MOS NVM capacitor. The C-V and C-t characteristics depict a large flat band voltage shift (V FB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

PubMed

Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

2017-02-14

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

PubMed Central

Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

2017-01-01

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer.

PubMed

Lee, Young Tack; Kwon, Hyeokjae; Kim, Jin Sung; Kim, Hong-Hee; Lee, Yun Jae; Lim, Jung Ah; Song, Yong-Won; Yi, Yeonjin; Choi, Won-Kook; Hwang, Do Kyung; Im, Seongil

2015-10-27

Two-dimensional van der Waals (2D vdWs) materials are a class of new materials that can provide important resources for future electronics and materials sciences due to their unique physical properties. Among 2D vdWs materials, black phosphorus (BP) has exhibited significant potential for use in electronic and optoelectronic applications because of its allotropic properties, high mobility, and direct and narrow band gap. Here, we demonstrate a few-layered BP-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. Experiments showed that our BP-based ferroelectric transistors operate satisfactorily at room temperature in ambient air and exhibit a clear memory window. Unlike conventional ambipolar BP transistors, our ferroelectric transistors showed only p-type characteristics due to the carbon-fluorine (C-F) dipole effect of the P(VDF-TrFE) layer, as well as the highest linear mobility value of 1159 cm(2) V(-1) s(-1) with a 10(3) on/off current ratio. For more advanced memory applications beyond unit memory devices, we implemented two memory inverter circuits, a resistive-load inverter circuit and a complementary inverter circuit, combined with an n-type molybdenum disulfide (MoS2) nanosheet. Our memory inverter circuits displayed a clear memory window of 15 V and memory output voltage efficiency of 95%.

Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell.

PubMed

Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

2016-07-07

Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.

Programmable DMA controller

NASA Technical Reports Server (NTRS)

Hendry, David F. (Inventor)

1993-01-01

In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.

Overview of Probe-based Storage Technologies

NASA Astrophysics Data System (ADS)

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-07-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

Overview of Probe-based Storage Technologies.

PubMed

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-12-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

A Fast lattice-based polynomial digital signature system for m-commerce

NASA Astrophysics Data System (ADS)

Wei, Xinzhou; Leung, Lin; Anshel, Michael

2003-01-01

The privacy and data integrity are not guaranteed in current wireless communications due to the security hole inside the Wireless Application Protocol (WAP) version 1.2 gateway. One of the remedies is to provide an end-to-end security in m-commerce by applying application level security on top of current WAP1.2. The traditional security technologies like RSA and ECC applied on enterprise's server are not practical for wireless devices because wireless devices have relatively weak computation power and limited memory compared with server. In this paper, we developed a lattice based polynomial digital signature system based on NTRU's Polynomial Authentication and Signature Scheme (PASS), which enabled the feasibility of applying high-level security on both server and wireless device sides.

A synaptic device built in one diode-one resistor (1D-1R) architecture with intrinsic SiOx-based resistive switching memory

NASA Astrophysics Data System (ADS)

Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Zhou, Fei; Pan, Chih-Hung; Chang, Kuan-Chang; Tsai, Tsung-Ming; Chang, Ting-Chang; Sze, Simon M.; Lee, Jack C.

2016-04-01

We realize a device with biological synaptic behaviors by integrating silicon oxide (SiOx) resistive switching memory with Si diodes to further minimize total synaptic power consumption due to sneak-path currents and demonstrate the capability for spike-induced synaptic behaviors, representing critical milestones for the use of SiO2-based materials in future neuromorphic computing applications. Biological synaptic behaviors such as long-term potentiation, long-term depression, and spike-timing dependent plasticity are demonstrated systemically with comprehensive investigation of spike waveform analyses and represent a potential application for SiOx-based resistive switching materials. The resistive switching SET transition is modeled as hydrogen (proton) release from the (SiH)2 defect to generate the hydrogenbridge defect, and the RESET transition is modeled as an electrochemical reaction (proton capture) that re-forms (SiH)2. The experimental results suggest a simple, robust approach to realize programmable neuromorphic chips compatible with largescale complementary metal-oxide semiconductor manufacturing technology.

Omni Directional Multimaterial Soft Cylindrical Actuator and Its Application as a Steerable Catheter.

PubMed

Gul, Jahan Zeb; Yang, Young Jin; Su, Kim Young; Choi, Kyung Hyun

2017-09-01

Soft actuators with complex range of motion lead to strong interest in applying devices like biomedical catheters and steerable soft pipe inspectors. To facilitate the use of soft actuators in devices where controlled, complex, precise, and fast motion is required, a structurally controlled Omni directional soft cylindrical actuator is fabricated in a modular way using multilayer composite of polylactic acid based conductive Graphene, shape memory polymer, shape memory alloy, and polyurethane. Multiple fabrication techniques are discussed step by step that mainly include fused deposition modeling based 3D printing, dip coating, and UV curing. A mathematical control model is used to generate patterned electrical signals for the Omni directional deformations. Characterizations like structural control, bending, recovery, path, and thermal effect are carried out with and without load (10 g) to verify the new cylindrical design concept. Finally, the application of Omni directional actuator as a steerable catheter is explored by fabricating a scaled version of carotid artery through 3D printing using a semitransparent material.

MoSbTe for high-speed and high-thermal-stability phase-change memory applications

NASA Astrophysics Data System (ADS)

Liu, Wanliang; Wu, Liangcai; Li, Tao; Song, Zhitang; Shi, Jianjun; Zhang, Jing; Feng, Songlin

2018-04-01

Mo-doped Sb1.8Te materials and electrical devices were investigated for high-thermal-stability and high-speed phase-change memory applications. The crystallization temperature (t c = 185 °C) and 10-year data retention (t 10-year = 112 °C) were greatly enhanced compared with those of Ge2Sb2Te5 (t c = 150 °C, t 10-year = 85 °C) and pure Sb1.8Te (t c = 166 °C, t 10-year = 74 °C). X-ray diffraction and transmission electron microscopy results show that the Mo dopant suppresses crystallization, reducing the crystalline grain size. Mo2.0(Sb1.8Te)98.0-based devices were fabricated to evaluate the reversible phase transition properties. SET/RESET with a large operation window can be realized using a 10 ns pulse, which is considerably better than that required for Ge2Sb2Te5 (∼50 ns). Furthermore, ∼1 × 106 switching cycles were achieved.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Towards a drift-free multi-level Phase Change Memory

NASA Astrophysics Data System (ADS)

Cinar, Ibrahim; Ozdemir, Servet; Cogulu, Egecan; Gokce, Aisha; Stipe, Barry; Katine, Jordan; Aktas, Gulen; Ozatay, Ozhan

For ultra-high density data storage applications, Phase Change Memory (PCM) is considered a potentially disruptive technology. Yet, the long-term reliability of the logic levels corresponding to the resistance states of a PCM device is an important issue for a stable device operation since the resistance levels drift uncontrollably in time. The underlying mechanism for the resistance drift is considered as the structural relaxation and spontaneous crystallization at elevated temperatures. We fabricated a nanoscale single active layer-phase change memory cell with three resistance levels corresponding to crystalline, amorphous and intermediate states by controlling the current injection site geometry. For the intermediate state and the reset state, the activation energies and the trap distances have been found to be 0.021 eV and 0.235 eV, 1.31 nm and 7.56 nm, respectively. We attribute the ultra-low and weakly temperature dependent drift coefficient of the intermediate state (ν = 0.0016) as opposed to that of the reset state (ν = 0.077) as being due to the dominant contribution of the interfacial defects in electrical transport in the case of the mixed phase. Our results indicate that the engineering of interfacial defects will enable a drift-free multi-level PCM device design.

An insight into the dopant selection for CeO2-based resistive-switching memory system: a DFT and experimental study

NASA Astrophysics Data System (ADS)

Hussain, Fayyaz; Imran, Muhammad; Rana, Anwar Manzoor; Khalil, R. M. Arif; Khera, Ejaz Ahmad; Kiran, Saira; Javid, M. Arshad; Sattar, M. Atif; Ismail, Muhammad

2018-03-01

The aim of this study is to figure out better metal dopants for CeO2 for designing highly efficient non-volatile memory (NVM) devices. The present DFT work involves four different metals doped interstitially and substitutionally in CeO2 thin films. First principle calculations involve electron density of states (DOS) and partial density of states (PDOS), and isosurface charge densities are carried out within the plane-wave density functional theory using GGA and GGA + U approach by employing the Vienna ab initio simulation package VASP. Isosurface charge density plots confirmed that interstitial doping of Zr and Ti metals truly assists in generating conduction filaments (CFs), while substitutional doping of these metals cannot do so. Substitutional doping of W may contribute in generating CFs in CeO2 directly, but its interstitial doping improves conductivity of CeO2. However, Ni-dopant is capable of directly generating CFs both as substitutional and interstitial dopants in ceria. Such a capability of Ni appears acting as top electrode in Ni/CeO2/Pt memory devices, but its RS behavior is not so good. On inserting Zr layer to make Ni/Zr:CeO2/Pt memory stacks, Ni does not contribute in RS characteristics, but Zr plays a vital role in forming CFs by creating oxygen vacancies and forming ZrO2 interfacial layer. Therefore, Zr-doped devices exhibit high-resistance ratio of 104 and good endurance as compared to undoped devices suitable for RRAM applications.

High performance nonvolatile memory devices based on Cu2-xSe nanowires

NASA Astrophysics Data System (ADS)

Wu, Chun-Yan; Wu, Yi-Liang; Wang, Wen-Jian; Mao, Dun; Yu, Yong-Qiang; Wang, Li; Xu, Jun; Hu, Ji-Gang; Luo, Lin-Bao

2013-11-01

We report on the rational synthesis of one-dimensional Cu2-xSe nanowires (NWs) via a solution method. Electrical analysis of Cu2-xSe NWs based memory device exhibits a stable and reproducible bipolar resistive switching behavior with a low set voltage (0.3-0.6 V), which can enable the device to write and erase data efficiently. Remarkably, the memory device has a record conductance switching ratio of 108, much higher than other devices ever reported. At last, a conducting filaments model is introduced to account for the resistive switching behavior. The totality of this study suggests that the Cu2-xSe NWs are promising building blocks for fabricating high-performance and low-consumption nonvolatile memory devices.

Recent advances in degradable lactide-based shape-memory polymers.

PubMed

Balk, Maria; Behl, Marc; Wischke, Christian; Zotzmann, Jörg; Lendlein, Andreas

2016-12-15

Biodegradable polymers are versatile polymeric materials that have a high potential in biomedical applications avoiding subsequent surgeries to remove, for example, an implanted device. In the past decade, significant advances have been achieved with poly(lactide acid) (PLA)-based materials, as they can be equipped with an additional functionality, that is, a shape-memory effect (SME). Shape-memory polymers (SMPs) can switch their shape in a predefined manner upon application of a specific external stimulus. Accordingly, SMPs have a high potential for applications ranging from electronic engineering, textiles, aerospace, and energy to biomedical and drug delivery fields based on the perspectives of new capabilities arising with such materials in biomedicine. This study summarizes the progress in SMPs with a particular focus on PLA, illustrates the design of suitable homo- and copolymer structures as well as the link between the (co)polymer structure and switching functionality, and describes recent advantages in the implementation of novel switching phenomena into SMP technology. Copyright © 2016 Elsevier B.V. All rights reserved.

Progress of application, research and development, and design guidelines for shape memory alloy devices for cultural heritage structures in Italy

NASA Astrophysics Data System (ADS)

Castellano, Maria G.; Indirli, Maurizio; Martelli, Alessandro

2001-07-01

A wide ranging R&D Project (ISTECH) on validation and application of the Innovative Antiseismic Techniques (IATs) for the restoration of Cultural Heritage Structures (CUHESs), especially masonry buildings, based on the Shape Memory Alloys (SMAs), has been funded by the European Commission (EC), in the framework of the Environment and Climate RTD Programme. Because Traditional Restoration Techniques (TRTs) have sometimes proved inadequate in avoiding collapses and often too invasive, the use of superelastic SMA Devices (SMADs) has been developed. Theoretical and numerical studies, as well as intensive testing of material specimens, devices, structural models and in situ campaigns, show that SMADs can substantially increase the stability of masonry CUHESs exposed to an earthquake. Different SMAD types have been investigated to fulfil different structural needs and they can be custom designed taking into account each monument's characteristics. The successful results of the research and its exploitation led to important applications in Italy: the S. Giorgio Church Bell-Tower, located at Trignano, S. Martino in Rio, Reggio Emilia, damaged by the 15th October 1996 earthquake, the transept tympana of the S. Francesco Basilica in Assisi and the S. Feliciano Cathedral façade in Foligno, both heavily damaged by the September 1997 earthquake. In addition, further studies and applications of SMAD technology are foreseen in Italy in the next future, in the framework of Italian and European research projects and proposals.

Shape memory alloys: a state of art review

NASA Astrophysics Data System (ADS)

Naresh, C.; Bose, P. S. C.; Rao, C. S. P.

2016-09-01

Shape memory alloys (SMAs) are the special materials that have the ability to return to a predetermined shape when heated. When this alloy is in below transformation temperature it undergoes low yield strength and will deform easily into any new shape which it will retain, if this alloy is heated above its transformation temperature it changes its crystal lattice structure which returns to its real shape. SMAs are remarkably different from other materials are primarily due to shape memory effect (SME) and pseudoelasticity which are related with the specific way the phase transformation occurs, biocompatibility, high specific strength, high corrosion resistance, high wear resistance and high anti-fatigue property. SMA are used in many applications such as aerospace, medical, automobile, tubes, controllers for hot water valves in showers, petroleum industry, vibration dampers, ball bearings, sensors, actuators, miniature grippers, micro valves, pumps, landing gears, eye glass frames, Material for helicopter blades, sprinklers in fine alarm systems packaging devices for electronic materials, dental materials, etc. This paper focuses on introducing shape memory alloy and their applications in past, present and in future, also revealed the concept and mechanism of shape memory materials for a particular requirement. Properties of SMAs, behaviour and characteristics of SMA, summary of recent advances and new application opportunities are also discussed.

Tachycardia detection in ICDs by Boston Scientific : Algorithms, pearls, and pitfalls.

PubMed

Zanker, Norbert; Schuster, Diane; Gilkerson, James; Stein, Kenneth

2016-09-01

The aim of this study was to summarize how implantable cardioverter defibrillators (ICDs) by Boston Scientific sense, detect, discriminate rhythms, and classify episodes. Modern devices include multiple programming selections, diagnostic features, therapy options, memory functions, and device-related history features. Device operation includes logical steps from sensing, detection, discrimination, therapy delivery to history recording. The program is designed to facilitate the application of the device algorithms to the individual patient's clinical needs. Features and functions described in this article represent a selective excerpt by the authors from Boston Scientific publicly available product resources. Programming of ICDs may affect patient outcomes. Patient-adapted and optimized programming requires understanding of device operation and concepts.

Graphene devices based on laser scribing technology

NASA Astrophysics Data System (ADS)

Qiao, Yan-Cong; Wei, Yu-Hong; Pang, Yu; Li, Yu-Xing; Wang, Dan-Yang; Li, Yu-Tao; Deng, Ning-Qin; Wang, Xue-Feng; Zhang, Hai-Nan; Wang, Qian; Yang, Zhen; Tao, Lu-Qi; Tian, He; Yang, Yi; Ren, Tian-Ling

2018-04-01

Graphene with excellent electronic, thermal, optical, and mechanical properties has great potential applications. The current devices based on graphene grown by micromechanical exfoliation, chemical vapor deposition (CVD), and thermal decomposition of silicon carbide are still expensive and inefficient. Laser scribing technology, a low-cost and time-efficient method of fabricating graphene, is introduced in this review. The patterning of graphene can be directly performed on solid and flexible substrates. Therefore, many novel devices such as strain sensors, acoustic devices, memory devices based on laser scribing graphene are fabricated. The outlook and challenges of laser scribing technology have also been discussed. Laser scribing may be a potential way of fabricating wearable and integrated graphene systems in the future.

Logic and memory concepts for all-magnetic computing based on transverse domain walls

NASA Astrophysics Data System (ADS)

Vandermeulen, J.; Van de Wiele, B.; Dupré, L.; Van Waeyenberge, B.

2015-06-01

We introduce a non-volatile digital logic and memory concept in which the binary data is stored in the transverse magnetic domain walls present in in-plane magnetized nanowires with sufficiently small cross sectional dimensions. We assign the digital bit to the two possible orientations of the transverse domain wall. Numerical proofs-of-concept are presented for a NOT-, AND- and OR-gate, a FAN-out as well as a reading and writing device. Contrary to the chirality based vortex domain wall logic gates introduced in Omari and Hayward (2014 Phys. Rev. Appl. 2 044001), the presented concepts remain applicable when miniaturized and are driven by electrical currents, making the technology compatible with the in-plane racetrack memory concept. The individual devices can be easily combined to logic networks working with clock speeds that scale linearly with decreasing design dimensions. This opens opportunities to an all-magnetic computing technology where the digital data is stored and processed under the same magnetic representation.

Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.

PubMed

Kim, Seung-Yoon; Park, Jong Kyung; Hwang, Wan Sik; Lee, Seung-Jun; Lee, Ki-Hong; Pyi, Seung Ho; Cho, Byung Jin

2016-05-01

We investigated the dependence of grain size on the performance of a polycrystalline silicon (poly-Si) channel TFT for application to 3D NAND Flash memory devices. It has been found that the device performance and memory characteristics are strongly affected by the grain size of the poly-Si channel. Higher on-state current, faster program speed, and poor endurance/reliability properties are observed when the poly-Si grain size is large. These are mainly attributed to the different local electric field induced by an oxide valley at the interface between the poly-Si channel and the gate oxide. In addition, the trap density at the gate oxide interface was successfully measured using a charge pumping method by the separation between the gate oxide interface traps and traps at the grain boundaries in the poly-Si channel. The poly-Si channel with larger grain size has lower interface trap density.

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

NASA Astrophysics Data System (ADS)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

The Effect of 4-Octyldecyloxybenzoic Acid on Liquid-Crystalline Polyurethane Composites with Triple-Shape Memory and Self-Healing Properties

PubMed Central

Ban, Jianfeng; Zhu, Linjiang; Chen, Shaojun; Wang, Yiping

2016-01-01

To better understand shape memory materials and self-healing materials, a new series of liquid-crystalline shape memory polyurethane (LC-SMPU) composites, named SMPU-OOBAm, were successfully prepared by incorporating 4-octyldecyloxybenzoic acid (OOBA) into the PEG-based SMPU. The effect of OOBA on the structure, morphology, and properties of the material has been carefully investigated. The results demonstrate that SMPU-OOBAm has liquid crystalline properties, triple-shape memory properties, and self-healing properties. The incorporated OOBA promotes the crystallizability of both soft and hard segments of SMPU, and the crystallization rate of the hard segment of SMPU decreases when the OOBA-content increases. Additionally, the SMPU-OOBAm forms a two-phase separated structure (SMPU phase and OOBA phase), and it shows two-step modulus changes upon heating. Therefore, the SMPU-OOBAm exhibits triple-shape memory behavior, and the shape recovery ratio decreases with an increase in the OOBA content. Finally, SMPU-OOBAm exhibits self-healing properties. The new mechanism can be ascribed to the heating-induced “bleeding” of OOBA in the liquid crystalline state and the subsequent re-crystallization upon cooling. This successful combination of liquid crystalline properties, triple-shape memory properties, and self-healing properties make the SMPU-OOBAm composites ideal for many promising applications in smart optical devices, smart electronic devices, and smart sensors. PMID:28773914

ZrO2 Layer Thickness Dependent Electrical and Dielectric Properties of BST/ZrO2/BST Multilayer Thin Films

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sahoo, S. K.; Misra, D.; Agrawal, D. C.

2011-01-01

Recently, high K materials play an important role in microelectronic devices such as capacitors, memory devices, and microwave devices. Now a days ferroelectric barium strontium titanate [Ba{sub x}Sr{sub 1-x}TiO{sub 3}, (BST)] thin film is being actively investigated for applications in dynamic random access memories (DRAM), field effect transistor (FET), and tunable devices because of its properties such as high dielectric constant, low leakage current, low dielectric loss, and high dielectric breakdown strength. Several approaches have been used to optimize the dielectric and electrical properties of BST thin films such as doping, graded compositions, and multilayer structures. We have found thatmore » inserting a ZrO{sub 2} layer in between two BST layers results in a significant reduction in dielectric constant, loss tangent, and leakage current in the multilayer thin films. Also it is shown that the properties of multilayer structure are found to depend strongly on the sublayer thicknesses. In this work the effect of ZrO{sub 2} layer thickness on the dielectric, ferroelectric as well as electrical properties of BST/ZrO{sub 2}/BST multilayer structure is studied. The multilayer Ba{sub 0.8}Sr{sub 0.2}TiO{sub 3}/ZrO{sub 2}/Ba{sub 0.8}Sr{sub 0.2}TiO{sub 3} film is deposited by a sol-gel process on the platinized Si substrate. The thickness of the middle ZrO{sub 2} layer is varied while keeping the top and bottom BST layer thickness as fixed. It is observed that the dielectric constant, dielectric loss tangent, and leakage current of the multilayer films reduce with the increase of ZrO{sub 2} layer thickness and hence suitable for memory device applications. The ferroelectric properties of the multilayer film also decrease with the ZrO{sub 2} layer thickness.« less

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M.; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2015-09-08

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the gap region between the first electrical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2013-11-26

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the the gap region between the first electical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

2017-12-01

Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

General purpose programmable accelerator board

DOEpatents

Robertson, Perry J.; Witzke, Edward L.

2001-01-01

A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.

76 FR 4375 - In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-25

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-683] In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... the United States after importation of certain MLC flash memory devices and products containing same...

Novel Organic Phototransistor-Based Nonvolatile Memory Integrated with UV-Sensing/Green-Emissive Aggregation Enhanced Emission (AEE)-Active Aromatic Polyamide Electret Layer.

PubMed

Cheng, Shun-Wen; Han, Ting; Huang, Teng-Yung; Chang Chien, Yu-Hsin; Liu, Cheng-Liang; Tang, Ben Zhong; Liou, Guey-Sheng

2018-05-30

A novel aggregation enhanced emission (AEE)-active polyamide TPA-CN-TPE with a high photoluminesence characteristic was successfully synthesized by the direct polymerization of 4-cyanotriphenyl diamine (TPA-CN) and tetraphenylethene (TPE)-containing dicarboxylic acid. The obtained luminescent polyamide plays a significant role as the polymer electret layer in organic field-effect transistors (OFETs)-type memory. The strong green emission of TPA-CN-TPE under ultraviolet (UV) irradiation can be directly absorbed by the pentacene channel, displaying a light-induced programming and voltage-driven erasing organic phototransistor-based nonvolatile memory. Memory window can be effectively manipulated between the programming and erasing states by applying UV light illumination and electrical field, respectively. The photoinduced memory behavior can be maintained for over 10 4 s between these two states with an on/off ratio of 10 4 , and the memory switching can be steadily operated for many cycles. With high photoresponsivity ( R) and photosensitivity ( S), this organic phototransistor integrated with AEE-active polyamide electret layer could serve as an excellent candidate for UV photodetectors in optical applications. For comparison, an AEE-inactive aromatic polyimide TPA-PIS electret with much weaker solid-state emission was also applied in the same OFETs device architecture, but this device did not show any UV-sensitive and UV-induced memory characteristics, which further confirmed the significance of the light-emitting capability of the electret layer.

Influence of thermal agitation on the electric field induced precessional magnetization reversal with perpendicular easy axis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cheng, Hongguang, E-mail: chenghg7932@gmail.com; Deng, Ning

2013-12-15

We investigated the influence of thermal agitation on the electric field induced precessional magnetization switching probability with perpendicular easy axis by solving the Fokker-Planck equation numerically with finite difference method. The calculated results show that the thermal agitation during the reversal process crucially influences the switching probability. The switching probability can be achieved is only determined by the thermal stability factor Δ of the free layer, it is independent on the device dimension, which is important for the high density device application. Ultra-low error rate down to the order of 10{sup −9} can be achieved for the device of thermalmore » stability factor Δ of 40. Low damping factor α material should be used for the free layer for high reliability device applications. These results exhibit potential of electric field induced precessional magnetization switching with perpendicular easy axis for ultra-low power, high speed and high density magnetic random access memory (MRAM) applications.« less

Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

NASA Astrophysics Data System (ADS)

Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

2007-04-01

Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

Carrier transport mechanisms of nonvolatile write-once-read-many-times memory devices with InP-ZnS core-shell nanoparticles embedded in a polymethyl methacrylate layer

NASA Astrophysics Data System (ADS)

Ham, Jung Hoon; Oh, Do Hyun; Cho, Sung Hwan; Jung, Jae Hun; Kim, Tae Whan; Ryu, Eui Dock; Kim, Sang Wook

2009-03-01

Current-voltage (I-V) curves at 300 K for Al/InP-ZnS nanoparticles embedded in a polymethyl methacrylate layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. From the I-V curves, the ON/OFF ratio for the device with InP-ZnS nanoparticles was significantly larger than that for the device without InP-ZnS nanoparticles, indicative of the existence of charge capture in the InP nanoparticles. The estimated retention time of the ON state for the WORM memory device was more than 10 years. The carrier transport mechanisms for the WORM memory devices are described by using several models to fit the experimental I-V data.

Giant Electroresistance in Edge Metal-Insulator-Metal Tunnel Junctions Induced by Ferroelectric Fringe Fields

PubMed Central

Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog

2016-01-01

An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475

Resonant tunneling based graphene quantum dot memristors.

PubMed

Pan, Xuan; Skafidas, Efstratios

2016-12-08

In this paper, we model two-terminal all graphene quantum dot (GQD) based resistor-type memory devices (memristors). The resistive switching is achieved by resonant electron tunneling. We show that parallel GQDs can be used to create multi-state memory circuits. The number of states can be optimised with additional voltage sources, whilst the noise margin for each state can be controlled by appropriately choosing the branch resistance. A three-terminal GQD device configuration is also studied. The addition of an isolated gate terminal can be used to add further or modify the states of the memory device. The proposed devices provide a promising route towards volatile memory devices utilizing only atomically thin two-dimensional graphene.

Application of a simple cerebellar model to geologic surface mapping

USGS Publications Warehouse

Hagens, A.; Doveton, J.H.

1991-01-01

Neurophysiological research into the structure and function of the cerebellum has inspired computational models that simulate information processing associated with coordination and motor movement. The cerebellar model arithmetic computer (CMAC) has a design structure which makes it readily applicable as an automated mapping device that "senses" a surface, based on a sample of discrete observations of surface elevation. The model operates as an iterative learning process, where cell weights are continuously modified by feedback to improve surface representation. The storage requirements are substantially less than those of a conventional memory allocation, and the model is extended easily to mapping in multidimensional space, where the memory savings are even greater. ?? 1991.

Qubit-Based Memcapacitors and Meminductors

NASA Astrophysics Data System (ADS)

Shevchenko, Sergey N.; Pershin, Yuriy V.; Nori, Franco

2016-07-01

It is shown that superconducting charge and flux quantum bits (qubits) can be classified as memory capacitive and inductive systems, respectively. We demonstrate that such memcapacitive and meminductive devices offer remarkable and rich response functionalities. In particular, when subjected to periodic input, qubit-based memcapacitors and meminductors exhibit unusual hysteresis curves. Our work not only extends the set of known memcapacitive and meminductive systems to qubit-based devices, but also highlights their unique properties potentially useful for future technological applications.

Electric field-triggered metal-insulator transition resistive switching of bilayered multiphasic VOx

NASA Astrophysics Data System (ADS)

Won, Seokjae; Lee, Sang Yeon; Hwang, Jungyeon; Park, Jucheol; Seo, Hyungtak

2018-01-01

Electric field-triggered Mott transition of VO2 for next-generation memory devices with sharp and fast resistance-switching response is considered to be ideal but the formation of single-phase VO2 by common deposition techniques is very challenging. Here, VOx films with a VO2-dominant phase for a Mott transition-based metal-insulator transition (MIT) switching device were successfully fabricated by the combined process of RF magnetron sputtering of V metal and subsequent O2 annealing to form. By performing various material characterizations, including scanning transmission electron microscopy-electron energy loss spectroscopy, the film is determined to have a bilayer structure consisting of a VO2-rich bottom layer acting as the Mott transition switching layer and a V2O5/V2O3 mixed top layer acting as a control layer that suppresses any stray leakage current and improves cyclic performance. This bilayer structure enables excellent electric field-triggered Mott transition-based resistive switching of Pt-VOx-Pt metal-insulator-metal devices with a set/reset current ratio reaching 200, set/reset voltage of less than 2.5 V, and very stable DC cyclic switching upto 120 cycles with a great set/reset current and voltage distribution less than 5% of standard deviation at room temperature, which are specifications applicable for neuromorphic or memory device applications. [Figure not available: see fulltext.

An overview of Experimental Condensed Matter Physics in Argentina by 2014, and Oxides for Non Volatile Memory Devices: The MeMOSat Project

NASA Astrophysics Data System (ADS)

Levy, Pablo

2015-03-01

In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.

Calculation of optical parameters for covalent binary alloys used in optical memories/solar cells: a modified approach

NASA Astrophysics Data System (ADS)

Bhatnagar, Promod K.; Gupta, Poonam; Singh, Laxman

2001-06-01

Chalcogenide based alloys find applications in a number of devices like optical memories, IR detectors, optical switches, photovoltaics, compound semiconductor heterosrtuctures etc. We have modified the Gurman's statistical thermodynamic model (STM) of binary covalent alloys. In the Gurman's model, entropy calculations are based on the number of structural units present. The need to modify this model arose due to the fact that it gives equal probability for all the tetrahedra present in the alloy. We have modified the Gurman's model by introducing the concept that the entropy is based on the bond arrangement rather than that on the structural units present. In the present work calculation based on this modification have been presented for optical properties, which find application in optical switching/memories, solar cells and other optical devices. It has been shown that the calculated optical parameters (for a typical case of GaxSe1-x) based on modified model are closer to the available experimental results. These parameters include refractive index, extinction coefficient, dielectric functions, optical band gap etc. GaxSe1-x has been found to be suitable for reversible optical memories also, where phase change (a yields c and vice versa) takes place at specified physical conditions. DTA/DSC studies also suggest the suitability of this material for optical switching/memory applications. We have also suggested possible use of GaxSe1-x (x = 0.4) in place of oxide layer in a Metal - Oxide - Semiconductor type solar cells. The new structure is Metal - Ga2Se3 - GaAs. The I-V characteristics and other parameters calculated for this structure are found to be much better than that for Si based solar cells. Maximum output power is obtained at the intermediate layer thickness approximately 40 angstroms for this typical solar cell.

A chiral-based magnetic memory device without a permanent magnet

PubMed Central

Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

A chiral-based magnetic memory device without a permanent magnet.

PubMed

Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

Injecting Errors for Testing Built-In Test Software

NASA Technical Reports Server (NTRS)

Gender, Thomas K.; Chow, James

2010-01-01

Two algorithms have been conceived to enable automated, thorough testing of Built-in test (BIT) software. The first algorithm applies to BIT routines that define pass/fail criteria based on values of data read from such hardware devices as memories, input ports, or registers. This algorithm simulates effects of errors in a device under test by (1) intercepting data from the device and (2) performing AND operations between the data and the data mask specific to the device. This operation yields values not expected by the BIT routine. This algorithm entails very small, permanent instrumentation of the software under test (SUT) for performing the AND operations. The second algorithm applies to BIT programs that provide services to users application programs via commands or callable interfaces and requires a capability for test-driver software to read and write the memory used in execution of the SUT. This algorithm identifies all SUT code execution addresses where errors are to be injected, then temporarily replaces the code at those addresses with small test code sequences to inject latent severe errors, then determines whether, as desired, the SUT detects the errors and recovers

Threshold switching in SiGeAsTeN chalcogenide glass prepared by As ion implantation into sputtered SiGeTeN film

NASA Astrophysics Data System (ADS)

Liu, Guangyu; Wu, Liangcai; Song, Zhitang; Liu, Yan; Li, Tao; Zhang, Sifan; Song, Sannian; Feng, Songlin

2017-12-01

A memory cell composed of a selector device and a storage device is the basic unit of phase change memory. The threshold switching effect, main principle of selectors, is a universal phenomenon in chalcogenide glasses. In this work, we put forward a safe and controllable method to prepare a SiGeAsTeN chalcogenide film by implanting As ions into sputtered SiGeTeN films. For the SiGeAsTeN material, the phase structure maintains the amorphous state, even at high temperature, indicating that no phase transition occurs for this chalcogenide-based material. The electrical test results show that the SiGeAsTeN-based devices exhibit good threshold switching characteristics and the switching voltage decreases with the increasing As content. The decrease in valence alternation pairs, reducing trap state density, may be the physical mechanism for lower switch-on voltage, which makes the SiGeAsTeN material more applicable in selector devices through component optimization.

Emerging memories

NASA Astrophysics Data System (ADS)

Baldi, Livio; Bez, Roberto; Sandhu, Gurtej

2014-12-01

Memory is a key component of any data processing system. Following the classical Turing machine approach, memories hold both the data to be processed and the rules for processing them. In the history of microelectronics, the distinction has been rather between working memory, which is exemplified by DRAM, and storage memory, exemplified by NAND. These two types of memory devices now represent 90% of all memory market and 25% of the total semiconductor market, and have been the technology drivers in the last decades. Even if radically different in characteristics, they are however based on the same storage mechanism: charge storage, and this mechanism seems to be near to reaching its physical limits. The search for new alternative memory approaches, based on more scalable mechanisms, has therefore gained new momentum. The status of incumbent memory technologies and their scaling limitations will be discussed. Emerging memory technologies will be analyzed, starting from the ones that are already present for niche applications, and which are getting new attention, thanks to recent technology breakthroughs. Maturity level, physical limitations and potential for scaling will be compared to existing memories. At the end the possible future composition of memory systems will be discussed.

Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2007-01-01

Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

Powerful timing generator using mono-chip timers: An application to pulsed nuclear magnetic resonance

NASA Astrophysics Data System (ADS)

Saint-Jalmes, Hervé; Barjhoux, Yves

1982-01-01

We present a 10 line-7 MHz timing generator built on a single board around two LSI timer chips interfaced to a 16-bit microcomputer. Once programmed from the host computer, this device is able to generate elaborate logic sequences on its 10 output lines without further interventions from the CPU. Powerful architecture introduces new possibilities over conventional memory-based timing simulators and word generators. Loop control on a given sequence of events, loop nesting, and various logic combinations can easily be implemented through a software interface, using a symbolic command language. Typical applications of such a device range from development, emulation, and test of integrated circuits, circuit boards, and communication systems to pulse-controlled instrumentation (radar, ultrasonic systems). A particular application to a pulsed Nuclear Magnetic Resonance (NMR) spectrometer is presented, along with customization of the device for generating four-channel radio-frequency pulses and the necessary sequence for subsequent data acquisition.

Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacobs-Gedrim, Robin B.; Agarwal, Sapan; Knisely, Kathrine E.

Resistive memory (ReRAM) shows promise for use as an analog synapse element in energy-efficient neural network algorithm accelerators. A particularly important application is the training of neural networks, as this is the most computationally-intensive procedure in using a neural algorithm. However, training a network with analog ReRAM synapses can significantly reduce the accuracy at the algorithm level. In order to assess this degradation, analog properties of ReRAM devices were measured and hand-written digit recognition accuracy was modeled for the training using backpropagation. Bipolar filamentary devices utilizing three material systems were measured and compared: one oxygen vacancy system, Ta-TaO x, andmore » two conducting metallization systems, Cu-SiO 2, and Ag/chalcogenide. Analog properties and conductance ranges of the devices are optimized by measuring the response to varying voltage pulse characteristics. Key analog device properties which degrade the accuracy are update linearity and write noise. Write noise may improve as a function of device manufacturing maturity, but write nonlinearity appears relatively consistent among the different device material systems and is found to be the most significant factor affecting accuracy. As a result, this suggests that new materials and/or fundamentally different resistive switching mechanisms may be required to improve device linearity and achieve higher algorithm training accuracy.« less

Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator

DOE PAGES

Jacobs-Gedrim, Robin B.; Agarwal, Sapan; Knisely, Kathrine E.; ...

2017-12-01

Resistive memory (ReRAM) shows promise for use as an analog synapse element in energy-efficient neural network algorithm accelerators. A particularly important application is the training of neural networks, as this is the most computationally-intensive procedure in using a neural algorithm. However, training a network with analog ReRAM synapses can significantly reduce the accuracy at the algorithm level. In order to assess this degradation, analog properties of ReRAM devices were measured and hand-written digit recognition accuracy was modeled for the training using backpropagation. Bipolar filamentary devices utilizing three material systems were measured and compared: one oxygen vacancy system, Ta-TaO x, andmore » two conducting metallization systems, Cu-SiO 2, and Ag/chalcogenide. Analog properties and conductance ranges of the devices are optimized by measuring the response to varying voltage pulse characteristics. Key analog device properties which degrade the accuracy are update linearity and write noise. Write noise may improve as a function of device manufacturing maturity, but write nonlinearity appears relatively consistent among the different device material systems and is found to be the most significant factor affecting accuracy. As a result, this suggests that new materials and/or fundamentally different resistive switching mechanisms may be required to improve device linearity and achieve higher algorithm training accuracy.« less

On the design of a miniature haptic ring for cutaneous force feedback using shape memory alloy actuators

NASA Astrophysics Data System (ADS)

Hwang, Donghyun; Lee, Jaemin; Kim, Keehoon

2017-10-01

This paper proposes a miniature haptic ring that can display touch/pressure and shearing force to the user’s fingerpad. For practical use and wider application of the device, it is developed with the aim of achieving high wearability and mobility/portability as well as cutaneous force feedback functionality. A main body of the device is designed as a ring-shaped lightweight structure with a simple driving mechanism, and thin shape memory alloy (SMA) wires having high energy density are applied as actuating elements. Also, based on a band-type wireless control unit including a wireless data communication module, the whole device could be realized as a wearable mobile haptic device system. These features enable the device to take diverse advantages on functional performances and to provide users with significant usability. In this work, the proposed miniature haptic ring is systematically designed, and its working performances are experimentally evaluated with a fabricated functional prototype. The experimental results obviously demonstrate that the proposed device exhibits higher force-to-weight ratio than conventional finger-wearable haptic devices for cutaneous force feedback. Also, it is investigated that operational performances of the device are strongly influenced by electro-thermomechanical behaviors of the SMA actuator. In addition to the experiments for performance evaluation, we conduct a preliminary user test to assess practical feasibility and usability based on user’s qualitative feedback.

Magic cards: a new augmented-reality approach.

PubMed

Demuynck, Olivier; Menendez, José Manuel

2013-01-01

Augmented reality (AR) commonly uses markers for detection and tracking. Such multimedia applications associate each marker with a virtual 3D model stored in the memory of the camera-equipped device running the application. Application users are limited in their interactions, which require knowing how to design and program 3D objects. This generally prevents them from developing their own entertainment AR applications. The Magic Cards application solves this problem by offering an easy way to create and manage an unlimited number of virtual objects that are encoded on special markers.

An enhanced lumped element electrical model of a double barrier memristive device

NASA Astrophysics Data System (ADS)

Solan, Enver; Dirkmann, Sven; Hansen, Mirko; Schroeder, Dietmar; Kohlstedt, Hermann; Ziegler, Martin; Mussenbrock, Thomas; Ochs, Karlheinz

2017-05-01

The massive parallel approach of neuromorphic circuits leads to effective methods for solving complex problems. It has turned out that resistive switching devices with a continuous resistance range are potential candidates for such applications. These devices are memristive systems—nonlinear resistors with memory. They are fabricated in nanotechnology and hence parameter spread during fabrication may aggravate reproducible analyses. This issue makes simulation models of memristive devices worthwhile. Kinetic Monte-Carlo simulations based on a distributed model of the device can be used to understand the underlying physical and chemical phenomena. However, such simulations are very time-consuming and neither convenient for investigations of whole circuits nor for real-time applications, e.g. emulation purposes. Instead, a concentrated model of the device can be used for both fast simulations and real-time applications, respectively. We introduce an enhanced electrical model of a valence change mechanism (VCM) based double barrier memristive device (DBMD) with a continuous resistance range. This device consists of an ultra-thin memristive layer sandwiched between a tunnel barrier and a Schottky-contact. The introduced model leads to very fast simulations by using usual circuit simulation tools while maintaining physically meaningful parameters. Kinetic Monte-Carlo simulations based on a distributed model and experimental data have been utilized as references to verify the concentrated model.

Electrically and Optically Readable Light Emitting Memories

PubMed Central

Chang, Che-Wei; Tan, Wei-Chun; Lu, Meng-Lin; Pan, Tai-Chun; Yang, Ying-Jay; Chen, Yang-Fang

2014-01-01

Electrochemical metallization memories based on redox-induced resistance switching have been considered as the next-generation electronic storage devices. However, the electronic signals suffer from the interconnect delay and the limited reading speed, which are the major obstacles for memory performance. To solve this problem, here we demonstrate the first attempt of light-emitting memory (LEM) that uses SiO2 as the resistive switching material in tandem with graphene-insulator-semiconductor (GIS) light-emitting diode (LED). By utilizing the excellent properties of graphene, such as high conductivity, high robustness and high transparency, our proposed LEM enables data communication via electronic and optical signals simultaneously. Both the bistable light-emission state and the resistance switching properties can be attributed to the conducting filament mechanism. Moreover, on the analysis of current-voltage characteristics, we further confirm that the electroluminescence signal originates from the carrier tunneling, which is quite different from the standard p-n junction model. We stress here that the newly developed LEM device possesses a simple structure with mature fabrication processes, which integrates advantages of all composed materials and can be extended to many other material systems. It should be able to attract academic interest as well as stimulate industrial application. PMID:24894723

A Template-Based Short Course Concept on Android Application Development

ERIC Educational Resources Information Center

Akopian, David; Melkonyan, Arsen; Golgani, Santosh C.; Yuen, Timothy T.; Saygin, Can

2013-01-01

Smartphones are a common accessory to provide rich user experience due to superior memory, advanced software-hardware support, fast processing, and multimedia capabilities. Responding to this trend, advanced engineering systems tend to integrate mobile devices with their solutions to facilitate usability. With many young students showing interest…

Graphics Processing Units for HEP trigger systems

NASA Astrophysics Data System (ADS)

Ammendola, R.; Bauce, M.; Biagioni, A.; Chiozzi, S.; Cotta Ramusino, A.; Fantechi, R.; Fiorini, M.; Giagu, S.; Gianoli, A.; Lamanna, G.; Lonardo, A.; Messina, A.; Neri, I.; Paolucci, P. S.; Piandani, R.; Pontisso, L.; Rescigno, M.; Simula, F.; Sozzi, M.; Vicini, P.

2016-07-01

General-purpose computing on GPUs (Graphics Processing Units) is emerging as a new paradigm in several fields of science, although so far applications have been tailored to the specific strengths of such devices as accelerator in offline computation. With the steady reduction of GPU latencies, and the increase in link and memory throughput, the use of such devices for real-time applications in high-energy physics data acquisition and trigger systems is becoming ripe. We will discuss the use of online parallel computing on GPU for synchronous low level trigger, focusing on CERN NA62 experiment trigger system. The use of GPU in higher level trigger system is also briefly considered.

Space and power efficient hybrid counters array

DOEpatents

Gara, Alan G [Mount Kisco, NY; Salapura, Valentina [Chappaqua, NY

2009-05-12

A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.

Space and power efficient hybrid counters array

DOEpatents

Gara, Alan G.; Salapura, Valentina

2010-03-30

A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.

Nanoelectronics: Opportunities for future space applications

NASA Technical Reports Server (NTRS)

Frazier, Gary

1995-01-01

Further improvements in the performance of integrated electronics will eventually halt due to practical fundamental limits on our ability to downsize transistors and interconnect wiring. Avoiding these limits requires a revolutionary approach to switching device technology and computing architecture. Nanoelectronics, the technology of exploiting physics on the nanometer scale for computation and communication, attempts to avoid conventional limits by developing new approaches to switching, circuitry, and system integration. This presentation overviews the basic principles that operate on the nanometer scale that can be assembled into practical devices and circuits. Quantum resonant tunneling (RT) is used as the center-piece of the overview since RT devices already operate at high temperature (120 degrees C) and can be scaled, in principle, to a few nanometers in semiconductors. Near- and long-term applications of GaAs and silicon quantum devices are suggested for signal and information processing, memory, optoelectronics, and radio frequency (RF) communication.

Efficient Machine Learning Approach for Optimizing Scientific Computing Applications on Emerging HPC Architectures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arumugam, Kamesh

Efficient parallel implementations of scientific applications on multi-core CPUs with accelerators such as GPUs and Xeon Phis is challenging. This requires - exploiting the data parallel architecture of the accelerator along with the vector pipelines of modern x86 CPU architectures, load balancing, and efficient memory transfer between different devices. It is relatively easy to meet these requirements for highly structured scientific applications. In contrast, a number of scientific and engineering applications are unstructured. Getting performance on accelerators for these applications is extremely challenging because many of these applications employ irregular algorithms which exhibit data-dependent control-ow and irregular memory accesses. Furthermore,more » these applications are often iterative with dependency between steps, and thus making it hard to parallelize across steps. As a result, parallelism in these applications is often limited to a single step. Numerical simulation of charged particles beam dynamics is one such application where the distribution of work and memory access pattern at each time step is irregular. Applications with these properties tend to present significant branch and memory divergence, load imbalance between different processor cores, and poor compute and memory utilization. Prior research on parallelizing such irregular applications have been focused around optimizing the irregular, data-dependent memory accesses and control-ow during a single step of the application independent of the other steps, with the assumption that these patterns are completely unpredictable. We observed that the structure of computation leading to control-ow divergence and irregular memory accesses in one step is similar to that in the next step. It is possible to predict this structure in the current step by observing the computation structure of previous steps. In this dissertation, we present novel machine learning based optimization techniques to address the parallel implementation challenges of such irregular applications on different HPC architectures. In particular, we use supervised learning to predict the computation structure and use it to address the control-ow and memory access irregularities in the parallel implementation of such applications on GPUs, Xeon Phis, and heterogeneous architectures composed of multi-core CPUs with GPUs or Xeon Phis. We use numerical simulation of charged particles beam dynamics simulation as a motivating example throughout the dissertation to present our new approach, though they should be equally applicable to a wide range of irregular applications. The machine learning approach presented here use predictive analytics and forecasting techniques to adaptively model and track the irregular memory access pattern at each time step of the simulation to anticipate the future memory access pattern. Access pattern forecasts can then be used to formulate optimization decisions during application execution which improves the performance of the application at a future time step based on the observations from earlier time steps. In heterogeneous architectures, forecasts can also be used to improve the memory performance and resource utilization of all the processing units to deliver a good aggregate performance. We used these optimization techniques and anticipation strategy to design a cache-aware, memory efficient parallel algorithm to address the irregularities in the parallel implementation of charged particles beam dynamics simulation on different HPC architectures. Experimental result using a diverse mix of HPC architectures shows that our approach in using anticipation strategy is effective in maximizing data reuse, ensuring workload balance, minimizing branch and memory divergence, and in improving resource utilization.« less

Intermediate memory devices

NASA Technical Reports Server (NTRS)

Basalayev, G. V.; Kmet, A. B.; Rakov, M. A.; Tarasevich, V. A.

1974-01-01

Several methods of transfer and processing of data whose practical implementation requires operational memory devices are described. Devices incorporating multistable elements are proposed and their main parameters are given. The possibility of using the proposed devices for storing information for transmission in space radio communications channels is examined.

Low-power, high-uniform, and forming-free resistive memory based on Mg-deficient amorphous MgO film with rough surface

NASA Astrophysics Data System (ADS)

Guo, Jiajun; Ren, Shuxia; Wu, Liqian; Kang, Xin; Chen, Wei; Zhao, Xu

2018-03-01

Saving energy and reducing operation parameter fluctuations remain crucial for enabling resistive random access memory (RRAM) to emerge as a universal memory. In this work, we report a resistive memory device based on an amorphous MgO (a-MgO) film that not only exhibits ultralow programming voltage (just 0.22 V) and low power consumption (less than 176.7 μW) but also shows excellent operative uniformity (the coefficient of variation is only 1.7% and 2.2% for SET and RESET voltage, respectively). Moreover, it also shows a forming-free characteristic. Further analysis indicates that these distinctive properties can be attributed to the unstable local structures and the rough surface of the Mg-deficient a-MgO film. These findings show the potential of using a-MgO in high-performance nonvolatile memory applications.

Topological Material-Based Spin Devices

NASA Astrophysics Data System (ADS)

Zhang, Minhao; Wang, Xuefeng

Three-dimensional topological insulators have insulating bulk and gapless helical surface states. One of the most fascinating properties of the metallic surface states is the spin-momentum helical locking. The giant current-driven torques on the magnetic layer have been discovered in TI/ferromagnet bilayers originating from the spin-momentum helical locking, enabling the efficient magnetization switching with a low current density. We demonstrated the current-direction dependent on-off state in TIs-based spin valve devices for memory and logic applications. Further, we demonstrated the Bi2Se3 system will go from a topologically nontrivial state to a topologically trivial state when Bi atoms are replaced by lighter In atoms. Here, topologically trivial metal (BixIny)2 Se3 with high mobility also facilitates the realization of its application in multifunctional spintronic devices.

Directed evolution of bacteriorhodopsin for applications in bioelectronics

PubMed Central

Wagner, Nicole L.; Greco, Jordan A.; Ranaghan, Matthew J.; Birge, Robert R.

2013-01-01

In nature, biological systems gradually evolve through complex, algorithmic processes involving mutation and differential selection. Evolution has optimized biological macromolecules for a variety of functions to provide a comparative advantage. However, nature does not optimize molecules for use in human-made devices, as it would gain no survival advantage in such cooperation. Recent advancements in genetic engineering, most notably directed evolution, have allowed for the stepwise manipulation of the properties of living organisms, promoting the expansion of protein-based devices in nanotechnology. In this review, we highlight the use of directed evolution to optimize photoactive proteins, with an emphasis on bacteriorhodopsin (BR), for device applications. BR, a highly stable light-activated proton pump, has shown great promise in three-dimensional optical memories, real-time holographic processors and artificial retinas. PMID:23676894

Storing and managing information artifacts collected by information analysts using a computing device

DOEpatents

Pike, William A; Riensche, Roderick M; Best, Daniel M; Roberts, Ian E; Whyatt, Marie V; Hart, Michelle L; Carr, Norman J; Thomas, James J

2012-09-18

Systems and computer-implemented processes for storage and management of information artifacts collected by information analysts using a computing device. The processes and systems can capture a sequence of interactive operation elements that are performed by the information analyst, who is collecting an information artifact from at least one of the plurality of software applications. The information artifact can then be stored together with the interactive operation elements as a snippet on a memory device, which is operably connected to the processor. The snippet comprises a view from an analysis application, data contained in the view, and the sequence of interactive operation elements stored as a provenance representation comprising operation element class, timestamp, and data object attributes for each interactive operation element in the sequence.

New trends in the optical and electronic applications of polymers containing transition-metal complexes.

PubMed

Liu, Shu-Juan; Chen, Yang; Xu, Wen-Juan; Zhao, Qiang; Huang, Wei

2012-04-13

Polymers containing transition-metal complexes exhibit excellent optical and electronic properties, which are different from those of polymers with a pure organic skeleton and combine the advantages of both polymers and metal complexes. Hence, research about this class of polymers has attracted more and more interest in recent years. Up to now, a number of novel polymers containing transition-metal complexes have been exploited, and significant advances in their optical and electronic applications have been achieved. In this article, we summarize some new research trends in the applications of this important class of optoelectronic polymers, such as chemo/biosensors, electronic memory devices and photovoltaic devices. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Optically Tunable Magnetoresistance Effect: From Mechanism to Novel Device Application.

PubMed

Liu, Pan; Lin, Xiaoyang; Xu, Yong; Zhang, Boyu; Si, Zhizhong; Cao, Kaihua; Wei, Jiaqi; Zhao, Weisheng

2017-12-28

The magnetoresistance effect in sandwiched structure describes the appreciable magnetoresistance effect of a device with a stacking of two ferromagnetic layers separated by a non-magnetic layer (i.e., a sandwiched structure). The development of this effect has led to the revolution of memory applications during the past decades. In this review, we revisited the magnetoresistance effect and the interlayer exchange coupling (IEC) effect in magnetic sandwiched structures with a spacer layer of non-magnetic metal, semiconductor or organic thin film. We then discussed the optical modulation of this effect via different methods. Finally, we discuss various applications of these effects and present a perspective to realize ultralow-power, high-speed data writing and inter-chip connection based on this tunable magnetoresistance effect.

Ferroelectric symmetry-protected multibit memory cell

NASA Astrophysics Data System (ADS)

Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

2017-02-01

The tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valued non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.

High Density Memory Based on Quantum Device Technology

NASA Technical Reports Server (NTRS)

vanderWagt, Paul; Frazier, Gary; Tang, Hao

1995-01-01

We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

Physical Realization of a Supervised Learning System Built with Organic Memristive Synapses

NASA Astrophysics Data System (ADS)

Lin, Yu-Pu; Bennett, Christopher H.; Cabaret, Théo; Vodenicarevic, Damir; Chabi, Djaafar; Querlioz, Damien; Jousselme, Bruno; Derycke, Vincent; Klein, Jacques-Olivier

2016-09-01

Multiple modern applications of electronics call for inexpensive chips that can perform complex operations on natural data with limited energy. A vision for accomplishing this is implementing hardware neural networks, which fuse computation and memory, with low cost organic electronics. A challenge, however, is the implementation of synapses (analog memories) composed of such materials. In this work, we introduce robust, fastly programmable, nonvolatile organic memristive nanodevices based on electrografted redox complexes that implement synapses thanks to a wide range of accessible intermediate conductivity states. We demonstrate experimentally an elementary neural network, capable of learning functions, which combines four pairs of organic memristors as synapses and conventional electronics as neurons. Our architecture is highly resilient to issues caused by imperfect devices. It tolerates inter-device variability and an adaptable learning rule offers immunity against asymmetries in device switching. Highly compliant with conventional fabrication processes, the system can be extended to larger computing systems capable of complex cognitive tasks, as demonstrated in complementary simulations.

Physical Realization of a Supervised Learning System Built with Organic Memristive Synapses.

PubMed

Lin, Yu-Pu; Bennett, Christopher H; Cabaret, Théo; Vodenicarevic, Damir; Chabi, Djaafar; Querlioz, Damien; Jousselme, Bruno; Derycke, Vincent; Klein, Jacques-Olivier

2016-09-07

Multiple modern applications of electronics call for inexpensive chips that can perform complex operations on natural data with limited energy. A vision for accomplishing this is implementing hardware neural networks, which fuse computation and memory, with low cost organic electronics. A challenge, however, is the implementation of synapses (analog memories) composed of such materials. In this work, we introduce robust, fastly programmable, nonvolatile organic memristive nanodevices based on electrografted redox complexes that implement synapses thanks to a wide range of accessible intermediate conductivity states. We demonstrate experimentally an elementary neural network, capable of learning functions, which combines four pairs of organic memristors as synapses and conventional electronics as neurons. Our architecture is highly resilient to issues caused by imperfect devices. It tolerates inter-device variability and an adaptable learning rule offers immunity against asymmetries in device switching. Highly compliant with conventional fabrication processes, the system can be extended to larger computing systems capable of complex cognitive tasks, as demonstrated in complementary simulations.

Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density.

PubMed

Al-Haddad, Ahmed; Wang, Chengliang; Qi, Haoyuan; Grote, Fabian; Wen, Liaoyong; Bernhard, Jörg; Vellacheri, Ranjith; Tarish, Samar; Nabi, Ghulam; Kaiser, Ute; Lei, Yong

2016-09-07

Resistive switching random access memories (RRAM) have attracted great scientific and industrial attention for next generation data storage because of their advantages of nonvolatile properties, high density, low power consumption, fast writing/erasing speed, good endurance, and simple and small operation system. Here, by using a template-assisted technique, we demonstrate a three-dimensional highly ordered vertical RRAM device array with density as high as that of the nanopores of the template (10(8)-10(9) cm(-2)), which can also be fabricated in large area. The high crystallinity of the materials, the large contact area and the intimate semiconductor/electrode interface (3 nm interfacial layer) make the ultralow voltage operation (millivolt magnitude) and ultralow power consumption (picowatt) possible. Our procedure for fabrication of the nanodevice arrays in large area can be used for producing many other different materials and such three-dimensional electronic device arrays with the capability to adjust the device densities can be extended to other applications of the next generation nanodevice technology.

The role of EEPROM devices in upcoming ISDN applications

NASA Astrophysics Data System (ADS)

Nette, Herbert L.

1991-02-01

Integrated Services Digital Network (ISDN) equipments are rapidly becoming a major market for semiconductor chips. Although at first glance this growing market appears to be geared at logic chips, nonvolatile memories represent important support chips and will become a significant segment of this market. Challenges in these applications consist in operating EEPROMs at lower voltages and lower power and embedding them on ever more complex communications processor chips.

Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

2012-01-01

Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

A fast and low-power microelectromechanical system-based non-volatile memory device

PubMed Central

Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

2011-01-01

Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

Comparison of technologies for nano device prototyping with a special focus on ion beams: A review

NASA Astrophysics Data System (ADS)

Bruchhaus, L.; Mazarov, P.; Bischoff, L.; Gierak, J.; Wieck, A. D.; Hövel, H.

2017-03-01

Nano device prototyping (NDP) is essential for realizing and assessing ideas as well as theories in the form of nano devices, before they can be made available in or as commercial products. In this review, application results patterned similarly to those in the semiconductor industry (for cell phone, computer processors, or memory) will be presented. For NDP, some requirements are different: thus, other technologies are employed. Currently, in NDP, for many applications direct write Gaussian vector scan electron beam lithography (EBL) is used to define the required features in organic resists on this scale. We will take a look at many application results carried out by EBL, self-organized 3D epitaxy, atomic probe microscopy (scanning tunneling microscope/atomic force microscope), and in more detail ion beam techniques. For ion beam techniques, there is a special focus on those based upon liquid metal (alloy) ion sources, as recent developments have significantly increased their applicability for NDP.

Guide wire extension for shape memory polymer occlusion removal devices

DOEpatents

Maitland, Duncan J [Pleasant Hill, CA; Small, IV, Ward; Hartman, Jonathan [Sacramento, CA

2009-11-03

A flexible extension for a shape memory polymer occlusion removal device. A shape memory polymer instrument is transported through a vessel via a catheter. A flexible elongated unit is operatively connected to the distal end of the shape memory polymer instrument to enhance maneuverability through tortuous paths en route to the occlusion.

76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-12-27

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...

Spacecraft optical disk recorder memory buffer control

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1992-01-01

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Novel shape memory alloy optical fibre connection method

NASA Astrophysics Data System (ADS)

Trouillard, G.; Zivojinovic, P.; Cerutti, R.; Godmaire, X. Pruneau; Weynant, E.

2010-02-01

In this paper, the capacity and quality of a shape memory alloy device is demonstrated for installation and connection of 125-μm to 1000-μm optical fibres. The new mechanical splice has the particularity of using a very simple tool for aligning and holding the cladding of fibres itself without the need of glue. Optimend main characteristics are its small dimensions (few millimetres), reusability, glueless, ruggedness, low temperature variation, heat dissipation and ease of use. These properties are very suitable for many optical fibre applications where both quick and reliable connections are desirable.

Highly uniform and reliable resistive switching characteristics of a Ni/WOx/p+-Si memory device

NASA Astrophysics Data System (ADS)

Kim, Tae-Hyeon; Kim, Sungjun; Kim, Hyungjin; Kim, Min-Hwi; Bang, Suhyun; Cho, Seongjae; Park, Byung-Gook

2018-02-01

In this paper, we investigate the resistive switching behavior of a bipolar resistive random-access memory (RRAM) in a Ni/WOx/p+-Si RRAM with CMOS compatibility. Highly unifrom and reliable bipolar resistive switching characteristics are observed by a DC voltage sweeping and its switching mechanism can be explained by SCLC model. As a result, the possibility of metal-insulator-silicon (MIS) structural WOx-based RRAM's application to Si-based 1D (diode)-1R (RRAM) or 1T (transistor)-1R (RRAM) structure is demonstrated.

Optically readout write once read many memory with single active organic layer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nguyen, Viet Cuong; Lee, Pooi See, E-mail: pslee@ntu.edu.sg

An optically readable write once read many memory (WORM) in Ag/Poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene] (MEH PPV)/ITO is demonstrated in this work. Utilising characteristics of the organic light emitting diode structure of Ag/MEH PPV/ITO and electrochemical metallization of Ag, a WORM with light emitting capability can be realised. The simple fabrication process and multifunction capability of the device can be useful for future wearable optoelectronics and photomemory applications, where fast and parallel readout can be achieved by photons.

Solution-processed flexible NiO resistive random access memory device

NASA Astrophysics Data System (ADS)

Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

2018-04-01

Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

Design and development of novel antibacterial Ti-Ni-Cu shape memory alloys for biomedical application.

PubMed

Li, H F; Qiu, K J; Zhou, F Y; Li, L; Zheng, Y F

2016-11-29

In the case of medical implants, foreign materials are preferential sites for bacterial adhesion and microbial contamination, which can lead to the development of prosthetic infections. Commercially biomedical TiNi shape memory alloys are the most commonly used materials for permanent implants in contact with bone and dental, and the prevention of infections of TiNi biomedical shape memory alloys in clinical cases is therefore a crucial challenge for orthopaedic and dental surgeons. In the present study, copper has been chosen as the alloying element for design and development novel ternary biomedical Ti‒Ni‒Cu shape memory alloys with antibacterial properties. The effects of copper alloying element on the microstructure, mechanical properties, corrosion behaviors, cytocompatibility and antibacterial properties of biomedical Ti‒Ni‒Cu shape memory alloys have been systematically investigated. The results demonstrated that Ti‒Ni‒Cu alloys have good mechanical properties, and remain the excellent shape memory effects after adding copper alloying element. The corrosion behaviors of Ti‒Ni‒Cu alloys are better than the commercial biomedical Ti‒50.8Ni alloys. The Ti‒Ni‒Cu alloys exhibit excellent antibacterial properties while maintaining the good cytocompatibility, which would further guarantee the potential application of Ti‒Ni‒Cu alloys as future biomedical implants and devices without inducing bacterial infections.

Design and development of novel antibacterial Ti-Ni-Cu shape memory alloys for biomedical application

NASA Astrophysics Data System (ADS)

Li, H. F.; Qiu, K. J.; Zhou, F. Y.; Li, L.; Zheng, Y. F.

2016-11-01

In the case of medical implants, foreign materials are preferential sites for bacterial adhesion and microbial contamination, which can lead to the development of prosthetic infections. Commercially biomedical TiNi shape memory alloys are the most commonly used materials for permanent implants in contact with bone and dental, and the prevention of infections of TiNi biomedical shape memory alloys in clinical cases is therefore a crucial challenge for orthopaedic and dental surgeons. In the present study, copper has been chosen as the alloying element for design and development novel ternary biomedical Ti‒Ni‒Cu shape memory alloys with antibacterial properties. The effects of copper alloying element on the microstructure, mechanical properties, corrosion behaviors, cytocompatibility and antibacterial properties of biomedical Ti‒Ni‒Cu shape memory alloys have been systematically investigated. The results demonstrated that Ti‒Ni‒Cu alloys have good mechanical properties, and remain the excellent shape memory effects after adding copper alloying element. The corrosion behaviors of Ti‒Ni‒Cu alloys are better than the commercial biomedical Ti‒50.8Ni alloys. The Ti‒Ni‒Cu alloys exhibit excellent antibacterial properties while maintaining the good cytocompatibility, which would further guarantee the potential application of Ti‒Ni‒Cu alloys as future biomedical implants and devices without inducing bacterial infections.

Molecular Rotors as Switches

PubMed Central

Xue, Mei; Wang, Kang L.

2012-01-01

The use of a functional molecular unit acting as a state variable provides an attractive alternative for the next generations of nanoscale electronics. It may help overcome the limits of conventional MOSFETd due to their potential scalability, low-cost, low variability, and highly integratable characteristics as well as the capability to exploit bottom-up self-assembly processes. This bottom-up construction and the operation of nanoscale machines/devices, in which the molecular motion can be controlled to perform functions, have been studied for their functionalities. Being triggered by external stimuli such as light, electricity or chemical reagents, these devices have shown various functions including those of diodes, rectifiers, memories, resonant tunnel junctions and single settable molecular switches that can be electronically configured for logic gates. Molecule-specific electronic switching has also been reported for several of these device structures, including nanopores containing oligo(phenylene ethynylene) monolayers, and planar junctions incorporating rotaxane and catenane monolayers for the construction and operation of complex molecular machines. A specific electrically driven surface mounted molecular rotor is described in detail in this review. The rotor is comprised of a monolayer of redox-active ligated copper compounds sandwiched between a gold electrode and a highly-doped P+ Si. This electrically driven sandwich-type monolayer molecular rotor device showed an on/off ratio of approximately 104, a read window of about 2.5 V, and a retention time of greater than 104 s. The rotation speed of this type of molecular rotor has been reported to be in the picosecond timescale, which provides a potential of high switching speed applications. Current-voltage spectroscopy (I-V) revealed a temperature-dependent negative differential resistance (NDR) associated with the device. The analysis of the device I–V characteristics suggests the source of the observed switching effects to be the result of the redox-induced ligand rotation around the copper metal center and this attribution of switching is consistent with the observed temperature dependence of the switching behavior as well as the proposed energy diagram of the device. The observed resistance switching shows the potential for future non-volatile memories and logic devices applications. This review will discuss the progress and provide a perspective of molecular motion for nanoelectronics and other applications.

Applying a cloud computing approach to storage architectures for spacecraft

NASA Astrophysics Data System (ADS)

Baldor, Sue A.; Quiroz, Carlos; Wood, Paul

As sensor technologies, processor speeds, and memory densities increase, spacecraft command, control, processing, and data storage systems have grown in complexity to take advantage of these improvements and expand the possible missions of spacecraft. Spacecraft systems engineers are increasingly looking for novel ways to address this growth in complexity and mitigate associated risks. Looking to conventional computing, many solutions have been executed to solve both the problem of complexity and heterogeneity in systems. In particular, the cloud-based paradigm provides a solution for distributing applications and storage capabilities across multiple platforms. In this paper, we propose utilizing a cloud-like architecture to provide a scalable mechanism for providing mass storage in spacecraft networks that can be reused on multiple spacecraft systems. By presenting a consistent interface to applications and devices that request data to be stored, complex systems designed by multiple organizations may be more readily integrated. Behind the abstraction, the cloud storage capability would manage wear-leveling, power consumption, and other attributes related to the physical memory devices, critical components in any mass storage solution for spacecraft. Our approach employs SpaceWire networks and SpaceWire-capable devices, although the concept could easily be extended to non-heterogeneous networks consisting of multiple spacecraft and potentially the ground segment.

SnO2-based memristors and the potential synergies of integrating memristors with MEMS

NASA Astrophysics Data System (ADS)

Zubia, David; Almeida, Sergio; Talukdar, Arka; Mireles, Jose; MacDonald, Eric

2012-06-01

Memristors, usually in the form metal/metal-oxide/metal, have attracted much attention due to their potential application for non-volatile memory. Their simple structure and ease of fabrication make them good candidates for dense memory with projections of 22 terabytes per wafer. Excellent switching times of ~10 ns, memory endurance of >109 cycles, and extrapolated retention times of >10 yrs have been reported. Interestingly, memristors use the migration of ions to change their resistance in response to charge flow, and can therefore measure and remember the amount of current that has flowed. This is similar to many MEMS devices in which the motion of mass is an operating principle of the device. Memristors are also similar to MEMS in the sense that they can both be resistant to radiation effects. Memristors are radiation tolerant since information is stored as a structural change and not as electronic charge. Functionally, a MEMS device's sensitivity to radiation is concomitant to the role that the dielectric layers play in the function of the device. This is due to radiation-induced trapped charge in the dielectrics which can alter device performance and in extreme cases cause failure. Although different material systems have been investigated for memristors, SnO2 has received little attention even though it demonstrates excellent electronic properties and a high resistance to displacement damage from radiation due to a large Frenkel defect energy (7 eV) compared its bandgap (3.6 eV). This talk discusses recent research on SnO2-based memristors and the potential synergies of integrating memristors with MEMS.

Makalu: fast recoverable allocation of non-volatile memory

DOE PAGES

Bhandari, Kumud; Chakrabarti, Dhruva R.; Boehm, Hans-J.

2016-10-19

Byte addressable non-volatile memory (NVRAM) is likely to supplement, and perhaps eventually replace, DRAM. Applications can then persist data structures directly in memory instead of serializing them and storing them onto a durable block device. However, failures during execution can leave data structures in NVRAM unreachable or corrupt. In this paper, we present Makalu, a system that addresses non-volatile memory management. Makalu offers an integrated allocator and recovery-time garbage collector that maintains internal consistency, avoids NVRAM memory leaks, and is efficient, all in the face of failures. We show that a careful allocator design can support a less restrictive andmore » a much more familiar programming model than existing persistent memory allocators. Our allocator significantly reduces the per allocation persistence overhead by lazily persisting non-essential metadata and by employing a post-failure recovery-time garbage collector. Experimental results show that the resulting online speed and scalability of our allocator are comparable to well-known transient allocators, and significantly better than state-of-the-art persistent allocators.« less

Strategic design and fabrication of acrylic shape memory polymers

NASA Astrophysics Data System (ADS)

Park, Ju Hyuk; Kim, Hansu; Ryoun Youn, Jae; Song, Young Seok

2017-08-01

Modulation of thermomechanics nature is a critical issue for an optimized use of shape memory polymers (SMPs). In this study, a strategic approach was proposed to control the transition temperature of SMPs. Free radical vinyl polymerization was employed for tailoring and preparing acrylic SMPs. Transition temperatures of the shape memory tri-copolymers were tuned by changing the composition of monomers. X-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy analyses were carried out to evaluate the chemical structures and compositions of the synthesized SMPs. The thermomechanical properties and shape memory performance of the SMPs were also examined by performing dynamic mechanical thermal analysis. Numerical simulation based on a finite element method provided consistent results with experimental cyclic shape memory tests of the specimens. Transient shape recovery tests were conducted and optical transparence of the samples was identified. We envision that the materials proposed in this study can help develop a new type of shape-memory devices in biomedical and aerospace engineering applications.

Makalu: fast recoverable allocation of non-volatile memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bhandari, Kumud; Chakrabarti, Dhruva R.; Boehm, Hans-J.

Byte addressable non-volatile memory (NVRAM) is likely to supplement, and perhaps eventually replace, DRAM. Applications can then persist data structures directly in memory instead of serializing them and storing them onto a durable block device. However, failures during execution can leave data structures in NVRAM unreachable or corrupt. In this paper, we present Makalu, a system that addresses non-volatile memory management. Makalu offers an integrated allocator and recovery-time garbage collector that maintains internal consistency, avoids NVRAM memory leaks, and is efficient, all in the face of failures. We show that a careful allocator design can support a less restrictive andmore » a much more familiar programming model than existing persistent memory allocators. Our allocator significantly reduces the per allocation persistence overhead by lazily persisting non-essential metadata and by employing a post-failure recovery-time garbage collector. Experimental results show that the resulting online speed and scalability of our allocator are comparable to well-known transient allocators, and significantly better than state-of-the-art persistent allocators.« less

Investigation of multilayer WS2 flakes as charge trapping stack layers in non-volatile memories

NASA Astrophysics Data System (ADS)

Wang, Hong; Ren, Deliang; Lu, Chao; Yan, Xiaobing

2018-06-01

In this study, the non-volatile flash memory devices utilize tungsten sulfide flakes as the charge trapping stack layers were fabricated. The sandwiched structure of Pd/ZHO/WS2/ZHO/WS2/SiO2/Si manifests a memory window of 2.26 V and a high density of trapped charges 4.88 × 1012/cm2 under a ±5 V gate sweeping voltage. Moreover, the data retention results of as-fabricated non-volatile memories demonstrate that the high and low capacitance states are enhanced by 3.81% and 3.11%, respectively, after a measurement duration of 1.20 × 104 s. These remarkable achievements are probably attributed to the defects and band gap of WS2 flakes. Besides, the proposed memory fabrication is not only compatible with CMOS manufacturing processes but also gets rid of the high-temperature annealing process. Overall, this proposed non-volatile memory is highly attractive for low voltage, long data retention applications.

Flexible and twistable non-volatile memory cell array with all-organic one diode-one resistor architecture.

PubMed

Ji, Yongsung; Zeigler, David F; Lee, Dong Su; Choi, Hyejung; Jen, Alex K-Y; Ko, Heung Cho; Kim, Tae-Wook

2013-01-01

Flexible organic memory devices are one of the integral components for future flexible organic electronics. However, high-density all-organic memory cell arrays on malleable substrates without cross-talk have not been demonstrated because of difficulties in their fabrication and relatively poor performances to date. Here we demonstrate the first flexible all-organic 64-bit memory cell array possessing one diode-one resistor architectures. Our all-organic one diode-one resistor cell exhibits excellent rewritable switching characteristics, even during and after harsh physical stresses. The write-read-erase-read output sequence of the cells perfectly correspond to the external pulse signal regardless of substrate deformation. The one diode-one resistor cell array is clearly addressed at the specified cells and encoded letters based on the standard ASCII character code. Our study on integrated organic memory cell arrays suggests that the all-organic one diode-one resistor cell architecture is suitable for high-density flexible organic memory applications in the future.

Recent Advances on Neuromorphic Systems Using Phase-Change Materials

NASA Astrophysics Data System (ADS)

Wang, Lei; Lu, Shu-Ren; Wen, Jing

2017-05-01

Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.

Fabrication of Nano-Crossbar Resistive Switching Memory Based on the Copper-Tantalum Pentoxide-Platinum Device Structure

NASA Astrophysics Data System (ADS)

Olga Gneri, Paula; Jardim, Marcos

Resistive switching memory has been of interest lately not only for its simple metal-insulator-metal (MIM) structure but also for its promising ease of scalability an integration into current CMOS technologies like the Field Programmable Gate Arrays and other non-volatile memory applications. There are several resistive switching MIM combinations but under this scope of research, attention will be paid to the bipolar resistive switching characteristics and fabrication of Tantalum Pentaoxide sandwiched between platinum and copper. By changing the polarity of the voltage bias, this metal-insulator-metal (MIM) device can be switched between a high resistive state (OFF) and low resistive state (ON). The change in states is induced by an electrochemical metallization process, which causes a formation or dissolution of Cu metal filamentary paths in the Tantalum Pentaoxide insulator. There is very little thorough experimental information about the Cu-Ta 2O5-Pt switching characteristics when scaled to nanometer dimensions. In this light, the MIM structure was fabricated in a two-dimensional crossbar format. Also, with the limited available resources, a multi-spacer technique was formulated to localize the active device area in this MIM configuration to less than 20nm. This step is important in understanding the switching characteristics and reliability of this structure when scaled to nanometer dimensions.

Microscopic origin of read current noise in TaOx-based resistive switching memory by ultra-low temperature measurement

NASA Astrophysics Data System (ADS)

Pan, Yue; Cai, Yimao; Liu, Yefan; Fang, Yichen; Yu, Muxi; Tan, Shenghu; Huang, Ru

2016-04-01

TaOx-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaOx-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25 K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaOx RRAM devices. A statistical comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaOx RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activation of conduction centers that form the percolation network. At last, a unified model in the framework of hopping conduction is proposed to explain the underlying mechanism of both RTN and ACF noise, which can provide meaningful guidelines for designing noise-immune RRAM devices.

Recent Advances on Neuromorphic Systems Using Phase-Change Materials.

PubMed

Wang, Lei; Lu, Shu-Ren; Wen, Jing

2017-12-01

Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.

Organic memory device with self-assembly monolayered aptamer conjugated nanoparticles

NASA Astrophysics Data System (ADS)

Oh, Sewook; Kim, Minkeun; Kim, Yejin; Jung, Hunsang; Yoon, Tae-Sik; Choi, Young-Jin; Jung Kang, Chi; Moon, Myeong-Ju; Jeong, Yong-Yeon; Park, In-Kyu; Ho Lee, Hyun

2013-08-01

An organic memory structure using monolayered aptamer conjugated gold nanoparticles (Au NPs) as charge storage nodes was demonstrated. Metal-pentacene-insulator-semiconductor device was adopted for the non-volatile memory effect through self assembly monolayer of A10-aptamer conjugated Au NPs, which was formed on functionalized insulator surface with prostate-specific membrane antigen protein. The capacitance versus voltage (C-V) curves obtained for the monolayered Au NPs capacitor exhibited substantial flat-band voltage shift (ΔVFB) or memory window of 3.76 V under (+/-)7 V voltage sweep. The memory device format can be potentially expanded to a highly specific capacitive sensor for the aptamer-specific biomolecule detection.

Terahertz electrical writing speed in an antiferromagnetic memory

PubMed Central

Kašpar, Zdeněk; Campion, Richard P.; Baumgartner, Manuel; Sinova, Jairo; Kužel, Petr; Müller, Melanie; Kampfrath, Tobias

2018-01-01

The speed of writing of state-of-the-art ferromagnetic memories is physically limited by an intrinsic gigahertz threshold. Recently, realization of memory devices based on antiferromagnets, in which spin directions periodically alternate from one atomic lattice site to the next has moved research in an alternative direction. We experimentally demonstrate at room temperature that the speed of reversible electrical writing in a memory device can be scaled up to terahertz using an antiferromagnet. A current-induced spin-torque mechanism is responsible for the switching in our memory devices throughout the 12-order-of-magnitude range of writing speeds from hertz to terahertz. Our work opens the path toward the development of memory-logic technology reaching the elusive terahertz band. PMID:29740601

Perspectives of voltage control for magnetic exchange bias in multiferroic heterostructures

NASA Astrophysics Data System (ADS)

Yang, Q.; Zhou, Z.; Sun, N. X.; Liu, M.

2017-04-01

Exchange bias, as an internal magnetic bias induced by a ferromagnetic-antiferromagnetic exchange coupling, is extremely important in many magnetic applications such as memories, sensors and other devices. Voltage control of exchange bias in multiferroics provides an energy-efficient way to achieve a rapidly 180° deterministic switching of magnetization, which has been considered as a key challenge in realizing next generation of fast, compact and ultra-low power magnetoelectric memories and sensors. Additionally, exchange bias can enhance dynamic magnetoelectric coupling strength in an external-field-free manner. In this paper, we provide a perspective on voltage control of exchange bias in different multiferroic heterostructures. Brief mechanization and related experiments are discussed as well as future trend and challenges that can be overcome by electrically tuning of exchange bias in state-of-the-art magnetoelectric devices.

Finite Element Analysis of Adaptive-Stiffening and Shape-Control SMA Hybrid Composites

NASA Technical Reports Server (NTRS)

Gao, Xiu-Jie; Turner, Travis L.; Burton, Deborah; Brinson, L. Catherine

2005-01-01

The usage of shape memory materials has extended rapidly to many fields, including medical devices, actuators, composites, structures and MEMS devices. For these various applications, shape memory alloys (SMAs) are available in various forms: bulk, wire, ribbon, thin film, and porous. In this work, the focus is on SMA hybrid composites with adaptive-stiffening or morphing functions. These composites are created by using SMA ribbons or wires embedded in a polymeric based composite panel/beam. Adaptive stiffening or morphing is activated via selective resistance heating or uniform thermal loads. To simulate the thermomechanical behavior of these composites, a SMA model was implemented using ABAQUS user element interface and finite element simulations of the systems were studied. Several examples are presented which show that the implemented model can be a very useful design and simulation tool for SMA hybrid composites.

Professionals' views on the use of smartphone technology to support children and adolescents with memory impairment due to acquired brain injury.

PubMed

Plackett, Ruth; Thomas, Sophie; Thomas, Shirley

2017-04-01

Purpose To identify from a health-care professionals' perspective whether smartphones are used by children and adolescents with acquired brain injury as memory aids; what factors predict smartphone use and what barriers prevent the use of smartphones as memory aids by children and adolescents. Method A cross-sectional online survey was undertaken with 88 health-care professionals working with children and adolescents with brain injury. Results Children and adolescents with brain injury were reported to use smartphones as memory aids by 75% of professionals. However, only 42% of professionals helped their clients to use smartphones. The only factor that significantly predicted reported smartphone use was the professionals' positive attitudes toward assistive technology. Several barriers to using smartphones as memory aids were identified, including the poor accessibility of devices and cost of devices. Conclusion Many children and adolescents with brain injury are already using smartphones as memory aids but this is often not facilitated by professionals. Improving the attitudes of professionals toward using smartphones as assistive technology could help to increase smartphone use in rehabilitation. Implications for Rehabilitation Smartphones could be incorporated into rehabilitation programs for young people with brain injury as socially acceptable compensatory aids. Further training and support for professionals on smartphones as compensatory aids could increase professionals' confidence and attitudes in facilitating the use of smartphones as memory aids. Accessibility could be enhanced by the development of a smartphone application specifically designed to be used by young people with brain injury.

Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS{sub 2} quantum dot-polymethylmethacrylate nanocomposites

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan, E-mail: twk@hanyang.ac.kr

2014-12-08

Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative ofmore » the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.« less

An Introduction to the Memristor

ERIC Educational Resources Information Center

Atkin, Keith

2013-01-01

In recent years there has been a revolution in electronics, with a variety of physical phenomena being utilized in the construction of new types of memory circuits for computer application. A device which has had an increasing role is the memristor, whose description and properties have so far had little mention in physics education. This paper…

Temperature-driven topological quantum phase transitions in a phase-change material Ge2Sb2Te5.

PubMed

Eremeev, S V; Rusinov, I P; Echenique, P M; Chulkov, E V

2016-12-13

The Ge 2 Sb 2 Te 5 is a phase-change material widely used in optical memory devices and is a leading candidate for next generation non-volatile random access memory devices which are key elements of various electronics and portable systems. Despite the compound is under intense investigation its electronic structure is currently not fully understood. The present work sheds new light on the electronic structure of the Ge 2 Sb 2 Te 5 crystalline phases. We demonstrate by predicting from first-principles calculations that stable crystal structures of Ge 2 Sb 2 Te 5 possess different topological quantum phases: a topological insulator phase is realized in low-temperature structure and Weyl semimetal phase is a characteristic of the high-temperature structure. Since the structural phase transitions are caused by the temperature the switching between different topologically non-trivial phases can be driven by variation of the temperature. The obtained results reveal the rich physics of the Ge 2 Sb 2 Te 5 compound and open previously unexplored possibility for spintronics applications of this material, substantially expanding its application potential.

[Portable multi-purpose device for monitoring of physiological informations].

PubMed

Tamura, T; Togawa, T

1983-05-01

Unconstrained system that measures physiological information as skin temperatures and heart rate per unit time of a human subject was developed. The system contained portable device included memory control unit, instrumentation unit, timer and batteries, read-out unit, test unit and verify unit. Total number of data and channels, and interval were selected by switches in the memory control unit. The data from the instrumentation unit were transferred to memory control unit and stored in the Erasable Programmable ROM (EPROM). After measurement, EPROM chip was taken off the memory control unit and put on the read-out unit which transferred the data to the microcomputer. The data were directly calculated and analyzed by microcomputer. In application of the instrumentation unit, 8-channel skin thermometer was developed and tested. After amplification, 8 analog signals were multiplexed and converted into the binary codes. The digital signals were sequentially transferred to memory control unit and stored in the EPROM under controlled signal. The accuracy of the system is determined primarily by the accuracy of the sensor of instrumentation unit. The overall accuracy of 8-channel skin thermometer is conservatively stated within 0.1 degree C. This may prove to be useful in providing an objective measurement of human subjects, and can be used in studying environmental effect for human body and sport activities in a large population setting.

Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

NASA Astrophysics Data System (ADS)

Valentini, L.; Cardinali, M.; Fortunati, E.; Kenny, J. M.

2014-10-01

With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.

Azurin/CdSe-ZnS-Based Bio-Nano Hybrid Structure for Nanoscale Resistive Memory Device.

PubMed

Yagati, Ajay Kumar; Lee, Taek; Choi, Jeong-Woo

2017-07-15

In the present study, we propose a method for bio-nano hybrid formation by coupling a redox metalloprotein, Azurin, with CdSe-ZnS quantum dot for the development of a nanoscale resistive memory device. The covalent interaction between the two nanomaterials enables a strong and effective binding to form an azurin/CdSe-ZnS hybrid, and also enabled better controllability to couple with electrodes to examine the memory function properties. Morphological and optical properties were performed to confirm both hybrid formations and also their individual components. Current-Voltage (I-V) measurements on the hybrid nanostructures exhibited bistable current levels towards the memory function device, that and those characteristics were unnoticeable on individual nanomaterials. The hybrids showed good retention characteristics with high stability and durability, which is a promising feature for future nanoscale memory devices.

Ordering of guarded and unguarded stores for no-sync I/O

DOEpatents

Gara, Alan; Ohmacht, Martin

2013-06-25

A parallel computing system processes at least one store instruction. A first processor core issues a store instruction. A first queue, associated with the first processor core, stores the store instruction. A second queue, associated with a first local cache memory device of the first processor core, stores the store instruction. The first processor core updates first data in the first local cache memory device according to the store instruction. The third queue, associated with at least one shared cache memory device, stores the store instruction. The first processor core invalidates second data, associated with the store instruction, in the at least one shared cache memory. The first processor core invalidates third data, associated with the store instruction, in other local cache memory devices of other processor cores. The first processor core flushing only the first queue.

Temperature and field-dependent transport measurements in continuously tunable tantalum oxide memristors expose the dominant state variable

NASA Astrophysics Data System (ADS)

Graves, Catherine E.; Dávila, Noraica; Merced-Grafals, Emmanuelle J.; Lam, Si-Ty; Strachan, John Paul; Williams, R. Stanley

2017-03-01

Applications of memristor devices are quickly moving beyond computer memory to areas of analog and neuromorphic computation. These applications require the design of devices with different characteristics from binary memory, such as a large tunable range of conductance. A complete understanding of the conduction mechanisms and their corresponding state variable(s) is crucial for optimizing performance and designs in these applications. Here we present measurements of low bias I-V characteristics of 6 states in a Ta/ tantalum-oxide (TaOx)/Pt memristor spanning over 2 orders of magnitude in conductance and temperatures from 100 K to 500 K. Our measurements show that the 300 K device conduction is dominated by a temperature-insensitive current that varies with non-volatile memristor state, with an additional leakage contribution from a thermally-activated current channel that is nearly independent of the memristor state. We interpret these results with a parallel conduction model of Mott hopping and Schottky emission channels, fitting the voltage and temperature dependent experimental data for all memristor states with only two free parameters. The memristor conductance is linearly correlated with N, the density of electrons near EF participating in the Mott hopping conduction, revealing N to be the dominant state variable for low bias conduction in this system. Finally, we show that the Mott hopping sites can be ascribed to oxygen vacancies, where the local oxygen vacancy density responsible for critical hopping pathways controls the memristor conductance.

RFID and Memory Devices Fabricated Integrally on Substrates

NASA Technical Reports Server (NTRS)

Schramm, Harry F.

2004-01-01

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for the deposition of the device. By use of a vacuum arc vapor deposition apparatus, a thin electrically insulating film would first be deposited on the substrate. Subsequent layers of materials would then be deposited and patterned by use of known integrated-circuit fabrication techniques. The total thickness of the deposited layers could be much less than the 100- m thickness of the thinnest state-of-the-art self-contained microchips. Such a thin deposit could be readily concealed by simply painting over it. Both large vacuum chambers for production runs and portable hand-held devices for in situ applications are available.

Integrated Optical Information Processing

DTIC Science & Technology

1988-08-01

applications in optical disk memory systems [91. This device is constructed in a glass /SiO2/Si waveguide. The choice of a Si substrate allows for the...contact mask) were formed in the photoresist deposited on all of the samples, we covered the unwanted gratings on each sample with cover glass slides...processing, let us consider TeO2 (v, = 620 m/s) as a potential substrate for applications requiring large time delays. This con- sideration is despite

Coexistence of unipolar and bipolar resistive switching behaviors in NiFe2O4 thin film devices by doping Ag nanoparticles

NASA Astrophysics Data System (ADS)

Hao, Aize; Ismail, Muhammad; He, Shuai; Huang, Wenhua; Qin, Ni; Bao, Dinghua

2018-02-01

The coexistence of unipolar and bipolar resistive switching (RS) behaviors of Ag-nanoparticles (Ag-NPs) doped NiFe2O4 (NFO) based memory devices was investigated. The switching voltages of required operations in the unipolar mode were smaller than those in the bipolar mode, while ON/OFF resistance levels of both modes were identical. Ag-NPs doped NFO based devices could switch between the unipolar and bipolar modes just by preferring the polarity of RESET voltage. Besides, the necessity of identical compliance current during the SET process of unipolar and bipolar modes provided an additional advantage of simplicity in device operation. Performance characteristics and cycle-to-cycle uniformity (>103 cycles) in unipolar operation were considerably better than those in bipolar mode (>102 cycles) at 25 °C. Moreover, good endurance (>600 cycles) at 200 °C was observed in unipolar mode and excellent nondestructive retention characteristics were obtained on memory cells at 125 °C and 200 °C. On the basis of temperature dependence of resistance at low resistance state, it was believed that physical origin of the RS mechanism involved the formation/rupture of the conducting paths consisting of oxygen vacancies and Ag atoms, considering Joule heating and electrochemical redox reaction effects for the unipolar and bipolar resistive switching behaviors. Our results demonstrate that 0.5% Ag-NPs doped nickel ferrites are promising resistive switching materials for resistive access memory applications.

Small Form Factor Information Storage Devices for Mobile Applications in Korea

NASA Astrophysics Data System (ADS)

Park, Young-Pil; Park, No-Cheol; Kim, Chul-Jin

Recently, the ubiquitous environment in which anybody can reach a lot of information data without any limitations on the place and time has become an important social issue. There are two basic requirements in the field of information storage devices which have to be satisfied; the first is the demand for the improvement of memory capacity to manage the increased data capacity in personal and official purposes. The second is the demand for new development of information storage devices small enough to be applied to mobile multimedia digital electronics, including digital camera, PDA and mobile phones. To summarize, for the sake of mobile applications, it is necessary to develop information storage devices which have simultaneously a large capacity and a small size. Korea possesses the necessary infrastructure for developing such small sized information storage devices. It has a good digital market, major digital companies, and various research institutes. Nowadays, many companies and research institutes including university cooperate together in the research on small sized information storage devices. Thus, it is expected that small form factor optical disk drives will be commercialized in the very near future in Korea.

Manycore Performance-Portability: Kokkos Multidimensional Array Library

DOE PAGES

Edwards, H. Carter; Sunderland, Daniel; Porter, Vicki; ...

2012-01-01

Large, complex scientific and engineering application code have a significant investment in computational kernels to implement their mathematical models. Porting these computational kernels to the collection of modern manycore accelerator devices is a major challenge in that these devices have diverse programming models, application programming interfaces (APIs), and performance requirements. The Kokkos Array programming model provides library-based approach to implement computational kernels that are performance-portable to CPU-multicore and GPGPU accelerator devices. This programming model is based upon three fundamental concepts: (1) manycore compute devices each with its own memory space, (2) data parallel kernels and (3) multidimensional arrays. Kernel executionmore » performance is, especially for NVIDIA® devices, extremely dependent on data access patterns. Optimal data access pattern can be different for different manycore devices – potentially leading to different implementations of computational kernels specialized for different devices. The Kokkos Array programming model supports performance-portable kernels by (1) separating data access patterns from computational kernels through a multidimensional array API and (2) introduce device-specific data access mappings when a kernel is compiled. An implementation of Kokkos Array is available through Trilinos [Trilinos website, http://trilinos.sandia.gov/, August 2011].« less

Shape memory polymeric composites sensing by optic fibre Bragg gratings: A very first approach

NASA Astrophysics Data System (ADS)

Quadrini, Fabrizio; Santo, Loredana; Ciminello, Monica; Concilio, Antonio; Volponi, Ruggero; Spena, Paola

2016-05-01

Shape memory polymer composites (SMPCs) have the potential for many applications in aerospace, spanning from self-repairing of structures to self-deploying of antennas, solar sails, or functional devices (e.g. for grabbing small space debris). In all these cases, it may be essential to have information about their configuration at different stages of shape recovery. In this study, the strain history of a prepreg carbon fibre system, cured with a shape memory polymer (SMP) interlayer, is monitored through a Fibre Bragg Grating (FBG), a fibre optic sensor device. SMPC has been manufactured by using traditional technologies for aerospace. After manufacturing cylindrical shape samples, an external fibre optic system is added to the composite structure; this system is especially suited for high temperatures which are necessary for SMP recovery and composite softening. Sensor functionality is checked before and after each strain history path. Optic fibre arrangement is optimized to avoid unwanted breakings whereas strains are limited by fibre collapsing, i.e. within nominal 2% of deformation. Dynamic information about shape recovery gives fundamental insights about strain evolution during time as well as its spatial distribution.

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

AC Electric Field Activated Shape Memory Polymer Composite

NASA Technical Reports Server (NTRS)

Kang, Jin Ho; Siochi, Emilie J.; Penner, Ronald K.; Turner, Travis L.

2011-01-01

Shape memory materials have drawn interest for applications like intelligent medical devices, deployable space structures and morphing structures. Compared to other shape memory materials like shape memory alloys (SMAs) or shape memory ceramics (SMCs), shape memory polymers (SMPs) have high elastic deformation that is amenable to tailored of mechanical properties, have lower density, and are easily processed. However, SMPs have low recovery stress and long response times. A new shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive fillers to enhance its thermo-mechanical characteristics. A new composition of shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive functionalized graphene sheets (FGS) to enhance its thermo-mechanical characteristics. The elastic modulus of LaRC-SMPC is approximately 2.7 GPa at room temperature and 4.3 MPa above its glass transition temperature. Conductive FGSs-doped LaRC-SMPC exhibited higher conductivity compared to pristine LaRC SMP. Applying an electric field at between 0.1 Hz and 1 kHz induced faster heating to activate the LaRC-SMPC s shape memory effect relative to applying DC electric field or AC electric field at frequencies exceeding1 kHz.

Garnet Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1995-01-01

Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

Development of Curie point switching for thin film, random access, memory device

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Tchernev, D. I.

1967-01-01

Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide

NASA Astrophysics Data System (ADS)

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 × 10-13-1.0 × 10-14 S cm-1. The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 1010. Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 1011. The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide.

PubMed

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 x 10(-13)-1.0 x 10(-14) S cm(-1). The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 10(10). Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 10(11). The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

NASA Astrophysics Data System (ADS)

Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

2014-11-01

Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

Ab initio study of ceria films for resistive switching memory applications

NASA Astrophysics Data System (ADS)

Firdos, Mehreen; Hussain, Fayyaz; Imran, Muhammad; Ismail, Muhammad; Rana, A. M.; Arshad Javid, M.; Majid, Abdul; Arif Khalil, R. M.; Ullah, Hafeez

2017-10-01

The aim of this study is to investigate the charge distribution/relocation activities in relation to resistive switching (RS) memory behavior in the metal/insulator/metal (MIM) structure of Zr/CeO2/Pt hybrid layers. The Zr layer is truly expected to act not only as an oxygen ion extraction layer but also as an ion barrier by forming a ZrO2 interfacial layer. Such behavior of the Zr not only introduces a high concentration of oxygen vacancies to the active CeO2 layer but also enhances the resistance change capability. Such Zr contributions have been explored by determining the work function, charge distribution and electronic properties with the help of density functional theory (DFT) based on the generalized gradient approximation (GGA). In doped CeO2, the dopant (Zr) plays a significant role in the formation of defect states, such as oxygen vacancies, which are necessary for generating conducting filaments. The total density of state (DOS) analyses reveal that the existence of impurity states in the hybrid system considerably upgrade the performance of charge transfer/accumulation, consequently leading to enhanced RS behavior, as noticed in our earlier experimental results on Zr/CeO2/Pt devices. Hence it can be concluded that the present DFT studies can be implemented on CeO2-based RRAM devices, which have skyscraping potential for future nonvolatile memory (NVM) applications.

The provision of stove timers to individuals with cognitive impairment.

PubMed

Nygård, Louise; Starkhammar, Sofia; Lilja, Margareta

2008-03-01

The aim of this study was to identify the characteristics of persons who were provided with timing devices on stoves, and to investigate the application procedure and recommendations for timer options. The case files at an Agency for Home Modifications in an urban community in Sweden during 2002 (n = 945) were audited. The sample was divided into two groups: those diagnosed or suspected of dementia or age-related memory deficits (n = 788), and those with other diagnoses (n = 151). Overall, the applicants for stove timers were elderly females, living alone. Assistance with the application forms by health professionals was common in both groups. However, the options available for tailoring the use of the device were not used consistently and the opportunity for professional follow-up appeared limited. The device seemed to be used as a safety precaution rather than as a device to support independent activity performance based on individual users' needs. The results indicate that improvements in the implementation and provision of stove timers could be achieved through education and collaboration between different stakeholders.

Low latency counter event indication

DOEpatents

Gara, Alan G [Mount Kisco, NY; Salapura, Valentina [Chappaqua, NY

2008-09-16

A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An overflow bit device associated with each respective counter device is additionally set in response to an overflow condition. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits. An operatively coupled control device monitors each associated overflow bit device and initiates incrementing a second count value stored at a corresponding memory location in response to a respective overflow bit being set. The incremented second count value is compared to an interrupt threshold value stored in a threshold register, and, when the second counter value is equal to the interrupt threshold value, a corresponding "interrupt arm" bit is set to enable a fast interrupt indication. On a subsequent roll-over of the lower bits of that counter, the interrupt will be fired.

Low latency counter event indication

DOEpatents

Gara, Alan G.; Salapura, Valentina

2010-08-24

A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An overflow bit device associated with each respective counter device is additionally set in response to an overflow condition. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits. An operatively coupled control device monitors each associated overflow bit device and initiates incrementing a second count value stored at a corresponding memory location in response to a respective overflow bit being set. The incremented second count value is compared to an interrupt threshold value stored in a threshold register, and, when the second counter value is equal to the interrupt threshold value, a corresponding "interrupt arm" bit is set to enable a fast interrupt indication. On a subsequent roll-over of the lower bits of that counter, the interrupt will be fired.

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Ferroelectric symmetry-protected multibit memory cell

DOE PAGES

Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

2017-02-08

Here, the tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valuedmore » non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.« less

High performance superconducting devices enabled by three dimensionally ordered nanodots and/or nanorods

DOEpatents

Goyal, Amit

2013-09-17

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

Application of hierarchical cascading technique to finite element method simulation in bulk acoustic wave devices

NASA Astrophysics Data System (ADS)

Li, Xinyi; Bao, Jingfu; Huang, Yulin; Zhang, Benfeng; Omori, Tatsuya; Hashimoto, Ken-ya

2018-07-01

In this paper, we propose the use of the hierarchical cascading technique (HCT) for the finite element method (FEM) analysis of bulk acoustic wave (BAW) devices. First, the implementation of this technique is presented for the FEM analysis of BAW devices. It is shown that the traveling-wave excitation sources proposed by the authors are fully compatible with the HCT. Furthermore, a HCT-based absorbing mechanism is also proposed to replace the perfectly matched layer (PML). Finally, it is demonstrated how the technique is much more efficient in terms of memory consumption and execution time than the full FEM analysis.

High performance electrical, magnetic, electromagnetic and electrooptical devices enabled by three dimensionally ordered nanodots and nanorods

DOEpatents

Goyal, Amit , Kang; Sukill, [Knoxville, TN

2012-02-21

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

High performance devices enabled by epitaxial, preferentially oriented, nanodots and/or nanorods

DOEpatents

Goyal, Amit [Knoxville, TN

2011-10-11

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic, superconducting and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

A portable ECG monitoring device with Bluetooth and Holter capabilities for telemedicine applications.

PubMed

Lucani, Daniel; Cataldo, Giancarlos; Cruz, Julio; Villegas, Guillermo; Wong, Sara

2006-01-01

A prototype of a portable ECG-monitoring device has been developed for clinical and non-clinical environments as part of a telemedicine system to provide remote and continuous surveillance of patients. The device can acquire, store and/or transmit ECG signals to computer-based platforms or specially configured access points (AP) with Intranet/Internet capabilities in order to reach remote monitoring stations. Acquired data can be stored in a flash memory card in FAT16 format for later recovery, or transmitted via Bluetooth or USB to a local station or AP. This data acquisition module (DAM) operates in two modes: Holter and on-line transmission.

Lifetime prediction of InGaZnO thin film transistor for the application of display device and BEOL-transistors

NASA Astrophysics Data System (ADS)

Kim, Sang Min; Cho, Won Ju; Yu, Chong Gun; Park, Jong Tae

2018-04-01

In this work, the lifetime prediction models of amorphous InGaZnO thin film transistors (a-IGZO TFTs) were suggested for the application of display device and BEOL (Back End Of line) transistors with embedded a-IGZO TFTs. Four different types of test devices according to the active layer thickness, source/drain electrode materials and thermal treatments have been used to verify the suggested model. The device lifetimes under high gate bias stress and hot carrier stress were extracted through fittings of the stretched-exponential equation for threshold voltage shifts and the current estimation method for drain current degradations. Our suggested lifetime prediction models could be used in any kinds of structures of a-IGZO TFTs for the application of display device and BEOL transistors. The a-IGZO TFTs with embedded ITO local conducting layer under source/drain is better for BEOL transistor application and a-IGZO TFTs with InGaZnO thin film as source/drain electrodes may be better for the application of display devices. From 1983 to 1985, he was a Researcher at Gold-Star Semiconductor, Inc., Korea, where he worked on the development of SRAM. He joined the Department of Electronics Engineering, University of Incheon, Incheon, Korea, in 1987, where he is a Professor. As a visiting scientist at Massachusetts Institute of Technology, Cambridge, in 1991, he conducted research in hot carrier reliability of CMOS. As a visiting scholar at University of California, Davis, in 2001, he conducted research on the device structure of Nano-scale SOI CMOS. His recent interests are device structure and reliability of Nano-scale CMOS devices, flash memory, and thin film transistors.