Sample records for memory nvm technology

  1. A review of emerging non-volatile memory (NVM) technologies and applications

    NASA Astrophysics Data System (ADS)

    Chen, An

    2016-11-01

    This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

  2. Don’t make cache too complex: A simple probability-based cache management scheme for SSDs

    PubMed Central

    Cho, Sangyeun; Choi, Jongmoo

    2017-01-01

    Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme. PMID:28358897

  3. Don't make cache too complex: A simple probability-based cache management scheme for SSDs.

    PubMed

    Baek, Seungjae; Cho, Sangyeun; Choi, Jongmoo

    2017-01-01

    Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme.

  4. Messier: A Detailed NVM-Based DIMM Model for the SST Simulation Framework.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Awad, Amro; Voskuilen, Gwendolyn Renae; Rodrigues, Arun F.

    2017-02-01

    DRAM technology is the main building block of main memory, however, DRAM scaling is becoming very challenging. The main issues for DRAM scaling are the increasing error rates with each new generation, the geometric and physical constraints of scaling the capacitor part of the DRAM cells, and the high power consumption caused by the continuous need for refreshing cell values. At the same time, emerging Non- Volatile Memory (NVM) technologies, such as Phase-Change Memory (PCM), are emerging as promising replacements for DRAM. NVMs, when compared to current technologies e.g., NAND-based ash, have latencies comparable to DRAM. Additionally, NVMs are non-volatile,more » which eliminates the need for refresh power and enables persistent memory applications. Finally, NVMs have promising densities and the potential for multi-level cell (MLC) storage.« less

  5. Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Schreiber, Robert

    Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports variousmore » NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint ReRAM array [Niu 2012b]. We have conducted an in depth analysis of the circuit and system level design implications of multi-layer cross-point Resistive RAM (MLCReRAM) from performance, power and reliability perspectives [Xu 2013]. The objective of this study is to understand the design trade-offs of this technology with respect to the MLC Phase Change Memory (MLCPCM).Our MLC ReRAM design at the circuit and system levels indicates that different resistance allocation schemes, programming strategies, peripheral designs, and material selections profoundly affect the area, latency, power, and reliability of MLC ReRAM. Based on this analysis, we conduct two case studies: first we compare MLC ReRAM design against MLC phase-change memory (PCM) and multi-layer cross-point ReRAM design, and point out why multi-level ReRAM is appealing; second we further explore the design space for MLC ReRAM. Architecture and Application We explored hybrid checkpointing using phase-change memory for future exascale systems [Dong 2011] and showed that the use of nonvolatile memory for local checkpointing significantly increases the number of faults covered by local checkpoints and reduces the probability of a global failure in the middle of a global checkpoint to less than 1%. We also proposed a technique called i2WAP to mitigate the write variations in NVM-based last-level cache for the improvement of the NVM lifetime [Wang 2013]. Our wear leveling technique attempts to work around the limitations of write endurance by arranging data access so that write operations can be distributed evenly across all the storage cells. During our intensive research on fault-tolerant NVM design, we found that ECC cannot effectively tolerate hard errors from limited write endurance and process imperfection. Therefore, we devised a novel Point and Discard (PAD) architecture in in [ 2012] as a hard-error-tolerant architecture for ReRAM-based Last Level Caches. PAD improves the lifetime of ReRAM caches by 1.6X-440X under different process variations without performance overhead in the system's early life. We have investigated the applicability of NVM for persistent memory design [Zhao 2013]. New byte addressable NVM enables fast persistent memory that allows in-memory persistent data objects to be updated with much higher throughput. Despite the significant improvement, the performance of these designs is only 50% of the native system with no persistence support, due to the logging or copy-on-write mechanisms used to update the persistent memory. A challenge in this approach is therefore how to efficiently enable atomic, consistent, and durable updates to ensure data persistence that survives application and/or system failures. We have designed a persistent memory system, called Klin, that can provide performance as close as that of the native system. The Klin design adopts a non-volatile cache and a non-volatile main memory for constructing a multi-versioned durable memory system, enabling atomic updates without logging or copy-on-write. Our evaluation shows that the proposed Kiln mechanism can achieve up to 2X of performance improvement to NVRAM-based persistent memory employing write-ahead logging. In addition, our design has numerous practical advantages: a simple and intuitive abstract interface, microarchitecture-level optimizations, fast recovery from failures, and no redundant writes to slow non-volatile storage media. The work was published in MICRO 2013 and received Best Paper Honorable Mentioned Award.« less

  6. Enabling NVM for Data-Intensive Scientific Services

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Carns, Philip; Jenkins, John; Seo, Sangmin

    Specialized, transient data services are playing an increasingly prominent role in data-intensive scientific computing. These services offer flexible, on-demand pairing of applications with storage hardware using semantics that are optimized for the problem domain. Concurrent with this trend, upcoming scientific computing and big data systems will be deployed with emerging NVM technology to achieve the highest possible price/productivity ratio. Clearly, therefore, we must develop techniques to facilitate the confluence of specialized data services and NVM technology. In this work we explore how to enable the composition of NVM resources within transient distributed services while still retaining their essential performance characteristics.more » Our approach involves eschewing the conventional distributed file system model and instead projecting NVM devices as remote microservices that leverage user-level threads, RPC services, RMA-enabled network transports, and persistent memory libraries in order to maximize performance. We describe a prototype system that incorporates these concepts, evaluate its performance for key workloads on an exemplar system, and discuss how the system can be leveraged as a component of future data-intensive architectures.« less

  7. Opportunities for nonvolatile memory systems in extreme-scale high-performance computing

    DOE PAGES

    Vetter, Jeffrey S.; Mittal, Sparsh

    2015-01-12

    For extreme-scale high-performance computing systems, system-wide power consumption has been identified as one of the key constraints moving forward, where DRAM main memory systems account for about 30 to 50 percent of a node's overall power consumption. As the benefits of device scaling for DRAM memory slow, it will become increasingly difficult to keep memory capacities balanced with increasing computational rates offered by next-generation processors. However, several emerging memory technologies related to nonvolatile memory (NVM) devices are being investigated as an alternative for DRAM. Moving forward, NVM devices could offer solutions for HPC architectures. Researchers are investigating how to integratemore » these emerging technologies into future extreme-scale HPC systems and how to expose these capabilities in the software stack and applications. In addition, current results show several of these strategies could offer high-bandwidth I/O, larger main memory capacities, persistent data structures, and new approaches for application resilience and output postprocessing, such as transaction-based incremental checkpointing and in situ visualization, respectively.« less

  8. Signal and noise extraction from analog memory elements for neuromorphic computing.

    PubMed

    Gong, N; Idé, T; Kim, S; Boybat, I; Sebastian, A; Narayanan, V; Ando, T

    2018-05-29

    Dense crossbar arrays of non-volatile memory (NVM) can potentially enable massively parallel and highly energy-efficient neuromorphic computing systems. The key requirements for the NVM elements are continuous (analog-like) conductance tuning capability and switching symmetry with acceptable noise levels. However, most NVM devices show non-linear and asymmetric switching behaviors. Such non-linear behaviors render separation of signal and noise extremely difficult with conventional characterization techniques. In this study, we establish a practical methodology based on Gaussian process regression to address this issue. The methodology is agnostic to switching mechanisms and applicable to various NVM devices. We show tradeoff between switching symmetry and signal-to-noise ratio for HfO 2 -based resistive random access memory. Then, we characterize 1000 phase-change memory devices based on Ge 2 Sb 2 Te 5 and separate total variability into device-to-device variability and inherent randomness from individual devices. These results highlight the usefulness of our methodology to realize ideal NVM devices for neuromorphic computing.

  9. Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing

    NASA Astrophysics Data System (ADS)

    Jia, Gangyong; Han, Guangjie; Wang, Hao; Wang, Feng

    2018-04-01

    Fog computing requires a large main memory capacity to decrease latency and increase the Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly used random access memory, cannot be included into a fog computing system due to its high consumption of power. In recent years, non-volatile memories (NVM) such as Phase-Change Memory (PCM) and Spin-transfer torque RAM (STT-RAM) with their low power consumption have emerged to replace DRAM. Moreover, the currently proposed hybrid main memory, consisting of both DRAM and NVM, have shown promising advantages in terms of scalability and power consumption. However, the drawbacks of NVM, such as long read/write latency give rise to potential problems leading to asymmetric cache misses in the hybrid main memory. Current last level cache (LLC) policies are based on the unified miss cost, and result in poor performance in LLC and add to the cost of using NVM. In order to minimize the cache miss cost in the hybrid main memory, we propose a cost aware cache replacement policy (CACRP) that reduces the number of cache misses from NVM and improves the cache performance for a hybrid memory system. Experimental results show that our CACRP behaves better in LLC performance, improving performance up to 43.6% (15.5% on average) compared to LRU.

  10. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lee, Seyong; Vetter, Jeffrey S

    Computer architecture experts expect that non-volatile memory (NVM) hierarchies will play a more significant role in future systems including mobile, enterprise, and HPC architectures. With this expectation in mind, we present NVL-C: a novel programming system that facilitates the efficient and correct programming of NVM main memory systems. The NVL-C programming abstraction extends C with a small set of intuitive language features that target NVM main memory, and can be combined directly with traditional C memory model features for DRAM. We have designed these new features to enable compiler analyses and run-time checks that can improve performance and guard againstmore » a number of subtle programming errors, which, when left uncorrected, can corrupt NVM-stored data. Moreover, to enable recovery of data across application or system failures, these NVL-C features include a flexible directive for specifying NVM transactions. So that our implementation might be extended to other compiler front ends and languages, the majority of our compiler analyses are implemented in an extended version of LLVM's intermediate representation (LLVM IR). We evaluate NVL-C on a number of applications to show its flexibility, performance, and correctness.« less

  11. Titanium oxide nonvolatile memory device and its application

    NASA Astrophysics Data System (ADS)

    Wang, Wei

    In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

  12. Electrical Bistabilities and Conduction Mechanisms of Nonvolatile Memories Based on a Polymethylsilsesquioxane Insulating Layer Containing CdSe/ZnS Quantum Dots

    NASA Astrophysics Data System (ADS)

    Ma, Zehao; Ooi, Poh Choon; Li, Fushan; Yun, Dong Yeol; Kim, Tae Whan

    2015-10-01

    Nonvolatile memory (NVM) devices based on a metal-insulator-metal structure consisting of CdSe/ZnS quantum dots embedded in polymethylsilsesquioxane dielectric layers were fabricated. The current-voltage ( I- V) curves showed a bistable current behavior and the presence of hysteresis. The current-time ( I- t) curves showed that the fabricated NVM memory devices were stable up to 1 × 104 s with a distinct ON/OFF ratio of 104 and were reprogrammable when the endurance test was performed. The extrapolation of the I- t curve to 105 s with corresponding current ON/OFF ratio 1 × 105 indicated a long performance stability of the NVM devices. Schottky emission, Poole-Frenkel emission, trapped-charge limited-current and Child-Langmuir law were proposed as the dominant conduction mechanisms for the fabricated NVM devices based on the obtained I- V characteristics.

  13. Unified random access memory (URAM) by integration of a nanocrystal floating gate for nonvolatile memory and a partially depleted floating body for capacitorless 1T-DRAM

    NASA Astrophysics Data System (ADS)

    Ryu, Seong-Wan; Han, Jin-Woo; Kim, Chung-Jin; Kim, Sungho; Choi, Yang-Kyu

    2009-03-01

    This paper describes a unified memory (URAM) that utilizes a nanocrystal SOI MOSFET for multi-functional applications of both nonvolatile memory (NVM) and capacitorless 1T-DRAM. By using a discrete storage node (Ag nanocrystal) as the floating gate of the NVM, high defect immunity and 2-bit/cell operation were achieved. The embedded nanocrystal NVM also showed 1T-DRAM operation (program/erase time = 100 ns) characteristics, which were realized by storing holes in the floating body of the SOI MOSFET, without requiring an external capacitor. Three-bit/cell operation was accomplished for different applications - 2-bits for nonvolatility and 1-bit for fast operation.

  14. Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

    NASA Astrophysics Data System (ADS)

    Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

    2018-01-01

    Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

  15. Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

    NASA Astrophysics Data System (ADS)

    Sahay, Shubham; Suri, Manan

    2017-12-01

    This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

  16. Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices

    NASA Astrophysics Data System (ADS)

    Yadav, Manoj; Velampati, Ravi Shankar R.; Mandal, D.; Sharma, Rohit

    2018-03-01

    Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance-voltage (C-V) and capacitance-time (C-t) response of the fabricated MOS NVM capacitor. The C-V and C-t characteristics depict a large flat band voltage shift (V FB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.

  17. Emerging memories: resistive switching mechanisms and current status

    NASA Astrophysics Data System (ADS)

    Jeong, Doo Seok; Thomas, Reji; Katiyar, R. S.; Scott, J. F.; Kohlstedt, H.; Petraru, A.; Hwang, Cheol Seong

    2012-07-01

    The resistance switching behaviour of several materials has recently attracted considerable attention for its application in non-volatile memory (NVM) devices, popularly described as resistive random access memories (RRAMs). RRAM is a type of NVM that uses a material(s) that changes the resistance when a voltage is applied. Resistive switching phenomena have been observed in many oxides: (i) binary transition metal oxides (TMOs), e.g. TiO2, Cr2O3, FeOx and NiO; (ii) perovskite-type complex TMOs that are variously functional, paraelectric, ferroelectric, multiferroic and magnetic, e.g. (Ba,Sr)TiO3, Pb(Zrx Ti1-x)O3, BiFeO3 and PrxCa1-xMnO3 (iii) large band gap high-k dielectrics, e.g. Al2O3 and Gd2O3; (iv) graphene oxides. In the non-oxide category, higher chalcogenides are front runners, e.g. In2Se3 and In2Te3. Hence, the number of materials showing this technologically interesting behaviour for information storage is enormous. Resistive switching in these materials can form the basis for the next generation of NVM, i.e. RRAM, when current semiconductor memory technology reaches its limit in terms of density. RRAMs may be the high-density and low-cost NVMs of the future. A review on this topic is of importance to focus concentration on the most promising materials to accelerate application into the semiconductor industry. This review is a small effort to realize the ambitious goal of RRAMs. Its basic focus is on resistive switching in various materials with particular emphasis on binary TMOs. It also addresses the current understanding of resistive switching behaviour. Moreover, a brief comparison between RRAMs and memristors is included. The review ends with the current status of RRAMs in terms of stability, scalability and switching speed, which are three important aspects of integration onto semiconductors.

  18. Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

    PubMed Central

    Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

    2015-01-01

    We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

  19. Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

    PubMed

    Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

    2016-05-01

    We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

  20. Requirements and Usage of NVM in Advanced Onboard Data Processing Systems

    NASA Technical Reports Server (NTRS)

    Some, R.

    2001-01-01

    This viewgraph presentation gives an overview of the requirements and uses of non-volatile memory (NVM) in advanced onboard data processing systems. Supercomputing in space presents the only viable approach to the bandwidth problem (can't get data down to Earth), controlling constellations of cooperating satellites, reducing mission operating costs, and real-time intelligent decision making and science data gathering. Details are given on the REE vision and impact on NASA and Department of Defense missions, objectives of REE, baseline architecture, and issues. NVM uses and requirements are listed.

  1. Twin-bit via resistive random access memory in 16 nm FinFET logic technologies

    NASA Astrophysics Data System (ADS)

    Shih, Yi-Hong; Hsu, Meng-Yin; King, Ya-Chin; Lin, Chrong Jung

    2018-04-01

    A via resistive random access memory (RRAM) cell fully compatible with the standard CMOS logic process has been successfully demonstrated for high-density logic nonvolatile memory (NVM) modules in advanced FinFET circuits. In this new cell, the transition metal layers are formed on both sides of a via, given two storage bits per via. In addition to its compact cell area (1T + 14 nm × 32 nm), the twin-bit via RRAM cell features a low operation voltage, a large read window, good data retention, and excellent cycling capability. As fine alignments between mask layers become possible, the twin-bit via RRAM cell is expected to be highly scalable in advanced FinFET technology.

  2. Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

    NASA Astrophysics Data System (ADS)

    Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

    2016-09-01

    Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

  3. A Trustworthy Key Generation Prototype Based on DDR3 PUF for Wireless Sensor Networks

    PubMed Central

    Liu, Wenchao; Zhang, Zhenhua; Li, Miaoxin; Liu, Zhenglin

    2014-01-01

    Secret key leakage in wireless sensor networks (WSNs) is a high security risk especially when sensor nodes are deployed in hostile environment and physically accessible to attackers. With nowadays semi/fully-invasive attack techniques attackers can directly derive the cryptographic key from non-volatile memory (NVM) storage. Physically Unclonable Function (PUF) is a promising technology to resist node capture attacks, and it also provides a low cost and tamper-resistant key provisioning solution. In this paper, we designed a PUF based on double-data-rate SDRAM Type 3 (DDR3) memory by exploring its memory decay characteristics. We also described a prototype of 128-bit key generation based on DDR3 PUF with integrated fuzzy extractor. Due to the wide adoption of DDR3 memory in WSN, our proposed DDR3 PUF technology with high security levels and no required hardware changes is suitable for a wide range of WSN applications. PMID:24984058

  4. AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh; Vetter, Jeffrey S

    2014-01-01

    Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing frequently-reused data. Microarchitectural simulations confirm that AYUSH achieves larger improvement in lifetime than a previous technique and also maintains performance and energy efficiency. For single, dual and quad-core workloads, the average increase in cache lifetime with AYUSH is 6.90X, 24.06X andmore » 47.62X, respectively.« less

  5. Low-voltage operating flexible ferroelectric organic field-effect transistor nonvolatile memory with a vertical phase separation P(VDF-TrFE-CTFE)/PS dielectric

    NASA Astrophysics Data System (ADS)

    Xu, Meili; Xiang, Lanyi; Xu, Ting; Wang, Wei; Xie, Wenfa; Zhou, Dayu

    2017-10-01

    Future flexible electronic systems require memory devices combining low-power operation and mechanical bendability. However, high programming/erasing voltages, which are universally needed to switch the storage states in previously reported ferroelectric organic field-effect transistor (Fe-OFET) nonvolatile memories (NVMs), severely prevent their practical applications. In this work, we develop a route to achieve a low-voltage operating flexible Fe-OFET NVM. Utilizing vertical phase separation, an ultrathin self-organized poly(styrene) (PS) buffering layer covers the surface of the ferroelectric polymer layer by one-step spin-coating from their blending solution. The ferroelectric polymer with a low coercive field contributes to low-voltage operation in the Fe-OFET NVM. The polymer PS contributes to the improvement of mobility, attributing to screening the charge scattering and decreasing the surface roughness. As a result, a high performance flexible Fe-OFET NVM is achieved at the low P/E voltages of ±10 V, with a mobility larger than 0.2 cm2 V-1 s-1, a reliable P/E endurance over 150 cycles, stable data storage retention capability over 104 s, and excellent mechanical bending durability with a slight performance degradation after 1000 repetitive tensile bending cycles at a curvature radius of 5.5 mm.

  6. Transparent photostable ZnO nonvolatile memory transistor with ferroelectric polymer and sputter-deposited oxide gate

    NASA Astrophysics Data System (ADS)

    Park, C. H.; Im, Seongil; Yun, Jungheum; Lee, Gun Hwan; Lee, Byoung H.; Sung, Myung M.

    2009-11-01

    We report on the fabrication of transparent top-gate ZnO nonvolatile memory thin-film transistors (NVM-TFTs) with 200 nm thick poly(vinylidene fluoride/trifluoroethylene) ferroelectric layer; semitransparent 10 nm thin AgOx and transparent 130 nm thick indium-zinc oxide (IZO) were deposited on the ferroelectric polymer as gate electrode by rf sputtering. Our semitransparent NVM-TFT with AgOx gate operates under low voltage write-erase (WR-ER) pulse of ±20 V, but shows some degradation in retention property. In contrast, our transparent IZO-gated device displays very good retention properties but requires anomalously higher pulse of ±70 V for WR and ER states. Both devices stably operated under visible illuminations.

  7. Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line

    NASA Astrophysics Data System (ADS)

    León Pérez, Edgar A. A.; Guenery, Pierre-Vincent; Abouzaid, Oumaïma; Ayadi, Khaled; Brottet, Solène; Moeyaert, Jérémy; Labau, Sébastien; Baron, Thierry; Blanchard, Nicholas; Baboux, Nicolas; Militaru, Liviu; Souifi, Abdelkader

    2018-05-01

    We report on the fabrication and characterization of Resistive Random Access Memory (RRAM) devices based on nanoparticles in MIM structures. Our approach is based on the use of indium oxide (In2O3) nanoparticles embedded in a dielectric matrix using CMOS-full-compatible fabrication processes in view of back-end-off-line integration for non-volatile memory (NVM) applications. A bipolar switching behavior has been observed using current-voltage measurements (I-V) for all devices. Very high ION/IOFF ratios have been obtained up to 108. Our results provide insights for further integration of In2O3 nanoparticles-based devices for NVM applications. He is currently a Postdoctoral Researcher in the Institute of Nanotechnologies of Lyon (INL), INSA de Lyon, France, in the Electronics Department. His current research include indium oxide nanoparticles for non-volatile memory applications, and the integrations of these devices in CMOS BEOL.

  8. Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2010-01-01

    This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

  9. A triple quantum dot based nano-electromechanical memory device

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Pozner, R.; Lifshitz, E.; Solid State Institute, Technion-Israel Institute of Technology, Haifa 32000

    Colloidal quantum dots (CQDs) are free-standing nano-structures with chemically tunable electronic properties. This tunability offers intriguing possibilities for nano-electromechanical devices. In this work, we consider a nano-electromechanical nonvolatile memory (NVM) device incorporating a triple quantum dot (TQD) cluster. The device operation is based on a bias induced motion of a floating quantum dot (FQD) located between two bound quantum dots (BQDs). The mechanical motion is used for switching between two stable states, “ON” and “OFF” states, where ligand-mediated effective interdot forces between the BQDs and the FQD serve to hold the FQD in each stable position under zero bias. Consideringmore » realistic microscopic parameters, our quantum-classical theoretical treatment of the TQD reveals the characteristics of the NVM.« less

  10. Achieving high mobility, low-voltage operating organic field-effect transistor nonvolatile memory by an ultraviolet-ozone treating ferroelectric terpolymer

    PubMed Central

    Xiang, Lanyi; Wang, Wei; Xie, Wenfa

    2016-01-01

    Poly(vinylidene fluoride–trifluoroethylene) has been widely used as a dielectric of the ferroelectric organic field-effect transistor (FE-OFET) nonvolatile memory (NVM). Some critical issues, including low mobility and high operation voltage, existed in these FE-OFET NVMs, should be resolved before considering to their commercial application. In this paper, we demonstrated low-voltage operating FE-OFET NVMs based on a ferroelectric terpolymer poly(vinylidene-fluoride-trifluoroethylene-chlorotrifluoroethylene) [P(VDF-TrFE-CTFE)] owed to its low coercive field. By applying an ultraviolet-ozone (UVO) treatment to modify the surface of P(VDF-TrFE-CTFE) films, the growth model of the pentacene film was changed, which improved the pentacene grain size and the interface morphology of the pentacene/P(VDF-TrFE-CTFE). Thus, the mobility of the FE-OFET was significantly improved. As a result, a high performance FE-OFET NVM, with a high mobility of 0.8 cm2 V−1 s−1, large memory window of 15.4~19.2, good memory on/off ratio of 103, the reliable memory endurance over 100 cycles and stable memory retention ability, was achieved at a low operation voltage of ±15 V. PMID:27824101

  11. A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    De, Arup

    2014-01-01

    Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interfacemore » (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.« less

  12. Charge retention characteristics of silicide-induced crystallized polycrystalline silicon floating gate thin-film transistors for active matrix organic light-emitting diode.

    PubMed

    Park, Jae Hyo; Son, Se Wan; Byun, Chang Woo; Kim, Hyung Yoon; Joo, So Na; Lee, Yong Woo; Yun, Seung Jae; Joo, Seung Ki

    2013-10-01

    In this work, non-volatile memory thin-film transistor (NVM-TFT) was fabricated by nickel silicide-induced laterally crystallized (SILC) polycrystalline silicon (poly-Si) as the active layer. The nickel seed silicide-induced crystallized (SIC) poly-Si was used as storage layer which is embedded in the gate insulator. The novel unit pixel of active matrix organic light-emitting diode (AMOLED) using NVM-TFT is proposed and investigated the electrical and optical performance. The threshold voltage shift showed 17.2 V and the high reliability of retention characteristic was demonstrated until 10 years. The retention time can modulate the recharge refresh time of the unit pixel of AMOLED up to 5000 sec.

  13. Architectural Techniques For Managing Non-volatile Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh

    As chip power dissipation becomes a critical challenge in scaling processor performance, computer architects are forced to fundamentally rethink the design of modern processors and hence, the chip-design industry is now at a major inflection point in its hardware roadmap. The high leakage power and low density of SRAM poses serious obstacles in its use for designing large on-chip caches and for this reason, researchers are exploring non-volatile memory (NVM) devices, such as spin torque transfer RAM, phase change RAM and resistive RAM. However, since NVMs are not strictly superior to SRAM, effective architectural techniques are required for making themmore » a universal memory solution. This book discusses techniques for designing processor caches using NVM devices. It presents algorithms and architectures for improving their energy efficiency, performance and lifetime. It also provides both qualitative and quantitative evaluation to help the reader gain insights and motivate them to explore further. This book will be highly useful for beginners as well as veterans in computer architecture, chip designers, product managers and technical marketing professionals.« less

  14. Integration and High-Temperature Characterization of Ferroelectric Vanadium-Doped Bismuth Titanate Thin Films on Silicon Carbide

    NASA Astrophysics Data System (ADS)

    Ekström, Mattias; Khartsev, Sergiy; Östling, Mikael; Zetterling, Carl-Mikael

    2017-07-01

    4H-SiC electronics can operate at high temperature (HT), e.g., 300°C to 500°C, for extended times. Systems using sensors and amplifiers that operate at HT would benefit from microcontrollers which can also operate at HT. Microcontrollers require nonvolatile memory (NVM) for computer programs. In this work, we demonstrate the possibility of integrating ferroelectric vanadium-doped bismuth titanate (BiTV) thin films on 4H-SiC for HT memory applications, with BiTV ferroelectric capacitors providing memory functionality. Film deposition was achieved by laser ablation on Pt (111)/TiO2/4H-SiC substrates, with magnetron-sputtered Pt used as bottom electrode and thermally evaporated Au as upper contacts. Film characterization by x-ray diffraction analysis revealed predominately (117) orientation. P- E hysteresis loops measured at room temperature showed maximum 2 P r of 48 μC/cm2, large enough for wide read margins. P- E loops were measurable up to 450°C, with losses limiting measurements above 450°C. The phase-transition temperature was determined to be about 660°C from the discontinuity in dielectric permittivity, close to what is achieved for ceramics. These BiTV ferroelectric capacitors demonstrate potential for use in HT NVM applications for SiC digital electronics.

  15. Resistive switching effect in the planar structure of all-printed, flexible and rewritable memory device based on advanced 2D nanocomposite of graphene quantum dots and white graphene flakes

    NASA Astrophysics Data System (ADS)

    Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Kim, Sowon; Choi, Kyung Hyun

    2017-08-01

    Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al2O3) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications.

  16. Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

    NASA Technical Reports Server (NTRS)

    Swift, G.

    2002-01-01

    JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

  17. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection

    PubMed Central

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-01-01

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials. PMID:26202946

  18. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection.

    PubMed

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N; Hudait, Mantu K; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-07-23

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials.

  19. Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

    NASA Astrophysics Data System (ADS)

    Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

    2010-10-01

    Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

  20. Unpredictable interference of new transcranial motor-evoked potential monitor against the implanted pacemaker.

    PubMed

    Hayashi, Kazuko

    2016-12-01

    Recently, NuVasive NV-M5 nerve monitoring system, a new transcranial motor-evoked potential (TcMEP) monitor, has been introduced with the spread of flank-approach spinal operations such as extreme lateral interbody fusion, to prevent nerve damage. Conventional TcMEP monitors use changes in MEP wave patterns, such as amplitude and/or latency, whereas the NV-M5 nerve monitor system first measures the MEP baseline waveform from the transcranial-evoked potential then measures the electric current necessary to obtain the standard of the previous baseline wave pattern at subsequent monitoring times. The NV-M5 monitor determines nerve damage according to the increase in necessary electric current threshold. The NV-M5 monitor also uses a local electrical stimulation mode to monitor the safety of setting screws into the lumbar vertebrae. In this way, various electrical stimulations with various durations and frequencies are used, and electrical noise may result in unpredictable interference with cardiac pacemakers. We performed anesthetic management of extreme lateral interbody fusion surgery using the NV-M5 in a patient with an implanted pacemaker, during which TcMEP stimulation caused interference with the implanted pacemaker. Copyright © 2016 Elsevier Inc. All rights reserved.

  1. Radiation-Hardened Solid-State Drive

    NASA Technical Reports Server (NTRS)

    Sheldon, Douglas J.

    2010-01-01

    A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.

  2. Addressing Inter-set Write-Variation for Improving Lifetime of Non-Volatile Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh; Vetter, Jeffrey S

    We propose a technique which minimizes inter-set write variation in NVM caches for improving its lifetime. Our technique uses cache coloring scheme to add a software-controlled mapping layer between groups of physical pages (called memory regions) and cache sets. Periodically, the number of writes to different colors of the cache is computed and based on this result, the mapping of a few colors is changed to channel the write traffic to least utilized cache colors. This change helps to achieve wear-leveling.

  3. Junction-less poly-Ge FinFET and charge-trap NVM fabricated by laser-enabled low thermal budget processes

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Huang, Wen-Hsien; Shen, Chang-Hong; Wang, Hsing-Hsiang

    2016-06-13

    A doping-free poly-Ge film as channel material was implemented by CVD-deposited nano-crystalline Ge and visible-light laser crystallization, which behaves as a p-type semiconductor, exhibiting holes concentration of 1.8 × 10{sup 18 }cm{sup −3} and high crystallinity (Raman FWHM ∼ 4.54 cm{sup −1}). The fabricated junctionless 7 nm-poly-Ge FinFET performs at an I{sub on}/I{sub off} ratio over 10{sup 5} and drain-induced barrier lowering of 168 mV/V. Moreover, the fast programming speed of 100 μs–1 ms and reliable retention can be obtained from the junctionless poly-Ge nonvolatile-memory. Such junctionless poly-Ge devices with low thermal budget are compatible with the conventional CMOS technology and are favorable for 3D sequential-layer integrationmore » and flexible electronics.« less

  4. Highly reliable top-gated thin-film transistor memory with semiconducting, tunneling, charge-trapping, and blocking layers all of flexible polymers.

    PubMed

    Wang, Wei; Hwang, Sun Kak; Kim, Kang Lib; Lee, Ju Han; Cho, Suk Man; Park, Cheolmin

    2015-05-27

    The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 10(4), read and write endurance cycles over 100, and time-dependent data retention of 10(8) s, even when fabricated on a mechanically flexible plastic substrate.

  5. Titanium-tungsten nanocrystals embedded in a SiO(2)/Al(2)O(3) gate dielectric stack for low-voltage operation in non-volatile memory.

    PubMed

    Yang, Shiqian; Wang, Qin; Zhang, Manhong; Long, Shibing; Liu, Jing; Liu, Ming

    2010-06-18

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti(0.46)W(0.54) NCs were embedded in the gate dielectric stack of SiO(2)/Al(2)O(3). A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V(FB)) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V(FB) shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10(4) s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  6. Static Behavior of Chalcogenide Based Programmable Metallization Cells

    NASA Astrophysics Data System (ADS)

    Rajabi, Saba

    Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization. To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities. The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior. The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.

  7. Forming free and ultralow-power erase operation in atomically crystal TiO2 resistive switching

    NASA Astrophysics Data System (ADS)

    Dai, Yawei; Bao, Wenzhong; Hu, Linfeng; Liu, Chunsen; Yan, Xiao; Chen, Lin; Sun, Qingqing; Ding, Shijin; Zhou, Peng; Zhang, David Wei

    2017-06-01

    Two-dimensional layered materials (2DLMs) have attracted broad interest from fundamental sciences to industrial applications. Their applications in memory devices have been demonstrated, yet much still remains to explore optimal materials and device structure for practical application. In this work, a forming-free, bipolar resistive switching behavior are demonstrated in 2D TiO2-based resistive random access memory (RRAM). Physical adsorption method is adopted to achieve high quality, continuous 2D TiO2 network efficiently. The 2D TiO2 RRAM devices exhibit superior properties such as fast switching capability (20 ns of erase operation) and extremely low erase energy consumption (0.16 fJ). Furthermore, the resistive switching mechanism is attributed to the formation and rupture of oxygen vacancies-based percolation path in 2D TiO2 crystals. Our results pave the way for the implementation of high performance 2DLMs-based RRAM in the next generation non-volatile memory (NVM) application.

  8. New Views of the Moon II 2008-2018; An initiative to integrate new lunar information into our fundamental understanding of the Moon and the next stages of international lunar exploration.

    NASA Astrophysics Data System (ADS)

    Shearer, C.; Neal, C. R.; Jolliff, B. L.; Wieczorek, M. A.; Mackwell, S.; Lawrence, S.

    2015-10-01

    In 1998, the Curation and Analysis Planning Team for Extraterrestrial Materials (CAPTEM)sponsored a longterm initiative to improve our understanding of the Moon and its history by integrating all available types of data: in situ investigations, analyses of lunar samples, telescopic observations, and spacecraft datasets. This initiative, New Views of the Moon (NVM-I),was supported by NASA's Science Mission Directorate andthe Lunar and Planetary Institute and guided principally by Brad Jolliff, Charles Shearer,Mark Wieczorek,and Clive Neal. The goals of the original NVM-Iinitiative were (1) tosummarize new insights that have been gained about the Moon as a result of recent global data sets(Clementine, Lunar Prospector), and their integration with sample and other data;(2) to define current understanding of the Moon's geologic history, resources, and potential for scientific exploration; and (3) to communicate implications ofknowledge gained from research and exploration of the Moon for planetary science and exploration beyond the Moon. The NVM- Iinitiative ultimately involved contributions and data synthesis from over 100 individual scientists and engineers at numerous workshops and special sessions at worldwide scientific meetings.NVM-I culminated in a book "New Views of the Moon" published in 2006 as volume 60 of Reviews in Mineralogy and Geochemistry published by the Mineralogical Society of America. In 2012, the book was translated into Chinese.NVM-I went to press prior to analysis of the data from missions flown since 2000, and before the major discoveries from sample analyses made this century

  9. A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

    NASA Technical Reports Server (NTRS)

    Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

    2001-01-01

    Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

  10. On Nibbles and Bytes: The Conundrum of Memory for Space Systems - NASA Electronic Parts and Packaging (NEPP) and Efforts in Memories

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Ladbury, Ray; Pellish, Jonathan; Sheldon, Douglas; Oldham, Timothy; Berg, Melanie D.; Cohn, Lewis M.

    2009-01-01

    Radiation requirements and trends. TID: 1) >90% of NASA applications are < 100 krads-Si in piecepart requirements. a) Many commercial devices (NVM and SDRAMs) meet or come close to this. b) Charge pump TID tolerance has improved an order magnitude over the last 10 years. 2) There are always a few programs with higher level needs and, of course, defense needs SEL: 1) Prefer none or rates that are considered low risk. a) Latent damage is a bear to deal with. 2) As we re packing cells tighter and even with lower Vdd, we re seeing SEL on commercial devices regularly (<90nm). a) Often in power conversion, I/O, or control areas. SEU: 1) It s not the bit errors, it s the SEFIs errors that are the biggest issues. a) Scrubbing concerns for risk, power, speed.

  11. A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications.

    PubMed

    Qi Zhang; Peng Feng; Zhiqing Geng; Xiaozhou Yan; Nanjian Wu

    2011-02-01

    A 2.4-GHz energy-efficient transmitter (TX) for wireless medical applications is presented in this paper. It consists of four blocks: a phase-locked loop (PLL) synthesizer with a direct frequency presetting technique, a class-B power amplifier, a digital processor, and nonvolatile memory (NVM). The frequency presetting technique can accurately preset the carrier frequency of the voltage-controlled oscillator and reduce the lock-in time of the PLL synthesizer, further increasing the data rate of communication with low power consumption. The digital processor automatically compensates preset frequency variation with process, voltage, and temperature. The NVM stores the presetting signals and calibration data so that the TX can avoid the repetitive calibration process and save the energy in practical applications. The design is implemented in 0.18- μm radio-frequency complementary metal-oxide semiconductor process and the active area is 1.3 mm (2). The TX achieves 0-dBm output power with a maximum data rate of 4 Mb/s/2 Mb/s and dissipates 2.7-mA/5.4-mA current from a 1.8-V power supply for on-off keying/frequency-shift keying modulation, respectively. The corresponding energy efficiency is 1.2 nJ/b·mW and 4.8 nJ/b· mW when normalized to the transmitting power.

  12. Using NVMe Gen3 PCIe SSD Cards in High-density Servers for High-performance Big Data Transfer Over Multiple Network Channels

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Fang, Chin

    This Technical Note describes how the Zettar team came up with a data transfer cluster design that convincingly proved the feasibility of using high-density servers for high-performance Big Data transfers. It then outlines the tests, operations, and observations that address a potential over-heating concern regarding the use of Non-Volatile Memory Host Controller Interface Specification (NVMHCI aka NVM Express or NVMe) Gen 3 PCIe SSD cards in high-density servers. Finally, it points out the possibility of developing a new generation of high-performance Science DMZ data transfer system for the data-intensive research community and commercial enterprises.

  13. High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Xiang, Lanyi; Ying, Jun; Han, Jinhua

    2016-04-25

    In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (V{sub on}) and severe degradation of the memory window (ΔV{sub on}) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electronsmore » transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of V{sub on} at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔV{sub on} of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.« less

  14. Hafnia-based resistive switching devices for non-volatile memory applications and effects of gamma irradiation on device performance

    NASA Astrophysics Data System (ADS)

    Arun, N.; Kumar, K. Vinod; Pathak, A. P.; Avasthi, D. K.; Nageswara Rao, S. V. S.

    2018-04-01

    Non-volatile memory (NVM) devices were fabricated as a Metal- Insulator-Metal (MIM) structures by sandwiching Hafnium dioxide (HfO2) thin film in between two metal electrodes. The top and bottom metal electrodes were deposited by using the thermal evaporation, and the oxide layer was deposited by using the RF magnetron sputtering technique. The Resistive Random Access Memory (RRAM) device structures such as Ag/HfO2/Au/Si were fabricated and I-V characteristics for the pristine and gamma-irradiated devices with a dose 24 kGy were measured. Further we have studied the thermal annealing effects, in the range of 100°-400°C in a tubular furnace for the HfO2/Au/Si samples. The X-ray diffraction (XRD), Rutherford Backscattering Spectrometry (RBS), field emission-scanning electron microscopy (FESEM) analysis measurements were performed to determine the thickness, crystallinity and stoichiometry of these films. The electrical characteristics such as resistive switching, endurance, retention time and switching speed were measured by a semiconductor device analyser. The effects of gamma irradiation on the switching properties of these RRAM devices have been studied.

  15. Nonvolatile memories using deep traps formed in HfO2 by Nb ion implantation

    NASA Astrophysics Data System (ADS)

    Choul Kim, Min; Oh Kim, Chang; Taek Oh, Houng; Choi, Suk-Ho; Belay, K.; Elliman, R. G.; Russo, S. P.

    2011-03-01

    We report nonvolatile memories (NVMs) based on deep-energy trap levels formed in HfO2 by metal ion implantation. A comparison of Nb- and Ta-implanted samples shows that suitable charge-trapping centers are formed in Nb-implanted samples, but not in Ta-implanted samples. This is consistent with density-functional theory calculations which predict that only Nb will form deep-energy levels in the bandgap of HfO2. Photocurrent spectroscopy exhibits characteristics consistent with one of the trap levels predicted in these calculations. Nb-implanted samples showing memory windows in capacitance-voltage (V) curves always exhibit current (I) peaks in I-V curves, indicating that NVM effects result from deep traps in HfO2. In contrast, Ta-implanted samples show dielectric breakdowns during the I-V sweeps between 5 and 11 V, consistent with the fact that no trap levels are present. For a sample implanted with a fluence of 1013 Nb cm-2, the charge losses after 104 s are ˜9.8 and ˜25.5% at room temperature (RT) and 85°C, respectively, and the expected charge loss after 10 years is ˜34% at RT, very promising for commercial NVMs.

  16. Approaches of multilayer overlay process control for 28nm FD-SOI derivative applications

    NASA Astrophysics Data System (ADS)

    Duclaux, Benjamin; De Caunes, Jean; Perrier, Robin; Gatefait, Maxime; Le Gratiet, Bertrand; Chapon, Jean-Damien; Monget, Cédric

    2018-03-01

    Derivative technology like embedded Non-Volatile Memories (eNVM) is raising new types of challenges on the "more than Moore" path. By its construction: overlay is critical across multiple layers, by its running mode: usage of high voltage are stressing leakages and breakdown, and finally with its targeted market: Automotive, Industry automation, secure transactions… which are all requesting high device reliability (typically below 1ppm level). As a consequence, overlay specifications are tights, not only between one layer and its reference, but also among the critical layers sharing the same reference. This work describes a broad picture of the key points for multilayer overlay process control in the case of a 28nm FD-SOI technology and its derivative flows. First, the alignment trees of the different flow options have been optimized using a realistic process assumptions calculation for indirect overlay. Then, in the case of a complex alignment tree involving heterogeneous scanner toolset, criticality of tool matching between reference layer and critical layers of the flow has been highlighted. Improving the APC control loops of these multilayer dependencies has been studied with simulations of feed-forward as well as implementing new rework algorithm based on multi-measures. Finally, the management of these measurement steps raises some issues for inline support and using calculations or "virtual overlay" could help to gain some tool capability. A first step towards multilayer overlay process control has been taken.

  17. Diagnosis of Myocardial Viability by Fluorodeoxyglucose Distribution at the Border Zone of a Low Uptake Region

    PubMed Central

    Sone, Teruki; Yoshikawa, Kunihiko; Mimura, Hiroaki; Hayashida, Akihiro; Wada, Nozomi; Obase, Kikuko; Imai, Koichiro; Saito, Ken; Maehama, Tomoko; Fukunaga, Masao; Yoshida, Kiyoshi

    2010-01-01

    Purpose In cardiac 2-[F-18]fluoro-2-deoxy-D-glucose (FDG)-positron emission tomography (PET) examination, interpretation of myocardial viability in the low uptake region (LUR) has been difficult without additional perfusion imaging. We evaluated distribution patterns of FDG at the border zone of the LUR in the cardiac FDG-PET and established a novel parameter for diagnosing myocardial viability and for discriminating the LUR of normal variants. Materials and Methods Cardiac FDG-PET was performed in patients with a myocardial ischemic event (n = 22) and in healthy volunteers (n = 22). Whether the myocardium was not a viable myocardium (not-VM) or an ischemic but viable myocardium (isch-VM) was defined by an echocardiogram under a low dose of dobutamine infusion as the gold standard. FDG images were displayed as gray scaled-bull's eye mappings. FDG-plot profiles for LUR (= true ischemic region in the patients or normal variant region in healthy subjects) were calculated. Maximal values of FDG change at the LUR border zone (a steepness index; Smax scale/pixel) were compared among not-VM, isch-VM, and normal myocardium. Results Smax was significantly higher for n-VM compared to those with isch-VM or normal myocardium (ANOVA). A cut-off value of 0.30 in Smax demonstrated 100% sensitivity and 83% specificity for diagnosing n-VM and isch-VM. Smax less than 0.23 discriminated LUR in normal myocardium from the LUR in patients with both n-VM and isch-VM with a 94% sensitivity and a 93% specificity. Conclusion Smax of the LUR in cardiac FDG-PET is a simple and useful parameter to diagnose n-VM and isch-VM, as well as to discriminate thr LUR of normal variants. PMID:20191007

  18. Noncompaction of the ventricular myocardium is associated with a de novo mutation in the beta-myosin heavy chain gene.

    PubMed

    Budde, Birgit S; Binner, Priska; Waldmüller, Stephan; Höhne, Wolfgang; Blankenfeldt, Wulf; Hassfeld, Sabine; Brömsen, Jürgen; Dermintzoglou, Anastassia; Wieczorek, Marcus; May, Erik; Kirst, Elisabeth; Selignow, Carmen; Rackebrandt, Kirsten; Müller, Melanie; Goody, Roger S; Vosberg, Hans-Peter; Nürnberg, Peter; Scheffold, Thomas

    2007-12-26

    Noncompaction of the ventricular myocardium (NVM) is the morphological hallmark of a rare familial or sporadic unclassified heart disease of heterogeneous origin. NVM results presumably from a congenital developmental error and has been traced back to single point mutations in various genes. The objective of this study was to determine the underlying genetic defect in a large German family suffering from NVM. Twenty four family members were clinically assessed using advanced imaging techniques. For molecular characterization, a genome-wide linkage analysis was undertaken and the disease locus was mapped to chromosome 14ptel-14q12. Subsequently, two genes of the disease interval, MYH6 and MYH7 (encoding the alpha- and beta-myosin heavy chain, respectively) were sequenced, leading to the identification of a previously unknown de novo missense mutation, c.842G>C, in the gene MYH7. The mutation affects a highly conserved amino acid in the myosin subfragment-1 (R281T). In silico simulations suggest that the mutation R281T prevents the formation of a salt bridge between residues R281 and D325, thereby destabilizing the myosin head. The mutation was exclusively present in morphologically affected family members. A few members of the family displayed NVM in combination with other heart defects, such as dislocation of the tricuspid valve (Ebstein's anomaly, EA) and atrial septal defect (ASD). A high degree of clinical variability was observed, ranging from the absence of symptoms in childhood to cardiac death in the third decade of life. The data presented in this report provide first evidence that a mutation in a sarcomeric protein can cause noncompaction of the ventricular myocardium.

  19. SPARC: Demonstrate burst-buffer-based checkpoint/restart on ATS-1.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Oldfield, Ron A.; Ulmer, Craig D.; Widener, Patrick

    Recent high-performance computing (HPC) platforms such as the Trinity Advanced Technology System (ATS-1) feature burst buffer resources that can have a dramatic impact on an application’s I/O performance. While these non-volatile memory (NVM) resources provide a new tier in the storage hierarchy, developers must find the right way to incorporate the technology into their applications in order to reap the benefits. Similar to other laboratories, Sandia is actively investigating ways in which these resources can be incorporated into our existing libraries and workflows without burdening our application developers with excessive, platform-specific details. This FY18Q1 milestone summaries our progress in adaptingmore » the Sandia Parallel Aerodynamics and Reentry Code (SPARC) in Sandia’s ATDM program to leverage Trinity’s burst buffers for checkpoint/restart operations. We investigated four different approaches with varying tradeoffs in this work: (1) simply updating job script to use stage-in/stage out burst buffer directives, (2) modifying SPARC to use LANL’s hierarchical I/O (HIO) library to store/retrieve checkpoints, (3) updating Sandia’s IOSS library to incorporate the burst buffer in all meshing I/O operations, and (4) modifying SPARC to use our Kelpie distributed memory library to store/retrieve checkpoints. Team members were successful in generating initial implementation for all four approaches, but were unable to obtain performance numbers in time for this report (reasons: initial problem sizes were not large enough to stress I/O, and SPARC refactor will require changes to our code). When we presented our work to the SPARC team, they expressed the most interest in the second and third approaches. The HIO work was favored because it is lightweight, unobtrusive, and should be portable to ATS-2. The IOSS work is seen as a long-term solution, and is favored because all I/O work (including checkpoints) can be deferred to a single library.« less

  20. Evaluation of Data Retention and Imprint Characteristics of FRAMs Under Environmental Stresses for NASA Applications

    NASA Technical Reports Server (NTRS)

    Sharma, Ashok K.; Teverovsky, Alexander; Dowdy, Terry W.; Hamilton, Brett

    2000-01-01

    A major reliability issue for all advanced nonvolatile memory (NVM) technology devices including FRAMs (Ferroelectric random access memories) is the data retention characteristics over extended period of time, under environmental stresses and exposure to total ionizing dose (TID) radiation effects. For this testing, 256 Kb FRAMs in 28-pin plastic DIPS, rated for industrial grade temperature range of -40 C to +85 C, were procured. These are two-transistor, two-capacitor (2T-2C) design FRAMs. In addition to data retention characteristics, the parts were also evaluated for imprint failures, which are defined as the failure of cells to change from a "preferred" state, where it has been for a significant period of time to an opposite state (e.g., from 1 to 0, or 0 to 1). These 256 K FRAMs were subjected to scanning acoustic microscopy (C-SAM); 1,000 temperature cycles from -65 C to +150 C; high temperature aging at 150 C, 175 C, and 200 C for 1,000 hours; highly accelerated stress test (HAST) for 500 hours; 1,000 hours of operational life test at 125 C; and total ionizing dose radiation testing. As a preconditioning, 10 K read/write cycles were performed on all devices. Interim electrical measurements were performed throughout this characterization, including special imprint testing and final electrical testing. Some failures were observed during high temperature aging test at 200 C, during HAST testing, and during 1,000 hours of operational life at 125 C. The parts passed 10 Krad exposure, but began showing power supply current increases during the dose increment from 10 Krad to 30 Krad, and at 40 Krad severe data retention and parametric failures were observed. Failures from various environmental group testing are currently being analyzed.

  1. Flexible non-diffractive vortex microscope for three-dimensional depth-enhanced super-localization of dielectric, metal and fluorescent nanoparticles

    NASA Astrophysics Data System (ADS)

    Bouchal, Petr; Bouchal, Zdeněk

    2017-10-01

    In the past decade, probe-based super-resolution using temporally resolved localization of emitters became a groundbreaking imaging strategy in fluorescence microscopy. Here we demonstrate a non-diffractive vortex microscope (NVM), enabling three-dimensional super-resolution fluorescence imaging and localization and tracking of metal and dielectric nanoparticles. The NVM benefits from vortex non-diffractive beams (NBs) creating a double-helix point spread function that rotates under defocusing while maintaining its size and shape unchanged. Using intrinsic properties of the NBs, the dark-field localization of weakly scattering objects is achieved in a large axial range exceeding the depth of field of the microscope objective up to 23 times. The NVM was developed using an upright microscope Nikon Eclipse E600 operating with a spiral lithographic mask optimized using Fisher information and built into an add-on imaging module or microscope objective. In evaluation of the axial localization accuracy the root mean square error below 18 nm and 280 nm was verified over depth ranges of 3.5 μm and 13.6 μm, respectively. Subwavelength gold and polystyrene beads were localized with isotropic precision below 10 nm in the axial range of 3.5 μm and the axial precision reduced to 30 nm in the extended range of 13.6 μm. In the fluorescence imaging, the localization with isotropic precision below 15 nm was demonstrated in the range of 2.5 μm, whereas in the range of 8.3 μm, the precision of 15 nm laterally and 30-50 nm axially was achieved. The tracking of nanoparticles undergoing Brownian motion was demonstrated in the volume of 14 × 10 × 16 μm3. Applicability of the NVM was tested by fluorescence imaging of LW13K2 cells and localization of cellular proteins.

  2. Sb-Te Phase-change Materials under Nanoscale Confinement

    NASA Astrophysics Data System (ADS)

    Ihalawela, Chandrasiri A.

    Size, speed and efficiency are the major challenges of next generation nonvolatile memory (NVM), and phase-change memory (PCM) has captured a great attention due to its promising features. The key for PCM is rapid and reversible switching between amorphous and crystalline phases with optical or electrical excitation. The structural transition is associated with significant contrast in material properties which can be utilized in optical (CD, DVD, BD) and electronic (PCRAM) memory applications. Importantly, both the functionality and the success of PCM technology significantly depend on the core material and its properties. So investigating PC materials is crucial for the development of PCM technology to realized enhanced solutions. In regards to PC materials, Sb-Te binary plays a significant role as a basis to the well-known Ge-Sb-Te system. Unlike the conventional deposition methods (sputtering, evaporation), electrochemical deposition method is used due to its multiple advantages, such as conformality, via filling capability, etc. First, the controllable synthesis of Sb-Te thin films was studied for a wide range of compositions using this novel deposition method. Secondly, the solid electrolytic nature of stoichiometric Sb2Te3 was studied with respect to precious metals. With the understanding of 2D thin film synthesis, Sb-Te 1D nanowires (18 - 220 nm) were synthesized using templated electrodeposition, where nanoporous anodic aluminum oxide (AAO) was used as a template for the growth of nanowires. In order to gain the controllability over the deposition in high aspect ratio structures, growth mechanisms of both the thin films and nanowires were investigated. Systematic understanding gained thorough previous studies helped to formulate the ultimate goal of this dissertation. In this dissertation, the main objective is to understand the size effect of PC materials on their phase transition properties. The reduction of effective memory cell size in conjunction with multilevel cells could be promising to achieve high data densities. However the size reduction may result in changes in material properties. If phase transition properties of the materials are also tunable with respect to the size, then more attractive solutions could be realized. So we have reported the size effect on crystallization temperature of prototypical Sb2Te3 nanowires synthesized in AAO templates. Moreover, we have found that the reduction of nanowire size can elevate the crystallization temperature, which is crucial for data retention in PCM technology. Energy dispersive X-ray spectroscopy, X-ray diffraction, electron microscopy and electrical resistivity measurements were used to characterize the composition, structure, morphology, and phase transition properties of the materials. We believe that this dissertation will provide new insights into the size effect of PC materials in addition to the controllable synthesis of PC thin films and nanowires through the novel electrochemical method.

  3. Ab initio study of ceria films for resistive switching memory applications

    NASA Astrophysics Data System (ADS)

    Firdos, Mehreen; Hussain, Fayyaz; Imran, Muhammad; Ismail, Muhammad; Rana, A. M.; Arshad Javid, M.; Majid, Abdul; Arif Khalil, R. M.; Ullah, Hafeez

    2017-10-01

    The aim of this study is to investigate the charge distribution/relocation activities in relation to resistive switching (RS) memory behavior in the metal/insulator/metal (MIM) structure of Zr/CeO2/Pt hybrid layers. The Zr layer is truly expected to act not only as an oxygen ion extraction layer but also as an ion barrier by forming a ZrO2 interfacial layer. Such behavior of the Zr not only introduces a high concentration of oxygen vacancies to the active CeO2 layer but also enhances the resistance change capability. Such Zr contributions have been explored by determining the work function, charge distribution and electronic properties with the help of density functional theory (DFT) based on the generalized gradient approximation (GGA). In doped CeO2, the dopant (Zr) plays a significant role in the formation of defect states, such as oxygen vacancies, which are necessary for generating conducting filaments. The total density of state (DOS) analyses reveal that the existence of impurity states in the hybrid system considerably upgrade the performance of charge transfer/accumulation, consequently leading to enhanced RS behavior, as noticed in our earlier experimental results on Zr/CeO2/Pt devices. Hence it can be concluded that the present DFT studies can be implemented on CeO2-based RRAM devices, which have skyscraping potential for future nonvolatile memory (NVM) applications.

  4. An insight into the dopant selection for CeO2-based resistive-switching memory system: a DFT and experimental study

    NASA Astrophysics Data System (ADS)

    Hussain, Fayyaz; Imran, Muhammad; Rana, Anwar Manzoor; Khalil, R. M. Arif; Khera, Ejaz Ahmad; Kiran, Saira; Javid, M. Arshad; Sattar, M. Atif; Ismail, Muhammad

    2018-03-01

    The aim of this study is to figure out better metal dopants for CeO2 for designing highly efficient non-volatile memory (NVM) devices. The present DFT work involves four different metals doped interstitially and substitutionally in CeO2 thin films. First principle calculations involve electron density of states (DOS) and partial density of states (PDOS), and isosurface charge densities are carried out within the plane-wave density functional theory using GGA and GGA + U approach by employing the Vienna ab initio simulation package VASP. Isosurface charge density plots confirmed that interstitial doping of Zr and Ti metals truly assists in generating conduction filaments (CFs), while substitutional doping of these metals cannot do so. Substitutional doping of W may contribute in generating CFs in CeO2 directly, but its interstitial doping improves conductivity of CeO2. However, Ni-dopant is capable of directly generating CFs both as substitutional and interstitial dopants in ceria. Such a capability of Ni appears acting as top electrode in Ni/CeO2/Pt memory devices, but its RS behavior is not so good. On inserting Zr layer to make Ni/Zr:CeO2/Pt memory stacks, Ni does not contribute in RS characteristics, but Zr plays a vital role in forming CFs by creating oxygen vacancies and forming ZrO2 interfacial layer. Therefore, Zr-doped devices exhibit high-resistance ratio of 104 and good endurance as compared to undoped devices suitable for RRAM applications.

  5. EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh; Vetter, Jeffrey S

    To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item withinmore » a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.« less

  6. Deposition and characterization of vanadium oxide based thin films for MOS device applications

    NASA Astrophysics Data System (ADS)

    Rakshit, Abhishek; Biswas, Debaleen; Chakraborty, Supratic

    2018-04-01

    Vanadium Oxide films are deposited on Si (100) substrate by reactive RF-sputtering of a pure Vanadium metallic target in an Argon-Oxygen plasma environment. The ratio of partial pressures of Argon to Oxygen in the sputtering-chamber is varied by controlling their respective flow rates and the resultant oxide films are obtained. MOS Capacitor based devices are then fabricated using the deposited oxide films. High frequency Capacitance-Voltage (C-V) and gate current-gate voltage (I-V) measurements reveal a significant dependence of electrical characteristics of the deposited films on their sputtering deposition parameters mainly, the relative content of Argon/Oxygen in the plasma chamber. A noteworthy change in the electrical properties is observed for the films deposited under higher relative oxygen content in the plasma atmosphere. Our results show that reactive sputtering serves as an indispensable deposition-setup for fabricating vanadium oxide based MOS devices tailor-made for Non-Volatile Memory (NVM) applications.

  7. A single-center randomized controlled trial observing the safety and efficacy of modified step-up graded Valsalva manoeuver in patients with vasovagal syncope

    PubMed Central

    Liu, Xiaoyan; Yu, Yijun; Zeng, Xiaoyun; Li, Huanhuan

    2018-01-01

    Non-pharmacological therapies, especially the physical maneuvers, are viewed as important and promising strategies for reducing syncope recurrences in vasovagal syncope (VVS) patients. We observed the efficacy of a modified Valsalva maneuver (MVM) in VVS patients. 72 VVS patients with syncope history and positive head-up tilt table testing (HUTT) results were randomly divided into conventional treatment group (NVM group, n = 36) and conventional treatment plus standard MVM for 30 days group (MVM group, n = 36). Incidence of recurrent syncope after 12 months (6.5% vs. 41.2%, P<0.01) and rate of positive HUTT after 30 days (9.7% vs.79.4%, P<0.01) were significantly lower in MVM group than in NVM group. HRV results showed that low frequency (LF), LF/ high frequency (HF), standard deviation of NN intervals (SDNN) and standard deviation of all 5-min average NN intervals (SDANN) values were significantly lower in the NVM and MVM groups than in the control group at baseline. After 30 days treatment, LF, LF/HF, SDNN, SDANN values were significantly higher compared to baseline in MVM group. Results of Cox proportional hazard model showed that higher SDNN and SDANN values at 30 days after intervention were protective factors, while positive HUTT at 30 days after intervention was risk factor for recurrent syncope. Our results indicate that 30 days MVM intervention could effectively reduce the incidence of recurrent syncope up to 12 months in VVS patients, possibly through improving sympathetic function of VVS patients. PMID:29381726

  8. A single-center randomized controlled trial observing the safety and efficacy of modified step-up graded Valsalva manoeuver in patients with vasovagal syncope.

    PubMed

    He, Li; Wang, Lan; Li, Lun; Liu, Xiaoyan; Yu, Yijun; Zeng, Xiaoyun; Li, Huanhuan; Gu, Ye

    2018-01-01

    Non-pharmacological therapies, especially the physical maneuvers, are viewed as important and promising strategies for reducing syncope recurrences in vasovagal syncope (VVS) patients. We observed the efficacy of a modified Valsalva maneuver (MVM) in VVS patients. 72 VVS patients with syncope history and positive head-up tilt table testing (HUTT) results were randomly divided into conventional treatment group (NVM group, n = 36) and conventional treatment plus standard MVM for 30 days group (MVM group, n = 36). Incidence of recurrent syncope after 12 months (6.5% vs. 41.2%, P<0.01) and rate of positive HUTT after 30 days (9.7% vs.79.4%, P<0.01) were significantly lower in MVM group than in NVM group. HRV results showed that low frequency (LF), LF/ high frequency (HF), standard deviation of NN intervals (SDNN) and standard deviation of all 5-min average NN intervals (SDANN) values were significantly lower in the NVM and MVM groups than in the control group at baseline. After 30 days treatment, LF, LF/HF, SDNN, SDANN values were significantly higher compared to baseline in MVM group. Results of Cox proportional hazard model showed that higher SDNN and SDANN values at 30 days after intervention were protective factors, while positive HUTT at 30 days after intervention was risk factor for recurrent syncope. Our results indicate that 30 days MVM intervention could effectively reduce the incidence of recurrent syncope up to 12 months in VVS patients, possibly through improving sympathetic function of VVS patients.

  9. Gender differences in locomotor and stereotypic behavior associated with l-carnitine treatment in mice.

    PubMed

    Benvenga, Salvatore; Itri, Elenora; Hauser, Peter; De Tolla, Louis; Yu, Sui-Foh; Testa, Giuseppe; Pappalardo, Maria Angela; Trimarchi, Francesco; Amato, Antonino

    2011-02-01

    The carnitines exert neuroprotective and neuromodulatory actions, and carnitine supplementation increases locomotor activity (LMA) in experimental animals. We measured 13 indexes of LMA and 3 indexes of stereotypic activity (STA) in adult male and female caged mice. In a randomized 4-week trial, 10 males and 10 females received 50 mg/kg body weight PO l-carnitine, and another 10 males and 10 females received placebo. Compared with placebo-treated females, placebo-treated males had a greater number of stereotypies (NSTs), stereotypy counts (STCs), stereotypy time (STT), and right front time (RFT), but smaller total distance traveled (TDT), margin distance (MD), number of vertical movements (NVMs), and left rear time (LRT). Compared with placebo-treated males, carnitine-treated males had greater horizontal activity (HA), movement time (MT), NVM, STT, TDT, STC, MD, LRT, and clockwise revolutions (CRs), but smaller left front time (LFT) and RFT. Compared with placebo-treated females, carnitine-treated females had greater NST, STC, STT, LFT, and RFT, but smaller NM, HA, NVM, VA, MT, anticlockwise revolutions (ACRs), CR, TDT, and MD; right rear time (RRT) remained statistically insignificant across all comparisons. In summary, l-carnitine caused gender differences to persist for STC, diminish for NST and STT, disappear for LRT and NVM, change in the opposite direction for TDT and MD, appear de novo for HA, VA, NM, MT, and LFT, and remain absent for RRT and ACR. Some indexes of LMA and STA are sexually dimorphic in adult mice, and l-carnitine differentially maintains, diminishes/cancels, inverts, or creates the sexual dimorphism of particular indexes. Copyright © 2011 Elsevier HS Journals, Inc. All rights reserved.

  10. Stress effects in ferroelectric perovskite thin-films

    NASA Astrophysics Data System (ADS)

    Zednik, Ricardo Johann

    The exciting class of ferroelectric materials presents the engineer with an array of unique properties that offer promise in a variety of applications; these applications include infra-red detectors ("night-vision imaging", pyroelectricity), micro-electro-mechanical-systems (MEMS, piezoelectricity), and non-volatile memory (NVM, ferroelectricity). Realizing these modern devices often requires perovskite-based ferroelectric films thinner than 100 nm. Two such technologically important material systems are (Ba,Sr)TiO3 (BST), for tunable dielectric devices employed in wireless communications, and Pb(Zr,Ti)O3 (PZT), for ferroelectric non-volatile memory (FeRAM). In general, the material behavior is strongly influenced by the mechanical boundary conditions imposed by the substrate and surrounding layers and may vary considerably from the known bulk behavior. A better mechanistic understanding of these effects is essential for harnessing the full potential of ferroelectric thin-films and further optimizing existing devices. Both materials share a common crystal structure and similar properties, but face unique challenges due to the design parameters of these different applications. Tunable devices often require very low dielectric loss as well as large dielectric tunability. Present results show that the dielectric response of BST thin-films can either resemble a dipole-relaxor or follow the accepted empirical Universal Relaxation Law (Curie-von Schweidler), depending on temperature. These behaviors in a single ferroelectric thin-film system are often thought to be mutually exclusive. In state-of-the-art high density FeRAM, the ferroelectric polarization is at least as important as the dielectric response. It was found that these properties are significantly affected by moderate biaxial tensile and compressive stresses which reversibly alter the ferroelastic domain populations of PZT at room temperature. The 90-degree domain wall motion observed by high resolution synchrotron x-ray diffraction indicates that a small effective restoring stress of about 1 MPa acts on the domain walls in these nano-crystalline PZT films. This insight allows reversible control of the ferroelectric and dielectric behavior of these important functional oxide materials, with important implications for associated integrated devices.

  11. Evaluation of Data Retention and Imprint Characteristics of FRAMs Under Environmental Stresses for NASA Applications

    NASA Technical Reports Server (NTRS)

    Sharma, Asbok K.; Teverovsky, Alexander; Dowdy, Terry W.; Hamilton, Brett

    2002-01-01

    A major reliability issue for all advanced nonvolatile memory (NVM) technology devices including FRAMs is the data retention characteristics over extended period of time, under environmental stresses and exposure to total ionizing dose (TID) radiation effects. For this testing, 256 Kb FRAMs in 28-pin plastic DIPS, rated for industrial grade temperature range of -40 C to +85 C, were procured. These are two-transistor, two-capacitor (2T-2C) design FRAMs. In addition to data retention characteristics, the parts were also evaluated for imprint failures, which are defined as the failure of cells to change from a "preferred" state, where it has been for a significant period of time to an opposite state (e.g., from 1 to 0, or 0 to 1). These 256 K FRAMs were subjected to scanning acoustic microscopy (C-SAM); 1,000 temperature cycles from -65 C to +150 C; high temperature aging at 150 C, 175 C, and 200 C for 1,000 hours; highly accelerated stress test (HAST) for 500 hours; 1,000 hours of operational life test at 125 C; and total ionizing dose radiation testing. As a preconditioning, 10 K read/write cycles were performed on all devices. Interim electrical measurements were performed throughout this characterization, including special imprint testing and final electrical testing. Some failures were observed during high temperature aging test at 200 C, during HAST testing, and during 1,000 hours of operational life at 125 C. The parts passed 10 Krad exposure, but began showing power supply current increases during the dose increment from 10 Krad to 30 Krad, and at 40 Krad severe data retention and parametric failures were observed. Failures from various environmental group testing are currently being analyzed.

  12. Microstructure and electrical properties of Sb2Te phase-change material

    NASA Astrophysics Data System (ADS)

    Liu, Guangyu; Wu, Liangcai; Li, Tao; Rao, Feng; Song, Sannian; Liu, Bo; Song, Zhitang

    2016-10-01

    Phase Change Memory (PCM) has great potential for commercial applications of next generation non-volatile memory (NVM) due to its high operation speed, high endurance and low power consumption. Sb2Te (ST) is a common phase-change material and has fast crystallization speed, while thermal stability is relatively poor and its crystallization temperature is about 142°C. According to the Arrhenius law, the extrapolated failure temperature is about 55°C for ten years. When heated above the crystallization temperature while below the melting point, its structure can be transformed from amorphous phase to hexagonal phase. Due to the growth-dominated crystallization mechanism, the grain size of ST film is large and the diameter of about 300 nm is too large compared with Ge2Sb2Te5 (GST), which may deteriorate the device performance. High resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) were employed to study the microstructures and the results indicate that the crystal plane is {110}. In addition, device cells were manufactured and their current-voltage (I-V) and resistance-voltage characteristics were tested, and the results reveal that the threshold voltage (Vth) of ST film is 0.87 V. By researching the basic properties of ST, we can understand its disadvantages and manage to improve its performance by doping or other proper methods. Finally, the improved ST can be a candidate for optical discs and PCM.

  13. An Optimizing Compiler for Petascale I/O on Leadership-Class Architectures

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kandemir, Mahmut Taylan; Choudary, Alok; Thakur, Rajeev

    In high-performance computing (HPC), parallel I/O architectures usually have very complex hierarchies with multiple layers that collectively constitute an I/O stack, including high-level I/O libraries such as PnetCDF and HDF5, I/O middleware such as MPI-IO, and parallel file systems such as PVFS and Lustre. Our DOE project explored automated instrumentation and compiler support for I/O intensive applications. Our project made significant progress towards understanding the complex I/O hierarchies of high-performance storage systems (including storage caches, HDDs, and SSDs), and designing and implementing state-of-the-art compiler/runtime system technology that targets I/O intensive HPC applications that target leadership class machine. This final reportmore » summarizes the major achievements of the project and also points out promising future directions Two new sections in this report compared to the previous report are IOGenie and SSD/NVM-specific optimizations.« less

  14. Effect of two medium chain triglycerides-supplemented diets on synaptic morphology in the cerebellar cortex of late-adult rats.

    PubMed

    Balietti, Marta; Fattoretti, Patrizia; Giorgetti, Belinda; Casoli, Tiziana; Di Stefano, Giuseppina; Platano, Daniela; Aicardi, Giorgio; Lattanzio, Fabrizia; Bertoni-Freddari, Carlo

    2009-12-01

    Ketogenic diets (KDs) have shown beneficial effects in experimental models of neurodegeneration, designating aged individuals as possible recipients. However, few studies have investigated their consequences on aging brain. Here, late-adult rats (19 months of age) were fed for 8 weeks with two medium chain triglycerides-supplemented diets (MCT-SDs) and the average area (S), numeric density (Nv(s)), and surface density (S(v)) of synapses, as well as the average volume (V), numeric density (Nv(m)), and volume density (V(v)) of synaptic mitochondria were evaluated in granule cell layer of the cerebellar cortex (GCL-CCx) by computer-assisted morphometric methods. MCT content was 10 or 20%. About 10%MCT-SD induced the early appearance of senescent patterns (decreased Nv(s) and Nv(m); increased V), whereas 20%MCT-SD caused no changes. Recently, we have shown that both MCT-SDs accelerate aging in the stratum moleculare of CA1 (SM CA1), but are "antiaging" in the outer molecular layer of dentate gyrus (OML DG). Since GCL-CCx is more vulnerable to age than OML DG but less than SM CA1, present and previous results suggest that the effects of MCT-SDs in the aging brain critically depend on neuronal vulnerability to age, besides MCT percentage.

  15. Feasibilty of a Multi-bit Cell Perpendicular Magnetic Tunnel Junction Device

    NASA Astrophysics Data System (ADS)

    Kim, Chang Soo

    The ultimate objective of this research project was to explore the feasibility of making a multi-bit cell perpendicular magnetic tunnel junction (PMTJ) device to increase the storage density of spin-transfer-torque random access memory (STT-RAM). As a first step toward demonstrating a multi-bit cell device, this dissertation contributed a systematic and detailed study of developing a single cell PMTJ device using L10 FePt films. In the beginning of this research, 13 up-and-coming non-volatile memory (NVM) technologies were investigated and evaluated to see whether one of them might outperform NAND flash memories and even HDDs on a cost-per-TB basis in 2020. This evaluation showed that STT-RAM appears to potentially offer superior power efficiency, among other advantages. It is predicted that STTRAM's density could make it a promising candidate for replacing NAND flash memories and possibly HDDs if STTRAM could be improved to store multiple bits per cell. Ta/Mg0 under-layers were used first in order to develop (001) L1 0 ordering of FePt at a low temperature of below 400 °C. It was found that the tradeoff between surface roughness and (001) L10 ordering of FePt makes it difficult to achieve low surface roughness and good perpendicular magnetic properties simultaneously when Ta/Mg0 under-layers are used. It was, therefore, decided to investigate MgO/CrRu under-layers to simultaneously achieve smooth films with good ordering below 400°C. A well ordered 4 nm L10 FePt film with RMS surface roughness close to 0.4 nm, perpendicular coercivity of about 5 kOe, and perpendicular squareness near 1 was obtained at a deposition temperature of 390 °C on a thermally oxidized Si substrate when MgO/CrRu under-layers are used. A PMTJ device was developed by depositing a thin MgO tunnel barrier layer and a top L10 FePt film and then being postannealed at 450 °C for 30 minutes. It was found that the sputtering power needs to be minimized during the thin MgO tunnel barrier deposition because the high sputtering power can degrade perpendicular magnetic anisotropy of the bottom L1 0 FePt film and also increase RMS film surface roughness of the MgO tunnel barrier layer. From a lithographically unpatterned PMTJ sample, MR ratio and RA were measured at room temperature by the CIPT method and found to be 138% and 6.4 kOmicrom2, respectively. A completed PMTJ test pattern with a junction size of 80x40 microm2 was fabricated and showed a measured MR ratio and RA product of 108% and 4~6 kOmicrom 2, respectively. These values agree relatively well with the corresponding values of 138% and 6.4 kOmicrom2 obtained from the unpatterned PMTJ sample measured by a current-in-plane tunneling (CIPT) method.

  16. Elucidation and Optimization of Resistive Random Access Memory Switching Behavior for Advanced Computing Applications

    NASA Astrophysics Data System (ADS)

    Alamgir, Zahiruddin

    RRAM has recently emerged as a strong candidate for non-volatile memory (NVM). Beyond memory applications, RRAM holds promise for use in performing logic functions, mimicking neuromorphic activities, enabling multi-level switching, and as one of the key elements of hardware based encryption or signal processing systems. It has been shown previously that RRAM resistance levels can be changed by adjusting compliance current or voltage level. This characteristic makes RRAM suitable for use in setting the synaptic weight in neuromorphic computing circuits. RRAM is also considered as a key element in hardware encryption systems, to produce unique and reproducible signals. However, a key challenge to implement RRAM in these applications is significant cycle to cycle performance variability. We sought to develop RRAM that can be tuned to different resistance levels gradually, with high reliability, and low variability. To achieve this goal, we focused on elucidating the conduction mechanisms underlying the resistive switching behavior for these devices. Electrical conduction mechanisms were determined by curve fitting I-V data using different current conduction equations. Temperature studies were also performed to corroborate these data. It was found that Schottky barrier height and width modulation was one of the key parameters that could be tuned to achieve different resistance levels, and for switching resistance states, primarily via oxygen vacancy movement. Oxygen exchange layers with different electronegativity were placed between top electrode and the oxide layer of TaOx devices to determine the effect of oxygen vacancy concentrations and gradients in these devices. It was found that devices with OELs with lower electronegativity tend to yield greater separation in the OFF vs. ON state resistance levels. As an extension of this work, TaOx based RRAM with Hf as the OEL was fabricated and could be tuned to different resistance level using pulse width and height modulation, yielding excellent uniformity and reliability. These findings improve our understanding of conduction within TaO x-based RRAM devices, providing a physical basis for switching in these devices. The value of this work lies in the demonstration of devices with excellent performance and demonstrated devices constitute a significant step toward real-world applications.

  17. Overview of emerging nonvolatile memory technologies

    PubMed Central

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

  18. Overview of emerging nonvolatile memory technologies.

    PubMed

    Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

  19. Non-Volatile Memory Technology Symposium 2000: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh (Editor)

    2000-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2000 that was held on November 15-16, 2000 in Arlington, Virginia. The proceedings contains a wide range of papers that cover the presentations of myriad advances in the nonvolatile memory technology during the recent past including memory cell design, simulations, radiation environment, and emerging memory technologies. The papers presented in the proceedings address the design challenges and applications and deals with newer, emerging memory technologies as well as related issues of radiation environment and die packaging.

  20. Progress In Optical Memory Technology

    NASA Astrophysics Data System (ADS)

    Tsunoda, Yoshito

    1987-01-01

    More than 20 years have passed since the concept of optical memory was first proposed in 1966. Since then considerable progress has been made in this area together with the creation of completely new markets of optical memory in consumer and computer application areas. The first generation of optical memory was mainly developed with holographic recording technology in late 1960s and early 1970s. Considerable number of developments have been done in both analog and digital memory applications. Unfortunately, these technologies did not meet a chance to be a commercial product. The second generation of optical memory started at the beginning of 1970s with bit by bit recording technology. Read-only type optical memories such as video disks and compact audio disks have extensively investigated. Since laser diodes were first applied to optical video disk read out in 1976, there have been extensive developments of laser diode pick-ups for optical disk memory systems. The third generation of optical memory started in 1978 with bit by bit read/write technology using laser diodes. Developments of recording materials including both write-once and erasable have been actively pursued at several research institutes. These technologies are mainly focused on the optical memory systems for computer application. Such practical applications of optical memory technology has resulted in the creation of such new products as compact audio disks and computer file memories.

  1. An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

    NASA Technical Reports Server (NTRS)

    Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

    2001-01-01

    Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

  2. Non-Volatile Memory Technology Symposium 2001: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Daud, Taher; Strauss, Karl

    2001-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

  3. SONOS technology for commercial and military nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Adams, D.; Farrell, P.; Jacunski, M.; Williams, D.; Jakubczak, J.; Knoll, M.; Murray, J.

    Silicon Oxide Nitride Oxide Semiconductor (SONOS) technology is well suited for military and commercial nonvolatile memory applications. Excellent long term memory retention, radiation hardness, and endurance has been demonstrated with this technology. This paper summarizes our data in these areas for SONOS technology.

  4. Data storage technology comparisons

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.

    1990-01-01

    The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

  5. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    NASA Astrophysics Data System (ADS)

    Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

    2014-05-01

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

  6. Emerging memories

    NASA Astrophysics Data System (ADS)

    Baldi, Livio; Bez, Roberto; Sandhu, Gurtej

    2014-12-01

    Memory is a key component of any data processing system. Following the classical Turing machine approach, memories hold both the data to be processed and the rules for processing them. In the history of microelectronics, the distinction has been rather between working memory, which is exemplified by DRAM, and storage memory, exemplified by NAND. These two types of memory devices now represent 90% of all memory market and 25% of the total semiconductor market, and have been the technology drivers in the last decades. Even if radically different in characteristics, they are however based on the same storage mechanism: charge storage, and this mechanism seems to be near to reaching its physical limits. The search for new alternative memory approaches, based on more scalable mechanisms, has therefore gained new momentum. The status of incumbent memory technologies and their scaling limitations will be discussed. Emerging memory technologies will be analyzed, starting from the ones that are already present for niche applications, and which are getting new attention, thanks to recent technology breakthroughs. Maturity level, physical limitations and potential for scaling will be compared to existing memories. At the end the possible future composition of memory systems will be discussed.

  7. Low latency and persistent data storage

    DOEpatents

    Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

    2014-02-18

    Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

  8. Episode-Centered Guidelines for Teacher Belief Change toward Technology Integration

    ERIC Educational Resources Information Center

    Er, Erkan; Kim, ChanMin

    2017-01-01

    Teachers' episodic memories influence their beliefs. The investigation of episodic memories can help identify the teacher beliefs that limit technology-integration. We propose the Episode-Centered Belief Change (ECBC) model that utilizes teachers' episodic memories for changing beliefs impeding effective technology integration. We also propose…

  9. Low latency and persistent data storage

    DOEpatents

    Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

    2014-11-04

    Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

  10. Sensor technology more than a support.

    PubMed

    Olsson, Anna; Persson, Ann-Christine; Bartfai, Aniko; Boman, Inga-Lill

    2018-03-01

    This interview study is a part of a project that evaluated sensor technology as a support in everyday activities for patients with memory impairment. To explore patients with memory impairment and their partners' experiences of using sensor technology in their homes. Five patients with memory impairment after stroke and three partners were interviewed. Individual semi-structured interviews were analyzed with qualitative content analysis. Installing sensor technology with individually prerecorded voice reminders as memory support in the home had a broad impact on patients' and their families' lives. These effects were both positive and negative. The sensor technology not only supported activities but also influenced the patients by changing behavior, providing a sense of security, independence and increased self-confidence. For the partners, the sensor technology eased daily life, but also gave increased responsibility for maintenance. Technical problems led to frustration and stress for the patients. The results indicate that sensor technology has potential to increase opportunities for persons with memory impairment to perform and participate in activities and to unburden their partners. The results may promote an understanding of how sensor technology can be used to support persons with memory impairment in their homes.

  11. Review of radiation effects on ReRAM devices and technology

    NASA Astrophysics Data System (ADS)

    Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

    2017-08-01

    A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

  12. Review of optical memory technologies

    NASA Technical Reports Server (NTRS)

    Chen, D.

    1972-01-01

    Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.

  13. The future of memory

    NASA Astrophysics Data System (ADS)

    Marinella, M.

    In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

  14. Memory technology survey

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The current status of semiconductor, magnetic, and optical memory technologies is described. Projections based on these research activities planned for the shot term are presented. Conceptual designs of specific memory buffer pplications employing bipola, CMOS, GaAs, and Magnetic Bubble devices are discussed.

  15. Implementation of Ferroelectric Memories for Space Applications

    NASA Technical Reports Server (NTRS)

    Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

    2000-01-01

    Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

  16. Physical principles and current status of emerging non-volatile solid state memories

    NASA Astrophysics Data System (ADS)

    Wang, L.; Yang, C.-H.; Wen, J.

    2015-07-01

    Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

  17. Technology and Reflection: Mood and Memory Mechanisms for Well-Being.

    PubMed

    Konrad, Artie; Tucker, Simon; Crane, John; Whittaker, Steve

    We report a psychologically motivated intervention to explore Technology Mediated Reflection (TMR), the process of systematically reviewing rich digital records of past personal experiences. Although TMR benefits well-being, and is increasingly being deployed, we know little about how one's mood when using TMR influences these benefits. We use theories of memory and emotion-regulation to motivate hypotheses about the relationship between reflection, mood, and well-being when using technology. We test these hypotheses in a large-scale month long real world deployment using a web-based application, MoodAdaptor. MoodAdaptor prompted participants to reflect on positive or negative memories depending on current mood. We evaluated how mood and memory interact during written reflection and measured effects on well-being. We analyzed qualitative and quantitative data from 128 participants who generated 11157 mood evaluations, 5051 logfiles, 256 surveys, and 20 interviews. TMR regulated emotion; when participants reflected on memories with valences opposite to their current mood, their mood became more neutral. However this did not impact overall well-being. Our findings also clarify underlying TMR mechanisms. Moods and memories competed with each other; when positive moods prevailed over negative memories, people demonstrated classic mechanisms shown in prior work to influence well-being. When negative moods prevailed over positive memories, memories became negatively tainted. Our results have implications for new well-being interventions and technologies that capitalize on the interconnectedness of memory and emotion.

  18. Memories for life: a review of the science and technology

    PubMed Central

    O'Hara, Kieron; Morris, Richard; Shadbolt, Nigel; Hitch, Graham J; Hall, Wendy; Beagrie, Neil

    2006-01-01

    This paper discusses scientific, social and technological aspects of memory. Recent developments in our understanding of memory processes and mechanisms, and their digital implementation, have placed the encoding, storage, management and retrieval of information at the forefront of several fields of research. At the same time, the divisions between the biological, physical and the digital worlds seem to be dissolving. Hence, opportunities for interdisciplinary research into memory are being created, between the life sciences, social sciences and physical sciences. Such research may benefit from immediate application into information management technology as a testbed. The paper describes one initiative, memories for life, as a potential common problem space for the various interested disciplines. PMID:16849265

  19. A chiral-based magnetic memory device without a permanent magnet

    PubMed Central

    Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

    2013-01-01

    Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

  20. A chiral-based magnetic memory device without a permanent magnet.

    PubMed

    Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

    2013-01-01

    Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

  1. A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

    Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey the architectural approaches proposed for designing memory systems and, specifically, caches with these emerging memory technologies. To highlight theirmore » similarities and differences, we present a classification of these technologies and architectural approaches based on their key characteristics. We also briefly summarize the challenges in using these technologies for architecting caches. We believe that this survey will help the readers gain insights into the emerging memory device technologies, and their potential use in designing future computing systems.« less

  2. Memory engram storage and retrieval.

    PubMed

    Tonegawa, Susumu; Pignatelli, Michele; Roy, Dheeraj S; Ryan, Tomás J

    2015-12-01

    A great deal of experimental investment is directed towards questions regarding the mechanisms of memory storage. Such studies have traditionally been restricted to investigation of the anatomical structures, physiological processes, and molecular pathways necessary for the capacity of memory storage, and have avoided the question of how individual memories are stored in the brain. Memory engram technology allows the labeling and subsequent manipulation of components of specific memory engrams in particular brain regions, and it has been established that cell ensembles labeled by this method are both sufficient and necessary for memory recall. Recent research has employed this technology to probe fundamental questions of memory consolidation, differentiating between mechanisms of memory retrieval from the true neurobiology of memory storage. Copyright © 2015 The Authors. Published by Elsevier Ltd.. All rights reserved.

  3. Artificial cognitive memory—changing from density driven to functionality driven

    NASA Astrophysics Data System (ADS)

    Shi, L. P.; Yi, K. J.; Ramanathan, K.; Zhao, R.; Ning, N.; Ding, D.; Chong, T. C.

    2011-03-01

    Increasing density based on bit size reduction is currently a main driving force for the development of data storage technologies. However, it is expected that all of the current available storage technologies might approach their physical limits in around 15 to 20 years due to miniaturization. To further advance the storage technologies, it is required to explore a new development trend that is different from density driven. One possible direction is to derive insights from biological counterparts. Unlike physical memories that have a single function of data storage, human memory is versatile. It contributes to functions of data storage, information processing, and most importantly, cognitive functions such as adaptation, learning, perception, knowledge generation, etc. In this paper, a brief review of current data storage technologies are presented, followed by discussions of future storage technology development trend. We expect that the driving force will evolve from density to functionality, and new memory modules associated with additional functions other than only data storage will appear. As an initial step toward building a future generation memory technology, we propose Artificial Cognitive Memory (ACM), a memory based intelligent system. We also present the characteristics of ACM, new technologies that can be used to develop ACM components such as bioinspired element cells (silicon, memristor, phase change, etc.), and possible methodologies to construct a biologically inspired hierarchical system.

  4. The efficacy of cognitive prosthetic technology for people with memory impairments: a systematic review and meta-analysis.

    PubMed

    Jamieson, Matthew; Cullen, Breda; McGee-Lennon, Marilyn; Brewster, Stephen; Evans, Jonathan J

    2014-01-01

    Technology can compensate for memory impairment. The efficacy of assistive technology for people with memory difficulties and the methodology of selected studies are assessed. A systematic search was performed and all studies that investigated the impact of technology on memory performance for adults with impaired memory resulting from acquired brain injury (ABI) or a degenerative disease were included. Two 10-point scales were used to compare each study to an ideally reported single case experimental design (SCED) study (SCED scale; Tate et al., 2008 ) or randomised control group study (PEDro-P scale; Maher, Sherrington, Herbert, Moseley, & Elkins, 2003 ). Thirty-two SCED (mean = 5.9 on the SCED scale) and 11 group studies (mean = 4.45 on the PEDro-P scale) were found. Baseline and intervention performance for each participant in the SCED studies was re-calculated using non-overlap of all pairs (Parker & Vannest, 2009 ) giving a mean score of 0.85 on a 0 to 1 scale (17 studies, n = 36). A meta-analysis of the efficacy of technology vs. control in seven group studies gave a large effect size (d = 1.27) (n = 147). It was concluded that prosthetic technology can improve performance on everyday tasks requiring memory. There is a specific need for investigations of technology for people with degenerative diseases.

  5. Digital Reading: A Question of Prelectio?

    ERIC Educational Resources Information Center

    Fitzpatrick, Noel

    2013-01-01

    Digital reading as superficial reading is examined by demonstrating that technologies act as placeholders for different types of memory, artificial memory and true memory. This chapter argues that the affordances of digital technologies enable certain types of reading activity, digital reading, but hinders others, such as deep reading. In…

  6. Periodic Cellular Structure Technology for Shape Memory Alloys

    NASA Technical Reports Server (NTRS)

    Chen, Edward Y.

    2015-01-01

    Shape memory alloys are being considered for a wide variety of adaptive components for engine and airframe applications because they can undergo large amounts of strain and then revert to their original shape upon heating or unloading. Transition45 Technologies, Inc., has developed an innovative periodic cellular structure (PCS) technology for shape memory alloys that enables fabrication of complex bulk configurations, such as lattice block structures. These innovative structures are manufactured using an advanced reactive metal casting technology that offers a relatively low cost and established approach for constructing near-net shape aerospace components. Transition45 is continuing to characterize these structures to determine how best to design a PCS to better exploit the use of shape memory alloys in aerospace applications.

  7. Bernard Stiegler's Philosophy of Technology: Invention, Decision, and Education in Times of Digitization

    ERIC Educational Resources Information Center

    Kouppanou, Anna

    2015-01-01

    Bernard Stiegler's concept of individuation suggests that the human being is co-constituted with technology. Technology precedes the individual in the respect that the latter is thrown in a technological world that always already contains externally inscribed memories--what he calls tertiary memories--that selectively form the individual and the…

  8. A Mobile Technology Framework for the Dissemination of Cultural Memory

    ERIC Educational Resources Information Center

    Kammas, Stavros

    2009-01-01

    The current research proposes a mobile technology framework in cultural heritage setting for the dissemination of cultural memory among its visitors. The framework studies the complex concept of human memory and attempts to adopt the human information perception, as a learning process, on a mobile framework that will allow their users to interact…

  9. Advanced Mail Systems Scanner Technology. Executive Summary and Appendixes A-E.

    DTIC Science & Technology

    1980-10-01

    data base. 6. Perform color acquisition studies. 7. Investigate address and bar code reading. MASS MEMORY TECHNOLOGY 1. Collect performance data on...area of the 1728-by-2200 ICAS image memory and to transmit the data to any of the three color memories of the Comtal. Function table information can...for printing color images. The software allows the transmission of data from the ICAS frame-store memory via the MCU to the Dicomed. Software test

  10. BLACKCOMB2: Hardware-software co-design for non-volatile memory in exascale systems

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mudge, Trevor

    This work was part of a larger project, Blackcomb2, centered at Oak Ridge National Labs (Jeff Vetter PI) to investigate the opportunities for replacing or supplementing DRAM main memory with nonvolatile memory (NVmemory) in Exascale memory systems. The goal was to reduce the energy consumed by in future supercomputer memory systems and to improve their resiliency. Building on the accomplishments of the original Blackcomb Project, funded in 2010, the goal for Blackcomb2 was to identify, evaluate, and optimize the most promising emerging memory technologies, architecture hardware and software technologies, which are essential to provide the necessary memory capacity, performance, resilience,more » and energy efficiency in Exascale systems. Capacity and energy are the key drivers.« less

  11. Radiation and Reliability Concerns for Modern Nonvolatile Memory Technology

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Friendlich, Mark R.; Kim, Hak S.; Berg, Melanie D.; LaBel, Kenneth A.; Buchner, S. P.; McMorrow, D.; Mavis, D. G.; Eaton, P. H.; Castillo, J.

    2011-01-01

    Commercial nonvolatile memory technology is attractive for space applications, but radiation issues are serious concerns. In addition, we discuss combined radiation/reliability concerns which are only beginning to be addressed.

  12. Is the Use of Information and Communication Technology Related to Performance in Working Memory Tasks? Evidence from Seventh-Grade Students

    ERIC Educational Resources Information Center

    Garcia, Lucy; Nussbaum, Miguel; Preiss, David D.

    2011-01-01

    The main purpose of this study was to assess whether seventh-grade students use of information and communication technology (ICT) was related to performance on working memory tasks. In addition, the study tested whether the relationship between ICT use and performance on working memory tasks interacted with seventh-grade students' socioeconomic…

  13. Incorporation of Fiber Bragg Sensors for Shape Memory Polyurethanes Characterization.

    PubMed

    Alberto, Nélia; Fonseca, Maria A; Neto, Victor; Nogueira, Rogério; Oliveira, Mónica; Moreira, Rui

    2017-11-11

    Shape memory polyurethanes (SMPUs) are thermally activated shape memory materials, which can be used as actuators or sensors in applications including aerospace, aeronautics, automobiles or the biomedical industry. The accurate characterization of the memory effect of these materials is therefore mandatory for the technology's success. The shape memory characterization is normally accomplished using mechanical testing coupled with a heat source, where a detailed knowledge of the heat cycle and its influence on the material properties is paramount but difficult to monitor. In this work, fiber Bragg grating (FBG) sensors were embedded into SMPU samples aiming to study and characterize its shape memory effect. The samples were obtained by injection molding, and the entire processing cycle was successfully monitored, providing a process global quality signature. Moreover, the integrity and functionality of the FBG sensors were maintained during and after the embedding process, demonstrating the feasibility of the technology chosen for the purpose envisaged. The results of the shape memory effect characterization demonstrate a good correlation between the reflected FBG peak with the temperature and induced strain, proving that this technology is suitable for this particular application.

  14. SenseCam: A new tool for memory rehabilitation?

    PubMed

    Dubourg, L; Silva, A R; Fitamen, C; Moulin, C J A; Souchay, C

    2016-12-01

    The emergence of life-logging technologies has led neuropsychologist to focus on understanding how this new technology could help patients with memory disorders. Despite the growing number of studies using life-logging technologies, a theoretical framework supporting its effectiveness is lacking. This review focuses on the use of life-logging in the context of memory rehabilitation, particularly the use of SenseCam, a wearable camera allowing passive image capture. In our opinion, reviewing SenseCam images can be effective for memory rehabilitation only if it provides more than an assessment of prior occurrence in ways that reinstates previous thoughts, feelings and sensory information, thus stimulating recollection. Considering the fact that, in memory impairment, self-initiated processes are impaired, we propose that the environmental support hypothesis can explain the value of SenseCam for memory retrieval. Twenty-five research studies were selected for this review and despite the general acceptance of the value of SenseCam as a memory technique, only a small number of studies focused on recollection. We discuss the usability of this tool to improve episodic memory and in particular, recollection. Copyright © 2016 Elsevier Masson SAS. All rights reserved.

  15. A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications

    NASA Astrophysics Data System (ADS)

    Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng

    2018-05-01

    As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.

  16. Nonvolatile Memory Technology for Space Applications

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

    2010-01-01

    This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

  17. Cost-effective, transfer-free, flexible resistive random access memory using laser-scribed reduced graphene oxide patterning technology.

    PubMed

    Tian, He; Chen, Hong-Yu; Ren, Tian-Ling; Li, Cheng; Xue, Qing-Tang; Mohammad, Mohammad Ali; Wu, Can; Yang, Yi; Wong, H-S Philip

    2014-06-11

    Laser scribing is an attractive reduced graphene oxide (rGO) growth and patterning technology because the process is low-cost, time-efficient, transfer-free, and flexible. Various laser-scribed rGO (LSG) components such as capacitors, gas sensors, and strain sensors have been demonstrated. However, obstacles remain toward practical application of the technology where all the components of a system are fabricated using laser scribing. Memory components, if developed, will substantially broaden the application space of low-cost, flexible electronic systems. For the first time, a low-cost approach to fabricate resistive random access memory (ReRAM) using laser-scribed rGO as the bottom electrode is experimentally demonstrated. The one-step laser scribing technology allows transfer-free rGO synthesis directly on flexible substrates or non-flat substrates. Using this time-efficient laser-scribing technology, the patterning of a memory-array area up to 100 cm(2) can be completed in 25 min. Without requiring the photoresist coating for lithography, the surface of patterned rGO remains as clean as its pristine state. Ag/HfOx/LSG ReRAM using laser-scribing technology is fabricated in this work. Comprehensive electrical characteristics are presented including forming-free behavior, stable switching, reasonable reliability performance and potential for 2-bit storage per memory cell. The results suggest that laser-scribing technology can potentially produce more cost-effective and time-effective rGO-based circuits and systems for practical applications.

  18. Unconditional polarization qubit quantum memory at room temperature

    NASA Astrophysics Data System (ADS)

    Namazi, Mehdi; Kupchak, Connor; Jordaan, Bertus; Shahrokhshahi, Reihaneh; Figueroa, Eden

    2016-05-01

    The creation of global quantum key distribution and quantum communication networks requires multiple operational quantum memories. Achieving a considerable reduction in experimental and cost overhead in these implementations is thus a major challenge. Here we present a polarization qubit quantum memory fully-operational at 330K, an unheard frontier in the development of useful qubit quantum technology. This result is achieved through extensive study of how optical response of cold atomic medium is transformed by the motion of atoms at room temperature leading to an optimal characterization of room temperature quantum light-matter interfaces. Our quantum memory shows an average fidelity of 86.6 +/- 0.6% for optical pulses containing on average 1 photon per pulse, thereby defeating any classical strategy exploiting the non-unitary character of the memory efficiency. Our system significantly decreases the technological overhead required to achieve quantum memory operation and will serve as a building block for scalable and technologically simpler many-memory quantum machines. The work was supported by the US-Navy Office of Naval Research, Grant Number N00141410801 and the Simons Foundation, Grant Number SBF241180. B. J. acknowledges financial assistance of the National Research Foundation (NRF) of South Africa.

  19. Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Cohn, Lewis M.

    2008-01-01

    At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

  20. The 10 to the 8th power bit solid state spacecraft data recorder. [utilizing bubble domain memory technology

    NASA Technical Reports Server (NTRS)

    Murray, G. W.; Bohning, O. D.; Kinoshita, R. Y.; Becker, F. J.

    1979-01-01

    The results are summarized of a program to demonstrate the feasibility of Bubble Domain Memory Technology as a mass memory medium for spacecraft applications. The design, fabrication and test of a partially populated 10 to the 8th power Bit Data Recorder using 100 Kbit serial bubble memory chips is described. Design tradeoffs, design approach and performance are discussed. This effort resulted in a 10 to the 8th power bit recorder with a volume of 858.6 cu in and a weight of 47.2 pounds. The recorder is plug reconfigurable, having the capability of operating as one, two or four independent serial channel recorders or as a single sixteen bit byte parallel input recorder. Data rates up to 1.2 Mb/s in a serial mode and 2.4 Mb/s in a parallel mode may be supported. Fabrication and test of the recorder demonstrated the basic feasibility of Bubble Domain Memory technology for such applications. Test results indicate the need for improvement in memory element operating temperature range and detector performance.

  1. Associative Memories for Supercomputers

    DTIC Science & Technology

    1992-12-01

    the Si/PLZT technology. Finally, the associative memory system design is presented. 14. SUBJECT TERMS IS NUMBER OF PAGES 60 Memory, Associative Memory...Hybrid lens design ...................................................................... 3 3. ASSOCIATIVE MEMORY STUDY...of California, san Diego 1. OBJECTIVES Our objective during the funding period, July 14 1989 to January 13 1991, was to design and study the

  2. Quantum memories: emerging applications and recent advances

    NASA Astrophysics Data System (ADS)

    Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.

    2016-11-01

    Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.

  3. Quantum memories: emerging applications and recent advances.

    PubMed

    Heshami, Khabat; England, Duncan G; Humphreys, Peter C; Bustard, Philip J; Acosta, Victor M; Nunn, Joshua; Sussman, Benjamin J

    2016-11-12

    Quantum light-matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories.

  4. Quantum memories: emerging applications and recent advances

    PubMed Central

    Heshami, Khabat; England, Duncan G.; Humphreys, Peter C.; Bustard, Philip J.; Acosta, Victor M.; Nunn, Joshua; Sussman, Benjamin J.

    2016-01-01

    Quantum light–matter interfaces are at the heart of photonic quantum technologies. Quantum memories for photons, where non-classical states of photons are mapped onto stationary matter states and preserved for subsequent retrieval, are technical realizations enabled by exquisite control over interactions between light and matter. The ability of quantum memories to synchronize probabilistic events makes them a key component in quantum repeaters and quantum computation based on linear optics. This critical feature has motivated many groups to dedicate theoretical and experimental research to develop quantum memory devices. In recent years, exciting new applications, and more advanced developments of quantum memories, have proliferated. In this review, we outline some of the emerging applications of quantum memories in optical signal processing, quantum computation and non-linear optics. We review recent experimental and theoretical developments, and their impacts on more advanced photonic quantum technologies based on quantum memories. PMID:27695198

  5. Radiation Test Challenges for Scaled Commerical Memories

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

    2007-01-01

    As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

  6. A Content-Addressable Memory structure using quantum cells in nanotechnology with energy dissipation analysis

    NASA Astrophysics Data System (ADS)

    Sadoghifar, Ali; Heikalabad, Saeed Rasouli

    2018-05-01

    Quantum-dot cellular automata is one of the recent new technologies at the nanoscale that can be a suitable replacement for CMOS technology. The circuits constructed in QCA technology have desirable features such as low power consumption, high speed and small size. These features can be more distinct in memory structures. In this paper, we design a new structure for content addressable memory cell in QCA. For this purpose, first, a unique gate is introduced for mask operation in QCA and then this gate is used to improve the performance of CAM. These structures are evaluated with QCADesigner simulator.

  7. Research on fast Fourier transforms algorithm of huge remote sensing image technology with GPU and partitioning technology.

    PubMed

    Yang, Xue; Li, Xue-You; Li, Jia-Guo; Ma, Jun; Zhang, Li; Yang, Jan; Du, Quan-Ye

    2014-02-01

    Fast Fourier transforms (FFT) is a basic approach to remote sensing image processing. With the improvement of capacity of remote sensing image capture with the features of hyperspectrum, high spatial resolution and high temporal resolution, how to use FFT technology to efficiently process huge remote sensing image becomes the critical step and research hot spot of current image processing technology. FFT algorithm, one of the basic algorithms of image processing, can be used for stripe noise removal, image compression, image registration, etc. in processing remote sensing image. CUFFT function library is the FFT algorithm library based on CPU and FFTW. FFTW is a FFT algorithm developed based on CPU in PC platform, and is currently the fastest CPU based FFT algorithm function library. However there is a common problem that once the available memory or memory is less than the capacity of image, there will be out of memory or memory overflow when using the above two methods to realize image FFT arithmetic. To address this problem, a CPU and partitioning technology based Huge Remote Fast Fourier Transform (HRFFT) algorithm is proposed in this paper. By improving the FFT algorithm in CUFFT function library, the problem of out of memory and memory overflow is solved. Moreover, this method is proved rational by experiment combined with the CCD image of HJ-1A satellite. When applied to practical image processing, it improves effect of the image processing, speeds up the processing, which saves the time of computation and achieves sound result.

  8. Principles and Concepts for Information and Communication Technology Design.

    ERIC Educational Resources Information Center

    Adams, Ray; Langdon, Patrick

    2003-01-01

    This article presents a theory for evaluating information and communication technology design for individuals with disabilities. Simplex 1 evaluates designs in five zones: sensory and input zone; output zone; abstract working memory; long-term memory; and central executive functioning. Simplex 2 evaluates feedback, emotional responses, cognitive…

  9. The Use of Digital Narratives to Enhance Counseling and Psychotherapy

    ERIC Educational Resources Information Center

    Pillay, Yegan

    2009-01-01

    Technological advances have impinged on every aspect of contemporary phenomenological experiences, including counseling and psychotherapy. The author explores the intersection of narrative therapy, specifically the traditional memory book, with the advances in information technology in the formulation of the digital memory book. The digital memory…

  10. The Use of Memories in Understanding Interactive Science and Technology Exhibits

    ERIC Educational Resources Information Center

    Afonso, Ana S.; Gilbert, John K.

    2006-01-01

    Framed by a "personal constructivist" perspective, this study analyses visitors' use of spontaneous memories in understanding different types of interactive exhibits, the nature and sources of the retrieved memories, and the way that visitors relate an exhibit analogically to memories of previous exhibits. One hundred and thirteen…

  11. Breaking through barriers: using technology to address executive function weaknesses and improve student achievement.

    PubMed

    Schwartz, David M

    2014-01-01

    Assistive technologies provide significant capabilities for improving student achievement. Improved accessibility, cost, and diversity of applications make integration of technology a powerful tool to compensate for executive function weaknesses and deficits and their impact on student performance, learning, and achievement. These tools can be used to compensate for decreased working memory, poor time management, poor planning and organization, poor initiation, and decreased memory. Assistive technology provides mechanisms to assist students with diverse strengths and weaknesses in mastering core curricular concepts.

  12. Science and Technology Text Mining: Text Mining of the Journal Cortex

    DTIC Science & Technology

    2004-01-01

    Amnesia Retrograde Amnesia GENERAL Semantic Memory Episodic Memory Working Memory TEST Serial Position Curve...in Cortex can be reasonably divided into four categories (papers in each category in parenthesis): Semantic Memory (151); Handedness (145); Amnesia ... Semantic Memory (151) is divided into Verbal/ Numerical (76) and Visual/ Spatial (75). Amnesia (119) is divided into Amnesia Symptoms (50) and

  13. On the research of time past: the hunt for the substrate of memory

    PubMed Central

    Queenan, Bridget N.; Ryan, Tomás J.; Gazzaniga, Michael; Gallistel, Charles R.

    2017-01-01

    The search for memory is one of the oldest quests in written human history. For at least two millennia, we have tried to understand how we learn and remember. We have gradually converged on the brain and looked inside it to find the basis of knowledge, the trace of memory. The search for memory has been conducted on multiple levels, from the organ to the cell to the synapse, and has been distributed across disciplines with less chronological or intellectual overlap than one might hope. Frequently, the study of the mind and its memories has been severely restricted by technological or philosophical limitations. However, in the last few years, certain technologies have emerged, offering new routes of inquiry into the basis of memory. The 2016 Kavli Futures Symposium was devoted to the past and future of memory studies. At the workshop, participants evaluated the logic and data underlying the existing and emerging theories of memory. In this paper, written in the spirit of the workshop, we briefly review the history of the hunt for memory, summarizing some of the key debates at each level of spatial resolution. We then discuss the exciting new opportunities to unravel the mystery of memory. PMID:28548457

  14. A room-temperature non-volatile CNT-based molecular memory cell

    NASA Astrophysics Data System (ADS)

    Ye, Senbin; Jing, Qingshen; Han, Ray P. S.

    2013-04-01

    Recent experiments with a carbon nanotube (CNT) system confirmed that the innertube can oscillate back-and-forth even under a room-temperature excitation. This demonstration of relative motion suggests that it is now feasible to build a CNT-based molecular memory cell (MC), and the key to bring the concept to reality is the precision control of the moving tube for sustained and reliable read/write (RW) operations. Here, we show that by using a 2-section outertube design, we are able to suitably recalibrate the system energetics and obtain the designed performance characteristics of a MC. Further, the resulting energy modification enables the MC to operate as a non-volatile memory element at room temperatures. Our paper explores a fundamental understanding of a MC and its response at the molecular level to roadmap a novel approach in memory technologies that can be harnessed to overcome the miniaturization limit and memory volatility in memory technologies.

  15. Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

    NASA Astrophysics Data System (ADS)

    Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

    2017-12-01

    Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

  16. Camera memory study for large space telescope. [charge coupled devices

    NASA Technical Reports Server (NTRS)

    Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

    1975-01-01

    Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

  17. The ethics of molecular memory modification.

    PubMed

    Hui, Katrina; Fisher, Carl E

    2015-07-01

    Novel molecular interventions have recently shown the potential to erase, enhance and alter specific long-term memories. Unique features of this form of memory modification call for a close examination of its possible applications. While there have been discussions of the ethics of memory modification in the literature, molecular memory modification (MMM) can provide special insights. Previously raised ethical concerns regarding memory enhancement, such as safety issues, the 'duty to remember', selfhood and personal identity, require re-evaluation in light of MMM. As a technology that exploits the brain's updating processes, MMM helps correct the common misconception that memory is a static entity by demonstrating how memory is plastic and subject to revision even in the absence of external manipulation. Furthermore, while putatively safer than other speculative technologies because of its high specificity, MMM raises notable safety issues, including potential insidious effects on the agent's emotions and personal identity. Nonetheless, MMM possesses characteristics of a more permissible form of modification, not only because it is theoretically safer, but because its unique mechanism of action requires a heightened level of cooperation from the agent. Discussions of memory modification must consider the specific mechanisms of action, which can alter the weight and relevance of various ethical concerns. MMM also highlights the need for conceptual accuracy regarding the term 'enhancement'; this umbrella term will have to be differentiated as new technologies are applied to a widening array of purposes. Published by the BMJ Publishing Group Limited. For permission to use (where not already granted under a licence) please go to http://group.bmj.com/group/rights-licensing/permissions.

  18. Self-Repairing Fatigue Damage in Metallic Structures for Aerospace Vehicles Using Shape Memory Alloy Self-healing (SMASH) Technology

    NASA Technical Reports Server (NTRS)

    Wright, M. Clara; Manuel, Michele; Wallace, Terryl; Newman, Andy; Brinson, Kate

    2015-01-01

    This DAA is for the Phase II webinar presentation of the ARMD-funded SMASH technology. A self-repairing aluminum-based composite system has been developed using liquid-assisted healing theory in conjunction with the shape memory effect of wire reinforcements. The metal matrix composite was thermodynamically designed to have a matrix with a relatively even dispersion of low-melting phase, allowing for repair of cracks at a pre-determined temperature. Shape memory alloy wire reinforcements were used within the composite to provide crack closure. Investigators focused the research on fatigue cracks propagating through the matrix in order to optimize and computer model the SMASH technology for aeronautical applications.

  19. Preliminary design for a standard 10 sup 7 bit Solid State Memory (SSM)

    NASA Technical Reports Server (NTRS)

    Hayes, P. J.; Howle, W. M., Jr.; Stermer, R. L., Jr.

    1978-01-01

    A modular concept with three separate modules roughly separating bubble domain technology, control logic technology, and power supply technology was employed. These modules were respectively the standard memory module (SMM), the data control unit (DCU), and power supply module (PSM). The storage medium was provided by bubble domain chips organized into memory cells. These cells and the circuitry for parallel data access to the cells make up the SMM. The DCU provides a flexible serial data interface to the SMM. The PSM provides adequate power to enable one DCU and one SMM to operate simultaneously at the maximum data rate. The SSM was designed to handle asynchronous data rates from dc to 1.024 Mbs with a bit error rate less than 1 error in 10 to the eight power bits. Two versions of the SSM, a serial data memory and a dual parallel data memory were specified using the standard modules. The SSM specification includes requirements for radiation hardness, temperature and mechanical environments, dc magnetic field emission and susceptibility, electromagnetic compatibility, and reliability.

  20. Nonvolatile memory chips: critical technology for high-performance recce systems

    NASA Astrophysics Data System (ADS)

    Kaufman, Bruce

    2000-11-01

    Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

  1. A Resource Guide to Assistive Technology for Memory and Organization. Second Edition.

    ERIC Educational Resources Information Center

    McHale, Kathy; McHale, Sara, Ed.

    The second edition of this guide to assistive technology for memory and organization is intended for professionals working with people who have learning disabilities, attention deficit disorders, neurological conditions, and psychological problems. It contains expanded and new appendices as well as new information about free Internet resources,…

  2. Comparing memory-efficient genome assemblers on stand-alone and cloud infrastructures.

    PubMed

    Kleftogiannis, Dimitrios; Kalnis, Panos; Bajic, Vladimir B

    2013-01-01

    A fundamental problem in bioinformatics is genome assembly. Next-generation sequencing (NGS) technologies produce large volumes of fragmented genome reads, which require large amounts of memory to assemble the complete genome efficiently. With recent improvements in DNA sequencing technologies, it is expected that the memory footprint required for the assembly process will increase dramatically and will emerge as a limiting factor in processing widely available NGS-generated reads. In this report, we compare current memory-efficient techniques for genome assembly with respect to quality, memory consumption and execution time. Our experiments prove that it is possible to generate draft assemblies of reasonable quality on conventional multi-purpose computers with very limited available memory by choosing suitable assembly methods. Our study reveals the minimum memory requirements for different assembly programs even when data volume exceeds memory capacity by orders of magnitude. By combining existing methodologies, we propose two general assembly strategies that can improve short-read assembly approaches and result in reduction of the memory footprint. Finally, we discuss the possibility of utilizing cloud infrastructures for genome assembly and we comment on some findings regarding suitable computational resources for assembly.

  3. Investigation of field induced trapping on floating gates

    NASA Technical Reports Server (NTRS)

    Gosney, W. M.

    1975-01-01

    The development of a technology for building electrically alterable read only memories (EAROMs) or reprogrammable read only memories (RPROMs) using a single level metal gate p channel MOS process with all conventional processing steps is outlined. Nonvolatile storage of data is achieved by the use of charged floating gate electrodes. The floating gates are charged by avalanche injection of hot electrodes through gate oxide, and discharged by avalanche injection of hot holes through gate oxide. Three extra diffusion and patterning steps are all that is required to convert a standard p channel MOS process into a nonvolatile memory process. For identification, this nonvolatile memory technology was given the descriptive acronym DIFMOS which stands for Dual Injector, Floating gate MOS.

  4. On the research of time past: the hunt for the substrate of memory.

    PubMed

    Queenan, Bridget N; Ryan, Tomás J; Gazzaniga, Michael S; Gallistel, Charles R

    2017-05-01

    The search for memory is one of the oldest quests in written human history. For at least two millennia, we have tried to understand how we learn and remember. We have gradually converged on the brain and looked inside it to find the basis of knowledge, the trace of memory. The search for memory has been conducted on multiple levels, from the organ to the cell to the synapse, and has been distributed across disciplines with less chronological or intellectual overlap than one might hope. Frequently, the study of the mind and its memories has been severely restricted by technological or philosophical limitations. However, in the last few years, certain technologies have emerged, offering new routes of inquiry into the basis of memory. The 2016 Kavli Futures Symposium was devoted to the past and future of memory studies. At the workshop, participants evaluated the logic and data underlying the existing and emerging theories of memory. In this paper, written in the spirit of the workshop, we briefly review the history of the hunt for memory, summarizing some of the key debates at each level of spatial resolution. We then discuss the exciting new opportunities to unravel the mystery of memory. © 2017 New York Academy of Sciences.

  5. Technology To Enhance Special Education: Remediation of Problems in Logical Thinking and Memory. Final Report.

    ERIC Educational Resources Information Center

    Cavalier, Al; And Others

    A federally sponsored project was designed to incorporate a memory-assessment task and a memory strategy into a computer-based instructional system for assessing and assisting in remediating basic memory-processing and metacognitive deficiencies. The project resulted in an instructional system for school-aged children and youth with mild to…

  6. Integrated Vertical Bloch Line (VBL) memory

    NASA Technical Reports Server (NTRS)

    Katti, R. R.; Wu, J. C.; Stadler, H. L.

    1991-01-01

    Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.

  7. Memory Metals (Marchon Eyewear)

    NASA Technical Reports Server (NTRS)

    1991-01-01

    Another commercial application of memory metal technology is found in a "smart" eyeglass frame that remembers its shape and its wearer's fit. A patented "memory encoding process" makes this possible. Heat is not required to return the glasses to shape. A large commercial market is anticipated.

  8. Data Movement Dominates: Final Report

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jacob, Bruce L.

    Over the past three years in this project, what we have observed is that the primary reason for data movement in large-scale systems is that the per-node capacity is not large enough—i.e., one of the solutions to the data-movement problem (certainly not the only solution that is required, but a significant one nonetheless) is to increase per-node capacity so that inter-node traffic is reduced. This unfortunately is not as simple as it sounds. Today’s main memory systems for datacenters, enterprise computing systems, and supercomputers, fail to provide high per-socket capacity [Dirik & Jacob 2009; Cooper-Balis et al. 2012], except atmore » extremely high price points (factors of 10–100x the cost/bit of consumer main-memory systems) [Stokes 2008]. The reason is that our choice of technology for today’s main memory systems—i.e., DRAM, which we have used as a main-memory technology since the 1970s [Jacob et al. 2007]—can no longer keep up with our needs for density and price per bit. Main memory systems have always been built from the cheapest, densest, lowest-power memory technology available, and DRAM is no longer the cheapest, the densest, nor the lowest-power storage technology out there. It is now time for DRAM to go the way that SRAM went: move out of the way for a cheaper, slower, denser storage technology, and become a cache instead. This inflection point has happened before, in the context of SRAM yielding to DRAM. There was once a time that SRAM was the storage technology of choice for all main memories [Tomasulo 1967; Thornton 1970; Kidder 1981]. However, once DRAM hit volume production in the 1970s and 80s, it supplanted SRAM as a main memory technology because it was cheaper, and it was denser. It also happened to be lower power, but that was not the primary consideration of the day. At the time, it was recognized that DRAM was much slower than SRAM, but it was only at the supercomputer level (For instance the Cray X-MP in the 1980s and its follow-on, the Cray Y-MP, in the 1990s) that could one afford to build ever- larger main memories out of SRAM—the reasoning for moving to DRAM was that an appropriately designed memory hierarchy, built of DRAM as main memory and SRAM as a cache, would approach the performance of SRAM, at the price-per-bit of DRAM [Mashey 1999]. Today it is quite clear that, were one to build an entire multi-gigabyte main memory out of SRAM instead of DRAM, one could improve the performance of almost any computer system by up to an order of magnitude—but this option is not even considered, because to build that system would be prohibitively expensive. It is now time to revisit the same design choice in the context of modern technologies and modern systems. For reasons both technical and economic, we can no longer afford to build ever-larger main memory systems out of DRAM. Flash memory, on the other hand, is significantly cheaper and denser than DRAM and therefore should take its place. While it is true that flash is significantly slower than DRAM, one can afford to build much larger main memories out of flash than out of DRAM, and we show that an appropriately designed memory hierarchy, built of flash as main memory and DRAM as a cache, will approach the performance of DRAM, at the price-per-bit of flash. In our studies as part of this project, we have investigated Non-Volatile Main Memory (NVMM), a new main-memory architecture for large-scale computing systems, one that is specifically designed to address the weaknesses described previously. In particular, it provides the following features: non-volatility: The bulk of the storage is comprised of NAND flash, and in this organization DRAM is used only as a cache, not as main memory. Furthermore, the flash is journaled, which means that operations such as checkpoint/restore are already built into the system. 1+ terabytes of storage per socket: SSDs and DRAM DIMMs have roughly the same form factor (several square inches of PCB surface area), and terabyte SSDs are now commonplace. performance approaching that of DRAM: DRAM is used as a cache to the flash system. price-per-bit approaching that of NAND: Flash is currently well under $0.50 per gigabyte; DDR3 SDRAM is currently just over $10 per gigabyte [Newegg 2014]. Even today, one can build an easily affordable main memory system with a terabyte or more of NAND storage per CPU socket (which would be extremely expensive were one to use DRAM), and our cycle- accurate, full-system experiments show that this can be done at a performance point that lies within a factor of two of DRAM.« less

  9. DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology. [Dual Injector Floating-gate MOS

    NASA Technical Reports Server (NTRS)

    Gosney, W. M.

    1977-01-01

    Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

  10. Incorporation of Fiber Bragg Sensors for Shape Memory Polyurethanes Characterization

    PubMed Central

    Nogueira, Rogério; Moreira, Rui

    2017-01-01

    Shape memory polyurethanes (SMPUs) are thermally activated shape memory materials, which can be used as actuators or sensors in applications including aerospace, aeronautics, automobiles or the biomedical industry. The accurate characterization of the memory effect of these materials is therefore mandatory for the technology’s success. The shape memory characterization is normally accomplished using mechanical testing coupled with a heat source, where a detailed knowledge of the heat cycle and its influence on the material properties is paramount but difficult to monitor. In this work, fiber Bragg grating (FBG) sensors were embedded into SMPU samples aiming to study and characterize its shape memory effect. The samples were obtained by injection molding, and the entire processing cycle was successfully monitored, providing a process global quality signature. Moreover, the integrity and functionality of the FBG sensors were maintained during and after the embedding process, demonstrating the feasibility of the technology chosen for the purpose envisaged. The results of the shape memory effect characterization demonstrate a good correlation between the reflected FBG peak with the temperature and induced strain, proving that this technology is suitable for this particular application. PMID:29137136

  11. Episodic Memory and Beyond: The Hippocampus and Neocortex in Transformation

    PubMed Central

    Moscovitch, Morris; Cabeza, Roberto; Winocur, Gordon; Nadel, Lynn

    2016-01-01

    The last decade has seen dramatic technological and conceptual changes in research on episodic memory and the brain. New technologies, and increased use of more naturalistic observations, have enabled investigators to delve deeply into the structures that mediate episodic memory, particularly the hippocampus, and to track functional and structural interactions among brain regions that support it. Conceptually, episodic memory is increasingly being viewed as subject to lifelong transformations that are reflected in the neural substrates that mediate it. In keeping with this dynamic perspective, research on episodic memory (and the hippocampus) has infiltrated domains, from perception to language and from empathy to problem solving, that were once considered outside its boundaries. Using the component process model as a framework, and focusing on the hippocampus, its subfields, and specialization along its longitudinal axis, along with its interaction with other brain regions, we consider these new developments and their implications for the organization of episodic memory and its contribution to functions in other domains. PMID:26726963

  12. Episodic Memory and Beyond: The Hippocampus and Neocortex in Transformation.

    PubMed

    Moscovitch, Morris; Cabeza, Roberto; Winocur, Gordon; Nadel, Lynn

    2016-01-01

    The last decade has seen dramatic technological and conceptual changes in research on episodic memory and the brain. New technologies, and increased use of more naturalistic observations, have enabled investigators to delve deeply into the structures that mediate episodic memory, particularly the hippocampus, and to track functional and structural interactions among brain regions that support it. Conceptually, episodic memory is increasingly being viewed as subject to lifelong transformations that are reflected in the neural substrates that mediate it. In keeping with this dynamic perspective, research on episodic memory (and the hippocampus) has infiltrated domains, from perception to language and from empathy to problem solving, that were once considered outside its boundaries. Using the component process model as a framework, and focusing on the hippocampus, its subfields, and specialization along its longitudinal axis, along with its interaction with other brain regions, we consider these new developments and their implications for the organization of episodic memory and its contribution to functions in other domains.

  13. Memory Overview - Technologies and Needs

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.

    2010-01-01

    As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this talk, we will discuss the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches. We will briefly describe current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

  14. NRAM: a disruptive carbon-nanotube resistance-change memory.

    PubMed

    Gilmer, D C; Rueckes, T; Cleveland, L

    2018-04-03

    Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

  15. NRAM: a disruptive carbon-nanotube resistance-change memory

    NASA Astrophysics Data System (ADS)

    Gilmer, D. C.; Rueckes, T.; Cleveland, L.

    2018-04-01

    Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

  16. The quintuple-shape memory effect in electrospun nanofiber membranes

    NASA Astrophysics Data System (ADS)

    Zhang, Fenghua; Zhang, Zhichun; Liu, Yanju; Lu, Haibao; Leng, Jinsong

    2013-08-01

    Shape memory fibrous membranes (SMFMs) are an emerging class of active polymers, which are capable of switching from a temporary shape to their permanent shape upon appropriate stimulation. Quintuple-shape memory membranes based on the thermoplastic polymer Nafion, with a stable fibrous structure, are achieved via electrospinning technology, and possess a broad transition temperature. The recovery of multiple temporary shapes of electrospun membranes can be triggered by heat in a single triple-, quadruple-, quintuple-shape memory cycle, respectively. The fiber morphology and nanometer size provide unprecedented design flexibility for the adjustable morphing effect. SMFMs enable complex deformations at need, having a wide potential application field including smart textiles, artificial intelligence robots, bio-medical engineering, aerospace technologies, etc in the future.

  17. Overview of Probe-based Storage Technologies

    NASA Astrophysics Data System (ADS)

    Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

    2016-07-01

    The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

  18. Overview of Probe-based Storage Technologies.

    PubMed

    Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

    2016-12-01

    The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

  19. Technology Leadership and Supervision: An Analysis Based on Turkish Computer Teachers' Professional Memories

    ERIC Educational Resources Information Center

    Deryakulu, Deniz; Olkun, Sinan

    2009-01-01

    This study examined Turkish computer teachers' professional memories telling of their experiences with school administrators and supervisors. Seventy-four computer teachers participated in the study. Content analysis of the memories revealed that the most frequently mentioned themes concerning school administrators were "unsupportive…

  20. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2010

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2010-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) and multi-level cell (MLC) NAND flash memories manufactured by Micron Technology.

  1. Design, processing, and testing of lsi arrays for space station

    NASA Technical Reports Server (NTRS)

    Lile, W. R.; Hollingsworth, R. J.

    1972-01-01

    The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

  2. NASA Chief Technologist Douglas Terrier Moderates Panel During the AAS 55th Robert H. Goddard Memorial Symposium

    NASA Image and Video Library

    2017-03-08

    NASA Chief Technologist Douglas Terrier moderated the discussion “NASA Leadership in the Future of Science and Technology" during the AAS 55th Robert H. Goddard Memorial Symposium on March 8, 2017. Terrier was joined by Associate Administrator for Space Technology Steve Jurczyk, Chief Scientist Gale Allen and Associate Administrator for Science Thomas Zurbuchen.

  3. NASA Chief Technologist Douglas Terrier Moderates Discussion During the AAS 55th Robert H. Goddard Memorial Symposium

    NASA Image and Video Library

    2017-03-08

    NASA Chief Technologist Douglas Terrier moderated the discussion “NASA Leadership in the Future of Science and Technology" during the AAS 55th Robert H. Goddard Memorial Symposium on March 8, 2017. Terrier was joined by Associate Administrator for Space Technology Steve Jurczyk, Chief Scientist Gale Allen and Associate Administrator for Science Thomas Zurbuchen.

  4. Organisational Structure and Information Technology (IT): Exploring the Implications of IT for Future Military Structures

    DTIC Science & Technology

    2006-07-01

    4 Abbreviations AI Artificial Intelligence AM Artificial Memory CAD Computer Aided...memory (AM), artificial intelligence (AI), and embedded knowledge systems it is possible to expand the “effective span of competence” of...Technology J Joint J2 Joint Intelligence J3 Joint Operations NATO North Atlantic Treaty Organisation NCW Network Centric Warfare NHS National Health

  5. Marketplace of Memory: What the Brain Fitness Technology Industry Says about Us and How We Can Do Better

    ERIC Educational Resources Information Center

    George, Daniel R.; Whitehouse, Peter J.

    2011-01-01

    In the therapeutic void created by over 20 failed Alzheimer's disease drugs during the past decade, a new marketplace of "brain fitness" technology products has emerged. Ranging from video games and computer software to mobile phone apps and hand-held devices, these commercial products promise to maintain and enhance the memory,…

  6. Memory function and supportive technology

    PubMed Central

    Charness, Neil; Best, Ryan; Souders, Dustin

    2013-01-01

    Episodic and working memory processes show pronounced age-related decline, with other memory processes such as semantic, procedural, and metamemory less affected. Older adults tend to complain the most about prospective and retrospective memory failures. We introduce a framework for deciding how to mitigate memory decline using augmentation and substitution and discuss techniques that change the user, through mnemonics training, and change the tool or environment, by providing environmental support. We provide examples of low-tech and high-tech memory supports and discuss constraints on the utility of high-tech systems including effectiveness of devices, attitudes toward memory aids, and reliability of systems. PMID:24379752

  7. Optical quantum memory based on electromagnetically induced transparency

    PubMed Central

    Ma, Lijun; Slattery, Oliver

    2017-01-01

    Electromagnetically induced transparency (EIT) is a promising approach to implement quantum memory in quantum communication and quantum computing applications. In this paper, following a brief overview of the main approaches to quantum memory, we provide details of the physical principle and theory of quantum memory based specifically on EIT. We discuss the key technologies for implementing quantum memory based on EIT and review important milestones, from the first experimental demonstration to current applications in quantum information systems. PMID:28828172

  8. Optical quantum memory based on electromagnetically induced transparency.

    PubMed

    Ma, Lijun; Slattery, Oliver; Tang, Xiao

    2017-04-01

    Electromagnetically induced transparency (EIT) is a promising approach to implement quantum memory in quantum communication and quantum computing applications. In this paper, following a brief overview of the main approaches to quantum memory, we provide details of the physical principle and theory of quantum memory based specifically on EIT. We discuss the key technologies for implementing quantum memory based on EIT and review important milestones, from the first experimental demonstration to current applications in quantum information systems.

  9. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  10. Investigation of fast initialization of spacecraft bubble memory systems

    NASA Technical Reports Server (NTRS)

    Looney, K. T.; Nichols, C. D.; Hayes, P. J.

    1984-01-01

    Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

  11. Transistor and memory devices based on novel organic and biomaterials

    NASA Astrophysics Data System (ADS)

    Tseng, Jia-Hung

    Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with platinum nanoparticles. It is established that the effective barrier height in the materials systems needs to be further engineered in order to have sufficiently long retention times. Finally other novel architectures such as negative differential resistance devices and high density memory arrays are investigated for their influence on memory technology.

  12. Radiation Effects of Commercial Resistive Random Access Memories

    NASA Technical Reports Server (NTRS)

    Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

    2014-01-01

    We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

  13. Ferroelectric memory evaluation and development system

    NASA Astrophysics Data System (ADS)

    Bondurant, David W.

    Attention is given to the Ramtron FEDS-1, an IBM PC/AT compatible single-board 16-b microcomputer with 8-kbyte program/data memory implemented with nonvolatile ferroelectric dynamic RAM. This is the first demonstration of a new type of solid state nonvolatile read/write memory, the ferroelectric RAM (FRAM). It is suggested that this memory technology will have a significant impact on avionics system performance and reliability.

  14. Radiation Tests of Highly scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories--Update 2011

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2011-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) 32Gb and multi-level cell (MLC) 64Gb NAND flash memories manufactured by Micron Technology.

  15. Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells.

    PubMed

    Pu, Y-F; Jiang, N; Chang, W; Yang, H-X; Li, C; Duan, L-M

    2017-05-08

    To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology.

  16. Performance Evaluation and Improvement of Ferroelectric Field-Effect Transistor Memory

    NASA Astrophysics Data System (ADS)

    Yu, Hyung Suk

    Flash memory is reaching scaling limitations rapidly due to reduction of charge in floating gates, charge leakage and capacitive coupling between cells which cause threshold voltage fluctuations, short retention times, and interference. Many new memory technologies are being considered as alternatives to flash memory in an effort to overcome these limitations. Ferroelectric Field-Effect Transistor (FeFET) is one of the main emerging candidates because of its structural similarity to conventional FETs and fast switching speed. Nevertheless, the performance of FeFETs have not been systematically compared and analyzed against other competing technologies. In this work, we first benchmark the intrinsic performance of FeFETs and other memories by simulations in order to identify the strengths and weaknesses of FeFETs. To simulate realistic memory applications, we compare memories on an array structure. For the comparisons, we construct an accurate delay model and verify it by benchmarking against exact HSPICE simulations. Second, we propose an accurate model for FeFET memory window since the existing model has limitations. The existing model assumes symmetric operation voltages but it is not valid for the practical asymmetric operation voltages. In this modeling, we consider practical operation voltages and device dimensions. Also, we investigate realistic changes of memory window over time and retention time of FeFETs. Last, to improve memory window and subthreshold swing, we suggest nonplanar junctionless structures for FeFETs. Using the suggested structures, we study the dimensional dependences of crucial parameters like memory window and subthreshold swing and also analyze key interference mechanisms.

  17. Research about Memory Detection Based on the Embedded Platform

    NASA Astrophysics Data System (ADS)

    Sun, Hao; Chu, Jian

    As is known to us all, the resources of memory detection of the embedded systems are very limited. Taking the Linux-based embedded arm as platform, this article puts forward two efficient memory detection technologies according to the characteristics of the embedded software. Especially for the programs which need specific libraries, the article puts forwards portable memory detection methods to help program designers to reduce human errors,improve programming quality and therefore make better use of the valuable embedded memory resource.

  18. SONOS Nonvolatile Memory Cell Programming Characteristics

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

  19. Multiband Radio Frequency Interconnect (MRFI) Technology For Next Generation Mobile/Airborne Computing Systems

    DTIC Science & Technology

    2017-02-01

    enable high scalability and reconfigurability for inter-CPU/Memory communications with an increased number of communication channels in frequency ...interconnect technology (MRFI) to enable high scalability and re-configurability for inter-CPU/Memory communications with an increased number of communication ...testing in the University of California, Los Angeles (UCLA) Center for High Frequency Electronics, and Dr. Afshin Momtaz at Broadcom Corporation for

  20. MRAM Technology Status

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2013-01-01

    Magnetoresistive Random Access Memory (MRAM) is much different from conventional types of memory like SRAM, DRAM, and Flash, where electric charge is used to store information. Instead of exploiting the charge of an electron, MRAM uses its spin to store data. This new type of electronics is known as "spintronics." The primary focus of this report is the current generation of MRAM technology, and its reliability, vendors, and space-readiness.

  1. NASA Chief Technologist Douglas Terrier Moderates a Panel During the AAS 55th Robert H. Goddard Memorial Symposium

    NASA Image and Video Library

    2017-03-08

    NASA Chief Technologist Douglas Terrier moderated the discussion “NASA Leadership in the Future of Science and Technology" during the AAS 55th Robert H. Goddard Memorial Symposium on March 8, 2017. Terrier was joined by Associate Administrator for Space Technology Steve Jurczyk, Chief Scientist Gale Allen and Associate Administrator for Science Thomas Zurbuchen.

  2. NASA Chief Technologist Douglas Terrier Moderates Panel Discussion During the AAS 55th Robert H. Goddard Memorial Symposium

    NASA Image and Video Library

    2017-03-08

    NASA Chief Technologist Douglas Terrier moderated the discussion “NASA Leadership in the Future of Science and Technology" during the AAS 55th Robert H. Goddard Memorial Symposium on March 8, 2017. Terrier was joined by Associate Administrator for Space Technology Steve Jurczyk, Chief Scientist Gale Allen and Associate Administrator for Science Thomas Zurbuchen.

  3. NASA Chief Technologist Douglas Terrier Moderates A Discussion During the AAS 55th Robert H. Goddard Memorial Symposium

    NASA Image and Video Library

    2017-03-08

    NASA Chief Technologist Douglas Terrier moderated the discussion “NASA Leadership in the Future of Science and Technology" during the AAS 55th Robert H. Goddard Memorial Symposium on March 8, 2017. Terrier was joined by Associate Administrator for Space Technology Steve Jurczyk, Chief Scientist Gale Allen and Associate Administrator for Science Thomas Zurbuchen.

  4. Generation of Quality Pulses for Control of Qubit/Quantum Memory Spin States: Experimental and Simulation

    DTIC Science & Technology

    2016-09-01

    TECHNICAL REPORT 3046 September 2016 GENERATION OF QUALITY PULSES FOR CONTROL OF QUBIT/QUANTUM MEMORY SPIN STATES: EXPERIMENTAL AND SIMULATION...nuclear spin states of qubits/quantum memory applicable to semiconductor, superconductor, ionic, and superconductor-ionic hybrid technologies. As the...pulse quality and need for development of single pulses with very high quality will impact directly the coherence time of the qubit/ memory , we present

  5. Professionals' views on the use of smartphone technology to support children and adolescents with memory impairment due to acquired brain injury.

    PubMed

    Plackett, Ruth; Thomas, Sophie; Thomas, Shirley

    2017-04-01

    Purpose To identify from a health-care professionals' perspective whether smartphones are used by children and adolescents with acquired brain injury as memory aids; what factors predict smartphone use and what barriers prevent the use of smartphones as memory aids by children and adolescents. Method A cross-sectional online survey was undertaken with 88 health-care professionals working with children and adolescents with brain injury. Results Children and adolescents with brain injury were reported to use smartphones as memory aids by 75% of professionals. However, only 42% of professionals helped their clients to use smartphones. The only factor that significantly predicted reported smartphone use was the professionals' positive attitudes toward assistive technology. Several barriers to using smartphones as memory aids were identified, including the poor accessibility of devices and cost of devices. Conclusion Many children and adolescents with brain injury are already using smartphones as memory aids but this is often not facilitated by professionals. Improving the attitudes of professionals toward using smartphones as assistive technology could help to increase smartphone use in rehabilitation. Implications for Rehabilitation Smartphones could be incorporated into rehabilitation programs for young people with brain injury as socially acceptable compensatory aids. Further training and support for professionals on smartphones as compensatory aids could increase professionals' confidence and attitudes in facilitating the use of smartphones as memory aids. Accessibility could be enhanced by the development of a smartphone application specifically designed to be used by young people with brain injury.

  6. Compiling for Application Specific Computational Acceleration in Reconfigurable Architectures Final Report CRADA No. TSB-2033-01

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    De Supinski, B.; Caliga, D.

    2017-09-28

    The primary objective of this project was to develop memory optimization technology to efficiently deliver data to, and distribute data within, the SRC-6's Field Programmable Gate Array- ("FPGA") based Multi-Adaptive Processors (MAPs). The hardware/software approach was to explore efficient MAP configurations and generate the compiler technology to exploit those configurations. This memory accessing technology represents an important step towards making reconfigurable symmetric multi-processor (SMP) architectures that will be a costeffective solution for large-scale scientific computing.

  7. Perpendicular STT_RAM cell in 8 nm technology node using Co1/Ni3(1 1 1)||Gr2||Co1/Ni3(1 1 1) structure as magnetic tunnel junction

    NASA Astrophysics Data System (ADS)

    Varghani, Ali; Peiravi, Ali; Moradi, Farshad

    2018-04-01

    The perpendicular anisotropy Spin-Transfer Torque Random Access Memory (P-STT-RAM) is considered to be a promising candidate for high-density memories. Many distinct advantages of Perpendicular Magnetic Tunnel Junction (P-MTJ) compared to the conventional in-plane MTJ (I-MTJ) such as lower switching current, circular cell shape that facilitates manufacturability in smaller technology nodes, large thermal stability, smaller cell size, and lower dipole field interaction between adjacent cells make it a promising candidate as a universal memory. However, for small MTJ cell sizes, the perpendicular technology requires new materials with high polarization and low damping factor as well as low resistance area product of a P-MTJ in order to avoid a high write voltage as technology is scaled down. A new graphene-based STT-RAM cell for 8 nm technology node that uses high perpendicular magnetic anisotropy cobalt/nickel (Co/Ni) multilayer as magnetic layers is proposed in this paper. The proposed junction benefits from enough Tunneling Magnetoresistance Ratio (TMR), low resistance area product, low write voltage, and low power consumption that make it suitable for 8 nm technology node.

  8. Simple Atomic Quantum Memory Suitable for Semiconductor Quantum Dot Single Photons

    NASA Astrophysics Data System (ADS)

    Wolters, Janik; Buser, Gianni; Horsley, Andrew; Béguin, Lucas; Jöckel, Andreas; Jahn, Jan-Philipp; Warburton, Richard J.; Treutlein, Philipp

    2017-08-01

    Quantum memories matched to single photon sources will form an important cornerstone of future quantum network technology. We demonstrate such a memory in warm Rb vapor with on-demand storage and retrieval, based on electromagnetically induced transparency. With an acceptance bandwidth of δ f =0.66 GHz , the memory is suitable for single photons emitted by semiconductor quantum dots. In this regime, vapor cell memories offer an excellent compromise between storage efficiency, storage time, noise level, and experimental complexity, and atomic collisions have negligible influence on the optical coherences. Operation of the memory is demonstrated using attenuated laser pulses on the single photon level. For a 50 ns storage time, we measure ηe2 e 50 ns=3.4 (3 )% end-to-end efficiency of the fiber-coupled memory, with a total intrinsic efficiency ηint=17 (3 )%. Straightforward technological improvements can boost the end-to-end-efficiency to ηe 2 e≈35 %; beyond that, increasing the optical depth and exploiting the Zeeman substructure of the atoms will allow such a memory to approach near unity efficiency. In the present memory, the unconditional read-out noise level of 9 ×10-3 photons is dominated by atomic fluorescence, and for input pulses containing on average μ1=0.27 (4 ) photons, the signal to noise level would be unity.

  9. Simple Atomic Quantum Memory Suitable for Semiconductor Quantum Dot Single Photons.

    PubMed

    Wolters, Janik; Buser, Gianni; Horsley, Andrew; Béguin, Lucas; Jöckel, Andreas; Jahn, Jan-Philipp; Warburton, Richard J; Treutlein, Philipp

    2017-08-11

    Quantum memories matched to single photon sources will form an important cornerstone of future quantum network technology. We demonstrate such a memory in warm Rb vapor with on-demand storage and retrieval, based on electromagnetically induced transparency. With an acceptance bandwidth of δf=0.66  GHz, the memory is suitable for single photons emitted by semiconductor quantum dots. In this regime, vapor cell memories offer an excellent compromise between storage efficiency, storage time, noise level, and experimental complexity, and atomic collisions have negligible influence on the optical coherences. Operation of the memory is demonstrated using attenuated laser pulses on the single photon level. For a 50 ns storage time, we measure η_{e2e}^{50  ns}=3.4(3)% end-to-end efficiency of the fiber-coupled memory, with a total intrinsic efficiency η_{int}=17(3)%. Straightforward technological improvements can boost the end-to-end-efficiency to η_{e2e}≈35%; beyond that, increasing the optical depth and exploiting the Zeeman substructure of the atoms will allow such a memory to approach near unity efficiency. In the present memory, the unconditional read-out noise level of 9×10^{-3} photons is dominated by atomic fluorescence, and for input pulses containing on average μ_{1}=0.27(4) photons, the signal to noise level would be unity.

  10. The Roles of Working Memory and Cognitive Load in Geoscience Learning

    ERIC Educational Resources Information Center

    Jaeger, Allison J.; Shipley, Thomas F.; Reynolds, Stephen J.

    2017-01-01

    Working memory is a cognitive system that allows for the simultaneous storage and processing of active information. While working memory has been implicated as an important element for success in many science, technology, engineering, and mathematics (STEM) fields, its specific role in geoscience learning is not fully understood. The major goal of…

  11. Ames Lab 101: Ultrafast Magnetic Switching

    ScienceCinema

    Wang; Jigang

    2018-01-01

    Ames Laboratory physicists have found a new way to switch magnetism that is at least 1000 times faster than currently used in magnetic memory technologies. Magnetic switching is used to encode information in hard drives, magnetic random access memory and other computing devices. The discovery potentially opens the door to terahertz and faster memory speeds.

  12. Decoding Overlapping Memories in the Medial Temporal Lobes Using High-Resolution fMRI

    ERIC Educational Resources Information Center

    Chadwick, Martin J.; Hassabis, Demis; Maguire, Eleanor A.

    2011-01-01

    The hippocampus is proposed to process overlapping episodes as discrete memory traces, although direct evidence for this in human episodic memory is scarce. Using green-screen technology we created four highly overlapping movies of everyday events. Participants were scanned using high-resolution fMRI while recalling the movies. Multivariate…

  13. Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells

    PubMed Central

    Pu, Y-F; Jiang, N.; Chang, W.; Yang, H-X; Li, C.; Duan, L-M

    2017-01-01

    To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology. PMID:28480891

  14. Exascale Hardware Architectures Working Group

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Hemmert, S; Ang, J; Chiang, P

    2011-03-15

    The ASC Exascale Hardware Architecture working group is challenged to provide input on the following areas impacting the future use and usability of potential exascale computer systems: processor, memory, and interconnect architectures, as well as the power and resilience of these systems. Going forward, there are many challenging issues that will need to be addressed. First, power constraints in processor technologies will lead to steady increases in parallelism within a socket. Additionally, all cores may not be fully independent nor fully general purpose. Second, there is a clear trend toward less balanced machines, in terms of compute capability compared tomore » memory and interconnect performance. In order to mitigate the memory issues, memory technologies will introduce 3D stacking, eventually moving on-socket and likely on-die, providing greatly increased bandwidth but unfortunately also likely providing smaller memory capacity per core. Off-socket memory, possibly in the form of non-volatile memory, will create a complex memory hierarchy. Third, communication energy will dominate the energy required to compute, such that interconnect power and bandwidth will have a significant impact. All of the above changes are driven by the need for greatly increased energy efficiency, as current technology will prove unsuitable for exascale, due to unsustainable power requirements of such a system. These changes will have the most significant impact on programming models and algorithms, but they will be felt across all layers of the machine. There is clear need to engage all ASC working groups in planning for how to deal with technological changes of this magnitude. The primary function of the Hardware Architecture Working Group is to facilitate codesign with hardware vendors to ensure future exascale platforms are capable of efficiently supporting the ASC applications, which in turn need to meet the mission needs of the NNSA Stockpile Stewardship Program. This issue is relatively immediate, as there is only a small window of opportunity to influence hardware design for 2018 machines. Given the short timeline a firm co-design methodology with vendors is of prime importance.« less

  15. An upconverted photonic nonvolatile memory.

    PubMed

    Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L

    2014-08-21

    Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

  16. Spatial light modulators and applications III; Proceedings of the Meeting, San Diego, CA, Aug. 7, 8, 1989

    NASA Astrophysics Data System (ADS)

    Efron, Uzi

    Recent advances in the technology and applications of spatial light modulators (SLMs) are discussed in review essays by leading experts. Topics addressed include materials for SLMs, SLM devices and device technology, applications to optical data processing, and applications to artificial neural networks. Particular attention is given to nonlinear optical polymers, liquid crystals, magnetooptic SLMs, multiple-quantum-well SLMs, deformable-mirror SLMs, three-dimensional optical memories, applications of photorefractive devices to optical computing, photonic neurocomputers and learning machines, holographic associative memories, SLMs as parallel memories for optoelectronic neural networks, and coherent-optics implementations of neural-network models.

  17. Spatial light modulators and applications III; Proceedings of the Meeting, San Diego, CA, Aug. 7, 8, 1989

    NASA Technical Reports Server (NTRS)

    Efron, Uzi (Editor)

    1990-01-01

    Recent advances in the technology and applications of spatial light modulators (SLMs) are discussed in review essays by leading experts. Topics addressed include materials for SLMs, SLM devices and device technology, applications to optical data processing, and applications to artificial neural networks. Particular attention is given to nonlinear optical polymers, liquid crystals, magnetooptic SLMs, multiple-quantum-well SLMs, deformable-mirror SLMs, three-dimensional optical memories, applications of photorefractive devices to optical computing, photonic neurocomputers and learning machines, holographic associative memories, SLMs as parallel memories for optoelectronic neural networks, and coherent-optics implementations of neural-network models.

  18. Self-Regulation as an Aid to Human Effectiveness and Biocybernetics Technology and Behavior

    DTIC Science & Technology

    1976-01-01

    feedback and two measures of information-processing capacity: short-term memory for digits and choice-reaction times. In this study, Beatty selected...Kamiya, like Beatty, found EEG activity unrelated to both memory for words and a simple reaction-time test. In another study, Kamiya (1972...creative intelligence, visual memory , mental arithmetic, digit memory span, and i,une tracking. The results were negative. Kamiya concluded that the self

  19. Dynamic effects of memory in a cobweb model with competing technologies

    NASA Astrophysics Data System (ADS)

    Agliari, Anna; Naimzada, Ahmad; Pecora, Nicolò

    2017-02-01

    We analyze a simple model based on the cobweb demand-supply framework with costly innovators and free imitators and study the endogenous dynamics of price and firms' fractions in a homogeneous good market. The evolutionary selection between technologies depends on a performance measure in which a memory parameter is introduced. The resulting dynamics is then described by a two-dimensional map. In addition to the locally stabilizing effect due to the presence of memory, we show the existence of a double stability threshold which entails for different dynamic scenarios occurring when the memory parameter takes extreme values (i.e. when consideration of the last profit realization prevails or it is too much neglected). The eventuality of different coexisting attractors as well as the structure of the basins of attraction that characterizes the path dependence property of the model with memory is shown. In particular, through global analysis we also illustrate particular bifurcations sequences that may increase the complexity of the related basins of attraction.

  20. Carbon nanomaterials for non-volatile memories

    NASA Astrophysics Data System (ADS)

    Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

    2018-03-01

    Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

  1. Josephson 4 K-bit cache memory design for a prototype signal processor. I - General overview

    NASA Astrophysics Data System (ADS)

    Henkels, W. H.; Geppert, L. M.; Kadlec, J.; Epperlein, P. W.; Beha, H.

    1985-09-01

    In the early stages of thg Josephson computer project conducted at an American computer company, it was recognized that a very fast cache memory was needed to complement Josephson logic. A subnanosecond access time memory was implemented experimentally on the basis of a 2.5-micron Pb-alloy technology. It was then decided to switch over to a Nb-base-electrode technology with the objective to alleviate problems with the long-term reliability and aging of Pb-based junctions. The present paper provides a general overview of the status of a 4 x 1 K-bit Josephson cache design employing a 2.5-micron Nb-edge-junction technology. Attention is given to the fabrication process and its implications, aspects of circuit design methodology, an overview of system environment and chip components, design changes and status, and various difficulties and uncertainties.

  2. Computer technologies and institutional memory

    NASA Technical Reports Server (NTRS)

    Bell, Christopher; Lachman, Roy

    1989-01-01

    NASA programs for manned space flight are in their 27th year. Scientists and engineers who worked continuously on the development of aerospace technology during that period are approaching retirement. The resulting loss to the organization will be considerable. Although this problem is general to the NASA community, the problem was explored in terms of the institutional memory and technical expertise of a single individual in the Man-Systems division. The main domain of the expert was spacecraft lighting, which became the subject area for analysis in these studies. The report starts with an analysis of the cumulative expertise and institutional memory of technical employees of organizations such as NASA. A set of solutions to this problem are examined and found inadequate. Two solutions were investigated at length: hypertext and expert systems. Illustrative examples were provided of hypertext and expert system representation of spacecraft lighting. These computer technologies can be used to ameliorate the problem of the loss of invaluable personnel.

  3. Assessing Advanced Technology in CENATE

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Tallent, Nathan R.; Barker, Kevin J.; Gioiosa, Roberto

    PNNL's Center for Advanced Technology Evaluation (CENATE) is a new U.S. Department of Energy center whose mission is to assess and facilitate access to emerging computing technology. CENATE is assessing a range of advanced technologies, from evolutionary to disruptive. Technologies of interest include the processor socket (homogeneous and accelerated systems), memories (dynamic, static, memory cubes), motherboards, networks (network interface cards and switches), and input/output and storage devices. CENATE is developing a multi-perspective evaluation process based on integrating advanced system instrumentation, performance measurements, and modeling and simulation. We show evaluations of two emerging network technologies: silicon photonics interconnects and the Datamore » Vortex network. CENATE's evaluation also addresses the question of which machine is best for a given workload under certain constraints. We show a performance-power tradeoff analysis of a well-known machine learning application on two systems.« less

  4. Memory-efficient table look-up optimized algorithm for context-based adaptive variable length decoding in H.264/advanced video coding

    NASA Astrophysics Data System (ADS)

    Wang, Jianhua; Cheng, Lianglun; Wang, Tao; Peng, Xiaodong

    2016-03-01

    Table look-up operation plays a very important role during the decoding processing of context-based adaptive variable length decoding (CAVLD) in H.264/advanced video coding (AVC). However, frequent table look-up operation can result in big table memory access, and then lead to high table power consumption. Aiming to solve the problem of big table memory access of current methods, and then reduce high power consumption, a memory-efficient table look-up optimized algorithm is presented for CAVLD. The contribution of this paper lies that index search technology is introduced to reduce big memory access for table look-up, and then reduce high table power consumption. Specifically, in our schemes, we use index search technology to reduce memory access by reducing the searching and matching operations for code_word on the basis of taking advantage of the internal relationship among length of zero in code_prefix, value of code_suffix and code_lengh, thus saving the power consumption of table look-up. The experimental results show that our proposed table look-up algorithm based on index search can lower about 60% memory access consumption compared with table look-up by sequential search scheme, and then save much power consumption for CAVLD in H.264/AVC.

  5. HTMT-class Latency Tolerant Parallel Architecture for Petaflops Scale Computation

    NASA Technical Reports Server (NTRS)

    Sterling, Thomas; Bergman, Larry

    2000-01-01

    Computational Aero Sciences and other numeric intensive computation disciplines demand computing throughputs substantially greater than the Teraflops scale systems only now becoming available. The related fields of fluids, structures, thermal, combustion, and dynamic controls are among the interdisciplinary areas that in combination with sufficient resolution and advanced adaptive techniques may force performance requirements towards Petaflops. This will be especially true for compute intensive models such as Navier-Stokes are or when such system models are only part of a larger design optimization computation involving many design points. Yet recent experience with conventional MPP configurations comprising commodity processing and memory components has shown that larger scale frequently results in higher programming difficulty and lower system efficiency. While important advances in system software and algorithms techniques have had some impact on efficiency and programmability for certain classes of problems, in general it is unlikely that software alone will resolve the challenges to higher scalability. As in the past, future generations of high-end computers may require a combination of hardware architecture and system software advances to enable efficient operation at a Petaflops level. The NASA led HTMT project has engaged the talents of a broad interdisciplinary team to develop a new strategy in high-end system architecture to deliver petaflops scale computing in the 2004/5 timeframe. The Hybrid-Technology, MultiThreaded parallel computer architecture incorporates several advanced technologies in combination with an innovative dynamic adaptive scheduling mechanism to provide unprecedented performance and efficiency within practical constraints of cost, complexity, and power consumption. The emerging superconductor Rapid Single Flux Quantum electronics can operate at 100 GHz (the record is 770 GHz) and one percent of the power required by convention semiconductor logic. Wave Division Multiplexing optical communications can approach a peak per fiber bandwidth of 1 Tbps and the new Data Vortex network topology employing this technology can connect tens of thousands of ports providing a bi-section bandwidth on the order of a Petabyte per second with latencies well below 100 nanoseconds, even under heavy loads. Processor-in-Memory (PIM) technology combines logic and memory on the same chip exposing the internal bandwidth of the memory row buffers at low latency. And holographic storage photorefractive storage technologies provide high-density memory with access a thousand times faster than conventional disk technologies. Together these technologies enable a new class of shared memory system architecture with a peak performance in the range of a Petaflops but size and power requirements comparable to today's largest Teraflops scale systems. To achieve high-sustained performance, HTMT combines an advanced multithreading processor architecture with a memory-driven coarse-grained latency management strategy called "percolation", yielding high efficiency while reducing the much of the parallel programming burden. This paper will present the basic system architecture characteristics made possible through this series of advanced technologies and then give a detailed description of the new percolation approach to runtime latency management.

  6. Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd; Ho, Fat D.

    2012-01-01

    The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

  7. Optical computing, optical memory, and SBIRs at Foster-Miller

    NASA Astrophysics Data System (ADS)

    Domash, Lawrence H.

    1994-03-01

    A desktop design and manufacturing system for binary diffractive elements, MacBEEP, was developed with the optical researcher in mind. Optical processing systems for specialized tasks such as cellular automation computation and fractal measurement were constructed. A new family of switchable holograms has enabled several applications for control of laser beams in optical memories. New spatial light modulators and optical logic elements have been demonstrated based on a more manufacturable semiconductor technology. Novel synthetic and polymeric nonlinear materials for optical storage are under development in an integrated memory architecture. SBIR programs enable creative contributions from smaller companies, both product oriented and technology oriented, and support advances that might not otherwise be developed.

  8. A system-level approach for embedded memory robustness

    NASA Astrophysics Data System (ADS)

    Mariani, Riccardo; Boschi, Gabriele

    2005-11-01

    New ultra-deep submicron technologies are bringing not only new advantages such extraordinary transistor densities or unforeseen performances, but also new uncertainties such soft-error susceptibility, modelling complexity, coupling effects, leakage contribution and increased sensitivity to internal and external disturbs. Nowadays, embedded memories are taking profit of such new technologies and they are more and more used in systems: therefore as robustness and reliability requirement increase, memory systems must be protected against different kind of faults (permanent and transient) and that should be done in an efficient way. It means that reliability and costs, such overhead and performance degradation, must be efficiently tuned based on the system and on the application. Moreover, the new emerging norms for safety-critical applications such IEC 61508 are requiring precise answers in terms of robustness also in the case of memory systems. In this paper, classical protection techniques for error detection and correction are enriched with a system-aware approach, where the memory system is analyzed based on its role in the application. A configurable memory protection system is presented, together with the results of its application to a proof-of-concept architecture. This work has been developed in the framework of MEDEA+ T126 project called BLUEBERRIES.

  9. Siemens, Philips megaproject to yield superchip in 5 years

    NASA Astrophysics Data System (ADS)

    1985-02-01

    The development of computer chips using complementary metal oxide semiconductor (CMOS) memory technology is described. The management planning and marketing strategy of the Philips and Siemens corporations with regard to the memory chip are discussed.

  10. Implementation of Parallel Dynamic Simulation on Shared-Memory vs. Distributed-Memory Environments

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jin, Shuangshuang; Chen, Yousu; Wu, Di

    2015-12-09

    Power system dynamic simulation computes the system response to a sequence of large disturbance, such as sudden changes in generation or load, or a network short circuit followed by protective branch switching operation. It consists of a large set of differential and algebraic equations, which is computational intensive and challenging to solve using single-processor based dynamic simulation solution. High-performance computing (HPC) based parallel computing is a very promising technology to speed up the computation and facilitate the simulation process. This paper presents two different parallel implementations of power grid dynamic simulation using Open Multi-processing (OpenMP) on shared-memory platform, and Messagemore » Passing Interface (MPI) on distributed-memory clusters, respectively. The difference of the parallel simulation algorithms and architectures of the two HPC technologies are illustrated, and their performances for running parallel dynamic simulation are compared and demonstrated.« less

  11. Externalising the autobiographical self: sharing personal memories online facilitated memory retention.

    PubMed

    Wang, Qi; Lee, Dasom; Hou, Yubo

    2017-07-01

    Internet technology provides a new means of recalling and sharing personal memories in the digital age. What is the mnemonic consequence of posting personal memories online? Theories of transactive memory and autobiographical memory would make contrasting predictions. In the present study, college students completed a daily diary for a week, listing at the end of each day all the events that happened to them on that day. They also reported whether they posted any of the events online. Participants received a surprise memory test after the completion of the diary recording and then another test a week later. At both tests, events posted online were significantly more likely than those not posted online to be recalled. It appears that sharing memories online may provide unique opportunities for rehearsal and meaning-making that facilitate memory retention.

  12. FOREWORD: Shape Memory and Related Technologies

    NASA Astrophysics Data System (ADS)

    Liu, Yong

    2005-10-01

    The International Symposium on Shape Memory and Related Technologies (SMART2004) successfully took place in Singapore from November 24 to 26, 2004. SMART2004 aimed to provide a forum for presenting and discussing recent developments in the processing, characterization, application and performance prediction of shape memory materials, particularly shape memory alloys and magnetic shape memory materials. In recent years, we have seen a surge in the research and application of shape memory materials. This is due on the one hand to the successful applications of shape memory alloys (SMAs), particularly NiTi (nitinol), in medical practices and, on the other hand, to the discovery of magnetic shape memory (MSM) materials (or, ferromagnetic shape memory alloys, FSMAs). In recent years, applications of SMAs in various engineering practices have flourished owing to the unique combination of novel properties including high power density related to shape recovery, superelasticity with tunable hysteresis, high damping capacity combined with good fatigue resistance, excellent wear resistance due to unconventional deformation mechanisms (stress-induced phase transformation and martensite reorientation), and excellent biocompatibility and anticorrosion resistance, etc. In~the case of MSMs (or FSMAs), their giant shape change in a relatively low magnetic field has great potential to supplement the traditional actuation mechanisms and to have a great impact on the world of modern technology. Common mechanisms existing in both types of materials, namely thermoelastic phase transformation, martensite domain switching and their controlling factors, are of particular interest to the scientific community. Despite some successful applications, some fundamental issues remain unsatisfactorily understood. This conference hoped to link the fundamental research to engineering practices, and to further identify remaining problems in order to further promote the applications of shape memory materials in various demanding fields. Some top researchers from Asia, Australia, Europe and USA attended the meeting and gave oral presentations on both the fundamentals and applied aspects of SMAs and MSMs. Several prominent experts have delivered invited talks on the damping capacity of SMAs (J Van Humbeeck), SMA thin films (S Miyazaki), MSMs (V Lindross and O Söderberg) and SMA microtubes (Q P Sun). At the end of the Symposium, a panel discussion on various aspects of shape memory materials was held in the Nanyang Technological University. Comments, suggestions, opinions, discussions etc from all participants are greatly appreciated and acknowledged. I would like to thank all the participants for their valuable contributions toward the success of SMART2004, and thank all the session chairpersons for making this Symposium an event full of beneficial discussions. This special issue includes some of the manuscripts submitted to SMART2004. I want to express my deep gratitude to the editorial office of the journal of Smart Materials and Structures and all the referees for their great help in producing this special issue. This symposium has received support from the Institute of Materials (East Asia) and the School of Mechanical and Aerospace Engineering of the Nanyang Technological University. The following sponsors are gratefully acknowledged: Lee Foundation (Singapore) Accelrys Instron (Singapore Pte Ltd).

  13. Females scan more than males: a potential mechanism for sex differences in recognition memory.

    PubMed

    Heisz, Jennifer J; Pottruff, Molly M; Shore, David I

    2013-07-01

    Recognition-memory tests reveal individual differences in episodic memory; however, by themselves, these tests provide little information regarding the stage (or stages) in memory processing at which differences are manifested. We used eye-tracking technology, together with a recognition paradigm, to achieve a more detailed analysis of visual processing during encoding and retrieval. Although this approach may be useful for assessing differences in memory across many different populations, we focused on sex differences in face memory. Females outperformed males on recognition-memory tests, and this advantage was directly related to females' scanning behavior at encoding. Moreover, additional exposures to the faces reduced sex differences in face recognition, which suggests that males may be able to improve their recognition memory by extracting more information at encoding through increased scanning. A strategy of increased scanning at encoding may prove to be a simple way to enhance memory performance in other populations with memory impairment.

  14. The Use of Memories in Understanding Interactive Science and Technology Exhibits

    NASA Astrophysics Data System (ADS)

    Afonso, Ana S.; Gilbert, John K.

    2006-10-01

    Framed by a “personal constructivist” perspective, this study analyses visitors’ use of spontaneous memories in understanding different types of interactive exhibits, the nature and sources of the retrieved memories, and the way that visitors relate an exhibit analogically to memories of previous exhibits. One hundred and thirteen visitors (either alone or in groups) were observed during their interaction with exhibits and interviewed immediately afterwards. The majority of the retrieved memories were not used in understanding an exhibit; those memories used were mainly semantic and episodic in nature; and exhibits were mainly associated with memories by means of a superficial similarity between them. Suggestions for enhancing the formation of links between visitors’ memories and the understanding of an exhibit intended by the designer of it are made.

  15. Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

    NASA Astrophysics Data System (ADS)

    Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

    2014-11-01

    Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

  16. Radiation Effects on Advanced Flash Memories

    NASA Technical Reports Server (NTRS)

    Nguyen, D. N.; Guertin, S.; Swift, G. M.; Johnston, A. H.

    1998-01-01

    Flash memories have evolved very rapidly in recent ears. New design techniques such as multilevel storage have been proposed to increase storage density, and are now available commercially. Threshold voltage distributions for single- and three-level technologies are compared. In order to implement this technology special circuitry must be added to allow the amount of charge stored in the floating gate to be controlled within narrow limits during the writing and also to detect the different amounts of charge during reading.

  17. Interference effects of vocalization on dual task performance

    NASA Astrophysics Data System (ADS)

    Owens, J. M.; Goodman, L. S.; Pianka, M. J.

    1984-09-01

    Voice command and control systems have been proposed as a potential means of off-loading the typically overburdened visual information processing system. However, prior to introducing novel human-machine interfacing technologies in high workload environments, consideration must be given to the integration of the new technologists within existing task structures to ensure that no new sources of workload or interference are systematically introduced. This study examined the use of voice interactive systems technology in the joint performance of two cognitive information processing tasks requiring continuous memory and choice reaction wherein a basis for intertask interference might be expected. Stimuli for the continuous memory task were presented aurally and either voice or keyboard responding was required in the choice reaction task. Performance was significantly degraded in each task when voice responding was required in the choice reaction time task. Performance degradation was evident in higher error scores for both the choice reaction and continuous memory tasks. Performance decrements observed under conditions of high intertask stimulus similarity were not statistically significant. The results signal the need to consider further the task requirements for verbal short-term memory when applying speech technology in multitask environments.

  18. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Vanheusden, K.; Warren, W.L.; Devine, R.A.B.

    It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protonsmore » are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).« less

  19. Adaptive efficient compression of genomes

    PubMed Central

    2012-01-01

    Modern high-throughput sequencing technologies are able to generate DNA sequences at an ever increasing rate. In parallel to the decreasing experimental time and cost necessary to produce DNA sequences, computational requirements for analysis and storage of the sequences are steeply increasing. Compression is a key technology to deal with this challenge. Recently, referential compression schemes, storing only the differences between a to-be-compressed input and a known reference sequence, gained a lot of interest in this field. However, memory requirements of the current algorithms are high and run times often are slow. In this paper, we propose an adaptive, parallel and highly efficient referential sequence compression method which allows fine-tuning of the trade-off between required memory and compression speed. When using 12 MB of memory, our method is for human genomes on-par with the best previous algorithms in terms of compression ratio (400:1) and compression speed. In contrast, it compresses a complete human genome in just 11 seconds when provided with 9 GB of main memory, which is almost three times faster than the best competitor while using less main memory. PMID:23146997

  20. Nanoscale superconducting memory based on the kinetic inductance of asymmetric nanowire loops

    NASA Astrophysics Data System (ADS)

    Murphy, Andrew; Averin, Dmitri V.; Bezryadin, Alexey

    2017-06-01

    The demand for low-dissipation nanoscale memory devices is as strong as ever. As Moore’s law is staggering, and the demand for a low-power-consuming supercomputer is high, the goal of making information processing circuits out of superconductors is one of the central goals of modern technology and physics. So far, digital superconducting circuits could not demonstrate their immense potential. One important reason for this is that a dense superconducting memory technology is not yet available. Miniaturization of traditional superconducting quantum interference devices is difficult below a few micrometers because their operation relies on the geometric inductance of the superconducting loop. Magnetic memories do allow nanometer-scale miniaturization, but they are not purely superconducting (Baek et al 2014 Nat. Commun. 5 3888). Our approach is to make nanometer scale memory cells based on the kinetic inductance (and not geometric inductance) of superconducting nanowire loops, which have already shown many fascinating properties (Aprili 2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows much smaller devices and naturally eliminates magnetic-field cross-talk. We demonstrate that the vorticity, i.e., the winding number of the order parameter, of a closed superconducting loop can be used for realizing a nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity in a controlled fashion by applying calibrated current pulses. A reliable read-out of the memory is also demonstrated. We present arguments that such memory can be developed to operate without energy dissipation.

  1. Design and testing of the first 2D Prototype Vertically Integrated Pattern Recognition Associative Memory

    NASA Astrophysics Data System (ADS)

    Liu, T.; Deptuch, G.; Hoff, J.; Jindariani, S.; Joshi, S.; Olsen, J.; Tran, N.; Trimpl, M.

    2015-02-01

    An associative memory-based track finding approach has been proposed for a Level 1 tracking trigger to cope with increasing luminosities at the LHC. The associative memory uses a massively parallel architecture to tackle the intrinsically complex combinatorics of track finding algorithms, thus avoiding the typical power law dependence of execution time on occupancy and solving the pattern recognition in times roughly proportional to the number of hits. This is of crucial importance given the large occupancies typical of hadronic collisions. The design of an associative memory system capable of dealing with the complexity of HL-LHC collisions and with the short latency required by Level 1 triggering poses significant, as yet unsolved, technical challenges. For this reason, an aggressive R&D program has been launched at Fermilab to advance state of-the-art associative memory technology, the so called VIPRAM (Vertically Integrated Pattern Recognition Associative Memory) project. The VIPRAM leverages emerging 3D vertical integration technology to build faster and denser Associative Memory devices. The first step is to implement in conventional VLSI the associative memory building blocks that can be used in 3D stacking; in other words, the building blocks are laid out as if it is a 3D design. In this paper, we report on the first successful implementation of a 2D VIPRAM demonstrator chip (protoVIPRAM00). The results show that these building blocks are ready for 3D stacking.

  2. Design and testing of the first 2D Prototype Vertically Integrated Pattern Recognition Associative Memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Liu, T.; Deptuch, G.; Hoff, J.

    An associative memory-based track finding approach has been proposed for a Level 1 tracking trigger to cope with increasing luminosities at the LHC. The associative memory uses a massively parallel architecture to tackle the intrinsically complex combinatorics of track finding algorithms, thus avoiding the typical power law dependence of execution time on occupancy and solving the pattern recognition in times roughly proportional to the number of hits. This is of crucial importance given the large occupancies typical of hadronic collisions. The design of an associative memory system capable of dealing with the complexity of HL-LHC collisions and with the shortmore » latency required by Level 1 triggering poses significant, as yet unsolved, technical challenges. For this reason, an aggressive R&D program has been launched at Fermilab to advance state of-the-art associative memory technology, the so called VIPRAM (Vertically Integrated Pattern Recognition Associative Memory) project. The VIPRAM leverages emerging 3D vertical integration technology to build faster and denser Associative Memory devices. The first step is to implement in conventional VLSI the associative memory building blocks that can be used in 3D stacking, in other words, the building blocks are laid out as if it is a 3D design. In this paper, we report on the first successful implementation of a 2D VIPRAM demonstrator chip (protoVIPRAM00). The results show that these building blocks are ready for 3D stacking.« less

  3. Application of phase-change materials in memory taxonomy.

    PubMed

    Wang, Lei; Tu, Liang; Wen, Jing

    2017-01-01

    Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.

  4. Indian Institute of Technology Bombay and Tata Memorial Centre Join the International Efforts in Clinical Proteogenomics Cancer Research | Office of Cancer Clinical Proteomics Research

    Cancer.gov

    The National Cancer Institute’s (NCI) Office of Cancer Clinical Proteomics Research, part of the National Institutes of Health, along with the Indian Institute of Technology Bombay (IITB) and Tata Memorial Centre (TMC) have signed a Memorandum of Understanding (MOU) on clinical proteogenomics cancer research. The MOU between NCI, IITB, and Tata Memorial Centre represents the thirtieth and thirty-first institutions and the twelfth country to join the International Cancer Proteogenome Consortium (ICPC). The purpose of the MOU is to facilitate scientific and programmatic collaborations between NCI, IITB, and TMC in basic and clinical proteogenomic studies leading to patient care and public dissemination and information sharing to the research community.

  5. Prospective memory rehabilitation using smartphones in patients with TBI: What do participants report?

    PubMed

    Evald, Lars

    2015-01-01

    Use of assistive devices has been shown to be beneficial as a compensatory memory strategy among brain injury survivors, but little is known about possible advantages and disadvantages of the technology. As part of an intervention study participants were interviewed about their experiences with the use of low-cost, off-the-shelf, unmodified smartphones combined with Internet calendars as a compensatory memory strategy. Thirteen community-dwelling patients with traumatic brain injury (TBI) received a 6-week group-based instruction in the systematic use of a smartphone as a memory compensatory aid followed by a brief structured open-ended interview regarding satisfaction with and advantages and disadvantages of the compensatory strategy. Ten of 13 participants continued to use a smartphone as their primary compensatory strategy. Audible and visual reminders were the most frequently mentioned advantages of the smartphone, and, second, the capability as an all-in-one memory device. In contrast, battery life was the most often mentioned disadvantage, followed by concerns about loss or failure of the device. Use of a smartphone seems to be a satisfactory compensatory memory strategy to many patients with TBI and smartphones come with features that are advantageous to other compensatory strategies. However, some benefits come hand-in-hand with drawbacks, such as the feeling of dependency. These aspects should be taken into account when choosing assistive technology as a memory compensatory strategy.

  6. Novel memory architecture for video signal processor

    NASA Astrophysics Data System (ADS)

    Hung, Jen-Sheng; Lin, Chia-Hsing; Jen, Chein-Wei

    1993-11-01

    An on-chip memory architecture for video signal processor (VSP) is proposed. This memory structure is a two-level design for the different data locality in video applications. The upper level--Memory A provides enough storage capacity to reduce the impact on the limitation of chip I/O bandwidth, and the lower level--Memory B provides enough data parallelism and flexibility to meet the requirements of multiple reconfigurable pipeline function units in a single VSP chip. The needed memory size is decided by the memory usage analysis for video algorithms and the number of function units. Both levels of memory adopted a dual-port memory scheme to sustain the simultaneous read and write operations. Especially, Memory B uses multiple one-read-one-write memory banks to emulate the real multiport memory. Therefore, one can change the configuration of Memory B to several sets of memories with variable read/write ports by adjusting the bus switches. Then the numbers of read ports and write ports in proposed memory can meet requirement of data flow patterns in different video coding algorithms. We have finished the design of a prototype memory design using 1.2- micrometers SPDM SRAM technology and will fabricated it through TSMC, in Taiwan.

  7. Three-terminal resistive switching memory in a transparent vertical-configuration device

    NASA Astrophysics Data System (ADS)

    Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2014-01-01

    The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.

  8. Packaging of a large capacity magnetic bubble domain spacecraft recorder

    NASA Technical Reports Server (NTRS)

    Becker, F. J.; Stermer, R. L.

    1977-01-01

    A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

  9. 76 FR 17110 - Proposed Collection; Comment Request

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-03-28

    ... automated collection techniques or other forms of information technology. DATES: Consideration will be given... Expansion Memorial Park, Ballpark Village Field at Busch Stadium, and the Soldiers' Military Memorial Museum... Branch announces a proposed new public information collection and seeks public comment on the provisions...

  10. TiO2-based memristors and ReRAM: materials, mechanisms and models (a review)

    NASA Astrophysics Data System (ADS)

    Gale, Ella

    2014-10-01

    The memristor is the fundamental nonlinear circuit element, with uses in computing and computer memory. Resistive Random Access Memory (ReRAM) is a resistive switching memory proposed as a non-volatile memory. In this review we shall summarize the state of the art for these closely-related fields, concentrating on titanium dioxide, the well-utilized and archetypal material for both. We shall cover material properties, switching mechanisms and models to demonstrate what ReRAM and memristor scientists can learn from each other and examine the outlook for these technologies.

  11. Quantum reading of a classical digital memory.

    PubMed

    Pirandola, Stefano

    2011-03-04

    We consider a basic model of digital memory where each cell is composed of a reflecting medium with two possible reflectivities. By fixing the mean number of photons irradiated over each memory cell, we show that a nonclassical source of light can retrieve more information than any classical source. This improvement is shown in the regime of few photons and high reflectivities, where the gain of information can be surprising. As a result, the use of quantum light can have nontrivial applications in the technology of digital memories, such as optical disks and barcodes.

  12. A Layered Solution for Supercomputing Storage

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Grider, Gary

    To solve the supercomputing challenge of memory keeping up with processing speed, a team at Los Alamos National Laboratory developed two innovative memory management and storage technologies. Burst buffers peel off data onto flash memory to support the checkpoint/restart paradigm of large simulations. MarFS adds a thin software layer enabling a new tier for campaign storage—based on inexpensive, failure-prone disk drives—between disk drives and tape archives.

  13. AFTOMS Technology Issues and Alternatives Report

    DTIC Science & Technology

    1989-12-01

    color , resolu- power requirements, physi- tion; memory , processor speed; cal and weather rugged- IAN interfaces, etc,) f,: these ness. display...Telephone and Telegraph 3 CD-I Compact Disk - Interactive CD-ROM Compact Disk-Read Only Memory CGM Computer Graphics Metafile CNWDI Critical Nuclear...Database Management System RFP Request For Proposal 3 RFS Remote File System ROM Read Only Memory 3 S SA-ALC San Antonio Air Logistics Center 3 SAC

  14. High speed optical object recognition processor with massive holographic memory

    NASA Technical Reports Server (NTRS)

    Chao, T.; Zhou, H.; Reyes, G.

    2002-01-01

    Real-time object recognition using a compact grayscale optical correlator will be introduced. A holographic memory module for storing a large bank of optimum correlation filters, to accommodate the large data throughput rate needed for many real-world applications, has also been developed. System architecture of the optical processor and the holographic memory will be presented. Application examples of this object recognition technology will also be demonstrated.

  15. DataPlay's mobile recording technology

    NASA Astrophysics Data System (ADS)

    Bell, Bernard W., Jr.

    2002-01-01

    A small rotating memory device which utilizes optical prerecorded and writeable technology to provide a mobile recording technology solution for digital cameras, cell phones, music players, PDA's, and hybrid multipurpose devices have been developed. This solution encompasses writeable, read only, and encrypted storage media.

  16. Dynamic intersectoral models with power-law memory

    NASA Astrophysics Data System (ADS)

    Tarasova, Valentina V.; Tarasov, Vasily E.

    2018-01-01

    Intersectoral dynamic models with power-law memory are proposed. The equations of open and closed intersectoral models, in which the memory effects are described by the Caputo derivatives of non-integer orders, are derived. We suggest solutions of these equations, which have the form of linear combinations of the Mittag-Leffler functions and which are characterized by different effective growth rates. Examples of intersectoral dynamics with power-law memory are suggested for two sectoral cases. We formulate two principles of intersectoral dynamics with memory: the principle of changing of technological growth rates and the principle of domination change. It has been shown that in the input-output economic dynamics the effects of fading memory can change the economic growth rate and dominant behavior of economic sectors.

  17. Terahertz electrical writing speed in an antiferromagnetic memory

    PubMed Central

    Kašpar, Zdeněk; Campion, Richard P.; Baumgartner, Manuel; Sinova, Jairo; Kužel, Petr; Müller, Melanie; Kampfrath, Tobias

    2018-01-01

    The speed of writing of state-of-the-art ferromagnetic memories is physically limited by an intrinsic gigahertz threshold. Recently, realization of memory devices based on antiferromagnets, in which spin directions periodically alternate from one atomic lattice site to the next has moved research in an alternative direction. We experimentally demonstrate at room temperature that the speed of reversible electrical writing in a memory device can be scaled up to terahertz using an antiferromagnet. A current-induced spin-torque mechanism is responsible for the switching in our memory devices throughout the 12-order-of-magnitude range of writing speeds from hertz to terahertz. Our work opens the path toward the development of memory-logic technology reaching the elusive terahertz band. PMID:29740601

  18. Data Movement Dominates: Advanced Memory Technology to Address the Real Exascale Power Problem

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Bergman, Keren

    Energy is the fundamental barrier to Exascale supercomputing and is dominated by the cost of moving data from one point to another, not computation. Similarly, performance is dominated by data movement, not computation. The solution to this problem requires three critical technologies: 3D integration, optical chip-to-chip communication, and a new communication model. The central goal of the Sandia led "Data Movement Dominates" project aimed to develop memory systems and new architectures based on these technologies that have the potential to lower the cost of local memory accesses by orders of magnitude and provide substantially more bandwidth. Only through these transformationalmore » advances can future systems reach the goals of Exascale computing with a manageable power budgets. The Sandia led team included co-PIs from Columbia University, Lawrence Berkeley Lab, and the University of Maryland. The Columbia effort of Data Movement Dominates focused on developing a physically accurate simulation environment and experimental verification for optically-connected memory (OCM) systems that can enable continued performance scaling through high-bandwidth capacity, energy-efficient bit-rate transparency, and time-of-flight latency. With OCM, memory device parallelism and total capacity can scale to match future high-performance computing requirements without sacrificing data-movement efficiency. When we consider systems with integrated photonics, links to memory can be seamlessly integrated with the interconnection network-in a sense, memory becomes a primary aspect of the interconnection network. At the core of the Columbia effort, toward expanding our understanding of OCM enabled computing we have created an integrated modeling and simulation environment that uniquely integrates the physical behavior of the optical layer. The PhoenxSim suite of design and software tools developed under this effort has enabled the co-design of and performance evaluation photonics-enabled OCM architectures on Exascale computing systems.« less

  19. Experimental correlation of melt structures, nucleation rates, and thermal histories of silicate melts

    NASA Technical Reports Server (NTRS)

    Boynton, W. V.; DRAKE; HILDEBRAND; JONES; LEWIS; TREIMAN; WARK

    1987-01-01

    The theory and measurement of the structure of liquids is an important aspect of modern metallurgy and igneous petrology. Liquid structure exerts strong controls on both the types of crystals that may precipitate from melts and on the chemical composition of those crystals. An interesting aspect of melt structure studies is the problem of melt memories; that is, a melt can retain a memory of previous thermal history. This memory can influence both nucleation behavior and crystal composition. This melt memory may be characterized quantitatively with techniques such as Raman, infrared and NMR spectroscopy to provide information on short-range structure. Melt structure studies at high temperature will take advantage of the microgravity conditions of the Space Station to perform containerless experiments. Melt structure determinations at high temperature (experiments that are greatly facilitated by containerless technology) will provide invaluable information for materials science, glass technology, and geochemistry. In conjunction with studies of nucleation behavior and nucleation rates, information relevant to nucleation in magma chambers in terrestrial planets will be acquired.

  20. Analysis on applicable error-correcting code strength of storage class memory and NAND flash in hybrid storage

    NASA Astrophysics Data System (ADS)

    Matsui, Chihiro; Kinoshita, Reika; Takeuchi, Ken

    2018-04-01

    A hybrid of storage class memory (SCM) and NAND flash is a promising technology for high performance storage. Error correction is inevitable on SCM and NAND flash because their bit error rate (BER) increases with write/erase (W/E) cycles, data retention, and program/read disturb. In addition, scaling and multi-level cell technologies increase BER. However, error-correcting code (ECC) degrades storage performance because of extra memory reading and encoding/decoding time. Therefore, applicable ECC strength of SCM and NAND flash is evaluated independently by fixing ECC strength of one memory in the hybrid storage. As a result, weak BCH ECC with small correctable bit is recommended for the hybrid storage with large SCM capacity because SCM is accessed frequently. In contrast, strong and long-latency LDPC ECC can be applied to NAND flash in the hybrid storage with large SCM capacity because large-capacity SCM improves the storage performance.

  1. Experimental evaluation of shape memory alloy actuation technique in adaptive antenna design concepts

    NASA Astrophysics Data System (ADS)

    Kefauver, W. Neill; Carpenter, Bernie F.

    1994-09-01

    Creation of an antenna system that could autonomously adapt contours of reflecting surfaces to compensate for structural loads induced by a variable environment would maximize performance of space-based communication systems. Design of such a system requires the comprehensive development and integration of advanced actuator, sensor, and control technologies. As an initial step in this process, a test has been performed to assess the use of a shape memory alloy as a potential actuation technique. For this test, an existing, offset, cassegrain antenna system was retrofit with a subreflector equipped with shape memory alloy actuators for surface contour control. The impacts that the actuators had on both the subreflector contour and the antenna system patterns were measured. The results of this study indicate the potential for using shape memory alloy actuation techniques to adaptively control antenna performance; both variations in gain and beam steering capabilities were demonstrated. Future development effort is required to evolve this potential into a useful technology for satellite applications.

  2. Experimental evaluation of shape memory alloy actuation technique in adaptive antenna design concepts

    NASA Technical Reports Server (NTRS)

    Kefauver, W. Neill; Carpenter, Bernie F.

    1994-01-01

    Creation of an antenna system that could autonomously adapt contours of reflecting surfaces to compensate for structural loads induced by a variable environment would maximize performance of space-based communication systems. Design of such a system requires the comprehensive development and integration of advanced actuator, sensor, and control technologies. As an initial step in this process, a test has been performed to assess the use of a shape memory alloy as a potential actuation technique. For this test, an existing, offset, cassegrain antenna system was retrofit with a subreflector equipped with shape memory alloy actuators for surface contour control. The impacts that the actuators had on both the subreflector contour and the antenna system patterns were measured. The results of this study indicate the potential for using shape memory alloy actuation techniques to adaptively control antenna performance; both variations in gain and beam steering capabilities were demonstrated. Future development effort is required to evolve this potential into a useful technology for satellite applications.

  3. The effect of patterning options on embedded memory cells in logic technologies at iN10 and iN7

    NASA Astrophysics Data System (ADS)

    Appeltans, Raf; Weckx, Pieter; Raghavan, Praveen; Kim, Ryoung-Han; Kar, Gouri Sankar; Furnémont, Arnaud; Van der Perre, Liesbet; Dehaene, Wim

    2017-03-01

    Static Random Access Memory (SRAM) cells are used together with logic standard cells as the benchmark to develop the process flow for new logic technologies. In order to achieve successful integration of Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) as area efficient higher level embedded cache, it also needs to be included as a benchmark. The simple cell structure of STT-MRAM brings extra patterning challenges to achieve high density. The two memory types are compared in terms of minimum area and critical design rules in both the iN10 and iN7 node, with an extra focus on patterning options in iN7. Both the use of Self-Aligned Quadruple Patterning (SAQP) mandrel and spacer engineering, as well as multi-level via's are explored. These patterning options result in large area gains for the STT-MRAM cell and moreover determine which cell variant is the smallest.

  4. PIMS: Memristor-Based Processing-in-Memory-and-Storage.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Cook, Jeanine

    Continued progress in computing has augmented the quest for higher performance with a new quest for higher energy efficiency. This has led to the re-emergence of Processing-In-Memory (PIM) ar- chitectures that offer higher density and performance with some boost in energy efficiency. Past PIM work either integrated a standard CPU with a conventional DRAM to improve the CPU- memory link, or used a bit-level processor with Single Instruction Multiple Data (SIMD) control, but neither matched the energy consumption of the memory to the computation. We originally proposed to develop a new architecture derived from PIM that more effectively addressed energymore » efficiency for high performance scientific, data analytics, and neuromorphic applications. We also originally planned to implement a von Neumann architecture with arithmetic/logic units (ALUs) that matched the power consumption of an advanced storage array to maximize energy efficiency. Implementing this architecture in storage was our original idea, since by augmenting storage (in- stead of memory), the system could address both in-memory computation and applications that accessed larger data sets directly from storage, hence Processing-in-Memory-and-Storage (PIMS). However, as our research matured, we discovered several things that changed our original direc- tion, the most important being that a PIM that implements a standard von Neumann-type archi- tecture results in significant energy efficiency improvement, but only about a O(10) performance improvement. In addition to this, the emergence of new memory technologies moved us to propos- ing a non-von Neumann architecture, called Superstrider, implemented not in storage, but in a new DRAM technology called High Bandwidth Memory (HBM). HBM is a stacked DRAM tech- nology that includes a logic layer where an architecture such as Superstrider could potentially be implemented.« less

  5. Experimental test of Landauer’s principle in single-bit operations on nanomagnetic memory bits

    PubMed Central

    Hong, Jeongmin; Lambson, Brian; Dhuey, Scott; Bokor, Jeffrey

    2016-01-01

    Minimizing energy dissipation has emerged as the key challenge in continuing to scale the performance of digital computers. The question of whether there exists a fundamental lower limit to the energy required for digital operations is therefore of great interest. A well-known theoretical result put forward by Landauer states that any irreversible single-bit operation on a physical memory element in contact with a heat bath at a temperature T requires at least kBT ln(2) of heat be dissipated from the memory into the environment, where kB is the Boltzmann constant. We report an experimental investigation of the intrinsic energy loss of an adiabatic single-bit reset operation using nanoscale magnetic memory bits, by far the most ubiquitous digital storage technology in use today. Through sensitive, high-precision magnetometry measurements, we observed that the amount of dissipated energy in this process is consistent (within 2 SDs of experimental uncertainty) with the Landauer limit. This result reinforces the connection between “information thermodynamics” and physical systems and also provides a foundation for the development of practical information processing technologies that approach the fundamental limit of energy dissipation. The significance of the result includes insightful direction for future development of information technology. PMID:26998519

  6. Conceptual design and feasibility evaluation model of a 10 to the 8th power bit oligatomic mass memory. Volume 1: Conceptual design

    NASA Technical Reports Server (NTRS)

    Recksiedler, A. L.; Lutes, C. L.

    1972-01-01

    The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.

  7. DESTINY

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    2015-03-10

    DESTINY is a comprehensive tool for modeling 3D and 2D cache designs using SRAM,embedded DRAM (eDRAM), spin transfer torque RAM (STT-RAM), resistive RAM (ReRAM), and phase change RAM (PCN). In its purpose, it is similar to CACTI, CACTI-3DD or NVSim. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g. latency, area or energy-delay product) for agiven memory technology, choosing the suitable memory technology or fabrication method (i.e. 2D v/s 3D) for a given optimization target, etc. DESTINY has been validated against several cache prototypes. DESTINY is expected to boost studies ofmore » next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers.« less

  8. Advanced Compact Holographic Data Storage System

    NASA Technical Reports Server (NTRS)

    Chao, Tien-Hsin; Zhou, Hanying; Reyes, George

    2000-01-01

    JPL, under current sponsorship from NASA Space Science and Earth Science Programs, is developing a high-density, nonvolatile and rad-hard Advanced Holographic Memory (AHM) system to enable large-capacity, high-speed, low power consumption, and read/write of data in a space environment. The entire read/write operation will be controlled with electro-optic mechanism without any moving parts. This CHDS will consist of laser diodes, photorefractive crystal, spatial light modulator, photodetector array, and I/O electronic interface. In operation, pages of information would be recorded and retrieved with random access and highspeed. The nonvolatile, rad-hard characteristics of the holographic memory will provide a revolutionary memory technology to enhance mission capabilities for all NASA's Earth Science Mission. In this paper, recent technology progress in developing this CHDS at JPL will be presented.

  9. High-density magnetoresistive random access memory operating at ultralow voltage at room temperature.

    PubMed

    Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

    2011-11-22

    The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

  10. High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

    PubMed Central

    Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

    2011-01-01

    The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

  11. Implementation of a Fully-Balanced Periodic Tridiagonal Solver on a Parallel Distributed Memory Architecture

    DTIC Science & Technology

    1994-05-01

    PARALLEL DISTRIBUTED MEMORY ARCHITECTURE LTJh T. M. Eidson 0 - 8 l 9 5 " G. Erlebacher _ _ _. _ DTIe QUALITY INSPECTED a Contract NAS I - 19480 May 1994...DISTRIBUTED MEMORY ARCHITECTURE T.M. Eidson * High Technology Corporation Hampton, VA 23665 G. Erlebachert Institute for Computer Applications in Science and...developed and evaluated. Simple model calculations as well as timing results are pres.nted to evaluate the various strategies. The particular

  12. A Layered Solution for Supercomputing Storage

    ScienceCinema

    Grider, Gary

    2018-06-13

    To solve the supercomputing challenge of memory keeping up with processing speed, a team at Los Alamos National Laboratory developed two innovative memory management and storage technologies. Burst buffers peel off data onto flash memory to support the checkpoint/restart paradigm of large simulations. MarFS adds a thin software layer enabling a new tier for campaign storage—based on inexpensive, failure-prone disk drives—between disk drives and tape archives.

  13. FinFET memory cell improvements for higher immunity against single event upsets

    NASA Astrophysics Data System (ADS)

    Sajit, Ahmed Sattar

    The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated the transistor in every aspect of daily life, ranging from toys to rocket science. Day by day, scaling down the transistor is becoming an imperious necessity. However, it is not a straightforward process; instead, it faces overwhelming challenges. Due to these scaling changes, new technologies, such as FinFETs for example, have emerged as alternatives to the conventional bulk-CMOS technology. FinFET has more control over the channel, therefore, leakage current is reduced. FinFET could bridge the gap between silicon devices and non-silicon devices. The semiconductor industry is now incorporating FinFETs in systems and subsystems. For example, Intel has been using them in their newest processors, delivering potential saving powers and increased speeds to memory circuits. Memory sub-systems are considered a vital component in the digital era. In memory, few rows are read or written at a time, while the most rows are static; hence, reducing leakage current increases the performance. However, as a transistor shrinks, it becomes more vulnerable to the effects from radioactive particle strikes. If a particle hits a node in a memory cell, the content might flip; consequently, leading to corrupting stored data. Critical fields, such as medical and aerospace, where there are no second chances and cannot even afford to operate at 99.99% accuracy, has induced me to find a rigid circuit in a radiated working environment. This research focuses on a wide spectrum of memories such as 6T SRAM, 8T SRAM, and DICE memory cells using FinFET technology and finding the best platform in terms of Read and Write delay, susceptibility level of SNM, RSNM, leakage current, energy consumption, and Single Event Upsets (SEUs). This research has shown that the SEU tolerance that 6T and 8T FinFET SRAMs provide may not be acceptable in medical and aerospace applications where there is a very high likelihood of SEUs. Consequently, FinFET DICE memory can be a good candidate due to its high ability to tolerate SEUs of different amplitudes and long periods for both read and hold operations.

  14. The energy and stability of helium-related cluster in nickel: A study of molecular dynamics simulation

    NASA Astrophysics Data System (ADS)

    Gong, Hengfeng; Wang, Chengbin; Zhang, Wei; Xu, Jian; Huai, Ping; Deng, Huiqiu; Hu, Wangyu

    2016-02-01

    Using molecular dynamics simulation, we investigated the energy and stability of helium-related cluster in nickel. All the binding energies of the He-related clusters are demonstrated to be positive and increase with the cluster sizes. Due to the pre-existed self-interstitial nickel atom, the trapping capability of vacancy to defects becomes weak. Besides, the minimum energy configurations of He-related clusters exhibit the very high symmetry in the local atomistic environment. And for the HeN and HeNV1SIA1 clusters, the average length of He-He bonds shortens, but it elongates for the HeNV1 clusters with helium cluster sizes. The helium-to-vacancy ratio plays a decisive role on the binding energies of HeNVM cluster. These results can provide some excellent clues to insight the initial stage of helium bubbles nucleation and growth in the Ni-based alloys for the Generation-IV Molten Salt Reactor.

  15. The Role of the Texas Superintendent in District Technology Planning

    ERIC Educational Resources Information Center

    DuBus, Lyle W.

    2013-01-01

    The role of educational technology has been debated since education began with the Greeks when they questioned using paper versus memory to record thoughts. While technology in the classroom has changed, the debate regarding the role and use of technology in education remains unchanged. Instructional leadership in the district system continues to…

  16. Threshold-voltage modulated phase change heterojunction for application of high density memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yan, Baihan; Tong, Hao, E-mail: tonghao@hust.edu.cn; Qian, Hang

    2015-09-28

    Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-raymore » photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current.« less

  17. Sparse distributed memory prototype: Principles of operation

    NASA Technical Reports Server (NTRS)

    Flynn, Michael J.; Kanerva, Pentti; Ahanin, Bahram; Bhadkamkar, Neal; Flaherty, Paul; Hickey, Philip

    1988-01-01

    Sparse distributed memory is a generalized random access memory (RAM) for long binary words. Such words can be written into and read from the memory, and they can be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original right address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech and scene analysis, in signal detection and verification, and in adaptive control of automated equipment. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. The research is aimed at resolving major design issues that have to be faced in building the memories. The design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words is described. A key aspect of the design is extensive use of dynamic RAM and other standard components.

  18. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Bender, Michael A.; Berry, Jonathan W.; Hammond, Simon D.

    A challenge in computer architecture is that processors often cannot be fed data from DRAM as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth bound. With this motivation and the realization that traditional architectures (with all DRAM reachable only via bus) are insufficient to feed groups of modern processing units, vendors have introduced a variety of non-DDR 3D memory technologies (Hybrid Memory Cube (HMC),Wide I/O 2, High Bandwidth Memory (HBM)). These offer higher bandwidth and lower power by stacking DRAM chips on the processor or nearby on a silicon interposer. We will call these solutions “near-memory,” andmore » if user-addressable, “scratchpad.” High-performance systems on the market now offer two levels of main memory: near-memory on package and traditional DRAM further away. In the near term we expect the latencies near-memory and DRAM to be similar. Here, it is natural to think of near-memory as another module on the DRAM level of the memory hierarchy. Vendors are expected to offer modes in which the near memory is used as cache, but we believe that this will be inefficient.« less

  19. History Comes Alive: The American Memory Project.

    ERIC Educational Resources Information Center

    Rottmann, F. K.

    1992-01-01

    Describes the Library of Congress American Memory Project (AMP), which uses laser videodisc technology to provide online distribution of collections of historical materials. The collections, software, applications, and future possibilities are addressed; and the experiences of Hickman (Missouri) High School as a participant in the AMP pilot…

  20. Proton Irradiation of the 16GB Intel Optane SSD

    NASA Technical Reports Server (NTRS)

    Wyrwas, E. J.

    2017-01-01

    The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).

  1. Application of phase-change materials in memory taxonomy

    PubMed Central

    Wang, Lei; Tu, Liang; Wen, Jing

    2017-01-01

    Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557

  2. Semiconductor Cubing

    NASA Technical Reports Server (NTRS)

    1996-01-01

    Through Goddard Space Flight Center and Jet Propulsion Laboratory Small Business Innovation Research contracts, Irvine Sensors developed a three-dimensional memory system for a spaceborne data recorder and other applications for NASA. From these contracts, the company created the Memory Short Stack product, a patented technology for stacking integrated circuits that offers higher processing speeds and levels of integration, and lower power requirements. The product is a three-dimensional semiconductor package in which dozens of integrated circuits are stacked upon each other to form a cube. The technology is being used in various computer and telecommunications applications.

  3. Mary J. "Niki" Werkheiser presented Space Technology Award

    NASA Image and Video Library

    2017-10-26

    Mary J. "Niki" Werkheiser is presented the 2016 Space Technology Award during proceedings at the 10th annual Dr. Wernher von Braun Memorial Symposium at the University of Alabama, Huntsville, Alabama.

  4. A Fault-Tolerant Radiation-Robust Mass Storage Concept for Highly Scaled Flash Memory

    NASA Astrophysics Data System (ADS)

    Fuchs, Cristian M.; Trinitis, Carsten; Appel, Nicolas; Langer, Martin

    2015-09-01

    Future spacemissions will require vast amounts of data to be stored and processed aboard spacecraft. While satisfying operational mission requirements, storage systems must guarantee data integrity and recover damaged data throughout the mission. NAND-flash memories have become popular for space-borne high performance mass memory scenarios, though future storage concepts will rely upon highly scaled flash or other memory technologies. With modern flash memory, single bit erasure coding and RAID based concepts are insufficient. Thus, a fully run-time configurable, high performance, dependable storage concept, requiring a minimal set of logic or software. The solution is based on composite erasure coding and can be adjusted for altered mission duration or changing environmental conditions.

  5. Reducing noise in a Raman quantum memory.

    PubMed

    Bustard, Philip J; England, Duncan G; Heshami, Khabat; Kupchak, Connor; Sussman, Benjamin J

    2016-11-01

    Optical quantum memories are an important component of future optical and hybrid quantum technologies. Raman schemes are strong candidates for use with ultrashort optical pulses due to their broad bandwidth; however, the elimination of deleterious four-wave mixing noise from Raman memories is critical for practical applications. Here, we demonstrate a quantum memory using the rotational states of hydrogen molecules at room temperature. Polarization selection rules prohibit four-wave mixing, allowing the storage and retrieval of attenuated coherent states with a mean photon number 0.9 and a pulse duration 175 fs. The 1/e memory lifetime is 85.5 ps, demonstrating a time-bandwidth product of ≈480 in a memory that is well suited for use with broadband heralded down-conversion and fiber-based photon sources.

  6. On ways to overcome the magical capacity limit of working memory.

    PubMed

    Turi, Zsolt; Alekseichuk, Ivan; Paulus, Walter

    2018-04-01

    The ability to simultaneously process and maintain multiple pieces of information is limited. Over the past 50 years, observational methods have provided a large amount of insight regarding the neural mechanisms that underpin the mental capacity that we refer to as "working memory." More than 20 years ago, a neural coding scheme was proposed for working memory. As a result of technological developments, we can now not only observe but can also influence brain rhythms in humans. Building on these novel developments, we have begun to externally control brain oscillations in order to extend the limits of working memory.

  7. Learning and memory in zebrafish larvae

    PubMed Central

    Roberts, Adam C.; Bill, Brent R.; Glanzman, David L.

    2013-01-01

    Larval zebrafish possess several experimental advantages for investigating the molecular and neural bases of learning and memory. Despite this, neuroscientists have only recently begun to use these animals to study memory. However, in a relatively short period of time a number of forms of learning have been described in zebrafish larvae, and significant progress has been made toward their understanding. Here we provide a comprehensive review of this progress; we also describe several promising new experimental technologies currently being used in larval zebrafish that are likely to contribute major insights into the processes that underlie learning and memory. PMID:23935566

  8. Practicality of Evaluating Soft Errors in Commercial sub-90 nm CMOS for Space Applications

    NASA Technical Reports Server (NTRS)

    Pellish, Jonathan A.; LaBel, Kenneth A.

    2010-01-01

    The purpose of this presentation is to: Highlight space memory evaluation evolution, Review recent developments regarding low-energy proton direct ionization soft errors, Assess current space memory evaluation challenges, including increase of non-volatile technology choices, and Discuss related testing and evaluation complexities.

  9. Computer memory: the LLL experience. [Octopus computer network

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Fletcher, J.G.

    1976-02-01

    Those aspects of Octopus computer network design are reviewed that relate to memory and storage. Emphasis is placed on the difficulties and problems that arise because of the limitations of present storage devices, and indications are made of the directions in which technological advance could be of most value. (auth)

  10. Data systems and computer science space data systems: Onboard memory and storage

    NASA Technical Reports Server (NTRS)

    Shull, Tom

    1991-01-01

    The topics are presented in viewgraph form and include the following: technical objectives; technology challenges; state-of-the-art assessment; mass storage comparison; SODR drive and system concepts; program description; vertical Bloch line (VBL) device concept; relationship to external programs; and backup charts for memory and storage.

  11. Operator Influence of Unexploded Ordnance Sensor Technologies

    DTIC Science & Technology

    2007-03-01

    chart display ActiveX control Mscomct2.dll – date/time display ActiveX control Pnpscr.dll – Systran SCRAMNet replicated shared memory device...response value database rgm_p2.dll – Phase 2 shared memory API and implementation Commercial components StripM.ocx – strip chart display ActiveX

  12. Combat Maintenance Concepts and Repair Techniques Using Shape Memory Alloys for Fluid Lines, Control Tubes, and Drive Shafts.

    DTIC Science & Technology

    1983-03-01

    BUREAU OF STANDARDS-1963-A ,,...:-. .-. -.’" :.- --. . 4 Iq " USAAVRADCOM-TR-82-D-37 COMBAT MAINTENANCE CONCEPTS AND REPAIR TECHNIQUES USING SHAPE MEMORY...O APPLIED TECHNOLOGY LABORATORY POSITION STATEMENT The results of this effort determined the feasibility of using the full-ring shape memory alloy...specifications, or other data are used for any purpose other than in connection with a definitely related Government procurement operation, the United

  13. Direct Writing of Three-Dimensional Macroporous Photonic Crystals on Pressure-Responsive Shape Memory Polymers.

    PubMed

    Fang, Yin; Ni, Yongliang; Leo, Sin-Yen; Wang, Bingchen; Basile, Vito; Taylor, Curtis; Jiang, Peng

    2015-10-28

    Here we report a single-step direct writing technology for making three-dimensional (3D) macroporous photonic crystal patterns on a new type of pressure-responsive shape memory polymer (SMP). This approach integrates two disparate fields that do not typically intersect: the well-established templating nanofabrication and shape memory materials. Periodic arrays of polymer macropores templated from self-assembled colloidal crystals are squeezed into disordered arrays in an unusual shape memory "cold" programming process. The recovery of the original macroporous photonic crystal lattices can be triggered by direct writing at ambient conditions using both macroscopic and nanoscopic tools, like a pencil or a nanoindenter. Interestingly, this shape memory disorder-order transition is reversible and the photonic crystal patterns can be erased and regenerated hundreds of times, promising the making of reconfigurable/rewritable nanooptical devices. Quantitative insights into the shape memory recovery of collapsed macropores induced by the lateral shear stresses in direct writing are gained through fundamental investigations on important process parameters, including the tip material, the critical pressure and writing speed for triggering the recovery of the deformed macropores, and the minimal feature size that can be directly written on the SMP membranes. Besides straightforward applications in photonic crystal devices, these smart mechanochromic SMPs that are sensitive to various mechanical stresses could render important technological applications ranging from chromogenic stress and impact sensors to rewritable high-density optical data storage media.

  14. Recent Trends in Spintronics-Based Nanomagnetic Logic

    NASA Astrophysics Data System (ADS)

    Das, Jayita; Alam, Syed M.; Bhanja, Sanjukta

    2014-09-01

    With the growing concerns of standby power in sub-100-nm CMOS technologies, alternative computing techniques and memory technologies are explored. Spin transfer torque magnetoresistive RAM (STT-MRAM) is one such nonvolatile memory relying on magnetic tunnel junctions (MTJs) to store information. It uses spin transfer torque to write information and magnetoresistance to read information. In 2012, Everspin Technologies, Inc. commercialized the first 64Mbit Spin Torque MRAM. On the computing end, nanomagnetic logic (NML) is a promising technique with zero leakage and high data retention. In 2000, Cowburn and Welland first demonstrated its potential in logic and information propagation through magnetostatic interaction in a chain of single domain circular nanomagnetic dots of Supermalloy (Ni80Fe14Mo5X1, X is other metals). In 2006, Imre et al. demonstrated wires and majority gates followed by coplanar cross wire systems demonstration in 2010 by Pulecio et al. Since 2004 researchers have also investigated the potential of MTJs in logic. More recently with dipolar coupling between MTJs demonstrated in 2012, logic-in-memory architecture with STT-MRAM have been investigated. The architecture borrows the computing concept from NML and read and write style from MRAM. The architecture can switch its operation between logic and memory modes with clock as classifier. Further through logic partitioning between MTJ and CMOS plane, a significant performance boost has been observed in basic computing blocks within the architecture. In this work, we have explored the developments in NML, in MTJs and more recent developments in hybrid MTJ/CMOS logic-in-memory architecture and its unique logic partitioning capability.

  15. Bubble memory module for spacecraft application

    NASA Technical Reports Server (NTRS)

    Hayes, P. J.; Looney, K. T.; Nichols, C. D.

    1985-01-01

    Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

  16. One bipolar transistor selector - One resistive random access memory device for cross bar memory array

    NASA Astrophysics Data System (ADS)

    Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

    2017-09-01

    A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

  17. Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation

    DOE PAGES

    Bender, Michael A.; Berry, Jonathan W.; Hammond, Simon D.; ...

    2017-01-03

    A challenge in computer architecture is that processors often cannot be fed data from DRAM as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth bound. With this motivation and the realization that traditional architectures (with all DRAM reachable only via bus) are insufficient to feed groups of modern processing units, vendors have introduced a variety of non-DDR 3D memory technologies (Hybrid Memory Cube (HMC),Wide I/O 2, High Bandwidth Memory (HBM)). These offer higher bandwidth and lower power by stacking DRAM chips on the processor or nearby on a silicon interposer. We will call these solutions “near-memory,” andmore » if user-addressable, “scratchpad.” High-performance systems on the market now offer two levels of main memory: near-memory on package and traditional DRAM further away. In the near term we expect the latencies near-memory and DRAM to be similar. Here, it is natural to think of near-memory as another module on the DRAM level of the memory hierarchy. Vendors are expected to offer modes in which the near memory is used as cache, but we believe that this will be inefficient.« less

  18. Optoelectronic-cache memory system architecture.

    PubMed

    Chiarulli, D M; Levitan, S P

    1996-05-10

    We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

  19. Effects of a multimedia project on users' knowledge about normal forgetting and serious memory loss.

    PubMed

    Mahoney, Diane Feeney; Tarlow, Barbara J; Jones, Richard N; Sandaire, Johnny

    2002-01-01

    The aim of the project was to develop and evaluate the effectiveness of a CD-ROM-based multimedia program as a tool to increase user's knowledge about the differences between "normal" forgetfulness and more serious memory loss associated with Alzheimer's disease. The research was a controlled randomized study conducted with 113 adults who were recruited from the community and who expressed a concern about memory loss in a family member. The intervention group (n=56) viewed a module entitled "Forgetfulness: What's Normal and What's Not" on a laptop computer in their homes; the control group (n=57) did not. Both groups completed a 25-item knowledge-about-memory-loss test (primary outcome) and a sociodemographic and technology usage questionnaire; the intervention group also completed a CD-ROM user's evaluation. The mean (SD) number of correct responses to the knowledge test was 14.2 (4.5) for controls and 19.7 (3.1) for intervention participants. This highly significant difference (p<0.001) corresponds to a very large effect size. The program was most effective for participants with a lower level of self-reported prior knowledge about memory loss and Alzheimer's disease (p=0.02). Viewers were very satisfied with the program and felt that it was easy to use and understand. They particularly valued having personal access to a confidential source that permitted them to become informed about memory loss without public disclosure. This multimedia CD-ROM technology program provides an efficient and effective means of teaching older adults about memory loss and ways to distinguish benign from serious memory loss. It uniquely balances public community outreach education and personal privacy.

  20. Kinetic Inductance Memory Cell and Architecture for Superconducting Computers

    NASA Astrophysics Data System (ADS)

    Chen, George J.

    Josephson memory devices typically use a superconducting loop containing one or more Josephson junctions to store information. The magnetic inductance of the loop in conjunction with the Josephson junctions provides multiple states to store data. This thesis shows that replacing the magnetic inductor in a memory cell with a kinetic inductor can lead to a smaller cell size. However, magnetic control of the cells is lost. Thus, a current-injection based architecture for a memory array has been designed to work around this problem. The isolation between memory cells that magnetic control provides is provided through resistors in this new architecture. However, these resistors allow leakage current to flow which ultimately limits the size of the array due to power considerations. A kinetic inductance memory array will be limited to 4K bits with a read access time of 320 ps for a 1 um linewidth technology. If a power decoder could be developed, the memory architecture could serve as the blueprint for a fast (<1 ns), large scale (>1 Mbit) superconducting memory array.

  1. Working Memory and Neurofeedback.

    PubMed

    YuLeung To, Eric; Abbott, Kathy; Foster, Dale S; Helmer, D'Arcy

    2016-01-01

    Impairments in working memory are typically associated with impairments in other cognitive faculties such as attentional processes and short-term memory. This paper briefly introduces neurofeedback as a treatment modality in general, and, more specifically, we review several of the current modalities successfully used in neurofeedback (NF) for the treatment of working memory deficits. Two case studies are presented to illustrate how neurofeedback is applied in treatment. The development of Low Resolution Electromagnetic Tomography (LORETA) and its application in neurofeedback now makes it possible to specifically target deep cortical/subcortical brain structures. Developments in neuroscience concerning neural networks, combined with highly specific yet practical NF technologies, makes neurofeedback of particular interest to neuropsychological practice, including the emergence of specific methodologies for treating very difficult working memory (WM) problems.

  2. Self-erecting shapes

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Reading, Matthew W.

    Technologies for making self-erecting structures are described herein. An exemplary self-erecting structure comprises a plurality of shape-memory members that connect two or more hub components. When forces are applied to the self-erecting structure, the shape-memory members can deform, and when the forces are removed the shape-memory members can return to their original pre-deformation shape, allowing the self-erecting structure to return to its own original shape under its own power. A shape of the self-erecting structure depends on a spatial orientation of the hub components, and a relative orientation of the shape-memory members, which in turn depends on an orientation ofmore » joining of the shape-memory members with the hub components.« less

  3. Nanoscale phase change memory materials.

    PubMed

    Caldwell, Marissa A; Jeyasingh, Rakesh Gnana David; Wong, H-S Philip; Milliron, Delia J

    2012-08-07

    Phase change memory materials store information through their reversible transitions between crystalline and amorphous states. For typical metal chalcogenide compounds, their phase transition properties directly impact critical memory characteristics and the manipulation of these is a major focus in the field. Here, we discuss recent work that explores the tuning of such properties by scaling the materials to nanoscale dimensions, including fabrication and synthetic strategies used to produce nanoscale phase change memory materials. The trends that emerge are relevant to understanding how such memory technologies will function as they scale to ever smaller dimensions and also suggest new approaches to designing materials for phase change applications. Finally, the challenges and opportunities raised by integrating nanoscale phase change materials into switching devices are discussed.

  4. From photons to phonons and back: a THz optical memory in diamond.

    PubMed

    England, D G; Bustard, P J; Nunn, J; Lausten, R; Sussman, B J

    2013-12-13

    Optical quantum memories are vital for the scalability of future quantum technologies, enabling long-distance secure communication and local synchronization of quantum components. We demonstrate a THz-bandwidth memory for light using the optical phonon modes of a room temperature diamond. This large bandwidth makes the memory compatible with down-conversion-type photon sources. We demonstrate that four-wave mixing noise in this system is suppressed by material dispersion. The resulting noise floor is just 7×10(-3) photons per pulse, which establishes that the memory is capable of storing single quanta. We investigate the principle sources of noise in this system and demonstrate that high material dispersion can be used to suppress four-wave mixing noise in Λ-type systems.

  5. A method to compute SEU fault probabilities in memory arrays with error correction

    NASA Technical Reports Server (NTRS)

    Gercek, Gokhan

    1994-01-01

    With the increasing packing densities in VLSI technology, Single Event Upsets (SEU) due to cosmic radiations are becoming more of a critical issue in the design of space avionics systems. In this paper, a method is introduced to compute the fault (mishap) probability for a computer memory of size M words. It is assumed that a Hamming code is used for each word to provide single error correction. It is also assumed that every time a memory location is read, single errors are corrected. Memory is read randomly whose distribution is assumed to be known. In such a scenario, a mishap is defined as two SEU's corrupting the same memory location prior to a read. The paper introduces a method to compute the overall mishap probability for the entire memory for a mission duration of T hours.

  6. High efficiency coherent optical memory with warm rubidium vapour

    PubMed Central

    Hosseini, M.; Sparkes, B.M.; Campbell, G.; Lam, P.K.; Buchler, B.C.

    2011-01-01

    By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory. PMID:21285952

  7. High efficiency coherent optical memory with warm rubidium vapour.

    PubMed

    Hosseini, M; Sparkes, B M; Campbell, G; Lam, P K; Buchler, B C

    2011-02-01

    By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory.

  8. Modeling and Bayesian Parameter Estimation for Shape Memory Alloy Bending Actuators

    DTIC Science & Technology

    2012-02-01

    prosthetic hand,” Technology and Health Care 10, 91–106 (2002). 4. Hartl , D., Lagoudas, D., Calkins, F., and Mabe , J., “Use of a ni60ti shape memory...alloy for active jet engine chevron application: I. thermomechanical characterization,” Smart Materials and Structures 19, 1–14 (2010). 5. Hartl , D...Lagoudas, D., Calkins, F., and Mabe , J., “Use of a ni60ti shape memory alloy for active jet engine chevron application: II. experimentally validated

  9. A review of aspects relating to the improvement of holographic memory technology

    NASA Astrophysics Data System (ADS)

    Vyukhina, N. N.; Gibin, I. S.; Dombrovsky, V. A.; Dombrovsky, S. A.; Pankov, B. N.; Pen, E. F.; Potapov, A. N.; Sinyukov, A. M.; Tverdokhleb, P. E.; Shelkovnikov, V. V.

    1996-06-01

    Results of studying a holographic memory to write/read digital data pages are presented. The research has been carried out in Novosibirsk, Russia. Great attention was paid to methods of improving recording density and the reliability of data reading, the development of 'dry' photopolymers that provide recording of superimposed three-dimensional phase holograms, and the designing of parallel optic input large-scale integration (LSI) for reading and logical processing of data arriving from the holographic memory.

  10. Sparse distributed memory: Principles and operation

    NASA Technical Reports Server (NTRS)

    Flynn, M. J.; Kanerva, P.; Bhadkamkar, N.

    1989-01-01

    Sparse distributed memory is a generalized random access memory (RAM) for long (1000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment, in general, in dealing with real world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. Major design issues were resolved which were faced in building the memories. The design is described of a prototype memory with 256 bit addresses and from 8 to 128 K locations for 256 bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components.

  11. Fast maximum intensity projections of large medical data sets by exploiting hierarchical memory architectures.

    PubMed

    Kiefer, Gundolf; Lehmann, Helko; Weese, Jürgen

    2006-04-01

    Maximum intensity projections (MIPs) are an important visualization technique for angiographic data sets. Efficient data inspection requires frame rates of at least five frames per second at preserved image quality. Despite the advances in computer technology, this task remains a challenge. On the one hand, the sizes of computed tomography and magnetic resonance images are increasing rapidly. On the other hand, rendering algorithms do not automatically benefit from the advances in processor technology, especially for large data sets. This is due to the faster evolving processing power and the slower evolving memory access speed, which is bridged by hierarchical cache memory architectures. In this paper, we investigate memory access optimization methods and use them for generating MIPs on general-purpose central processing units (CPUs) and graphics processing units (GPUs), respectively. These methods can work on any level of the memory hierarchy, and we show that properly combined methods can optimize memory access on multiple levels of the hierarchy at the same time. We present performance measurements to compare different algorithm variants and illustrate the influence of the respective techniques. On current hardware, the efficient handling of the memory hierarchy for CPUs improves the rendering performance by a factor of 3 to 4. On GPUs, we observed that the effect is even larger, especially for large data sets. The methods can easily be adjusted to different hardware specifics, although their impact can vary considerably. They can also be used for other rendering techniques than MIPs, and their use for more general image processing task could be investigated in the future.

  12. Dismount Threat Recognition through Automatic Pose Identification

    DTIC Science & Technology

    2012-03-01

    10 2.2.2 Enabling Technologies . . . . . . . . . . . . . . 11 2.2.3 Associative Memory Neural Networks . . . . . . 12 III. Methodology...20 3.2.3 Creating Separability . . . . . . . . . . . . . . . 23 3.3 Training the Associative Memory Neural Network... Effects of Parameter and Method Choices . . . . . . . . 30 4.3.1 Decimel versus Bipolar . . . . . . . . . . . . . . 30 4.3.2 Bipolar and Binary Values

  13. Intellectual system for images restoration

    NASA Astrophysics Data System (ADS)

    Mardare, Igor

    2005-02-01

    Intelligence systems on basis of artificial neural networks and associative memory allow to solve effectively problems of recognition and restoration of images. However, within analytical technologies there are no dominating approaches of deciding of intellectual problems. Choice of the best technology depends on nature of problem, features of objects, volume of represented information about the object, number of classes of objects, etc. It is required to determine opportunities, preconditions and field of application of neural networks and associative memory for decision of problem of restoration of images and to use their supplementary benefits for further development of intelligence systems.

  14. Three-dimensional magnetic bubble memory system

    NASA Technical Reports Server (NTRS)

    Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

  15. Fault tolerant computing: A preamble for assuring viability of large computer systems

    NASA Technical Reports Server (NTRS)

    Lim, R. S.

    1977-01-01

    The need for fault-tolerant computing is addressed from the viewpoints of (1) why it is needed, (2) how to apply it in the current state of technology, and (3) what it means in the context of the Phoenix computer system and other related systems. To this end, the value of concurrent error detection and correction is described. User protection, program retry, and repair are among the factors considered. The technology of algebraic codes to protect memory systems and arithmetic codes to protect memory systems and arithmetic codes to protect arithmetic operations is discussed.

  16. Fast Response Shape Memory Effect Titanium Nickel (TiNi) Foam Torque Tubes

    NASA Technical Reports Server (NTRS)

    Jardine, Peter

    2014-01-01

    Shape Change Technologies has developed a process to manufacture net-shaped TiNi foam torque tubes that demonstrate the shape memory effect. The torque tubes dramatically reduce response time by a factor of 10. This Phase II project matured the actuator technology by rigorously characterizing the process to optimize the quality of the TiNi and developing a set of metrics to provide ISO 9002 quality assurance. A laboratory virtual instrument engineering workbench (LabVIEW'TM')-based, real-time control of the torsional actuators was developed. These actuators were developed with The Boeing Company for aerospace applications.

  17. Integration of Multi-Functional Oxide Thin Film Heterostructures with III-V Semiconductors

    NASA Astrophysics Data System (ADS)

    Rahman, Md. Shafiqur

    Integration of multi-functional oxide thin films with semiconductors has attracted considerable attention in recent years due to their potential applications in sensing and logic functionalities that can be incorporated in future system-on-a-chip devices. III-V semiconductor, for example, GaAs, have higher saturated electron velocity and mobility allowing transistors based on GaAs to operate at a much higher frequency with less noise compared to Si. In addition, because of its direct bandgap a number of efficient optical devices are possible and by oxide integrating with other III-V semiconductors the wavelengths can be made tunable through hetero-engineering of the bandgap. This study, based on the use of SrTiO3 (STO) films grown on GaAs (001) substrates by molecular beam epitaxy (MBE) as an intermediate buffer layer for the hetero-epitaxial growth of ferromagnetic La0.7Sr 0.3MnO3 (LSMO) and room temperature multiferroic BiFeO 3 (BFO) thin films and superlattice structures using pulsed laser deposition (PLD). The properties of the multilayer thin films in terms of growth modes, lattice spacing/strain, interface structures and texture were characterized by the in-situ reflection high energy electron diffraction (RHEED). The crystalline quality and chemical composition of the complex oxide heterostructures were investigated by a combination of X-ray diffraction (XRD) and X-ray photoelectron absorption spectroscopy (XPS). Surface morphology, piezo-response with domain structure, and ferroelectric switching observations were carried out on the thin film samples using a scanning probe microscope operated as a piezoresponse force microscopy (PFM) in the contact mode. The magnetization measurements with field cooling exhibit a surprising increment in magnetic moment with enhanced magnetic hysteresis squareness. This is the effect of exchange interaction between the antiferromagnetic BFO and the ferromagnetic LSMO at the interface. The integration of BFO materials with LSMO on GaAs substrate also facilitated the demonstration of resistive random access memory (ReRAM) devices which can be faster with lower energy consumption compared to present commercial technologies. Ferroelectric switching observations using piezoresponse force microscopy show polarization switching demonstrating its potential for read-write operation in NVM devices. The ferroelectric and electrical characterization exhibit strong resistive switching with low SET/RESET voltages. Furthermore, a prototypical epitaxial field effect transistor based on multiferroic BFO as the gate dielectric and ferromagnetic LSMO as the conducting channel was also demonstrated. The device exhibits a modulation in channel conductance with high ON/OFF ratio. The measured nanostructure and physical-compositional results from the multilayer are correlated with their corresponding dielectric, piezoelectric, and ferroelectric properties. These results provide an understanding of the heteroepitaxial growth of ferroelectric (FE)-antiferromagnetic (AFM) BFO on ferromagnetic LSMO as a simple thin film or superlattice structure, integrated on STO buffered GaAs (001) with full control over the interface structure at the atomic-scale. This work also represents the first step toward the realization of magnetoelectronic devices integrated with GaAs (001).

  18. Optical RAM-enabled cache memory and optical routing for chip multiprocessors: technologies and architectures

    NASA Astrophysics Data System (ADS)

    Pleros, Nikos; Maniotis, Pavlos; Alexoudi, Theonitsa; Fitsios, Dimitris; Vagionas, Christos; Papaioannou, Sotiris; Vyrsokinos, K.; Kanellos, George T.

    2014-03-01

    The processor-memory performance gap, commonly referred to as "Memory Wall" problem, owes to the speed mismatch between processor and electronic RAM clock frequencies, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In this article, we present our recent work spanning from Si-based integrated optical RAM cell architectures up to complete optical cache memory architectures for Chip Multiprocessor configurations. Moreover, we discuss on e/o router subsystems with up to Tb/s routing capacity for cache interconnection purposes within CMP configurations, currently pursued within the FP7 PhoxTrot project.

  19. Fatigue Resistance of Liquid-assisted Self-repairing Aluminum Alloys Reinforced with Shape Memory Alloys

    NASA Technical Reports Server (NTRS)

    Wright, M. Clara; Manuel, Michele; Wallace, Terryl

    2013-01-01

    A self-repairing aluminum-based composite system has been developed using a liquid-assisted healing theory in conjunction with the shape memory effect of wire reinforcements. The metal-metal composite was thermodynamically designed to have a matrix with a relatively even dispersion of a low-melting eutectic phase, allowing for repair of cracks at a predetermined temperature. Additionally, shape memory alloy (SMA) wire reinforcements were used within the composite to provide crack closure. Investigators focused the research on fatigue cracks propagating through the matrix in order to show a proof-of-concept Shape Memory Alloy Self-Healing (SMASH) technology for aeronautical applications.

  20. Electric-field-controlled interface dipole modulation for Si-based memory devices.

    PubMed

    Miyata, Noriyuki

    2018-05-31

    Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

  1. Think globally and solve locally: secondary memory-based network learning for automated multi-species function prediction

    PubMed Central

    2014-01-01

    Background Network-based learning algorithms for automated function prediction (AFP) are negatively affected by the limited coverage of experimental data and limited a priori known functional annotations. As a consequence their application to model organisms is often restricted to well characterized biological processes and pathways, and their effectiveness with poorly annotated species is relatively limited. A possible solution to this problem might consist in the construction of big networks including multiple species, but this in turn poses challenging computational problems, due to the scalability limitations of existing algorithms and the main memory requirements induced by the construction of big networks. Distributed computation or the usage of big computers could in principle respond to these issues, but raises further algorithmic problems and require resources not satisfiable with simple off-the-shelf computers. Results We propose a novel framework for scalable network-based learning of multi-species protein functions based on both a local implementation of existing algorithms and the adoption of innovative technologies: we solve “locally” the AFP problem, by designing “vertex-centric” implementations of network-based algorithms, but we do not give up thinking “globally” by exploiting the overall topology of the network. This is made possible by the adoption of secondary memory-based technologies that allow the efficient use of the large memory available on disks, thus overcoming the main memory limitations of modern off-the-shelf computers. This approach has been applied to the analysis of a large multi-species network including more than 300 species of bacteria and to a network with more than 200,000 proteins belonging to 13 Eukaryotic species. To our knowledge this is the first work where secondary-memory based network analysis has been applied to multi-species function prediction using biological networks with hundreds of thousands of proteins. Conclusions The combination of these algorithmic and technological approaches makes feasible the analysis of large multi-species networks using ordinary computers with limited speed and primary memory, and in perspective could enable the analysis of huge networks (e.g. the whole proteomes available in SwissProt), using well-equipped stand-alone machines. PMID:24843788

  2. Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory

    NASA Astrophysics Data System (ADS)

    Wouters, D. J.; Maes, D.; Goux, L.; Lisoni, J. G.; Paraschiv, V.; Johnson, J. A.; Schwitters, M.; Everaert, J.-L.; Boullart, W.; Schaekers, M.; Willegems, M.; Vander Meeren, H.; Haspeslagh, L.; Artoni, C.; Caputa, C.; Casella, P.; Corallo, G.; Russo, G.; Zambrano, R.; Monchoix, H.; Vecchio, G.; Van Autryve, L.

    2006-09-01

    Ferroelectric random access memory (FeRAM) is an attractive candidate technology for embedded nonvolatile memory, especially in applications where low power and high program speed are important. Market introduction of high-density FeRAM is, however, lagging behind standard complementary metal-oxide semiconductor (CMOS) because of the difficult integration technology. This paper discusses the major integration issues for high-density FeRAM, based on SrBi2Ta2O9 (strontium bismuth tantalate or SBT), in relation to the fabrication of our stacked cell structure. We have worked in the previous years on the development of SBT-FeRAM integration technology, based on a so-called pseudo-three-dimensional (3D) cell, with a capacitor that can be scaled from quasi two-dimensional towards a true three-dimensional capacitor where the sidewalls will importantly contribute to the signal. In the first phase of our integration development, we integrated our FeRAM cell in a 0.35μm CMOS technology. In a second phase, then, possibility of scaling of our cell is demonstrated in 0.18μm technology. The excellent electrical and reliability properties of the small integrated ferroelectric capacitors prove the feasibility of the technology, while the verification of the potential 3D effect confirms the basic scaling potential of our concept beyond that of the single-mask capacitor. The paper outlines the different material and technological challenges, and working solutions are demonstrated. While some issues are specific to our own cell, many are applicable to different stacked FeRAM cell concepts, or will become more general concerns when more developments are moving into 3D structures.

  3. Research on Optical Transmitter and Receiver Module Used for High-Speed Interconnection between CPU and Memory

    NASA Astrophysics Data System (ADS)

    He, Huimin; Liu, Fengman; Li, Baoxia; Xue, Haiyun; Wang, Haidong; Qiu, Delong; Zhou, Yunyan; Cao, Liqiang

    2016-11-01

    With the development of the multicore processor, the bandwidth and capacity of the memory, rather than the memory area, are the key factors in server performance. At present, however, the new architectures, such as fully buffered DIMM (FBDIMM), hybrid memory cube (HMC), and high bandwidth memory (HBM), cannot be commercially applied in the server. Therefore, a new architecture for the server is proposed. CPU and memory are separated onto different boards, and optical interconnection is used for the communication between them. Each optical module corresponds to each dual inline memory module (DIMM) with 64 channels. Compared to the previous technology, not only can the architecture realize high-capacity and wide-bandwidth memory, it also can reduce power consumption and cost, and be compatible with the existing dynamic random access memory (DRAM). In this article, the proposed module with system-in-package (SiP) integration is demonstrated. In the optical module, the silicon photonic chip is included, which is a promising technology to be applied in the next-generation data exchanging centers. And due to the bandwidth-distance performance of the optical interconnection, SerDes chips are introduced to convert the 64-bit data at 800 Mbps from/to 4-channel data at 12.8 Gbps after/before they are transmitted though optical fiber. All the devices are packaged on cheap organic substrates. To ensure the performance of the whole system, several optimization efforts have been performed on the two modules. High-speed interconnection traces have been designed and simulated with electromagnetic simulation software. Steady-state thermal characteristics of the transceiver module have been evaluated by ANSYS APLD based on finite-element methodology (FEM). Heat sinks are placed at the hotspot area to ensure the reliability of all working chips. Finally, this transceiver system based on silicon photonics is measured, and the eye diagrams of data and clock signals are verified.

  4. Finite-Time Stability for Fractional-Order Bidirectional Associative Memory Neural Networks with Time Delays

    NASA Astrophysics Data System (ADS)

    Xu, Chang-Jin; Li, Pei-Luan; Pang, Yi-Cheng

    2017-02-01

    This paper is concerned with fractional-order bidirectional associative memory (BAM) neural networks with time delays. Applying Laplace transform, the generalized Gronwall inequality and estimates of Mittag-Leffler functions, some sufficient conditions which ensure the finite-time stability of fractional-order bidirectional associative memory neural networks with time delays are obtained. Two examples with their simulations are given to illustrate the theoretical findings. Our results are new and complement previously known results. Supported by National Natural Science Foundation of China under Grant Nos.~61673008, 11261010, 11101126, Project of High-Level Innovative Talents of Guizhou Province ([2016]5651), Natural Science and Technology Foundation of Guizhou Province (J[2015]2025 and J[2015]2026), 125 Special Major Science and Technology of Department of Education of Guizhou Province ([2012]011) and Natural Science Foundation of the Education Department of Guizhou Province (KY[2015]482)

  5. Quantum memristors

    DOE PAGES

    Pfeiffer, P.; Egusquiza, I. L.; Di Ventra, M.; ...

    2016-07-06

    Technology based on memristors, resistors with memory whose resistance depends on the history of the crossing charges, has lately enhanced the classical paradigm of computation with neuromorphic architectures. However, in contrast to the known quantized models of passive circuit elements, such as inductors, capacitors or resistors, the design and realization of a quantum memristor is still missing. Here, we introduce the concept of a quantum memristor as a quantum dissipative device, whose decoherence mechanism is controlled by a continuous-measurement feedback scheme, which accounts for the memory. Indeed, we provide numerical simulations showing that memory effects actually persist in the quantummore » regime. Our quantization method, specifically designed for superconducting circuits, may be extended to other quantum platforms, allowing for memristor-type constructions in different quantum technologies. As a result, the proposed quantum memristor is then a building block for neuromorphic quantum computation and quantum simulations of non-Markovian systems.« less

  6. Filamentary model in resistive switching materials

    NASA Astrophysics Data System (ADS)

    Jasmin, Alladin C.

    2017-12-01

    The need for next generation computer devices is increasing as the demand for efficient data processing increases. The amount of data generated every second also increases which requires large data storage devices. Oxide-based memory devices are being studied to explore new research frontiers thanks to modern advances in nanofabrication. Various oxide materials are studied as active layers for non-volatile memory. This technology has potential application in resistive random-access-memory (ReRAM) and can be easily integrated in CMOS technologies. The long term perspective of this research field is to develop devices which mimic how the brain processes information. To realize such application, a thorough understanding of the charge transport and switching mechanism is important. A new perspective in the multistate resistive switching based on current-induced filament dynamics will be discussed. A simple equivalent circuit of the device gives quantitative information about the nature of the conducting filament at different resistance states.

  7. Adaptive microwave impedance memory effect in a ferromagnetic insulator.

    PubMed

    Lee, Hanju; Friedman, Barry; Lee, Kiejin

    2016-12-14

    Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures.

  8. Adaptive microwave impedance memory effect in a ferromagnetic insulator

    PubMed Central

    Lee, Hanju; Friedman, Barry; Lee, Kiejin

    2016-01-01

    Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures. PMID:27966536

  9. Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing

    NASA Astrophysics Data System (ADS)

    Rao, Feng; Ding, Keyuan; Zhou, Yuxing; Zheng, Yonghui; Xia, Mengjiao; Lv, Shilong; Song, Zhitang; Feng, Songlin; Ronneberger, Ider; Mazzarello, Riccardo; Zhang, Wei; Ma, Evan

    2017-12-01

    Operation speed is a key challenge in phase-change random-access memory (PCRAM) technology, especially for achieving subnanosecond high-speed cache memory. Commercialized PCRAM products are limited by the tens of nanoseconds writing speed, originating from the stochastic crystal nucleation during the crystallization of amorphous germanium antimony telluride (Ge2Sb2Te5). Here, we demonstrate an alloying strategy to speed up the crystallization kinetics. The scandium antimony telluride (Sc0.2Sb2Te3) compound that we designed allows a writing speed of only 700 picoseconds without preprogramming in a large conventional PCRAM device. This ultrafast crystallization stems from the reduced stochasticity of nucleation through geometrically matched and robust scandium telluride (ScTe) chemical bonds that stabilize crystal precursors in the amorphous state. Controlling nucleation through alloy design paves the way for the development of cache-type PCRAM technology to boost the working efficiency of computing systems.

  10. Scientific developments of liquid crystal-based optical memory: a review

    NASA Astrophysics Data System (ADS)

    Prakash, Jai; Chandran, Achu; Biradar, Ashok M.

    2017-01-01

    The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

  11. Scientific developments of liquid crystal-based optical memory: a review.

    PubMed

    Prakash, Jai; Chandran, Achu; Biradar, Ashok M

    2017-01-01

    The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

  12. Design of a fault tolerant airborne digital computer. Volume 2: Computational requirements and technology

    NASA Technical Reports Server (NTRS)

    Ratner, R. S.; Shapiro, E. B.; Zeidler, H. M.; Wahlstrom, S. E.; Clark, C. B.; Goldberg, J.

    1973-01-01

    This final report summarizes the work on the design of a fault tolerant digital computer for aircraft. Volume 2 is composed of two parts. Part 1 is concerned with the computational requirements associated with an advanced commercial aircraft. Part 2 reviews the technology that will be available for the implementation of the computer in the 1975-1985 period. With regard to the computation task 26 computations have been categorized according to computational load, memory requirements, criticality, permitted down-time, and the need to save data in order to effect a roll-back. The technology part stresses the impact of large scale integration (LSI) on the realization of logic and memory. Also considered was module interconnection possibilities so as to minimize fault propagation.

  13. Sparse distributed memory overview

    NASA Technical Reports Server (NTRS)

    Raugh, Mike

    1990-01-01

    The Sparse Distributed Memory (SDM) project is investigating the theory and applications of massively parallel computing architecture, called sparse distributed memory, that will support the storage and retrieval of sensory and motor patterns characteristic of autonomous systems. The immediate objectives of the project are centered in studies of the memory itself and in the use of the memory to solve problems in speech, vision, and robotics. Investigation of methods for encoding sensory data is an important part of the research. Examples of NASA missions that may benefit from this work are Space Station, planetary rovers, and solar exploration. Sparse distributed memory offers promising technology for systems that must learn through experience and be capable of adapting to new circumstances, and for operating any large complex system requiring automatic monitoring and control. Sparse distributed memory is a massively parallel architecture motivated by efforts to understand how the human brain works. Sparse distributed memory is an associative memory, able to retrieve information from cues that only partially match patterns stored in the memory. It is able to store long temporal sequences derived from the behavior of a complex system, such as progressive records of the system's sensory data and correlated records of the system's motor controls.

  14. Using 100G Network Technology in Support of Petascale Science

    NASA Technical Reports Server (NTRS)

    Gary, James P.

    2011-01-01

    NASA in collaboration with a number of partners conducted a set of individual experiments and demonstrations during SC 10 that collectively were titled "Using 100G Network Technology in Support of Petascale Science". The partners included the iCAIR, Internet2, LAC, MAX, National LambdaRail (NLR), NOAA and SCinet Research Sandbox (SRS) as well as the vendors Ciena, Cisco, ColorChip, cPacket, Extreme Networks, Fusion-io, HP and Panduit who most generously allowed some of their leading edge 40G/100G optical transport, Ethernet switch and Internet Protocol router equipment and file server technologies to be involved. The experiments and demonstrations featured different vendor-provided 40G/100G network technology solutions for full-duplex 40G and 100G LAN data flows across SRS-deployed single-node fiber-pairs among the Exhibit Booths of NASA, the National Center for Data lining, NOAA and the SCinet Network Operations Center, as well as between the NASA Exhibit Booth in New Orleans and the Starlight Communications Exchange facility in Chicago across special SC 10- only 80- and 100-Gbps wide area network links provisioned respectively by the NLR and Internet2, then on to GSFC across a 40-Gbps link. provisioned by the Mid-Atlantic Crossroads. The networks and vendor equipment were load-stressed by sets of NASA/GSFC High End Computer Network Team-built, relatively inexpensive, net-test-workstations that are capable of demonstrating greater than 100Gbps uni-directional nuttcp-enabled memory-to-memory data transfers, greater than 80-Gbps aggregate--bidirectional memory-to-memory data transfers, and near 40-Gbps uni-directional disk-to-disk file copying. This paper will summarize the background context, key accomplishments and some significances of these experiments and demonstrations.

  15. Memory for Lectures: How Lecture Format Impacts the Learning Experience

    PubMed Central

    Varao-Sousa, Trish L.; Kingstone, Alan

    2015-01-01

    The present study investigated what impact the presentation style of a classroom lecture has on memory, mind wandering, and the subjective factors of interest and motivation. We examined if having a professor lecturing live versus on video alters the learning experience of the students in the classroom. During the lectures, students were asked to report mind wandering and later complete a memory test. The lecture format was manipulated such that all the students received two lectures, one live and one a pre-recorded video. Results indicate that lecture format affected memory performance but not mind wandering, with enhanced memory in the live lectures. Additionally, students reported greater interest and motivation in the live lectures. Given that a single change to the classroom environment, professor presence, impacted memory performance, as well as motivation and interest, the present results have several key implications for technology-based integrations into higher education classrooms. PMID:26561235

  16. Memory for Lectures: How Lecture Format Impacts the Learning Experience.

    PubMed

    Varao-Sousa, Trish L; Kingstone, Alan

    2015-01-01

    The present study investigated what impact the presentation style of a classroom lecture has on memory, mind wandering, and the subjective factors of interest and motivation. We examined if having a professor lecturing live versus on video alters the learning experience of the students in the classroom. During the lectures, students were asked to report mind wandering and later complete a memory test. The lecture format was manipulated such that all the students received two lectures, one live and one a pre-recorded video. Results indicate that lecture format affected memory performance but not mind wandering, with enhanced memory in the live lectures. Additionally, students reported greater interest and motivation in the live lectures. Given that a single change to the classroom environment, professor presence, impacted memory performance, as well as motivation and interest, the present results have several key implications for technology-based integrations into higher education classrooms.

  17. Radiation Tolerant Intelligent Memory Stack (RTIMS)

    NASA Technical Reports Server (NTRS)

    Ng, Tak-kwong; Herath, Jeffrey A.

    2006-01-01

    The Radiation Tolerant Intelligent Memory Stack (RTIMS), suitable for both geostationary and low earth orbit missions, has been developed. The memory module is fully functional and undergoing environmental and radiation characterization. A self-contained flight-like module is expected to be completed in 2006. RTIMS provides reconfigurable circuitry and 2 gigabits of error corrected or 1 gigabit of triple redundant digital memory in a small package. RTIMS utilizes circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuitries are stacked into a module of 42.7mm x 42.7mm x 13.00mm. Triple module redundancy, current limiting, configuration scrubbing, and single event function interrupt detection are employed to mitigate radiation effects. The mitigation techniques significantly simplify system design. RTIMS is well suited for deployment in real-time data processing, reconfigurable computing, and memory intensive applications.

  18. The "Economy of Memory": Publications, Citations, and the Paradox of Effective Research Governance

    ERIC Educational Resources Information Center

    Woelert, Peter

    2013-01-01

    More recent advancements in digital technologies have significantly alleviated the dissemination of new scientific ideas as well as the storing, searching and retrieval of large amounts of published research findings. While not denying the benefits of this novel "economy of memory," this paper endeavors to shed light on the ways in which…

  19. Future-Minded: Aaron Schmidt--Thomas Ford Memorial Library, IL

    ERIC Educational Resources Information Center

    Library Journal, 2005

    2005-01-01

    Like many young people, Aaron Schmidt loves electronic gadgets. But not for their own sake. He believes the future of libraries depends on how well we meet the needs of today's young adults, who are far more tech-fluent than most librarians. As reference librarian and all-around technology guru at Thomas Ford Memorial Library, Schmidt created the…

  20. Neil Postman and the Critique of Technology (In Memory of Neil Postman Who Died on October 5, 2003)

    ERIC Educational Resources Information Center

    van der Laan, J. M.

    2004-01-01

    This (by no means exhaustive) survey of Postman's work reflects on his penetrating analyses of contemporary technology. He focused attention on the ways technology today, especially the television and the computer, inevitably change us. The essential questions he asks us to ask (and answer) are, How does technology affect us? Is it for good or…

  1. Synchrony and desynchrony in circadian clocks: impacts on learning and memory

    PubMed Central

    Krishnan, Harini C.

    2015-01-01

    Circadian clocks evolved under conditions of environmental variation, primarily alternating light dark cycles, to enable organisms to anticipate daily environmental events and coordinate metabolic, physiological, and behavioral activities. However, modern lifestyle and advances in technology have increased the percentage of individuals working in phases misaligned with natural circadian activity rhythms. Endogenous circadian oscillators modulate alertness, the acquisition of learning, memory formation, and the recall of memory with examples of circadian modulation of memory observed across phyla from invertebrates to humans. Cognitive performance and memory are significantly diminished when occurring out of phase with natural circadian rhythms. Disruptions in circadian regulation can lead to impairment in the formation of memories and manifestation of other cognitive deficits. This review explores the types of interactions through which the circadian clock modulates cognition, highlights recent progress in identifying mechanistic interactions between the circadian system and the processes involved in memory formation, and outlines methods used to remediate circadian perturbations and reinforce circadian adaptation. PMID:26286653

  2. Setting a disordered password on a photonic memory

    NASA Astrophysics Data System (ADS)

    Su, Shih-Wei; Gou, Shih-Chuan; Chew, Lock Yue; Chang, Yu-Yen; Yu, Ite A.; Kalachev, Alexey; Liao, Wen-Te

    2017-06-01

    An all-optical method of setting a disordered password on different schemes of photonic memory is theoretically studied. While photons are regarded as ideal information carriers, it is imperative to implement such data protection on all-optical storage. However, we wish to address the intrinsic risk of data breaches in existing schemes of photonic memory. We theoretically demonstrate a protocol using spatially disordered laser fields to encrypt data stored on an optical memory, namely, encrypted photonic memory. To address the broadband storage, we also investigate a scheme of disordered echo memory with a high fidelity approaching unity. The proposed method increases the difficulty for the eavesdropper to retrieve the stored photon without the preset password even when the randomized and stored photon state is nearly perfectly cloned. Our results pave ways to significantly reduce the exposure of memories, required for long-distance communication, to eavesdropping and therefore restrict the optimal attack on communication protocols. The present scheme also increases the sensitivity of detecting any eavesdropper and so raises the security level of photonic information technology.

  3. Radiation immune RAM semiconductor technology for the 80's. [Random Access Memory

    NASA Technical Reports Server (NTRS)

    Hanna, W. A.; Panagos, P.

    1983-01-01

    This paper presents current and short term future characteristics of RAM semiconductor technologies which were obtained by literature survey and discussions with cognizant Government and industry personnel. In particular, total ionizing dose tolerance and high energy particle susceptibility of the technologies are addressed. Technologies judged compatible with spacecraft applications are ranked to determine the best current and future technology for fast access (less than 60 ns), radiation tolerant RAM.

  4. Technology and the civil future in space; Proceedings of the Twenty-sixth Goddard Memorial Symposium, Greenbelt, MD, Mar. 16-18, 1988

    NASA Technical Reports Server (NTRS)

    Harris, Leonard A. (Editor)

    1989-01-01

    Reviews, reports, lectures, and panel discussions on technological aspects of current and planned NASA space missions are presented. Included are the viewpoints of NASA, the U.S. aerospace industry, potential commercial users of the civil space infrastructure, and university scientists and engineers. Sections are devoted to technology policy and plans, technology needs, technology directions, and the Astronautical Society student program.

  5. The Effects of Architecture and Process on the Hardness of Programmable Technologies

    NASA Technical Reports Server (NTRS)

    Katz, Richard; Wang, J. J.; Reed, R.; Kleyner, I.; DOrdine, M.; McCollum, J,; Cronquist, B.; Howard, J.

    1999-01-01

    Architecture and process, combined, significantly affect the hardness of programmable technologies. The effects of high energy ions, ferroelectric memory architectures, and shallow trench isolation are investigated. A detailed single event latchup (SEL) study has been performed.

  6. The Warrant for Constructivist Practice within Educational Technology.

    ERIC Educational Resources Information Center

    Bopry, Jeanette

    1999-01-01

    Discusses educational technology as a form of technical rationality and considers the conflict between practitioners' epistemological position as constructivists and technical rationality. Topics include cybernetics; autonomous systems theory; enactive constructivism; representation versus effective action; mind and memory; enaction in artificial…

  7. Systems consolidation revisited, but not revised: The promise and limits of optogenetics in the study of memory.

    PubMed

    Hardt, Oliver; Nadel, Lynn

    2017-12-05

    Episodic memories (in humans) and event-like memories (in non-human animals) require the hippocampus for some time after acquisition, but at remote points seem to depend more on cortical areas instead. Systems consolidation refers to the process that promotes this reorganization of memory. Various theoretical frameworks accounting for this process have been proposed, but clear evidence favoring one or another of these positions has been lacking. Addressing this issue, a recent study deployed some of the most advanced neurobiological technologies - optogenetics and calcium imaging - and provided high resolution, precise observations regarding brain systems involved in recent and remote contextual fear memories. We critically review these findings within their historical context and conclude that they do not resolve the debate concerning systems consolidation. This is because the relevant question concerning the quality of memory at recent and remote time points has not been answered: Does the memory reorganization taking place during systems consolidation result in changes to the content of memory? Copyright © 2017 Elsevier B.V. All rights reserved.

  8. Wavevector multiplexed atomic quantum memory via spatially-resolved single-photon detection.

    PubMed

    Parniak, Michał; Dąbrowski, Michał; Mazelanik, Mateusz; Leszczyński, Adam; Lipka, Michał; Wasilewski, Wojciech

    2017-12-15

    Parallelized quantum information processing requires tailored quantum memories to simultaneously handle multiple photons. The spatial degree of freedom is a promising candidate to facilitate such photonic multiplexing. Using a single-photon resolving camera, we demonstrate a wavevector multiplexed quantum memory based on a cold atomic ensemble. Observation of nonclassical correlations between Raman scattered photons is confirmed by an average value of the second-order correlation function [Formula: see text] in 665 separated modes simultaneously. The proposed protocol utilizing the multimode memory along with the camera will facilitate generation of multi-photon states, which are a necessity in quantum-enhanced sensing technologies and as an input to photonic quantum circuits.

  9. Grand Research Plan for Neural Circuits of Emotion and Memory--current status of neural circuit studies in China.

    PubMed

    Zhu, Yuan-Gui; Cao, He-Qi; Dong, Er-Dan

    2013-02-01

    During recent years, major advances have been made in neuroscience, i.e., asynchronous release, three-dimensional structural data sets, saliency maps, magnesium in brain research, and new functional roles of long non-coding RNAs. Especially, the development of optogenetic technology provides access to important information about relevant neural circuits by allowing the activation of specific neurons in awake mammals and directly observing the resulting behavior. The Grand Research Plan for Neural Circuits of Emotion and Memory was launched by the National Natural Science Foundation of China. It takes emotion and memory as its main objects, making the best use of cutting-edge technologies from medical science, life science and information science. In this paper, we outline the current status of neural circuit studies in China and the technologies and methodologies being applied, as well as studies related to the impairments of emotion and memory. In this phase, we are making efforts to repair the current deficiencies by making adjustments, mainly involving four aspects of core scientific issues to investigate these circuits at multiple levels. Five research directions have been taken to solve important scientific problems while the Grand Research Plan is implemented. Future research into this area will be multimodal, incorporating a range of methods and sciences into each project. Addressing these issues will ensure a bright future, major discoveries, and a higher level of treatment for all affected by debilitating brain illnesses.

  10. Using Assistive Technology in Teaching Children with Learning Disabilities in the 21st Century

    ERIC Educational Resources Information Center

    Adebisi, Rufus Olanrewaju; Liman, Nalado Abubakar; Longpoe, Patricia Kwalzoom

    2015-01-01

    This paper was written to expose the meaning, benefits, and answer why the use of assistive technology for children with learning disabilities. The paper discussed the various types of assistive technology devices that were designed and used to solve written language, reading, listening, memory and mathematic problems of children with learning…

  11. Key Technologies of Phone Storage Forensics Based on ARM Architecture

    NASA Astrophysics Data System (ADS)

    Zhang, Jianghan; Che, Shengbing

    2018-03-01

    Smart phones are mainly running Android, IOS and Windows Phone three mobile platform operating systems. The android smart phone has the best market shares and its processor chips are almost ARM software architecture. The chips memory address mapping mechanism of ARM software architecture is different with x86 software architecture. To forensics to android mart phone, we need to understand three key technologies: memory data acquisition, the conversion mechanism from virtual address to the physical address, and find the system’s key data. This article presents a viable solution which does not rely on the operating system API for a complete solution to these three issues.

  12. Protection of data carriers using secure optical codes

    NASA Astrophysics Data System (ADS)

    Peters, John A.; Schilling, Andreas; Staub, René; Tompkin, Wayne R.

    2006-02-01

    Smartcard technologies, combined with biometric-enabled access control systems, are required for many high-security government ID card programs. However, recent field trials with some of the most secure biometric systems have indicated that smartcards are still vulnerable to well equipped and highly motivated counterfeiters. In this paper, we present the Kinegram Secure Memory Technology which not only provides a first-level visual verification procedure, but also reinforces the existing chip-based security measures. This security concept involves the use of securely-coded data (stored in an optically variable device) which communicates with the encoded hashed information stored in the chip memory via a smartcard reader device.

  13. NASA's 3D Flight Computer for Space Applications

    NASA Technical Reports Server (NTRS)

    Alkalai, Leon

    2000-01-01

    The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

  14. Three Trailblazing Technologies for Schools.

    ERIC Educational Resources Information Center

    McGinty, Tony

    1987-01-01

    Provides an overview of the capabilities and potential educational applications of CD-ROM (compact disk read-only memory), artificial intelligence, and speech technology. Highlights include reference materials on CD-ROM; current developments in CD-I (compact disk interactive); synthesized and digital speech for microcomputers, including specific…

  15. Wearable Cameras Are Useful Tools to Investigate and Remediate Autobiographical Memory Impairment: A Systematic PRISMA Review.

    PubMed

    Allé, Mélissa C; Manning, Liliann; Potheegadoo, Jevita; Coutelle, Romain; Danion, Jean-Marie; Berna, Fabrice

    2017-03-01

    Autobiographical memory, central in human cognition and every day functioning, enables past experienced events to be remembered. A variety of disorders affecting autobiographical memory are characterized by the difficulty of retrieving specific detailed memories of past personal events. Owing to the impact of autobiographical memory impairment on patients' daily life, it is necessary to better understand these deficits and develop relevant methods to improve autobiographical memory. The primary objective of the present systematic PRISMA review was to give an overview of the first empirical evidence of the potential of wearable cameras in autobiographical memory investigation in remediating autobiographical memory impairments. The peer-reviewed literature published since 2004 on the usefulness of wearable cameras in research protocols was explored in 3 databases (PUBMED, PsycINFO, and Google Scholar). Twenty-eight published studies that used a protocol involving wearable camera, either to explore wearable camera functioning and impact on daily life, or to investigate autobiographical memory processing or remediate autobiographical memory impairment, were included. This review analyzed the potential of wearable cameras for 1) investigating autobiographical memory processes in healthy volunteers without memory impairment and in clinical populations, and 2) remediating autobiographical memory in patients with various kinds of memory disorder. Mechanisms to account for the efficacy of wearable cameras are also discussed. The review concludes by discussing certain limitations inherent to using cameras, and new research perspectives. Finally, ethical issues raised by this new technology are considered.

  16. Prospective memory failures in aviation: effects of cue salience, workload, and individual differences.

    PubMed

    Van Benthem, Kathleen D; Herdman, Chris M; Tolton, Rani G; LeFevre, Jo-Anne

    2015-04-01

    Prospective memory allows people to complete intended tasks in the future. Prospective memory failures, such as pilots forgetting to inform pattern traffic of their locations, can have fatal consequences. The present research examined the impact of system factors (memory cue salience and workload) and individual differences (pilot age, cognitive health, and expertise) on prospective memory for communication tasks in the cockpit. Pilots (N = 101) flew a Cessna 172 simulator at a non-towered aerodrome while maintaining communication with traffic and attending to flight parameters. Memory cue salience (the prominence of cues that signal an intended action) and workload were manipulated. Prospective memory was measured as radio call completion rates. Pilots' prospective memory was adversely affected by low-salience cues and high workload. An interaction of cue salience, pilots' age, and cognitive health reflected the effects of system and individual difference factors on prospective memory failures. For example, younger pilots with low levels of cognitive health completed 78% of the radio calls associated with low-salience memory cues, whereas older pilots with low cognitive health scores completed just 61% of similar radio calls. Our findings suggest that technologies designed to signal intended future tasks should target those tasks with inherently low-salience memory cues. In addition, increasing the salience of memory cues is most likely to benefit pilots with lower levels of cognitive health in high-workload conditions.

  17. The Memory Stack: New Technologies Harness Talking for Writing.

    ERIC Educational Resources Information Center

    Gannon, Maureen T.

    In this paper, an elementary school teacher describes her experiences with the Memory Stack--a HyperCard based tool that can accommodate a voice recording, a graphic image, and a written text on the same card--which she designed to help her second and third grade students integrate their oral language fluency into the process of learning how to…

  18. Reactive Nanocomposites for Controllable Adhesive Debonding

    DTIC Science & Technology

    2011-08-01

    technologies include shape memory alloy (SMA)-based approach, a chemical foaming agent (CFA) approach, and a reactive nanocomposite (RNC) approach. SMA...anofoil (a) Component 1 Thermoset Adhesive Component 2 Nano-coating (b) Figure 2. Debonding approach where (a) freestanding...J. Controlled Adhesive Debonding of RAH-66 Comanche Chines Using Shape Memory Alloys ; ARL-TR-2937; U.S. Army Research Laboratory: Aberdeen Proving

  19. 77 FR 74222 - Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-12-13

    ..., California; Kingston Technology Co., Inc. of Fountain Valley, California; Logitek International S.A. (``LISA...: Clint Gerdine, Esq., Office of the General Counsel, U.S. International Trade Commission, 500 E Street SW....m. to 5:15 p.m.) in the Office of the Secretary, U.S. International Trade Commission, 500 E Street...

  20. Technology and Teaching: Searching under Cups for Clues about Memory--An Online Demonstration

    ERIC Educational Resources Information Center

    Kahan, Todd A.; Mathis, Katherine M.

    2007-01-01

    An online demonstration, designed to enhance comprehension of Sternberg's (1966) short-term memory scanning task, involved rapidly searching under virtual cups for a ball. We randomly assigned students to 1 of 3 groups, all of whom read the same textbook description of Sternberg's work: A demonstration group used 3 search methods to look for balls…

  1. Musical Memories: Snapshots of a Chinese Family in Singapore

    ERIC Educational Resources Information Center

    Lum, Chee-Hoo

    2009-01-01

    This paper examines music in the home of a Chinese family in Singapore with specific attention to the children (aged five and seven) of the household: an exploration of what constitutes the lived 'musical' memory of a family enmeshed in the technology and media of a globalised world. The study is part of a larger ethnographic study on the musical…

  2. Memory management and compiler support for rapid recovery from failures in computer systems

    NASA Technical Reports Server (NTRS)

    Fuchs, W. K.

    1991-01-01

    This paper describes recent developments in the use of memory management and compiler technology to support rapid recovery from failures in computer systems. The techniques described include cache coherence protocols for user transparent checkpointing in multiprocessor systems, compiler-based checkpoint placement, compiler-based code modification for multiple instruction retry, and forward recovery in distributed systems utilizing optimistic execution.

  3. Multifunctional shape-memory polymers.

    PubMed

    Behl, Marc; Razzaq, Muhammad Yasar; Lendlein, Andreas

    2010-08-17

    The thermally-induced shape-memory effect (SME) is the capability of a material to change its shape in a predefined way in response to heat. In shape-memory polymers (SMP) this shape change is the entropy-driven recovery of a mechanical deformation, which was obtained before by application of external stress and was temporarily fixed by formation of physical crosslinks. The high technological significance of SMP becomes apparent in many established products (e.g., packaging materials, assembling devices, textiles, and membranes) and the broad SMP development activities in the field of biomedical as well as aerospace applications (e.g., medical devices or morphing structures for aerospace vehicles). Inspired by the complex and diverse requirements of these applications fundamental research is aiming at multifunctional SMP, in which SME is combined with additional functions and is proceeding rapidly. In this review different concepts for the creation of multifunctionality are derived from the various polymer network architectures of thermally-induced SMP. Multimaterial systems, such as nanocomposites, are described as well as one-component polymer systems, in which independent functions are integrated. Future challenges will be to transfer the concept of multifunctionality to other emerging shape-memory technologies like light-sensitive SMP, reversible shape changing effects or triple-shape polymers.

  4. A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

    NASA Astrophysics Data System (ADS)

    Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

    2018-04-01

    A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.

  5. Extraction of the gate capacitance coupling coefficient in floating gate non-volatile memories: Statistical study of the effect of mismatching between floating gate memory and reference transistor in dummy cell extraction methods

    NASA Astrophysics Data System (ADS)

    Rafhay, Quentin; Beug, M. Florian; Duane, Russell

    2007-04-01

    This paper presents an experimental comparison of dummy cell extraction methods of the gate capacitance coupling coefficient for floating gate non-volatile memory structures from different geometries and technologies. These results show the significant influence of mismatching floating gate devices and reference transistors on the extraction of the gate capacitance coupling coefficient. In addition, it demonstrates the accuracy of the new bulk bias dummy cell extraction method and the importance of the β function, introduced recently in [Duane R, Beug F, Mathewson A. Novel capacitance coupling coefficient measurement methodology for floating gate non-volatile memory devices. IEEE Electr Dev Lett 2005;26(7):507-9], to determine matching pairs of floating gate memory and reference transistor.

  6. The ILLIAC IV memory system: Current status and future possibilities

    NASA Technical Reports Server (NTRS)

    Stevenson, D. K.

    1978-01-01

    The future needs of researchers who will use the Illiac were examined and the requirements they will place on the memory system were evaluated. Various alternatives to replacing critical memory components were considered with regard to cost, risk, system impact, software requirements, and implementation schedules. The current system, its performance and status, and the limitations it places on possible enhancements are discussed as well as the planned enhancements to the Illiac processor. After a brief technology survey, different implementations are presented for each system memory component. Three different memory systems are proposed to meet the identified needs of the Illiac user community. These three alternatives differ considerably with respect to storage capacity and accessing capabilities, but they all offer significant improvements over the current system. The proposed systems and their relative merits are analyzed.

  7. Goal-Directed Modulation of Neural Memory Patterns: Implications for fMRI-Based Memory Detection.

    PubMed

    Uncapher, Melina R; Boyd-Meredith, J Tyler; Chow, Tiffany E; Rissman, Jesse; Wagner, Anthony D

    2015-06-03

    Remembering a past event elicits distributed neural patterns that can be distinguished from patterns elicited when encountering novel information. These differing patterns can be decoded with relatively high diagnostic accuracy for individual memories using multivoxel pattern analysis (MVPA) of fMRI data. Brain-based memory detection--if valid and reliable--would have clear utility beyond the domain of cognitive neuroscience, in the realm of law, marketing, and beyond. However, a significant boundary condition on memory decoding validity may be the deployment of "countermeasures": strategies used to mask memory signals. Here we tested the vulnerability of fMRI-based memory detection to countermeasures, using a paradigm that bears resemblance to eyewitness identification. Participants were scanned while performing two tasks on previously studied and novel faces: (1) a standard recognition memory task; and (2) a task wherein they attempted to conceal their true memory state. Univariate analyses revealed that participants were able to strategically modulate neural responses, averaged across trials, in regions implicated in memory retrieval, including the hippocampus and angular gyrus. Moreover, regions associated with goal-directed shifts of attention and thought substitution supported memory concealment, and those associated with memory generation supported novelty concealment. Critically, whereas MVPA enabled reliable classification of memory states when participants reported memory truthfully, the ability to decode memory on individual trials was compromised, even reversing, during attempts to conceal memory. Together, these findings demonstrate that strategic goal states can be deployed to mask memory-related neural patterns and foil memory decoding technology, placing a significant boundary condition on their real-world utility. Copyright © 2015 the authors 0270-6474/15/358531-15$15.00/0.

  8. Future Applications of Electronic Technology to Education.

    ERIC Educational Resources Information Center

    Lewis, Arthur J.; And Others

    Developments in electronic technology that have improved and linked together telecommunication and computers are discussed, as well as their use in instruction, implications of this use, and associated issues. The first section briefly describes the following developments: microcomputers and microprocessors, bubble memory, lasers, holography,…

  9. Advanced Composition and the Computerized Library.

    ERIC Educational Resources Information Center

    Hult, Christine

    1989-01-01

    Discusses four kinds of computerized access tools: online catalogs; computerized reference; online database searching; and compact disks and read only memory (CD-ROM). Examines how these technologies are changing research. Suggests how research instruction in advanced writing courses can be refocused to include the new technologies. (RS)

  10. Non-volatile main memory management methods based on a file system.

    PubMed

    Oikawa, Shuichi

    2014-01-01

    There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

  11. Digital Tools and Challenges to Institutional Traditions of Learning: Technologies, Social Memory and the Performative Nature of Learning

    ERIC Educational Resources Information Center

    Saljo, R.

    2010-01-01

    The purpose of this article is to offer some reflections on the relationships between digital technologies and learning. It is argued that activities of learning, as they have been practised within institutionalized schooling, are coming under increasing pressure from the developments of digital technologies and the capacities to store, access and…

  12. Japan Fulbright Memorial Fund Program Opens New Avenues for Effective Technology Integration into Education

    NASA Astrophysics Data System (ADS)

    Paoletti, Franco; Carlucci, Lisa Marie

    2006-04-01

    Technology is increasingly playing a major role in today's education often integrated into instruction to become one of the teacher's most effective and often indispensable tools used in the classroom. It can be said that the use of technology at the beginning of this new millennium is affecting the instructional process and it is changing some of its basic connotations. The presented work analyzes the impact of various technologies on education emphasizing the advantages provided by a successful integration, the obstacles encountered along the way, and the methodologies currently used in the process. ``Educational exchange can turn nations into people, contributing as no other form of communication can to the humanizing of international relations'' (Senator J.M. Fulbright). Technology of this modern era is providing the indispensable tool to achieve this superior level of communication overcoming historical, cultural, and language barriers. In the context of the Japan Fulbright Memorial Fund (JFMF) Teacher Program, we analyze the impact of technology on educational cross-cultural exchanges to raise awareness and interest of the scientific/educational community on the need of establishing stronger international relations promoting world peace and global prosperity.

  13. A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

    NASA Astrophysics Data System (ADS)

    Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

    2006-04-01

    A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

  14. High Density Memory Based on Quantum Device Technology

    NASA Technical Reports Server (NTRS)

    vanderWagt, Paul; Frazier, Gary; Tang, Hao

    1995-01-01

    We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

  15. Diminishing-cues retrieval practice: A memory-enhancing technique that works when regular testing doesn't.

    PubMed

    Fiechter, Joshua L; Benjamin, Aaron S

    2017-08-28

    Retrieval practice has been shown to be a highly effective tool for enhancing memory, a fact that has led to major changes to educational practice and technology. However, when initial learning is poor, initial retrieval practice is unlikely to be successful and long-term benefits of retrieval practice are compromised or nonexistent. Here, we investigate the benefit of a scaffolded retrieval technique called diminishing-cues retrieval practice (Finley, Benjamin, Hays, Bjork, & Kornell, Journal of Memory and Language, 64, 289-298, 2011). Under learning conditions that favored a strong testing effect, diminishing cues and standard retrieval practice both enhanced memory performance relative to restudy. Critically, under learning conditions where standard retrieval practice was not helpful, diminishing cues enhanced memory performance substantially. These experiments demonstrate that diminishing-cues retrieval practice can widen the range of conditions under which testing can benefit memory, and so can serve as a model for the broader application of testing-based techniques for enhancing learning.

  16. How can transcranial magnetic stimulation be used to causally manipulate memory representations in the human brain?

    PubMed

    Widhalm, Morgan L; Rose, Nathan S

    2018-06-27

    We present a focused review on the utility of transcranial magnetic stimulation (TMS) for modulating memory, with a particular focus on multimodal approaches in which TMS is paired with neuroimaging methods (electroencephalography and magnetic resonance imaging (MRI)) to manipulate and measure working memory processes. We contrast the utility of TMS for manipulating memory with other forms of noninvasive brain stimulation, as well as different forms of TMS including single-pulse, paired-pulse and repetitive TMS protocols. We discuss the potential for TMS to address fundamental cognitive neuroscience questions about the nature of memory processes and representations, while acknowledging the considerable variability of behavioral and neural outcomes in TMS studies. Also discussed are the limitations of this technology, current advancements that have helped to defray the impact of these limitations, and suggestions for future directions in research and methodology. This article is categorized under: Neuroscience > Clinical Neuroscience Neuroscience > Cognition Psychology > Memory. © 2018 Wiley Periodicals, Inc.

  17. Feasibility study of molecular memory device based on DNA using methylation to store information

    NASA Astrophysics Data System (ADS)

    Jiang, Liming; Qiu, Wanzhi; Al-Dirini, Feras; Hossain, Faruque M.; Evans, Robin; Skafidas, Efstratios

    2016-07-01

    DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

  18. Optical memory system technology. Citations from the International Aerospace Abstracts data base

    NASA Technical Reports Server (NTRS)

    Zollars, G. F.

    1980-01-01

    Approximately 213 citations from the international literature which concern the development of the optical data storage system technology are presented. Topics covered include holographic computer storage devices, crystal, magneto, and electro-optics, imaging techniques, in addition to optical data processing and storage.

  19. Logic and memory concepts for all-magnetic computing based on transverse domain walls

    NASA Astrophysics Data System (ADS)

    Vandermeulen, J.; Van de Wiele, B.; Dupré, L.; Van Waeyenberge, B.

    2015-06-01

    We introduce a non-volatile digital logic and memory concept in which the binary data is stored in the transverse magnetic domain walls present in in-plane magnetized nanowires with sufficiently small cross sectional dimensions. We assign the digital bit to the two possible orientations of the transverse domain wall. Numerical proofs-of-concept are presented for a NOT-, AND- and OR-gate, a FAN-out as well as a reading and writing device. Contrary to the chirality based vortex domain wall logic gates introduced in Omari and Hayward (2014 Phys. Rev. Appl. 2 044001), the presented concepts remain applicable when miniaturized and are driven by electrical currents, making the technology compatible with the in-plane racetrack memory concept. The individual devices can be easily combined to logic networks working with clock speeds that scale linearly with decreasing design dimensions. This opens opportunities to an all-magnetic computing technology where the digital data is stored and processed under the same magnetic representation.

  20. Telecom-Wavelength Atomic Quantum Memory in Optical Fiber for Heralded Polarization Qubits.

    PubMed

    Jin, Jeongwan; Saglamyurek, Erhan; Puigibert, Marcel lí Grimau; Verma, Varun; Marsili, Francesco; Nam, Sae Woo; Oblak, Daniel; Tittel, Wolfgang

    2015-10-02

    Polarization-encoded photons at telecommunication wavelengths provide a compelling platform for practical realizations of photonic quantum information technologies due to the ease of performing single qubit manipulations, the availability of polarization-entangled photon-pair sources, and the possibility of leveraging existing fiber-optic links for distributing qubits over long distances. An optical quantum memory compatible with this platform could serve as a building block for these technologies. Here we present the first experimental demonstration of an atomic quantum memory that directly allows for reversible mapping of quantum states encoded in the polarization degree of freedom of a telecom-wavelength photon. We show that heralded polarization qubits at a telecom wavelength are stored and retrieved with near-unity fidelity by implementing the atomic frequency comb protocol in an ensemble of erbium atoms doped into an optical fiber. Despite remaining limitations in our proof-of-principle demonstration such as small storage efficiency and storage time, our broadband light-matter interface reveals the potential for use in future quantum information processing.

  1. VirSchool: The Effect of Background Music and Immersive Display Systems on Memory for Facts Learned in an Educational Virtual Environment

    ERIC Educational Resources Information Center

    Fassbender, Eric; Richards, Deborah; Bilgin, Ayse; Thompson, William Forde; Heiden, Wolfgang

    2012-01-01

    Game technology has been widely used for educational applications, however, despite the common use of background music in games, its effect on learning has been largely unexplored. This paper discusses how music played in the background of a computer-animated history lesson affected participants' memory for facts. A virtual history lesson was…

  2. Intelligibility and Acceptability Testing for Speech Technology

    DTIC Science & Technology

    1992-05-22

    information in memory (Luce, Feustel, and Pisoni, 1983). In high workload or multiple task situations, the added effort of listening to degraded speech can lead...the DRT provides diagnostic feature scores on six phonemic features: voicing, nasality, sustention , sibilation, graveness, and compactness, and on a...of other speech materials (e.g., polysyllabic words, paragraphs) and methods ( memory , comprehension, reaction time) have been used to evaluate the

  3. STS 51-L Memorial Montage designed by Bill Corey of TGS

    NASA Technical Reports Server (NTRS)

    1986-01-01

    The STS 51-L Memorial Montage designed by Bill Corey of TGS Technology. The montage contains portraits of each of the STS 51-L crewmembers, a view of the Challenger at liftoff, the mission patch and a statement which reads 'They slipped the surly bonds of earth to touch the face of God'. At the end of the statement is a bird flying.

  4. Novel Technologies for Next Generation Memory

    DTIC Science & Technology

    2013-07-25

    charge in the capacitor) eventually fades unless the capacitor charge is refreshed , so the memory cells must be periodically refreshed (rewritten). The...reliability issues (such as poor data retention problem and refresh failure). In order to avoid those problems, a 3-dimensional channel structure...states during the refresh cycle (retention time). When the channel length is scaled down, it is difficult to guarantee sufficient retention time

  5. Cortical Substrate of Haptic Representation

    DTIC Science & Technology

    1993-08-24

    experience and data from primates , we have developed computational models of short-term active memory. Such models may have technological interest...neurobiological work on primate memory. It is on that empirical work that our current theoretical efforts are 5 founded. Our future physiological research...Academy of Sciences, New York, vol. 608, pp. 318-329, 1990. J.M. Fuster - Behavioral electrophysiology of the prefrontal cortex of the primate . Progress

  6. Spin torque switching of 20 nm magnetic tunnel junctions with perpendicular anisotropy

    NASA Astrophysics Data System (ADS)

    Gajek, M.; Nowak, J. J.; Sun, J. Z.; Trouilloud, P. L.; O'Sullivan, E. J.; Abraham, D. W.; Gaidis, M. C.; Hu, G.; Brown, S.; Zhu, Y.; Robertazzi, R. P.; Gallagher, W. J.; Worledge, D. C.

    2012-03-01

    Spin-transfer torque magnetic random access memory (STT-MRAM) is one of the most promising emerging non-volatile memory technologies. MRAM has so far been demonstrated with a unique combination of density, speed, and non-volatility in a single chip, however, without the capability to replace any single mainstream memory. In this paper, we demonstrate the basic physics of spin torque switching in 20 nm diameter magnetic tunnel junctions with perpendicular magnetic anisotropy materials. This deep scaling capability clearly indicates the STT MRAM device itself may be suitable for integration at much higher densities than previously proven.

  7. Evolving technologies drive the new roles of Biomedical Engineering.

    PubMed

    Frisch, P H; St Germain, J; Lui, W

    2008-01-01

    Rapidly changing technology coupled with the financial impact of organized health care, has required hospital Biomedical Engineering organizations to augment their traditional operational and business models to increase their role in developing enhanced clinical applications utilizing new and evolving technologies. The deployment of these technology based applications has required Biomedical Engineering organizations to re-organize to optimize the manner in which they provide and manage services. Memorial Sloan-Kettering Cancer Center has implemented a strategy to explore evolving technologies integrating them into enhanced clinical applications while optimally utilizing the expertise of the traditional Biomedical Engineering component (Clinical Engineering) to provide expanded support in technology / equipment management, device repair, preventive maintenance and integration with legacy clinical systems. Specifically, Biomedical Engineering is an integral component of the Medical Physics Department which provides comprehensive and integrated support to the Center in advanced physical, technical and engineering technology. This organizational structure emphasizes the integration and collaboration between a spectrum of technical expertise for clinical support and equipment management roles. The high cost of clinical equipment purchases coupled with the increasing cost of service has driven equipment management responsibilities to include significant business and financial aspects to provide a cost effective service model. This case study details the dynamics of these expanded roles, future initiatives and benefits for Biomedical Engineering and Memorial Sloan Kettering Cancer Center.

  8. Sentinel 2 MMFU: The first European Mass Memory System Based on NAND-Flash Storage Technology

    NASA Astrophysics Data System (ADS)

    Staehle, M.; Cassel, M.; Lonsdorfer, U.; Gliem, F.; Walter, D.; Fichna, T.

    2011-08-01

    Sentinel-2 is the multispectral optical mission of the EU-ESA GMES (Global Monitoring for Environment and Security) program, currently under development by Astrium-GmbH in Friedrichshafen (Germany) for a launch in 2013. The mission features a 490 Mbit/s optical sensor operating at high duty cycles, requiring in turn a large 2.4 Tbit on-board storage capacity.The required storage capacity motivated the selection of the NAND-Flash technology which was already secured by a lengthy period (2004-2009) of detailed testing, analysis and qualification by Astrium GmbH, IDA and ESTEC. The mass memory system is currently being realized by Astrium GmbH.

  9. Digital MOS integrated circuits

    NASA Astrophysics Data System (ADS)

    Elmasry, M. I.

    MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.

  10. [Collective memories of women who have experienced maternal near miss: health needs and human rights].

    PubMed

    Aguiar, Cláudia de Azevedo; Tanaka, Ana Cristina dʼAndretta

    2016-09-19

    The collective memories of women that have experienced maternal near miss can help elucidate serious obstetric events, like maternal death. Their experience is authentic and representative, with the construction of a common identity. This identity lends quality to a group's memory, and such memory is thus a social phenomenon. The study analyzed the experience of twelve women who nearly died during the gestational and postpartum cycle. The thematic oral history method was used, from the perspective of health needs and human rights. Six collective memories comprised the discourses: unmet health needs; healthcare deficiencies; denial of contact with the newborn child; violation of rights; absence of demand for rights; and compensation for unmet rights and needs. To understand these women's health needs is to acknowledge the women as bearers of rights and to individualize care, respecting their autonomy, guaranteeing access to technologies, and establishing an effective bond with health professionals.

  11. Acceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor

    NASA Astrophysics Data System (ADS)

    González, Diego; Botella, Guillermo; García, Carlos; Prieto, Manuel; Tirado, Francisco

    2013-12-01

    This contribution focuses on the optimization of matching-based motion estimation algorithms widely used for video coding standards using an Altera custom instruction-based paradigm and a combination of synchronous dynamic random access memory (SDRAM) with on-chip memory in Nios II processors. A complete profile of the algorithms is achieved before the optimization, which locates code leaks, and afterward, creates a custom instruction set, which is then added to the specific design, enhancing the original system. As well, every possible memory combination between on-chip memory and SDRAM has been tested to achieve the best performance. The final throughput of the complete designs are shown. This manuscript outlines a low-cost system, mapped using very large scale integration technology, which accelerates software algorithms by converting them into custom hardware logic blocks and showing the best combination between on-chip memory and SDRAM for the Nios II processor.

  12. Experimentally modeling stochastic processes with less memory by the use of a quantum processor

    PubMed Central

    Palsson, Matthew S.; Gu, Mile; Ho, Joseph; Wiseman, Howard M.; Pryde, Geoff J.

    2017-01-01

    Computer simulation of observable phenomena is an indispensable tool for engineering new technology, understanding the natural world, and studying human society. However, the most interesting systems are often so complex that simulating their future behavior demands storing immense amounts of information regarding how they have behaved in the past. For increasingly complex systems, simulation becomes increasingly difficult and is ultimately constrained by resources such as computer memory. Recent theoretical work shows that quantum theory can reduce this memory requirement beyond ultimate classical limits, as measured by a process’ statistical complexity, C. We experimentally demonstrate this quantum advantage in simulating stochastic processes. Our quantum implementation observes a memory requirement of Cq = 0.05 ± 0.01, far below the ultimate classical limit of C = 1. Scaling up this technique would substantially reduce the memory required in simulations of more complex systems. PMID:28168218

  13. Memory Engram Cells Have Come of Age.

    PubMed

    Tonegawa, Susumu; Liu, Xu; Ramirez, Steve; Redondo, Roger

    2015-09-02

    The idea that memory is stored in the brain as physical alterations goes back at least as far as Plato, but further conceptualization of this idea had to wait until the 20(th) century when two guiding theories were presented: the "engram theory" of Richard Semon and Donald Hebb's "synaptic plasticity theory." While a large number of studies have been conducted since, each supporting some aspect of each of these theories, until recently integrative evidence for the existence of engram cells and circuits as defined by the theories was lacking. In the past few years, the combination of transgenics, optogenetics, and other technologies has allowed neuroscientists to begin identifying memory engram cells by detecting specific populations of cells activated during specific learning epochs and by engineering them not only to evoke recall of the original memory, but also to alter the content of the memory. Copyright © 2015 Elsevier Inc. All rights reserved.

  14. Acute Sleep Deprivation Blocks Short- and Long-Term Operant Memory in Aplysia.

    PubMed

    Krishnan, Harini C; Gandour, Catherine E; Ramos, Joshua L; Wrinkle, Mariah C; Sanchez-Pacheco, Joseph J; Lyons, Lisa C

    2016-12-01

    Insufficient sleep in individuals appears increasingly common due to the demands of modern work schedules and technology use. Consequently, there is a growing need to understand the interactions between sleep deprivation and memory. The current study determined the effects of acute sleep deprivation on short and long-term associative memory using the marine mollusk Aplysia californica , a relatively simple model system well known for studies of learning and memory. Aplysia were sleep deprived for 9 hours using context changes and tactile stimulation either prior to or after training for the operant learning paradigm, learning that food is inedible (LFI). The effects of sleep deprivation on short-term (STM) and long-term memory (LTM) were assessed. Acute sleep deprivation prior to LFI training impaired the induction of STM and LTM with persistent effects lasting at least 24 h. Sleep deprivation immediately after training blocked the consolidation of LTM. However, sleep deprivation following the period of molecular consolidation did not affect memory recall. Memory impairments were independent of handling-induced stress, as daytime handled control animals demonstrated no memory deficits. Additional training immediately after sleep deprivation failed to rescue the induction of memory, but additional training alleviated the persistent impairment in memory induction when training occurred 24 h following sleep deprivation. Acute sleep deprivation inhibited the induction and consolidation, but not the recall of memory. These behavioral studies establish Aplysia as an effective model system for studying the interactions between sleep and memory formation. © 2016 Associated Professional Sleep Societies, LLC.

  15. High-speed quantum networking by ship

    NASA Astrophysics Data System (ADS)

    Devitt, Simon J.; Greentree, Andrew D.; Stephens, Ashley M.; van Meter, Rodney

    2016-11-01

    Networked entanglement is an essential component for a plethora of quantum computation and communication protocols. Direct transmission of quantum signals over long distances is prevented by fibre attenuation and the no-cloning theorem, motivating the development of quantum repeaters, designed to purify entanglement, extending its range. Quantum repeaters have been demonstrated over short distances, but error-corrected, global repeater networks with high bandwidth require new technology. Here we show that error corrected quantum memories installed in cargo containers and carried by ship can provide a exible connection between local networks, enabling low-latency, high-fidelity quantum communication across global distances at higher bandwidths than previously proposed. With demonstrations of technology with sufficient fidelity to enable topological error-correction, implementation of the quantum memories is within reach, and bandwidth increases with improvements in fabrication. Our approach to quantum networking avoids technological restrictions of repeater deployment, providing an alternate path to a worldwide Quantum Internet.

  16. Electric potential and electric field imaging

    NASA Astrophysics Data System (ADS)

    Generazio, E. R.

    2017-02-01

    The technology and methods for remote quantitative imaging of electrostatic potentials and electrostatic fields in and around objects and in free space is presented. Electric field imaging (EFI) technology may be applied to characterize intrinsic or existing electric potentials and electric fields, or an externally generated electrostatic field made be used for "illuminating" volumes to be inspected with EFI. The baseline sensor technology (e-Sensor) and its construction, optional electric field generation (quasi-static generator), and current e-Sensor enhancements (ephemeral e-Sensor) are discussed. Demonstrations for structural, electronic, human, and memory applications are shown. This new EFI capability is demonstrated to reveal characterization of electric charge distribution creating a new field of study embracing areas of interest including electrostatic discharge (ESD) mitigation, crime scene forensics, design and materials selection for advanced sensors, dielectric morphology of structures, tether integrity, organic molecular memory, and medical diagnostic and treatment efficacy applications such as cardiac polarization wave propagation and electromyography imaging.

  17. High-speed quantum networking by ship

    PubMed Central

    Devitt, Simon J.; Greentree, Andrew D.; Stephens, Ashley M.; Van Meter, Rodney

    2016-01-01

    Networked entanglement is an essential component for a plethora of quantum computation and communication protocols. Direct transmission of quantum signals over long distances is prevented by fibre attenuation and the no-cloning theorem, motivating the development of quantum repeaters, designed to purify entanglement, extending its range. Quantum repeaters have been demonstrated over short distances, but error-corrected, global repeater networks with high bandwidth require new technology. Here we show that error corrected quantum memories installed in cargo containers and carried by ship can provide a exible connection between local networks, enabling low-latency, high-fidelity quantum communication across global distances at higher bandwidths than previously proposed. With demonstrations of technology with sufficient fidelity to enable topological error-correction, implementation of the quantum memories is within reach, and bandwidth increases with improvements in fabrication. Our approach to quantum networking avoids technological restrictions of repeater deployment, providing an alternate path to a worldwide Quantum Internet. PMID:27805001

  18. Analysis of the Evaluation of a New Glucose Meter with Integrated Self-Management Software and USB Connectivity

    PubMed Central

    Crowe, Daniel J

    2011-01-01

    Glucose meter technology has not kept up with the advances that have occurred in other sectors in mobile and health care technology. A new device that combines strip-based capillary blood glucose monitoring and USB flash drive technology is evaluated in an industry-funded study in a cohort of patients and health care professionals. The expanded memory capacity of flash drives allows the software program to be stored on the device for analyzing the blood glucose readings in memory. The study analyzes the device for precision and accuracy as well as for ease of adaptability and usage. This analysis focuses on shortcomings in the design of the study and methodology in addition to features of the hardware device itself. Although the device has distinct advantages over many devices on the market, a challenge is made to device manufacturers to encourage further innovation. PMID:22027309

  19. High-speed quantum networking by ship.

    PubMed

    Devitt, Simon J; Greentree, Andrew D; Stephens, Ashley M; Van Meter, Rodney

    2016-11-02

    Networked entanglement is an essential component for a plethora of quantum computation and communication protocols. Direct transmission of quantum signals over long distances is prevented by fibre attenuation and the no-cloning theorem, motivating the development of quantum repeaters, designed to purify entanglement, extending its range. Quantum repeaters have been demonstrated over short distances, but error-corrected, global repeater networks with high bandwidth require new technology. Here we show that error corrected quantum memories installed in cargo containers and carried by ship can provide a exible connection between local networks, enabling low-latency, high-fidelity quantum communication across global distances at higher bandwidths than previously proposed. With demonstrations of technology with sufficient fidelity to enable topological error-correction, implementation of the quantum memories is within reach, and bandwidth increases with improvements in fabrication. Our approach to quantum networking avoids technological restrictions of repeater deployment, providing an alternate path to a worldwide Quantum Internet.

  20. Memory Technologies and Data Recorder Design

    NASA Technical Reports Server (NTRS)

    Strauss, Karl F

    2009-01-01

    Missions, both near Earth and deep space, are under consideration that will require data recorder capacities of such magnitude as to be unthinkable just a few years ago. Concepts requiring well over 16,000 GB of storage are being studied. To achieve this capacity via "normal means" was considered incredible as recently as 2004. This paper is presented in two parts. Part I describes the analysis of data recorder capacities for missions as far back as 35 years and provides a projection of data capacities required 20 years from now based upon missions either nearing launch, or in the planning stage. The paper presents a similar projection of memory device capacities as baselined in the ITRS - the International Technology Roadmap for Semiconductors. Using known Total Ionizing Dose tolerance going back as far as a decade, a projection of total dose tolerance is made for two prime technologies out to the year 2028.

  1. JPRS Report (Erratum), Science & Technology, Japan, Selections from MITI White Paper on Industrial Technology Trends and Issues

    DTIC Science & Technology

    1989-08-30

    year period in the following products: Technology Field Product New materials Composite materials Amorphous alloys Macromolecule separation...plastics 8. Composite materials B. Parts 9. Optical fiber 10. Semiconductor lasers 11. CCD 12. Semiconductor memory elements 13. Microcomputers...separation. Composite materials (containing carbon fiber) (1) Aerospace users required strict specifi cations for carbon fiber, resulting in

  2. Deciding to buy expensive technology. The case of biliary lithotripsy.

    PubMed

    Weingart, S N

    1995-01-01

    Acquiring expensive, new medical technology requires an evaluation of the efficacy and effectiveness, safety, profitability, feasibility, and risk of a project in the context of the hospital's social responsibility and institutional strategy. A case study of the decision to bring biliary lithotripsy to Strong Memorial Hospital illustrates how these criteria offer managers a coherent approach to difficult and consequential decisions about acquiring medical technology.

  3. Shape Morphing Adaptive Radiator Technology (SMART) for Variable Heat Rejection

    NASA Technical Reports Server (NTRS)

    Erickson, Lisa

    2016-01-01

    The proposed technology leverages the temperature dependent phase change of shape memory alloys (SMAs) to drive the shape of a flexible radiator panel. The opening/closing of the radiator panel, as a function of temperature, passively adapts the radiator's rate of heat rejection in response to a vehicle's needs.

  4. Effects of Short-Term Memory and Content Representation Type on Mobile Language Learning

    ERIC Educational Resources Information Center

    Chen, Nian-Shing; Hsieh, Sheng-Wen; Kinshuk

    2008-01-01

    Due to the rapid advancements in mobile communication and wireless technologies, many researchers and educators have started to believe that these emerging technologies can be leveraged to support formal and informal learning opportunities. Mobile language learning can be effectively implemented by delivering learning content through mobile…

  5. On brain activity mapping: insights and lessons from Brain Decoding Project to map memory patterns in the hippocampus.

    PubMed

    Tsien, Joe Z; Li, Meng; Osan, Remus; Chen, Guifen; Lin, Longnian; Wang, Phillip Lei; Frey, Sabine; Frey, Julietta; Zhu, Dajiang; Liu, Tianming; Zhao, Fang; Kuang, Hui

    2013-09-01

    The BRAIN project recently announced by the president Obama is the reflection of unrelenting human quest for cracking the brain code, the patterns of neuronal activity that define who we are and what we are. While the Brain Activity Mapping proposal has rightly emphasized on the need to develop new technologies for measuring every spike from every neuron, it might be helpful to consider both the theoretical and experimental aspects that would accelerate our search for the organizing principles of the brain code. Here we share several insights and lessons from the similar proposal, namely, Brain Decoding Project that we initiated since 2007. We provide a specific example in our initial mapping of real-time memory traces from one part of the memory circuit, namely, the CA1 region of the mouse hippocampus. We show how innovative behavioral tasks and appropriate mathematical analyses of large datasets can play equally, if not more, important roles in uncovering the specific-to-general feature-coding cell assembly mechanism by which episodic memory, semantic knowledge, and imagination are generated and organized. Our own experiences suggest that the bottleneck of the Brain Project is not only at merely developing additional new technologies, but also the lack of efficient avenues to disseminate cutting edge platforms and decoding expertise to neuroscience community. Therefore, we propose that in order to harness unique insights and extensive knowledge from various investigators working in diverse neuroscience subfields, ranging from perception and emotion to memory and social behaviors, the BRAIN project should create a set of International and National Brain Decoding Centers at which cutting-edge recording technologies and expertise on analyzing large datasets analyses can be made readily available to the entire community of neuroscientists who can apply and schedule to perform cutting-edge research.

  6. Recent Advances on Neuromorphic Systems Using Phase-Change Materials

    NASA Astrophysics Data System (ADS)

    Wang, Lei; Lu, Shu-Ren; Wen, Jing

    2017-05-01

    Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.

  7. Recent Advances on Neuromorphic Systems Using Phase-Change Materials.

    PubMed

    Wang, Lei; Lu, Shu-Ren; Wen, Jing

    2017-12-01

    Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.

  8. Building more powerful less expensive supercomputers using Processing-In-Memory (PIM) LDRD final report.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Murphy, Richard C.

    2009-09-01

    This report details the accomplishments of the 'Building More Powerful Less Expensive Supercomputers Using Processing-In-Memory (PIM)' LDRD ('PIM LDRD', number 105809) for FY07-FY09. Latency dominates all levels of supercomputer design. Within a node, increasing memory latency, relative to processor cycle time, limits CPU performance. Between nodes, the same increase in relative latency impacts scalability. Processing-In-Memory (PIM) is an architecture that directly addresses this problem using enhanced chip fabrication technology and machine organization. PIMs combine high-speed logic and dense, low-latency, high-bandwidth DRAM, and lightweight threads that tolerate latency by performing useful work during memory transactions. This work examines the potential ofmore » PIM-based architectures to support mission critical Sandia applications and an emerging class of more data intensive informatics applications. This work has resulted in a stronger architecture/implementation collaboration between 1400 and 1700. Additionally, key technology components have impacted vendor roadmaps, and we are in the process of pursuing these new collaborations. This work has the potential to impact future supercomputer design and construction, reducing power and increasing performance. This final report is organized as follow: this summary chapter discusses the impact of the project (Section 1), provides an enumeration of publications and other public discussion of the work (Section 1), and concludes with a discussion of future work and impact from the project (Section 1). The appendix contains reprints of the refereed publications resulting from this work.« less

  9. Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

    NASA Astrophysics Data System (ADS)

    Kim, Sang-Koog

    2011-03-01

    An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

  10. GRIM-Filter: Fast seed location filtering in DNA read mapping using processing-in-memory technologies.

    PubMed

    Kim, Jeremie S; Senol Cali, Damla; Xin, Hongyi; Lee, Donghyuk; Ghose, Saugata; Alser, Mohammed; Hassan, Hasan; Ergin, Oguz; Alkan, Can; Mutlu, Onur

    2018-05-09

    Seed location filtering is critical in DNA read mapping, a process where billions of DNA fragments (reads) sampled from a donor are mapped onto a reference genome to identify genomic variants of the donor. State-of-the-art read mappers 1) quickly generate possible mapping locations for seeds (i.e., smaller segments) within each read, 2) extract reference sequences at each of the mapping locations, and 3) check similarity between each read and its associated reference sequences with a computationally-expensive algorithm (i.e., sequence alignment) to determine the origin of the read. A seed location filter comes into play before alignment, discarding seed locations that alignment would deem a poor match. The ideal seed location filter would discard all poor match locations prior to alignment such that there is no wasted computation on unnecessary alignments. We propose a novel seed location filtering algorithm, GRIM-Filter, optimized to exploit 3D-stacked memory systems that integrate computation within a logic layer stacked under memory layers, to perform processing-in-memory (PIM). GRIM-Filter quickly filters seed locations by 1) introducing a new representation of coarse-grained segments of the reference genome, and 2) using massively-parallel in-memory operations to identify read presence within each coarse-grained segment. Our evaluations show that for a sequence alignment error tolerance of 0.05, GRIM-Filter 1) reduces the false negative rate of filtering by 5.59x-6.41x, and 2) provides an end-to-end read mapper speedup of 1.81x-3.65x, compared to a state-of-the-art read mapper employing the best previous seed location filtering algorithm. GRIM-Filter exploits 3D-stacked memory, which enables the efficient use of processing-in-memory, to overcome the memory bandwidth bottleneck in seed location filtering. We show that GRIM-Filter significantly improves the performance of a state-of-the-art read mapper. GRIM-Filter is a universal seed location filter that can be applied to any read mapper. We hope that our results provide inspiration for new works to design other bioinformatics algorithms that take advantage of emerging technologies and new processing paradigms, such as processing-in-memory using 3D-stacked memory devices.

  11. Examining Internet and eHealth Practices and Preferences: Survey Study of Australian Older Adults With Subjective Memory Complaints, Mild Cognitive Impairment, or Dementia.

    PubMed

    LaMonica, Haley M; English, Amelia; Hickie, Ian B; Ip, Jerome; Ireland, Catriona; West, Stacey; Shaw, Tim; Mowszowski, Loren; Glozier, Nick; Duffy, Shantel; Gibson, Alice A; Naismith, Sharon L

    2017-10-25

    Interest in electronic health (eHealth) technologies to screen for and treat a variety of medical and mental health problems is growing exponentially. However, no studies to date have investigated the feasibility of using such e-tools for older adults with mild cognitive impairment (MCI) or dementia. The objective of this study was to describe patterns of Internet use, as well as interest in and preferences for eHealth technologies among older adults with varying degrees of cognitive impairment. A total of 221 participants (mean age=67.6 years) attending the Healthy Brain Ageing Clinic at the University of Sydney, a specialist mood and memory clinic for adults ≥50 years of age, underwent comprehensive clinical and neuropsychological assessment and completed a 20-item self-report survey investigating current technology use and interest in eHealth technologies. Descriptive statistics and Fisher exact tests were used to characterize the findings, including variability in the results based on demographic and diagnostic factors, with diagnoses including subjective cognitive impairment (SCI), MCI, and dementia. The sample comprised 27.6% (61/221) SCI, 62.0% (137/221) MCI, and 10.4% (23/221) dementia (mean Mini-Mental State Examination=28.2). The majority of participants reported using mobile phones (201/220, 91.4%) and computers (167/194, 86.1%) routinely, with most respondents having access to the Internet at home (204/220, 92.6%). Variability was evident in the use of computers, mobile phones, and health-related websites in relation to sociodemographic factors, with younger, employed respondents with higher levels of education being more likely to utilize these technologies. Whereas most respondents used email (196/217, 90.3%), the use of social media websites was relatively uncommon. The eHealth intervention of most interest to the broader sample was memory strategy training, with 82.7% (172/208) of participants reporting they would utilize this form of intervention. Preferences for other eHealth interventions varied in relation to educational level, with university-educated participants expressing greater interest in interventions related to mood (P=.01), socialization (P=.02), memory (P=.01), and computer-based exercises (P=.046). eHealth preferences also varied in association, with diagnosis for interventions targeting sleep (P=.01), nutrition (P=.004), vascular risk factors (P=.03), and memory (P=.02). Technology use is pervasive among older adults with cognitive impairment, though variability was noted in relation to age, education, vocational status, and diagnosis. There is also significant interest in Web-based interventions targeting cognition and memory, as well as other risk factors for cognitive decline, highlighting the urgent need for the development, implementation, and study of eHealth technologies tailored specifically to older adults, including those with MCI and early dementia. Strategies to promote eHealth use among older adults who are retired or have lower levels of education will also need to be considered. ©Haley M LaMonica, Amelia English, Ian B Hickie, Jerome Ip, Catriona Ireland, Stacey West, Tim Shaw, Loren Mowszowski, Nick Glozier, Shantel Duffy, Alice A Gibson, Sharon L Naismith. Originally published in the Journal of Medical Internet Research (http://www.jmir.org), 25.10.2017.

  12. Focused Logistics, Joint Vision 2010: A Joint Logistics Roadmap

    DTIC Science & Technology

    2010-01-01

    AIS). AIT devices include bar codes for individual items, optical memory cards for multipacks and containers, radio frequency tags for containers and...Fortezza Card and Firewall technologies are being developed to prevent unau- thorized access. As for infrastructure, DISA has already made significant in...radio frequency tags and optical memory cards , to continuously update the JTAV database. By September 1998, DSS will be deployed in all wholesale

  13. TID and SEE Response of an Advanced Samsung 4G NAND Flash Memory

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Friendlich, M.; Howard, J. W.; Berg, M. D.; Kim, H. S.; Irwin, T. L.; LaBel, K. A.

    2007-01-01

    Initial total ionizing dose (TID) and single event heavy ion test results are presented for an unhardened commercial flash memory, fabricated with 63 nm technology. Results are that the parts survive to a TID of nearly 200 krad (SiO2), with a tractable soft error rate of about 10(exp -l2) errors/bit-day, for the Adams Ten Percent Worst Case Environment.

  14. Coherent optical pulse sequencer for quantum applications.

    PubMed

    Hosseini, Mahdi; Sparkes, Ben M; Hétet, Gabriel; Longdell, Jevon J; Lam, Ping Koy; Buchler, Ben C

    2009-09-10

    The bandwidth and versatility of optical devices have revolutionized information technology systems and communication networks. Precise and arbitrary control of an optical field that preserves optical coherence is an important requisite for many proposed photonic technologies. For quantum information applications, a device that allows storage and on-demand retrieval of arbitrary quantum states of light would form an ideal quantum optical memory. Recently, significant progress has been made in implementing atomic quantum memories using electromagnetically induced transparency, photon echo spectroscopy, off-resonance Raman spectroscopy and other atom-light interaction processes. Single-photon and bright-optical-field storage with quantum states have both been successfully demonstrated. Here we present a coherent optical memory based on photon echoes induced through controlled reversible inhomogeneous broadening. Our scheme allows storage of multiple pulses of light within a chosen frequency bandwidth, and stored pulses can be recalled in arbitrary order with any chosen delay between each recalled pulse. Furthermore, pulses can be time-compressed, time-stretched or split into multiple smaller pulses and recalled in several pieces at chosen times. Although our experimental results are so far limited to classical light pulses, our technique should enable the construction of an optical random-access memory for time-bin quantum information, and have potential applications in quantum information processing.

  15. A picture is worth a thousand lies: using false photographs to create false childhood memories.

    PubMed

    Wade, Kimberley A; Garry, Maryanne; Read, J Don; Lindsay, D Stephen

    2002-09-01

    Because image-enhancing technology is readily available, people are frequently exposed to doctored images. However, in prior research on how adults can be led to report false childhood memories, subjects have typically been exposed to personalized and detailed narratives describing false events. Instead, we exposed 20 subjects to a false childhood event via a fake photograph and imagery instructions. Over three interviews, subjects thought about a photograph showing them on a hot air balloon ride and tried to recall the event byusing guided-imagery exercises. Fifty percent of the subjects created complete or partial false memories. The results bear on ways in which false memories can be created and also have practical implications for those involved in clinical and legal settings.

  16. Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

    2011-01-01

    NASA is planning on going beyond Low Earth orbit with manned exploration missions. The radiation environment for most Low Earth orbit missions is harsher than at the Earth's surface but much less harsh than deep space. Development of new electronics is needed to meet the requirements of high performance, radiation tolerance, and reliability. The need for both Volatile and Non-volatile memory has been identified. Emerging Non-volatile memory technologies (FRAM, C-RAM,M-RAM, R-RAM, Radiation Tolerant FLASH, SONOS, etc.) need to be investigated for use in Space missions. An opportunity arose to fly a small memory experiment on a high inclination satellite (FASTSAT). An off-the-shelf 512K Ramtron FRAM was chosen to be tested in the experiment.

  17. Scalable quantum memory in the ultrastrong coupling regime.

    PubMed

    Kyaw, T H; Felicetti, S; Romero, G; Solano, E; Kwek, L-C

    2015-03-02

    Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances.

  18. Scalable quantum memory in the ultrastrong coupling regime

    PubMed Central

    Kyaw, T. H.; Felicetti, S.; Romero, G.; Solano, E.; Kwek, L.-C.

    2015-01-01

    Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances. PMID:25727251

  19. Reliability of Memories Protected by Multibit Error Correction Codes Against MBUs

    NASA Astrophysics Data System (ADS)

    Ming, Zhu; Yi, Xiao Li; Chang, Liu; Wei, Zhang Jian

    2011-02-01

    As technology scales, more and more memory cells can be placed in a die. Therefore, the probability that a single event induces multiple bit upsets (MBUs) in adjacent memory cells gets greater. Generally, multibit error correction codes (MECCs) are effective approaches to mitigate MBUs in memories. In order to evaluate the robustness of protected memories, reliability models have been widely studied nowadays. Instead of irradiation experiments, the models can be used to quickly evaluate the reliability of memories in the early design. To build an accurate model, some situations should be considered. Firstly, when MBUs are presented in memories, the errors induced by several events may overlap each other, which is more frequent than single event upset (SEU) case. Furthermore, radiation experiments show that the probability of MBUs strongly depends on angles of the radiation event. However, reliability models which consider the overlap of multiple bit errors and angles of radiation event have not been proposed in the present literature. In this paper, a more accurate model of memories with MECCs is presented. Both the overlap of multiple bit errors and angles of event are considered in the model, which produces a more precise analysis in the calculation of mean time to failure (MTTF) for memory systems under MBUs. In addition, memories with scrubbing and nonscrubbing are analyzed in the proposed model. Finally, we evaluate the reliability of memories under MBUs in Matlab. The simulation results verify the validity of the proposed model.

  20. Assistive technology for memory support in dementia.

    PubMed

    Van der Roest, Henriëtte G; Wenborn, Jennifer; Pastink, Channah; Dröes, Rose-Marie; Orrell, Martin

    2017-06-11

    The sustained interest in electronic assistive technology in dementia care has been fuelled by the urgent need to develop useful approaches to help support people with dementia at home. Also the low costs and wide availability of electronic devices make it more feasible to use electronic devices for the benefit of disabled persons. Information Communication Technology (ICT) devices designed to support people with dementia are usually referred to as Assistive Technology (AT) or Electronic Assistive Technology (EAT). By using AT in this review we refer to electronic assistive devices. A range of AT devices has been developed to support people with dementia and their carers to manage their daily activities and to enhance safety, for example electronic pill boxes, picture phones, or mobile tracking devices. Many are commercially available. However, the usefulness and user-friendliness of these devices are often poorly evaluated. Although reviews of (electronic) memory aids do exist, a systematic review of studies focusing on the efficacy of AT for memory support in people with dementia is lacking. Such a review would guide people with dementia and their informal and professional carers in selecting appropriate AT devices. Primary objectiveTo assess the efficacy of AT for memory support in people with dementia in terms of daily performance of personal and instrumental activities of daily living (ADL), level of dependency, and admission to long-term care. Secondary objectiveTo assess the impact of AT on: users (autonomy, usefulness and user-friendliness, adoption of AT); cognitive function and neuropsychiatric symptoms; need for informal and formal care; perceived quality of life; informal carer burden, self-esteem and feelings of competence; formal carer work satisfaction, workload and feelings of competence; and adverse events. We searched ALOIS, the Specialised Register of the Cochrane Dementia and Cognitive Improvement Group (CDCIG), on 10 November 2016. ALOIS is maintained by the Information Specialists of the CDCIG and contains studies in the areas of dementia prevention, dementia treatment and cognitive enhancement in healthy people. We also searched the following list of databases, adapting the search strategy as necessary: Centre for Reviews and Dissemination (CRD) Databases, up to May 2016; The Collection of Computer Science Bibliographies; DBLP Computer Science Bibliography; HCI Bibliography: Human-Computer Interaction Resources; and AgeInfo, all to June 2016; PiCarta; Inspec; Springer Link Lecture Notes; Social Care Online; and IEEE Computer Society Digital Library, all to October 2016; J-STAGE: Japan Science and Technology Information Aggregator, Electronic; and Networked Computer Science Technical Reference Library (NCSTRL), both to November 2016; Computing Research Repository (CoRR) up to December 2016; and OT seeker; and ADEAR, both to February 2017. In addition, we searched Google Scholar and OpenSIGLE for grey literature. We intended to review randomised controlled trials (RCTs) and clustered randomised trials with blinded assessment of outcomes that evaluated an electronic assistive device used with the single aim of supporting memory function in people diagnosed with dementia. The control interventions could either be 'care (or treatment) as usual' or non-technological psychosocial interventions (including interventions that use non-electronic assistive devices) also specifically aimed at supporting memory. Outcome measures included activities of daily living, level of dependency, clinical and care-related outcomes (for example admission to long-term care), perceived quality of life and well-being, and adverse events resulting from the use of AT; as well as the effects of AT on carers. Two review authors independently screened all titles and abstracts identified by the search. We identified no studies which met the inclusion criteria. This review highlights the current lack of high-quality evidence to determine whether AT is effective in supporting people with dementia to manage their memory problems.

  1. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

    PubMed

    Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

    2017-02-14

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  2. An ultra-compact processor module based on the R3000

    NASA Astrophysics Data System (ADS)

    Mullenhoff, D. J.; Kaschmitter, J. L.; Lyke, J. C.; Forman, G. A.

    1992-08-01

    Viable high density packaging is of critical importance for future military systems, particularly space borne systems which require minimum weight and size and high mechanical integrity. A leading, emerging technology for high density packaging is multi-chip modules (MCM). During the 1980's, a number of different MCM technologies have emerged. In support of Strategic Defense Initiative Organization (SDIO) programs, Lawrence Livermore National Laboratory (LLNL) has developed, utilized, and evaluated several different MCM technologies. Prior LLNL efforts include modules developed in 1986, using hybrid wafer scale packaging, which are still operational in an Air Force satellite mission. More recent efforts have included very high density cache memory modules, developed using laser pantography. As part of the demonstration effort, LLNL and Phillips Laboratory began collaborating in 1990 in the Phase 3 Multi-Chip Module (MCM) technology demonstration project. The goal of this program was to demonstrate the feasibility of General Electric's (GE) High Density Interconnect (HDI) MCM technology. The design chosen for this demonstration was the processor core for a MIPS R3000 based reduced instruction set computer (RISC), which has been described previously. It consists of the R3000 microprocessor, R3010 floating point coprocessor and 128 Kbytes of cache memory.

  3. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    PubMed Central

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-01-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

  4. Information Dissemination: Innovative Ways Agencies Are Using Technology. Testimony before the Government Information, Justice, and Agriculture Subcommittee, Committee on Government Operations, House of Representatives.

    ERIC Educational Resources Information Center

    Brock, Jack L., Jr.

    This testimony discusses ways in which some federal government agencies use technology to provide the public with cheaper, faster access to a wider range of information which can be searched and manipulated in ways never possible on the printed page. Technologies included in the discussion are compact disc-read only memory (CD-ROM), electronic…

  5. JPRS report: Science and Technology. Europe and Latin America

    NASA Astrophysics Data System (ADS)

    1988-01-01

    Articles from the popular and trade press are included on the following subjects: advanced materials, aerospace industry, automotive industry, biotechnology, computers, factory automation and robotics, microelectronics, and science and technology policy. The aerospace articles discuss briefly and in a nontechnical way the SAGEM bubble memories for space applications, Ariane V new testing facilities, innovative technologies of TDF-1 satellite, and the restructuring of the Aviation Division at France's Aerospatiale.

  6. 3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

    NASA Astrophysics Data System (ADS)

    Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

    2013-08-01

    In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

  7. Radiation-Tolerant Intelligent Memory Stack - RTIMS

    NASA Technical Reports Server (NTRS)

    Ng, Tak-kwong; Herath, Jeffrey A.

    2011-01-01

    This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

  8. CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

    NASA Astrophysics Data System (ADS)

    Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

    2008-05-01

    A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

  9. Imaging learning and memory: classical conditioning.

    PubMed

    Schreurs, B G; Alkon, D L

    2001-12-15

    The search for the biological basis of learning and memory has, until recently, been constrained by the limits of technology to classic anatomic and electrophysiologic studies. With the advent of functional imaging, we have begun to delve into what, for many, was a "black box." We review several different types of imaging experiments, including steady state animal experiments that image the functional labeling of fixed tissues, and dynamic human studies based on functional imaging of the intact brain during learning. The data suggest that learning and memory involve a surprising conservation of mechanisms and the integrated networking of a number of structures and processes. Copyright 2001 Wiley-Liss, Inc.

  10. National Memorial Institute for the Prevention of Terrorism

    NASA Astrophysics Data System (ADS)

    Reimer, Dennis J.; Houghton, Brian K.; Powell, Ellen L.

    2004-09-01

    The National Memorial Institute for the Prevention of Terrorism (MIPT) in Oklahoma City is a living memorial to the victims, survivors, family members and rescue workers affected by the April 19, 1995 bombing of the Murrah Federal Building. The Institute conducts research into the development of technologies to counter biological, nuclear and chemical weapons of mass destruction and cyberterrorism, as well as research into the social and political causes and effects of terrorism. This paper describes MIPT funded research in areas of detection, decontamination, personal protective equipment, attack simulations, treatments, awareness, improved public communication during and after an incident, as well as lessons learned from terrorist incidents.

  11. National Memorial Institute for the Prevention of Terrorism

    NASA Astrophysics Data System (ADS)

    Reimer, Dennis J.; Houghton, Brian K.; Ellis, James O., III

    2003-09-01

    The National Memorial Institute for the Prevention of Terrorism in Oklahoma City is a living memorial to the victims, survivors, family members and rescue workers affected by the April 19, 1995 bombing of the Murrah Federal Building. The Institute conducts research into the development of technologies to counter biological, nuclear and chemical weapons of mass destruction and cyberterrorism, as well as research into the social and political causes and effects of terrorism. This paper describes MIPT funded research in areas of detection, decontamination, personal protective equipment, attack simulations, treatments, awareness, improved public communication during and after an incident, as well as lessons learned from terrorist incidents.

  12. Technical support for digital systems technology development. Task order 1: ISP contention analysis and control

    NASA Technical Reports Server (NTRS)

    Stehle, Roy H.; Ogier, Richard G.

    1993-01-01

    Alternatives for realizing a packet-based network switch for use on a frequency division multiple access/time division multiplexed (FDMA/TDM) geostationary communication satellite were investigated. Each of the eight downlink beams supports eight directed dwells. The design needed to accommodate multicast packets with very low probability of loss due to contention. Three switch architectures were designed and analyzed. An output-queued, shared bus system yielded a functionally simple system, utilizing a first-in, first-out (FIFO) memory per downlink dwell, but at the expense of a large total memory requirement. A shared memory architecture offered the most efficiency in memory requirements, requiring about half the memory of the shared bus design. The processing requirement for the shared-memory system adds system complexity that may offset the benefits of the smaller memory. An alternative design using a shared memory buffer per downlink beam decreases circuit complexity through a distributed design, and requires at most 1000 packets of memory more than the completely shared memory design. Modifications to the basic packet switch designs were proposed to accommodate circuit-switched traffic, which must be served on a periodic basis with minimal delay. Methods for dynamically controlling the downlink dwell lengths were developed and analyzed. These methods adapt quickly to changing traffic demands, and do not add significant complexity or cost to the satellite and ground station designs. Methods for reducing the memory requirement by not requiring the satellite to store full packets were also proposed and analyzed. In addition, optimal packet and dwell lengths were computed as functions of memory size for the three switch architectures.

  13. Bifurcation structures of a cobweb model with memory and competing technologies

    NASA Astrophysics Data System (ADS)

    Agliari, Anna; Naimzada, Ahmad; Pecora, Nicolò

    2018-05-01

    In this paper we study a simple model based on the cobweb demand-supply framework with costly innovators and free imitators. The evolutionary selection between technologies depends on a performance measure which is related to the degree of memory. The resulting dynamics is described by a two-dimensional map. The map has a fixed point which may lose stability either via supercritical Neimark-Sacker bifurcation or flip bifurcation and several multistability situations exist. We describe some sequences of global bifurcations involving attracting and repelling closed invariant curves. These bifurcations, characterized by the creation of homoclinic connections or homoclinic tangles, are described through several numerical simulations. Particular bifurcation phenomena are also observed when the parameters are selected inside a periodicity region.

  14. Crystal growth within a phase change memory cell.

    PubMed

    Sebastian, Abu; Le Gallo, Manuel; Krebs, Daniel

    2014-07-07

    In spite of the prominent role played by phase change materials in information technology, a detailed understanding of the central property of such materials, namely the phase change mechanism, is still lacking mostly because of difficulties associated with experimental measurements. Here, we measure the crystal growth velocity of a phase change material at both the nanometre length and the nanosecond timescale using phase-change memory cells. The material is studied in the technologically relevant melt-quenched phase and directly in the environment in which the phase change material is going to be used in the application. We present a consistent description of the temperature dependence of the crystal growth velocity in the glass and the super-cooled liquid up to the melting temperature.

  15. The floating-gate non-volatile semiconductor memory--from invention to the digital age.

    PubMed

    Sze, S M

    2012-10-01

    In the past 45 years (from 1967 to 2012), the non-volatile semiconductor memory (NVSM) has emerged from a floating-gate concept to the prime technology driver of the largest industry in the world-the electronics industry. In this paper, we briefly review the historical development of NVSM and project its future trends to the year 2020. In addition, we consider NVSM's wide-range of applications from the digital cellular phone to tablet computer to digital television. As the device dimension is scaled down to the deca-nanometer regime, we expect that many innovations will be made to meet the scaling challenges, and NVSM-inspired technology will continue to enrich and improve our lives for decades to come.

  16. "To Err Is Human, but to Persist Is Diabolical": Loss of Organizational Memory and E-Learning Projects

    ERIC Educational Resources Information Center

    Ozdemir, Selcuk

    2010-01-01

    Many countries around the world install millions of computers, printers, projectors, smartboards, and similar technologies in primary and secondary schools to equip new generations with the ability to effectively access and critically evaluate information and communication technologies. However, experiences from different countries show that…

  17. Reflections on CD-ROM: Bridging the Gap between Technology and Purpose.

    ERIC Educational Resources Information Center

    Saviers, Shannon Smith

    1987-01-01

    Provides a technological overview of CD-ROM (Compact Disc-Read Only Memory), an optically-based medium for data storage offering large storage capacity, computer-based delivery system, read-only medium, and economic mass production. CD-ROM database attributes appropriate for information delivery are also reviewed, including large database size,…

  18. Criticality of Low-Energy Protons in Single-Event Effects Testing of Highly-Scaled Technologies

    NASA Technical Reports Server (NTRS)

    Pellish, Jonathan Allen; Marshall, Paul W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    We report low-energy proton and alpha particle SEE data on a 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) that demonstrates the criticality of understanding and using low-energy protons for SEE testing of highly-scaled technologies

  19. Marketplace of memory: what the brain fitness technology industry says about us and how we can do better.

    PubMed

    George, Daniel R; Whitehouse, Peter J

    2011-10-01

    In the therapeutic void created by over 20 failed Alzheimer's disease drugs during the past decade, a new marketplace of "brain fitness" technology products has emerged. Ranging from video games and computer software to mobile phone apps and hand-held devices, these commercial products promise to maintain and enhance the memory, concentration, visual and spatial skills, verbal recall, and executive functions of individual users. It is instructive to view these products as sociocultural objects deeply imbued with the values and ideologies of our age; consequently, this article offers a critique of the brain fitness technology marketplace while identifying limitations in the capacity of commercial products to realistically improve cognitive health. A broader conception of brain health is presented, going beyond the reductionism of the commercial brain fitness marketplace and asking how our most proximate relationships and local communities can play a role in supporting cognitive and psychosocial well-being. This vision is grounded in recent experiences at The Intergenerational School in Cleveland, OH, a multigenerational community-oriented learning environment that is implementing brain fitness technology in novel ways.

  20. Fast associative memory + slow neural circuitry = the computational model of the brain.

    NASA Astrophysics Data System (ADS)

    Berkovich, Simon; Berkovich, Efraim; Lapir, Gennady

    1997-08-01

    We propose a computational model of the brain based on a fast associative memory and relatively slow neural processors. In this model, processing time is expensive but memory access is not, and therefore most algorithmic tasks would be accomplished by using large look-up tables as opposed to calculating. The essential feature of an associative memory in this context (characteristic for a holographic type memory) is that it works without an explicit mechanism for resolution of multiple responses. As a result, the slow neuronal processing elements, overwhelmed by the flow of information, operate as a set of templates for ranking of the retrieved information. This structure addresses the primary controversy in the brain architecture: distributed organization of memory vs. localization of processing centers. This computational model offers an intriguing explanation of many of the paradoxical features in the brain architecture, such as integration of sensors (through DMA mechanism), subliminal perception, universality of software, interrupts, fault-tolerance, certain bizarre possibilities for rapid arithmetics etc. In conventional computer science the presented type of a computational model did not attract attention as it goes against the technological grain by using a working memory faster than processing elements.

  1. Importance of balanced architectures in the design of high-performance imaging systems

    NASA Astrophysics Data System (ADS)

    Sgro, Joseph A.; Stanton, Paul C.

    1999-03-01

    Imaging systems employed in demanding military and industrial applications, such as automatic target recognition and computer vision, typically require real-time high-performance computing resources. While high- performances computing systems have traditionally relied on proprietary architectures and custom components, recent advances in high performance general-purpose microprocessor technology have produced an abundance of low cost components suitable for use in high-performance computing systems. A common pitfall in the design of high performance imaging system, particularly systems employing scalable multiprocessor architectures, is the failure to balance computational and memory bandwidth. The performance of standard cluster designs, for example, in which several processors share a common memory bus, is typically constrained by memory bandwidth. The symptom characteristic of this problem is failure to the performance of the system to scale as more processors are added. The problem becomes exacerbated if I/O and memory functions share the same bus. The recent introduction of microprocessors with large internal caches and high performance external memory interfaces makes it practical to design high performance imaging system with balanced computational and memory bandwidth. Real word examples of such designs will be presented, along with a discussion of adapting algorithm design to best utilize available memory bandwidth.

  2. Application of source biasing technique for energy efficient DECODER circuit design: memory array application

    NASA Astrophysics Data System (ADS)

    Gupta, Neha; Parihar, Priyanka; Neema, Vaibhav

    2018-04-01

    Researchers have proposed many circuit techniques to reduce leakage power dissipation in memory cells. If we want to reduce the overall power in the memory system, we have to work on the input circuitry of memory architecture i.e. row and column decoder. In this research work, low leakage power with a high speed row and column decoder for memory array application is designed and four new techniques are proposed. In this work, the comparison of cluster DECODER, body bias DECODER, source bias DECODER, and source coupling DECODER are designed and analyzed for memory array application. Simulation is performed for the comparative analysis of different DECODER design parameters at 180 nm GPDK technology file using the CADENCE tool. Simulation results show that the proposed source bias DECODER circuit technique decreases the leakage current by 99.92% and static energy by 99.92% at a supply voltage of 1.2 V. The proposed circuit also improves dynamic power dissipation by 5.69%, dynamic PDP/EDP 65.03% and delay 57.25% at 1.2 V supply voltage.

  3. Feasibility study of molecular memory device based on DNA using methylation to store information

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jiang, Liming; Al-Dirini, Feras; Center for Neural Engineering

    DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibriummore » Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.« less

  4. Performance of asynchronous transfer mode (ATM) local area and wide area networks for medical imaging transmission in clinical environment.

    PubMed

    Huang, H K; Wong, A W; Zhu, X

    1997-01-01

    Asynchronous transfer mode (ATM) technology emerges as a leading candidate for medical image transmission in both local area network (LAN) and wide area network (WAN) applications. This paper describes the performance of an ATM LAN and WAN network at the University of California, San Francisco. The measurements were obtained using an intensive care unit (ICU) server connecting to four image workstations (WS) at four different locations of a hospital-integrated picture archiving and communication system (HI-PACS) in a daily regular clinical environment. Four types of performance were evaluated: magnetic disk-to-disk, disk-to-redundant array of inexpensive disks (RAID), RAID-to-memory, and memory-to-memory. Results demonstrate that the transmission rate between two workstations can reach 5-6 Mbytes/s from RAID-to-memory, and 8-10 Mbytes/s from memory-to-memory. When the server has to send images to all four workstations simultaneously, the transmission rate to each WS is about 4 Mbytes/s. Both situations are adequate for radiologic image communications for picture archiving and communication systems (PACS) and teleradiology applications.

  5. External Memory Aid Preferences of Individuals with Mild Memory Impairments.

    PubMed

    Lanzi, Alyssa; Wallace, Sarah E; Bourgeois, Michelle S

    2018-07-01

    Individuals with mild memory impairments often rely on external memory aids (EMAs) to compensate for impaired cognitive abilities and to support independent completion of activities of daily living. These strategies are evidence based; however, professionals have limited knowledge regarding individual preferences and guidance on how to incorporate a person-centered approach into the EMA development phase. The purpose of the current study was to qualitatively investigate individuals' preferences and experiences as they relate to EMAs. Data analysis included (1) evaluation of a posttreatment questionnaire to explore individual strategy preferences following intervention and (2) evaluation of group intervention videos using thematic coding to investigate individuals' experiences with strategies during intervention. Results suggest that older adults with mild memory impairments have unique preferences and experiences, despite limited variability in demographic characteristics. Some themes that emerged included memory ability awareness and attitudes toward technology. Within a person-centered approach, skilled professionals must consider individuals' unique needs, preferences, and experiences when developing strategies throughout the continuum of care to promote sustained EMA use within everyday settings. Thieme Medical Publishers 333 Seventh Avenue, New York, NY 10001, USA.

  6. Memory-assisted quantum key distribution resilient against multiple-excitation effects

    NASA Astrophysics Data System (ADS)

    Lo Piparo, Nicolò; Sinclair, Neil; Razavi, Mohsen

    2018-01-01

    Memory-assisted measurement-device-independent quantum key distribution (MA-MDI-QKD) has recently been proposed as a technique to improve the rate-versus-distance behavior of QKD systems by using existing, or nearly-achievable, quantum technologies. The promise is that MA-MDI-QKD would require less demanding quantum memories than the ones needed for probabilistic quantum repeaters. Nevertheless, early investigations suggest that, in order to beat the conventional memory-less QKD schemes, the quantum memories used in the MA-MDI-QKD protocols must have high bandwidth-storage products and short interaction times. Among different types of quantum memories, ensemble-based memories offer some of the required specifications, but they typically suffer from multiple excitation effects. To avoid the latter issue, in this paper, we propose two new variants of MA-MDI-QKD both relying on single-photon sources for entangling purposes. One is based on known techniques for entanglement distribution in quantum repeaters. This scheme turns out to offer no advantage even if one uses ideal single-photon sources. By finding the root cause of the problem, we then propose another setup, which can outperform single memory-less setups even if we allow for some imperfections in our single-photon sources. For such a scheme, we compare the key rate for different types of ensemble-based memories and show that certain classes of atomic ensembles can improve the rate-versus-distance behavior.

  7. Human Processing of Knowledge from Texts: Acquisition, Integration, and Reasoning

    DTIC Science & Technology

    1979-06-01

    comprehension. Norwood, N.J.: Ablex, 1977. Craik , F.I.M., and Lockhart , R. S. Levels of processing : for memory research. Journal of Verbal Learning A...Table 5.9 presents summary data regarding the performance levels and memory and search processes of individual subjects. The first row in Table 5.9...R-2256-ARP A June 1979 ARPA Order No.: 189-1 9020 Cybernetics Technology Human Processing of Knowledge from Texts: Acquisition, Integration, and

  8. High Band Technology Program (HiTeP)

    DTIC Science & Technology

    2005-03-01

    clock distribution circuit. One Receiver Memory module receives 60MHz reference sine wave and distributes 60MHz clock signals to all Receiver Memory...Diagram UNCLASSIFIED 23 in N00014-99-C-0314 Integrated Defense Systems Final Report 1 March 2005 .. 4.ran FibreXpress Fibre-Channel PMC "Motrl Medea FCR...the Electrically Short Crossed-Notch (ESCN). It is shorter than traditional traveling wave notch antennas. The 2X ECSN fin length is approximately 1.2

  9. Acute Sleep Deprivation Blocks Short- and Long-Term Operant Memory in Aplysia

    PubMed Central

    Krishnan, Harini C.; Gandour, Catherine E.; Ramos, Joshua L.; Wrinkle, Mariah C.; Sanchez-Pacheco, Joseph J.; Lyons, Lisa C.

    2016-01-01

    Study Objectives: Insufficient sleep in individuals appears increasingly common due to the demands of modern work schedules and technology use. Consequently, there is a growing need to understand the interactions between sleep deprivation and memory. The current study determined the effects of acute sleep deprivation on short and long-term associative memory using the marine mollusk Aplysia californica, a relatively simple model system well known for studies of learning and memory. Methods: Aplysia were sleep deprived for 9 hours using context changes and tactile stimulation either prior to or after training for the operant learning paradigm, learning that food is inedible (LFI). The effects of sleep deprivation on short-term (STM) and long-term memory (LTM) were assessed. Results: Acute sleep deprivation prior to LFI training impaired the induction of STM and LTM with persistent effects lasting at least 24 h. Sleep deprivation immediately after training blocked the consolidation of LTM. However, sleep deprivation following the period of molecular consolidation did not affect memory recall. Memory impairments were independent of handling-induced stress, as daytime handled control animals demonstrated no memory deficits. Additional training immediately after sleep deprivation failed to rescue the induction of memory, but additional training alleviated the persistent impairment in memory induction when training occurred 24 h following sleep deprivation. Conclusions: Acute sleep deprivation inhibited the induction and consolidation, but not the recall of memory. These behavioral studies establish Aplysia as an effective model system for studying the interactions between sleep and memory formation. Citation: Krishnan HC, Gandour CE, Ramos JL, Wrinkle MC, Sanchez-Pacheco JJ, Lyons LC. Acute sleep deprivation blocks short- and long-term operant memory in Aplysia. SLEEP 2016;39(12):2161–2171. PMID:27748243

  10. Phase change cellular automata modeling of GeTe, GaSb and SnSe stacked chalcogenide films

    NASA Astrophysics Data System (ADS)

    Mihai, C.; Velea, A.

    2018-06-01

    Data storage needs are increasing at a rapid pace across all economic sectors, so the need for new memory technologies with adequate capabilities is also high. Phase change memories (PCMs) are a leading contender in the emerging race for non-volatile memories due to their fast operation speed, high scalability, good reliability and low power consumption. However, in order to meet the present and future storage demands, PCM technologies must further increase the storage density. Here, we employ a probabilistic cellular automata approach to explore the multi-step threshold switching from the reset (off) to the set (on) state in chalcogenide stacked structures. Simulations have shown that in order to obtain multi-step switching with high contrast among different resistance states, the stacked structure needs to contain materials with a large difference among their crystallization temperatures and careful tuning of strata thicknesses. The crystallization dynamics can be controlled through the external energy pulses applied to the system, in such a way that a balance between nucleation and growth in phase change behavior can be achieved, optimized for PCMs.

  11. Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing.

    PubMed

    Rao, Feng; Ding, Keyuan; Zhou, Yuxing; Zheng, Yonghui; Xia, Mengjiao; Lv, Shilong; Song, Zhitang; Feng, Songlin; Ronneberger, Ider; Mazzarello, Riccardo; Zhang, Wei; Ma, Evan

    2017-12-15

    Operation speed is a key challenge in phase-change random-access memory (PCRAM) technology, especially for achieving subnanosecond high-speed cache memory. Commercialized PCRAM products are limited by the tens of nanoseconds writing speed, originating from the stochastic crystal nucleation during the crystallization of amorphous germanium antimony telluride (Ge 2 Sb 2 Te 5 ). Here, we demonstrate an alloying strategy to speed up the crystallization kinetics. The scandium antimony telluride (Sc 0.2 Sb 2 Te 3 ) compound that we designed allows a writing speed of only 700 picoseconds without preprogramming in a large conventional PCRAM device. This ultrafast crystallization stems from the reduced stochasticity of nucleation through geometrically matched and robust scandium telluride (ScTe) chemical bonds that stabilize crystal precursors in the amorphous state. Controlling nucleation through alloy design paves the way for the development of cache-type PCRAM technology to boost the working efficiency of computing systems. Copyright © 2017 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works.

  12. DDR Memories

    NASA Technical Reports Server (NTRS)

    Wyrwas, Edward J.

    2017-01-01

    This presentation will include information about Double Data Rate (DDR) technology, NASA Electronic Parts and Packaging (NEPP) tasks and their purpose, collaborations, a roadmap, NEPP partners, results to date, and future plans.

  13. A fast sequence assembly method based on compressed data structures.

    PubMed

    Liang, Peifeng; Zhang, Yancong; Lin, Kui; Hu, Jinglu

    2014-01-01

    Assembling a large genome using next generation sequencing reads requires large computer memory and a long execution time. To reduce these requirements, a memory and time efficient assembler is presented from applying FM-index in JR-Assembler, called FMJ-Assembler, where FM stand for FMR-index derived from the FM-index and BWT and J for jumping extension. The FMJ-Assembler uses expanded FM-index and BWT to compress data of reads to save memory and jumping extension method make it faster in CPU time. An extensive comparison of the FMJ-Assembler with current assemblers shows that the FMJ-Assembler achieves a better or comparable overall assembly quality and requires lower memory use and less CPU time. All these advantages of the FMJ-Assembler indicate that the FMJ-Assembler will be an efficient assembly method in next generation sequencing technology.

  14. Adopted children's co-production and use of 'trove' (a digitally enhanced memory box) to better understand their care histories through precious objects.

    PubMed

    Watson, Debbie; Meineck, Chloe; Lancaster, Beth

    2018-05-01

    This article presents an innovative project to develop and trial a prototype product called 'trove' to start to address challenges identified regarding current practice of life story work with children who are looked after and adopted. trove is a digitally enhanced memory box that utilises raspberry pi (a small single board computer) and radio-frequency identification (RFID) technologies to enable children to record their memories and to attach these to their precious objects using an electronic tag: providing a safe 'container' for their mementoes and memories. Located in theories of narrative identity and object attachment and drawing on Brodinsky's concept of communicative openness, we describe the children's engagements in the design and report the results of a small trial of 10 troves with adopted children in England.

  15. Optimization of a PCRAM Chip for high-speed read and highly reliable reset operations

    NASA Astrophysics Data System (ADS)

    Li, Xiaoyun; Chen, Houpeng; Li, Xi; Wang, Qian; Fan, Xi; Hu, Jiajun; Lei, Yu; Zhang, Qi; Tian, Zhen; Song, Zhitang

    2016-10-01

    The widely used traditional Flash memory suffers from its performance limits such as its serious crosstalk problems, and increasing complexity of floating gate scaling. Phase change random access memory (PCRAM) becomes one of the most potential nonvolatile memories among the new memory techniques. In this paper, a 1M-bit PCRAM chip is designed based on the SMIC 40nm CMOS technology. Focusing on the read and write performance, two new circuits with high-speed read operation and highly reliable reset operation are proposed. The high-speed read circuit effectively reduces the reading time from 74ns to 40ns. The double-mode reset circuit improves the chip yield. This 1M-bit PCRAM chip has been simulated on cadence. After layout design is completed, the chip will be taped out for post-test.

  16. Fault-tolerant NAND-flash memory module for next-generation scientific instruments

    NASA Astrophysics Data System (ADS)

    Lange, Tobias; Michel, Holger; Fiethe, Björn; Michalik, Harald; Walter, Dietmar

    2015-10-01

    Remote sensing instruments on today's space missions deliver a high amount of data which is typically evaluated on ground. Especially for deep space missions the telemetry downlink is very limited which creates the need for the scientific evaluation and thereby a reduction of data volume already on-board the spacecraft. A demanding example is the Polarimetric and Helioseismic Imager (PHI) instrument on Solar Orbiter. To enable on-board offline processing for data reduction, the instrument has to be equipped with a high capacity memory module. The module is based on non-volatile NAND-Flash technology, which requires more advanced operation than volatile DRAM. Unlike classical mass memories, the module is integrated into the instrument and allows readback of data for processing. The architecture and safe operation of such kind of memory module is described in the following paper.

  17. Runtime support for parallelizing data mining algorithms

    NASA Astrophysics Data System (ADS)

    Jin, Ruoming; Agrawal, Gagan

    2002-03-01

    With recent technological advances, shared memory parallel machines have become more scalable, and offer large main memories and high bus bandwidths. They are emerging as good platforms for data warehousing and data mining. In this paper, we focus on shared memory parallelization of data mining algorithms. We have developed a series of techniques for parallelization of data mining algorithms, including full replication, full locking, fixed locking, optimized full locking, and cache-sensitive locking. Unlike previous work on shared memory parallelization of specific data mining algorithms, all of our techniques apply to a large number of common data mining algorithms. In addition, we propose a reduction-object based interface for specifying a data mining algorithm. We show how our runtime system can apply any of the technique we have developed starting from a common specification of the algorithm.

  18. Spin transport and spin torque in antiferromagnetic devices

    DOE PAGES

    Zelezny, J.; Wadley, P.; Olejnik, K.; ...

    2018-03-02

    Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less

  19. Spin transport and spin torque in antiferromagnetic devices

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Zelezny, J.; Wadley, P.; Olejnik, K.

    Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less

  20. Progress towards broadband Raman quantum memory in Bose-Einstein condensates

    NASA Astrophysics Data System (ADS)

    Saglamyurek, Erhan; Hrushevskyi, Taras; Smith, Benjamin; Leblanc, Lindsay

    2017-04-01

    Optical quantum memories are building blocks for quantum information technologies. Efficient and long-lived storage in combination with high-speed (broadband) operation are key features required for practical applications. While the realization has been a great challenge, Raman memory in Bose-Einstein condensates (BECs) is a promising approach, due to negligible decoherence from diffusion and collisions that leads to seconds-scale memory times, high efficiency due to large atomic density, the possibility for atom-chip integration with micro photonics, and the suitability of the far off-resonant Raman approach with storage of broadband photons (over GHz) [5]. Here we report our progress towards Raman memory in a BEC. We describe our apparatus recently built for producing BEC with 87Rb atoms, and present the observation of nearly pure BEC with 5x105 atoms at 40 nK. After showing our initial characterizations, we discuss the suitability of our system for Raman-based light storage in our BEC.

  1. Superelasticity and cryogenic linear shape memory effects of CaFe 2As 2

    DOE PAGES

    Sypek, John T.; Yu, Hang; Dusoe, Keith J.; ...

    2017-10-20

    Shape memory materials have the ability to recover their original shape after a significant amount of deformation when they are subjected to certain stimuli, for instance, heat or magnetic fields. But, their performance is often limited by the energetics and geometry of the martensitic-austenitic phase transformation. We report a unique shape memory behavior in CaFe 2As 2, which exhibits superelasticity with over 13% recoverable strain, over 3 GPa yield strength, repeatable stress–strain response even at the micrometer scale, and cryogenic linear shape memory effects near 50 K. These properties are acheived through a reversible uni-axial phase transformation mechanism, the tetragonal/orthorhombic-to-collapsed-tetragonalmore » phase transformation. These results offer the possibility of developing cryogenic linear actuation technologies with a high precision and high actuation power per unit volume for deep space exploration, and more broadly, suggest a mechanistic path to a class of shape memory materials, ThCr 2Si 2-structured intermetallic compounds.« less

  2. Skyrmion-skyrmion and skyrmion-edge repulsions in skyrmion-based racetrack memory

    NASA Astrophysics Data System (ADS)

    Zhang, Xichao; Zhao, G. P.; Fangohr, Hans; Liu, J. Ping; Xia, W. X.; Xia, J.; Morvan, F. J.

    2015-01-01

    Magnetic skyrmions are promising for building next-generation magnetic memories and spintronic devices due to their stability, small size and the extremely low currents needed to move them. In particular, skyrmion-based racetrack memory is attractive for information technology, where skyrmions are used to store information as data bits instead of traditional domain walls. Here we numerically demonstrate the impacts of skyrmion-skyrmion and skyrmion-edge repulsions on the feasibility of skyrmion-based racetrack memory. The reliable and practicable spacing between consecutive skyrmionic bits on the racetrack as well as the ability to adjust it are investigated. Clogging of skyrmionic bits is found at the end of the racetrack, leading to the reduction of skyrmion size. Further, we demonstrate an effective and simple method to avoid the clogging of skyrmionic bits, which ensures the elimination of skyrmionic bits beyond the reading element. Our results give guidance for the design and development of future skyrmion-based racetrack memory.

  3. Improved performance of Ta2O5-x resistive switching memory by Gd-doping: Ultralow power operation, good data retention, and multilevel storage

    NASA Astrophysics Data System (ADS)

    Shi, K. X.; Xu, H. Y.; Wang, Z. Q.; Zhao, X. N.; Liu, W. Z.; Ma, J. G.; Liu, Y. C.

    2017-11-01

    Resistive-switching memory with ultralow-power consumption is very promising technology for next-generation data storage and high-energy-efficiency neurosynaptic chips. Herein, Ta2O5-x-based multilevel memories with ultralow-power consumption and good data retention were achieved by simple Gd-doping. The introduction of a Gd ion, as an oxygen trapper, not only suppresses the generation of oxygen vacancy defects and greatly increases the Ta2O5-x resistance but also increases the oxygen-ion migration barrier. As a result, the memory cells can operate at an ultralow current of 1 μA with the extrapolated retention time of >10 years at 85 °C and the high switching speeds of 10 ns/40 ns for SET/RESET processes. The energy consumption of the device is as low as 60 fJ/bit, which is comparable to emerging ultralow-energy consumption (<100 fJ/bit) memory devices.

  4. Spin transport and spin torque in antiferromagnetic devices

    NASA Astrophysics Data System (ADS)

    Železný, J.; Wadley, P.; Olejník, K.; Hoffmann, A.; Ohno, H.

    2018-03-01

    Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets, which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, which could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here, we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum-mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.

  5. History of International Workshop on Mini-Micro- and Nano- Dosimetry (MMND) and Innovation Technologies in Radiation Oncology (ITRO)

    NASA Astrophysics Data System (ADS)

    Rosenfeld, Anatoly B.; Zaider, Marco; Yamada, Josh; Zelefsky, Michael J.

    2017-01-01

    The biannual MMND (former MMD) - IPCT workshops was founded in collaboration between the Centre for Medical Radiation Physics, University of Wollongong and the Memorial Sloan Kettering Cancer Center (MSKCC) in 2001 and has become an important international multidisciplinary forum for the discussion of advanced quality assurance (QA) dosimetry technology for radiation therapy and space science, as well as advanced technologies for clinical cancer treatment.

  6. Research Themes and Technological Base Program in Behavioral and Social Sciences for the U.S. Army

    DTIC Science & Technology

    1976-01-01

    appears to produce different al human information processing strategies. Concrete stimuli exert unifying or organizing effects that function as memory ...Technology for Tactical Information Processing and Presentation Scope: a. Objectives: To provide technological advances for enchancing user performance in...auditory, and black and white- color , situation portrayal. 44 :v.:;..^ „..■ ..„i--.v ..^.:n:,r.^,...::..:■ .;......’,. .^.M. ■ m»m viriniap

  7. Data systems and computer science programs: Overview

    NASA Technical Reports Server (NTRS)

    Smith, Paul H.; Hunter, Paul

    1991-01-01

    An external review of the Integrated Technology Plan for the Civil Space Program is presented. The topics are presented in viewgraph form and include the following: onboard memory and storage technology; advanced flight computers; special purpose flight processors; onboard networking and testbeds; information archive, access, and retrieval; visualization; neural networks; software engineering; and flight control and operations.

  8. Organizational Learning as an Organization Development Intervention in Six High-Technology Firms in Taiwan: An Exploratory Case Study

    ERIC Educational Resources Information Center

    Lien, Bella Ya-Hui; Hung, Richard Y.; McLean, Gary N.

    2007-01-01

    Organizational learning (OL) is about how individuals collect, absorb, and transform information into organizational memory and knowledge. This case study explored how six high-technology firms in Taiwan chose OL as an organization development intervention strategy. Issues included how best to implement OL; how individuals, teams, and…

  9. Electric Potential and Electric Field Imaging with Applications

    NASA Technical Reports Server (NTRS)

    Generazio, Ed

    2016-01-01

    The technology and techniques for remote quantitative imaging of electrostatic potentials and electrostatic fields in and around objects and in free space is presented. Electric field imaging (EFI) technology may be applied to characterize intrinsic or existing electric potentials and electric fields, or an externally generated electrostatic field may be used for (illuminating) volumes to be inspected with EFI. The baseline sensor technology, electric field sensor (e-sensor), and its construction, optional electric field generation (quasistatic generator), and current e-sensor enhancements (ephemeral e-sensor) are discussed. Demonstrations for structural, electronic, human, and memory applications are shown. This new EFI capability is demonstrated to reveal characterization of electric charge distribution, creating a new field of study that embraces areas of interest including electrostatic discharge mitigation, crime scene forensics, design and materials selection for advanced sensors, dielectric morphology of structures, inspection of containers, inspection for hidden objects, tether integrity, organic molecular memory, and medical diagnostic and treatment efficacy applications such as cardiac polarization wave propagation and electromyography imaging.

  10. [Application of compression equipment using the "form memory" effect and super-elasticity of titanium nickelide in surgery for rectal cancer].

    PubMed

    Vlasov, A A; Vazhenin, A V; Plotnikov, V V; Spirev, V V; Chinarev, Iu B

    2010-01-01

    The study is concerned with development of equipment for forming circular compression intestinal anastomosis using the "form memory" effect and super-elasticity of titanium nickelide. A sequence of technological operations is suggested, experimental tests and clinical trials carried out and immediate and end-results for anterior resection in rectal cancer are evaluated. Compression equipment for forming colorectal anastomosis proved reliable in long-term operation.

  11. Structure and functional properties of TiNiZr surface layers obtained by high-velocity oxygen fuel spraying

    NASA Astrophysics Data System (ADS)

    Rusinov, P. O.; Blednova, Zh M.; Borovets, O. I.

    2017-05-01

    The authors studied a complex method of surface modification of steels for materials with shape memory effect (SME) Ti-Ni-Zr with a high-velocity oxygen-fuel spraying (HVOF) of mechanically activated (MA) powder in a protective medium. We assessed the functional properties and X-ray diffraction studies, which showed that the formation of surface layers according to the developed technology ensures the manifestation of the shape memory effect.

  12. Shape memory effect in nanosized Ti2NiCu alloy-based composites

    NASA Astrophysics Data System (ADS)

    Irzhak, A. V.; Lega, P. V.; Zhikharev, A. M.; Koledov, V. V.; Orlov, A. P.; Kuchin, D. S.; Tabachkova, N. Yu.; Dikan, V. A.; Shelyakov, A. V.; Beresin, M. Yu.; Pushin, V. G.; von Gratowski, S. V.; Pokrovskiy, V. Ya.; Zybtsev, S. G.; Shavrov, V. G.

    2017-01-01

    The shape memory effect (SME) in alloys with a thermoelastic martensite transition opens unique opportunities for the creation of miniature mechanical devices. The SME has been studied in layered composite microstructures consisting of a Ti2NiCu alloy and platinum. It occurs upon a decrease in the active layer thickness at least to 80 nm. Some physical and technological restrictions on the minimum size of a material with SME are discussed.

  13. Holographic memory for high-density data storage and high-speed pattern recognition

    NASA Astrophysics Data System (ADS)

    Gu, Claire

    2002-09-01

    As computers and the internet become faster and faster, more and more information is transmitted, received, and stored everyday. The demand for high density and fast access time data storage is pushing scientists and engineers to explore all possible approaches including magnetic, mechanical, optical, etc. Optical data storage has already demonstrated its potential in the competition against other storage technologies. CD and DVD are showing their advantages in the computer and entertainment market. What motivated the use of optical waves to store and access information is the same as the motivation for optical communication. Light or an optical wave has an enormous capacity (or bandwidth) to carry information because of its short wavelength and parallel nature. In optical storage, there are two types of mechanism, namely localized and holographic memories. What gives the holographic data storage an advantage over localized bit storage is the natural ability to read the stored information in parallel, therefore, meeting the demand for fast access. Another unique feature that makes the holographic data storage attractive is that it is capable of performing associative recall at an incomparable speed. Therefore, volume holographic memory is particularly suitable for high-density data storage and high-speed pattern recognition. In this paper, we review previous works on volume holographic memories and discuss the challenges for this technology to become a reality.

  14. Materials and other needs for advanced phase change memory (Presentation Recording)

    NASA Astrophysics Data System (ADS)

    Sosa, Norma E.

    2015-09-01

    Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

  15. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    NASA Astrophysics Data System (ADS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-04-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  16. Prospects for Geostationary Doppler Weather Radar

    NASA Technical Reports Server (NTRS)

    Tanelli, Simone; Fang, Houfei; Durden, Stephen L.; Im, Eastwood; Rhamat-Samii, Yahya

    2009-01-01

    A novel mission concept, namely NEXRAD in Space (NIS), was developed for detailed monitoring of hurricanes, cyclones, and severe storms from a geostationary orbit. This mission concept requires a space deployable 35-m diameter reflector that operates at 35-GHz with a surface figure accuracy requirement of 0.21 mm RMS. This reflector is well beyond the current state-of-the-art. To implement this mission concept, several potential technologies associated with large, lightweight, spaceborne reflectors have been investigated by this study. These spaceborne reflector technologies include mesh reflector technology, inflatable membrane reflector technology and Shape Memory Polymer reflector technology.

  17. Next Generation Mass Memory Architecture

    NASA Astrophysics Data System (ADS)

    Herpel, H.-J.; Stahle, M.; Lonsdorfer, U.; Binzer, N.

    2010-08-01

    Future Mass Memory units will have to cope with various demanding requirements driven by onboard instruments (optical and SAR) that generate a huge amount of data (>10TBit) at a data rate > 6 Gbps. For downlink data rates around 3 Gbps will be feasible using latest ka-band technology together with Variable Coding and Modulation (VCM) techniques. These high data rates and storage capacities need to be effectively managed. Therefore, data structures and data management functions have to be improved and adapted to existing standards like the Packet Utilisation Standard (PUS). In this paper we will present a highly modular and scalable architectural approach for mass memories in order to support a wide range of mission requirements.

  18. Emerging Applications for High K Materials in VLSI Technology

    PubMed Central

    Clark, Robert D.

    2014-01-01

    The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

  19. Semihierarchical quantum repeaters based on moderate lifetime quantum memories

    NASA Astrophysics Data System (ADS)

    Liu, Xiao; Zhou, Zong-Quan; Hua, Yi-Lin; Li, Chuan-Feng; Guo, Guang-Can

    2017-01-01

    The construction of large-scale quantum networks relies on the development of practical quantum repeaters. Many approaches have been proposed with the goal of outperforming the direct transmission of photons, but most of them are inefficient or difficult to implement with current technology. Here, we present a protocol that uses a semihierarchical structure to improve the entanglement distribution rate while reducing the requirement of memory time to a range of tens of milliseconds. This protocol can be implemented with a fixed distance of elementary links and fixed requirements on quantum memories, which are independent of the total distance. This configuration is especially suitable for scalable applications in large-scale quantum networks.

  20. Ferroelectric symmetry-protected multibit memory cell

    NASA Astrophysics Data System (ADS)

    Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

    2017-02-01

    The tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valued non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.

  1. A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986

    NASA Astrophysics Data System (ADS)

    Riley, J. L.

    1987-08-01

    This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.

  2. Safety of intraoperative electrophysiological monitoring (TES and EMG) for spinal and cranial lesions.

    PubMed

    Gazzeri, Roberto; Faiola, Andrea; Neroni, Massimiliano; Fiore, Claudio; Callovini, Giorgio; Pischedda, Mauro; Galarza, Marcelo

    2013-09-01

    Intraoperative motor evoked potentials (MEP) and electromyography (EMG) monitoring in patients with spinal and cranial lesions is a valuable tool for prevention of postoperative motor deficits. The purpose of this study was to determine whether electrophysiological monitoring during skull base, spinal cord, and spinal surgery might be useful for predicting postoperative motor deterioration. From January 2012 to March 2013, thirty-three consecutive patients were studied using intraoperative monitoring (Nuvasive NV-M5 System) to check the integrity of brainstem, spinal cord, and nerve roots, recording transcranial motor evoked potentials (TcMEPs) and electromyography. Changes in MEPs and EMGs were related to postoperative deficits. Preoperative diagnosis included skull base and brainstem lesions (6 patients), spinal tumors (11 patients), spinal deformity (16 cases). Using TcMEPs and EMG is a practicable and safe method. MEPs are useful in any surgery in which the brainstem and spinal cord are at risk. EMG stimulation helps to identify an optimal trans-psoas entry point for an extreme lateral lumbar interbody fusion (XLIF) approach to protect against potential nerve injury. This neural navigation technique via a surgeon-interpreted interface assists the surgical team in safely removing lesions and accessing the intervertebral disc space for minimally invasive spinal procedures.

  3. Environmental context effects on episodic memory are dependent on retrieval mode and modulated by neuropsychological status.

    PubMed

    Barak, Ohr; Vakil, Eli; Levy, Daniel A

    2013-01-01

    Contextual change or constancy between occasions of memory formation and retrieval are commonly assumed to affect retrieval success, yet such effects may be inconsistent, and the processes leading to the pattern of effects are still not well understood. We conducted a systematic investigation of environmental context effects on memory, using a range of materials (common objects, pictures of familiar and unfamiliar faces, words, and sentences), and four types of retrieval (free recall, cued recall, recognition, and order memory), all assessed within participants. Additionally, we examined the influence of mnemonic challenge on context effects by examining both healthy participants and a group of patients in rehabilitation following traumatic brain injury (TBI). We found no effects of contextual factors on tests of recognition for either group of participants, but effects did emerge for cued and free recall, with the most prominent effects being on memory for objects. Furthermore, while patients' memory abilities in general were impaired relative to the comparison group, they exhibited greater influences of contextual reinstatement on several recall tasks. These results support suggestions that environmental context effects on memory are dependent on retrieval mode and on the extent to which retrieval is challenging because of neurocognitive status. Additionally, findings of environmental context effects in memory-impaired TBI patients suggest that by harnessing such preserved indirect memory (e.g., using reminder technologies), it may be possible to ameliorate TBI patients' difficulties in explicit remembering.

  4. CoNNeCT Baseband Processor Module

    NASA Technical Reports Server (NTRS)

    Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.

    2011-01-01

    A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.

  5. New developments in optical phase-change memory

    NASA Astrophysics Data System (ADS)

    Ovshinsky, Stanford R.; Czubatyj, Wolodymyr

    2001-02-01

    Phase change technology has progressed from the original invention of Ovshinsky to become the leading choice for rewritable optical disks. ECD's early work in phase change materials and methods for operating in a direct overwrite fashion were crucial to the successes that have been achieved. Since the introduction of the first rewritable phase change products in 1991, the market has expanded from CD-RW into rewritable DVD with creative work going on worldwide. Phase change technology is ideally suited to address the continuous demand for increased storage capacity. First, laser beams can be focused to ever-smaller spot sizes using shorter wavelength lasers and higher performance optics. Blue lasers are now commercially viable and high numerical aperture and near field lenses have been demonstrated. Second, multilevel approaches can be used to increase capacity by a factor of three or more with concomitant increases in data transfer rate. In addition, ECD has decreased manufacturing costs through the use of innovative production technology. These factors combine to accelerate the widespread use of phase change technology. As in all our technologies, such as thin film photovoltaics, nickel metal hydride batteries, hydrogen storage systems, fuel cells, electrical memory, etc., we have invented the materials, the products, the production machines and the production processes for high rate, low-cost manufacture.

  6. OS friendly microprocessor architecture: Hardware level computer security

    NASA Astrophysics Data System (ADS)

    Jungwirth, Patrick; La Fratta, Patrick

    2016-05-01

    We present an introduction to the patented OS Friendly Microprocessor Architecture (OSFA) and hardware level computer security. Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. Conventional microprocessors have depended on the Operating System for computer security and information assurance. The goal of the OS Friendly Architecture is to provide a high performance and secure microprocessor and OS system. We are interested in cyber security, information technology (IT), and SCADA control professionals reviewing the hardware level security features. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For light-weight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the cache memory pipeline provides for background cache read and write operations while the microprocessor's execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor's execution pipeline from accessing the same cache bank at the same time. This separation allows the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. Computer security operations are implemented in hardware. By extending Unix file permissions bits to each cache memory bank and memory address, the OSFA provides hardware level computer security.

  7. Face classification using electronic synapses

    NASA Astrophysics Data System (ADS)

    Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H.-S. Philip; Qian, He

    2017-05-01

    Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

  8. Saving-enhanced memory: the benefits of saving on the learning and remembering of new information.

    PubMed

    Storm, Benjamin C; Stone, Sean M

    2015-02-01

    With the continued integration of technology into people's lives, saving digital information has become an everyday facet of human behavior. In the present research, we examined the consequences of saving certain information on the ability to learn and remember other information. Results from three experiments showed that saving one file before studying a new file significantly improved memory for the contents of the new file. Notably, this effect was not observed when the saving process was deemed unreliable or when the contents of the to-be-saved file were not substantial enough to interfere with memory for the new file. These results suggest that saving provides a means to strategically off-load memory onto the environment in order to reduce the extent to which currently unneeded to-be-remembered information interferes with the learning and remembering of other information. © The Author(s) 2014.

  9. PCI-based WILDFIRE reconfigurable computing engines

    NASA Astrophysics Data System (ADS)

    Fross, Bradley K.; Donaldson, Robert L.; Palmer, Douglas J.

    1996-10-01

    WILDFORCE is the first PCI-based custom reconfigurable computer that is based on the Splash 2 technology transferred from the National Security Agency and the Institute for Defense Analyses, Supercomputing Research Center (SRC). The WILDFORCE architecture has many of the features of the WILDFIRE computer, such as field- programmable gate array (FPGA) based processing elements, linear array and crossbar interconnection, and high- performance memory and I/O subsystems. New features introduced in the PCI-based WILDFIRE systems include memory/processor options that can be added to any processing element. These options include static and dynamic memory, digital signal processors (DSPs), FPGAs, and microprocessors. In addition to memory/processor options, many different application specific connectors can be used to extend the I/O capabilities of the system, including systolic I/O, camera input and video display output. This paper also discusses how this new PCI-based reconfigurable computing engine is used for rapid-prototyping, real-time video processing and other DSP applications.

  10. The memory remains: Understanding collective memory in the digital age

    PubMed Central

    García-Gavilanes, Ruth; Mollgaard, Anders; Tsvetkova, Milena; Yasseri, Taha

    2017-01-01

    Recently developed information communication technologies, particularly the Internet, have affected how we, both as individuals and as a society, create, store, and recall information. The Internet also provides us with a great opportunity to study memory using transactional large-scale data in a quantitative framework similar to the practice in natural sciences. We make use of online data by analyzing viewership statistics of Wikipedia articles on aircraft crashes. We study the relation between recent events and past events and particularly focus on understanding memory-triggering patterns. We devise a quantitative model that explains the flow of viewership from a current event to past events based on similarity in time, geography, topic, and the hyperlink structure of Wikipedia articles. We show that, on average, the secondary flow of attention to past events generated by these remembering processes is larger than the primary attention flow to the current event. We report these previously unknown cascading effects. PMID:28435881

  11. Reed Solomon codes for error control in byte organized computer memory systems

    NASA Technical Reports Server (NTRS)

    Lin, S.; Costello, D. J., Jr.

    1984-01-01

    A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. Some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation are presented. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative algorithm to find the error locator polynomial.

  12. Design and measurement of fully digital ternary content addressable memory using ratioless static random access memory cells and hierarchical-AND matching comparator

    NASA Astrophysics Data System (ADS)

    Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki

    2018-04-01

    A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.

  13. Face classification using electronic synapses.

    PubMed

    Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H-S Philip; Qian, He

    2017-05-12

    Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

  14. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2012

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Allen, Gregory R.

    2012-01-01

    The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

  15. Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

    NASA Technical Reports Server (NTRS)

    John, Caroline S.; MacLeod, Todd C.; Evans, Joe; Ho, Fat D.

    2011-01-01

    We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

  16. A fast low-power optical memory based on coupled micro-ring lasers

    NASA Astrophysics Data System (ADS)

    Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

    2004-11-01

    The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

  17. Robotic agents for supporting community-dwelling elderly people with memory complaints: Perceived needs and preferences.

    PubMed

    Wu, Ya-Huei; Faucounau, Véronique; Boulay, Mélodie; Maestrutti, Marina; Rigaud, Anne-Sophie

    2011-03-01

    Researchers in robotics have been increasingly focusing on robots as a means of supporting older people with cognitive impairment at home. The aim of this study is to explore the elderly's needs and preferences towards having an assistive robot in the home. In order to ensure the appropriateness of this technology, 30 subjects aged 60 and older with memory complaints were recruited from the Memory Clinic of the Broca Hospital. We conducted an interview-administered questionnaire that included questions about their needs and preferences concerning robot functions and modes of action. The subjects reported a desire to retain their capacity to manage their daily activities, to maintain good health and to stimulate their memory. Regarding robot functions, the cognitive stimulation programme earned the highest proportion of positive responses, followed by the safeguarding functions, fall detection and the automatic help call. © The Author(s) 2010.

  18. Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

    NASA Astrophysics Data System (ADS)

    Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

    2017-05-01

    Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

  19. Non-volatile magnetic random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  20. Broadband multiresonator quantum memory-interface.

    PubMed

    Moiseev, S A; Gerasimov, K I; Latypov, R R; Perminov, N S; Petrovnin, K V; Sherstyukov, O N

    2018-03-05

    In this paper we experimentally demonstrated a broadband scheme of the multiresonator quantum memory-interface. The microwave photonic scheme consists of the system of mini-resonators strongly interacting with a common broadband resonator coupled with the external waveguide. We have implemented the impedance matched quantum storage in this scheme via controllable tuning of the mini-resonator frequencies and coupling of the common resonator with the external waveguide. Proof-of-principal experiment has been demonstrated for broadband microwave pulses when the quantum efficiency of 16.3% was achieved at room temperature. By using the obtained experimental spectroscopic data, the dynamics of the signal retrieval has been simulated and promising results were found for high-Q mini-resonators in microwave and optical frequency ranges. The results pave the way for the experimental implementation of broadband quantum memory-interface with quite high efficiency η > 0.99 on the basis of modern technologies, including optical quantum memory at room temperature.

  1. The memory remains: Understanding collective memory in the digital age.

    PubMed

    García-Gavilanes, Ruth; Mollgaard, Anders; Tsvetkova, Milena; Yasseri, Taha

    2017-04-01

    Recently developed information communication technologies, particularly the Internet, have affected how we, both as individuals and as a society, create, store, and recall information. The Internet also provides us with a great opportunity to study memory using transactional large-scale data in a quantitative framework similar to the practice in natural sciences. We make use of online data by analyzing viewership statistics of Wikipedia articles on aircraft crashes. We study the relation between recent events and past events and particularly focus on understanding memory-triggering patterns. We devise a quantitative model that explains the flow of viewership from a current event to past events based on similarity in time, geography, topic, and the hyperlink structure of Wikipedia articles. We show that, on average, the secondary flow of attention to past events generated by these remembering processes is larger than the primary attention flow to the current event. We report these previously unknown cascading effects.

  2. Automatic Generation of Directive-Based Parallel Programs for Shared Memory Parallel Systems

    NASA Technical Reports Server (NTRS)

    Jin, Hao-Qiang; Yan, Jerry; Frumkin, Michael

    2000-01-01

    The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. As great progress was made in hardware and software technologies, performance of parallel programs with compiler directives has demonstrated large improvement. The introduction of OpenMP directives, the industrial standard for shared-memory programming, has minimized the issue of portability. Due to its ease of programming and its good performance, the technique has become very popular. In this study, we have extended CAPTools, a computer-aided parallelization toolkit, to automatically generate directive-based, OpenMP, parallel programs. We outline techniques used in the implementation of the tool and present test results on the NAS parallel benchmarks and ARC3D, a CFD application. This work demonstrates the great potential of using computer-aided tools to quickly port parallel programs and also achieve good performance.

  3. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sypek, John T.; Yu, Hang; Dusoe, Keith J.

    Shape memory materials have the ability to recover their original shape after a significant amount of deformation when they are subjected to certain stimuli, for instance, heat or magnetic fields. But, their performance is often limited by the energetics and geometry of the martensitic-austenitic phase transformation. We report a unique shape memory behavior in CaFe 2As 2, which exhibits superelasticity with over 13% recoverable strain, over 3 GPa yield strength, repeatable stress–strain response even at the micrometer scale, and cryogenic linear shape memory effects near 50 K. These properties are acheived through a reversible uni-axial phase transformation mechanism, the tetragonal/orthorhombic-to-collapsed-tetragonalmore » phase transformation. These results offer the possibility of developing cryogenic linear actuation technologies with a high precision and high actuation power per unit volume for deep space exploration, and more broadly, suggest a mechanistic path to a class of shape memory materials, ThCr 2Si 2-structured intermetallic compounds.« less

  4. Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2007-01-01

    Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  5. Design of a Multi-Level/Analog Ferroelectric Memory Device

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2006-01-01

    Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  6. Brain-based Learning.

    ERIC Educational Resources Information Center

    Weiss, Ruth Palombo

    2000-01-01

    Discusses brain research and how new imaging technologies allow scientists to explore how human brains process memory, emotion, attention, patterning, motivation, and context. Explains how brain research is being used to revise learning theories. (JOW)

  7. Assessment of Attentional Workload while Driving by Eye-fixation-related Potentials

    NASA Astrophysics Data System (ADS)

    Takeda, Yuji; Yoshitsugu, Noritoshi; Itoh, Kazuya; Kanamori, Nobuhiro

    How do drivers cope with the attentional workload of in-vehicle information technology? In the present study, we propose a new psychophysiological measure for assessing drivers' attention: eye-fixation-related potential (EFRP). EFRP is a kind of event-related brain potential measurable at the eye-movement situation that reflects how closely observers examine visual information at the eye-fixated position. In the experiment, the effects of verbal working memory load and spatial working memory load during simulated driving were examined by measuring the number of saccadic eye-movements and EFRP as the indices of drivers' attention. The results showed that the spatial working memory load affected both the number of saccadic eye-movements and the amplitude of the P100 component of EFRP, whereas the verbal working memory load affected only the number of saccadic eye-movements. This implies that drivers can perform time-sharing processing between driving and the verbal working memory task, but the decline of accuracy of visual processing during driving is inescapable when the spatial working memory load is given. The present study suggests that EFRP can provide a new index of drivers' attention, other than saccadic eye-movements.

  8. Robot Evolutionary Localization Based on Attentive Visual Short-Term Memory

    PubMed Central

    Vega, Julio; Perdices, Eduardo; Cañas, José M.

    2013-01-01

    Cameras are one of the most relevant sensors in autonomous robots. However, two of their challenges are to extract useful information from captured images, and to manage the small field of view of regular cameras. This paper proposes implementing a dynamic visual memory to store the information gathered from a moving camera on board a robot, followed by an attention system to choose where to look with this mobile camera, and a visual localization algorithm that incorporates this visual memory. The visual memory is a collection of relevant task-oriented objects and 3D segments, and its scope is wider than the current camera field of view. The attention module takes into account the need to reobserve objects in the visual memory and the need to explore new areas. The visual memory is useful also in localization tasks, as it provides more information about robot surroundings than the current instantaneous image. This visual system is intended as underlying technology for service robot applications in real people's homes. Several experiments have been carried out, both with simulated and real Pioneer and Nao robots, to validate the system and each of its components in office scenarios. PMID:23337333

  9. The effect of individual differences in working memory in older adults on performance with different degrees of automated technology.

    PubMed

    Pak, Richard; McLaughlin, Anne Collins; Leidheiser, William; Rovira, Ericka

    2017-04-01

    A leading hypothesis to explain older adults' overdependence on automation is age-related declines in working memory. However, it has not been empirically examined. The purpose of the current experiment was to examine how working memory affected performance with different degrees of automation in older adults. In contrast to the well-supported idea that higher degrees of automation, when the automation is correct, benefits performance but higher degrees of automation, when the automation fails, increasingly harms performance, older adults benefited from higher degrees of automation when the automation was correct but were not differentially harmed by automation failures. Surprisingly, working memory did not interact with degree of automation but did interact with automation correctness or failure. When automation was correct, older adults with higher working memory ability had better performance than those with lower abilities. But when automation was incorrect, all older adults, regardless of working memory ability, performed poorly. Practitioner Summary: The design of automation intended for older adults should focus on ways of making the correctness of the automation apparent to the older user and suggest ways of helping them recover when it is malfunctioning.

  10. Reducing cognitive load in the chemistry laboratory by using technology-driven guided inquiry experiments

    NASA Astrophysics Data System (ADS)

    Hubacz, Frank, Jr.

    The chemistry laboratory is an integral component of the learning experience for students enrolled in college-level general chemistry courses. Science education research has shown that guided inquiry investigations provide students with an optimum learning environment within the laboratory. These investigations reflect the basic tenets of constructivism by engaging students in a learning environment that allows them to experience what they learn and to then construct, in their own minds, a meaningful understanding of the ideas and concepts investigated. However, educational research also indicates that the physical plant of the laboratory environment combined with the procedural requirements of the investigation itself often produces a great demand upon a student's working memory. This demand, which is often superfluous to the chemical concept under investigation, creates a sensory overload or extraneous cognitive load within the working memory and becomes a significant obstacle to student learning. Extraneous cognitive load inhibits necessary schema formation within the learner's working memory thereby impeding the transfer of ideas to the learner's long-term memory. Cognitive Load Theory suggests that instructional material developed to reduce extraneous cognitive load leads to an improved learning environment for the student which better allows for schema formation. This study first compared the cognitive load demand, as measured by mental effort, experienced by 33 participants enrolled in a first-year general chemistry course in which the treatment group, using technology based investigations, and the non-treatment group, using traditional labware, investigated identical chemical concepts on five different exercises. Mental effort was measured via a mental effort survey, a statistical comparison of individual survey results to a procedural step count, and an analysis of fourteen post-treatment interviews. Next, a statistical analysis of achievement was completed by comparing lab grade averages, final exam averages, and final course grade averages between the two groups. Participant mental effort survey results showed significant positive effects of technology in reducing cognitive load for two laboratory investigations. One investigation revealed a significant difference in achievement measured by lab grade average comparisons. Although results of this study are inconclusive as to the usefulness of technology-driven investigations to affect learning, recommendations for further study are discussed.

  11. [Organization of out-patient psychiatric care in dementia and cognitive impairment in aged. Part II: Clinical and economic efficacy of memory clinics and Alzheimer's disease centers].

    PubMed

    Mikhaylova, N M

    The part II of the review is focused on a history of developing of memory clinics and Alzheimer's disease centers as well as on the indices of their activity in various countries and in Russia. Approaches to the evaluation of clinical and economic efficacy of new technologies of organization of care and a role of the national programs in solving of the problem of old age dementias were considered.

  12. Thermo-Mechanical Methodology for Stabilizing Shape Memory Alloy Response

    NASA Technical Reports Server (NTRS)

    Padula, Santo

    2013-01-01

    This innovation is capable of significantly reducing the amount of time required to stabilize the strain-temperature response of a shape memory alloy (SMA). Unlike traditional stabilization processes that take days to weeks to achieve stabilized response, this innovation accomplishes stabilization in a matter of minutes, thus making it highly useful for the successful and practical implementation of SMA-based technologies in real-world applications. The innovation can also be applied to complex geometry components, not just simple geometries like wires or rods.

  13. Fault Tolerant VLSI Design Assessments for Advanced Avionics Department

    DTIC Science & Technology

    1982-02-06

    negative sense. Another facet of the literature review is to acquaint the researchers with the immense literature base for electronic technology applicable ...Report: Semiconductor Memories are Tested Over Data-Storage Application ", Electronics, vol. 46, August 19. G. Luecke, J. P. Mlize and W. N. Carr...Semiconductor Memories, Desi-n and Application , New York, McGraw iLiii, 1973. 20. P, A. Lee, N. Ghani and K. Heron, "A Recovery Cache for the PDP-lI" Digest

  14. Between Identification and Subjectification: Affective Technologies of Expertise and Temporality in the Contemporary Cultural Representation of Gendered Childhoods

    ERIC Educational Resources Information Center

    Burman, Erica

    2012-01-01

    This article explores political ambiguities surrounding the mutual implication between technology and subjectivity, through the analysis of recent cultural texts about childhood. These ambiguities are shown to rely upon the mobilisation of memory and assume specific gendered forms. The appeal to the past figured by the child is also shown to…

  15. Conference on Charge-Coupled Device Technology and Applications

    NASA Technical Reports Server (NTRS)

    1976-01-01

    Papers were presented from the conference on charge coupled device technology and applications. The following topics were investigated: data processing; infrared; devices and testing; electron-in, x-ray, radiation; and applications. The emphasis was on the advances of mutual relevance and potential significance both to industry and NASA's current and future requirements in all fields of imaging, signal processing and memory.

  16. Advanced Avionic Systems for Multimission Applications. Volume I.

    DTIC Science & Technology

    1982-10-01

    technical report are theoretical and in no way reflect Air Fortp-nwnpid qnftwRrp png ramc 19. KEY WORDS (Continue on reveree aide It neceeary and Identify...addressed (1) the Development & Evaluation of Advanced Digital Avionics System Architectures and (2) the Development of a Single Processor Synchronous...29 4.3.2 Memory Technologies . . . . . . . . . . . . . . . . . 30 4.3.3 BIU Technology . . . . . . . . . . . . . . . . . . . 33

  17. Spring 2006. Industry Study. Information Technology Industry

    DTIC Science & Technology

    2006-01-01

    unclassified c . THIS PAGE unclassified Standard Form 298 (Rev. 8-98) Prescribed by ANSI Std Z39-18 i Information Technology 2006 ABSTRACT...integration of processors, coprocessors, memory, storage, etc. into a user-programmable final product. C . Software (Apple, Oracle): These firms...able to support the U.S. national security interests. C . Manufacturing: The personal computer manufacturing industry has also changed considerably

  18. "It's on the Tip of My Google": Intra-Active Performance and the Non-Totalising Learning Environment

    ERIC Educational Resources Information Center

    Snake-Beings, Emit

    2017-01-01

    Technologies that expand the learning environment to include interactions outside of the physical space of the classroom, such as the use of Google as an aid to memory, represent one aspect of learning that occurs within several seemingly decentralised spaces. On the other hand, it can be argued that such interactive technologies are enclosed in…

  19. JPRS Report Science & Technology Europe.

    DTIC Science & Technology

    1992-10-22

    Potatoes for More Sugar [Frankfurt/Main FRANKFURTER ALLEGEMEINE, 12 Aug 92] 26 COMPUTERS French Devise Operating System for Parallel, Failure...Tolerant and Real-Time Systems [Munich COMPUTER WOCHE, 5 Jun 92] 27 Germany Markets External Mass Memory for IBM-Compatible Parallel Interfaces...Infrared Detection System [Thierry Lucas; Paris L’USINE NOUVELLE TECHNOLOGIES, 16 Jul 92] 28 Streamlined ACE Fighter Airplane Approved [Paris AFP

  20. Indian Vacuum Society: The Indian Vacuum Society

    NASA Astrophysics Data System (ADS)

    Saha, T. K.

    2008-03-01

    The Indian Vacuum Society (IVS) was established in 1970. It has over 800 members including many from Industry and R & D Institutions spread throughout India. The society has an active chapter at Kolkata. The society was formed with the main aim to promote, encourage and develop the growth of Vacuum Science, Techniques and Applications in India. In order to achieve this aim it has conducted a number of short term courses at graduate and technician levels on vacuum science and technology on topics ranging from low vacuum to ultrahigh vacuum So far it has conducted 39 such courses at different parts of the country and imparted training to more than 1200 persons in the field. Some of these courses were in-plant training courses conducted on the premises of the establishment and designed to take care of the special needs of the establishment. IVS also regularly conducts national and international seminars and symposia on vacuum science and technology with special emphasis on some theme related to applications of vacuum. A large number of delegates from all over India take part in the deliberations of such seminars and symposia and present their work. IVS also arranges technical visits to different industries and research institutes. The society also helped in the UNESCO sponsored post-graduate level courses in vacuum science, technology and applications conducted by Mumbai University. The society has also designed a certificate and diploma course for graduate level students studying vacuum science and technology and has submitted a syllabus to the academic council of the University of Mumbai for their approval, we hope that some colleges affiliated to the university will start this course from the coming academic year. IVS extended its support in standardizing many of the vacuum instruments and played a vital role in helping to set up a Regional Testing Centre along with BARC. As part of the development of vacuum education, the society arranges the participation of expert members on the subject to deliver lectures and take part in devising courses in the universities. IVS publishes a quarterly called the `Bulletin of Indian Vacuum Society' since its inception, in which articles on vacuum and related topics are published. NIRVAT, news, announcements, and reports are the other features of the Bulletin. The articles in the Bulletin are internationally abstracted. The Bulletin is distributed free to all the members of the society. The society also publishes proceedings of national/international symposia and seminars, manuals, lecture notes etc. It has published a `Vacuum Directory' containing very useful information on vacuum technology. IVS has also set up its own website http://www.ivsnet.org in January 2002. The website contains information about IVS, list of members, list of EC members, events and news, abstracts of articles published in the `Bulletin of Indian Vacuum Society', utilities, announcements, reports, membership and other forms which can be completed online and also gives links to other vacuum societies. Our Society has been a member of the executive council of the International Union of Vacuum Science, Techniques and Applications (IUVSTA) and its various committees since 1970. In 1983 IVS conducted an International Symposium on Vacuum Technology and Nuclear Applications in BARC, Mumbai, under the sponsorship of IUVSTA. In 1987 IVS arranged the Triennial International Conference on Thin Films in New Delhi, where more than 200 foreign delegates participated. IVS also hosted the IUVSTA Executive Council Meeting along with the conference. The society organized yet again an International Conference on Vacuum Science and Technology and SRS Vacuum Systems at CAT, Indore in1995. IVS arranges the prestigious Professor Balakrishnan Memorial Lecture in memory of its founder vice-president. Leading scientists from India and abroad in the field are invited to deliver the talks. So far 23 lectures have been held in this series. IVS has instituted the `IVS- Professor D Y Phadke Memorial Prize' in memory of our founder president, the late Professor D Y Phadke at the University of Mumbai. The prize is given every year to the student ranked top in the MSc (PHY.) examination conducted by the university. The IVS Kolkata Chapter has established the Dr A S Divatia Memorial Trust with the objective of organizing the Dr A S Divatia Memorial Lecture and a seminar once a year and to set up a vacuum testing and calibration facility. IVS has instituted an award in memory of the late Shri C Ambasankaran, its past president and pioneer of vacuum technology in India. This award is given to one of the best papers presented in the national symposium conducted by IVS. One more best paper award `Smt. Shakuntalabai Vyawahare Memorial Prize' is established from a donation given by Shri Mohan R Vyawahare, a life member and a present EC member of the society, in memory of his mother. During the symposia, IVS felicitates two of its members, one from Industry and one from an R & D Institution for their lifetime contribution to vacuum science and technology. Dr A K Gupta, Ex BARC, Ex Generla Manager, IBP, Head, Energy Group, Shapoorji Pallonji & Co Ltd (Industry), and Dr S R Gowariker, Ex BARC, Ex Director, CSIO, Chandigarh, Director, Tolani Education Foundation (R & D) are being honoured this year. T K Saha Geneneral Secretary, IVS

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