Metal-organic molecular device for non-volatile memory storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Radha, B., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in

Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organicmore » complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.« less

Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

NASA Astrophysics Data System (ADS)

Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

2015-10-01

Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e

A Comprehensive Study on Energy Efficiency and Performance of Flash-based SSD

DOE Office of Scientific and Technical Information (OSTI.GOV)

Park, Seon-Yeon; Kim, Youngjae; Urgaonkar, Bhuvan

2011-01-01

Use of flash memory as a storage medium is becoming popular in diverse computing environments. However, because of differences in interface, flash memory requires a hard-disk-emulation layer, called FTL (flash translation layer). Although the FTL enables flash memory storages to replace conventional hard disks, it induces significant computational and space overhead. Despite the low power consumption of flash memory, this overhead leads to significant power consumption in an overall storage system. In this paper, we analyze the characteristics of flash-based storage devices from the viewpoint of power consumption and energy efficiency by using various methodologies. First, we utilize simulation tomore » investigate the interior operation of flash-based storage of flash-based storages. Subsequently, we measure the performance and energy efficiency of commodity flash-based SSDs by using microbenchmarks to identify the block-device level characteristics and macrobenchmarks to reveal their filesystem level characteristics.« less

Feasibility study of molecular memory device based on DNA using methylation to store information

NASA Astrophysics Data System (ADS)

Jiang, Liming; Qiu, Wanzhi; Al-Dirini, Feras; Hossain, Faruque M.; Evans, Robin; Skafidas, Efstratios

2016-07-01

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory

NASA Astrophysics Data System (ADS)

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-01

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory.

PubMed

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-23

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Systems and methods to control multiple peripherals with a single-peripheral application code

DOEpatents

Ransom, Ray M.

2013-06-11

Methods and apparatus are provided for enhancing the BIOS of a hardware peripheral device to manage multiple peripheral devices simultaneously without modifying the application software of the peripheral device. The apparatus comprises a logic control unit and a memory in communication with the logic control unit. The memory is partitioned into a plurality of ranges, each range comprising one or more blocks of memory, one range being associated with each instance of the peripheral application and one range being reserved for storage of a data pointer related to each peripheral application of the plurality. The logic control unit is configured to operate multiple instances of the control application by duplicating one instance of the peripheral application for each peripheral device of the plurality and partitioning a memory device into partitions comprising one or more blocks of memory, one partition being associated with each instance of the peripheral application. The method then reserves a range of memory addresses for storage of a data pointer related to each peripheral device of the plurality, and initializes each of the plurality of peripheral devices.

Electrical reliability, multilevel data storage and mechanical stability of MoS2-PMMA nanocomposite-based non-volatile memory device

NASA Astrophysics Data System (ADS)

Bhattacharjee, Snigdha; Sarkar, Pranab Kumar; Prajapat, Manoj; Roy, Asim

2017-07-01

Molybdenum disulfide (MoS2) is of great interest for its applicability in various optoelectronic devices. Here we report the resistive switching properties of polymethylmethacrylate embedding MoS2 nano-crystals. The devices are developed on an ITO-coated PET substrate with copper as the top electrode. Systematic evaluation of resistive switching parameters, on the basis of MoS2 content, suggests non-volatile memory characteristics. A decent ON/OFF ratio, high retention time and long endurance of 3  ×  103, 105 s and 105 cycles are respectively recorded in a device with 1 weight percent (wt%) of MoS2. The bending cyclic measurements confirm the flexibility of the memory devices with good electrical reliability as well as mechanical stability. In addition, multilevel storage has been demonstrated by controlling the current compliance and span of voltage sweeping in the memory device.

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Feasibility study of molecular memory device based on DNA using methylation to store information

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Liming; Al-Dirini, Feras; Center for Neural Engineering

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibriummore » Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.« less

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature.

PubMed

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-11-22

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

PubMed Central

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-01-01

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

Data systems and computer science space data systems: Onboard memory and storage

NASA Technical Reports Server (NTRS)

Shull, Tom

1991-01-01

The topics are presented in viewgraph form and include the following: technical objectives; technology challenges; state-of-the-art assessment; mass storage comparison; SODR drive and system concepts; program description; vertical Bloch line (VBL) device concept; relationship to external programs; and backup charts for memory and storage.

Garnet Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1995-01-01

Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures

PubMed Central

Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo

2018-01-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.

PubMed

Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun

2018-04-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.

Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

NASA Astrophysics Data System (ADS)

Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

2014-11-01

Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

Monolayer optical memory cells based on artificial trap-mediated charge storage and release

NASA Astrophysics Data System (ADS)

Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min

2017-03-01

Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.

Pentacene-based metal-insulator-semiconductor memory structures utilizing single walled carbon nanotubes as a nanofloating gate

NASA Astrophysics Data System (ADS)

Sleiman, A.; Rosamond, M. C.; Alba Martin, M.; Ayesh, A.; Al Ghaferi, A.; Gallant, A. J.; Mabrook, M. F.; Zeze, D. A.

2012-01-01

A pentacene-based organic metal-insulator-semiconductor memory device, utilizing single walled carbon nanotubes (SWCNTs) for charge storage is reported. SWCNTs were embedded, between SU8 and polymethylmethacrylate to achieve an efficient encapsulation. The devices exhibit capacitance-voltage clockwise hysteresis with a 6 V memory window at ± 30 V sweep voltage, attributed to charging and discharging of SWCNTs. As the applied gate voltage exceeds the SU8 breakdown voltage, charge leakage is induced in SU8 to allow more charges to be stored in the SWCNT nodes. The devices exhibited high storage density (˜9.15 × 1011 cm-2) and demonstrated 94% charge retention due to the superior encapsulation.

Multistate storage nonvolatile memory device based on ferroelectricity and resistive switching effects of SrBi2Ta2O9 films

NASA Astrophysics Data System (ADS)

Song, Zhiwei; Li, Gang; Xiong, Ying; Cheng, Chuanpin; Zhang, Wanli; Tang, Minghua; Li, Zheng; He, Jiangheng

2018-05-01

A memory device with a Pt/SrBi2Ta2O9(SBT)/Pt(111) structure was shown to have excellent combined ferroelectricity and resistive switching properties, leading to higher multistate storage memory capacity in contrast to ferroelectric memory devices. In this device, SBT polycrystalline thin films with significant (115) orientation were fabricated on Pt(111)/Ti/SiO2/Si(100) substrates using CVD (chemical vapor deposition) method. Measurement results of the electric properties exhibit reproducible and reliable ferroelectricity switching behavior and bipolar resistive switching effects (BRS) without an electroforming process. The ON/OFF ratio of the resistive switching was found to be about 103. Switching mechanisms for the low resistance state (LRS) and high resistance state (HRS) currents are likely attributed to the Ohmic and space charge-limited current (SCLC) behavior, respectively. Moreover, the ferroelectricity and resistive switching effects were found to be mutually independent, and the four logic states were obtained by controlling the periodic sweeping voltage. This work holds great promise for nonvolatile multistate memory devices with high capacity and low cost.

Memory characteristics of metal-oxide-semiconductor structures based on Ge nanoclusters-embedded GeO(x) films grown at low temperature.

PubMed

Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng

2012-03-01

The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.

The Global File System

NASA Technical Reports Server (NTRS)

Soltis, Steven R.; Ruwart, Thomas M.; OKeefe, Matthew T.

1996-01-01

The global file system (GFS) is a prototype design for a distributed file system in which cluster nodes physically share storage devices connected via a network-like fiber channel. Networks and network-attached storage devices have advanced to a level of performance and extensibility so that the previous disadvantages of shared disk architectures are no longer valid. This shared storage architecture attempts to exploit the sophistication of storage device technologies whereas a server architecture diminishes a device's role to that of a simple component. GFS distributes the file system responsibilities across processing nodes, storage across the devices, and file system resources across the entire storage pool. GFS caches data on the storage devices instead of the main memories of the machines. Consistency is established by using a locking mechanism maintained by the storage devices to facilitate atomic read-modify-write operations. The locking mechanism is being prototyped in the Silicon Graphics IRIX operating system and is accessed using standard Unix commands and modules.

Extended write combining using a write continuation hint flag

DOEpatents

Chen, Dong; Gara, Alan; Heidelberger, Philip; Ohmacht, Martin; Vranas, Pavlos

2013-06-04

A computing apparatus for reducing the amount of processing in a network computing system which includes a network system device of a receiving node for receiving electronic messages comprising data. The electronic messages are transmitted from a sending node. The network system device determines when more data of a specific electronic message is being transmitted. A memory device stores the electronic message data and communicating with the network system device. A memory subsystem communicates with the memory device. The memory subsystem stores a portion of the electronic message when more data of the specific message will be received, and the buffer combines the portion with later received data and moves the data to the memory device for accessible storage.

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Optimal read/write memory system components

NASA Technical Reports Server (NTRS)

Kozma, A.; Vander Lugt, A.; Klinger, D.

1972-01-01

Two holographic data storage and display systems, voltage gradient ionization system, and linear strain manipulation system are discussed in terms of creating fast, high bit density, storage device. Components described include: novel mounting fixture for photoplastic arrays; corona discharge device; and block data composer.

How to Use Removable Mass Storage Memory Devices

ERIC Educational Resources Information Center

Branzburg, Jeffrey

2004-01-01

Mass storage refers to the variety of ways to keep large amounts of information that are used on a computer. Over the years, the removable storage devices have grown smaller, increased in capacity, and transferred the information to the computer faster. The 8" floppy disk of the 1960s stored 100 kilobytes, or about 60 typewritten, double-spaced…

A polymer/semiconductor write-once read-many-times memory

NASA Astrophysics Data System (ADS)

Möller, Sven; Perlov, Craig; Jackson, Warren; Taussig, Carl; Forrest, Stephen R.

2003-11-01

Organic devices promise to revolutionize the extent of, and access to, electronics by providing extremely inexpensive, lightweight and capable ubiquitous components that are printed onto plastic, glass or metal foils. One key component of an electronic circuit that has thus far received surprisingly little attention is an organic electronic memory. Here we report an architecture for a write-once read-many-times (WORM) memory, based on the hybrid integration of an electrochromic polymer with a thin-film silicon diode deposited onto a flexible metal foil substrate. WORM memories are desirable for ultralow-cost permanent storage of digital images, eliminating the need for slow, bulky and expensive mechanical drives used in conventional magnetic and optical memories. Our results indicate that the hybrid organic/inorganic memory device is a reliable means for achieving rapid, large-scale archival data storage. The WORM memory pixel exploits a mechanism of current-controlled, thermally activated un-doping of a two-component electrochromic conducting polymer.

Computer memory: the LLL experience. [Octopus computer network

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fletcher, J.G.

1976-02-01

Those aspects of Octopus computer network design are reviewed that relate to memory and storage. Emphasis is placed on the difficulties and problems that arise because of the limitations of present storage devices, and indications are made of the directions in which technological advance could be of most value. (auth)

Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

PubMed Central

Song, Ji-Min; Lee, Jang-Sik

2016-01-01

Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122

Camera memory study for large space telescope. [charge coupled devices

NASA Technical Reports Server (NTRS)

Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

1975-01-01

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Storage Media for Microcomputers.

ERIC Educational Resources Information Center

Trautman, Rodes

1983-01-01

Reviews computer storage devices designed to provide additional memory for microcomputers--chips, floppy disks, hard disks, optical disks--and describes how secondary storage is used (file transfer, formatting, ingredients of incompatibility); disk/controller/software triplet; magnetic tape backup; storage volatility; disk emulator; and…

MOSFET analog memory circuit achieves long duration signal storage

NASA Technical Reports Server (NTRS)

1966-01-01

Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

Wide memory window in graphene oxide charge storage nodes

NASA Astrophysics Data System (ADS)

Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping

2010-04-01

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

NASA Technical Reports Server (NTRS)

Nelson, G. L.; Krahn, D. R.; Dean, R. H.; Paul, M. C.; Lo, D. S.; Amundsen, D. L.; Stein, G. A.

1985-01-01

The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

DOEpatents

Asaad, Sameh W.; Kapur, Mohit

2016-03-15

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

High-speed noise-free optical quantum memory

NASA Astrophysics Data System (ADS)

Kaczmarek, K. T.; Ledingham, P. M.; Brecht, B.; Thomas, S. E.; Thekkadath, G. S.; Lazo-Arjona, O.; Munns, J. H. D.; Poem, E.; Feizpour, A.; Saunders, D. J.; Nunn, J.; Walmsley, I. A.

2018-04-01

Optical quantum memories are devices that store and recall quantum light and are vital to the realization of future photonic quantum networks. To date, much effort has been put into improving storage times and efficiencies of such devices to enable long-distance communications. However, less attention has been devoted to building quantum memories which add zero noise to the output. Even small additional noise can render the memory classical by destroying the fragile quantum signatures of the stored light. Therefore, noise performance is a critical parameter for all quantum memories. Here we introduce an intrinsically noise-free quantum memory protocol based on two-photon off-resonant cascaded absorption (ORCA). We demonstrate successful storage of GHz-bandwidth heralded single photons in a warm atomic vapor with no added noise, confirmed by the unaltered photon-number statistics upon recall. Our ORCA memory meets the stringent noise requirements for quantum memories while combining high-speed and room-temperature operation with technical simplicity, and therefore is immediately applicable to low-latency quantum networks.

Reduced electron back-injection in Al2O3/AlOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Min Kim, Sung; Lee, Youngmin; Seo, David H.; Seo, Sunae; Wang, Kang L.

2012-12-01

A graphene charge-trap memory is devised using a single-layer graphene channel with an Al2O3/AlOx/Al2O3 oxide stack, where the ion-bombarded AlOx layer is intentionally added to create an abundance of charge-trap sites. The low dielectric constant of AlOx compared to Al2O3 reduces the potential drop in the control oxide Al2O3 and suppresses the electron back-injection from the gate to the charge-storage layer, allowing the memory window of the device to be further extended. This shows that the usage of a lower dielectric constant in the charge-storage layer compared to that of the control oxide layer improves the memory performance for graphene charge-trap memories.

Investigation of fast initialization of spacecraft bubble memory systems

NASA Technical Reports Server (NTRS)

Looney, K. T.; Nichols, C. D.; Hayes, P. J.

1984-01-01

Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

Robust holographic storage system design.

PubMed

Watanabe, Takahiro; Watanabe, Minoru

2011-11-21

Demand is increasing daily for large data storage systems that are useful for applications in spacecraft, space satellites, and space robots, which are all exposed to radiation-rich space environment. As candidates for use in space embedded systems, holographic storage systems are promising because they can easily provided the demanded large-storage capability. Particularly, holographic storage systems, which have no rotation mechanism, are demanded because they are virtually maintenance-free. Although a holographic memory itself is an extremely robust device even in a space radiation environment, its associated lasers and drive circuit devices are vulnerable. Such vulnerabilities sometimes engendered severe problems that prevent reading of all contents of the holographic memory, which is a turn-off failure mode of a laser array. This paper therefore presents a proposal for a recovery method for the turn-off failure mode of a laser array on a holographic storage system, and describes results of an experimental demonstration. © 2011 Optical Society of America

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Organic memory device with self-assembly monolayered aptamer conjugated nanoparticles

NASA Astrophysics Data System (ADS)

Oh, Sewook; Kim, Minkeun; Kim, Yejin; Jung, Hunsang; Yoon, Tae-Sik; Choi, Young-Jin; Jung Kang, Chi; Moon, Myeong-Ju; Jeong, Yong-Yeon; Park, In-Kyu; Ho Lee, Hyun

2013-08-01

An organic memory structure using monolayered aptamer conjugated gold nanoparticles (Au NPs) as charge storage nodes was demonstrated. Metal-pentacene-insulator-semiconductor device was adopted for the non-volatile memory effect through self assembly monolayer of A10-aptamer conjugated Au NPs, which was formed on functionalized insulator surface with prostate-specific membrane antigen protein. The capacitance versus voltage (C-V) curves obtained for the monolayered Au NPs capacitor exhibited substantial flat-band voltage shift (ΔVFB) or memory window of 3.76 V under (+/-)7 V voltage sweep. The memory device format can be potentially expanded to a highly specific capacitive sensor for the aptamer-specific biomolecule detection.

Towards Highly-Efficient Phototriggered Data Storage by Utilizing a Diketopyrrolopyrrole-Based Photoelectronic Small Molecule.

PubMed

Li, Yang; Li, Hua; He, Jinghui; Xu, Qingfeng; Li, Najun; Chen, Dongyun; Lu, Jianmei

2016-07-20

A cooperative photoelectrical strategy is proposed for effectively modulating the performance of a multilevel data-storage device. By taking advantage of organic photoelectronic molecules as storage media, the fabricated device exhibited enhanced working parameters under the action of both optical and electrical inputs. In cooperation with UV light, the operating voltages of the memory device were decreased, which was beneficial for low energy consumption. Moreover, the ON/OFF current ratio was more tunable and facilitated high-resolution multilevel storage. Compared with previous methods that focused on tuning the storage media, this study provides an easy approach for optimizing organic devices through multiple physical channels. More importantly, this method holds promise for integrating multiple functionalities into high-density data-storage devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

New Trends of Digital Data Storage in DNA

PubMed Central

2016-01-01

With the exponential growth in the capacity of information generated and the emerging need for data to be stored for prolonged period of time, there emerges a need for a storage medium with high capacity, high storage density, and possibility to withstand extreme environmental conditions. DNA emerges as the prospective medium for data storage with its striking features. Diverse encoding models for reading and writing data onto DNA, codes for encrypting data which addresses issues of error generation, and approaches for developing codons and storage styles have been developed over the recent past. DNA has been identified as a potential medium for secret writing, which achieves the way towards DNA cryptography and stenography. DNA utilized as an organic memory device along with big data storage and analytics in DNA has paved the way towards DNA computing for solving computational problems. This paper critically analyzes the various methods used for encoding and encrypting data onto DNA while identifying the advantages and capability of every scheme to overcome the drawbacks identified priorly. Cryptography and stenography techniques have been analyzed in a critical approach while identifying the limitations of each method. This paper also identifies the advantages and limitations of DNA as a memory device and memory applications. PMID:27689089

New Trends of Digital Data Storage in DNA.

PubMed

De Silva, Pavani Yashodha; Ganegoda, Gamage Upeksha

With the exponential growth in the capacity of information generated and the emerging need for data to be stored for prolonged period of time, there emerges a need for a storage medium with high capacity, high storage density, and possibility to withstand extreme environmental conditions. DNA emerges as the prospective medium for data storage with its striking features. Diverse encoding models for reading and writing data onto DNA, codes for encrypting data which addresses issues of error generation, and approaches for developing codons and storage styles have been developed over the recent past. DNA has been identified as a potential medium for secret writing, which achieves the way towards DNA cryptography and stenography. DNA utilized as an organic memory device along with big data storage and analytics in DNA has paved the way towards DNA computing for solving computational problems. This paper critically analyzes the various methods used for encoding and encrypting data onto DNA while identifying the advantages and capability of every scheme to overcome the drawbacks identified priorly. Cryptography and stenography techniques have been analyzed in a critical approach while identifying the limitations of each method. This paper also identifies the advantages and limitations of DNA as a memory device and memory applications.

Investigation of resistive switching behaviours in WO3-based RRAM devices

NASA Astrophysics Data System (ADS)

Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming

2011-01-01

In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.

Organic memory capacitor device fabricated with Ag nanoparticles.

PubMed

Kim, Yo-Han; Jung, Sung Mok; Hu, Quanli; Kim, Yong-Sang; Yoon, Tae-Sik; Lee, Hyun Ho

2011-07-01

In this study, it is demonstrated that an organic memory structure using pentacene and citrate-stabilized silver nanoparticles (Ag NPs) as charge storage elements on dielectric SiO2 layer and silicon substrate. The Ag NPs were synthesized by thermal reduction method of silver trifluoroacetate with oleic acid. The synthesized Ag NPs were analyzed with high resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) for their crystalline structure. The capacitance versus voltage (C-V) curves obtained for the Ag NPs embedded capacitor exhibited flat-band voltage shifts, which demonstrated the presence of charge storages. The citrate-capping of the Ag NPs was confirmed by ultraviolet-visible (UV-VIS) and Fourier transformed infrared (FTIR) spectroscopy. With voltage sweeping of +/-7 V, a hysteresis loop having flatband voltage shift of 7.1 V was obtained. The hysteresis loop showed a counter-clockwise direction. In addition, electrical performance test for charge storage showed more than 10,000 second charge retention time. The device with Ag NPs can be applied to an organic memory device for flexible electronics.

Multipulse addressing of a Raman quantum memory: configurable beam splitting and efficient readout.

PubMed

Reim, K F; Nunn, J; Jin, X-M; Michelberger, P S; Champion, T F M; England, D G; Lee, K C; Kolthammer, W S; Langford, N K; Walmsley, I A

2012-06-29

Quantum memories are vital to the scalability of photonic quantum information processing (PQIP), since the storage of photons enables repeat-until-success strategies. On the other hand, the key element of all PQIP architectures is the beam splitter, which allows us to coherently couple optical modes. Here, we show how to combine these crucial functionalities by addressing a Raman quantum memory with multiple control pulses. The result is a coherent optical storage device with an extremely large time bandwidth product, that functions as an array of dynamically configurable beam splitters, and that can be read out with arbitrarily high efficiency. Networks of such devices would allow fully scalable PQIP, with applications in quantum computation, long distance quantum communications and quantum metrology.

Smart Electrochemical Energy Storage Devices with Self-Protection and Self-Adaptation Abilities.

PubMed

Yang, Yun; Yu, Dandan; Wang, Hua; Guo, Lin

2017-12-01

Currently, with booming development and worldwide usage of rechargeable electrochemical energy storage devices, their safety issues, operation stability, service life, and user experience are garnering special attention. Smart and intelligent energy storage devices with self-protection and self-adaptation abilities aiming to address these challenges are being developed with great urgency. In this Progress Report, we highlight recent achievements in the field of smart energy storage systems that could early-detect incoming internal short circuits and self-protect against thermal runaway. Moreover, intelligent devices that are able to take actions and self-adapt in response to external mechanical disruption or deformation, i.e., exhibiting self-healing or shape-memory behaviors, are discussed. Finally, insights into the future development of smart rechargeable energy storage devices are provided. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A molecular shift register based on electron transfer

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Josenelson; Beratan, David N.

1988-01-01

An electronic shift-register memory at the molecular level is described. The memory elements are based on a chain of electron-transfer molecules and the information is shifted by photoinduced electron-transfer reactions. This device integrates designed electronic molecules onto a very large scale integrated (silicon microelectronic) substrate, providing an example of a 'molecular electronic device' that could actually be made. The design requirements for such a device and possible synthetic strategies are discussed. Devices along these lines should have lower energy usage and enhanced storage density.

Real-time associative memory with photorefractive crystal KNSBN and liquid-crystal optical switches

NASA Astrophysics Data System (ADS)

Xu, Haiying; Yuan, Yang Y.; Yu, Youlong; Xu, Kebin; Xu, Yuhuan; Zhu, De-Rui

1990-05-01

We present a real-time holographic associative memory implemented with photorefractive KNSBN : Co crystal as memory element and liquid crystal electrooptical switches as reflective thresholding device. The experimental results show that the system has real-time multiple-image storage and recall function.

Design and Implementation of an MC68020-Based Educational Computer Board

DTIC Science & Technology

1989-12-01

device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to initialize...MHz. It includes four * Static Random Access Memory (SRAM) chips which provide a storage of 32K bytes. Two Programmable Array Logic (PAL) chips...device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to

A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

NASA Astrophysics Data System (ADS)

Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

2017-12-01

Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (<40° C) on a variety of substrates (including many kinds of plastic substrates) by an industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

NASA Astrophysics Data System (ADS)

Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

2016-02-01

Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices.

Nonvolatile semiconductor memory having three dimension charge confinement

DOEpatents

Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.

1991-01-01

A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.

Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

2012-01-01

Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

An Investigation of Quantum Dot Super Lattice Use in Nonvolatile Memory and Transistors

NASA Astrophysics Data System (ADS)

Mirdha, P.; Parthasarathy, B.; Kondo, J.; Chan, P.-Y.; Heller, E.; Jain, F. C.

2018-02-01

Site-specific self-assembled colloidal quantum dots (QDs) will deposit in two layers only on p-type substrate to form a QD superlattice (QDSL). The QDSL structure has been integrated into the floating gate of a nonvolatile memory component and has demonstrated promising results in multi-bit storage, ease of fabrication, and memory retention. Additionally, multi-valued logic devices and circuits have been created by using QDSL structures which demonstrated ternary and quaternary logic. With increasing use of site-specific self-assembled QDSLs, fundamental understanding of silicon and germanium QDSL charge storage capability, self-assembly on specific surfaces, uniform distribution, and mini-band formation has to be understood for successful implementation in devices. In this work, we investigate the differences in electron charge storage by building metal-oxide semiconductor (MOS) capacitors and using capacitance and voltage measurements to quantify the storage capabilities. The self-assembly process and distribution density of the QDSL is done by obtaining atomic force microscopy (AFM) results on line samples. Additionally, we present a summary of the theoretical density of states in each of the QDSLs.

Optical memory system technology. Citations from the International Aerospace Abstracts data base

NASA Technical Reports Server (NTRS)

Zollars, G. F.

1980-01-01

Approximately 213 citations from the international literature which concern the development of the optical data storage system technology are presented. Topics covered include holographic computer storage devices, crystal, magneto, and electro-optics, imaging techniques, in addition to optical data processing and storage.

Semiconductor diode with external field modulation

DOEpatents

Nasby, Robert D.

2000-01-01

A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

A Novel Bat-Shaped Dicyanomethylene-4H-pyran-Functionalized Naphthalimide for Highly Efficient Solution-Processed Multilevel Memory Devices.

PubMed

Zhang, Qi-Jian; Miao, Shi-Feng; Li, Hua; He, Jing-Hui; Li, Na-Jun; Xu, Qing-Feng; Chen, Dong-Yun; Lu, Jian-Mei

2017-06-19

Small-molecule-based multilevel memory devices have attracted increasing attention because of their advantages, such as super-high storage density, fast reading speed, light weight, low energy consumption, and shock resistance. However, the fabrication of small-molecule-based devices always requires expensive vacuum-deposition techniques or high temperatures for spin-coating. Herein, through rational tailoring of a previous molecule, DPCNCANA (4,4'-(6,6'-bis(2-octyl-1,3-dioxo-2,3-dihydro-1H-benzo[de]isoquinolin-6-yl)-9H,9'H-[3,3'-bicarbazole]-9,9'-diyl)dibenzonitrile), a novel bat-shaped A-D-A-type (A-D-A=acceptor-donor-acceptor) symmetric framework has been successfully synthesized and can be dissolved in common solvents at room temperature. Additionally, it has a low-energy bandgap and dense intramolecular stacking in the film state. The solution-processed memory devices exhibited high-performance nonvolatile multilevel data-storage properties with low switching threshold voltages of about -1.3 and -2.7 V, which is beneficial for low power consumption. Our result should prompt the study of highly efficient solution-processed multilevel memory devices in the field of organic electronics. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu

2015-06-24

Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less

Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

NASA Astrophysics Data System (ADS)

Valentini, L.; Cardinali, M.; Fortunati, E.; Kenny, J. M.

2014-10-01

With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.

Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

NASA Astrophysics Data System (ADS)

Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

2017-05-01

Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

Multilevel resistance switching effect in Au/La2/3Ba1/3MnO3/Pt heterostructure manipulated by external fields

NASA Astrophysics Data System (ADS)

Wen, Jiahong; Zhao, Xiaoyu; Li, Qian; Zhang, Sheng; Wang, Dunhui; Du, Youwei

2018-04-01

Multilevel resistance switching (RS) effect has attracted more and more attention due to its promising potential for the increase of storage density in memory devices. In this work, the transport properties are investigated in an Au/La2/3Ba1/3MnO3 (LBMO)/Pt heterostructure. Taking advantage of the strong interplay among the spin, charge, orbital and lattice of LBMO, the Au/LBMO/Pt device can exhibit bipolar RS effect and magnetoresistance effect simultaneously. Under the coaction of electric field and magnetic field, four different resistance states are achieved in this device. These resistance states show excellent repeatability and retentivity and can be switched between any two states, which suggest the potential applications in the multilevel RS memory devices with enhanced storage density.

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

NASA Technical Reports Server (NTRS)

Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

2001-01-01

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Electrochromic conductive polymer fuses for hybrid organic/inorganic semiconductor memories

NASA Astrophysics Data System (ADS)

Möller, Sven; Forrest, Stephen R.; Perlov, Craig; Jackson, Warren; Taussig, Carl

2003-12-01

We demonstrate a nonvolatile, write-once-read-many-times (WORM) memory device employing a hybrid organic/inorganic semiconductor architecture consisting of thin film p-i-n silicon diode on a stainless steel substrate integrated in series with a conductive polymer fuse. The nonlinearity of the silicon diodes enables a passive matrix memory architecture, while the conductive polyethylenedioxythiophene:polystyrene sulfonic acid polymer serves as a reliable switch with fuse-like behavior for data storage. The polymer can be switched at ˜2 μs, resulting in a permanent decrease of conductivity of the memory pixel by up to a factor of 103. The switching mechanism is primarily due to a current and thermally dependent redox reaction in the polymer, limited by the double injection of both holes and electrons. The switched device performance does not degrade after many thousand read cycles in ambient at room temperature. Our results suggest that low cost, organic/inorganic WORM memories are feasible for light weight, high density, robust, and fast archival storage applications.

Improved performance of Ta2O5-x resistive switching memory by Gd-doping: Ultralow power operation, good data retention, and multilevel storage

NASA Astrophysics Data System (ADS)

Shi, K. X.; Xu, H. Y.; Wang, Z. Q.; Zhao, X. N.; Liu, W. Z.; Ma, J. G.; Liu, Y. C.

2017-11-01

Resistive-switching memory with ultralow-power consumption is very promising technology for next-generation data storage and high-energy-efficiency neurosynaptic chips. Herein, Ta2O5-x-based multilevel memories with ultralow-power consumption and good data retention were achieved by simple Gd-doping. The introduction of a Gd ion, as an oxygen trapper, not only suppresses the generation of oxygen vacancy defects and greatly increases the Ta2O5-x resistance but also increases the oxygen-ion migration barrier. As a result, the memory cells can operate at an ultralow current of 1 μA with the extrapolated retention time of >10 years at 85 °C and the high switching speeds of 10 ns/40 ns for SET/RESET processes. The energy consumption of the device is as low as 60 fJ/bit, which is comparable to emerging ultralow-energy consumption (<100 fJ/bit) memory devices.

Resistive switching behaviors of Au/pentacene/Si-nanowire arrays/heavily doped n-type Si devices for memory applications

NASA Astrophysics Data System (ADS)

Tsao, Hou-Yen; Lin, Yow-Jon

2014-02-01

The fabrication of memory devices based on the Au/pentacene/heavily doped n-type Si (n+-Si), Au/pentacene/Si nanowires (SiNWs)/n+-Si, and Au/pentacene/H2O2-treated SiNWs/n+-Si structures and their resistive switching characteristics were reported. A pentacene memory structure using SiNW arrays as charge storage nodes was demonstrated. The Au/pentacene/SiNWs/n+-Si devices show hysteresis behavior. H2O2 treatment may lead to the hysteresis degradation. However, no hysteresis-type current-voltage characteristics were observed for Au/pentacene/n+-Si devices, indicating that the resistive switching characteristic is sensitive to SiNWs and the charge trapping effect originates from SiNWs. The concept of nanowires within the organic layer opens a promising direction for organic memory devices.

FPGA-based prototype storage system with phase change memory

NASA Astrophysics Data System (ADS)

Li, Gezi; Chen, Xiaogang; Chen, Bomy; Li, Shunfen; Zhou, Mi; Han, Wenbing; Song, Zhitang

2016-10-01

With the ever-increasing amount of data being stored via social media, mobile telephony base stations, and network devices etc. the database systems face severe bandwidth bottlenecks when moving vast amounts of data from storage to the processing nodes. At the same time, Storage Class Memory (SCM) technologies such as Phase Change Memory (PCM) with unique features like fast read access, high density, non-volatility, byte-addressability, positive response to increasing temperature, superior scalability, and zero standby leakage have changed the landscape of modern computing and storage systems. In such a scenario, we present a storage system called FLEET which can off-load partial or whole SQL queries to the storage engine from CPU. FLEET uses an FPGA rather than conventional CPUs to implement the off-load engine due to its highly parallel nature. We have implemented an initial prototype of FLEET with PCM-based storage. The results demonstrate that significant performance and CPU utilization gains can be achieved by pushing selected query processing components inside in PCM-based storage.

A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986

NASA Astrophysics Data System (ADS)

Riley, J. L.

1987-08-01

This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.

Write once read many memory device from Tris-8 (-hydroxyquinoline) aluminum and Indium tin oxide nano particles

NASA Astrophysics Data System (ADS)

Aneesh, J.; Predeep, P.

2011-10-01

Consequent to the fast increase in data storage requirements new materials and device structures are explored in a war footing. Organic memory devices are attracting lot of interest among the researchers and are becoming a hot topic of investigations. This study is an attempt to develop a tri-layer organic memory device using indium tin oxide (ITO) nanoparticles as charge trapping middle layer between tris-8(-hydroxyquinoline)aluminum (Alq3) layers employing spin coating technique. Device switching is studied by applying a current-voltage (I-V) sweep. On increasing the applied bias the device switched from the initial high resistance (OFF) state to a low resistance (ON) state at a switch on voltage of around 4 V. ON/OFF ratio is of the order of 100 at a read voltage of 2 V. The device is found to remain in the low resistance state on further scans, showing the applicability of this device as a write once read many times (WORM) memory.

Flexible non-volatile memory devices based on organic semiconductors

NASA Astrophysics Data System (ADS)

Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

2015-09-01

The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

Overview of emerging nonvolatile memory technologies

PubMed Central

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

Overview of emerging nonvolatile memory technologies.

PubMed

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

Non-Volatile High Speed & Low Power Charge Trapping Devices

NASA Astrophysics Data System (ADS)

Kim, Moon Kyung; Tiwari, Sandip

2007-06-01

We report the operational characteristics of ultra-small-scaled SONOS (below 50 nm gate width and length) and SiO2/SiO2 structural devices with 0.5 um gate width and length where trapping occurs in a very narrow region. The experimental work summarizes the memory characteristics of retention time, endurance cycles, and speed in SONOS and SiO2/SiO2 structures. Silicon nitride has many defects to hold electrons as charge storage media in SONOS memory. Defects are also incorporated during growth and deposition in device processing. Our experiments show that the interface between two oxides, one grown and one deposited, provides a remarkable media for electron storage with a smaller gate stack and thus lower operating voltage. The exponential dependence of the time on the voltage is reflected in the characteristic energy. It is ˜0.44 eV for the write process and ˜0.47 eV for the erase process in SiO2/SiO2 structural device which is somewhat more efficient than those of SONOS structure memory.

Applying a cloud computing approach to storage architectures for spacecraft

NASA Astrophysics Data System (ADS)

Baldor, Sue A.; Quiroz, Carlos; Wood, Paul

As sensor technologies, processor speeds, and memory densities increase, spacecraft command, control, processing, and data storage systems have grown in complexity to take advantage of these improvements and expand the possible missions of spacecraft. Spacecraft systems engineers are increasingly looking for novel ways to address this growth in complexity and mitigate associated risks. Looking to conventional computing, many solutions have been executed to solve both the problem of complexity and heterogeneity in systems. In particular, the cloud-based paradigm provides a solution for distributing applications and storage capabilities across multiple platforms. In this paper, we propose utilizing a cloud-like architecture to provide a scalable mechanism for providing mass storage in spacecraft networks that can be reused on multiple spacecraft systems. By presenting a consistent interface to applications and devices that request data to be stored, complex systems designed by multiple organizations may be more readily integrated. Behind the abstraction, the cloud storage capability would manage wear-leveling, power consumption, and other attributes related to the physical memory devices, critical components in any mass storage solution for spacecraft. Our approach employs SpaceWire networks and SpaceWire-capable devices, although the concept could easily be extended to non-heterogeneous networks consisting of multiple spacecraft and potentially the ground segment.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

PubMed Central

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

DOE Office of Scientific and Technical Information (OSTI.GOV)

Valentini, L., E-mail: luca.valentini@unipg.it; Cardinali, M.; Fortunati, E.

2014-10-13

With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electricmore » field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.« less

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

PubMed

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

Nanoscale Reactive Ion Etching of Silicon Nitride Thin Films for Embedded Nanomagnetic Device Fabrication

NASA Astrophysics Data System (ADS)

Hibbard-Lubow, David Luke

The demands of digital memory have increased exponentially in recent history, requiring faster, smaller and more accurate storage methods. Two promising solutions to this ever-present problem are Bit Patterned Media (BPM) and Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM). Producing these technologies requires difficult and expensive fabrication techniques. Thus, the production processes must be optimized to allow these storage methods to compete commercially while continuing to increase their information storage density and reliability. I developed a process for the production of nanomagnetic devices (which can take the form of several types of digital memory) embedded in thin silicon nitride films. My focus was on optimizing the reactive ion etching recipe required to embed the device in the film. Ultimately, I found that recipe 37 (Power: 250W, CF4 nominal/actual flow rate: 25/25.4 sccm, O2 nominal/actual flow rate: 3.1/5.2 sccm, which gave a maximum pressure around 400 mTorr) gave the most repeatable and anisotropic results. I successfully used processes described in this thesis to make embedded nanomagnets, which could be used as bit patterned media. Another promising application of this work is to make embedded magnetic tunneling junctions, which are the storage medium used in MRAM. Doing so will require still some tweaks to the fabrication methods. Techniques for making these changes and their potential effects are discussed.

Emerging memories

NASA Astrophysics Data System (ADS)

Baldi, Livio; Bez, Roberto; Sandhu, Gurtej

2014-12-01

Memory is a key component of any data processing system. Following the classical Turing machine approach, memories hold both the data to be processed and the rules for processing them. In the history of microelectronics, the distinction has been rather between working memory, which is exemplified by DRAM, and storage memory, exemplified by NAND. These two types of memory devices now represent 90% of all memory market and 25% of the total semiconductor market, and have been the technology drivers in the last decades. Even if radically different in characteristics, they are however based on the same storage mechanism: charge storage, and this mechanism seems to be near to reaching its physical limits. The search for new alternative memory approaches, based on more scalable mechanisms, has therefore gained new momentum. The status of incumbent memory technologies and their scaling limitations will be discussed. Emerging memory technologies will be analyzed, starting from the ones that are already present for niche applications, and which are getting new attention, thanks to recent technology breakthroughs. Maturity level, physical limitations and potential for scaling will be compared to existing memories. At the end the possible future composition of memory systems will be discussed.

Evolutionary Metal Oxide Clusters for Novel Applications: Toward High-Density Data Storage in Nonvolatile Memories.

PubMed

Chen, Xiaoli; Zhou, Ye; Roy, Vellaisamy A L; Han, Su-Ting

2018-01-01

Because of current fabrication limitations, miniaturizing nonvolatile memory devices for managing the explosive increase in big data is challenging. Molecular memories constitute a promising candidate for next-generation memories because their properties can be readily modulated through chemical synthesis. Moreover, these memories can be fabricated through mild solution processing, which can be easily scaled up. Among the various materials, polyoxometalate (POM) molecules have attracted considerable attention for use as novel data-storage nodes for nonvolatile memories. Here, an overview of recent advances in the development of POMs for nonvolatile memories is presented. The general background knowledge of the structure and property diversity of POMs is also summarized. Finally, the challenges and perspectives in the application of POMs in memories are discussed. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Small Form Factor Information Storage Devices for Mobile Applications in Korea

NASA Astrophysics Data System (ADS)

Park, Young-Pil; Park, No-Cheol; Kim, Chul-Jin

Recently, the ubiquitous environment in which anybody can reach a lot of information data without any limitations on the place and time has become an important social issue. There are two basic requirements in the field of information storage devices which have to be satisfied; the first is the demand for the improvement of memory capacity to manage the increased data capacity in personal and official purposes. The second is the demand for new development of information storage devices small enough to be applied to mobile multimedia digital electronics, including digital camera, PDA and mobile phones. To summarize, for the sake of mobile applications, it is necessary to develop information storage devices which have simultaneously a large capacity and a small size. Korea possesses the necessary infrastructure for developing such small sized information storage devices. It has a good digital market, major digital companies, and various research institutes. Nowadays, many companies and research institutes including university cooperate together in the research on small sized information storage devices. Thus, it is expected that small form factor optical disk drives will be commercialized in the very near future in Korea.

PIYAS-proceeding to intelligent service oriented memory allocation for flash based data centric sensor devices in wireless sensor networks.

PubMed

Rizvi, Sanam Shahla; Chung, Tae-Sun

2010-01-01

Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2012 CFR

2012-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2011 CFR

2011-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2010 CFR

2010-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

PCM-Based Durable Write Cache for Fast Disk I/O

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Zhuo; Wang, Bin; Carpenter, Patrick

2012-01-01

Flash based solid-state devices (FSSDs) have been adopted within the memory hierarchy to improve the performance of hard disk drive (HDD) based storage system. However, with the fast development of storage-class memories, new storage technologies with better performance and higher write endurance than FSSDs are emerging, e.g., phase-change memory (PCM). Understanding how to leverage these state-of-the-art storage technologies for modern computing systems is important to solve challenging data intensive computing problems. In this paper, we propose to leverage PCM for a hybrid PCM-HDD storage architecture. We identify the limitations of traditional LRU caching algorithms for PCM-based caches, and develop amore » novel hash-based write caching scheme called HALO to improve random write performance of hard disks. To address the limited durability of PCM devices and solve the degraded spatial locality in traditional wear-leveling techniques, we further propose novel PCM management algorithms that provide effective wear-leveling while maximizing access parallelism. We have evaluated this PCM-based hybrid storage architecture using applications with a diverse set of I/O access patterns. Our experimental results demonstrate that the HALO caching scheme leads to an average reduction of 36.8% in execution time compared to the LRU caching scheme, and that the SFC wear leveling extends the lifetime of PCM by a factor of 21.6.« less

Configurable memory system and method for providing atomic counting operations in a memory device

DOEpatents

Bellofatto, Ralph E.; Gara, Alan G.; Giampapa, Mark E.; Ohmacht, Martin

2010-09-14

A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

Systems, methods, and products for graphically illustrating and controlling a droplet actuator

NASA Technical Reports Server (NTRS)

Brafford, Keith R. (Inventor); Pamula, Vamsee K. (Inventor); Paik, Philip Y. (Inventor); Pollack, Michael G. (Inventor); Sturmer, Ryan A. (Inventor); Smith, Gregory F. (Inventor)

2010-01-01

Systems for controlling a droplet microactuator are provided. According to one embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, and a display device displaying a user interface electronically coupled to the controller, wherein the system is programmed and configured to permit a user to effect a droplet manipulation by interacting with the user interface. According to another embodiment, a system is provided and includes a processor, a display device electronically coupled to the processor, and software loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller and programmed to display an interactive map of a droplet microactuator. According to yet another embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, a display device displaying a user interface electronically coupled to the controller, and software for executing a protocol loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller.

Nonvolatile memory chips: critical technology for high-performance recce systems

NASA Astrophysics Data System (ADS)

Kaufman, Bruce

2000-11-01

Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Realization of reliable solid-state quantum memory for photonic polarization qubit.

PubMed

Zhou, Zong-Quan; Lin, Wei-Bin; Yang, Ming; Li, Chuan-Feng; Guo, Guang-Can

2012-05-11

Faithfully storing an unknown quantum light state is essential to advanced quantum communication and distributed quantum computation applications. The required quantum memory must have high fidelity to improve the performance of a quantum network. Here we report the reversible transfer of photonic polarization states into collective atomic excitation in a compact solid-state device. The quantum memory is based on an atomic frequency comb (AFC) in rare-earth ion-doped crystals. We obtain up to 0.999 process fidelity for the storage and retrieval process of single-photon-level coherent pulse. This reliable quantum memory is a crucial step toward quantum networks based on solid-state devices.

Two-dimensional signal processing using a morphological filter for holographic memory

NASA Astrophysics Data System (ADS)

Kondo, Yo; Shigaki, Yusuke; Yamamoto, Manabu

2012-03-01

Today, along with the wider use of high-speed information networks and multimedia, it is increasingly necessary to have higher-density and higher-transfer-rate storage devices. Therefore, research and development into holographic memories with three-dimensional storage areas is being carried out to realize next-generation large-capacity memories. However, in holographic memories, interference between bits, which affect the detection characteristics, occurs as a result of aberrations such as the deviation of a wavefront in an optical system. In this study, we pay particular attention to the nonlinear factors that cause bit errors, where filters with a Volterra equalizer and the morphologies are investigated as a means of signal processing.

C-MOS array design techniques: SUMC multiprocessor system study

NASA Technical Reports Server (NTRS)

Clapp, W. A.; Helbig, W. A.; Merriam, A. S.

1972-01-01

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units.

Non-volatile memory for checkpoint storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.

A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, themore » non-volatile memory is a pluggable flash memory card.« less

Optically Addressable, Ferroelectric Memory With NDRO

NASA Technical Reports Server (NTRS)

Thakoor, Sarita

1994-01-01

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

DataPlay's mobile recording technology

NASA Astrophysics Data System (ADS)

Bell, Bernard W., Jr.

2002-01-01

A small rotating memory device which utilizes optical prerecorded and writeable technology to provide a mobile recording technology solution for digital cameras, cell phones, music players, PDA's, and hybrid multipurpose devices have been developed. This solution encompasses writeable, read only, and encrypted storage media.

CLOCS (Computer with Low Context-Switching Time) Architecture Reference Documents

DTIC Science & Technology

1988-05-06

Peculiarities The only state inside the central processing unit(CPU) is a program status word. All data operations are memory to memory. One result of this... to the challenge "if I whore to design RISC, this is how I would do it." The architecture was designed by Mark Davis and Bill Gallmeister. 1.2...are memory to memory. Any special devices added should be memory mapped. The program counter is even memory mapped. 1.3.1 Working storage There is no

Fundamental Fortran for Social Scientists.

ERIC Educational Resources Information Center

Veldman, Donald J.

An introduction to Fortran programming specifically for social science statistical and routine data processing is provided. The first two sections of the manual describe the components of computer hardware and software. Topics include input, output, and mass storage devices; central memory; central processing unit; internal storage of data; and…

A visual-display and storage device

NASA Technical Reports Server (NTRS)

Bosomworth, D. R.; Moles, W. H.

1972-01-01

Memory and display device uses cathodochromic material to store visual information and fast phosphor to recall information for display and electronic processing. Cathodochromic material changes color when bombarded with electrons, and is restored to its original color when exposed to light of appropiate wavelength.

Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

2018-01-01

In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Key-value store with internal key-value storage interface

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bent, John M.; Faibish, Sorin; Ting, Dennis P. J.

A key-value store is provided having one or more key-value storage interfaces. A key-value store on at least one compute node comprises a memory for storing a plurality of key-value pairs; and an abstract storage interface comprising a software interface module that communicates with at least one persistent storage device providing a key-value interface for persistent storage of one or more of the plurality of key-value pairs, wherein the software interface module provides the one or more key-value pairs to the at least one persistent storage device in a key-value format. The abstract storage interface optionally processes one or moremore » batch operations on the plurality of key-value pairs. A distributed embodiment for a partitioned key-value store is also provided.« less

Protecting solid-state spins from a strongly coupled environment

NASA Astrophysics Data System (ADS)

Chen, Mo; Calvin Sun, Won Kyu; Saha, Kasturi; Jaskula, Jean-Christophe; Cappellaro, Paola

2018-06-01

Quantum memories are critical for solid-state quantum computing devices and a good quantum memory requires both long storage time and fast read/write operations. A promising system is the nitrogen-vacancy (NV) center in diamond, where the NV electronic spin serves as the computing qubit and a nearby nuclear spin as the memory qubit. Previous works used remote, weakly coupled 13C nuclear spins, trading read/write speed for long storage time. Here we focus instead on the intrinsic strongly coupled 14N nuclear spin. We first quantitatively understand its decoherence mechanism, identifying as its source the electronic spin that acts as a quantum fluctuator. We then propose a scheme to protect the quantum memory from the fluctuating noise by applying dynamical decoupling on the environment itself. We demonstrate a factor of 3 enhancement of the storage time in a proof-of-principle experiment, showing the potential for a quantum memory that combines fast operation with long coherence time.

Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

NASA Astrophysics Data System (ADS)

Sahay, Shubham; Suri, Manan

2017-12-01

This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

Electrically-controlled nonlinear switching and multi-level storage characteristics in WOx film-based memory cells

NASA Astrophysics Data System (ADS)

Duan, W. J.; Wang, J. B.; Zhong, X. L.

2018-05-01

Resistive switching random access memory (RRAM) is considered as a promising candidate for the next generation memory due to its scalability, high integration density and non-volatile storage characteristics. Here, the multiple electrical characteristics in Pt/WOx/Pt cells are investigated. Both of the nonlinear switching and multi-level storage can be achieved by setting different compliance current in the same cell. The correlations among the current, time and temperature are analyzed by using contours and 3D surfaces. The switching mechanism is explained in terms of the formation and rupture of conductive filament which is related to oxygen vacancies. The experimental results show that the non-stoichiometric WOx film-based device offers a feasible way for the applications of oxide-based RRAMs.

Analog Nonvolatile Computer Memory Circuits

NASA Technical Reports Server (NTRS)

MacLeod, Todd

2007-01-01

In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

Coherent optical pulse sequencer for quantum applications.

PubMed

Hosseini, Mahdi; Sparkes, Ben M; Hétet, Gabriel; Longdell, Jevon J; Lam, Ping Koy; Buchler, Ben C

2009-09-10

The bandwidth and versatility of optical devices have revolutionized information technology systems and communication networks. Precise and arbitrary control of an optical field that preserves optical coherence is an important requisite for many proposed photonic technologies. For quantum information applications, a device that allows storage and on-demand retrieval of arbitrary quantum states of light would form an ideal quantum optical memory. Recently, significant progress has been made in implementing atomic quantum memories using electromagnetically induced transparency, photon echo spectroscopy, off-resonance Raman spectroscopy and other atom-light interaction processes. Single-photon and bright-optical-field storage with quantum states have both been successfully demonstrated. Here we present a coherent optical memory based on photon echoes induced through controlled reversible inhomogeneous broadening. Our scheme allows storage of multiple pulses of light within a chosen frequency bandwidth, and stored pulses can be recalled in arbitrary order with any chosen delay between each recalled pulse. Furthermore, pulses can be time-compressed, time-stretched or split into multiple smaller pulses and recalled in several pieces at chosen times. Although our experimental results are so far limited to classical light pulses, our technique should enable the construction of an optical random-access memory for time-bin quantum information, and have potential applications in quantum information processing.

Operation mode switchable charge-trap memory based on few-layer MoS2

NASA Astrophysics Data System (ADS)

Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-03-01

Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.

Testing and operating a multiprocessor chip with processor redundancy

DOEpatents

Bellofatto, Ralph E; Douskey, Steven M; Haring, Rudolf A; McManus, Moyra K; Ohmacht, Martin; Schmunkamp, Dietmar; Sugavanam, Krishnan; Weatherford, Bryan J

2014-10-21

A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.

Memristive behavior in a junctionless flash memory cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Orak, Ikram; Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl; Ürel, Mustafa

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits themore » pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.« less

Multibit data storage states formed in plasma-treated MoS₂ transistors.

PubMed

Chen, Mikai; Nam, Hongsuk; Wi, Sungjin; Priessnitz, Greg; Gunawan, Ivan Manuel; Liang, Xiaogan

2014-04-22

New multibit memory devices are desirable for improving data storage density and computing speed. Here, we report that multilayer MoS2 transistors, when treated with plasmas, can dramatically serve as low-cost, nonvolatile, highly durable memories with binary and multibit data storage capability. We have demonstrated binary and 2-bit/transistor (or 4-level) data states suitable for year-scale data storage applications as well as 3-bit/transistor (or 8-level) data states for day-scale data storage. This multibit memory capability is hypothesized to be attributed to plasma-induced doping and ripple of the top MoS2 layers in a transistor, which could form an ambipolar charge-trapping layer interfacing the underlying MoS2 channel. This structure could enable the nonvolatile retention of charged carriers as well as the reversible modulation of polarity and amount of the trapped charge, ultimately resulting in multilevel data states in memory transistors. Our Kelvin force microscopy results strongly support this hypothesis. In addition, our research suggests that the programming speed of such memories can be improved by using nanoscale-area plasma treatment. We anticipate that this work would provide important scientific insights for leveraging the unique structural property of atomically layered two-dimensional materials in nanoelectronic applications.

Fabrication of poly(methyl methacrylate)-MoS{sub 2}/graphene heterostructure for memory device application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shinde, Sachin M.; Tanemura, Masaki; Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp

2014-12-07

Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material asmore » well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.« less

Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

PubMed

Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

2016-05-01

We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

Filamentary model in resistive switching materials

NASA Astrophysics Data System (ADS)

Jasmin, Alladin C.

2017-12-01

The need for next generation computer devices is increasing as the demand for efficient data processing increases. The amount of data generated every second also increases which requires large data storage devices. Oxide-based memory devices are being studied to explore new research frontiers thanks to modern advances in nanofabrication. Various oxide materials are studied as active layers for non-volatile memory. This technology has potential application in resistive random-access-memory (ReRAM) and can be easily integrated in CMOS technologies. The long term perspective of this research field is to develop devices which mimic how the brain processes information. To realize such application, a thorough understanding of the charge transport and switching mechanism is important. A new perspective in the multistate resistive switching based on current-induced filament dynamics will be discussed. A simple equivalent circuit of the device gives quantitative information about the nature of the conducting filament at different resistance states.

Performance of real time associative memory using a photorefractive crystal and liquid crystal electrooptic switches

NASA Astrophysics Data System (ADS)

Xu, Haiying; Yuan, Yang; Yu, Youlong; Xu, Kebin; Xu, Yuhuan

1990-08-01

This paper presents a real time holographic associative memory implemented with photorefractive KNSBN:Co crystal as the memory element and a liquid crystal electrooptic switch array as the reflective thresholding device. The experiment stores and recalls two images and shows that the system has real-time multiple-image storage and recall functions. An associative memory with a dynamic threshold level to decide the closest match of an incomplete input is proposed.

NAFFS: network attached flash file system for cloud storage on portable consumer electronics

NASA Astrophysics Data System (ADS)

Han, Lin; Huang, Hao; Xie, Changsheng

Cloud storage technology has become a research hotspot in recent years, while the existing cloud storage services are mainly designed for data storage needs with stable high speed Internet connection. Mobile Internet connections are often unstable and the speed is relatively low. These native features of mobile Internet limit the use of cloud storage in portable consumer electronics. The Network Attached Flash File System (NAFFS) presented the idea of taking the portable device built-in NAND flash memory as the front-end cache of virtualized cloud storage device. Modern portable devices with Internet connection have built-in more than 1GB NAND Flash, which is quite enough for daily data storage. The data transfer rate of NAND flash device is much higher than mobile Internet connections[1], and its non-volatile feature makes it very suitable as the cache device of Internet cloud storage on portable device, which often have unstable power supply and intermittent Internet connection. In the present work, NAFFS is evaluated with several benchmarks, and its performance is compared with traditional network attached file systems, such as NFS. Our evaluation results indicate that the NAFFS achieves an average accessing speed of 3.38MB/s, which is about 3 times faster than directly accessing cloud storage by mobile Internet connection， and offers a more stable interface than that of directly using cloud storage API. Unstable Internet connection and sudden power off condition are tolerable, and no data in cache will be lost in such situation.

Rise of Racetrack Memory! Domain Wall Spin-Orbitronics

NASA Astrophysics Data System (ADS)

Parkin, Stuart

Memory-storage devices based on the current controlled motion of a series of domain walls (DWs) in magnetic racetracks promise performance and reliability beyond that of conventional magnetic disk drives and solid state storage devices (1). Racetracks that are formed from atomically thin, perpendicularly magnetized nano-wires, interfaced with adjacent metal layers with high spin-orbit coupling, give rise to domain walls that exhibit a chiral Néel structure (2). These DWs can be moved very efficiently with current via chiral spin-orbit torques (2,3). Record-breaking current-induced DW speeds exceeding 1,000 m/sec are found in synthetic antiferromagnetic structures (3) in which the net magnetization of the DWs is tuned to almost zero, making them ``invisible''. Based on these recent discoveries, Racetrack Memory devices have the potential to operate on picosecond timescales and at densities more than 100 times greater than other memory technologies. (1) S.S.P. Parkin et al., Science 320, 5873 (2008); S.S.P. Parkin and S.-H. Yang, Nat. Nano. 10, 195 (2015). (2) K.-S. Ryu metal. Nat. Nano. 8, 527 (2013). (3) S.-H. Yang, K.-S. Ryu and S.S.P. Parkin, Nat. Nano. 10, 221 (2015). (4). S.S.P. Parkin, Phys. Rev. Lett. 67, 3598 (1991).

Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

NASA Astrophysics Data System (ADS)

Younis, Adnan; Chu, Dewei; Li, Sean

2015-09-01

Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective.

Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

PubMed Central

Younis, Adnan; Chu, Dewei; Li, Sean

2015-01-01

Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective. PMID:26324073

Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

NASA Astrophysics Data System (ADS)

Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

2018-01-01

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

The storage system of PCM based on random access file system

NASA Astrophysics Data System (ADS)

Han, Wenbing; Chen, Xiaogang; Zhou, Mi; Li, Shunfen; Li, Gezi; Song, Zhitang

2016-10-01

Emerging memory technologies such as Phase change memory (PCM) tend to offer fast, random access to persistent storage with better scalability. It's a hot topic of academic and industrial research to establish PCM in storage hierarchy to narrow the performance gap. However, the existing file systems do not perform well with the emerging PCM storage, which access storage medium via a slow, block-based interface. In this paper, we propose a novel file system, RAFS, to bring about good performance of PCM, which is built in the embedded platform. We attach PCM chips to the memory bus and build RAFS on the physical address space. In the proposed file system, we simplify traditional system architecture to eliminate block-related operations and layers. Furthermore, we adopt memory mapping and bypassed page cache to reduce copy overhead between the process address space and storage device. XIP mechanisms are also supported in RAFS. To the best of our knowledge, we are among the first to implement file system on real PCM chips. We have analyzed and evaluated its performance with IOZONE benchmark tools. Our experimental results show that the RAFS on PCM outperforms Ext4fs on SDRAM with small record lengths. Based on DRAM, RAFS is significantly faster than Ext4fs by 18% to 250%.

Investigation of multilayer magnetic domain lattice file

NASA Technical Reports Server (NTRS)

Torok, E. J.; Kamin, M.; Tolman, C. H.

1980-01-01

The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.

Charge injection and discharging of Si nanocrystals and arrays by atomic force microscopy

NASA Technical Reports Server (NTRS)

Boer, E.; Ostraat, M.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.

2000-01-01

Charge injection and storage in dense arrays of silicon nanocrystals in SiO(sub 2) is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few-or single- electron storage in a small number of nanocrystal elements.

Hierarchically Self-Assembled Block Copolymer Blends for Templating Hollow Phase-Change Nanostructures with an Extremely Low Switching Current

DOE PAGES

Park, Woon Ik; Kim, Jong Min; Jeong, Jae Won; ...

2015-03-17

Phase change memory (PCM) is one of the most promising candidates for next-generation nonvolatile memory devices because of its high speed, excellent reliability, and outstanding scalability. But, the high switching current of PCM devices has been a critical hurdle to realize low-power operation. Although one solution is to reduce the switching volume of the memory, the resolution limit of photolithography hinders further miniaturization of device dimensions. Here, we employed unconventional self-assembly geometries obtained from blends of block copolymers (BCPs) to form ring-shaped hollow PCM nanostructures with an ultrasmall contact area between a phase-change material (Ge 2Sb 2Te 5) and amore » heater (TiN) electrode. The high-density (approximately 0.1 terabits per square inch) PCM nanoring arrays showed extremely small switching current of 2-3 mu A. Furthermore, the relatively small reset current of the ring-shaped PCM compared to the pillar-shaped devices is attributed to smaller switching volume, which is well supported by electro-thermal simulation results. Our approach may also be extended to other nonvolatile memory device applications such as resistive switching memory and magnetic storage devices, where the control of nanoscale geometry can significantly affect device performances.« less

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

NASA Astrophysics Data System (ADS)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

Data compression/error correction digital test system. Appendix 3: Maintenance. Book 2: Receiver assembly drawings

NASA Technical Reports Server (NTRS)

1972-01-01

The assembly drawings of the receiver unit are presented for the data compression/error correction digital test system. Equipment specifications are given for the various receiver parts, including the TV input buffer register, delta demodulator, TV sync generator, memory devices, and data storage devices.

Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

NASA Astrophysics Data System (ADS)

Kim, Sang-Koog

2011-03-01

An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

Short-term memory to long-term memory transition in a nanoscale memristor.

PubMed

Chang, Ting; Jo, Sung-Hyun; Lu, Wei

2011-09-27

"Memory" is an essential building block in learning and decision-making in biological systems. Unlike modern semiconductor memory devices, needless to say, human memory is by no means eternal. Yet, forgetfulness is not always a disadvantage since it releases memory storage for more important or more frequently accessed pieces of information and is thought to be necessary for individuals to adapt to new environments. Eventually, only memories that are of significance are transformed from short-term memory into long-term memory through repeated stimulation. In this study, we show experimentally that the retention loss in a nanoscale memristor device bears striking resemblance to memory loss in biological systems. By stimulating the memristor with repeated voltage pulses, we observe an effect analogous to memory transition in biological systems with much improved retention time accompanied by additional structural changes in the memristor. We verify that not only the shape or the total number of stimuli is influential, but also the time interval between stimulation pulses (i.e., the stimulation rate) plays a crucial role in determining the effectiveness of the transition. The memory enhancement and transition of the memristor device was explained from the microscopic picture of impurity redistribution and can be qualitatively described by the same equations governing biological memories. © 2011 American Chemical Society

An ASIC memory buffer controller for a high speed disk system

NASA Technical Reports Server (NTRS)

Hodson, Robert F.; Campbell, Steve

1993-01-01

The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

Transistor and memory devices based on novel organic and biomaterials

NASA Astrophysics Data System (ADS)

Tseng, Jia-Hung

Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with platinum nanoparticles. It is established that the effective barrier height in the materials systems needs to be further engineered in order to have sufficiently long retention times. Finally other novel architectures such as negative differential resistance devices and high density memory arrays are investigated for their influence on memory technology.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung

Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while themore » electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research.« less

Organic transistor memory with a charge storage molecular double-floating-gate monolayer.

PubMed

Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai

2015-05-13

A flexible, low-voltage, and nonvolatile memory device was fabricated by implanting a functional monolayer on an aluminum oxide dielectric surface in a pentacene-based organic transistor. The monolayer-forming molecule contains a phosphonic acid group as the anchoring moiety and a charge-trapping core group flanked between two alkyl chain spacers as the charge trapping site. The memory characteristics strongly depend on the monolayer used due to the localized charge-trapping capability for different core groups, including the diacetylenic (DA) unit as the hole carrier trap, the naphthalenetetracarboxyldiimide (ND) unit as the electron carrier trap, and the one with both DA and ND units present, respectively. The device with the monolayer carrying both DA and ND groups has a larger memory window than that for the one containing DA only and a longer retention time than that for the one containing DA or ND only, giving a memory window of 1.4 V and a retention time around 10(9) s. This device with hybrid organic monolayer/inorganic dielectrics also exhibited rather stable device characteristics upon bending of the polymeric substrate.

Ferroelectric symmetry-protected multibit memory cell

NASA Astrophysics Data System (ADS)

Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

2017-02-01

The tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valued non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.

Scalable quantum memory in the ultrastrong coupling regime.

PubMed

Kyaw, T H; Felicetti, S; Romero, G; Solano, E; Kwek, L-C

2015-03-02

Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances.

Scalable quantum memory in the ultrastrong coupling regime

PubMed Central

Kyaw, T. H.; Felicetti, S.; Romero, G.; Solano, E.; Kwek, L.-C.

2015-01-01

Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances. PMID:25727251

Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2007-01-01

Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

NASA Astrophysics Data System (ADS)

Liu, Chen; Han, Runze; Zhou, Zheng; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

Role of nanorods insertion layer in ZnO-based electrochemical metallization memory cell

NASA Astrophysics Data System (ADS)

Mangasa Simanjuntak, Firman; Singh, Pragya; Chandrasekaran, Sridhar; Juanda Lumbantoruan, Franky; Yang, Chih-Chieh; Huang, Chu-Jie; Lin, Chun-Chieh; Tseng, Tseung-Yuen

2017-12-01

An engineering nanorod array in a ZnO-based electrochemical metallization device for nonvolatile memory applications was investigated. A hydrothermally synthesized nanorod layer was inserted into a Cu/ZnO/ITO device structure. Another device was fabricated without nanorods for comparison, and this device demonstrated a diode-like behavior with no switching behavior at a low current compliance (CC). The switching became clear only when the CC was increased to 75 mA. The insertion of a nanorods layer induced switching characteristics at a low operation current and improve the endurance and retention performances. The morphology of the nanorods may control the switching characteristics. A forming-free electrochemical metallization memory device having long switching cycles (>104 cycles) with a sufficient memory window (103 times) for data storage application, good switching stability and sufficient retention was successfully fabricated by adjusting the morphology and defect concentration of the inserted nanorod layer. The nanorod layer not only contributed to inducing resistive switching characteristics but also acted as both a switching layer and a cation diffusion control layer.

Quantum storage of a photonic polarization qubit in a solid.

PubMed

Gündoğan, Mustafa; Ledingham, Patrick M; Almasi, Attaallah; Cristiani, Matteo; de Riedmatten, Hugues

2012-05-11

We report on the quantum storage and retrieval of photonic polarization quantum bits onto and out of a solid state storage device. The qubits are implemented with weak coherent states at the single photon level, and are stored for a predetermined time of 500 ns in a praseodymium doped crystal with a storage and retrieval efficiency of 10%, using the atomic frequency comb scheme. We characterize the storage by using quantum state tomography, and find that the average conditional fidelity of the retrieved qubits exceeds 95% for a mean photon number μ=0.4. This is significantly higher than a classical benchmark, taking into account the poissonian statistics and finite memory efficiency, which proves that our crystal functions as a quantum storage device for polarization qubits. These results extend the storage capabilities of solid state quantum light matter interfaces to polarization encoding, which is widely used in quantum information science.

Multifunctional Energy Storage and Conversion Devices.

PubMed

Huang, Yan; Zhu, Minshen; Huang, Yang; Pei, Zengxia; Li, Hongfei; Wang, Zifeng; Xue, Qi; Zhi, Chunyi

2016-10-01

Multifunctional energy storage and conversion devices that incorporate novel features and functions in intelligent and interactive modes, represent a radical advance in consumer products, such as wearable electronics, healthcare devices, artificial intelligence, electric vehicles, smart household, and space satellites, etc. Here, smart energy devices are defined to be energy devices that are responsive to changes in configurational integrity, voltage, mechanical deformation, light, and temperature, called self-healability, electrochromism, shape memory, photodetection, and thermal responsivity. Advisable materials, device designs, and performances are crucial for the development of energy electronics endowed with these smart functions. Integrating these smart functions in energy storage and conversion devices gives rise to great challenges from the viewpoint of both understanding the fundamental mechanisms and practical implementation. Current state-of-art examples of these smart multifunctional energy devices, pertinent to materials, fabrication strategies, and performances, are highlighted. In addition, current challenges and potential solutions from materials synthesis to device performances are discussed. Finally, some important directions in this fast developing field are considered to further expand their application. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Digital Holographic Memories

NASA Astrophysics Data System (ADS)

Hesselink, Lambertus; Orlov, Sergei S.

Optical data storage is a phenomenal success story. Since its introduction in the early 1980s, optical data storage devices have evolved from being focused primarily on music distribution, to becoming the prevailing data distribution and recording medium. Each year, billions of optical recordable and prerecorded disks are sold worldwide. Almost every computer today is shipped with a CD or DVD drive installed.

Room Temperature Memory for Few Photon Polarization Qubits

NASA Astrophysics Data System (ADS)

Kupchak, Connor; Mittiga, Thomas; Jordan, Bertus; Nazami, Mehdi; Nolleke, Christian; Figueroa, Eden

2014-05-01

We have developed a room temperature quantum memory device based on Electromagnetically Induced Transparency capable of reliably storing and retrieving polarization qubits on the few photon level. Our system is realized in a vapor of 87Rb atoms utilizing a Λ-type energy level scheme. We create a dual-rail storage scheme mediated by an intense control field to allow storage and retrieval of any arbitrary polarization state. Upon retrieval, we employ a filtering system to sufficiently remove the strong pump field, and subject retrieved light states to polarization tomography. To date, our system has produced signal-to-noise ratios near unity with a memory fidelity of >80 % using coherent state qubits containing four photons on average. Our results thus demonstrate the feasibility of room temperature systems for the storage of single-photon-level photonic qubits. Such room temperature systems will be attractive for future long distance quantum communication schemes.

Active holographic interconnects for interfacing volume storage

NASA Astrophysics Data System (ADS)

Domash, Lawrence H.; Schwartz, Jay R.; Nelson, Arthur R.; Levin, Philip S.

1992-04-01

In order to achieve the promise of terabit/cm3 data storage capacity for volume holographic optical memory, two technological challenges must be met. Satisfactory storage materials must be developed and the input/output architectures able to match their capacity with corresponding data access rates must also be designed. To date the materials problem has received more attention than devices and architectures for access and addressing. Two philosophies of parallel data access to 3-D storage have been discussed. The bit-oriented approach, represented by recent work on two-photon memories, attempts to store bits at local sites within a volume without affecting neighboring bits. High speed acousto-optic or electro- optic scanners together with dynamically focused lenses not presently available would be required. The second philosophy is that volume optical storage is essentially holographic in nature, and that each data write or read is to be distributed throughout the material volume on the basis of angle multiplexing or other schemes consistent with the principles of holography. The requirements for free space optical interconnects for digital computers and fiber optic network switching interfaces are also closely related to this class of devices. Interconnects, beamlet generators, angle multiplexers, scanners, fiber optic switches, and dynamic lenses are all devices which may be implemented by holographic or microdiffractive devices of various kinds, which we shall refer to collectively as holographic interconnect devices. At present, holographic interconnect devices are either fixed holograms or spatial light modulators. Optically or computer generated holograms (submicron resolution, 2-D or 3-D, encoding 1013 bits, nearly 100 diffraction efficiency) can implement sophisticated mathematical design principles, but of course once fabricated they cannot be changed. Spatial light modulators offer high speed programmability but have limited resolution (512 X 512 pixels, encoding about 106 bits of data) and limited diffraction efficiency. For any application, one must choose between high diffractive performance and programmability.

A passive chevron replicator

NASA Technical Reports Server (NTRS)

Oeffinger, T. R.; Tocci, L. R.

1977-01-01

Instrument design provides replicate function between device storage area and guardrail detector in order that nondestructive read-out of memory can be achieved. Use of guardrail detectors in magnetic domain (bubble) circuits is proposed method of increasing detector signal output by increasing detector size without dedicating an excessive amount of device chip area to detector portion.

A memristor-based nonvolatile latch circuit

NASA Astrophysics Data System (ADS)

Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-06-01

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Response of GaAs charge storage devices to transient ionizing radiation

NASA Astrophysics Data System (ADS)

Hetherington, D. L.; Klem, J. F.; Hughes, R. C.; Weaver, H. T.

Charge storage devices in which non-equilibrium depletion regions represent stored charge are sensitive to ionizing radiation. This results since the radiation generates electron-hole pairs that neutralize excess ionized dopant charge. Silicon structures, such as dynamic RAM or CCD cells are particularly sensitive to radiation since carrier diffusion lengths in this material are often much longer than the depletion width, allowing collection of significant quantities of charge from quasi-neutral sections of the device. For GaAs the situation is somewhat different in that minority carrier diffusion lengths are shorter than in silicon, and although mobilities are higher, we expect a reduction of radiation sensitivity as suggested by observations of reduced quantum efficiency in GaAs solar cells. Dynamic memory cells in GaAs have potential increased retention times. In this paper, we report the response of a novel GaAs dynamic memory element to transient ionizing radiation. The charge readout technique is nondestructive over a reasonable applied voltage range and is more sensitive to stored charge than a simple capacitor.

Materials and other needs for advanced phase change memory (Presentation Recording)

NASA Astrophysics Data System (ADS)

Sosa, Norma E.

2015-09-01

Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

PubMed Central

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-01-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced. PMID:27834352

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic.

PubMed

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-11

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

NASA Astrophysics Data System (ADS)

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

Electronic Spin Storage in an Electrically Readable Nuclear Spin Memory with a Lifetime >100 Seconds

NASA Astrophysics Data System (ADS)

McCamey, D. R.; Van Tol, J.; Morley, G. W.; Boehme, C.

2010-12-01

Electron spins are strong candidates with which to implement spintronics because they are both mobile and able to be manipulated. The relatively short lifetimes of electron spins, however, present a problem for the long-term storage of spin information. We demonstrated an ensemble nuclear spin memory in phosphorous-doped silicon, which can be read out electrically and has a lifetime exceeding 100 seconds. The electronic spin information can be mapped onto and stored in the nuclear spin of the phosphorus donors, and the nuclear spins can then be repetitively read out electrically for time periods that exceed the electron spin lifetime. We discuss how this memory can be used in conjunction with other silicon spintronic devices.

Ferroelectric symmetry-protected multibit memory cell

DOE PAGES

Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

2017-02-08

Here, the tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valuedmore » non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.« less

Imaging standards for smart cards

NASA Astrophysics Data System (ADS)

Ellson, Richard N.; Ray, Lawrence A.

1996-02-01

"Smart cards" are plastic cards the size of credit cards which contain integrated circuits for the storage of digital information. The applications of these cards for image storage has been growing as card data capacities have moved from tens of bytes to thousands of bytes. This has prompted the recommendation of standards by the X3B10 committee of ANSI for inclusion in ISO standards for card image storage of a variety of image data types including digitized signatures and color portrait images. This paper will review imaging requirements of the smart card industry, challenges of image storage for small memory devices, card image communications, and the present status of standards. The paper will conclude with recommendations for the evolution of smart card image standards towards image formats customized to the image content and more optimized for smart card memory constraints.

Imaging standards for smart cards

NASA Astrophysics Data System (ADS)

Ellson, Richard N.; Ray, Lawrence A.

1996-01-01

'Smart cards' are plastic cards the size of credit cards which contain integrated circuits for the storage of digital information. The applications of these cards for image storage has been growing as card data capacities have moved from tens of bytes to thousands of bytes. This has prompted the recommendation of standards by the X3B10 committee of ANSI for inclusion in ISO standards for card image storage of a variety of image data types including digitized signatures and color portrait images. This paper reviews imaging requirements of the smart card industry, challenges of image storage for small memory devices, card image communications, and the present status of standards. The paper concludes with recommendations for the evolution of smart card image standards towards image formats customized to the image content and more optimized for smart card memory constraints.

Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures

DTIC Science & Technology

2015-08-01

metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes

Field enhanced charge carrier reconfiguration in electronic and ionic coupled dynamic polymer resistive memory.

PubMed

Zhao, Jun Hui; Thomson, Douglas J; Pilapil, Matt; Pillai, Rajesh G; Rahman, G M Aminur; Freund, Michael S

2010-04-02

Dynamic resistive memory devices based on a conjugated polymer composite (PPy(0)DBS(-)Li(+) (PPy: polypyrrole; DBS(-): dodecylbenzenesulfonate)), with field-driven ion migration, have been demonstrated. In this work the dynamics of these systems has been investigated and it has been concluded that increasing the applied field can dramatically increase the rate at which information can be 'written' into these devices. A conductance model using space charge limited current coupled with an electric field induced ion reconfiguration has been successfully utilized to interpret the experimentally observed transient conducting behaviors. The memory devices use the rising and falling transient current states for the storage of digital states. The magnitude of these transient currents is controlled by the magnitude and width of the write/read pulse. For the 500 nm length devices used in this work an increase in 'write' potential from 2.5 to 5.5 V decreased the time required to create a transient conductance state that can be converted into the digital signal by 50 times. This work suggests that the scaling of these devices will be favorable and that 'write' times for the conjugated polymer composite memory devices will decrease rapidly as ion driving fields increase with decreasing device size.

Some Improvements in Utilization of Flash Memory Devices

NASA Technical Reports Server (NTRS)

Gender, Thomas K.; Chow, James; Ott, William E.

2009-01-01

Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

Memristive effects in oxygenated amorphous carbon nanodevices

NASA Astrophysics Data System (ADS)

Bachmann, T. A.; Koelmans, W. W.; Jonnalagadda, V. P.; Le Gallo, M.; Santini, C. A.; Sebastian, A.; Eleftheriou, E.; Craciun, M. F.; Wright, C. D.

2018-01-01

Computing with resistive-switching (memristive) memory devices has shown much recent progress and offers an attractive route to circumvent the von-Neumann bottleneck, i.e. the separation of processing and memory, which limits the performance of conventional computer architectures. Due to their good scalability and nanosecond switching speeds, carbon-based resistive-switching memory devices could play an important role in this respect. However, devices based on elemental carbon, such as tetrahedral amorphous carbon or ta-C, typically suffer from a low cycling endurance. A material that has proven to be capable of combining the advantages of elemental carbon-based memories with simple fabrication methods and good endurance performance for binary memory applications is oxygenated amorphous carbon, or a-CO x . Here, we examine the memristive capabilities of nanoscale a-CO x devices, in particular their ability to provide the multilevel and accumulation properties that underpin computing type applications. We show the successful operation of nanoscale a-CO x memory cells for both the storage of multilevel states (here 3-level) and for the provision of an arithmetic accumulator. We implement a base-16, or hexadecimal, accumulator and show how such a device can carry out hexadecimal arithmetic and simultaneously store the computed result in the self-same a-CO x cell, all using fast (sub-10 ns) and low-energy (sub-pJ) input pulses.

An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices.

PubMed

Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

2017-12-01

Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag 5 In 5 Sb 60 Te 30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices

NASA Astrophysics Data System (ADS)

Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

2017-12-01

Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

Origami-based tunable truss structures for non-volatile mechanical memory operation.

PubMed

Yasuda, Hiromi; Tachi, Tomohiro; Lee, Mia; Yang, Jinkyu

2017-10-17

Origami has recently received significant interest from the scientific community as a method for designing building blocks to construct metamaterials. However, the primary focus has been placed on their kinematic applications by leveraging the compactness and auxeticity of planar origami platforms. Here, we present volumetric origami cells-specifically triangulated cylindrical origami (TCO)-with tunable stability and stiffness, and demonstrate their feasibility as non-volatile mechanical memory storage devices. We show that a pair of TCO cells can develop a double-well potential to store bit information. What makes this origami-based approach more appealing is the realization of two-bit mechanical memory, in which two pairs of TCO cells are interconnected and one pair acts as a control for the other pair. By assembling TCO-based truss structures, we experimentally verify the tunable nature of the TCO units and demonstrate the operation of purely mechanical one- and two-bit memory storage prototypes.Origami is a popular method to design building blocks for mechanical metamaterials. Here, the authors assemble a volumetric origami-based structure, predict its axial and rotational movements during folding, and demonstrate the operation of mechanical one- and two-bit memory storage.

Moore's law realities for recording systems and memory storage components: HDD, tape, NAND, and optical

NASA Astrophysics Data System (ADS)

Fontana, Robert E.; Decad, Gary M.

2018-05-01

This paper describes trends in the storage technologies associated with Linear Tape Open (LTO) Tape cartridges, hard disk drives (HDD), and NAND Flash based storage devices including solid-state drives (SSD). This technology discussion centers on the relationship between cost/bit and bit density and, specifically on how the Moore's Law perception that areal density doubling and cost/bit halving every two years is no longer being achieved for storage based components. This observation and a Moore's Law Discussion are demonstrated with data from 9-year storage technology trends, assembled from publically available industry reporting sources.

Information storage at the molecular level - The design of a molecular shift register memory

NASA Technical Reports Server (NTRS)

Beratan, David N.; Onuchic, Jose Nelson; Hopfield, J. J.

1989-01-01

The control of electron transfer rates is discussed and a molecular shift register memory at the molecular level is described. The memory elements are made up of molecules which can exist in either an oxidized or reduced state and the bits can be shifted between the cells with photoinduced electron transfer reactions. The device integrates designed molecules onto a VLSI substrate. A control structure to modify the flow of information along a shift register is indicated schematically.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Bin; Wang, Xue -Peng; Shen, Zhen -Ju

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) atmore » an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Furthermore, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe.« less

77 FR 35718 - Certain Universal Serial Bus (“USB”) Portable Storage Devices, Including USB Flash Drives and...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-14

... on the Commission's electronic docket (EDIS) at http://edis.usitc.gov . Hearing-impaired persons are... Sunnyvale, California; Kingston Technology Company, Inc. of Fountain Valley, California; Patriot Memory, LLC...

Apple's Macintosh.

ERIC Educational Resources Information Center

Miller, Michael J.

1984-01-01

Description of the Macintosh personal, educational, and business computer produced by Apple covers cost; physical characteristics including display devices, circuit boards, and built-in features; company-produced software; third-party produced software; memory and storage capacity; word-processing features; and graphics capabilities. (MBR)

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Scandium doped Ge2Sb2Te5 for high-speed and low-power-consumption phase change memory

NASA Astrophysics Data System (ADS)

Wang, Yong; Zheng, Yonghui; Liu, Guangyu; Li, Tao; Guo, Tianqi; Cheng, Yan; Lv, Shilong; Song, Sannian; Ren, Kun; Song, Zhitang

2018-03-01

To bridge the gap of access time between memories and storage systems, the concept of storage class memory has been put forward based on emerging nonvolatile memory technologies. For all the nonvolatile memory candidates, the unpleasant tradeoff between operation speed and retention seems to be inevitable. To promote both the write speed and the retention of phase change memory (PCM), Sc doped Ge2Sb2Te5 (SGST) has been proposed as the storage medium. Octahedral Sc-Te motifs, acting as crystallization precursors to shorten the nucleation incubation period, are the possible reason for the high write speed of 6 ns in PCM cells, five-times faster than that of Ge2Sb2Te5 (GST) cells. Meanwhile, an enhanced 10-year data retention of 119 °C has been achieved. Benefiting from both the increased crystalline resistance and the inhibited formation of the hexagonal phase, the SGST cell has a 77% reduction in power consumption compared to the GST cell. Adhesion of the SGST/SiO2 interface has been strengthened, attributed to the reduced stress by forming smaller grains during crystallization, guaranteeing the reliability of the device. These improvements have made the SGST material a promising candidate for PCM application.

Quantum Storage of Three-Dimensional Orbital-Angular-Momentum Entanglement in a Crystal.

PubMed

Zhou, Zong-Quan; Hua, Yi-Lin; Liu, Xiao; Chen, Geng; Xu, Jin-Shi; Han, Yong-Jian; Li, Chuan-Feng; Guo, Guang-Can

2015-08-14

Here we present the quantum storage of three-dimensional orbital-angular-momentum photonic entanglement in a rare-earth-ion-doped crystal. The properties of the entanglement and the storage process are confirmed by the violation of the Bell-type inequality generalized to three dimensions after storage (S=2.152±0.033). The fidelity of the memory process is 0.993±0.002, as determined through complete quantum process tomography in three dimensions. An assessment of the visibility of the stored weak coherent pulses in higher-dimensional spaces demonstrates that the memory is highly reliable for 51 spatial modes. These results pave the way towards the construction of high-dimensional and multiplexed quantum repeaters based on solid-state devices. The multimode capacity of rare-earth-based optical processors goes beyond the temporal and the spectral degree of freedom, which might provide a useful tool for photonic information processing.

Dual drain MOSFET detector for crosstie memory systems

NASA Astrophysics Data System (ADS)

Bluzer, N.

1985-03-01

This patent application, which discloses a circuit for detecting binary information in crosstie memory systems includes a dual drain MOSFET device having a single channel with a common source and an integrated, thin-film strip of magnetic material suitable for the storage and propagation of Bloch line-crosstie pairs acting as both a shift register and the device's gate. Current flowing through the device, in the absence of a magnetic field, is equally distributed to each drain; however, changing magnetic fields, normal to the plane of the device and generated by Bloch line-crosstie pairs in the strip, interact with the current such that a distribution imbalance exists and one drain or the other receives a disproportionate fraction of the current depending upon the direction of the magnetic field.

Super non-linear RRAM with ultra-low power for 3D vertical nano-crossbar arrays.

PubMed

Luo, Qing; Xu, Xiaoxin; Liu, Hongtao; Lv, Hangbing; Gong, Tiancheng; Long, Shibing; Liu, Qi; Sun, Haitao; Banerjee, Writam; Li, Ling; Gao, Jianfeng; Lu, Nianduan; Liu, Ming

2016-08-25

Vertical crossbar arrays provide a cost-effective approach for high density three-dimensional (3D) integration of resistive random access memory. However, an individual selector device is not allowed to be integrated with the memory cell separately. The development of V-RRAM has impeded the lack of satisfactory self-selective cells. In this study, we have developed a high performance bilayer self-selective device using HfO2 as the memory switching layer and a mixed ionic and electron conductor as the selective layer. The device exhibits high non-linearity (>10(3)) and ultra-low half-select leakage (<0.1 pA). A four layer vertical crossbar array was successfully demonstrated based on the developed self-selective device. High uniformity, ultra-low leakage, sub-nA operation, self-compliance, and excellent read/write disturbance immunity were achieved. The robust array level performance shows attractive potential for low power and high density 3D data storage applications.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide

NASA Astrophysics Data System (ADS)

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 × 10-13-1.0 × 10-14 S cm-1. The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 1010. Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 1011. The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide.

PubMed

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 x 10(-13)-1.0 x 10(-14) S cm(-1). The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 10(10). Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 10(11). The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Octonary resistance states in La 0.7Sr 0.3MnO 3/BaTiO 3/La 0.7Sr 0.3MnO 3 multiferroic tunnel junctions

DOE PAGES

Yue -Wei Yin; Tao, Jing; Huang, Wei -Chuan; ...

2015-10-06

General drawbacks of current electronic/spintronic devices are high power consumption and low density storage. A multiferroic tunnel junction (MFTJ), employing a ferroelectric barrier layer sandwiched between two ferromagnetic layers, presents four resistance states in a single device and therefore provides an alternative way to achieve high density memories. Here, an MFTJ device with eight nonvolatile resistance states by further integrating the design of noncollinear magnetization alignments between the ferromagnetic layers is demonstrated. Through the angle-resolved tunneling magnetoresistance investigations on La 0.7Sr 0.3MnO 3/BaTiO 3/La 0.7Sr 0.3MnO 3 junctions, it is found that, besides collinear parallel/antiparallel magnetic configurations, the MFTJ showsmore » at least two other stable noncollinear (45° and 90°) magnetic configurations. As a result, combining the tunneling electroresistance effect caused by the ferroelectricity reversal of the BaTiO 3 barrier, an octonary memory device is obtained, representing potential applications in high density nonvolatile storage in the future.« less

Nanophotonic rare-earth quantum memory with optically controlled retrieval

NASA Astrophysics Data System (ADS)

Zhong, Tian; Kindem, Jonathan M.; Bartholomew, John G.; Rochman, Jake; Craiciu, Ioana; Miyazono, Evan; Bettinelli, Marco; Cavalli, Enrico; Verma, Varun; Nam, Sae Woo; Marsili, Francesco; Shaw, Matthew D.; Beyer, Andrew D.; Faraon, Andrei

2017-09-01

Optical quantum memories are essential elements in quantum networks for long-distance distribution of quantum entanglement. Scalable development of quantum network nodes requires on-chip qubit storage functionality with control of the readout time. We demonstrate a high-fidelity nanophotonic quantum memory based on a mesoscopic neodymium ensemble coupled to a photonic crystal cavity. The nanocavity enables >95% spin polarization for efficient initialization of the atomic frequency comb memory and time bin-selective readout through an enhanced optical Stark shift of the comb frequencies. Our solid-state memory is integrable with other chip-scale photon source and detector devices for multiplexed quantum and classical information processing at the network nodes.

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

A highly efficient silole-containing dithienylethene with excellent thermal stability and fatigue resistance: a promising candidate for optical memory storage materials.

PubMed

Chan, Jacky Chi-Hung; Lam, Wai Han; Yam, Vivian Wing-Wah

2014-12-10

Diarylethene compounds are potential candidates for applications in optical memory storage systems and photoswitchable molecular devices; however, they usually show low photocycloreversion quantum yields, which result in ineffective erasure processes. Here, we present the first highly efficient photochromic silole-containing dithienylethene with excellent thermal stability and fatigue resistance. The photochemical quantum yields for photocyclization and photocycloreversion of the compound are found to be high and comparable to each other; the latter of which is rarely found in diarylethene compounds. These would give rise to highly efficient photoswitchable material with effective writing and erasure processes. Incorporation of the silole moiety as a photochromic dithienylethene backbone also was demonstrated to enhance the thermal stability of the closed form, in which the thermal backward reaction to the open form was found to be negligible even at 100 °C, which leads to a promising candidate for use as photoswitchable materials and optical memory storage.

Voltage-Dependent Charge Storage in Cladded Zn0.56Cd0.44Se Quantum Dot MOS Capacitors for Multibit Memory Applications

NASA Astrophysics Data System (ADS)

Khan, J.; Lingalugari, M.; Al-Amoody, F.; Jain, F.

2013-11-01

As conventional memories approach scaling limitations, new storage methods must be utilized to increase Si yield and produce higher on-chip memory density. Use of II-VI Zn0.56Cd0.44Se quantum dots (QDs) is compatible with epitaxial gate insulators such as ZnS-ZnMgS. Voltage-dependent charging effects in cladded Zn0.56Cd0.44Se QDs are presented in a conventional metal-oxide-semiconductor capacitor structure. Charge storage capabilities in Si and ZnMgS QDs have been reported by various researchers; this work is focused on II-VI material Zn0.56Cd0.44Se QDs nucleated using photoassisted microwave plasma metalorganic chemical vapor deposition. Using capacitance-voltage hysteresis characterization, the multistep charging and discharging capabilities of the QDs at room temperature are presented. Three charging states are presented within a 10 V charging voltage range. These characteristics exemplify discrete charge states in the QD layer, perfect for multibit, QD-functionalized high-density memory applications. Multiple charge states with low operating voltage provide device characteristics that can be used for multibit storage by allowing varying charges to be stored in a QD layer based on the applied "write" voltage.

Ultra-High-Density Ferroelectric Memories

NASA Technical Reports Server (NTRS)

Thakoor, Sarita

1995-01-01

Features include fast input and output via optical fibers. Memory devices of proposed type include thin ferroelectric films in which data stored in form of electric polarization. Assuming one datum stored in region as small as polarization domain, sizes of such domains impose upper limits on achievable storage densities. Limits approach 1 terabit/cm(Sup2) in all-optical versions of these ferroelectric memories and exceeds 1 gigabit/cm(Sup2) in optoelectronic versions. Memories expected to exhibit operational lives of about 10 years, input/output times of about 10 ns, and fatigue lives of about 10(Sup13) cycles.

Resistive switching characteristics of solution-processed Al-Zn-Sn-O films annealed by microwave irradiation

NASA Astrophysics Data System (ADS)

Kim, Tae-Wan; Baek, Il-Jin; Cho, Won-Ju

2018-02-01

In this study, we employed microwave irradiation (MWI) at low temperature in the fabrication of solution-processed AlZnSnO (AZTO) resistive random access memory (ReRAM) devices with a structure of Ti/AZTO/Pt and compared the memory characteristics with the conventional thermal annealing (CTA) process. Typical bipolar resistance switching (BRS) behavior was observed in AZTO ReRAM devices treated with as-deposited (as-dep), CTA and MWI. In the low resistance state, the Ohmic conduction mechanism describes the dominant conduction of these devices. On the other hand, the trap-controlled space charge limited conduction (SCLC) mechanism predominates in the high resistance state. The AZTO ReRAM devices processed with MWI showed larger memory windows, uniform distribution of resistance state and operating voltage, stable DC durability (>103 cycles) and stable retention characteristics (>104 s). In addition, the AZTO ReRAM devices treated with MWI exhibited multistage storage characteristics by modulating the amplitude of the reset bias, and eight distinct resistance levels were obtained with stable retention capability.

An ECG ambulatory system with mobile embedded architecture for ST-segment analysis.

PubMed

Miranda-Cid, Alejandro; Alvarado-Serrano, Carlos

2010-01-01

A prototype of a ECG ambulatory system for long term monitoring of ST segment of 3 leads, low power, portability and data storage in solid state memory cards has been developed. The solution presented is based in a mobile embedded architecture of a portable entertainment device used as a tool for storage and processing of bioelectric signals, and a mid-range RISC microcontroller, PIC 16F877, which performs the digitalization and transmission of ECG. The ECG amplifier stage is a low power, unipolar voltage and presents minimal distortion of the phase response of high pass filter in the ST segment. We developed an algorithm that manages access to files through an implementation for FAT32, and the ECG display on the device screen. The records are stored in TXT format for further processing. After the acquisition, the system implemented works as a standard USB mass storage device.

Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications

NASA Astrophysics Data System (ADS)

He, Long-Fei; Zhu, Hao; Xu, Jing; Liu, Hao; Nie, Xin-Ran; Chen, Lin; Sun, Qing-Qing; Xia, Yang; Wei Zhang, David

2017-11-01

The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.

Face classification using electronic synapses

NASA Astrophysics Data System (ADS)

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H.-S. Philip; Qian, He

2017-05-01

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Face classification using electronic synapses.

PubMed

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H-S Philip; Qian, He

2017-05-12

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

NASA Astrophysics Data System (ADS)

Zhu, H. X.; Zhang, T.; Wang, R. X.; Zhang, Y. Y.; Li, L. T.; Qiu, X. Y.

2016-05-01

A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfOx film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfOx matrix. Pt/Ni-NCs embedded HfOx/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 1012 electrons/cm2, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 104 cycles and excellent retention performance of 105 s, fulfilling the requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.

Effect with high density nano dot type storage layer structure on 20 nm planar NAND flash memory characteristics

NASA Astrophysics Data System (ADS)

Sasaki, Takeshi; Muraguchi, Masakazu; Seo, Moon-Sik; Park, Sung-kye; Endoh, Tetsuo

2014-01-01

The merits, concerns and design principle for the future nano dot (ND) type NAND flash memory cell are clarified, by considering the effect of storage layer structure on NAND flash memory characteristics. The characteristics of the ND cell for a NAND flash memory in comparison with the floating gate type (FG) is comprehensively studied through the read, erase, program operation, and the cell to cell interference with device simulation. Although the degradation of the read throughput (0.7% reduction of the cell current) and slower program time (26% smaller programmed threshold voltage shift) with high density (10 × 1012 cm-2) ND NAND are still concerned, the suppress of the cell to cell interference with high density (10 × 1012 cm-2) plays the most important part for scaling and multi-level cell (MLC) operation in comparison with the FG NAND. From these results, the design knowledge is shown to require the control of the number of nano dots rather than the higher nano dot density, from the viewpoint of increasing its memory capacity by MLC operation and suppressing threshold voltage variability caused by the number of dots in the storage layer. Moreover, in order to increase its memory capacity, it is shown the tunnel oxide thickness with ND should be designed thicker (>3 nm) than conventional designed ND cell for programming/erasing with direct tunneling mechanism.

Resistive RAMs as analog trimming elements

NASA Astrophysics Data System (ADS)

Aziza, H.; Perez, A.; Portal, J. M.

2018-04-01

This work investigates the use of Resistive Random Access Memory (RRAM) as an analog trimming device. The analog storage feature of the RRAM cell is evaluated and the ability of the RRAM to hold several resistance states is exploited to propose analog trim elements. To modulate the memory cell resistance, a series of short programming pulses are applied across the RRAM cell allowing a fine calibration of the RRAM resistance. The RRAM non volatility feature makes the analog device powers up already calibrated for the system in which the analog trimmed structure is embedded. To validate the concept, a test structure consisting of a voltage reference is evaluated.

Titanium oxide nonvolatile memory device and its application

NASA Astrophysics Data System (ADS)

Wang, Wei

In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

Nanoscale thermal cross-talk effect on phase-change probe memory.

PubMed

Wang, Lei; Wen, Jing; Xiong, Bangshu

2018-05-14

Phase-change probe memory is considered as one of the most promising means for next-generation mass storage devices. However, the achievable storage density of phase-change probe memory is drastically affected by the resulting thermal cross-talk effect while previously lacking of detailed study. Therefore, a three dimensional model that couples electrical, thermal, and phase-change processes of the Ge2Sb2Te5 media is developed, and subsequently deployed to assess the thermal cross-talk effect based on Si/TiN/ Ge2Sb2Te5/diamond-like carbon structure by appropriately tailoring the electro-thermal and geometrical properties of the storage media stack for a variety of external excitations. The modeling results show that the diamond-like carbon capping with a thin thickness, a high electrical conductivity, and a low thermal conductivity is desired to minimize the thermal cross-talk, while the TiN underlayer has a slight impact on the thermal cross-talk. Combining the modeling findings with the previous film deposition experience, an optimized phase-change probe memory architecture is presented, and its capability of providing ultra-high recording density simultaneously with a sufficiently low thermal cross-talk is demonstrated. . © 2018 IOP Publishing Ltd.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baudry, Laurent; Lukyanchuk, Igor; Vinokur, Valerii M.

Here, the tunability of electrical polarization in ferroelectrics is instrumental to their applications in information-storage devices. The existing ferroelectric memory cells are based on the two-level storage capacity with the standard binary logics. However, the latter have reached its fundamental limitations. Here we propose ferroelectric multibit cells (FMBC) utilizing the ability of multiaxial ferroelectric materials to pin the polarization at a sequence of the multistable states. Employing the catastrophe theory principles we show that these states are symmetry-protected against the information loss and thus realize novel topologically-controlled access memory (TAM). Our findings enable developing a platform for the emergent many-valuedmore » non-Boolean information technology and target challenges posed by needs of quantum and neuromorphic computing.« less

Sb-rich Si-Sb-Te phase change material for multilevel data storage: The degree of disorder in the crystalline state

NASA Astrophysics Data System (ADS)

Zhou, Xilin; Wu, Liangcai; Song, Zhitang; Rao, Feng; Cheng, Yan; Peng, Cheng; Yao, Dongning; Song, Sannian; Liu, Bo; Feng, Songlin; Chen, Bomy

2011-07-01

The phase change memory with monolayer chalcogenide film (Si18Sb52Te30) is investigated for the feasibility of multilevel data storage. During the annealing of the film, a relatively stable intermediate resistance can be obtained at an appropriate heating rate. The transmission electron microscopy in situ analysis reveals a conversion of crystallization mechanism from nucleation to crystal growth, which leads a continuous reduction in the degree of disorder. It is indicated from the electrical properties of the devices that the fall edge of the voltage pulse is the critical factor that determines a reliable triple-level resistance state of the phase change memory cell.

Mass Memory Storage Devices for AN/SLQ-32(V).

DTIC Science & Technology

1985-06-01

tactical programs and libraries into the AN/UYK-19 computer , the RP-16 microprocessor, and other peripheral processors (e.g., ADLS and Band 1) will be...software must be loaded into computer memory from the 4-track magnetic tape cartridges (MTCs) on which the programs are stored. Program load begins...software. Future computer programs , which will reside in peripheral processors, include the Automated Decoy Launching System (ADLS) and Band 1. As

Application of nanomaterials in two-terminal resistive-switching memory devices

PubMed Central

Ouyang, Jianyong

2010-01-01

Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs), nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. PMID:22110862

Analyzing Data Remnant Remains on User Devices to Determine Probative Artifacts in Cloud Environment.

PubMed

Ahmed, Abdulghani Ali; Xue Li, Chua

2018-01-01

Cloud storage service allows users to store their data online, so that they can remotely access, maintain, manage, and back up data from anywhere via the Internet. Although helpful, this storage creates a challenge to digital forensic investigators and practitioners in collecting, identifying, acquiring, and preserving evidential data. This study proposes an investigation scheme for analyzing data remnants and determining probative artifacts in a cloud environment. Using pCloud as a case study, this research collected the data remnants available on end-user device storage following the storing, uploading, and accessing of data in the cloud storage. Data remnants are collected from several sources, including client software files, directory listing, prefetch, registry, network PCAP, browser, and memory and link files. Results demonstrate that the collected remnants data are beneficial in determining a sufficient number of artifacts about the investigated cybercrime. © 2017 American Academy of Forensic Sciences.

Vacancy structures and melting behavior in rock-salt GeSbTe

DOE PAGES

Zhang, Bin; Wang, Xue -Peng; Shen, Zhen -Ju; ...

2016-05-03

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) atmore » an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Furthermore, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe.« less

Programmable permanent data storage characteristics of nanoscale thin films of a thermally stable aromatic polyimide.

PubMed

Kim, Dong Min; Park, Samdae; Lee, Taek Joon; Hahm, Suk Gyu; Kim, Kyungtae; Kim, Jin Chul; Kwon, Wonsang; Ree, Moonhor

2009-10-06

We have synthesized a new thermally and dimensionally stable polyimide, poly(4,4'-amino(4-hydroxyphenyl)diphenylene hexafluoroisopropylidenediphthalimide) (6F-HTPA PI). 6F-HTPA PI is soluble in organic solvents and is thus easily processed with conventional solution coating techniques to produce good quality nanoscale thin films. Devices fabricated with nanoscale thin PI films with thicknesses less than 77 nm exhibit excellent unipolar write-once-read-many-times (WORM) memory behavior with a high ON/OFF current ratio of up to 10(6), a long retention time and low power consumption, less than +/-3.0 V. Furthermore, these WORM characteristics were found to persist even at high temperatures up to 150 degrees C. The WORM memory behavior was found to be governed by trap-limited space-charge limited conduction and local filament formation. The conduction processes are dominated by hole injection. Thus the hydroxytriphenylamine moieties of the PI polymer might play a key role as hole trapping sites in the observed WORM memory behavior. The properties of 6F-HTPA PI make it a promising material for high-density and very stable programmable permanent data storage devices with low power consumption.

Vacancy Structures and Melting Behavior in Rock-Salt GeSbTe

PubMed Central

Zhang, Bin; Wang, Xue-Peng; Shen, Zhen-Ju; Li, Xian-Bin; Wang, Chuan-Shou; Chen, Yong-Jin; Li, Ji-Xue; Zhang, Jin-Xing; Zhang, Ze; Zhang, Sheng-Bai; Han, Xiao-Dong

2016-01-01

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) at an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Moreover, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe. PMID:27140674

Cathodochromic storage device

NASA Technical Reports Server (NTRS)

Bosomworth, D. R.; Moles, W. H.

1969-01-01

A memory and display device has been developed by combing a fast phosphor layer with a cathodochromic layer in a cathode ray tube. Images are stored as patterns of electron beam induced optical density in the cathodo-chromic material. The stored information is recovered by exciting the backing, fast phosphor layer with a constant current electron beam and detecting the emitted radiation which is modulated by absorption in the cathodochromic layer. The storage can be accomplished in one or more TV frames (1/30 sec each). More than 500 TV line resolution and close to 2:1 contrast ratio are possible. The information storage time in a dark environment is approximately 24 hours. A reconstituted (readout) electronic video signal can be generated continuously for times in excess of 10 minutes or periodically for several hours.

Onboard System Evaluation of Rotors Vibration, Engines (OBSERVE) monitoring System

DTIC Science & Technology

1992-07-01

consists of a Data Acquisiiton Unit (DAU), Control and Display Unit ( CADU ), Universal Tracking Devices (UTD), Remote Cockpit Display (RCD) and a PC...and Display Unit ( CADU ) - The CADU provides data storage and a graphical user interface neccesary to display both the measured data and diagnostic...information. The CADU has an interface to a Credit Card Memory (CCM) which operates similar to a disk drive, allowing the storage of data and programs. The

Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier.

PubMed

Ahn, Chiyui; Fong, Scott W; Kim, Yongsung; Lee, Seunghyun; Sood, Aditya; Neumann, Christopher M; Asheghi, Mehdi; Goodson, Kenneth E; Pop, Eric; Wong, H-S Philip

2015-10-14

Phase-change memory (PCM) is an important class of data storage, yet lowering the programming current of individual devices is known to be a significant challenge. Here we improve the energy-efficiency of PCM by placing a graphene layer at the interface between the phase-change material, Ge2Sb2Te5 (GST), and the bottom electrode (W) heater. Graphene-PCM (G-PCM) devices have ∼40% lower RESET current compared to control devices without the graphene. This is attributed to the graphene as an added interfacial thermal resistance which helps confine the generated heat inside the active PCM volume. The G-PCM achieves programming up to 10(5) cycles, and the graphene could further enhance the PCM endurance by limiting atomic migration or material segregation at the bottom electrode interface.

Optical recording materials

NASA Astrophysics Data System (ADS)

Savant, Gajendra D.; Jannson, Joanna L.

1991-07-01

The increased emphasis on speed of operation, wavelength selectivity, compactness, and ruggedization has focused a great deal of attention on the solutions offered by all-optic devices and by hybrid electro-optic systems. In fact, many photonic devices are being considered for use as partial replacements for electronic systems. Optical components, which include modulators, switches, 3-D memory storage devices, wavelength division multiplexers, holographic optical elements, and others, are examples of such devices. The success or failure of these modern optical devices depends, to a great extent, on the performance and survivability of the optical materials used. This is particularly true for volume holographic filters, organic memory media, second- and third-order nonlinear material-based processors and neural networks. Due to the critical importance of these materials and their lack of availability, Physical Optics Corporation (POC) undertook a global advanced optical materials program which has enabled it to introduce several optical devices, based on the new and improved materials which will be described in this article.

Storage of multiple single-photon pulses emitted from a quantum dot in a solid-state quantum memory.

PubMed

Tang, Jian-Shun; Zhou, Zong-Quan; Wang, Yi-Tao; Li, Yu-Long; Liu, Xiao; Hua, Yi-Lin; Zou, Yang; Wang, Shuang; He, De-Yong; Chen, Geng; Sun, Yong-Nan; Yu, Ying; Li, Mi-Feng; Zha, Guo-Wei; Ni, Hai-Qiao; Niu, Zhi-Chuan; Li, Chuan-Feng; Guo, Guang-Can

2015-10-15

Quantum repeaters are critical components for distributing entanglement over long distances in presence of unavoidable optical losses during transmission. Stimulated by the Duan-Lukin-Cirac-Zoller protocol, many improved quantum repeater protocols based on quantum memories have been proposed, which commonly focus on the entanglement-distribution rate. Among these protocols, the elimination of multiple photons (or multiple photon-pairs) and the use of multimode quantum memory are demonstrated to have the ability to greatly improve the entanglement-distribution rate. Here, we demonstrate the storage of deterministic single photons emitted from a quantum dot in a polarization-maintaining solid-state quantum memory; in addition, multi-temporal-mode memory with 1, 20 and 100 narrow single-photon pulses is also demonstrated. Multi-photons are eliminated, and only one photon at most is contained in each pulse. Moreover, the solid-state properties of both sub-systems make this configuration more stable and easier to be scalable. Our work will be helpful in the construction of efficient quantum repeaters based on all-solid-state devices.

Storage of multiple single-photon pulses emitted from a quantum dot in a solid-state quantum memory

PubMed Central

Tang, Jian-Shun; Zhou, Zong-Quan; Wang, Yi-Tao; Li, Yu-Long; Liu, Xiao; Hua, Yi-Lin; Zou, Yang; Wang, Shuang; He, De-Yong; Chen, Geng; Sun, Yong-Nan; Yu, Ying; Li, Mi-Feng; Zha, Guo-Wei; Ni, Hai-Qiao; Niu, Zhi-Chuan; Li, Chuan-Feng; Guo, Guang-Can

2015-01-01

Quantum repeaters are critical components for distributing entanglement over long distances in presence of unavoidable optical losses during transmission. Stimulated by the Duan–Lukin–Cirac–Zoller protocol, many improved quantum repeater protocols based on quantum memories have been proposed, which commonly focus on the entanglement-distribution rate. Among these protocols, the elimination of multiple photons (or multiple photon-pairs) and the use of multimode quantum memory are demonstrated to have the ability to greatly improve the entanglement-distribution rate. Here, we demonstrate the storage of deterministic single photons emitted from a quantum dot in a polarization-maintaining solid-state quantum memory; in addition, multi-temporal-mode memory with 1, 20 and 100 narrow single-photon pulses is also demonstrated. Multi-photons are eliminated, and only one photon at most is contained in each pulse. Moreover, the solid-state properties of both sub-systems make this configuration more stable and easier to be scalable. Our work will be helpful in the construction of efficient quantum repeaters based on all-solid-state devices. PMID:26468996

Electric-Field-Driven Dual Vacancies Evolution in Ultrathin Nanosheets Realizing Reversible Semiconductor to Half-Metal Transition.

PubMed

Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi

2015-12-02

Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.

Light-Gated Memristor with Integrated Logic and Memory Functions.

PubMed

Tan, Hongwei; Liu, Gang; Yang, Huali; Yi, Xiaohui; Pan, Liang; Shang, Jie; Long, Shibing; Liu, Ming; Wu, Yihong; Li, Run-Wei

2017-11-28

Memristive devices are able to store and process information, which offers several key advantages over the transistor-based architectures. However, most of the two-terminal memristive devices have fixed functions once made and cannot be reconfigured for other situations. Here, we propose and demonstrate a memristive device "memlogic" (memory logic) as a nonvolatile switch of logic operations integrated with memory function in a single light-gated memristor. Based on nonvolatile light-modulated memristive switching behavior, a single memlogic cell is able to achieve optical and electrical mixed basic Boolean logic of reconfigurable "AND", "OR", and "NOT" operations. Furthermore, the single memlogic cell is also capable of functioning as an optical adder and digital-to-analog converter. All the memlogic outputs are memristive for in situ data storage due to the nonvolatile resistive switching and persistent photoconductivity effects. Thus, as a memdevice, the memlogic has potential for not only simplifying the programmable logic circuits but also building memristive multifunctional optoelectronics.

Rewritable ferroelectric vortex pairs in BiFeO3

NASA Astrophysics Data System (ADS)

Li, Yang; Jin, Yaming; Lu, Xiaomei; Yang, Jan-Chi; Chu, Ying-Hao; Huang, Fengzhen; Zhu, Jinsong; Cheong, Sang-Wook

2017-08-01

Ferroelectric vortex in multiferroic materials has been considered as a promising alternative to current memory cells for the merit of high storage density. However, the formation of regular natural ferroelectric vortex is difficult, restricting the achievement of vortex memory device. Here, we demonstrated the creation of ferroelectric vortex-antivortex pairs in BiFeO3 thin films by using local electric field. The evolution of the polar vortex structure is studied by piezoresponse force microscopy at nanoscale. The results reveal that the patterns and stability of vortex structures are sensitive to the poling position. Consecutive writing and erasing processes cause no influence on the original domain configuration. The Z4 proper coloring vortex-antivortex network is then analyzed by graph theory, which verifies the rationality of artificial vortex-antivortex pairs. This study paves a foundation for artificial regulation of vortex, which provides a possible pathway for the design and realization of non-volatile vortex memory devices and logical devices.

Coexistence of diode-like volatile and multilevel nonvolatile resistive switching in a ZrO2/TiO2 stack structure.

PubMed

Li, Yingtao; Yuan, Peng; Fu, Liping; Li, Rongrong; Gao, Xiaoping; Tao, Chunlan

2015-10-02

Diode-like volatile resistive switching as well as nonvolatile resistive switching behaviors in a Cu/ZrO₂/TiO₂/Ti stack are investigated. Depending on the current compliance during the electroforming process, either volatile resistive switching or nonvolatile resistive switching is observed. With a lower current compliance (<10 μA), the Cu/ZrO₂/TiO₂/Ti device exhibits diode-like volatile resistive switching with a rectifying ratio over 10(6). The permanent transition from volatile to nonvolatile resistive switching can be obtained by applying a higher current compliance of 100 μA. Furthermore, by using different reset voltages, the Cu/ZrO₂/TiO₂/Ti device exhibits multilevel memory characteristics with high uniformity. The coexistence of nonvolatile multilevel memory and diode-like volatile resistive switching behaviors in the same Cu/ZrO₂/TiO₂/Ti device opens areas of applications in high-density storage, logic circuits, neural networks, and passive crossbar memory selectors.

Magnetic Bubble Memories for Data Collection in Sounding Rockets,

DTIC Science & Technology

1982-01-29

generate interest in bubbles as a mass storage device for micro - processor based equipment, manufacturers have come up with a variety of diversified...absence of a bubble represents a Ŕ". With diameters on the order of I to 5 micro -meters, these bubbles are so small that extremely tiny chips can hold...methods of transfer: polled I/O, interrupt driven I/O, and direct memory access (DMA). The first two methods require tho host processor be involved

A 128K-bit CCD buffer memory system

NASA Technical Reports Server (NTRS)

Siemens, K. H.; Wallace, R. W.; Robinson, C. R.

1976-01-01

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.

Abnormal Multiple Charge Memory States in Exfoliated Few-Layer WSe2 Transistors.

PubMed

Chen, Mikai; Wang, Yifan; Shepherd, Nathan; Huard, Chad; Zhou, Jiantao; Guo, L J; Lu, Wei; Liang, Xiaogan

2017-01-24

To construct reliable nanoelectronic devices based on emerging 2D layered semiconductors, we need to understand the charge-trapping processes in such devices. Additionally, the identified charge-trapping schemes in such layered materials could be further exploited to make multibit (or highly desirable analog-tunable) memory devices. Here, we present a study on the abnormal charge-trapping or memory characteristics of few-layer WSe 2 transistors. This work shows that multiple charge-trapping states with large extrema spacing, long retention time, and analog tunability can be excited in the transistors made from mechanically exfoliated few-layer WSe 2 flakes, whereas they cannot be generated in widely studied few-layer MoS 2 transistors. Such charge-trapping characteristics of WSe 2 transistors are attributed to the exfoliation-induced interlayer deformation on the cleaved surfaces of few-layer WSe 2 flakes, which can spontaneously form ambipolar charge-trapping sites. Our additional results from surface characterization, charge-retention characterization at different temperatures, and density functional theory computation strongly support this explanation. Furthermore, our research also demonstrates that the charge-trapping states excited in multiple transistors can be calibrated into consistent multibit data storage levels. This work advances the understanding of the charge memory mechanisms in layered semiconductors, and the observed charge-trapping states could be further studied for enabling ultralow-cost multibit analog memory devices.

Device Demonstration

DTIC Science & Technology

2006-12-31

Reset (Write a Ŕ") * Apply current to melt memory element * Cool quickly to " freeze -in" amorphous state * Amorphous state = high resistance = low...It consists of a 6 jtF storage capacitor switched by 3 series thyristors. The module output is connected to the x-ray source through a ferrite

Design of all-optical memory cell using EIT and lasing without inversion phenomena in optical micro ring resonators

NASA Astrophysics Data System (ADS)

Pasyar, N.; Yadipour, R.; Baghban, H.

2017-07-01

The proposed design of the optical memory unit cell contains dual micro ring resonators in which the effect of lasing without inversion (LWI) in three-level nano particles doped over the optical resonators or integrators as the gain segment is used for loss compensation. Also, an on/off phase shifter based on electromagnetically induced transparency (EIT) in three-level quantum dots (QDs) has been used for data reading at requested time. Device minimizing for integrated purposes and high speed data storage are the main advantages of the optical integrator based memory.

CMOS-compatible spintronic devices: a review

NASA Astrophysics Data System (ADS)

Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

2016-11-01

For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

2012-02-01

Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

Design and realization of flash translation layer in tiny embedded system

NASA Astrophysics Data System (ADS)

Ren, Xiaoping; Sui, Chaoya; Luo, Zhenghua; Cao, Wenji

2018-05-01

We design a solution of tiny embedded device NAND Flash storage system on the basis of deeply studying the characteristics of widely used NAND Flash in the embedded devices in order to adapt to the development of intelligent interconnection trend and solve the storage problem of large data volume in tiny embedded system. The hierarchical structure and function purposes of the system are introduced. The design and realization of address mapping, error correction, bad block management, wear balance, garbage collection and other algorithms in flash memory transformation layer are described in details. NAND Flash drive and management are realized on STM32 micro-controller, thereby verifying design effectiveness and feasibility.

Holographic optical disc

NASA Astrophysics Data System (ADS)

Zhou, Gan; An, Xin; Pu, Allen; Psaltis, Demetri; Mok, Fai H.

1999-11-01

The holographic disc is a high capacity, disk-based data storage device that can provide the performance for next generation mass data storage needs. With a projected capacity approaching 1 terabit on a single 12 cm platter, the holographic disc has the potential to become a highly efficient storage hardware for data warehousing applications. The high readout rate of holographic disc makes it especially suitable for generating multiple, high bandwidth data streams such as required for network server computers. Multimedia applications such as interactive video and HDTV can also potentially benefit from the high capacity and fast data access of holographic memory.

Tunnel field-effect transistor charge-trapping memory with steep subthreshold slope and large memory window

NASA Astrophysics Data System (ADS)

Kino, Hisashi; Fukushima, Takafumi; Tanaka, Tetsu

2018-04-01

Charge-trapping memory requires the increase of bit density per cell and a larger memory window for lower-power operation. A tunnel field-effect transistor (TFET) can achieve to increase the bit density per cell owing to its steep subthreshold slope. In addition, a TFET structure has an asymmetric structure, which is promising for achieving a larger memory window. A TFET with the N-type gate shows a higher electric field between the P-type source and the N-type gate edge than the conventional FET structure. This high electric field enables large amounts of charges to be injected into the charge storage layer. In this study, we fabricated silicon-oxide-nitride-oxide-semiconductor (SONOS) memory devices with the TFET structure and observed a steep subthreshold slope and a larger memory window.

Non-volatile memory based on the ferroelectric photovoltaic effect

PubMed Central

Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

2013-01-01

The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

EDITORIAL: Nanomemory: information and ingenuity Nanomemory: information and ingenuity

NASA Astrophysics Data System (ADS)

Demming, Anna

2013-04-01

The age of information has placed unprecedented demands on data storage. In response, a rich hub of research activity has erupted in the search for new types of memory with improved capacity and data processing speed [1, 2]. There has even been progress in mimicking the subtleties of how the human neural system remembers and forgets with artificial synaptic devices [3, 4]. Yet many challenges remain. As researchers at Brigham Young University in the US point out, 'Current data storage technologies have limitations that prevent their use in archival data storage applications'. Anthony C Pearson and colleagues look at the potential role of graphene in data storage solutions. Graphene's wide range of extraordinary properties has recommended it for a number of applications. This issue reports how it can form the basis of nanofuses that may be used for permanent, write-once-read-many (WORM) data storage devices [5]. Leon Chua's forecast of 'Memristor—the missing circuit element' [6] and the subsequent demonstration of memristance in nanoscale systems by researchers at HP Labs [7] triggered a surge of studies investigating the application of memristor devices in non-volatile memory [8]. In fact these structures may have a still broader impact in nanotechnology. At the nanoscale statistical variations in defect concentrations give rise to vast differences in behaviour, and device variability and ageing can be profound. These characteristics led George Snider to observe, 'Nanodevices are crummy', when considering their application in conventional Boolean logic systems [9]. Yet Snider's grim assessment was merely a prologue to an insightful recount of simulations demonstrating how to side-step a number of nanotechnology's main challenges by using self-organizing networks based on memristive devices. Similar fault tolerance is demonstrated in the organic-nanoparticle transistors developed by researchers at the University of Lille, who demonstrate a weighting behaviour that mimics aspects of synaptic functions that may be key to implementing neuromorphic computing [10]. Developments in this field show increasingly more sophisticated imitation of human neural processing with analogue memory functionality [3] and circuits that both learn and forget [4]. Keep an eye out for the Nanotechnology special issue on synaptic electronics later this year with guest editors James Gimzewski from the University of California, Los Angeles, and Dominique Vuillaume from the University of Lille, for a one-stop update on the latest cutting edge developments in this field. Graphene has demonstrated excellent potential in a number of applications from supercapacitors [11] to photomechanical actuators [12]. However, so far its potential in memory has been notably less explored. In this issue Anthony C Pearson and colleagues at Brigham Young University report how they fabricate graphene 'bow-tie' structures for fuses and program them though thermal oxidation [5]. As the researchers point out graphene's low atomic mobility, high chemical resistance to oxidation and excellent electrical conductivity make it well suited as archival data storage fuse material. They also highlight a number of attractive attributes in the devices as a whole: 'graphene WORM devices can be read and written electronically, can potentially have the very high data densities of flash memory, appear to be highly stable in both the on and off states, have a high on/off current ratio, and can be programmed with low voltages and powers'. In fuses an electrical connection is destroyed by an applied voltage. The process sounds destructive yet fuses are incredibly useful. Edison once famously commented, 'Just because something does not do what you planned it to do does not mean it is useless' [13]. There are synergies of this philosophy throughout nanotechnology research where apparently awkward behaviour is put to good use. Adding the dynamical nature of nanodevices to the list of obstacles to scalability, Snider rounded up his assessment, 'So we are faced with the challenge of computing with devices that are not only crummy, but dynamical as well'. Yet it was that dynamic behaviour that he went on to exploit in his demonstration of robust self-organizing networks using memristor devices. Successful research is by nature continually revealing behaviour that is unexpected or unusual. The work described here is just some of the many examples of how successful development in research does not tolerate the unexpected, but embraces it. References [1] Waser R and Aono M 2007 Nanoionics-based resistive switching memories Nature Mater 6 833-40 [2] Vontobel P O, Robinett W, Kuekes P J, Stewart D R, Straznicky J and Stanley Williams R 2009 Writing to and reading from a nano-scale crossbar memory based on memristors Nanotechnology 20 425204 [3] Seo K et al 2011 Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device Nanotechnology 22 254023 [4] Yang R, Terabe K, Liu G, Tsuruoka T, Hasegawa T, Gimzewski J K and Aono M 2012 On-demand nanodevice with electrical and neuromorphic multifunction realized by local ion migration ACS Nano 6 9515-20 [5] Pearson A C, Jamieson S, Linford M R, Lunt B M and Davis R C 2013 Oxidation of graphene 'bow tie' nanofuses for permanent, write-once-read-many data storage devices Nanotechnology 24 135202 [6]Chua L O 1971 Memristor—the missing circuit element IEEE Trans. Circuit Theory 18 507-19 [7] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 The missing memristor found Nature 453 80-3 [8] Non-volatile memory based on nanostructures http://iopscience.iop.org/0957-4484/22/25 [9] Snider G S 2007 Self-organized computation with unreliable, memristive nanodevices Nanotechnology 18 365202 [10] Alibart F, Pieutin S, Guérin D, Novembre C, Lenfant S, Lmimouni K, Gamrat C and Vuillaume D 2010 An organic nanoparticle transistor behaving as a biological spiking synapse Adv. Funct. Mater 20 330-7 [11] Bose S, Kim N H, Kuila T, Lau K-T and Lee J H 2011 Electrochemical performance of a graphene-polypyrrole nanocomposite as a supercapacitor electrode Nanotechnology 22 295202 [12] Loomis J, King B, Burkhead T, Xu P, Bessler N, Terentjev E and Panchapakesan B 2012 Graphene-nanoplatelet-based photomechanical actuators Nanotechnology 23 045501 [13] Finn C A 2001 Artifacts: An Archaeologist's Year in Silicon Valley (Cambridge, MA: MIT Press)

Ga-doped indium oxide nanowire phase change random access memory cells

NASA Astrophysics Data System (ADS)

Jin, Bo; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo

2014-02-01

Phase change random access memory (PCRAM) devices are usually constructed using tellurium based compounds, but efforts to seek other materials providing desirable memory characteristics have continued. We have fabricated PCRAM devices using Ga-doped In2O3 nanowires with three different Ga compositions (Ga/(In+Ga) atomic ratio: 2.1%, 11.5% and 13.0%), and investigated their phase switching properties. The nanowires (˜40 nm in diameter) can be repeatedly switched between crystalline and amorphous phases, and Ga concentration-dependent memory switching behavior in the nanowires was observed with ultra-fast set/reset rates of 80 ns/20 ns, which are faster than for other competitive phase change materials. The observations of fast set/reset rates and two distinct states with a difference in resistance of two to three orders of magnitude appear promising for nonvolatile information storage. Moreover, we found that increasing the Ga concentration can reduce the power consumption and resistance drift; however, too high a level of Ga doping may cause difficulty in achieving the phase transition.

Integrated information storage and transfer with a coherent magnetic device

PubMed Central

Jia, Ning; Banchi, Leonardo; Bayat, Abolfazl; Dong, Guangjiong; Bose, Sougato

2015-01-01

Quantum systems are inherently dissipation-less, making them excellent candidates even for classical information processing. We propose to use an array of large-spin quantum magnets for realizing a device which has two modes of operation: memory and data-bus. While the weakly interacting low-energy levels are used as memory to store classical information (bits), the high-energy levels strongly interact with neighboring magnets and mediate the spatial movement of information through quantum dynamics. Despite the fact that memory and data-bus require different features, which are usually prerogative of different physical systems – well isolation for the memory cells, and strong interactions for the transmission – our proposal avoids the notorious complexity of hybrid structures. The proposed mechanism can be realized with different setups. We specifically show that molecular magnets, as the most promising technology, can implement hundreds of operations within their coherence time, while adatoms on surfaces probed by a scanning tunneling microscope is a future possibility. PMID:26347152

Shared prefetching to reduce execution skew in multi-threaded systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Eichenberger, Alexandre E; Gunnels, John A

Mechanisms are provided for optimizing code to perform prefetching of data into a shared memory of a computing device that is shared by a plurality of threads that execute on the computing device. A memory stream of a portion of code that is shared by the plurality of threads is identified. A set of prefetch instructions is distributed across the plurality of threads. Prefetch instructions are inserted into the instruction sequences of the plurality of threads such that each instruction sequence has a separate sub-portion of the set of prefetch instructions, thereby generating optimized code. Executable code is generated basedmore » on the optimized code and stored in a storage device. The executable code, when executed, performs the prefetches associated with the distributed set of prefetch instructions in a shared manner across the plurality of threads.« less

Improved charge trapping properties by embedded graphene oxide quantum-dots for flash memory application

NASA Astrophysics Data System (ADS)

Jia, Xinlei; Yan, Xiaobing; Wang, Hong; Yang, Tao; Zhou, Zhenyu; Zhao, Jianhui

2018-06-01

In this work, we have investigated two kinds of charge trapping memory devices with Pd/Al2O3/ZnO/SiO2/p-Si and Pd/Al2O3/ZnO/graphene oxide quantum-dots (GOQDs)/ZnO/SiO2/p-Si structure. Compared with the single ZnO sample, the memory window of the ZnO-GOQDs-ZnO sample reaches a larger value (more than doubled) of 2.7 V under the sweeping gate voltage ± 7 V, indicating a better charge storage capability and the significant charge trapping effects by embedding the GOQDs trapping layer. The ZnO-GOQDs-ZnO devices have better date retention properties with the high and low capacitances loss of ˜ 1.1 and ˜ 6.9%, respectively, as well as planar density of the trapped charges of 1.48 × 1012 cm- 2. It is proposed that the GOQDs play an important role in the outstanding memory characteristics due to the deep quantum potential wells and the discrete distribution of the GOQDs. The long date retention time might have resulted from the high potential barrier which suppressed both the back tunneling and the leakage current. Intercalating GOQDs in the memory device is a promising method to realize large memory window, low-power consumption and excellent retention properties.

Unconstrained Recovery Characterization of Shape-Memory Polymer Networks for Cardiovascular Applications

PubMed Central

Yakacki, Christopher M.; Shandas, Robin; Lanning, Craig; Rech, Bryan; Eckstein, Alex; Gall, Ken

2009-01-01

Shape-memory materials have been proposed in biomedical device design due to their ability to facilitate minimally invasive surgery and recover to a predetermined shape in-vivo. Use of the shape-memory effect in polymers is proposed for cardiovascular stent interventions to reduce the catheter size for delivery and offer highly controlled and tailored deployment at body temperature. Shape-memory polymer networks were synthesized via photopolymerization of tert-butyl acrylate and poly (ethylene glycol) dimethacrylate to provide precise control over the thermomechanical response of the system. The free recovery response of the polymer stents at body temperature was studied as a function of glass transition temperature (Tg), crosslink density, geometrical perforation, and deformation temperature, all of which can be independently controlled. Room temperature storage of the stents was shown to be highly dependent on Tg and crosslink density. The pressurized response of the stents is also demonstrated to depend on crosslink density. This polymer system exhibits a wide range of shape-memory and thermomechanical responses to adapt and meet specific needs of minimally invasive cardiovascular devices. PMID:17296222

Avalanche atomic switching in strain engineered Sb2Te3-GeTe interfacial phase-change memory cells

NASA Astrophysics Data System (ADS)

Zhou, Xilin; Behera, Jitendra K.; Lv, Shilong; Wu, Liangcai; Song, Zhitang; Simpson, Robert E.

2017-09-01

By confining phase transitions to the nanoscale interface between two different crystals, interfacial phase change memory heterostructures represent the state of the art for energy efficient data storage. We present the effect of strain engineering on the electrical switching performance of the {{Sb}}2{{Te}}3-GeTe superlattice van der Waals devices. Multiple Ge atoms switching through a two-dimensional Te layer reduces the activation barrier for further atoms to switch; an effect that can be enhanced by biaxial strain. The out-of-plane phonon mode of the GeTe crystal remains active in the superlattice heterostructures. The large in-plane biaxial strain imposed by the {{Sb}}2{{Te}}3 layers on the GeTe layers substantially improves the switching speed, reset energy, and cyclability of the superlattice memory devices. Moreover, carefully controlling residual stress in the layers of {{Sb}}2{{Te}}3-GeTe interfacial phase change memories provides a new degree of freedom to design the properties of functional superlattice structures for memory and photonics applications.

A low switching voltage organic-on-inorganic heterojunction memory element utilizing a conductive polymer fuse on a doped silicon substrate

NASA Astrophysics Data System (ADS)

Smith, Shawn; Forrest, Stephen R.

2004-06-01

We present a simple, nonvolatile, write-once-read-many-times (WORM) memory device utilizing an organic-on-inorganic heterojunction (OI-HJ) diode with a conductive polymer fuse consisting of polyethylene dioxythiophene:polysterene sulfonic acid (PEDOT:PSS) forming one side of the rectifying junction. Current transients are used to change the fuse from a conducting to a nonconducting state to record a logical "1" or "0", while the nonlinearity of the OI-HJ allows for passive matrix memory addressing. The device switches at 2 and 4 V for 50 nm thick PEDOT:PSS films on p-type Si and n-type Si, respectively. This is significantly lower than the switching voltage used in PEDOT:PSS/p-i-n Si memory elements [J. Appl Phys. 94, 7811 (2003)]. The switching results in a permanent reduction of forward-bias current by approximately five orders of magnitude. These results suggest that the OI-HJ structure has potential for use in low-cost passive matrix WORM memories for archival storage applications.

Set processing in a network environment. [data bases and magnetic disks and tapes

NASA Technical Reports Server (NTRS)

Hardgrave, W. T.

1975-01-01

A combination of a local network, a mass storage system, and an autonomous set processor serving as a data/storage management machine is described. Its characteristics include: content-accessible data bases usable from all connected devices; efficient storage/access of large data bases; simple and direct programming with data manipulation and storage management handled by the set processor; simple data base design and entry from source representation to set processor representation with no predefinition necessary; capability available for user sort/order specification; significant reduction in tape/disk pack storage and mounts; flexible environment that allows upgrading hardware/software configuration without causing major interruptions in service; minimal traffic on data communications network; and improved central memory usage on large processors.

Low-Cost, Rapidly Responsive, Controllable, and Reversible Photochromic Hydrogel for Display and Storage.

PubMed

Yang, Yongqi; Guan, Lin; Gao, Guanghui

2018-04-25

Traditional optoelectronic devices without stretchable performance could be limited for substrates with irregular shape. Therefore, it is urgent to explore a new generation of flexible, stretchable, and low-cost intelligent vehicles as visual display and storage devices, such as hydrogels. In the investigation, a novel photochromic hydrogel was developed by introducing the negatively charged ammonium molybdate as a photochromic unit into polyacrylamide via ionic and covalent cross-linking. The hydrogel exhibited excellent properties of low cost, easy preparation, stretchable deformation, fatigue resistance, high transparency, and second-order response to external signals. Moreover, the photochromic and fading process of hydrogels could be precisely controlled and repeated under the irradiation of UV light and exposure of oxygen at different time and temperature. The photochromic hydrogel could be considered applied for artificial intelligence system, wearable healthcare device, and flexible memory device. Therefore, the strategy for designing a soft photochromic material would open a new direction to manufacture flexible and stretchable devices.

Biomolecule nanoparticle-induced nanocomposites with resistive switching nonvolatile memory properties

NASA Astrophysics Data System (ADS)

Ko, Yongmin; Ryu, Sook Won; Cho, Jinhan

2016-04-01

Resistive switching behavior-based memory devices are considered promising candidates for next-generation data storage because of their simple structure configuration, low power consumption, and rapid operating speed. Here, the resistive switching nonvolatile memory properties of Fe2O3 nanocomposite (NC) films prepared from the thermal calcination of layer-by-layer (LbL) assembled ferritin multilayers were successfully investigated. For this study, negatively charged ferritin nanoparticles were alternately deposited onto the Pt-coated Si substrate with positively charged poly(allylamine hydrochloride) (PAH) by solution-based electrostatic LbL assembly, and the formed multilayers were thermally calcinated to obtain a homogeneous transition metal oxide NC film through the elimination of organic components, including the protein shell of ferritin. The formed memory device exhibits a stable ON/OFF current ratio of approximately 103, with nanosecond switching times under an applied external bias. In addition, these reversible switching properties were kept stable during the repeated cycling tests of above 200 cycles and a test period of approximately 105 s under atmosphere. These solution-based approaches can provide a basis for large-area inorganic nanoparticle-based electric devices through the design of bio-nanomaterials at the molecular level.

A compact superconducting nanowire memory element operated by nanowire cryotrons

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; Toomey, Emily A.; Butters, Brenden A.; McCaughan, Adam N.; Dane, Andrew E.; Nam, Sae-Woo; Berggren, Karl K.

2018-07-01

A superconducting loop stores persistent current without any ohmic loss, making it an ideal platform for energy efficient memories. Conventional superconducting memories use an architecture based on Josephson junctions (JJs) and have demonstrated access times less than 10 ps and power dissipation as low as 10-19 J. However, their scalability has been slow to develop due to the challenges in reducing the dimensions of JJs and minimizing the area of the superconducting loops. In addition to the memory itself, complex readout circuits require additional JJs and inductors for coupling signals, increasing the overall area. Here, we have demonstrated a superconducting memory based solely on lithographic nanowires. The small dimensions of the nanowire ensure that the device can be fabricated in a dense area in multiple layers, while the high kinetic inductance makes the loop essentially independent of geometric inductance, allowing it to be scaled down without sacrificing performance. The memory is operated by a group of nanowire cryotrons patterned alongside the storage loop, enabling us to reduce the entire memory cell to 3 μm × 7 μm in our proof-of-concept device. In this work we present the operation principles of a superconducting nanowire memory (nMem) and characterize its bit error rate, speed, and power dissipation.

Achieving the physical limits of the bounded-storage model

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mandayam, Prabha; Wehner, Stephanie; Centre for Quantum Technologies, National University of Singapore, 2 Science Drive 3, 117543 Singapore

2011-02-15

Secure two-party cryptography is possible if the adversary's quantum storage device suffers imperfections. For example, security can be achieved if the adversary can store strictly less then half of the qubits transmitted during the protocol. This special case is known as the bounded-storage model, and it has long been an open question whether security can still be achieved if the adversary's storage were any larger. Here, we answer this question positively and demonstrate a two-party protocol which is secure as long as the adversary cannot store even a small fraction of the transmitted pulses. We also show that security canmore » be extended to a larger class of noisy quantum memories.« less

Evolving Requirements for Magnetic Tape Data Storage Systems

NASA Technical Reports Server (NTRS)

Gniewek, John J.

1996-01-01

Magnetic tape data storage systems have evolved in an environment where the major applications have been back-up/restore, disaster recovery, and long term archive. Coincident with the rapidly improving price-performance of disk storage systems, the prime requirements for tape storage systems have remained: (1) low cost per MB, (2) a data rate balanced to the remaining system components. Little emphasis was given to configuring the technology components to optimize retrieval of the stored data. Emerging new applications such as network attached high speed memory (HSM), and digital libraries, place additional emphasis and requirements on the retrieval of the stored data. It is therefore desirable to consider the system to be defined both by STorage And Retrieval System (STARS) requirements. It is possible to provide comparative performance analysis of different STARS by incorporating parameters related to (1) device characteristics, and (2) application characteristics in combination with queuing theory analysis. Results of these analyses are presented here in the form of response time as a function of system configuration for two different types of devices and for a variety of applications.

Vortical structures for nanomagnetic memory induced by dipole-dipole interaction in monolayer disks

NASA Astrophysics Data System (ADS)

Liu, Zhaosen; Ciftja, Orion; Zhang, Xichao; Zhou, Yan; Ian, Hou

2018-05-01

It is well known that magnetic domains in nanodisks can be used as storage units for computer memory. Using two quantum simulation approaches, we show here that spin vortices on magnetic monolayer nanodisks, which are chirality-free, can be induced by dipole-dipole interaction (DDI) on the disk-plane. When DDI is sufficiently strong, vortical and anti-vortical multi-domain textures can be generated simultaneously. Especially, a spin vortex can be easily created and deleted through either external magnetic or electrical signals, making them ideal to be used in nanomagnetic memory and logical devices. We demonstrate these properties in our simulations.

Multiple switching modes and multiple level states in memristive devices

NASA Astrophysics Data System (ADS)

Miao, Feng; Yang, J. Joshua; Borghetti, Julien; Strachan, John Paul; Zhang, M.-X.; Goldfarb, Ilan; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2011-03-01

As one of the most promising technologies for next generation non-volatile memory, metal oxide based memristive devices have demonstrated great advantages on scalability, operating speed and power consumption. Here we report the observation of multiple switching modes and multiple level states in different memristive systems. The multiple switching modes can be obtained by limiting the current during electroforming, and related transport behaviors, including ionic and electronic motions, are characterized. Such observation can be rationalized by a model of two effective switching layers adjacent to the bottom and top electrodes. Multiple level states, corresponding to different composition of the conducting channel, will also be discussed in the context of multiple-level storage for high density, non-volatile memory applications.

Spacecraft optical disk recorder memory buffer control

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1993-01-01

This paper discusses the research completed under the NASA-ASEE summer faculty fellowship program. The project involves development of an Application Specific Integrated Circuit (ASIC) to be used as a Memory Buffer Controller (MBC) in the Spacecraft Optical Disk System (SODR). The SODR system has demanding capacity and data rate specifications requiring specialized electronics to meet processing demands. The system is being designed to support Gigabit transfer rates with Terabit storage capability. The complete SODR system is designed to exceed the capability of all existing mass storage systems today. The ASIC development for SODR consist of developing a 144 pin CMOS device to perform format conversion and data buffering. The final simulations of the MBC were completed during this summer's NASA-ASEE fellowship along with design preparations for fabrication to be performed by an ASIC manufacturer.

In-situ, In-Memory Stateful Vector Logic Operations based on Voltage Controlled Magnetic Anisotropy.

PubMed

Jaiswal, Akhilesh; Agrawal, Amogh; Roy, Kaushik

2018-04-10

Recently, the exponential increase in compute requirements demanded by emerging applications like artificial intelligence, Internet of things, etc. have rendered the state-of-art von-Neumann machines inefficient in terms of energy and throughput owing to the well-known von-Neumann bottleneck. A promising approach to mitigate the bottleneck is to do computations as close to the memory units as possible. One extreme possibility is to do in-situ Boolean logic computations by using stateful devices. Stateful devices are those that can act both as a compute engine and storage device, simultaneously. We propose such stateful, vector, in-memory operations using voltage controlled magnetic anisotropy (VCMA) effect in magnetic tunnel junctions (MTJ). Our proposal is based on the well known manufacturable 1-transistor - 1-MTJ bit-cell and does not require any modifications in the bit-cell circuit or the magnetic device. Instead, we leverage the very physics of the VCMA effect to enable stateful computations. Specifically, we exploit the voltage asymmetry of the VCMA effect to construct stateful IMP (implication) gate and use the precessional switching dynamics of the VCMA devices to propose a massively parallel NOT operation. Further, we show that other gates like AND, OR, NAND, NOR, NIMP (complement of implication) can be implemented using multi-cycle operations.

Training a Constitutional Dynamic Network for Effector Recognition: Storage, Recall, and Erasing of Information.

PubMed

Holub, Jan; Vantomme, Ghislaine; Lehn, Jean-Marie

2016-09-14

Constitutional dynamic libraries (CDLs) of hydrazones, acylhydrazones, and imines undergo reorganization and adaptation in response to chemical effectors (herein metal cations) via component exchange and selection. Such CDLs can be subjected to training by exposition to given effectors and keep memory of the information stored by interaction with a specific metal ion. The long-term storage of the acquired information into the set of constituents of the system allows for fast recognition on subsequent contacts with the same effector(s). Dynamic networks of constituents were designed to adapt orthogonally to different metal cations by up- and down-regulation of specific constituents in the final distribution. The memory may be erased by component exchange between the constituents so as to regenerate the initial (statistical) distribution. The libraries described represent constitutional dynamic systems capable of acting as information storage molecular devices, in which the presence of components linked by reversible covalent bonds in slow exchange and bearing adequate coordination sites allows for the adaptation to different metal ions by constitutional variation. The system thus performs information storage, recall, and erase processes.

Electronic shift register memory based on molecular electron-transfer reactions

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Jose Nelson; Beratan, David N.

1989-01-01

The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

Memory properties of a Ge nanoring MOS device fabricated by pulsed laser deposition.

PubMed

Ma, Xiying

2008-07-09

The non-volatile charge-storage properties of memory devices with MOS structure based on Ge nanorings have been studied. The two-dimensional Ge nanorings were prepared on a p-Si(100) matrix by means of pulsed laser deposition (PLD) using the droplet technique combined with rapid annealing. Complete planar nanorings with well-defined sharp inner and outer edges were formed via an elastic self-transformation droplet process, which is probably driven by the lateral strain of the Ge/Si layers and the surface tension in the presence of Ar gas. The low leakage current was attributed to the small roughness and the few interface states in the planar Ge nanorings, and also to the effect of Coulomb blockade preventing injection. A significant threshold-voltage shift of 2.5 V was observed when an operating voltage of 8 V was implemented on the device.

Aerospace Ground Equipment for model 4080 sequence programmer. A standard computer terminal is adapted to provide convenient operator to device interface

NASA Technical Reports Server (NTRS)

Nissley, L. E.

1979-01-01

The Aerospace Ground Equipment (AGE) provides an interface between a human operator and a complete spaceborne sequence timing device with a memory storage program. The AGE provides a means for composing, editing, syntax checking, and storing timing device programs. The AGE is implemented with a standard Hewlett-Packard 2649A terminal system and a minimum of special hardware. The terminal's dual tape interface is used to store timing device programs and to read in special AGE operating system software. To compose a new program for the timing device the keyboard is used to fill in a form displayed on the screen.

Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

NASA Astrophysics Data System (ADS)

Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

2016-04-01

The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

A multiplexed light-matter interface for fibre-based quantum networks

PubMed Central

Saglamyurek, Erhan; Grimau Puigibert, Marcelli; Zhou, Qiang; Giner, Lambert; Marsili, Francesco; Verma, Varun B.; Woo Nam, Sae; Oesterling, Lee; Nippa, David; Oblak, Daniel; Tittel, Wolfgang

2016-01-01

Processing and distributing quantum information using photons through fibre-optic or free-space links are essential for building future quantum networks. The scalability needed for such networks can be achieved by employing photonic quantum states that are multiplexed into time and/or frequency, and light-matter interfaces that are able to store and process such states with large time-bandwidth product and multimode capacities. Despite important progress in developing such devices, the demonstration of these capabilities using non-classical light remains challenging. Here, employing the atomic frequency comb quantum memory protocol in a cryogenically cooled erbium-doped optical fibre, we report the quantum storage of heralded single photons at a telecom-wavelength (1.53 μm) with a time-bandwidth product approaching 800. Furthermore, we demonstrate frequency-multimode storage and memory-based spectral-temporal photon manipulation. Notably, our demonstrations rely on fully integrated quantum technologies operating at telecommunication wavelengths. With improved storage efficiency, our light-matter interface may become a useful tool in future quantum networks. PMID:27046076

A multiplexed light-matter interface for fibre-based quantum networks.

PubMed

Saglamyurek, Erhan; Grimau Puigibert, Marcelli; Zhou, Qiang; Giner, Lambert; Marsili, Francesco; Verma, Varun B; Woo Nam, Sae; Oesterling, Lee; Nippa, David; Oblak, Daniel; Tittel, Wolfgang

2016-04-05

Processing and distributing quantum information using photons through fibre-optic or free-space links are essential for building future quantum networks. The scalability needed for such networks can be achieved by employing photonic quantum states that are multiplexed into time and/or frequency, and light-matter interfaces that are able to store and process such states with large time-bandwidth product and multimode capacities. Despite important progress in developing such devices, the demonstration of these capabilities using non-classical light remains challenging. Here, employing the atomic frequency comb quantum memory protocol in a cryogenically cooled erbium-doped optical fibre, we report the quantum storage of heralded single photons at a telecom-wavelength (1.53 μm) with a time-bandwidth product approaching 800. Furthermore, we demonstrate frequency-multimode storage and memory-based spectral-temporal photon manipulation. Notably, our demonstrations rely on fully integrated quantum technologies operating at telecommunication wavelengths. With improved storage efficiency, our light-matter interface may become a useful tool in future quantum networks.

PANDA: A distributed multiprocessor operating system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chubb, P.

1989-01-01

PANDA is a design for a distributed multiprocessor and an operating system. PANDA is designed to allow easy expansion of both hardware and software. As such, the PANDA kernel provides only message passing and memory and process management. The other features needed for the system (device drivers, secondary storage management, etc.) are provided as replaceable user tasks. The thesis presents PANDA's design and implementation, both hardware and software. PANDA uses multiple 68010 processors sharing memory on a VME bus, each such node potentially connected to others via a high speed network. The machine is completely homogeneous: there are no differencesmore » between processors that are detectable by programs running on the machine. A single two-processor node has been constructed. Each processor contains memory management circuits designed to allow processors to share page tables safely. PANDA presents a programmers' model similar to the hardware model: a job is divided into multiple tasks, each having its own address space. Within each task, multiple processes share code and data. Tasks can send messages to each other, and set up virtual circuits between themselves. Peripheral devices such as disc drives are represented within PANDA by tasks. PANDA divides secondary storage into volumes, each volume being accessed by a volume access task, or VAT. All knowledge about the way that data is stored on a disc is kept in its volume's VAT. The design is such that PANDA should provide a useful testbed for file systems and device drivers, as these can be installed without recompiling PANDA itself, and without rebooting the machine.« less

Natural Memory Beyond the Storage Model: Repression, Trauma, and the Construction of a Personal Past

PubMed Central

Axmacher, Nikolai; Do Lam, Anne T. A.; Kessler, Henrik; Fell, Juergen

2010-01-01

Naturally occurring memory processes show features which are difficult to investigate by conventional cognitive neuroscience paradigms. Distortions of memory for problematic contents are described both by psychoanalysis (internal conflicts) and research on post-traumatic stress disorder (PTSD; external traumata). Typically, declarative memory for these contents is impaired – possibly due to repression in the case of internal conflicts or due to dissociation in the case of external traumata – but they continue to exert an unconscious pathological influence: neurotic symptoms or psychosomatic disorders after repression or flashbacks and intrusions in PTSD after dissociation. Several experimental paradigms aim at investigating repression in healthy control subjects. We argue that these paradigms do not adequately operationalize the clinical process of repression, because they rely on an intentional inhibition of random stimuli (suppression). Furthermore, these paradigms ignore that memory distortions due to repression or dissociation are most accurately characterized by a lack of self-referential processing, resulting in an impaired integration of these contents into the self. This aspect of repression and dissociation cannot be captured by the concept of memory as a storage device which is usually employed in the cognitive neurosciences. It can only be assessed within the framework of a constructivist memory concept, according to which successful memory involves a reconstruction of experiences such that they fit into a representation of the self. We suggest several experimental paradigms that allow for the investigation of the neural correlates of repressed memories and trauma-induced memory distortions based on a constructivist memory concept. PMID:21151366

Fidelity criterion for quantum-domain transmission and storage of coherent states beyond the unit-gain constraint.

PubMed

Namiki, Ryo; Koashi, Masato; Imoto, Nobuyuki

2008-09-05

We generalize the experimental success criterion for quantum teleportation (memory) in continuous-variable quantum systems to be suitable for a non-unit-gain condition by considering attenuation (amplification) of the coherent-state amplitude. The new criterion can be used for a nonideal quantum memory and long distance quantum communication as well as quantum devices with amplification process. It is also shown that the framework to measure the average fidelity is capable of detecting all Gaussian channels in the quantum domain.

Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

2016-09-01

Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

Nanophotonic rare-earth quantum memory with optically controlled retrieval.

PubMed

Zhong, Tian; Kindem, Jonathan M; Bartholomew, John G; Rochman, Jake; Craiciu, Ioana; Miyazono, Evan; Bettinelli, Marco; Cavalli, Enrico; Verma, Varun; Nam, Sae Woo; Marsili, Francesco; Shaw, Matthew D; Beyer, Andrew D; Faraon, Andrei

2017-09-29

Optical quantum memories are essential elements in quantum networks for long-distance distribution of quantum entanglement. Scalable development of quantum network nodes requires on-chip qubit storage functionality with control of the readout time. We demonstrate a high-fidelity nanophotonic quantum memory based on a mesoscopic neodymium ensemble coupled to a photonic crystal cavity. The nanocavity enables >95% spin polarization for efficient initialization of the atomic frequency comb memory and time bin-selective readout through an enhanced optical Stark shift of the comb frequencies. Our solid-state memory is integrable with other chip-scale photon source and detector devices for multiplexed quantum and classical information processing at the network nodes. Copyright © 2017 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works.

The Computer and Its Functions; How to Communicate with the Computer.

ERIC Educational Resources Information Center

Ward, Peggy M.

A brief discussion of why it is important for students to be familiar with computers and their functions and a list of some practical applications introduce this two-part paper. Focusing on how the computer works, the first part explains the various components of the computer, different kinds of memory storage devices, disk operating systems, and…

[Wireless device for monitoring the patients with chronic disease].

PubMed

Ciorap, R; Zaharia, D; Corciovă, C; Ungureanu, Monica; Lupu, R; Stan, A

2008-01-01

Remote monitoring of chronic diseases can improve health outcomes and potentially lower health care costs. The high number of the patients, suffering of chronically diseases, who wish to stay at home rather then in a hospital increasing the need of homecare monitoring and have lead to a high demand of wearable medical devices. Also, extended patient monitoring during normal activity has become a very important target. In this paper are presented the design of the wireless monitoring devices based on ultra low power circuits, high storage memory flash, bluetooth communication and the firmware for the management of the monitoring device. The monitoring device is built using an ultra low power microcontroller (MSP430 from Texas Instruments) that offers the advantage of high integration of some circuits. The custom made electronic boards used for biosignal acquisition are also included modules for storage device (SD/MMC card) with FAT32 file system and Bluetooth device for short-range communication used for data transmission between monitoring device and PC or PDA. The work was focused on design and implementation of an ultra low power wearable device able to acquire patient vital parameters, causing minimal discomfort and allowing high mobility. The proposed wireless device could be used as a warning system for monitoring during normal activity.

I/O performance evaluation of a Linux-based network-attached storage device

NASA Astrophysics Data System (ADS)

Sun, Zhaoyan; Dong, Yonggui; Wu, Jinglian; Jia, Huibo; Feng, Guanping

2002-09-01

In a Local Area Network (LAN), clients are permitted to access the files on high-density optical disks via a network server. But the quality of read service offered by the conventional server is not satisfied because of the multiple functions on the server and the overmuch caller. This paper develops a Linux-based Network-Attached Storage (NAS) server. The Operation System (OS), composed of an optimized kernel and a miniaturized file system, is stored in a flash memory. After initialization, the NAS device is connected into the LAN. The administrator and users could configure the access the server through the web page respectively. In order to enhance the quality of access, the management of buffer cache in file system is optimized. Some benchmark programs are peformed to evaluate the I/O performance of the NAS device. Since data recorded in optical disks are usually for reading accesses, our attention is focused on the reading throughput of the device. The experimental results indicate that the I/O performance of our NAS device is excellent.

Nonvolatile memory thin film transistors using CdSe/ZnS quantum dot-poly(methyl methacrylate) composite layer formed by a two-step spin coating technique

NASA Astrophysics Data System (ADS)

Chen, Ying-Chih; Huang, Chun-Yuan; Yu, Hsin-Chieh; Su, Yan-Kuin

2012-08-01

The nonvolatile memory thin film transistors (TFTs) using a core/shell CdSe/ZnS quantum dot (QD)-poly(methyl methacrylate) (PMMA) composite layer as the floating gate have been demonstrated, with the device configuration of n+-Si gate/SiO2 insulator/QD-PMMA composite layer/pentacene channel/Au source-drain being proposed. To achieve the QD-PMMA composite layer, a two-step spin coating technique was used to successively deposit QD-PMMA composite and PMMA on the insulator. After the processes, the variation of crystal quality and surface morphology of the subsequent pentacene films characterized by x-ray diffraction spectra and atomic force microscopy was correlated to the two-step spin coating. The crystalline size of pentacene was improved from 147.9 to 165.2 Å, while the degree of structural disorder was decreased from 4.5% to 3.1% after the adoption of this technique. In pentacene-based TFTs, the improvement of the performance was also significant, besides the appearances of strong memory characteristics. The memory behaviors were attributed to the charge storage/discharge effect in QD-PMMA composite layer. Under the programming and erasing operations, programmable memory devices with the memory window (Δ Vth) = 23 V and long retention time were obtained.

Enhanced organic memory devices (OMEM) with a photochromic perhydro DTE as a transduction layer (Conference Presentation)

NASA Astrophysics Data System (ADS)

Cordes, Sandra; Kranz, Darius; Maibach, Eduard; Kempf, Maxim; Meerholz, Klaus

2016-09-01

In modern electronic systems memory elements are of fundamental importance for data storage. Especially solution-processable nonvolatile organic memories, which are inexpensive and can be manufactured on flexible substrates, are a promising alternative to brittle inorganic devices. Organic photochromic switchable compounds, mostly dithienylethenes (DTEs), are thermally stable, fatigue resistant and can undergo an electrically- or/and photo-induced ring-opening and -closing reaction which results in a change of energy levels. Due to the energetic difference in the highest occupied molecular orbital (HOMO) between the open and closed isomer, the DTE layer can be exploited as a switchable hole injection barrier that controls the electrical current in the diode. We demonstrated that a light-emitting organic memory (LE-OMEM) device with a perfluoro DTE transduction layer can be switched electrically via high current densities pulses and optically by irradiated light, with impressive current ON/OFF Ratios (OOR) of 10Λ2, 10Λ4 respectively. Currently we aim to minimize the barrier of the ON state and maximize the barrier of the OFF state by designing DTE molecules with larger differences in the HOMO energies of the two isomers yielding improved OOR values. By synthesizing perhydro derivates of DTE we achieved molecules with high HOMO levels and large ΔHOMO energies providing OMEM devices with excellent physical properties (OOR 1.4 x higher than perfluoro DTE). Due to the high HOMO level of the perhydro DTE utilization of hole transport layers (HTLs) is not necessary and thus manufacturing of OMEM devices is simplified.

Device applications and structural and optical properties of Indigo - A biodegradable, low-cost organic semiconductor

NASA Astrophysics Data System (ADS)

Wang, Zhengjun; Pisane, Kelly L.; Sierros, Konstantinos; Seehra, Mohindar S.; Korakakis, Dimitris

2015-03-01

Currently, memory devices based on organic materials are attracting great attention due to their simplicity in device structure, mechanical flexibility, potential for scalability, low-cost potential, low-power operation, and large capacity for data storage. In a recent paper from our group, Indigo-based nonvolatile organic write-once-read-many-times (WORM) memory device, consisting of a 100nm layer of indigo sandwiched between an indium tin oxide (ITO) cathode and an Al anode, has been reported. This device is found to be at its low resistance state (ON state) and can be switched to high resistance state (OFF state) by applying a positive bias with ON/OFF current ratio of the device being up to 1.02 × e6. A summary of these results along with the structural and optical properties of indigo powder will be reported. Analysis of x-ray diffraction shows a monoclinic structure with lattice parameters a(b)[c] = 0.924(0.577)[0.1222]nm and β =117° . Optical absorption shows a band edge at 1.70 eV with peak of absorption occurring at 1.90 eV. These results will be interpreted in terms of the HOMO-LUMO bands of Indigo.

Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

NASA Astrophysics Data System (ADS)

Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

2016-07-01

Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

Holographic data storage crystals for the LDEF. [long duration exposure facility

NASA Technical Reports Server (NTRS)

Callen, W. Russell; Gaylord, Thomas K.

1992-01-01

Lithium niobate is a significant electro-optic material, with potential applications in ultra high capacity storage and processing systems. Lithium niobate is the material of choice for many integrated optical devices and holographic mass memory systems. For crystals of lithium niobate were passively exposed to the space environment of the Long Duration Exposure Facility (LDEF). Three of these crystals contained volume holograms. Although the crystals suffered the surface damage characteristics of most of the other optical components on the Georgia Tech tray, the crystals were recovered intact. The holograms were severely degraded because of the lengthy exposure, but the bulk properties are being investigated to determine the spaceworthiness for space data storage and retrieval systems.

Research and implementation on improving I/O performance of streaming media storage system

NASA Astrophysics Data System (ADS)

Lu, Zheng-wu; Wang, Yu-de; Jiang, Guo-song

2008-12-01

In this paper, we study the special requirements of a special storage system: streaming media server, and propose a solution to improve I/O performance of RAID storage system. The solution is suitable for streaming media applications. A streaming media storage subsystem includes the I/O interfaces, RAID arrays, I/O scheduling and device drivers. The solution is implemented on the top of the storage subsystem I/O Interface. Storage subsystem is the performance bottlenecks of a streaming media system, and I/O interface directly affect the performance of the storage subsystem. According to theoretical analysis, 64 KB block-size is most appropriate for streaming media applications. We carry out experiment in detail, and verified that the proper block-size really is 64KB. It is in accordance with our analysis. The experiment results also show that by using DMA controller, efficient memory management technology and mailbox interface design mechanism, streaming media storage system achieves a high-speed data throughput.

13 CFR 121.406 - How does a small business concern qualify to provide manufactured products under small business...

Code of Federal Regulations, 2010 CFR

2010-01-01

... 13 Business Credit and Assistance 1 2010-01-01 2010-01-01 false How does a small business concern qualify to provide manufactured products under small business set-aside or 8(a) contracts? 121.406 Section..., network cards, memory, power supplies, storage devices, and similar items) who install components totaling...

Towards a drift-free multi-level Phase Change Memory

NASA Astrophysics Data System (ADS)

Cinar, Ibrahim; Ozdemir, Servet; Cogulu, Egecan; Gokce, Aisha; Stipe, Barry; Katine, Jordan; Aktas, Gulen; Ozatay, Ozhan

For ultra-high density data storage applications, Phase Change Memory (PCM) is considered a potentially disruptive technology. Yet, the long-term reliability of the logic levels corresponding to the resistance states of a PCM device is an important issue for a stable device operation since the resistance levels drift uncontrollably in time. The underlying mechanism for the resistance drift is considered as the structural relaxation and spontaneous crystallization at elevated temperatures. We fabricated a nanoscale single active layer-phase change memory cell with three resistance levels corresponding to crystalline, amorphous and intermediate states by controlling the current injection site geometry. For the intermediate state and the reset state, the activation energies and the trap distances have been found to be 0.021 eV and 0.235 eV, 1.31 nm and 7.56 nm, respectively. We attribute the ultra-low and weakly temperature dependent drift coefficient of the intermediate state (ν = 0.0016) as opposed to that of the reset state (ν = 0.077) as being due to the dominant contribution of the interfacial defects in electrical transport in the case of the mixed phase. Our results indicate that the engineering of interfacial defects will enable a drift-free multi-level PCM device design.

High performance superconducting devices enabled by three dimensionally ordered nanodots and/or nanorods

DOEpatents

Goyal, Amit

2013-09-17

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

High performance electrical, magnetic, electromagnetic and electrooptical devices enabled by three dimensionally ordered nanodots and nanorods

DOEpatents

Goyal, Amit , Kang; Sukill, [Knoxville, TN

2012-02-21

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

High performance devices enabled by epitaxial, preferentially oriented, nanodots and/or nanorods

DOEpatents

Goyal, Amit [Knoxville, TN

2011-10-11

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic, superconducting and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide-Semiconductor (MOS) Devices

DTIC Science & Technology

1981-06-01

believed to be due to irregularities in the field at the cathode) from occurring. These DEIS EAROMs operate at lower power due to the small injected SiO...memory devices which can store information without an external power supply for long periods of time are currently an area of much interest [1-5]. Current...oppose each other. These require- ments are to get charge into and out of a charge storage layer at low voltages and powers in times on the order of

Computer hardware for radiologists: Part 2.

PubMed

Indrajit, Ik; Alam, A

2010-11-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the 'ever increasing' digital future.

Controllable Switching Filaments Prepared via Tunable and Well-Defined Single Truncated Conical Nanopore Structures for Fast and Scalable SiOx Memory.

PubMed

Kwon, Soonbang; Jang, Seonghoon; Choi, Jae-Wan; Choi, Sanghyeon; Jang, Sukjae; Kim, Tae-Wook; Wang, Gunuk

2017-12-13

The controllability of switching conductive filaments is one of the central issues in the development of reliable metal-oxide resistive memory because the random dynamic nature and formation of the filaments pose an obstacle to desirable switching performance. Here, we introduce a simple and novel approach to control and form a single silicon nanocrystal (Si-NC) filament for use in SiO x memory devices. The filament is formed with a confined vertical nanoscale gap by using a well-defined single vertical truncated conical nanopore (StcNP) structure. The physical dimensions of the Si-NC filaments such as number, size, and length, which have a significant influence on the switching properties, can be simply engineered by the breakdown of an Au wire through different StcNP structures. In particular, we demonstrate that the designed SiO x memory junction with a StcNP of pore depth of ∼75 nm and a bottom diameter of ∼10 nm exhibited a switching speed of up to 6 ns for both set and reset process, significantly faster than reported SiO x memory devices. The device also exhibited a high ON-OFF ratio, multistate storage ability, acceptable endurance, and retention stability. The influence of the physical dimensions of the StcNP on the switching features is discussed based on the simulated temperature profiles of the Au wire and the nanogap size generated inside the StcNP structure during electromigration.

Threshold switching in SiGeAsTeN chalcogenide glass prepared by As ion implantation into sputtered SiGeTeN film

NASA Astrophysics Data System (ADS)

Liu, Guangyu; Wu, Liangcai; Song, Zhitang; Liu, Yan; Li, Tao; Zhang, Sifan; Song, Sannian; Feng, Songlin

2017-12-01

A memory cell composed of a selector device and a storage device is the basic unit of phase change memory. The threshold switching effect, main principle of selectors, is a universal phenomenon in chalcogenide glasses. In this work, we put forward a safe and controllable method to prepare a SiGeAsTeN chalcogenide film by implanting As ions into sputtered SiGeTeN films. For the SiGeAsTeN material, the phase structure maintains the amorphous state, even at high temperature, indicating that no phase transition occurs for this chalcogenide-based material. The electrical test results show that the SiGeAsTeN-based devices exhibit good threshold switching characteristics and the switching voltage decreases with the increasing As content. The decrease in valence alternation pairs, reducing trap state density, may be the physical mechanism for lower switch-on voltage, which makes the SiGeAsTeN material more applicable in selector devices through component optimization.

Operating systems. [of computers

NASA Technical Reports Server (NTRS)

Denning, P. J.; Brown, R. L.

1984-01-01

A counter operating system creates a hierarchy of levels of abstraction, so that at a given level all details concerning lower levels can be ignored. This hierarchical structure separates functions according to their complexity, characteristic time scale, and level of abstraction. The lowest levels include the system's hardware; concepts associated explicitly with the coordination of multiple tasks appear at intermediate levels, which conduct 'primitive processes'. Software semaphore is the mechanism controlling primitive processes that must be synchronized. At higher levels lie, in rising order, the access to the secondary storage devices of a particular machine, a 'virtual memory' scheme for managing the main and secondary memories, communication between processes by way of a mechanism called a 'pipe', access to external input and output devices, and a hierarchy of directories cataloguing the hardware and software objects to which access must be controlled.

A Review on Resistive Switching in High-k Dielectrics: A Nanoscale Point of View Using Conductive Atomic Force Microscope

PubMed Central

Lanza, Mario

2014-01-01

Metal-Insulator-Metal (MIM) structures have raised as the most promising configuration for next generation information storage, leading to great performance and fabrication-friendly Resistive Random Access Memories (RRAM). In these cells, the memory concept is no more based on the charge storage, but on tuning the electrical resistance of the insulating layer by applying electrical stresses to reach a high resistive state (HRS or “0”) and a low resistive state (LRS or “1”), which makes the memory point. Some high-k dielectrics show this unusual property and in the last years high-k based RRAM have been extensively analyzed, especially at the device level. However, as resistance switching (in the most promising cells) is a local phenomenon that takes place in areas of ~100 nm2, the use of characterization tools with high lateral spatial resolution is necessary. In this paper the status of resistive switching in high-k materials is reviewed from a nanoscale point of view by means of conductive atomic force microscope analyses. PMID:28788561

Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density.

PubMed

Al-Haddad, Ahmed; Wang, Chengliang; Qi, Haoyuan; Grote, Fabian; Wen, Liaoyong; Bernhard, Jörg; Vellacheri, Ranjith; Tarish, Samar; Nabi, Ghulam; Kaiser, Ute; Lei, Yong

2016-09-07

Resistive switching random access memories (RRAM) have attracted great scientific and industrial attention for next generation data storage because of their advantages of nonvolatile properties, high density, low power consumption, fast writing/erasing speed, good endurance, and simple and small operation system. Here, by using a template-assisted technique, we demonstrate a three-dimensional highly ordered vertical RRAM device array with density as high as that of the nanopores of the template (10(8)-10(9) cm(-2)), which can also be fabricated in large area. The high crystallinity of the materials, the large contact area and the intimate semiconductor/electrode interface (3 nm interfacial layer) make the ultralow voltage operation (millivolt magnitude) and ultralow power consumption (picowatt) possible. Our procedure for fabrication of the nanodevice arrays in large area can be used for producing many other different materials and such three-dimensional electronic device arrays with the capability to adjust the device densities can be extended to other applications of the next generation nanodevice technology.

Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

PubMed Central

Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

2015-01-01

We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

Electrically and Optically Readable Light Emitting Memories

PubMed Central

Chang, Che-Wei; Tan, Wei-Chun; Lu, Meng-Lin; Pan, Tai-Chun; Yang, Ying-Jay; Chen, Yang-Fang

2014-01-01

Electrochemical metallization memories based on redox-induced resistance switching have been considered as the next-generation electronic storage devices. However, the electronic signals suffer from the interconnect delay and the limited reading speed, which are the major obstacles for memory performance. To solve this problem, here we demonstrate the first attempt of light-emitting memory (LEM) that uses SiO2 as the resistive switching material in tandem with graphene-insulator-semiconductor (GIS) light-emitting diode (LED). By utilizing the excellent properties of graphene, such as high conductivity, high robustness and high transparency, our proposed LEM enables data communication via electronic and optical signals simultaneously. Both the bistable light-emission state and the resistance switching properties can be attributed to the conducting filament mechanism. Moreover, on the analysis of current-voltage characteristics, we further confirm that the electroluminescence signal originates from the carrier tunneling, which is quite different from the standard p-n junction model. We stress here that the newly developed LEM device possesses a simple structure with mature fabrication processes, which integrates advantages of all composed materials and can be extended to many other material systems. It should be able to attract academic interest as well as stimulate industrial application. PMID:24894723

Piezoelectric control of magnetoelectric coupling driven non-volatile memory switching and self cooling effects in FE/FSMA multiferroic heterostructures

NASA Astrophysics Data System (ADS)

Singh, Kirandeep; Kaur, Davinder

2017-02-01

The manipulation of magnetic states and materials' spin degree-of-freedom via a control of an electric (E-) field has been recently pursued to develop magnetoelectric (ME) coupling-driven electronic data storage devices with high read/write endurance, fast dynamic response, and low energy dissipation. One major hurdle for this approach is to develop reliable materials which should be compatible with prevailing silicon (Si)-based complementary metal-oxide-semiconductor (CMOS) technology, simultaneously allowing small voltage for the tuning of magnetization switching. In this regard, multiferroic heterostructures where ferromagnetic (FM) and ferroelectric (FE) layers are alternatively grown on conventional Si substrates are promising as the piezoelectric control of magnetization switching is anticipated to be possible by an E-field. In this work, we study the ferromagnetic shape memory alloys based PbZr0.52Ti0.48O3/Ni50Mn35In15 (PZT/Ni-Mn-In) multiferroic heterostructures, and investigate their potential for CMOS compatible non-volatile magnetic data storage applications. We demonstrate the voltage-impulse controlled nonvolatile, reversible, and bistable magnetization switching at room temperature in Si-integrated PZT/Ni-Mn-In thin film multiferroic heterostructures. We also thoroughly unveil the various intriguing features in these materials, such as E-field tuned ME coupling and magnetocaloric effect, shape memory induced ferroelectric modulation, improved fatigue endurance as well as Refrigeration Capacity (RC). This comprehensive study suggests that these novel materials have a great potential for the development of unconventional nanoscale memory and refrigeration devices with self-cooling effect and enhanced refrigeration efficiency, thus providing a new venue for their applications.

Memory engram storage and retrieval.

PubMed

Tonegawa, Susumu; Pignatelli, Michele; Roy, Dheeraj S; Ryan, Tomás J

2015-12-01

A great deal of experimental investment is directed towards questions regarding the mechanisms of memory storage. Such studies have traditionally been restricted to investigation of the anatomical structures, physiological processes, and molecular pathways necessary for the capacity of memory storage, and have avoided the question of how individual memories are stored in the brain. Memory engram technology allows the labeling and subsequent manipulation of components of specific memory engrams in particular brain regions, and it has been established that cell ensembles labeled by this method are both sufficient and necessary for memory recall. Recent research has employed this technology to probe fundamental questions of memory consolidation, differentiating between mechanisms of memory retrieval from the true neurobiology of memory storage. Copyright © 2015 The Authors. Published by Elsevier Ltd.. All rights reserved.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Direct Writing of Three-Dimensional Macroporous Photonic Crystals on Pressure-Responsive Shape Memory Polymers.

PubMed

Fang, Yin; Ni, Yongliang; Leo, Sin-Yen; Wang, Bingchen; Basile, Vito; Taylor, Curtis; Jiang, Peng

2015-10-28

Here we report a single-step direct writing technology for making three-dimensional (3D) macroporous photonic crystal patterns on a new type of pressure-responsive shape memory polymer (SMP). This approach integrates two disparate fields that do not typically intersect: the well-established templating nanofabrication and shape memory materials. Periodic arrays of polymer macropores templated from self-assembled colloidal crystals are squeezed into disordered arrays in an unusual shape memory "cold" programming process. The recovery of the original macroporous photonic crystal lattices can be triggered by direct writing at ambient conditions using both macroscopic and nanoscopic tools, like a pencil or a nanoindenter. Interestingly, this shape memory disorder-order transition is reversible and the photonic crystal patterns can be erased and regenerated hundreds of times, promising the making of reconfigurable/rewritable nanooptical devices. Quantitative insights into the shape memory recovery of collapsed macropores induced by the lateral shear stresses in direct writing are gained through fundamental investigations on important process parameters, including the tip material, the critical pressure and writing speed for triggering the recovery of the deformed macropores, and the minimal feature size that can be directly written on the SMP membranes. Besides straightforward applications in photonic crystal devices, these smart mechanochromic SMPs that are sensitive to various mechanical stresses could render important technological applications ranging from chromogenic stress and impact sensors to rewritable high-density optical data storage media.

VLSI-based video event triggering for image data compression

NASA Astrophysics Data System (ADS)

Williams, Glenn L.

1994-02-01

Long-duration, on-orbit microgravity experiments require a combination of high resolution and high frame rate video data acquisition. The digitized high-rate video stream presents a difficult data storage problem. Data produced at rates of several hundred million bytes per second may require a total mission video data storage requirement exceeding one terabyte. A NASA-designed, VLSI-based, highly parallel digital state machine generates a digital trigger signal at the onset of a video event. High capacity random access memory storage coupled with newly available fuzzy logic devices permits the monitoring of a video image stream for long term (DC-like) or short term (AC-like) changes caused by spatial translation, dilation, appearance, disappearance, or color change in a video object. Pre-trigger and post-trigger storage techniques are then adaptable to archiving only the significant video images.

VLSI-based Video Event Triggering for Image Data Compression

NASA Technical Reports Server (NTRS)

Williams, Glenn L.

1994-01-01

Long-duration, on-orbit microgravity experiments require a combination of high resolution and high frame rate video data acquisition. The digitized high-rate video stream presents a difficult data storage problem. Data produced at rates of several hundred million bytes per second may require a total mission video data storage requirement exceeding one terabyte. A NASA-designed, VLSI-based, highly parallel digital state machine generates a digital trigger signal at the onset of a video event. High capacity random access memory storage coupled with newly available fuzzy logic devices permits the monitoring of a video image stream for long term (DC-like) or short term (AC-like) changes caused by spatial translation, dilation, appearance, disappearance, or color change in a video object. Pre-trigger and post-trigger storage techniques are then adaptable to archiving only the significant video images.

Flexible Memristive Devices Based on InP/ZnSe/ZnS Core-Multishell Quantum Dot Nanocomposites.

PubMed

Kim, Do Hyeong; Wu, Chaoxing; Park, Dong Hyun; Kim, Woo Kyum; Seo, Hae Woon; Kim, Sang Wook; Kim, Tae Whan

2018-05-02

The effects of the ZnS shell layer on the memory performances of flexible memristive devices based on quantum dots (QDs) with an InP/ZnSe/ZnS core-multishell structure embedded in a poly(methylmethacrylate) layer were investigated. The on/off ratios of the devices based on QDs with an InP/ZnSe core-shell structure and with an InP/ZnSe/ZnS core-multishell structure were approximately 4.2 × 10 2 and 8.5 × 10 3 , respectively, indicative of enhanced charge storage capability in the latter. After bending, the memory characteristics of the memristive devices based on QDs with the InP/ZnSe/ZnS structure were similar to those before bending. In addition, those devices maintained the same on/off ratios for retention time of 1 × 10 4 s, and the number of endurance cycles was above 1 × 10 2 . The reset voltages ranged from -2.3 to -3.1 V, and the set voltages ranged from 1.3 to 2.1 V, indicative of reliable electrical characteristics. Furthermore, the possible operating mechanisms of the devices are presented on the basis of the electron trapping and release mode.

Non-stationary and relaxation phenomena in cavity-assisted quantum memories

NASA Astrophysics Data System (ADS)

Veselkova, N. G.; Sokolov, I. V.

2017-12-01

We investigate the non-stationary and relaxation phenomena in cavity-assisted quantum memories for light. As a storage medium we consider an ensemble of cold atoms with standard Lambda-scheme of working levels. Some theoretical aspects of the problem were treated previously by many authors, and recent experiments stimulate more deep insight into the ultimate ability and limitations of the device. Since quantum memories can be used not only for the storage of quantum information, but also for a substantial manipulation of ensembles of quantum states, the speed of such manipulation and hence the ability to write and retrieve the signals of relatively short duration becomes important. In our research we do not apply the so-called bad cavity limit, and consider the memory operation of the signals whose duration is not much larger than the cavity field lifetime, accounting also for the finite lifetime of atomic coherence. In our paper we present an effective approach that makes it possible to find the non-stationary amplitude and phase behavior of strong classical control field, that matches the desirable time profile of both the envelope and the phase of the retrieved quantized signal. The phase properties of the retrieved quantized signals are of importance for the detection and manipulation of squeezing, entanglement, etc by means of optical mixing and homodyning.

Radiation-Hardened Solid-State Drive

NASA Technical Reports Server (NTRS)

Sheldon, Douglas J.

2010-01-01

A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.

Magnetic skyrmions on a two-lane racetrack

NASA Astrophysics Data System (ADS)

Müller, Jan

2017-02-01

Magnetic skyrmions are particle-like textures in magnetization, characterized by a topological winding number. Nanometer-scale skyrmions have been observed at room temperature in magnetic multilayer structures. The combination of their small size, topological quantization and their efficient electric manipulation makes them interesting candidates for information carriers in high-performance memory devices. A skyrmion racetrack memory has been suggested, in which information is encoded in the distance between skyrmions moving in a one-dimensional nanostrip. Here, I propose an alternative design where skyrmions move in two (or more) parallel lanes and the information is stored in the lane number of each skyrmion. Such a multilane track can be constructed by controlling the height profile of the nanostrip. Repulsive skyrmion-skyrmion interactions in narrow nanostrips guarantee that skyrmions on different lanes cannot pass each other. Current pulses can be used to induce a lane change, and combining these elements provides a robust, efficient design for skyrmion-based storage devices.

Holography and optical information processing; Proceedings of the Soviet-Chinese Joint Seminar, Bishkek, Kyrgyzstan, Sept. 21-26, 1991

NASA Astrophysics Data System (ADS)

Mikaelian, Andrei L.

Attention is given to data storage, devices, architectures, and implementations of optical memory and neural networks; holographic optical elements and computer-generated holograms; holographic display and materials; systems, pattern recognition, interferometry, and applications in optical information processing; and special measurements and devices. Topics discussed include optical immersion as a new way to increase information recording density, systems for data reading from optical disks on the basis of diffractive lenses, a new real-time optical associative memory system, an optical pattern recognition system based on a WTA model of neural networks, phase diffraction grating for the integral transforms of coherent light fields, holographic recording with operated sensitivity and stability in chalcogenide glass layers, a compact optical logic processor, a hybrid optical system for computing invariant moments of images, optical fiber holographic inteferometry, and image transmission through random media in single pass via optical phase conjugation.

Development and Validation of a Spike Detection and Classification Algorithm Aimed at Implementation on Hardware Devices

PubMed Central

Biffi, E.; Ghezzi, D.; Pedrocchi, A.; Ferrigno, G.

2010-01-01

Neurons cultured in vitro on MicroElectrode Array (MEA) devices connect to each other, forming a network. To study electrophysiological activity and long term plasticity effects, long period recording and spike sorter methods are needed. Therefore, on-line and real time analysis, optimization of memory use and data transmission rate improvement become necessary. We developed an algorithm for amplitude-threshold spikes detection, whose performances were verified with (a) statistical analysis on both simulated and real signal and (b) Big O Notation. Moreover, we developed a PCA-hierarchical classifier, evaluated on simulated and real signal. Finally we proposed a spike detection hardware design on FPGA, whose feasibility was verified in terms of CLBs number, memory occupation and temporal requirements; once realized, it will be able to execute on-line detection and real time waveform analysis, reducing data storage problems. PMID:20300592

Short-term memory for figure-ground organization in the visual cortex.

PubMed

O'Herron, Philip; von der Heydt, Rüdiger

2009-03-12

Whether the visual system uses a buffer to store image information and the duration of that storage have been debated intensely in recent psychophysical studies. The long phases of stable perception of reversible figures suggest a memory that persists for seconds. But persistence of similar duration has not been found in signals of the visual cortex. Here, we show that figure-ground signals in the visual cortex can persist for a second or more after the removal of the figure-ground cues. When new figure-ground information is presented, the signals adjust rapidly, but when a figure display is changed to an ambiguous edge display, the signals decay slowly--a behavior that is characteristic of memory devices. Figure-ground signals represent the layout of objects in a scene, and we propose that a short-term memory for object layout is important in providing continuity of perception in the rapid stream of images flooding our eyes.

Microscopic origin of read current noise in TaOx-based resistive switching memory by ultra-low temperature measurement

NASA Astrophysics Data System (ADS)

Pan, Yue; Cai, Yimao; Liu, Yefan; Fang, Yichen; Yu, Muxi; Tan, Shenghu; Huang, Ru

2016-04-01

TaOx-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaOx-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25 K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaOx RRAM devices. A statistical comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaOx RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activation of conduction centers that form the percolation network. At last, a unified model in the framework of hopping conduction is proposed to explain the underlying mechanism of both RTN and ACF noise, which can provide meaningful guidelines for designing noise-immune RRAM devices.

RE-DEFINING THE ROLES OF SENSORS IN OBJECTIVE PHYSICAL ACTIVITY MONITORING

PubMed Central

Chen, Kong Y.; Janz, Kathleen F.; Zhu, Weimo; Brychta, Robert J.

2011-01-01

Background As physical activity researchers are increasingly using objective portable devices, this review describes current state of the technology to assess physical activity, with a focus on specific sensors and sensor properties currently used in monitors and their strengths and weakness. Additional sensors and sensor properties desirable for activity measurement and best practices for users and developers also are discussed. Best Practices We grouped current sensors into three broad categories for objectively measuring physical activity: associated body movement, physiology, and context. Desirable sensor properties for measuring physical activity and the importance of these properties in relationship to specific applications are addressed, and the specific roles of transducers and data acquisition systems within the monitoring devices are defined. Technical advancements in sensors, microcomputer processors, memory storage, batteries, wireless communication, and digital filters have made monitors more usable for subjects (smaller, more stable, and longer running time) and for researchers (less costly, higher time resolution and memory storage, shorter download time, and user-defined data features). Future Directions Users and developers of physical activity monitors should learn about the basic properties of their sensors, such as range, accuracy, precision, while considering the data acquisition/filtering steps that may be critical to data quality and may influence the desirable measurement outcome(s). PMID:22157770

Synthesis and electron storage characteristics of isolated silver nanodots on/embedded in Al 2O 3 gate dielectric

NASA Astrophysics Data System (ADS)

Wang, Q.; Song, Z. T.; Liu, W. L.; Lin, C. L.; Wang, T. H.

2004-05-01

Monolayer-isolated silver (Ag) nanodots with the average diameter down to 7 nm are synthesized on Al 2O 3/Si substrate by vacuum electron-beam evaporation followed by annealing at 400 °C in N 2 ambient. Metal-insulator-silicon (MIS) structures with Ag nanodots embedded in Al 2O 3 gate dielectric are fabricated. Clear electron storage effect with the flatband voltage shift of 1.3 eV is observed through capacitance-conductance and conductance-voltage measurements. Our results demonstrate the feasibility of applying Ag nanodots for nanocrystal floating-gate memory devices.

Paging memory from random access memory to backing storage in a parallel computer

DOEpatents

Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

2013-05-21

Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

A class Hierarchical, object-oriented approach to virtual memory management

NASA Technical Reports Server (NTRS)

Russo, Vincent F.; Campbell, Roy H.; Johnston, Gary M.

1989-01-01

The Choices family of operating systems exploits class hierarchies and object-oriented programming to facilitate the construction of customized operating systems for shared memory and networked multiprocessors. The software is being used in the Tapestry laboratory to study the performance of algorithms, mechanisms, and policies for parallel systems. Described here are the architectural design and class hierarchy of the Choices virtual memory management system. The software and hardware mechanisms and policies of a virtual memory system implement a memory hierarchy that exploits the trade-off between response times and storage capacities. In Choices, the notion of a memory hierarchy is captured by abstract classes. Concrete subclasses of those abstractions implement a virtual address space, segmentation, paging, physical memory management, secondary storage, and remote (that is, networked) storage. Captured in the notion of a memory hierarchy are classes that represent memory objects. These classes provide a storage mechanism that contains encapsulated data and have methods to read or write the memory object. Each of these classes provides specializations to represent the memory hierarchy.

Sptrace

NASA Technical Reports Server (NTRS)

Burleigh, Scott C.

2011-01-01

Sptrace is a general-purpose space utilization tracing system that is conceptually similar to the commercial Purify product used to detect leaks and other memory usage errors. It is designed to monitor space utilization in any sort of heap, i.e., a region of data storage on some device (nominally memory; possibly shared and possibly persistent) with a flat address space. This software can trace usage of shared and/or non-volatile storage in addition to private RAM (random access memory). Sptrace is implemented as a set of C function calls that are invoked from within the software that is being examined. The function calls fall into two broad classes: (1) functions that are embedded within the heap management software [e.g., JPL's SDR (Simple Data Recorder) and PSM (Personal Space Management) systems] to enable heap usage analysis by populating a virtual time-sequenced log of usage activity, and (2) reporting functions that are embedded within the application program whose behavior is suspect. For ease of use, these functions may be wrapped privately inside public functions offered by the heap management software. Sptrace can be used for VxWorks or RTEMS realtime systems as easily as for Linux or OS/X systems.

The Relationship between Processing and Storage in Working Memory Span: Not Two Sides of the Same Coin

ERIC Educational Resources Information Center

Maehara, Yukio; Saito, Satoru

2007-01-01

In working memory (WM) span tests, participants maintain memory items while performing processing tasks. In this study, we examined the impact of task processing requirements on memory-storage activities, looking at the stimulus order effect and the impact of storage requirements on processing activities, testing the processing time effect in WM…

High-Density, High-Bandwidth, Multilevel Holographic Memory

NASA Technical Reports Server (NTRS)

Chao, Tien-Hsin

2008-01-01

A proposed holographic memory system would be capable of storing data at unprecedentedly high density, and its data transfer performance in both reading and writing would be characterized by exceptionally high bandwidth. The capabilities of the proposed system would greatly exceed even those of a state-of-the art memory system, based on binary holograms (in which each pixel value represents 0 or 1), that can hold .1 terabyte of data and can support a reading or writing rate as high as 1 Gb/s. The storage capacity of the state-of-theart system cannot be increased without also increasing the volume and mass of the system. However, in principle, the storage capacity could be increased greatly, without significantly increasing the volume and mass, if multilevel holograms were used instead of binary holograms. For example, a 3-bit (8-level) hologram could store 8 terabytes, or an 8-bit (256-level) hologram could store 256 terabytes, in a system having little or no more size and mass than does the state-of-the-art 1-terabyte binary holographic memory. The proposed system would utilize multilevel holograms. The system would include lasers, imaging lenses and other beam-forming optics, a block photorefractive crystal wherein the holograms would be formed, and two multilevel spatial light modulators in the form of commercially available deformable-mirror-device spatial light modulators (DMDSLMs) made for use in high speed input conversion of data up to 12 bits. For readout, the system would also include two arrays of complementary metal oxide/semiconductor (CMOS) photodetectors matching the spatial light modulators. The system would further include a reference-beam sterring device (equivalent of a scanning mirror), containing no sliding parts, that could be either a liquid-crystal phased-array device or a microscopic mirror actuated by a high-speed microelectromechanical system. Time-multiplexing and the multilevel nature of the DMDSLM would be exploited to enable writing and reading of multilevel holograms. The DMDSLM would also enable transfer of data at a rate of 7.6 Gb/s or perhaps somewhat higher.

2006 NRL Review

DTIC Science & Technology

2006-01-01

cool , the ink is solid and does not flow. When the cantilever is heated , the ink melts and flows from the tip onto the surface. Mov­ ing the tip...IBM for use in the “Millipede” memory storage system. Thermal cantilevers may be designed to give rapid heating (1 to 20 µs) and cooling (1 to 50 µs...ability of combin- ing reconfigurable hardware devices with optimization software capable of executing real-time autonomous reconfiguration opens up a

Efficient micromagnetics for magnetic storage devices

NASA Astrophysics Data System (ADS)

Escobar Acevedo, Marco Antonio

Micromagnetics is an important component for advancing the magnetic nanostructures understanding and design. Numerous existing and prospective magnetic devices rely on micromagnetic analysis, these include hard disk drives, magnetic sensors, memories, microwave generators, and magnetic logic. The ability to examine, describe, and predict the magnetic behavior, and macroscopic properties of nanoscale magnetic systems is essential for improving the existing devices, for progressing in their understanding, and for enabling new technologies. This dissertation describes efficient micromagnetic methods as required for magnetic storage analysis. Their performance and accuracy is demonstrated by studying realistic, complex, and relevant micromagnetic system case studies. An efficient methodology for dynamic micromagnetics in large scale simulations is used to study the writing process in a full scale model of a magnetic write head. An efficient scheme, tailored for micromagnetics, to find the minimum energy state on a magnetic system is presented. This scheme can be used to calculate hysteresis loops. An efficient scheme, tailored for micromagnetics, to find the minimum energy path between two stable states on a magnetic system is presented. This minimum energy path is intimately related to the thermal stability.

Holographic storage of biphoton entanglement.

PubMed

Dai, Han-Ning; Zhang, Han; Yang, Sheng-Jun; Zhao, Tian-Ming; Rui, Jun; Deng, You-Jin; Li, Li; Liu, Nai-Le; Chen, Shuai; Bao, Xiao-Hui; Jin, Xian-Min; Zhao, Bo; Pan, Jian-Wei

2012-05-25

Coherent and reversible storage of multiphoton entanglement with a multimode quantum memory is essential for scalable all-optical quantum information processing. Although a single photon has been successfully stored in different quantum systems, storage of multiphoton entanglement remains challenging because of the critical requirement for coherent control of the photonic entanglement source, multimode quantum memory, and quantum interface between them. Here we demonstrate a coherent and reversible storage of biphoton Bell-type entanglement with a holographic multimode atomic-ensemble-based quantum memory. The retrieved biphoton entanglement violates the Bell inequality for 1 μs storage time and a memory-process fidelity of 98% is demonstrated by quantum state tomography.

Conductive bridging random access memory—materials, devices and applications

NASA Astrophysics Data System (ADS)

Kozicki, Michael N.; Barnaby, Hugh J.

2016-11-01

We present a review and primer on the subject of conductive bridging random access memory (CBRAM), a metal ion-based resistive switching technology, in the context of current research and the near-term requirements of the electronics industry in ultra-low energy devices and new computing paradigms. We include extensive discussions of the materials involved, the underlying physics and electrochemistry, the critical roles of ion transport and electrode reactions in conducting filament formation and device switching, and the electrical characteristics of the devices. Two general cation material systems are given—a fast ion chacogenide electrolyte and a lower ion mobility oxide ion conductor, and numerical examples are offered to enhance understanding of the operation of devices based on these. The effect of device conditioning on the activation energy for ion transport and consequent switching speed is discussed, as well as the mechanisms involved in the removal of the conducting bridge. The morphology of the filament and how this could be influenced by the solid electrolyte structure is described, and the electrical characteristics of filaments with atomic-scale constrictions are discussed. Consideration is also given to the thermal and mechanical environments within the devices. Finite element and compact modelling illustrations are given and aspects of CBRAM storage elements in memory circuits and arrays are included. Considerable emphasis is placed on the effects of ionizing radiation on CBRAM since this is important in various high reliability applications, and the potential uses of the devices in reconfigurable logic and neuromorphic systems is also discussed.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu, H. X.; Zhang, T.; Wang, R. X.

A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfO{sub x} film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfO{sub x} matrix. Pt/Ni-NCs embedded HfO{sub x}/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 10{sup 12} electrons/cm{sup 2}, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 10{sup 4} cycles and excellent retention performance of 10{sup 5} s, fulfilling themore » requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.« less

Application of a simple cerebellar model to geologic surface mapping

USGS Publications Warehouse

Hagens, A.; Doveton, J.H.

1991-01-01

Neurophysiological research into the structure and function of the cerebellum has inspired computational models that simulate information processing associated with coordination and motor movement. The cerebellar model arithmetic computer (CMAC) has a design structure which makes it readily applicable as an automated mapping device that "senses" a surface, based on a sample of discrete observations of surface elevation. The model operates as an iterative learning process, where cell weights are continuously modified by feedback to improve surface representation. The storage requirements are substantially less than those of a conventional memory allocation, and the model is extended easily to mapping in multidimensional space, where the memory savings are even greater. ?? 1991.

Organization and Memory in Adulthood.

ERIC Educational Resources Information Center

Hultsch, David F.

This paper discusses organizational processes and memory in general and organizational processes and adult age differences in memory in particular. The simplest analysis of memory is to divide the process into two parts: storage and retrieval. Studies show that the limitation of memory lies primarily in retrieval rather than storage. Organization…

The magical number 4 in short-term memory: a reconsideration of mental storage capacity.

PubMed

Cowan, N

2001-02-01

Miller (1956) summarized evidence that people can remember about seven chunks in short-term memory (STM) tasks. However, that number was meant more as a rough estimate and a rhetorical device than as a real capacity limit. Others have since suggested that there is a more precise capacity limit, but that it is only three to five chunks. The present target article brings together a wide variety of data on capacity limits suggesting that the smaller capacity limit is real. Capacity limits will be useful in analyses of information processing only if the boundary conditions for observing them can be carefully described. Four basic conditions in which chunks can be identified and capacity limits can accordingly be observed are: (1) when information overload limits chunks to individual stimulus items, (2) when other steps are taken specifically to block the recording of stimulus items into larger chunks, (3) in performance discontinuities caused by the capacity limit, and (4) in various indirect effects of the capacity limit. Under these conditions, rehearsal and long-term memory cannot be used to combine stimulus items into chunks of an unknown size; nor can storage mechanisms that are not capacity-limited, such as sensory memory, allow the capacity-limited storage mechanism to be refilled during recall. A single, central capacity limit averaging about four chunks is implicated along with other, noncapacity-limited sources. The pure STM capacity limit expressed in chunks is distinguished from compound STM limits obtained when the number of separately held chunks is unclear. Reasons why pure capacity estimates fall within a narrow range are discussed and a capacity limit for the focus of attention is proposed.

Analysis on applicable error-correcting code strength of storage class memory and NAND flash in hybrid storage

NASA Astrophysics Data System (ADS)

Matsui, Chihiro; Kinoshita, Reika; Takeuchi, Ken

2018-04-01

A hybrid of storage class memory (SCM) and NAND flash is a promising technology for high performance storage. Error correction is inevitable on SCM and NAND flash because their bit error rate (BER) increases with write/erase (W/E) cycles, data retention, and program/read disturb. In addition, scaling and multi-level cell technologies increase BER. However, error-correcting code (ECC) degrades storage performance because of extra memory reading and encoding/decoding time. Therefore, applicable ECC strength of SCM and NAND flash is evaluated independently by fixing ECC strength of one memory in the hybrid storage. As a result, weak BCH ECC with small correctable bit is recommended for the hybrid storage with large SCM capacity because SCM is accessed frequently. In contrast, strong and long-latency LDPC ECC can be applied to NAND flash in the hybrid storage with large SCM capacity because large-capacity SCM improves the storage performance.

Coherent storage of temporally multimode light using a spin-wave atomic frequency comb memory

NASA Astrophysics Data System (ADS)

Gündoǧan, M.; Mazzera, M.; Ledingham, P. M.; Cristiani, M.; de Riedmatten, H.

2013-04-01

We report on the coherent and multi-temporal mode storage of light using the full atomic frequency comb memory scheme. The scheme involves the transfer of optical atomic excitations in Pr3+:Y2SiO5 to spin waves in hyperfine levels using strong single-frequency transfer pulses. Using this scheme, a total of five temporal modes are stored and recalled on-demand from the memory. The coherence of the storage and retrieval is characterized using a time-bin interference measurement resulting in visibilities higher than 80%, independent of the storage time. This coherent and multimode spin-wave memory is promising as a quantum memory for light.

A Fault-Tolerant Radiation-Robust Mass Storage Concept for Highly Scaled Flash Memory

NASA Astrophysics Data System (ADS)

Fuchs, Cristian M.; Trinitis, Carsten; Appel, Nicolas; Langer, Martin

2015-09-01

Future spacemissions will require vast amounts of data to be stored and processed aboard spacecraft. While satisfying operational mission requirements, storage systems must guarantee data integrity and recover damaged data throughout the mission. NAND-flash memories have become popular for space-borne high performance mass memory scenarios, though future storage concepts will rely upon highly scaled flash or other memory technologies. With modern flash memory, single bit erasure coding and RAID based concepts are insufficient. Thus, a fully run-time configurable, high performance, dependable storage concept, requiring a minimal set of logic or software. The solution is based on composite erasure coding and can be adjusted for altered mission duration or changing environmental conditions.

Development of a software interface for optical disk archival storage for a new life sciences flight experiments computer

NASA Technical Reports Server (NTRS)

Bartram, Peter N.

1989-01-01

The current Life Sciences Laboratory Equipment (LSLE) microcomputer for life sciences experiment data acquisition is now obsolete. Among the weaknesses of the current microcomputer are small memory size, relatively slow analog data sampling rates, and the lack of a bulk data storage device. While life science investigators normally prefer data to be transmitted to Earth as it is taken, this is not always possible. No down-link exists for experiments performed in the Shuttle middeck region. One important aspect of a replacement microcomputer is provision for in-flight storage of experimental data. The Write Once, Read Many (WORM) optical disk was studied because of its high storage density, data integrity, and the availability of a space-qualified unit. In keeping with the goals for a replacement microcomputer based upon commercially available components and standard interfaces, the system studied includes a Small Computer System Interface (SCSI) for interfacing the WORM drive. The system itself is designed around the STD bus, using readily available boards. Configurations examined were: (1) master processor board and slave processor board with the SCSI interface; (2) master processor with SCSI interface; (3) master processor with SCSI and Direct Memory Access (DMA); (4) master processor controlling a separate STD bus SCSI board; and (5) master processor controlling a separate STD bus SCSI board with DMA.

TMS-induced neural noise in sensory cortex interferes with short-term memory storage in prefrontal cortex.

PubMed

Bancroft, Tyler D; Hogeveen, Jeremy; Hockley, William E; Servos, Philip

2014-01-01

In a previous study, Harris et al. (2002) found disruption of vibrotactile short-term memory after applying single-pulse transcranial magnetic stimulation (TMS) to primary somatosensory cortex (SI) early in the maintenance period, and suggested that this demonstrated a role for SI in vibrotactile memory storage. While such a role is compatible with recent suggestions that sensory cortex is the storage substrate for working memory, it stands in contrast to a relatively large body of evidence from human EEG and single-cell recording in primates that instead points to prefrontal cortex as the storage substrate for vibrotactile memory. In the present study, we use computational methods to demonstrate how Harris et al.'s results can be reproduced by TMS-induced activity in sensory cortex and subsequent feedforward interference with memory traces stored in prefrontal cortex, thereby reconciling discordant findings in the tactile memory literature.

Brain Region-Specific Activity Patterns after Recent or Remote Memory Retrieval of Auditory Conditioned Fear

ERIC Educational Resources Information Center

Kwon, Jeong-Tae; Jhang, Jinho; Kim, Hyung-Su; Lee, Sujin; Han, Jin-Hee

2012-01-01

Memory is thought to be sparsely encoded throughout multiple brain regions forming unique memory trace. Although evidence has established that the amygdala is a key brain site for memory storage and retrieval of auditory conditioned fear memory, it remains elusive whether the auditory brain regions may be involved in fear memory storage or…

Microscopic origin of read current noise in TaO{sub x}-based resistive switching memory by ultra-low temperature measurement

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pan, Yue; Cai, Yimao, E-mail: caiyimao@pku.edu.cn; Liu, Yefan

TaO{sub x}-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaO{sub x}-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25 K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaO{sub x} RRAM devices. A statisticalmore » comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaO{sub x} RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activation of conduction centers that form the percolation network. At last, a unified model in the framework of hopping conduction is proposed to explain the underlying mechanism of both RTN and ACF noise, which can provide meaningful guidelines for designing noise-immune RRAM devices.« less

The past, the future and the biology of memory storage.

PubMed Central

Kandel, E R; Pittenger, C

1999-01-01

We here briefly review a century of accomplishments in studying memory storage and delineate the two major questions that have dominated thinking in this area: the systems question of memory, which concerns where in the brain storage occurs; and the molecular question of memory, which concerns the mechanisms whereby memories are stored and maintained. We go on to consider the themes that memory research may be able to address in the 21st century. Finally, we reflect on the clinical and societal import of our increasing understanding of the mechanisms of memory, discussing possible therapeutic approaches to diseases that manifest with disruptions of learning and possible ethical implication of the ability, which is on the horizon, to ameliorate or even enhance human memory. PMID:10670023

Associative Memory Synthesis, Performance, Storage Capacity And Updating: New Heteroassociative Memory Results

NASA Astrophysics Data System (ADS)

Casasent, David; Telfer, Brian

1988-02-01

The storage capacity, noise performance, and synthesis of associative memories for image analysis are considered. Associative memory synthesis is shown to be very similar to that of linear discriminant functions used in pattern recognition. These lead to new associative memories and new associative memory synthesis and recollection vector encodings. Heteroassociative memories are emphasized in this paper, rather than autoassociative memories, since heteroassociative memories provide scene analysis decisions, rather than merely enhanced output images. The analysis of heteroassociative memories has been given little attention. Heteroassociative memory performance and storage capacity are shown to be quite different from those of autoassociative memories, with much more dependence on the recollection vectors used and less dependence on M/N. This allows several different and preferable synthesis techniques to be considered for associative memories. These new associative memory synthesis techniques and new techniques to update associative memories are included. We also introduce a new SNR performance measure that is preferable to conventional noise standard deviation ratios.

Switching mechanism transition induced by annealing treatment in nonvolatile Cu/ZnO/Cu/ZnO/Pt resistive memory: From carrier trapping/detrapping to electrochemical metallization

NASA Astrophysics Data System (ADS)

Yang, Y. C.; Pan, F.; Zeng, F.; Liu, M.

2009-12-01

ZnO/Cu/ZnO trilayer films sandwiched between Cu and Pt electrodes were prepared for nonvolatile resistive memory applications. These structures show resistance switching under electrical bias both before and after a rapid thermal annealing (RTA) treatment, while it is found that the resistive switching effects in the two cases exhibit distinct characteristics. Compared with the as-fabricated device, the memory cell after RTA demonstrates remarkable device parameter improvements including lower threshold voltages, lower write current, and higher Roff/Ron ratio. A high-voltage forming process is avoided in the annealed device as well. Furthermore, the RTA treatment has triggered a switching mechanism transition from a carrier trapping/detrapping type to an electrochemical-redox-reaction-controlled conductive filament formation/rupture process, as indicated by different features in current-voltage characteristics. Both scanning electron microscopy observations and Auger electron spectroscopy depth profiles reveal that the Cu charge trapping layer in ZnO/Cu/ZnO disperses uniformly into the storage medium after RTA, while x-ray diffraction and x-ray photoelectron spectroscopy analyses demonstrate that the Cu atoms have lost electrons to become Cu2+ ions after dispersion. The above experimental facts indicate that the altered status of Cu in the ZnO/Cu/ZnO trilayer films during RTA treatment should be responsible for the switching mechanism transition. This study is envisioned to open the door for understanding the interrelation between different mechanisms that currently exist in the field of resistive memories.

PLL jitter reduction by utilizing a ferroelectric capacitor as a VCO timing element.

PubMed

Pauls, Greg; Kalkur, Thottam S

2007-06-01

Ferroelectric capacitors have steadily been integrated into semiconductor processes due to their potential as storage elements within memory devices. Polarization reversal within ferroelectric capacitors creates a high nonlinear dielectric constant along with a hysteresis profile. Due to these attributes, a phase-locked loop (PLL), when based on a ferroelectric capacitor, has the advantage of reduced cycle-to-cycle jitter. PLLs based on ferroelectric capacitors represent a new research area for reduction of oscillator jitter.

Short-Term Memory for Figure-Ground Organization in the Visual Cortex

PubMed Central

O’Herron, Philip; von der Heydt, Rüdiger

2009-01-01

Summary Whether the visual system uses a buffer to store image information and the duration of that storage have been debated intensely in recent psychophysical studies. The long phases of stable perception of reversible figures suggest a memory that persists for seconds. But persistence of similar duration has not been found in signals of the visual cortex. Here we show that figure-ground signals in the visual cortex can persist for a second or more after the removal of the figure-ground cues. When new figure-ground information is presented, the signals adjust rapidly, but when a figure display is changed to an ambiguous edge display, the signals decay slowly – a behavior that is characteristic of memory devices. Figure-ground signals represent the layout of objects in a scene, and we propose that a short-term memory for object layout is important in providing continuity of perception in the rapid stream of images flooding our eyes. PMID:19285475

Large-area, flexible imaging arrays constructed by light-charge organic memories

PubMed Central

Zhang, Lei; Wu, Ti; Guo, Yunlong; Zhao, Yan; Sun, Xiangnan; Wen, Yugeng; Yu, Gui; Liu, Yunqi

2013-01-01

Existing organic imaging circuits, which offer attractive benefits of light weight, low cost and flexibility, are exclusively based on phototransistor or photodiode arrays. One shortcoming of these photo-sensors is that the light signal should keep invariant throughout the whole pixel-addressing and reading process. As a feasible solution, we synthesized a new charge storage molecule and embedded it into a device, which we call light-charge organic memory (LCOM). In LCOM, the functionalities of photo-sensor and non-volatile memory are integrated. Thanks to the deliberate engineering of electronic structure and self-organization process at the interface, 92% of the stored charges, which are linearly controlled by the quantity of light, retain after 20000 s. The stored charges can also be non-destructively read and erased by a simple voltage program. These results pave the way to large-area, flexible imaging circuits and demonstrate a bright future of small molecular materials in non-volatile memory. PMID:23326636

Iconic Memories Die a Sudden Death.

PubMed

Pratte, Michael S

2018-06-01

Iconic memory is characterized by its large storage capacity and brief storage duration, whereas visual working memory is characterized by its small storage capacity. The limited information stored in working memory is often modeled as an all-or-none process in which studied information is either successfully stored or lost completely. This view raises a simple question: If almost all viewed information is stored in iconic memory, yet one second later most of it is completely absent from working memory, what happened to it? Here, I characterized how the precision and capacity of iconic memory changed over time and observed a clear dissociation: Iconic memory suffered from a complete loss of visual items, while the precision of items retained in memory was only marginally affected by the passage of time. These results provide new evidence for the discrete-capacity view of working memory and a new characterization of iconic memory decay.

Memory Is Not Only about Storage.

ERIC Educational Resources Information Center

Huber, Kay L.

1993-01-01

The Atkinson-Shiffrin model of memory has three components: sensory, short term, and long term. Each memory process (such as encoding, storage, and retrieval) can be linked to specific teaching and learning strategies. (SK)

Statistical Description of Associative Memory

NASA Astrophysics Data System (ADS)

Samengo, Inés

2003-03-01

The storage of memories, in the brain, induces some kind of modification in the structural and functional properties of a neural network. Here, a few neuropsychological and neurophysiological experiments are reviewed, suggesting that the plastic changes taking place during memory storage are governed, among other things, by the correlations in the activity of a set of neurons. The Hopfield model is briefly described, showing the way the methods of statistical physics can be useful to describe the storage and retrieval of memories.

A comprehensive approach to decipher biological computation to achieve next generation high-performance exascale computing.

DOE Office of Scientific and Technical Information (OSTI.GOV)

James, Conrad D.; Schiess, Adrian B.; Howell, Jamie

2013-10-01

The human brain (volume=1200cm3) consumes 20W and is capable of performing > 10^16 operations/s. Current supercomputer technology has reached 1015 operations/s, yet it requires 1500m^3 and 3MW, giving the brain a 10^12 advantage in operations/s/W/cm^3. Thus, to reach exascale computation, two achievements are required: 1) improved understanding of computation in biological tissue, and 2) a paradigm shift towards neuromorphic computing where hardware circuits mimic properties of neural tissue. To address 1), we will interrogate corticostriatal networks in mouse brain tissue slices, specifically with regard to their frequency filtering capabilities as a function of input stimulus. To address 2), we willmore » instantiate biological computing characteristics such as multi-bit storage into hardware devices with future computational and memory applications. Resistive memory devices will be modeled, designed, and fabricated in the MESA facility in consultation with our internal and external collaborators.« less

Nanoscale cross-point diode array accessing embedded high density PCM

NASA Astrophysics Data System (ADS)

Wang, Heng; Liu, Yan; Liu, Bo; Gao, Dan; Xu, Zhen; Zhan, Yipeng; Song, Zhitang; Feng, Songlin

2017-08-01

The main bottlenecks in the development of current embedded phase change memory (PCM) technology are the current density and data storage density. In this paper, we present a PCM with 4F2 cross-point diode selector and blade-type bottom electrode contact (BEC). A blade TiN BEC with a cross-sectional area of 630 nm2 (10 nm × 63 nm) reduces the reset current down to about 750 μA. The optimized diode array could supply this 750 μA reset current at about 1.7 V and low off-current 1 × 10-4 μA at about -5.05 V. The on-off ratio of this device is 7.5 × 106. The proposed nanoscale PCM device simultaneously exhibits an operation voltage as low as 3 V and a high density drive current with an ultra small cell size of 4F2 (108 nm × 108 nm). Over 106 cycling endurance properties guarantee that it can work effectively on the embedded memory.

Artificial cognitive memory—changing from density driven to functionality driven

NASA Astrophysics Data System (ADS)

Shi, L. P.; Yi, K. J.; Ramanathan, K.; Zhao, R.; Ning, N.; Ding, D.; Chong, T. C.

2011-03-01

Increasing density based on bit size reduction is currently a main driving force for the development of data storage technologies. However, it is expected that all of the current available storage technologies might approach their physical limits in around 15 to 20 years due to miniaturization. To further advance the storage technologies, it is required to explore a new development trend that is different from density driven. One possible direction is to derive insights from biological counterparts. Unlike physical memories that have a single function of data storage, human memory is versatile. It contributes to functions of data storage, information processing, and most importantly, cognitive functions such as adaptation, learning, perception, knowledge generation, etc. In this paper, a brief review of current data storage technologies are presented, followed by discussions of future storage technology development trend. We expect that the driving force will evolve from density to functionality, and new memory modules associated with additional functions other than only data storage will appear. As an initial step toward building a future generation memory technology, we propose Artificial Cognitive Memory (ACM), a memory based intelligent system. We also present the characteristics of ACM, new technologies that can be used to develop ACM components such as bioinspired element cells (silicon, memristor, phase change, etc.), and possible methodologies to construct a biologically inspired hierarchical system.

Rethinking the connection between working memory and language impairment.

PubMed

Archibald, Lisa M D; Harder Griebeling, Katherine

2016-05-01

Working memory deficits have been found for children with specific language impairment (SLI) on tasks imposing increasing short-term memory load with or without additional, consistent (and simple) processing load. To examine the processing function of working memory in children with low language (LL) by employing tasks imposing increasing processing loads with constant storage demands individually adjusted based on each participant's short-term memory capacity. School-age groups with LL (n = 17) and typical language with either average (n = 28) or above-average nonverbal intelligence (n = 15) completed complex working memory-span tasks varying processing load while keeping storage demands constant, varying storage demands while keeping processing load constant, simple storage-span tasks, and measures of language and nonverbal intelligence. Teachers completed questionnaires about cognition and learning. Significantly lower scores were found for the LL than either matched group on storage-based tasks, but no group differences were found on the tasks varying processing load. Teachers' ratings of oral expression and mathematics abilities discriminated those who did or did not complete the most challenging cognitive tasks. The results implicate a deficit in the phonological storage but not in the central executive component of working memory for children with LL. Teacher ratings may reveal personality traits related to perseverance of effort in cognitive research. © 2015 Royal College of Speech and Language Therapists.

Solid State Spin-Wave Quantum Memory for Time-Bin Qubits.

PubMed

Gündoğan, Mustafa; Ledingham, Patrick M; Kutluer, Kutlu; Mazzera, Margherita; de Riedmatten, Hugues

2015-06-12

We demonstrate the first solid-state spin-wave optical quantum memory with on-demand read-out. Using the full atomic frequency comb scheme in a Pr(3+):Y2SiO5 crystal, we store weak coherent pulses at the single-photon level with a signal-to-noise ratio >10. Narrow-band spectral filtering based on spectral hole burning in a second Pr(3+):Y2SiO5 crystal is used to filter out the excess noise created by control pulses to reach an unconditional noise level of (2.0±0.3)×10(-3) photons per pulse. We also report spin-wave storage of photonic time-bin qubits with conditional fidelities higher than achievable by a measure and prepare strategy, demonstrating that the spin-wave memory operates in the quantum regime. This makes our device the first demonstration of a quantum memory for time-bin qubits, with on-demand read-out of the stored quantum information. These results represent an important step for the use of solid-state quantum memories in scalable quantum networks.

Quasi-perfect FIFO: Synchronous or asynchronous with application in controller design for the UNICON laser memory. [digital memory and buffer storage

NASA Technical Reports Server (NTRS)

Lim, R. S.

1974-01-01

The first-in-first-out memory buffer (FIFO), is an elastic digital memory whose main application is in data buffering between devices operating at different rates. Data written into the top is moved autonomously down toward the bottom of the FIFO to the lowest unoccupied location, and data read from the bottom of the FIFO will cause data from the top to move autonomously down toward the bottom. The FIFO is available in MOS LSI asynchronous form with data rate in the 1 MHz region. The FIFO described yields a simple high-speed iterative implementation, either synchronous of asynchronous. Because of this simple iterative structure, the FIFO is expandable in both number of words and bits per word, and it is attractive from the viewpoint of integrated-circuit production. For the synchronous FIFO, a model was built and successfully used in the controller for the UNICON laser memory. For the asynchronous FIFO, a model was built and also successfully used in a high-performance magnetic tape controller.

Storing and managing information artifacts collected by information analysts using a computing device

DOEpatents

Pike, William A; Riensche, Roderick M; Best, Daniel M; Roberts, Ian E; Whyatt, Marie V; Hart, Michelle L; Carr, Norman J; Thomas, James J

2012-09-18

Systems and computer-implemented processes for storage and management of information artifacts collected by information analysts using a computing device. The processes and systems can capture a sequence of interactive operation elements that are performed by the information analyst, who is collecting an information artifact from at least one of the plurality of software applications. The information artifact can then be stored together with the interactive operation elements as a snippet on a memory device, which is operably connected to the processor. The snippet comprises a view from an analysis application, data contained in the view, and the sequence of interactive operation elements stored as a provenance representation comprising operation element class, timestamp, and data object attributes for each interactive operation element in the sequence.

PIMS: Memristor-Based Processing-in-Memory-and-Storage.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cook, Jeanine

Continued progress in computing has augmented the quest for higher performance with a new quest for higher energy efficiency. This has led to the re-emergence of Processing-In-Memory (PIM) ar- chitectures that offer higher density and performance with some boost in energy efficiency. Past PIM work either integrated a standard CPU with a conventional DRAM to improve the CPU- memory link, or used a bit-level processor with Single Instruction Multiple Data (SIMD) control, but neither matched the energy consumption of the memory to the computation. We originally proposed to develop a new architecture derived from PIM that more effectively addressed energymore » efficiency for high performance scientific, data analytics, and neuromorphic applications. We also originally planned to implement a von Neumann architecture with arithmetic/logic units (ALUs) that matched the power consumption of an advanced storage array to maximize energy efficiency. Implementing this architecture in storage was our original idea, since by augmenting storage (in- stead of memory), the system could address both in-memory computation and applications that accessed larger data sets directly from storage, hence Processing-in-Memory-and-Storage (PIMS). However, as our research matured, we discovered several things that changed our original direc- tion, the most important being that a PIM that implements a standard von Neumann-type archi- tecture results in significant energy efficiency improvement, but only about a O(10) performance improvement. In addition to this, the emergence of new memory technologies moved us to propos- ing a non-von Neumann architecture, called Superstrider, implemented not in storage, but in a new DRAM technology called High Bandwidth Memory (HBM). HBM is a stacked DRAM tech- nology that includes a logic layer where an architecture such as Superstrider could potentially be implemented.« less

High-capacity optical long data memory based on enhanced Young's modulus in nanoplasmonic hybrid glass composites.

PubMed

Zhang, Qiming; Xia, Zhilin; Cheng, Yi-Bing; Gu, Min

2018-03-22

Emerging as an inevitable outcome of the big data era, long data are the massive amount of data that captures changes in the real world over a long period of time. In this context, recording and reading the data of a few terabytes in a single storage device repeatedly with a century-long unchanged baseline is in high demand. Here, we demonstrate the concept of optical long data memory with nanoplasmonic hybrid glass composites. Through the sintering-free incorporation of nanorods into the earth abundant hybrid glass composite, Young's modulus is enhanced by one to two orders of magnitude. This discovery, enabling reshaping control of plasmonic nanoparticles of multiple-length allows for continuous multi-level recording and reading with a capacity over 10 terabytes with no appreciable change of the baseline over 600 years, which opens new opportunities for long data memory that affects the past and future.

A Review on Disorder-Driven Metal–Insulator Transition in Crystalline Vacancy-Rich GeSbTe Phase-Change Materials

PubMed Central

Wang, Jiang-Jing; Xu, Ya-Zhi; Mazzarello, Riccardo; Wuttig, Matthias; Zhang, Wei

2017-01-01

Metal–insulator transition (MIT) is one of the most essential topics in condensed matter physics and materials science. The accompanied drastic change in electrical resistance can be exploited in electronic devices, such as data storage and memory technology. It is generally accepted that the underlying mechanism of most MITs is an interplay of electron correlation effects (Mott type) and disorder effects (Anderson type), and to disentangle the two effects is difficult. Recent progress on the crystalline Ge1Sb2Te4 (GST) compound provides compelling evidence for a disorder-driven MIT. In this work, we discuss the presence of strong disorder in GST, and elucidate its effects on electron localization and transport properties. We also show how the degree of disorder in GST can be reduced via thermal annealing, triggering a disorder-driven metal–insulator transition. The resistance switching by disorder tuning in crystalline GST may enable novel multilevel data storage devices. PMID:28773222

A Review on Disorder-Driven Metal-Insulator Transition in Crystalline Vacancy-Rich GeSbTe Phase-Change Materials.

PubMed

Wang, Jiang-Jing; Xu, Ya-Zhi; Mazzarello, Riccardo; Wuttig, Matthias; Zhang, Wei

2017-07-27

Metal-insulator transition (MIT) is one of the most essential topics in condensed matter physics and materials science. The accompanied drastic change in electrical resistance can be exploited in electronic devices, such as data storage and memory technology. It is generally accepted that the underlying mechanism of most MITs is an interplay of electron correlation effects (Mott type) and disorder effects (Anderson type), and to disentangle the two effects is difficult. Recent progress on the crystalline Ge₁Sb₂Te₄ (GST) compound provides compelling evidence for a disorder-driven MIT. In this work, we discuss the presence of strong disorder in GST, and elucidate its effects on electron localization and transport properties. We also show how the degree of disorder in GST can be reduced via thermal annealing, triggering a disorder-driven metal-insulator transition. The resistance switching by disorder tuning in crystalline GST may enable novel multilevel data storage devices.

Low-voltage operating flexible ferroelectric organic field-effect transistor nonvolatile memory with a vertical phase separation P(VDF-TrFE-CTFE)/PS dielectric

NASA Astrophysics Data System (ADS)

Xu, Meili; Xiang, Lanyi; Xu, Ting; Wang, Wei; Xie, Wenfa; Zhou, Dayu

2017-10-01

Future flexible electronic systems require memory devices combining low-power operation and mechanical bendability. However, high programming/erasing voltages, which are universally needed to switch the storage states in previously reported ferroelectric organic field-effect transistor (Fe-OFET) nonvolatile memories (NVMs), severely prevent their practical applications. In this work, we develop a route to achieve a low-voltage operating flexible Fe-OFET NVM. Utilizing vertical phase separation, an ultrathin self-organized poly(styrene) (PS) buffering layer covers the surface of the ferroelectric polymer layer by one-step spin-coating from their blending solution. The ferroelectric polymer with a low coercive field contributes to low-voltage operation in the Fe-OFET NVM. The polymer PS contributes to the improvement of mobility, attributing to screening the charge scattering and decreasing the surface roughness. As a result, a high performance flexible Fe-OFET NVM is achieved at the low P/E voltages of ±10 V, with a mobility larger than 0.2 cm2 V-1 s-1, a reliable P/E endurance over 150 cycles, stable data storage retention capability over 104 s, and excellent mechanical bending durability with a slight performance degradation after 1000 repetitive tensile bending cycles at a curvature radius of 5.5 mm.

Hardware support for collecting performance counters directly to memory

DOEpatents

Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

2012-09-25

Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

Ultrafast, superhigh gain visible-blind UV detector and optical logic gates based on nonpolar a-axial GaN nanowire

NASA Astrophysics Data System (ADS)

Wang, Xingfu; Zhang, Yong; Chen, Xinman; He, Miao; Liu, Chao; Yin, Yian; Zou, Xianshao; Li, Shuti

2014-09-01

Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage.Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage. Electronic supplementary information (ESI) available: Details of the EDS and SAED data, supplementary results of the UV detector, and the discussion of the transport properties of the MSM Schottky contact devices. See DOI: 10.1039/c4nr03581j

Distributed trace using central performance counter memory

DOEpatents

Satterfield, David L; Sexton, James C

2013-10-22

A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Distributed trace using central performance counter memory

DOEpatents

Satterfield, David L.; Sexton, James C.

2013-01-22

A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Requirement of the Combination of Mushroom Body ? Lobe and a/ß Lobes for the Retrieval of Both Aversive and Appetitive Early Memories in "Drosophila"

ERIC Educational Resources Information Center

Xie, Zhiyong; Huang, Cheng; Ci, Bo; Lianzhang, Wang; Zhong, Yi

2013-01-01

Extensive studies of "Drosophila" mushroom body in formation and retrieval of olfactory memories allow us to delineate the functional logic for memory storage and retrieval. Currently, there is a questionable disassociation of circuits for memory storage and retrieval during "Drosophila" olfactory memory processing. Formation…

Hold-up power supply for flash memory

NASA Technical Reports Server (NTRS)

Ott, William E. (Inventor)

2004-01-01

A hold-up power supply for flash memory systems is provided. The hold-up power supply provides the flash memory with the power needed to temporarily operate when a power loss exists. This allows the flash memory system to complete any erasures and writes, and thus allows it to shut down gracefully. The hold-up power supply detects when a power loss on a power supply bus is occurring and supplies the power needed for the flash memory system to temporally operate. The hold-up power supply stores power in at least one capacitor. During normal operation, power from a high voltage supply bus is used to charge the storage capacitors. When a power supply loss is detected, the power supply bus is disconnected from the flash memory system. A hold-up controller controls the power flow from the storage capacitors to the flash memory system. The hold-up controller uses feedback to assure that the proper voltage is provided from the storage capacitors to the flash memory system. This power supplied by the storage capacitors allows the flash memory system to complete any erasures and writes, and thus allows the flash memory system to shut down gracefully.

21 CFR 892.2010 - Medical image storage device.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Medical image storage device. 892.2010 Section 892...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2010 Medical image storage device. (a) Identification. A medical image storage device is a device that provides electronic storage and retrieval...

21 CFR 892.2010 - Medical image storage device.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Medical image storage device. 892.2010 Section 892...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2010 Medical image storage device. (a) Identification. A medical image storage device is a device that provides electronic storage and retrieval...

21 CFR 892.2010 - Medical image storage device.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Medical image storage device. 892.2010 Section 892...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2010 Medical image storage device. (a) Identification. A medical image storage device is a device that provides electronic storage and retrieval...

21 CFR 892.2010 - Medical image storage device.

Code of Federal Regulations, 2010 CFR

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Medical image storage device. 892.2010 Section 892...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2010 Medical image storage device. (a) Identification. A medical image storage device is a device that provides electronic storage and retrieval...

21 CFR 892.2010 - Medical image storage device.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Medical image storage device. 892.2010 Section 892...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2010 Medical image storage device. (a) Identification. A medical image storage device is a device that provides electronic storage and retrieval...

Electrochemical metallization memories--fundamentals, applications, prospects.

PubMed

Valov, Ilia; Waser, Rainer; Jameson, John R; Kozicki, Michael N

2011-06-24

This review focuses on electrochemical metallization memory cells (ECM), highlighting their advantages as the next generation memories. In a brief introduction, the basic switching mechanism of ECM cells is described and the historical development is sketched. In a second part, the full spectra of materials and material combinations used for memory device prototypes and for dedicated studies are presented. In a third part, the specific thermodynamics and kinetics of nanosized electrochemical cells are described. The overlapping of the space charge layers is found to be most relevant for the cell properties at rest. The major factors determining the functionality of the ECM cells are the electrode reaction and the transport kinetics. Depending on electrode and/or electrolyte material electron transfer, electro-crystallization or slow diffusion under strong electric fields can be rate determining. In the fourth part, the major device characteristics of ECM cells are explained. Emphasis is placed on switching speed, forming and SET/RESET voltage, R(ON) to R(OFF) ratio, endurance and retention, and scaling potentials. In the last part, circuit design aspects of ECM arrays are discussed, including the pros and cons of active and passive arrays. In the case of passive arrays, the fundamental sneak path problem is described and as well as a possible solution by two anti-serial (complementary) interconnected resistive switches per cell. Furthermore, the prospects of ECM with regard to further scalability and the ability for multi-bit data storage are addressed.

Synaptic Scaling Enables Dynamically Distinct Short- and Long-Term Memory Formation

PubMed Central

Tetzlaff, Christian; Kolodziejski, Christoph; Timme, Marc; Tsodyks, Misha; Wörgötter, Florentin

2013-01-01

Memory storage in the brain relies on mechanisms acting on time scales from minutes, for long-term synaptic potentiation, to days, for memory consolidation. During such processes, neural circuits distinguish synapses relevant for forming a long-term storage, which are consolidated, from synapses of short-term storage, which fade. How time scale integration and synaptic differentiation is simultaneously achieved remains unclear. Here we show that synaptic scaling – a slow process usually associated with the maintenance of activity homeostasis – combined with synaptic plasticity may simultaneously achieve both, thereby providing a natural separation of short- from long-term storage. The interaction between plasticity and scaling provides also an explanation for an established paradox where memory consolidation critically depends on the exact order of learning and recall. These results indicate that scaling may be fundamental for stabilizing memories, providing a dynamic link between early and late memory formation processes. PMID:24204240

Synaptic scaling enables dynamically distinct short- and long-term memory formation.

PubMed

Tetzlaff, Christian; Kolodziejski, Christoph; Timme, Marc; Tsodyks, Misha; Wörgötter, Florentin

2013-10-01

Memory storage in the brain relies on mechanisms acting on time scales from minutes, for long-term synaptic potentiation, to days, for memory consolidation. During such processes, neural circuits distinguish synapses relevant for forming a long-term storage, which are consolidated, from synapses of short-term storage, which fade. How time scale integration and synaptic differentiation is simultaneously achieved remains unclear. Here we show that synaptic scaling - a slow process usually associated with the maintenance of activity homeostasis - combined with synaptic plasticity may simultaneously achieve both, thereby providing a natural separation of short- from long-term storage. The interaction between plasticity and scaling provides also an explanation for an established paradox where memory consolidation critically depends on the exact order of learning and recall. These results indicate that scaling may be fundamental for stabilizing memories, providing a dynamic link between early and late memory formation processes.

Cognitive memory.

PubMed

Widrow, Bernard; Aragon, Juan Carlos

2013-05-01

Regarding the workings of the human mind, memory and pattern recognition seem to be intertwined. You generally do not have one without the other. Taking inspiration from life experience, a new form of computer memory has been devised. Certain conjectures about human memory are keys to the central idea. The design of a practical and useful "cognitive" memory system is contemplated, a memory system that may also serve as a model for many aspects of human memory. The new memory does not function like a computer memory where specific data is stored in specific numbered registers and retrieval is done by reading the contents of the specified memory register, or done by matching key words as with a document search. Incoming sensory data would be stored at the next available empty memory location, and indeed could be stored redundantly at several empty locations. The stored sensory data would neither have key words nor would it be located in known or specified memory locations. Sensory inputs concerning a single object or subject are stored together as patterns in a single "file folder" or "memory folder". When the contents of the folder are retrieved, sights, sounds, tactile feel, smell, etc., are obtained all at the same time. Retrieval would be initiated by a query or a prompt signal from a current set of sensory inputs or patterns. A search through the memory would be made to locate stored data that correlates with or relates to the prompt input. The search would be done by a retrieval system whose first stage makes use of autoassociative artificial neural networks and whose second stage relies on exhaustive search. Applications of cognitive memory systems have been made to visual aircraft identification, aircraft navigation, and human facial recognition. Concerning human memory, reasons are given why it is unlikely that long-term memory is stored in the synapses of the brain's neural networks. Reasons are given suggesting that long-term memory is stored in DNA or RNA. Neural networks are an important component of the human memory system, and their purpose is for information retrieval, not for information storage. The brain's neural networks are analog devices, subject to drift and unplanned change. Only with constant training is reliable action possible. Good training time is during sleep and while awake and making use of one's memory. A cognitive memory is a learning system. Learning involves storage of patterns or data in a cognitive memory. The learning process for cognitive memory is unsupervised, i.e. autonomous. Copyright © 2013 Elsevier Ltd. All rights reserved.

A Look Inside Argonne's Center for Nanoscale Materials

ScienceCinema

Divan, Ralu; Rosenthal, Dan; Rose, Volker; Wai Hla

2018-05-23

At a very small, or "nano" scale, materials behave differently. The study of nanomaterials is much more than miniaturization - scientists are discovering how changes in size change a material's properties. From sunscreen to computer memory, the applications of nanoscale materials research are all around us. Researchers at Argonne's Center for Nanoscale Materials are creating new materials, methods and technologies to address some of the world's greatest challenges in energy security, lightweight but durable materials, high-efficiency lighting, information storage, environmental stewardship and advanced medical devices.

Fast transient digitizer

DOEpatents

Villa, Francesco

1982-01-01

Method and apparatus for sequentially scanning a plurality of target elements with an electron scanning beam modulated in accordance with variations in a high-frequency analog signal to provide discrete analog signal samples representative of successive portions of the analog signal; coupling the discrete analog signal samples from each of the target elements to a different one of a plurality of high speed storage devices; converting the discrete analog signal samples to equivalent digital signals; and storing the digital signals in a digital memory unit for subsequent measurement or display.

Inhibition delay increases neural network capacity through Stirling transform.

PubMed

Nogaret, Alain; King, Alastair

2018-03-01

Inhibitory neural networks are found to encode high volumes of information through delayed inhibition. We show that inhibition delay increases storage capacity through a Stirling transform of the minimum capacity which stabilizes locally coherent oscillations. We obtain both the exact and asymptotic formulas for the total number of dynamic attractors. Our results predict a (ln2)^{-N}-fold increase in capacity for an N-neuron network and demonstrate high-density associative memories which host a maximum number of oscillations in analog neural devices.

Inhibition delay increases neural network capacity through Stirling transform

NASA Astrophysics Data System (ADS)

Nogaret, Alain; King, Alastair

2018-03-01

Inhibitory neural networks are found to encode high volumes of information through delayed inhibition. We show that inhibition delay increases storage capacity through a Stirling transform of the minimum capacity which stabilizes locally coherent oscillations. We obtain both the exact and asymptotic formulas for the total number of dynamic attractors. Our results predict a (ln2) -N-fold increase in capacity for an N -neuron network and demonstrate high-density associative memories which host a maximum number of oscillations in analog neural devices.

A video event trigger for high frame rate, high resolution video technology

NASA Astrophysics Data System (ADS)

Williams, Glenn L.

1991-12-01

When video replaces film the digitized video data accumulates very rapidly, leading to a difficult and costly data storage problem. One solution exists for cases when the video images represent continuously repetitive 'static scenes' containing negligible activity, occasionally interrupted by short events of interest. Minutes or hours of redundant video frames can be ignored, and not stored, until activity begins. A new, highly parallel digital state machine generates a digital trigger signal at the onset of a video event. High capacity random access memory storage coupled with newly available fuzzy logic devices permits the monitoring of a video image stream for long term or short term changes caused by spatial translation, dilation, appearance, disappearance, or color change in a video object. Pretrigger and post-trigger storage techniques are then adaptable for archiving the digital stream from only the significant video images.

A video event trigger for high frame rate, high resolution video technology

NASA Technical Reports Server (NTRS)

Williams, Glenn L.

1991-01-01

When video replaces film the digitized video data accumulates very rapidly, leading to a difficult and costly data storage problem. One solution exists for cases when the video images represent continuously repetitive 'static scenes' containing negligible activity, occasionally interrupted by short events of interest. Minutes or hours of redundant video frames can be ignored, and not stored, until activity begins. A new, highly parallel digital state machine generates a digital trigger signal at the onset of a video event. High capacity random access memory storage coupled with newly available fuzzy logic devices permits the monitoring of a video image stream for long term or short term changes caused by spatial translation, dilation, appearance, disappearance, or color change in a video object. Pretrigger and post-trigger storage techniques are then adaptable for archiving the digital stream from only the significant video images.

Strain Engineering to Modify the Electrochemistry of Energy Storage Electrodes

PubMed Central

Muralidharan, Nitin; Carter, Rachel; Oakes, Landon; Cohn, Adam P.; Pint, Cary L.

2016-01-01

Strain engineering has been a critical aspect of device design in semiconductor manufacturing for the past decade, but remains relatively unexplored for other applications, such as energy storage. Using mechanical strain as an input parameter to modulate electrochemical potentials of metal oxides opens new opportunities intersecting fields of electrochemistry and mechanics. Here we demonstrate that less than 0.1% strain on a Ni-Ti-O based metal-oxide formed on superelastic shape memory NiTi alloys leads to anodic and cathodic peak potential shifts by up to ~30 mV in an electrochemical cell. Moreover, using the superelastic properties of NiTi to enable strain recovery also recovers the electrochemical potential of the metal oxide, providing mechanistic evidence of strain-modified electrochemistry. These results indicate that mechanical energy can be coupled with electrochemical systems to efficiently design and optimize a new class of strain-modulated energy storage materials. PMID:27283872

Effects of Anxiety on Memory Storage and Updating in Young Children

ERIC Educational Resources Information Center

Visu-Petra, Laura; Cheie, Lavinia; Benga, Oana; Alloway, Tracy Packiam

2011-01-01

The relationship between trait anxiety and memory functioning in young children was investigated. Two studies were conducted, using tasks tapping verbal and visual-spatial short-term memory (Study 1) and working memory (Study 2) in preschoolers. On the verbal storage tasks, there was a detrimental effect of anxiety on processing efficiency…

Memory Erasure Experiments Indicate a Critical Role of CaMKII in Memory Storage.

PubMed

Rossetti, Tom; Banerjee, Somdeb; Kim, Chris; Leubner, Megan; Lamar, Casey; Gupta, Pooja; Lee, Bomsol; Neve, Rachael; Lisman, John

2017-09-27

The abundant synaptic protein CaMKII is necessary for long-term potentiation (LTP) and memory. However, whether CaMKII is required only during initial processes or whether it also mediates memory storage remains unclear. The most direct test of a storage role is the erasure test. In this test, a putative memory molecule is inhibited after learning. The key prediction is that this should produce persistent memory erasure even after the inhibitory agent is removed. We conducted this test using transient viral (HSV) expression of dominant-negative CaMKII-alpha (K42M) in the hippocampus. This produced persistent erasure of conditioned place avoidance. As an additional test, we found that expression of activated CaMKII (T286D/T305A/T306A) impaired place avoidance, a result not expected if a process other than CaMKII stores memory. Our behavioral results, taken together with prior experiments on LTP, strongly support a critical role of CaMKII in LTP maintenance and memory storage. Copyright © 2017 Elsevier Inc. All rights reserved.

Computers, the Human Mind, and My In-Laws' House.

ERIC Educational Resources Information Center

Esque, Timm J.

1996-01-01

Discussion of human memory, computer memory, and the storage of information focuses on a metaphor that can account for memory without storage and can set the stage for systemic research around a more comprehensive, understandable theory. (Author/LRW)

Smart photodetector arrays for error control in page-oriented optical memory

NASA Astrophysics Data System (ADS)

Schaffer, Maureen Elizabeth

1998-12-01

Page-oriented optical memories (POMs) have been proposed to meet high speed, high capacity storage requirements for input/output intensive computer applications. This technology offers the capability for storage and retrieval of optical data in two-dimensional pages resulting in high throughput data rates. Since currently measured raw bit error rates for these systems fall several orders of magnitude short of industry requirements for binary data storage, powerful error control codes must be adopted. These codes must be designed to take advantage of the two-dimensional memory output. In addition, POMs require an optoelectronic interface to transfer the optical data pages to one or more electronic host systems. Conventional charge coupled device (CCD) arrays can receive optical data in parallel, but the relatively slow serial electronic output of these devices creates a system bottleneck thereby eliminating the POM advantage of high transfer rates. Also, CCD arrays are "unintelligent" interfaces in that they offer little data processing capabilities. The optical data page can be received by two-dimensional arrays of "smart" photo-detector elements that replace conventional CCD arrays. These smart photodetector arrays (SPAs) can perform fast parallel data decoding and error control, thereby providing an efficient optoelectronic interface between the memory and the electronic computer. This approach optimizes the computer memory system by combining the massive parallelism and high speed of optics with the diverse functionality, low cost, and local interconnection efficiency of electronics. In this dissertation we examine the design of smart photodetector arrays for use as the optoelectronic interface for page-oriented optical memory. We review options and technologies for SPA fabrication, develop SPA requirements, and determine SPA scalability constraints with respect to pixel complexity, electrical power dissipation, and optical power limits. Next, we examine data modulation and error correction coding for the purpose of error control in the POM system. These techniques are adapted, where possible, for 2D data and evaluated as to their suitability for a SPA implementation in terms of BER, code rate, decoder time and pixel complexity. Our analysis shows that differential data modulation combined with relatively simple block codes known as array codes provide a powerful means to achieve the desired data transfer rates while reducing error rates to industry requirements. Finally, we demonstrate the first smart photodetector array designed to perform parallel error correction on an entire page of data and satisfy the sustained data rates of page-oriented optical memories. Our implementation integrates a monolithic PN photodiode array and differential input receiver for optoelectronic signal conversion with a cluster error correction code using 0.35-mum CMOS. This approach provides high sensitivity, low electrical power dissipation, and fast parallel correction of 2 x 2-bit cluster errors in an 8 x 8 bit code block to achieve corrected output data rates scalable to 102 Gbps in the current technology increasing to 1.88 Tbps in 0.1-mum CMOS.

Portable and Error-Free DNA-Based Data Storage.

PubMed

Yazdi, S M Hossein Tabatabaei; Gabrys, Ryan; Milenkovic, Olgica

2017-07-10

DNA-based data storage is an emerging nonvolatile memory technology of potentially unprecedented density, durability, and replication efficiency. The basic system implementation steps include synthesizing DNA strings that contain user information and subsequently retrieving them via high-throughput sequencing technologies. Existing architectures enable reading and writing but do not offer random-access and error-free data recovery from low-cost, portable devices, which is crucial for making the storage technology competitive with classical recorders. Here we show for the first time that a portable, random-access platform may be implemented in practice using nanopore sequencers. The novelty of our approach is to design an integrated processing pipeline that encodes data to avoid costly synthesis and sequencing errors, enables random access through addressing, and leverages efficient portable sequencing via new iterative alignment and deletion error-correcting codes. Our work represents the only known random access DNA-based data storage system that uses error-prone nanopore sequencers, while still producing error-free readouts with the highest reported information rate/density. As such, it represents a crucial step towards practical employment of DNA molecules as storage media.

A single-atom quantum memory.

PubMed

Specht, Holger P; Nölleke, Christian; Reiserer, Andreas; Uphoff, Manuel; Figueroa, Eden; Ritter, Stephan; Rempe, Gerhard

2011-05-12

The faithful storage of a quantum bit (qubit) of light is essential for long-distance quantum communication, quantum networking and distributed quantum computing. The required optical quantum memory must be able to receive and recreate the photonic qubit; additionally, it must store an unknown quantum state of light better than any classical device. So far, these two requirements have been met only by ensembles of material particles that store the information in collective excitations. Recent developments, however, have paved the way for an approach in which the information exchange occurs between single quanta of light and matter. This single-particle approach allows the material qubit to be addressed, which has fundamental advantages for realistic implementations. First, it enables a heralding mechanism that signals the successful storage of a photon by means of state detection; this can be used to combat inevitable losses and finite efficiencies. Second, it allows for individual qubit manipulations, opening up avenues for in situ processing of the stored quantum information. Here we demonstrate the most fundamental implementation of such a quantum memory, by mapping arbitrary polarization states of light into and out of a single atom trapped inside an optical cavity. The memory performance is tested with weak coherent pulses and analysed using full quantum process tomography. The average fidelity is measured to be 93%, and low decoherence rates result in qubit coherence times exceeding 180  microseconds. This makes our system a versatile quantum node with excellent prospects for applications in optical quantum gates and quantum repeaters.

Short- and long-term memory contributions to immediate serial recognition: evidence from serial position effects.

PubMed

Purser, Harry; Jarrold, Christopher

2010-04-01

A long-standing body of research supports the existence of separable short- and long-term memory systems, relying on phonological and semantic codes, respectively. The aim of the current study was to measure the contribution of long-term knowledge to short-term memory performance by looking for evidence of phonologically and semantically coded storage within a short-term recognition task, among developmental samples. Each experimental trial presented 4-item lists. In Experiment 1 typically developing children aged 5 to 6 years old showed evidence of phonologically coded storage across all 4 serial positions, but evidence of semantically coded storage at Serial Positions 1 and 2. In a further experiment, a group of individuals with Down syndrome was investigated as a test case that might be expected to use semantic coding to support short-term storage, but these participants showed no evidence of semantically coded storage and evidenced phonologically coded storage only at Serial Position 4, suggesting that individuals with Down syndrome have a verbal short-term memory capacity of 1 item. Our results suggest that previous evidence of semantic effects on "short-term memory performance" does not reflect semantic coding in short-term memory itself, and provide an experimental method for researchers wishing to take a relatively pure measure of verbal short-term memory capacity, in cases where rehearsal is unlikely.

Compact 3D quantum memory

NASA Astrophysics Data System (ADS)

Xie, Edwar; Deppe, Frank; Renger, Michael; Repp, Daniel; Eder, Peter; Fischer, Michael; Goetz, Jan; Pogorzalek, Stefan; Fedorov, Kirill G.; Marx, Achim; Gross, Rudolf

2018-05-01

Superconducting 3D microwave cavities offer state-of-the-art coherence times and a well-controlled environment for superconducting qubits. In order to realize at the same time fast readout and long-lived quantum information storage, one can couple the qubit to both a low-quality readout and a high-quality storage cavity. However, such systems are bulky compared to their less coherent 2D counterparts. A more compact and scalable approach is achieved by making use of the multimode structure of a 3D cavity. In our work, we investigate such a device where a transmon qubit is capacitively coupled to two modes of a single 3D cavity. External coupling is engineered so that the memory mode has an about 100 times larger quality factor than the readout mode. Using an all-microwave second-order protocol, we realize a lifetime enhancement of the stored state over the qubit lifetime by a factor of 6 with a fidelity of approximately 80% determined via quantum process tomography. We also find that this enhancement is not limited by fundamental constraints.

Evolution of costly explicit memory and cumulative culture.

PubMed

Nakamaru, Mayuko

2016-06-21

Humans can acquire new information and modify it (cumulative culture) based on their learning and memory abilities, especially explicit memory, through the processes of encoding, consolidation, storage, and retrieval. Explicit memory is categorized into semantic and episodic memories. Animals have semantic memory, while episodic memory is unique to humans and essential for innovation and the evolution of culture. As both episodic and semantic memory are needed for innovation, the evolution of explicit memory influences the evolution of culture. However, previous theoretical studies have shown that environmental fluctuations influence the evolution of imitation (social learning) and innovation (individual learning) and assume that memory is not an evolutionary trait. If individuals can store and retrieve acquired information properly, they can modify it and innovate new information. Therefore, being able to store and retrieve information is essential from the perspective of cultural evolution. However, if both storage and retrieval were too costly, forgetting and relearning would have an advantage over storing and retrieving acquired information. In this study, using mathematical analysis and individual-based simulations, we investigate whether cumulative culture can promote the coevolution of costly memory and social and individual learning, assuming that cumulative culture improves the fitness of each individual. The conclusions are: (1) without cumulative culture, a social learning cost is essential for the evolution of storage-retrieval. Costly storage-retrieval can evolve with individual learning but costly social learning does not evolve. When low-cost social learning evolves, the repetition of forgetting and learning is favored more than the evolution of costly storage-retrieval, even though a cultural trait improves the fitness. (2) When cumulative culture exists and improves fitness, storage-retrieval can evolve with social and/or individual learning, which is not influenced by the degree of the social learning cost. Whether individuals socially learn a low level of culture from observing a high or the low level of culture influences the evolution of memory and learning, especially individual learning. Copyright © 2016 Elsevier Ltd. All rights reserved.

Demonstration of the Potential of Magnetic Tunnel Junctions for a Universal RAM Technology

NASA Astrophysics Data System (ADS)

Gallagher, William J.

2000-03-01

Over the past four years, tunnel junctions with magnetic electrodes have emerged as promising devices for future magnetoresistive sensing and for information storage. This talk will review advances in these devices, focusing particularly on the use of magnetic tunnel junctions for magnetic random access memory (MRAM). Exchange-biased versions of magnetic tunnel junctions (MTJs) in particular will be shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture. Exchange-biased MTJ elements have been made with areas as small as 0.1 square microns and have shown magnetoresistance values exceeding 40 The potential of exchange-biased MTJs for MRAM has been most seriously explored in a demonstration experiment involving the integration of 0.25 micron CMOS technology with a special magnetic tunnel junction "back end." The magnetic back end is based upon multi-layer magnetic tunnel junction growth technology which was developed using research-scale equipment and one-inch size substrates. For the demonstration, the CMOS wafers processed through two metal layers were cut into one-inch squares for depositions of bottom-pinned exchange-biased magnetic tunnel junctions. The samples were then processed through four additional lithographic levels to complete the circuits. The demonstration focused attention on a number of processing and device issues that were addressed successfully enough that key performance aspects of MTJ MRAM were demonstrated in 1 K bit arrays, including reads and writes in less than 10 ns and nonvolatility. While other key issues remain to be addressed, these results suggest that MTJ MRAM might simultaneously provide much of the functionality now provided separately by SRAM, DRAM, and NVRAM.

Criteria for identifying the molecular basis of the engram (CaMKII, PKMzeta).

PubMed

Lisman, John

2017-11-29

The engram refers to the molecular changes by which a memory is stored in the brain. Substantial evidence suggests that memory involves learning-dependent changes at synapses, a process termed long-term potentiation (LTP). Thus, understanding the storages process that underlies LTP may provide insight into how the engram is stored. LTP involves induction, maintenance (storage), and expression sub-processes; special tests are required to specifically reveal properties of the storage process. The strongest of these is the Erasure test in which a transiently applied agent that attacks a putative storage molecule may lead to persistent erasure of previously induced LTP/memory. Two major hypotheses have been proposed for LTP/memory storage: the CaMKII and PKM-zeta hypotheses. After discussing the tests that can be used to identify the engram (Necessity test, Saturation/Occlusion test, Erasure test), the status of these hypotheses is evaluated, based on the literature on LTP and memory-guided behavior. Review of the literature indicates that all three tests noted above support the CaMKII hypothesis when done at both the LTP level and at the behavioral level. Taken together, the results strongly suggest that the engram is stored by an LTP process in which CaMKII is a critical memory storage molecule.

Thermal energy storage devices, systems, and thermal energy storage device monitoring methods

DOEpatents

Tugurlan, Maria; Tuffner, Francis K; Chassin, David P.

2016-09-13

Thermal energy storage devices, systems, and thermal energy storage device monitoring methods are described. According to one aspect, a thermal energy storage device includes a reservoir configured to hold a thermal energy storage medium, a temperature control system configured to adjust a temperature of the thermal energy storage medium, and a state observation system configured to provide information regarding an energy state of the thermal energy storage device at a plurality of different moments in time.

Memory-assisted quantum key distribution resilient against multiple-excitation effects

NASA Astrophysics Data System (ADS)

Lo Piparo, Nicolò; Sinclair, Neil; Razavi, Mohsen

2018-01-01

Memory-assisted measurement-device-independent quantum key distribution (MA-MDI-QKD) has recently been proposed as a technique to improve the rate-versus-distance behavior of QKD systems by using existing, or nearly-achievable, quantum technologies. The promise is that MA-MDI-QKD would require less demanding quantum memories than the ones needed for probabilistic quantum repeaters. Nevertheless, early investigations suggest that, in order to beat the conventional memory-less QKD schemes, the quantum memories used in the MA-MDI-QKD protocols must have high bandwidth-storage products and short interaction times. Among different types of quantum memories, ensemble-based memories offer some of the required specifications, but they typically suffer from multiple excitation effects. To avoid the latter issue, in this paper, we propose two new variants of MA-MDI-QKD both relying on single-photon sources for entangling purposes. One is based on known techniques for entanglement distribution in quantum repeaters. This scheme turns out to offer no advantage even if one uses ideal single-photon sources. By finding the root cause of the problem, we then propose another setup, which can outperform single memory-less setups even if we allow for some imperfections in our single-photon sources. For such a scheme, we compare the key rate for different types of ensemble-based memories and show that certain classes of atomic ensembles can improve the rate-versus-distance behavior.

Which Working Memory Functions Predict Intelligence?

ERIC Educational Resources Information Center

Oberauer, Klaus; Sub, Heinz-Martin; Wilhelm, Oliver; Wittmann, Werner W.

2008-01-01

Investigates the relationship between three factors of working memory (storage and processing, relational integration, and supervision) and four factors of intelligence (reasoning, speed, memory, and creativity) using structural equation models. Relational integration predicted reasoning ability at least as well as the storage-and-processing…

Light sensitivity of a one transistor-one capacitor memory cell when used as a micromirror actuator in projector applications

NASA Astrophysics Data System (ADS)

Huffman, James Douglas

2001-11-01

The most important issue facing the future business success of the Digital Micromirror Device or DMD™ produced by Texas Instruments is the cost of the actual device. As the business and consumer markets call for higher resolution displays, the array size will have to be increased to incorporate more pixels. The manufacturing costs associated with building these higher resolution displays follow an exponential relation with the number of pixels due to yield loss and reduced number of chips per silicon wafer. Each pixel is actuated by electrostatics that are provided by a memory cell that is built in the underlying silicon substrate. One way to decrease cost of the wafer is to change the memory cell architecture from a static random access configuration or SRAM to a dynamic random access configuration or DRAM. This change has the benefits of having fewer components per area and a lower metal density. This reduction in the component count and metal density has a dramatic effect on the yield of the memory array by reducing the particle sensitivity of the underlying cell. The main drawback to using a DRAM configuration in a display application is the light sensitivity of a charge storage device built in the silicon substrate. As the photons pass through the mechanical micromirrors and illuminate the DRAM cell, the effective electrostatic potential of the memory element used for the mirror actuation is reduced. This dissertation outlines the issues associated with the light sensitivity of a DRAM memory cell as the actuation element for a micromirror. The concept of charge depletion on a silicon capacitor due to recombination of photogenerated carriers is explored and experimentally verified. The effects of the reduced potential on the capacitor on the micromirror are also explored. Optical modeling is used to determine the incoming photon flux to determine the benefits of adding a charge recombination region as part of the DRAM memory cell. Several options are explored to reduce the effect of the incoming photons on the potential of the memory cell. The results will show that a 1T1C memory cell with N-type recombination regions and maximum light shielding is sufficient for a projector application.

Accessing global data from accelerator devices

DOEpatents

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

Economic impact of off-line PC viewer for private folder management

NASA Astrophysics Data System (ADS)

Song, Koun-Sik; Shin, Myung J.; Lee, Joo Hee; Auh, Yong H.

1999-07-01

We developed a PC-based clinical workstation and implemented at Asan Medical Center in Seoul, Korea, Hardwares used were Pentium-II, 8M video memory, 64-128 MB RAM, 19 inch color monitor, and 10/100Mbps network adaptor. One of the unique features of this workstation is management tool for folders reside both in PACS short-term storage unit and local hard disk. Users can copy the entire study or part of the study to local hard disk, removable storages, or CD recorder. Even the images in private folders in PACS short-term storage can be copied to local storage devices. All images are saved as DICOM 3.0 file format with 2:1 lossless compression. We compared the prices of copy films and storage medias considering the possible savings of expensive PACS short- term storage and network traffic. Price savings of copy film is most remarkable in MR exam. Price savings arising from minimal use of short-term unit was 50,000 dollars. It as hard to calculate the price savings arising from the network usage. Off-line PC viewer is a cost-effective way of handling private folder management under the PACS environment.

An UV photochromic memory effect in proton-based WO3 electrochromic devices

NASA Astrophysics Data System (ADS)

Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

2008-11-01

We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

Short-Term Memory: The "Storage" Component of Human Brain Responses Predicts Recall.

ERIC Educational Resources Information Center

Chapman, Robert M.; And Others

1978-01-01

Presents electrophysiological and behavioral evidence for a neural process related to storage in short-term memory. Predicting recall performance on the basis of the storage component of brain responses is presented. A list of references is also included. (HM)

Spectromicroscopic insights for rational design of redox-based memristive devices

PubMed Central

Baeumer, Christoph; Schmitz, Christoph; Ramadan, Amr H. H.; Du, Hongchu; Skaja, Katharina; Feyer, Vitaliy; Müller, Philipp; Arndt, Benedikt; Jia, Chun-Lin; Mayer, Joachim; De Souza, Roger A.; Michael Schneider, Claus; Waser, Rainer; Dittmann, Regina

2015-01-01

The demand for highly scalable, low-power devices for data storage and logic operations is strongly stimulating research into resistive switching as a novel concept for future non-volatile memory devices. To meet technological requirements, it is imperative to have a set of material design rules based on fundamental material physics, but deriving such rules is proving challenging. Here, we elucidate both switching mechanism and failure mechanism in the valence-change model material SrTiO3, and on this basis we derive a design rule for failure-resistant devices. Spectromicroscopy reveals that the resistance change during device operation and failure is indeed caused by nanoscale oxygen migration resulting in localized valence changes between Ti4+ and Ti3+. While fast reoxidation typically results in retention failure in SrTiO3, local phase separation within the switching filament stabilizes the retention. Mimicking this phase separation by intentionally introducing retention-stabilization layers with slow oxygen transport improves retention times considerably. PMID:26477940

An assessment of memristor intrinsic fluctuations: a measurement of single atomic motion

NASA Astrophysics Data System (ADS)

Borghetti, Julien; Yang, J. Joshua; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-03-01

Memristors provides electrically tunable resistance for upcoming non-volatile memory and future neuromorphic computing. One of the key benefits of such a device is its scalability, which can be demonstrated from an architectural perspective as well as from a fundamental physics limit. 4D addressing schemes utilizing cross bar structures that can be stacked several layers high above the chip embodies unlimited addressing space. On the other limit, the basic operating principles of memristive devices allow one to reach storage of information in a single atom. In this report of nanoscale (sub 50nm) devices, we detect single atom fluctuations, which would then represent the ultimate limit for noise sources thus delineating the boundary conditions for circuit design. We show that electrically induced individual atom migrations do not affect the overall device atomic configuration until a critical bias where a single local fluctuation triggers a general atomic reconfiguration. This instability illustrates the robustness of the device non-volatility upon small electrical stress.

Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

NASA Astrophysics Data System (ADS)

Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

2016-05-01

The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr00505e

Persistent Memory in Single Node Delay-Coupled Reservoir Computing.

PubMed

Kovac, André David; Koall, Maximilian; Pipa, Gordon; Toutounji, Hazem

2016-01-01

Delays are ubiquitous in biological systems, ranging from genetic regulatory networks and synaptic conductances, to predator/pray population interactions. The evidence is mounting, not only to the presence of delays as physical constraints in signal propagation speed, but also to their functional role in providing dynamical diversity to the systems that comprise them. The latter observation in biological systems inspired the recent development of a computational architecture that harnesses this dynamical diversity, by delay-coupling a single nonlinear element to itself. This architecture is a particular realization of Reservoir Computing, where stimuli are injected into the system in time rather than in space as is the case with classical recurrent neural network realizations. This architecture also exhibits an internal memory which fades in time, an important prerequisite to the functioning of any reservoir computing device. However, fading memory is also a limitation to any computation that requires persistent storage. In order to overcome this limitation, the current work introduces an extended version to the single node Delay-Coupled Reservoir, that is based on trained linear feedback. We show by numerical simulations that adding task-specific linear feedback to the single node Delay-Coupled Reservoir extends the class of solvable tasks to those that require nonfading memory. We demonstrate, through several case studies, the ability of the extended system to carry out complex nonlinear computations that depend on past information, whereas the computational power of the system with fading memory alone quickly deteriorates. Our findings provide the theoretical basis for future physical realizations of a biologically-inspired ultrafast computing device with extended functionality.

Persistent Memory in Single Node Delay-Coupled Reservoir Computing

PubMed Central

Pipa, Gordon; Toutounji, Hazem

2016-01-01

Delays are ubiquitous in biological systems, ranging from genetic regulatory networks and synaptic conductances, to predator/pray population interactions. The evidence is mounting, not only to the presence of delays as physical constraints in signal propagation speed, but also to their functional role in providing dynamical diversity to the systems that comprise them. The latter observation in biological systems inspired the recent development of a computational architecture that harnesses this dynamical diversity, by delay-coupling a single nonlinear element to itself. This architecture is a particular realization of Reservoir Computing, where stimuli are injected into the system in time rather than in space as is the case with classical recurrent neural network realizations. This architecture also exhibits an internal memory which fades in time, an important prerequisite to the functioning of any reservoir computing device. However, fading memory is also a limitation to any computation that requires persistent storage. In order to overcome this limitation, the current work introduces an extended version to the single node Delay-Coupled Reservoir, that is based on trained linear feedback. We show by numerical simulations that adding task-specific linear feedback to the single node Delay-Coupled Reservoir extends the class of solvable tasks to those that require nonfading memory. We demonstrate, through several case studies, the ability of the extended system to carry out complex nonlinear computations that depend on past information, whereas the computational power of the system with fading memory alone quickly deteriorates. Our findings provide the theoretical basis for future physical realizations of a biologically-inspired ultrafast computing device with extended functionality. PMID:27783690

A Layered Solution for Supercomputing Storage

ScienceCinema

Grider, Gary

2018-06-13

To solve the supercomputing challenge of memory keeping up with processing speed, a team at Los Alamos National Laboratory developed two innovative memory management and storage technologies. Burst buffers peel off data onto flash memory to support the checkpoint/restart paradigm of large simulations. MarFS adds a thin software layer enabling a new tier for campaign storage—based on inexpensive, failure-prone disk drives—between disk drives and tape archives.

Alcohol and Memory: Storage and State Dependency

ERIC Educational Resources Information Center

Parker, Elizabeth S.; And Others

1976-01-01

Effects of acute alcohol intoxication on the storage phase of memory were evaluated with two tasks that minimized response retrieval: unpaced paired-associate learning with highly available responses and forced-choice picture recognition. It was concluded that storage processes are sensitive to disruption by alcohol. (CHK)

Formation of SiGe nanocrystals embedded in Al2O3 for the application of write-once-read-many-times memory

NASA Astrophysics Data System (ADS)

Wu, Min-Lin; Wu, Yung-Hsien; Lin, Chia-Chun; Chen, Lun-Lun

2012-10-01

The structure of SiGe nanocrystals embedded in Al2O3 formed by sequential deposition of Al2O3/Si/Ge/Al2O3 and a subsequent annealing was confirmed by transmission electron microscopy and energy dispersive spectroscopy (EDS), and its application for write-once-read-many-times (WORM) memory devices was explored in this study. By applying a -10 V pulse for 1 s, a large amount of holes injected from Si substrate are stored in the nanocrystals and consequently, the current at +1.5 V increases by a factor of 104 as compared to that of the initial state. Even with a smaller -5 V pulse for 1 μs, a sufficiently large current ratio of 36 can still be obtained, verifying the low power operation. Since holes are stored in nanocrystals which are isolated from Si substrate by Al2O3 with good integrity and correspond to a large valence band offset with respect to Al2O3, desirable read endurance up to 105 cycles and excellent retention over 100 yr are achieved. Combining these promising characteristics, WORM memory devices are appropriate for high-performance archival storage applications.

Highly Efficient Coherent Optical Memory Based on Electromagnetically Induced Transparency

NASA Astrophysics Data System (ADS)

Hsiao, Ya-Fen; Tsai, Pin-Ju; Chen, Hung-Shiue; Lin, Sheng-Xiang; Hung, Chih-Chiao; Lee, Chih-Hsi; Chen, Yi-Hsin; Chen, Yong-Fan; Yu, Ite A.; Chen, Ying-Cheng

2018-05-01

Quantum memory is an important component in the long-distance quantum communication based on the quantum repeater protocol. To outperform the direct transmission of photons with quantum repeaters, it is crucial to develop quantum memories with high fidelity, high efficiency and a long storage time. Here, we achieve a storage efficiency of 92.0 (1.5)% for a coherent optical memory based on the electromagnetically induced transparency scheme in optically dense cold atomic media. We also obtain a useful time-bandwidth product of 1200, considering only storage where the retrieval efficiency remains above 50%. Both are the best record to date in all kinds of schemes for the realization of optical memory. Our work significantly advances the pursuit of a high-performance optical memory and should have important applications in quantum information science.

Highly Efficient Coherent Optical Memory Based on Electromagnetically Induced Transparency.

PubMed

Hsiao, Ya-Fen; Tsai, Pin-Ju; Chen, Hung-Shiue; Lin, Sheng-Xiang; Hung, Chih-Chiao; Lee, Chih-Hsi; Chen, Yi-Hsin; Chen, Yong-Fan; Yu, Ite A; Chen, Ying-Cheng

2018-05-04

Quantum memory is an important component in the long-distance quantum communication based on the quantum repeater protocol. To outperform the direct transmission of photons with quantum repeaters, it is crucial to develop quantum memories with high fidelity, high efficiency and a long storage time. Here, we achieve a storage efficiency of 92.0 (1.5)% for a coherent optical memory based on the electromagnetically induced transparency scheme in optically dense cold atomic media. We also obtain a useful time-bandwidth product of 1200, considering only storage where the retrieval efficiency remains above 50%. Both are the best record to date in all kinds of schemes for the realization of optical memory. Our work significantly advances the pursuit of a high-performance optical memory and should have important applications in quantum information science.

Faithful Solid State Optical Memory with Dynamically Decoupled Spin Wave Storage

NASA Astrophysics Data System (ADS)

Lovrić, Marko; Suter, Dieter; Ferrier, Alban; Goldner, Philippe

2013-07-01

We report a high fidelity optical memory in which dynamical decoupling is used to extend the storage time. This is demonstrated in a rare-earth doped crystal in which optical coherences were transferred to nuclear spin coherences and then protected against environmental noise by dynamical decoupling, leading to storage times of up to 4.2 ms. An interference experiment shows that relative phases of input pulses are preserved through the whole storage and retrieval process with a visibility ≈1, demonstrating the usefulness of dynamical decoupling for extending the storage time of quantum memories. We also show that dynamical decoupling sequences insensitive to initial spin coherence increase retrieval efficiency.

Faithful solid state optical memory with dynamically decoupled spin wave storage.

PubMed

Lovrić, Marko; Suter, Dieter; Ferrier, Alban; Goldner, Philippe

2013-07-12

We report a high fidelity optical memory in which dynamical decoupling is used to extend the storage time. This is demonstrated in a rare-earth doped crystal in which optical coherences were transferred to nuclear spin coherences and then protected against environmental noise by dynamical decoupling, leading to storage times of up to 4.2 ms. An interference experiment shows that relative phases of input pulses are preserved through the whole storage and retrieval process with a visibility ≈1, demonstrating the usefulness of dynamical decoupling for extending the storage time of quantum memories. We also show that dynamical decoupling sequences insensitive to initial spin coherence increase retrieval efficiency.

Space Radiation Effects in Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Johnston, A. H.

2001-01-01

Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions. Although EDAC worked well with older types of memory circuits, newer DRAMs use extremely complex internal architectures which has made it increasingly difficult to implement EDAC. Some newer DRAMs have also exhibited catastrophic latchup. Flash memories are an intriguing alternative to DRAMs because of their nonvolatile storage and extremely high storage density, particularly for applications where writing is done relatively infrequently. This paper discusses radiation effects in advanced flash memories, including general observations on scaling and architecture as well as the specific experience obtained at the Jet Propulsion Laboratory in evaluating high-density flash memories for use on the NASA mission to Europa, one of Jupiter's moons. This particular mission must pass through the Jovian radiation belts, which imposes a very demanding radiation requirement.

System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

NASA Technical Reports Server (NTRS)

Hall, William A. (Inventor)

1993-01-01

A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

Quantum memory with optically trapped atoms.

PubMed

Chuu, Chih-Sung; Strassel, Thorsten; Zhao, Bo; Koch, Markus; Chen, Yu-Ao; Chen, Shuai; Yuan, Zhen-Sheng; Schmiedmayer, Jörg; Pan, Jian-Wei

2008-09-19

We report the experimental demonstration of quantum memory for collective atomic states in a far-detuned optical dipole trap. Generation of the collective atomic state is heralded by the detection of a Raman scattered photon and accompanied by storage in the ensemble of atoms. The optical dipole trap provides confinement for the atoms during the quantum storage while retaining the atomic coherence. We probe the quantum storage by cross correlation of the photon pair arising from the Raman scattering and the retrieval of the atomic state stored in the memory. Nonclassical correlations are observed for storage times up to 60 mus.

Up-to-date state of storage techniques used for large numerical data files

NASA Technical Reports Server (NTRS)

Chlouba, V.

1975-01-01

Methods for data storage and output in data banks and memory files are discussed along with a survey of equipment available for this. Topics discussed include magnetic tapes, magnetic disks, Terabit magnetic tape memory, Unicon 690 laser memory, IBM 1360 photostore, microfilm recording equipment, holographic recording, film readers, optical character readers, digital data storage techniques, and photographic recording. The individual types of equipment are summarized in tables giving the basic technical parameters.

Cobalt germanide nanostructure formation and memory characteristic enhancement in silicon oxide films

NASA Astrophysics Data System (ADS)

Joo, Beom Soo; Kim, Hyunseung; Jang, Seunghun; Han, Dongwoo; Han, Moonsup

2018-08-01

We investigated nano-floating gate memory having a charge trap layer (CTL) composed of cobalt germanide nanostructure (ns-CoGe). A tunneling oxide layer; a CTL containing Co, Ge, and Si; and a blocking oxide layer were sequentially deposited on a p-type silicon substrate by RF magnetron sputtering and low-pressure chemical vapor deposition. We optimized the CTL formation conditions by rapid thermal annealing at a somewhat low temperature (about 830 °C) by considering the differences in Gibbs free energy and chemical enthalpy among the components. To characterize the charge storage properties, capacitance-voltage (C-V) measurements were performed. Further, we used X-ray photoelectron spectroscopy for chemical analysis of the CTL. In this work, we not only report that the C-V measurement shows a remarkable opening of the memory window for the ns-CoGe compared with those of nanostructures composed of Co or Ge alone, but also clarify that the improvement in the memory characteristics originates in the nanostructure formation, which consists mainly of Co-Ge bonds. We expect ns-CoGe to be a strong candidate for fabrication of next-generation memory devices.

Improved memory word line configuration allows high storage density

NASA Technical Reports Server (NTRS)

1966-01-01

Plated wire memory word drive line allows high storage density, good plated wire transmission and a simplified memory plane configuration. A half-turn word drive line with a magnetic keeper is used. The ground plane provides the return path for both the word current and the plated wire transmission line.

Accessing global data from accelerator devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less

Training of Attentional Filtering, but Not of Memory Storage, Enhances Working Memory Efficiency by Strengthening the Neuronal Gatekeeper Network.

PubMed

Schmicker, Marlen; Schwefel, Melanie; Vellage, Anne-Katrin; Müller, Notger G

2016-04-01

Memory training (MT) in older adults with memory deficits often leads to frustration and, therefore, is usually not recommended. Here, we pursued an alternative approach and looked for transfer effects of 1-week attentional filter training (FT) on working memory performance and its neuronal correlates in young healthy humans. The FT effects were compared with pure MT, which lacked the necessity to filter out irrelevant information. Before and after training, all participants performed an fMRI experiment that included a combined task in which stimuli had to be both filtered based on color and stored in memory. We found that training induced processing changes by biasing either filtering or storage. FT induced larger transfer effects on the untrained cognitive function than MT. FT increased neuronal activity in frontal parts of the neuronal gatekeeper network, which is proposed to hinder irrelevant information from being unnecessarily stored in memory. MT decreased neuronal activity in the BG part of the gatekeeper network but enhanced activity in the parietal storage node. We take these findings as evidence that FT renders working memory more efficient by strengthening the BG-prefrontal gatekeeper network. MT, on the other hand, simply stimulates storage of any kind of information. These findings illustrate a tight connection between working memory and attention, and they may open up new avenues for ameliorating memory deficits in patients with cognitive impairments.

Storage or Retrieval Deficit: The Yin and Yang of Amnesia

ERIC Educational Resources Information Center

Hardt, Oliver; Wang, Szu-Han; Nader, Karim

2009-01-01

To this day, it remains unresolved whether experimental amnesia reflects failed memory storage or the inability to retrieve otherwise intact memory. Methodological as well as conceptual reasons prevented deciding between these two alternatives: The absence of recovery from amnesia is typically taken as supporting storage impairment…

Structural Components of Synaptic Plasticity and Memory Consolidation

PubMed Central

Bailey, Craig H.; Kandel, Eric R.; Harris, Kristen M.

2015-01-01

Consolidation of implicit memory in the invertebrate Aplysia and explicit memory in the mammalian hippocampus are associated with remodeling and growth of preexisting synapses and the formation of new synapses. Here, we compare and contrast structural components of the synaptic plasticity that underlies these two distinct forms of memory. In both cases, the structural changes involve time-dependent processes. Thus, some modifications are transient and may contribute to early formative stages of long-term memory, whereas others are more stable, longer lasting, and likely to confer persistence to memory storage. In addition, we explore the possibility that trans-synaptic signaling mechanisms governing de novo synapse formation during development can be reused in the adult for the purposes of structural synaptic plasticity and memory storage. Finally, we discuss how these mechanisms set in motion structural rearrangements that prepare a synapse to strengthen the same memory and, perhaps, to allow it to take part in other memories as a basis for understanding how their anatomical representation results in the enhanced expression and storage of memories in the brain. PMID:26134321

Adult age differences in the storage of information in working memory.

PubMed

Foos, P W; Wright, L

1992-01-01

The performance of 97 young and 91 old persons were compared to determine if a deficiency in working memory resources for processing, storage, or allocation could be detected. Persons simultaneously performed a storage and one of two processing tasks while instructed to allocate resources to processing, storage, or both tasks. The storage task involved remembering the names of one, three, or five persons. Processing tasks involved solving addition problems presented on flashcards or answering common knowledge questions. Results showed increased age differences on the storage task as demands for resources increased but no differences on processing tasks. Individuals seemed unable to allocate resources as instructed. A comparison of young-old and old-old groups showed the same results as those obtained comparing young and old groups and support the hypothesis of a deficiency of storage, but not processing, resources in working memory for old, especially old-old, adults.

Memory hierarchy using row-based compression

DOEpatents

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

Petabyte mass memory system using the Newell Opticel(TM)

NASA Technical Reports Server (NTRS)

Newell, Chester W.

1994-01-01

A random access system is proposed for digital storage and retrieval of up to a Petabyte of user data. The system is comprised of stacked memory modules using laser heads writing to an optical medium, in a new shirt-pocket-sized optical storage device called the Opticel. The Opticel described is a completely sealed 'black box' in which an optical medium is accelerated and driven at very high rates to accommodate the desired transfer rates, yet in such a manner that wear is virtually eliminated. It essentially emulates a disk, but with storage area up to several orders of magnitude higher. Access time to the first bit can range from a few milliseconds to a fraction of a second, with time to the last bit within a fraction of a second to a few seconds. The actual times are dependent on the capacity of each Opticel, which ranges from 72 Gigabytes to 1.25 Terabytes. Data transfer rate is limited strictly by the head and electronics, and is 15 Megabits per second in the first version. Independent parallel write/read access to each Opticel is provided using dedicated drives and heads. A Petabyte based on the present Opticel and drive design would occupy 120 cubic feet on a footprint of 45 square feet; with further development, it could occupy as little as 9 cubic feet.

Using electrophysiology to demonstrate that cuing affects long-term memory storage over the short term

PubMed Central

Maxcey, Ashleigh M.; Fukuda, Keisuke; Song, Won S.; Woodman, Geoffrey F.

2015-01-01

As researchers who study working memory, we often assume that participants keep a representation of an object in working memory when we present a cue that indicates that object will be tested in a couple of seconds. This intuitively accounts for how well people can remember a cued object relative to their memory for that same object presented without a cue. However, it is possible that this superior memory does not purely reflect storage of the cued object in working memory. We tested the hypothesis that cued presented during a stream of objects, followed by a short retention interval and immediate memory test, change how information is handled by long-term memory. We tested this hypothesis using a family of frontal event-related potentials (ERPs) believed to reflect long-term memory storage. We found that these frontal indices of long-term memory were sensitive to the task relevance of objects signaled by auditory cues, even when objects repeat frequently such that proactive interference was high. Our findings indicate the problematic nature of assuming process purity in the study of working memory, and demonstrate how frequent stimulus repetitions fail to isolate the role of working memory mechanisms. PMID:25604772

Using electrophysiology to demonstrate that cueing affects long-term memory storage over the short term.

PubMed

Maxcey, Ashleigh M; Fukuda, Keisuke; Song, Won S; Woodman, Geoffrey F

2015-10-01

As researchers who study working memory, we often assume that participants keep a representation of an object in working memory when we present a cue that indicates that the object will be tested in a couple of seconds. This intuitively accounts for how well people can remember a cued object, relative to their memory for that same object presented without a cue. However, it is possible that this superior memory does not purely reflect storage of the cued object in working memory. We tested the hypothesis that cues presented during a stream of objects, followed by a short retention interval and immediate memory test, can change how information is handled by long-term memory. We tested this hypothesis by using a family of frontal event-related potentials believed to reflect long-term memory storage. We found that these frontal indices of long-term memory were sensitive to the task relevance of objects signaled by auditory cues, even when the objects repeated frequently, such that proactive interference was high. Our findings indicate the problematic nature of assuming process purity in the study of working memory, and demonstrate that frequent stimulus repetitions fail to isolate the role of working memory mechanisms.

Spaceborne Processor Array

NASA Technical Reports Server (NTRS)

Chow, Edward T.; Schatzel, Donald V.; Whitaker, William D.; Sterling, Thomas

2008-01-01

A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

Efficient packing of patterns in sparse distributed memory by selective weighting of input bits

NASA Technical Reports Server (NTRS)

Kanerva, Pentti

1991-01-01

When a set of patterns is stored in a distributed memory, any given storage location participates in the storage of many patterns. From the perspective of any one stored pattern, the other patterns act as noise, and such noise limits the memory's storage capacity. The more similar the retrieval cues for two patterns are, the more the patterns interfere with each other in memory, and the harder it is to separate them on retrieval. A method is described of weighting the retrieval cues to reduce such interference and thus to improve the separability of patterns that have similar cues.

A Comprehensive Investigation of Memory Impairment in Attention Deficit Hyperactivity Disorder and Oppositional Defiant Disorder

ERIC Educational Resources Information Center

Rhodes, Sinead M.; Park, Joanne; Seth, Sarah; Coghill, David R.

2012-01-01

Background: We conducted a comprehensive and systematic assessment of memory functioning in drug-naive boys with attention deficit hyperactivity disorder (ADHD) and oppositional defiant disorder (ODD). Methods: Boys performed verbal and spatial working memory (WM) component (storage and central executive) and verbal and spatial storage load tasks,…

On the Law Relating Processing to Storage in Working Memory

ERIC Educational Resources Information Center

Barrouillet, Pierre; Portrat, Sophie; Camos, Valerie

2011-01-01

"Working memory" is usually defined in cognitive psychology as a system devoted to the simultaneous processing and maintenance of information. However, although many models of working memory have been put forward during the last decades, they often leave underspecified the dynamic interplay between processing and storage. Moreover, the account of…

Coherence time of over a second in a telecom-compatible quantum memory storage material

NASA Astrophysics Data System (ADS)

Rančić, Miloš; Hedges, Morgan P.; Ahlefeldt, Rose L.; Sellars, Matthew J.

2018-01-01

Quantum memories for light will be essential elements in future long-range quantum communication networks. These memories operate by reversibly mapping the quantum state of light onto the quantum transitions of a material system. For networks, the quantum coherence times of these transitions must be long compared to the network transmission times, approximately 100 ms for a global communication network. Due to a lack of a suitable storage material, a quantum memory that operates in the 1,550 nm optical fibre communication band with a storage time greater than 1 μs has not been demonstrated. Here we describe the spin dynamics of 167Er3+: Y2SiO5 in a high magnetic field and demonstrate that this material has the characteristics for a practical quantum memory in the 1,550 nm communication band. We observe a hyperfine coherence time of 1.3 s. We also demonstrate efficient spin pumping of the entire ensemble into a single hyperfine state, a requirement for broadband spin-wave storage. With an absorption of 70 dB cm-1 at 1,538 nm and Λ transitions enabling spin-wave storage, this material is the first candidate identified for an efficient, broadband quantum memory at telecommunication wavelengths.

Contribution of underlying processes to improved visuospatial working memory associated with physical activity.

PubMed

Ji, Qingchun; Wang, Yingying; Guo, Wei; Zhou, Chenglin

2017-01-01

Working memory is critical for various cognitive processes and can be separated into two stages: short-term memory storage and manipulation processing. Although previous studies have demonstrated that increased physical activity (PA) improves working memory and that males outperform females on visuospatial working memory tasks, few studies have determined the contribution of the two underlying stages to the visuospatial working memory improvement associated with PA. Thus, the aims of the present study were to verify the relationship between physical activity and visuospatial working memory, determine whether one or both stages were affected by PA, and investigate any sex differences. A total of 56 undergraduate students were recruited for this study. Their scores on the International Physical Activity Questionnaire (IPAQ) were used to separate them into either a lower PA ( n  = 26; IPAQ score ≤3,000 metabolic equivalent [MET]-min/week) or higher PA ( n  = 30; IPAQ score >3,000 MET-min/week) group. Participants were required to complete three tasks: a visuospatial working memory task, a task that examines the short-term memory storage stage, and a mental rotation task that examines the active manipulation stage. Participants in the higher PA group maintained similar accuracy but displayed significantly faster reaction times (RT) than those in the lower PA group on the visuospatial working memory and manipulation tasks. By contrast, no difference was observed between groups on the short-term memory storage task. In addition, no effects of sex were detected. Our results confirm that PA was positively to visuospatial working memory and that this positive relationship was associated with more rapid cognitive processing during the manipulation stage, with little or no relationship between PA and the memory storage stage of visuospatial working memory.

Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

NASA Astrophysics Data System (ADS)

She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

2013-09-01

Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

Simple Atomic Quantum Memory Suitable for Semiconductor Quantum Dot Single Photons

NASA Astrophysics Data System (ADS)

Wolters, Janik; Buser, Gianni; Horsley, Andrew; Béguin, Lucas; Jöckel, Andreas; Jahn, Jan-Philipp; Warburton, Richard J.; Treutlein, Philipp

2017-08-01

Quantum memories matched to single photon sources will form an important cornerstone of future quantum network technology. We demonstrate such a memory in warm Rb vapor with on-demand storage and retrieval, based on electromagnetically induced transparency. With an acceptance bandwidth of δ f =0.66 GHz , the memory is suitable for single photons emitted by semiconductor quantum dots. In this regime, vapor cell memories offer an excellent compromise between storage efficiency, storage time, noise level, and experimental complexity, and atomic collisions have negligible influence on the optical coherences. Operation of the memory is demonstrated using attenuated laser pulses on the single photon level. For a 50 ns storage time, we measure ηe2 e 50 ns=3.4 (3 )% end-to-end efficiency of the fiber-coupled memory, with a total intrinsic efficiency ηint=17 (3 )%. Straightforward technological improvements can boost the end-to-end-efficiency to ηe 2 e≈35 %; beyond that, increasing the optical depth and exploiting the Zeeman substructure of the atoms will allow such a memory to approach near unity efficiency. In the present memory, the unconditional read-out noise level of 9 ×10-3 photons is dominated by atomic fluorescence, and for input pulses containing on average μ1=0.27 (4 ) photons, the signal to noise level would be unity.

Simple Atomic Quantum Memory Suitable for Semiconductor Quantum Dot Single Photons.

PubMed

Wolters, Janik; Buser, Gianni; Horsley, Andrew; Béguin, Lucas; Jöckel, Andreas; Jahn, Jan-Philipp; Warburton, Richard J; Treutlein, Philipp

2017-08-11

Quantum memories matched to single photon sources will form an important cornerstone of future quantum network technology. We demonstrate such a memory in warm Rb vapor with on-demand storage and retrieval, based on electromagnetically induced transparency. With an acceptance bandwidth of δf=0.66  GHz, the memory is suitable for single photons emitted by semiconductor quantum dots. In this regime, vapor cell memories offer an excellent compromise between storage efficiency, storage time, noise level, and experimental complexity, and atomic collisions have negligible influence on the optical coherences. Operation of the memory is demonstrated using attenuated laser pulses on the single photon level. For a 50 ns storage time, we measure η_{e2e}^{50  ns}=3.4(3)% end-to-end efficiency of the fiber-coupled memory, with a total intrinsic efficiency η_{int}=17(3)%. Straightforward technological improvements can boost the end-to-end-efficiency to η_{e2e}≈35%; beyond that, increasing the optical depth and exploiting the Zeeman substructure of the atoms will allow such a memory to approach near unity efficiency. In the present memory, the unconditional read-out noise level of 9×10^{-3} photons is dominated by atomic fluorescence, and for input pulses containing on average μ_{1}=0.27(4) photons, the signal to noise level would be unity.

Nanocrystals embedded in hafnium dioxide-based dielectrics as charge storage nodes of nano-floating gate memory

NASA Astrophysics Data System (ADS)

Lee, Pui Fai

2007-12-01

Nanocrystals (NC) embedded in dielectrics have attracted a great deal of attention recently because they can potentially be applied in nonvolatile, high-speed, high-density and low-power memory devices. This device benefits from a relatively low operating voltage, high endurance, fast write-erase speeds and better immunity to soft errors. The nanocrystal materials suitable for such an application can be either metals or semiconductors. Recent studies have shown that high-k dielectrics, instead of SiO2 , for the tunneling layer in nanocrystal floating gate memory can improve the trade-off between data retention and program efficiency due to the unique band alignment of high-k dielectrics in the programming and retention modes. In this project, HfAlO has been selected as the high- k dielectric for the nanocrystal floating gate memory structure. The trilayer structure (HfAlO/Ge-NC/HfAlO) on Si was fabricated by PLD. Results revealed that relatively low substrate temperature and growth rate are favourable for the formation of smaller-size Ge nanocrystals. Effects of size/density of the Ge nanocrystal, the tunneling and control oxide layer thicknesses and the oxygen partial pressure during their growth on the charge storage and charge retention characteristics have also been studied. The island structure of the Ge nanocrystal suggests that the growth is based on the Volmer-Webber mode. The self-organized Ge nanocrystals so formed were uniform in size (5--20 nm diameter) and distribution with a density approaching 1012--1013cm-2. Flat-band voltage shift (DeltaVFB) of about 3.6 V and good retention property have been achieved. By varying aggregation distance, sputtering gas pressure and ionization power of the nanocluster source, nanoclusters of Ge with different sizes can be formed. The memory effect of the trilayer structure so formed with 10 nm Ge nanoclusters are manifested by the counter-clockwise hysteresis loop in the C-V curves and a maximum flat-band voltage shift of 5.0 V has been achieved. For comparison purposes, metal nanocrystals have also been investigated by utilizing both of the physical deposition methods as mentioned above. Silver (Ag) nanocrystals with size of 10--40 nm have been embedded in HfAlO matrix in the trilayer capacitor structure and a flat-band voltage shift of 2.0 V has been achieved.

Levels of processing and language modality specificity in working memory.

PubMed

Rudner, Mary; Karlsson, Thomas; Gunnarsson, Johan; Rönnberg, Jerker

2013-03-01

Neural networks underpinning working memory demonstrate sign language specific components possibly related to differences in temporary storage mechanisms. A processing approach to memory systems suggests that the organisation of memory storage is related to type of memory processing as well. In the present study, we investigated for the first time semantic, phonological and orthographic processing in working memory for sign- and speech-based language. During fMRI we administered a picture-based 2-back working memory task with Semantic, Phonological, Orthographic and Baseline conditions to 11 deaf signers and 20 hearing non-signers. Behavioural data showed poorer and slower performance for both groups in Phonological and Orthographic conditions than in the Semantic condition, in line with depth-of-processing theory. An exclusive masking procedure revealed distinct sign-specific neural networks supporting working memory components at all three levels of processing. The overall pattern of sign-specific activations may reflect a relative intermodality difference in the relationship between phonology and semantics influencing working memory storage and processing. Copyright © 2012 Elsevier Ltd. All rights reserved.

The contribution of temporary storage and executive processes to category learning.

PubMed

Wang, Tengfei; Ren, Xuezhu; Schweizer, Karl

2015-09-01

Three distinctly different working memory processes, temporary storage, mental shifting and inhibition, were proposed to account for individual differences in category learning. A sample of 213 participants completed a classic category learning task and two working memory tasks that were experimentally manipulated for tapping specific working memory processes. Fixed-links models were used to decompose data of the category learning task into two independent components representing basic performance and improvement in performance in category learning. Processes of working memory were also represented by fixed-links models. In a next step the three working memory processes were linked to components of category learning. Results from modeling analyses indicated that temporary storage had a significant effect on basic performance and shifting had a moderate effect on improvement in performance. In contrast, inhibition showed no effect on any component of the category learning task. These results suggest that temporary storage and the shifting process play different roles in the course of acquiring new categories. Copyright © 2015 Elsevier B.V. All rights reserved.

Highly-efficient quantum memory for polarization qubits in a spatially-multiplexed cold atomic ensemble.

PubMed

Vernaz-Gris, Pierre; Huang, Kun; Cao, Mingtao; Sheremet, Alexandra S; Laurat, Julien

2018-01-25

Quantum memory for flying optical qubits is a key enabler for a wide range of applications in quantum information. A critical figure of merit is the overall storage and retrieval efficiency. So far, despite the recent achievements of efficient memories for light pulses, the storage of qubits has suffered from limited efficiency. Here we report on a quantum memory for polarization qubits that combines an average conditional fidelity above 99% and efficiency around 68%, thereby demonstrating a reversible qubit mapping where more information is retrieved than lost. The qubits are encoded with weak coherent states at the single-photon level and the memory is based on electromagnetically-induced transparency in an elongated laser-cooled ensemble of cesium atoms, spatially multiplexed for dual-rail storage. This implementation preserves high optical depth on both rails, without compromise between multiplexing and storage efficiency. Our work provides an efficient node for future tests of quantum network functionalities and advanced photonic circuits.

Volume Holographic Storage of Digital Data Implemented in Photorefractive Media

NASA Astrophysics Data System (ADS)

Heanue, John Frederick

A holographic data storage system is fundamentally different from conventional storage devices. Information is recorded in a volume, rather than on a two-dimensional surface. Data is transferred in parallel, on a page-by -page basis, rather than serially. These properties, combined with a limited need for mechanical motion, lead to the potential for a storage system with high capacity, fast transfer rate, and short access time. The majority of previous volume holographic storage experiments have involved direct storage and retrieval of pictorial information. Success in the development of a practical holographic storage device requires an understanding of the performance capabilities of a digital system. This thesis presents a number of contributions toward this goal. A description of light diffraction from volume gratings is given. The results are used as the basis for a theoretical and numerical analysis of interpage crosstalk in both angular and wavelength multiplexed holographic storage. An analysis of photorefractive grating formation in photovoltaic media such as lithium niobate is presented along with steady-state expressions for the space-charge field in thermal fixing. Thermal fixing by room temperature recording followed by ion compensation at elevated temperatures is compared to simultaneous recording and compensation at high temperature. In particular, the tradeoff between diffraction efficiency and incomplete Bragg matching is evaluated. An experimental investigation of orthogonal phase code multiplexing is described. Two unique capabilities, the ability to perform arithmetic operations on stored data pages optically, rather than electronically, and encrypted data storage, are demonstrated. A comparison of digital signal representations, or channel codes, is carried out. The codes are compared in terms of bit-error rate performance at constant capacity. A well-known one-dimensional digital detection technique, maximum likelihood sequence estimation, is extended for use in a two-dimensional page format memory. The effectiveness of the technique in a system corrupted by intersymbol interference is investigated both experimentally and through numerical simulations. The experimental implementation of a fully-automated multiple page digital holographic storage system is described. Finally, projections of the performance limits of holographic data storage are made taking into account typical noise sources.

RRAM-based parallel computing architecture using k-nearest neighbor classification for pattern recognition

NASA Astrophysics Data System (ADS)

Jiang, Yuning; Kang, Jinfeng; Wang, Xinan

2017-03-01

Resistive switching memory (RRAM) is considered as one of the most promising devices for parallel computing solutions that may overcome the von Neumann bottleneck of today’s electronic systems. However, the existing RRAM-based parallel computing architectures suffer from practical problems such as device variations and extra computing circuits. In this work, we propose a novel parallel computing architecture for pattern recognition by implementing k-nearest neighbor classification on metal-oxide RRAM crossbar arrays. Metal-oxide RRAM with gradual RESET behaviors is chosen as both the storage and computing components. The proposed architecture is tested by the MNIST database. High speed (~100 ns per example) and high recognition accuracy (97.05%) are obtained. The influence of several non-ideal device properties is also discussed, and it turns out that the proposed architecture shows great tolerance to device variations. This work paves a new way to achieve RRAM-based parallel computing hardware systems with high performance.

Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device.

PubMed

Park, Sangsu; Noh, Jinwoo; Choo, Myung-Lae; Sheri, Ahmad Muqeem; Chang, Man; Kim, Young-Bae; Kim, Chang Jung; Jeon, Moongu; Lee, Byung-Geun; Lee, Byoung Hun; Hwang, Hyunsang

2013-09-27

Efforts to develop scalable learning algorithms for implementation of networks of spiking neurons in silicon have been hindered by the considerable footprints of learning circuits, which grow as the number of synapses increases. Recent developments in nanotechnologies provide an extremely compact device with low-power consumption.In particular, nanoscale resistive switching devices (resistive random-access memory (RRAM)) are regarded as a promising solution for implementation of biological synapses due to their nanoscale dimensions, capacity to store multiple bits and the low energy required to operate distinct states. In this paper, we report the fabrication, modeling and implementation of nanoscale RRAM with multi-level storage capability for an electronic synapse device. In addition, we first experimentally demonstrate the learning capabilities and predictable performance by a neuromorphic circuit composed of a nanoscale 1 kbit RRAM cross-point array of synapses and complementary metal-oxide-semiconductor neuron circuits. These developments open up possibilities for the development of ubiquitous ultra-dense, ultra-low-power cognitive computers.

Contralateral Delay Activity Tracks Fluctuations in Working Memory Performance.

PubMed

Adam, Kirsten C S; Robison, Matthew K; Vogel, Edward K

2018-01-08

Neural measures of working memory storage, such as the contralateral delay activity (CDA), are powerful tools in working memory research. CDA amplitude is sensitive to working memory load, reaches an asymptote at known behavioral limits, and predicts individual differences in capacity. An open question, however, is whether neural measures of load also track trial-by-trial fluctuations in performance. Here, we used a whole-report working memory task to test the relationship between CDA amplitude and working memory performance. If working memory failures are due to decision-based errors and retrieval failures, CDA amplitude would not differentiate good and poor performance trials when load is held constant. If failures arise during storage, then CDA amplitude should track both working memory load and trial-by-trial performance. As expected, CDA amplitude tracked load (Experiment 1), reaching an asymptote at three items. In Experiment 2, we tracked fluctuations in trial-by-trial performance. CDA amplitude was larger (more negative) for high-performance trials compared with low-performance trials, suggesting that fluctuations in performance were related to the successful storage of items. During working memory failures, participants oriented their attention to the correct side of the screen (lateralized P1) and maintained covert attention to the correct side during the delay period (lateralized alpha power suppression). Despite the preservation of attentional orienting, we found impairments consistent with an executive attention theory of individual differences in working memory capacity; fluctuations in executive control (indexed by pretrial frontal theta power) may be to blame for storage failures.

Holographic memory for high-density data storage and high-speed pattern recognition

NASA Astrophysics Data System (ADS)

Gu, Claire

2002-09-01

As computers and the internet become faster and faster, more and more information is transmitted, received, and stored everyday. The demand for high density and fast access time data storage is pushing scientists and engineers to explore all possible approaches including magnetic, mechanical, optical, etc. Optical data storage has already demonstrated its potential in the competition against other storage technologies. CD and DVD are showing their advantages in the computer and entertainment market. What motivated the use of optical waves to store and access information is the same as the motivation for optical communication. Light or an optical wave has an enormous capacity (or bandwidth) to carry information because of its short wavelength and parallel nature. In optical storage, there are two types of mechanism, namely localized and holographic memories. What gives the holographic data storage an advantage over localized bit storage is the natural ability to read the stored information in parallel, therefore, meeting the demand for fast access. Another unique feature that makes the holographic data storage attractive is that it is capable of performing associative recall at an incomparable speed. Therefore, volume holographic memory is particularly suitable for high-density data storage and high-speed pattern recognition. In this paper, we review previous works on volume holographic memories and discuss the challenges for this technology to become a reality.

Theoretical potential for low energy consumption phase change memory utilizing electrostatically-induced structural phase transitions in 2D materials

NASA Astrophysics Data System (ADS)

Rehn, Daniel A.; Li, Yao; Pop, Eric; Reed, Evan J.

2018-01-01

Structural phase-change materials are of great importance for applications in information storage devices. Thermally driven structural phase transitions are employed in phase-change memory to achieve lower programming voltages and potentially lower energy consumption than mainstream nonvolatile memory technologies. However, the waste heat generated by such thermal mechanisms is often not optimized, and could present a limiting factor to widespread use. The potential for electrostatically driven structural phase transitions has recently been predicted and subsequently reported in some two-dimensional materials, providing an athermal mechanism to dynamically control properties of these materials in a nonvolatile fashion while achieving potentially lower energy consumption. In this work, we employ DFT-based calculations to make theoretical comparisons of the energy required to drive electrostatically-induced and thermally-induced phase transitions. Determining theoretical limits in monolayer MoTe2 and thin films of Ge2Sb2Te5, we find that the energy consumption per unit volume of the electrostatically driven phase transition in monolayer MoTe2 at room temperature is 9% of the adiabatic lower limit of the thermally driven phase transition in Ge2Sb2Te5. Furthermore, experimentally reported phase change energy consumption of Ge2Sb2Te5 is 100-10,000 times larger than the adiabatic lower limit due to waste heat flow out of the material, leaving the possibility for energy consumption in monolayer MoTe2-based devices to be orders of magnitude smaller than Ge2Sb2Te5-based devices.

Performance analysis and comparison of a minimum interconnections direct storage model with traditional neural bidirectional memories.

PubMed

Bhatti, A Aziz

2009-12-01

This study proposes an efficient and improved model of a direct storage bidirectional memory, improved bidirectional associative memory (IBAM), and emphasises the use of nanotechnology for efficient implementation of such large-scale neural network structures at a considerable lower cost reduced complexity, and less area required for implementation. This memory model directly stores the X and Y associated sets of M bipolar binary vectors in the form of (MxN(x)) and (MxN(y)) memory matrices, requires O(N) or about 30% of interconnections with weight strength ranging between +/-1, and is computationally very efficient as compared to sequential, intraconnected and other bidirectional associative memory (BAM) models of outer-product type that require O(N(2)) complex interconnections with weight strength ranging between +/-M. It is shown that it is functionally equivalent to and possesses all attributes of a BAM of outer-product type, and yet it is simple and robust in structure, very large scale integration (VLSI), optical and nanotechnology realisable, modular and expandable neural network bidirectional associative memory model in which the addition or deletion of a pair of vectors does not require changes in the strength of interconnections of the entire memory matrix. The analysis of retrieval process, signal-to-noise ratio, storage capacity and stability of the proposed model as well as of the traditional BAM has been carried out. Constraints on and characteristics of unipolar and bipolar binaries for improved storage and retrieval are discussed. The simulation results show that it has log(e) N times higher storage capacity, superior performance, faster convergence and retrieval time, when compared to traditional sequential and intraconnected bidirectional memories.

Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure.

PubMed

Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

2009-01-14

The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

Brain region-specific activity patterns after recent or remote memory retrieval of auditory conditioned fear.

PubMed

Kwon, Jeong-Tae; Jhang, Jinho; Kim, Hyung-Su; Lee, Sujin; Han, Jin-Hee

2012-09-19

Memory is thought to be sparsely encoded throughout multiple brain regions forming unique memory trace. Although evidence has established that the amygdala is a key brain site for memory storage and retrieval of auditory conditioned fear memory, it remains elusive whether the auditory brain regions may be involved in fear memory storage or retrieval. To investigate this possibility, we systematically imaged the brain activity patterns in the lateral amygdala, MGm/PIN, and AuV/TeA using activity-dependent induction of immediate early gene zif268 after recent and remote memory retrieval of auditory conditioned fear. Consistent with the critical role of the amygdala in fear memory, the zif268 activity in the lateral amygdala was significantly increased after both recent and remote memory retrieval. Interesting, however, the density of zif268 (+) neurons in both MGm/PIN and AuV/TeA, particularly in layers IV and VI, was increased only after remote but not recent fear memory retrieval compared to control groups. Further analysis of zif268 signals in AuV/TeA revealed that conditioned tone induced stronger zif268 induction compared to familiar tone in each individual zif268 (+) neuron after recent memory retrieval. Taken together, our results support that the lateral amygdala is a key brain site for permanent fear memory storage and suggest that MGm/PIN and AuV/TeA might play a role for remote memory storage or retrieval of auditory conditioned fear, or, alternatively, that these auditory brain regions might have a different way of processing for familiar or conditioned tone information at recent and remote time phases.

The storage and recall of auditory memory.

PubMed

Nebenzahl, I; Albeck, Y

1990-01-01

The architecture of the auditory memory is investigated. The auditory information is assumed to be represented by f-t patterns. With the help of a psycho-physical experiment it is demonstrated that the storage of these patterns is highly folded in the sense that a long signal is broken into many short stretches before being stored in the memory. Recognition takes place by correlating newly heard input in the short term memory to information previously stored in the long term memory. We show that this correlation is performed after the input is accumulated and held statically in the short term memory.

An enhanced technique for mobile cloudlet offloading with reduced computation using compression in the cloud

NASA Astrophysics Data System (ADS)

Moro, A. C.; Nadesh, R. K.

2017-11-01

The cloud computing paradigm has transformed the way we do business in today’s world. Services on cloud have come a long way since just providing basic storage or software on demand. One of the fastest growing factor in this is mobile cloud computing. With the option of offloading now available to mobile users, mobile users can offload entire applications onto cloudlets. With the problems regarding availability and limited-storage capacity of these mobile cloudlets, it becomes difficult to decide for the mobile user when to use his local memory or the cloudlets. Hence, we take a look at a fast algorithm that decides whether the mobile user should go for cloudlet or rely on local memory based on an offloading probability. We have partially implemented the algorithm which decides whether the task can be carried out locally or given to a cloudlet. But as it becomes a burden on the mobile devices to perform the complete computation, so we look to offload this on to a cloud in our paper. Also further we use a file compression technique before sending the file onto the cloud to further reduce the load.

Current-driven dynamics of skyrmions stabilized in MnSi nanowires revealed by topological Hall effect

PubMed Central

Liang, Dong; DeGrave, John P.; Stolt, Matthew J.; Tokura, Yoshinori; Jin, Song

2015-01-01

Skyrmions hold promise for next-generation magnetic storage as their nanoscale dimensions may enable high information storage density and their low threshold for current-driven motion may enable ultra-low energy consumption. Skyrmion-hosting nanowires not only serve as a natural platform for magnetic racetrack memory devices but also stabilize skyrmions. Here we use the topological Hall effect (THE) to study phase stability and current-driven dynamics of skyrmions in MnSi nanowires. THE is observed in an extended magnetic field-temperature window (15–30 K), suggesting stabilization of skyrmions in nanowires compared with the bulk. Furthermore, we show in nanowires that under the high current density of 108–109 A m−2, the THE decreases with increasing current densities, which demonstrates the current-driven motion of skyrmions generating the emergent electric field in the extended skyrmion phase region. These results open up the exploration of skyrmions in nanowires for fundamental physics and magnetic storage technologies. PMID:26400204

How Working Memory Relates to Children's Reading Comprehension: The Importance of Domain-Specificity in Storage and Processing

ERIC Educational Resources Information Center

Nouwens, Suzan; Groen, Margriet A.; Verhoeven, Ludo

2017-01-01

Working memory is considered a well-established predictor of individual variation in reading comprehension in children and adults. However, how storage and processing capacities of working memory in both the phonological and semantic domain relate to reading comprehension is still unclear. In the current study, we investigated the contribution of…

Energy-band engineering for tunable memory characteristics through controlled doping of reduced graphene oxide.

PubMed

Han, Su-Ting; Zhou, Ye; Yang, Qing Dan; Zhou, Li; Huang, Long-Biao; Yan, Yan; Lee, Chun-Sing; Roy, Vellaisamy A L

2014-02-25

Tunable memory characteristics are used in multioperational mode circuits where memory cells with various functionalities are needed in one combined device. It is always a challenge to obtain control over threshold voltage for multimode operation. On this regard, we use a strategy of shifting the work function of reduced graphene oxide (rGO) in a controlled manner through doping gold chloride (AuCl3) and obtained a gradient increase of rGO work function. By inserting doped rGO as floating gate, a controlled threshold voltage (Vth) shift has been achieved in both p- and n-type low voltage flexible memory devices with large memory window (up to 4 times for p-type and 8 times for n-type memory devices) in comparison with pristine rGO floating gate memory devices. By proper energy band engineering, we demonstrated a flexible floating gate memory device with larger memory window and controlled threshold voltage shifts.

Novel nano materials for high performance logic and memory devices

NASA Astrophysics Data System (ADS)

Das, Saptarshi

After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the device area -- in this way ultimately improving the packing density and leading towards high performance memory devices.

Down Syndrome and Short-Term Memory Impairment: A Storage or Retrieval Deficit?

ERIC Educational Resources Information Center

Adler, Sol; McDade, Hiram L.

1980-01-01

Three groups of eight Ss (Down's syndrome, CA control, and MA control) received a battery of tests to assess recall and recognition memory using either auditory or visual input with verbal and nonverbal responses. Results indicated that the Down's syndrome group possessed deficits in both storage and retrieval abilities, with storage of visually…

Influence of Synaptic Depression on Memory Storage Capacity

NASA Astrophysics Data System (ADS)

Otsubo, Yosuke; Nagata, Kenji; Oizumi, Masafumi; Okada, Masato

2011-08-01

Synaptic efficacy between neurons is known to change within a short time scale dynamically. Neurophysiological experiments show that high-frequency presynaptic inputs decrease synaptic efficacy between neurons. This phenomenon is called synaptic depression, a short term synaptic plasticity. Many researchers have investigated how the synaptic depression affects the memory storage capacity. However, the noise has not been taken into consideration in their analysis. By introducing ``temperature'', which controls the level of the noise, into an update rule of neurons, we investigate the effects of synaptic depression on the memory storage capacity in the presence of the noise. We analytically compute the storage capacity by using a statistical mechanics technique called Self Consistent Signal to Noise Analysis (SCSNA). We find that the synaptic depression decreases the storage capacity in the case of finite temperature in contrast to the case of the low temperature limit, where the storage capacity does not change.

EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

NASA Astrophysics Data System (ADS)

Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

2011-06-01

Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show that limiting the current during electroforming leads to the coexistence of two resistance switching modes in TiO2 memristive devices [2]. They also present spectromicroscopic observations and modelling results for the Joule heating during switching, providing insights into the ON/OFF switching process [3]. Researchers in Korea have examined in detail the mechanism of electronic bipolar resistance switching in the Pt/TiO2/Pt structure and show that degradation in switching performance of this system can be explained by the modified distribution of trap densities [4]. The issue also includes studies of TiO2 that demonstrate analog memory, synaptic plasticity, and spike-timing-dependent plasticity functions, work that contributes to the development of neuromorphic devices that have high efficiency and low power consumption [5]. In addition to enabling a wide range of data storage and logic applications, electroresistive non-volatile memories invite us to re-evaluate the long-held paradigms in the condensed matter physics of oxides. In the past three years, much attention has been attracted to polarization-mediated electronic transport [6, 7] and domain wall conduction [8] as the key to the next generation of electronic and spintronic devices based on ferroelectric tunnelling barriers. Typically local probe experiments are performed on an ambient scanning probe microscope platform under conditions of high voltage stresses, conditions highly conducive to electrochemical reactions. Recent experiments [9-13] suggest that ionic motion can heavily contribute to the measured responses and compete with purely physical mechanisms. Electrochemical effects can also be expected in non-ferroelectric materials such as manganites and cobaltites, as well as for thick ferroelectrics under high-field conditions, as in capacitors and tunnelling junctions where the ionic motion could be a major contributor to electric field-induced strain. Such strain, in turn, can affect the effective barrier width in tunnelling experiments, resulting in memristive ionic switching. These phenomena must be differentiated from intrinsic physical polarization switching effects. Similar analysis of solid-state electrochemistry versus physical mechanisms is also important for future research in all areas of oxide materials. In an age where miniaturised computer components can enable GPS tracking, internet access and even the remote operation of machinery from a mobile phone, there is an endearing quaintness associated with images of the large rooms rammed with wires and boxes that comprised early computers. Yet there was a time when these cumbersome devices were state of the art. When the electronic numerical integrator and computer (ENIAC) was developed it achieved speeds one thousand times faster than previous electromechanical machines, a leap in processing power that has not been achieved since. It is easy to imagine future generations looking back on the slow start up and shut down times and high energy consumption of today's computers with a similar wry smile. The articles in this special issue on non-volatile memory based on nanostructures present the very latest research into the next generation's device technology, which may eventually consign today's cutting edge electronics to the history books. References [1] Ryu S W et al 2011 Nanotechnology 22 254005 [2] Miao F, Yang J J, Borghetti J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 254007 [3] Strachan J P, Strukov D B, Borghetti J, Yang J J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 245015 [4] Kim K M, Choi B J, Lee M H, Kim G H, Song S J, Seok J Y, Yoon J H, Han S and Hwang C S 2011 Nanotechnology 22 254010 [5] Seo K et al 2011 Nanotechnology 22 254023 [6] Garcia V, Fusil S, Bouzehouane K, Enouz-Vedrenne S, Mathur N D, Barthelemy A and Bibes M 2009 Nature 460 81-4 [7] Maksymovych P, Jesse S, Yu P, Ramesh R, Baddorf A P and Kalinin S V 2009 Science 324 1421 [8] Seidel J et al 2009 Nature Mat. 8 229 [9] Tsuruoka T, Terabe K, Hasegawa T, and Aono M 2010 Nanotechnology 21 425205 [10] Waser R and Aono M 2007 Nature Mat. 6 833 [11] Sawa A 2008 Materials Today 11 28 [12] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 Nature 453 80 Changes were made to this Editorial on 16 May 2011. An author was added to the Editorial.

Storage and retrieval of THz-bandwidth single photons using a room-temperature diamond quantum memory.

PubMed

England, Duncan G; Fisher, Kent A G; MacLean, Jean-Philippe W; Bustard, Philip J; Lausten, Rune; Resch, Kevin J; Sussman, Benjamin J

2015-02-06

We report the storage and retrieval of single photons, via a quantum memory, in the optical phonons of a room-temperature bulk diamond. The THz-bandwidth heralded photons are generated by spontaneous parametric down-conversion and mapped to phonons via a Raman transition, stored for a variable delay, and released on demand. The second-order correlation of the memory output is g((2))(0)=0.65±0.07, demonstrating a preservation of nonclassical photon statistics throughout storage and retrieval. The memory is low noise, high speed and broadly tunable; it therefore promises to be a versatile light-matter interface for local quantum processing applications.

Assessing Advanced Technology in CENATE

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tallent, Nathan R.; Barker, Kevin J.; Gioiosa, Roberto

PNNL's Center for Advanced Technology Evaluation (CENATE) is a new U.S. Department of Energy center whose mission is to assess and facilitate access to emerging computing technology. CENATE is assessing a range of advanced technologies, from evolutionary to disruptive. Technologies of interest include the processor socket (homogeneous and accelerated systems), memories (dynamic, static, memory cubes), motherboards, networks (network interface cards and switches), and input/output and storage devices. CENATE is developing a multi-perspective evaluation process based on integrating advanced system instrumentation, performance measurements, and modeling and simulation. We show evaluations of two emerging network technologies: silicon photonics interconnects and the Datamore » Vortex network. CENATE's evaluation also addresses the question of which machine is best for a given workload under certain constraints. We show a performance-power tradeoff analysis of a well-known machine learning application on two systems.« less

Status and Prospects of ZnO-Based Resistive Switching Memory Devices

NASA Astrophysics Data System (ADS)

Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

2016-08-01

In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

Ising formulation of associative memory models and quantum annealing recall

NASA Astrophysics Data System (ADS)

Santra, Siddhartha; Shehab, Omar; Balu, Radhakrishnan

2017-12-01

Associative memory models, in theoretical neuro- and computer sciences, can generally store at most a linear number of memories. Recalling memories in these models can be understood as retrieval of the energy minimizing configuration of classical Ising spins, closest in Hamming distance to an imperfect input memory, where the energy landscape is determined by the set of stored memories. We present an Ising formulation for associative memory models and consider the problem of memory recall using quantum annealing. We show that allowing for input-dependent energy landscapes allows storage of up to an exponential number of memories (in terms of the number of neurons). Further, we show how quantum annealing may naturally be used for recall tasks in such input-dependent energy landscapes, although the recall time may increase with the number of stored memories. Theoretically, we obtain the radius of attractor basins R (N ) and the capacity C (N ) of such a scheme and their tradeoffs. Our calculations establish that for randomly chosen memories the capacity of our model using the Hebbian learning rule as a function of problem size can be expressed as C (N ) =O (eC1N) , C1≥0 , and succeeds on randomly chosen memory sets with a probability of (1 -e-C2N) , C2≥0 with C1+C2=(0.5-f ) 2/(1 -f ) , where f =R (N )/N , 0 ≤f ≤0.5 , is the radius of attraction in terms of the Hamming distance of an input probe from a stored memory as a fraction of the problem size. We demonstrate the application of this scheme on a programmable quantum annealing device, the D-wave processor.

Reconfigurable pipelined processor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saccardi, R.J.

1989-09-19

This patent describes a reconfigurable pipelined processor for processing data. It comprises: a plurality of memory devices for storing bits of data; a plurality of arithmetic units for performing arithmetic functions with the data; cross bar means for connecting the memory devices with the arithmetic units for transferring data therebetween; at least one counter connected with the cross bar means for providing a source of addresses to the memory devices; at least one variable tick delay device connected with each of the memory devices and arithmetic units; and means for providing control bits to the variable tick delay device formore » variably controlling the input and output operations thereof to selectively delay the memory devices and arithmetic units to align the data for processing in a selected sequence.« less

Quantum storage of entangled telecom-wavelength photons in an erbium-doped optical fibre

NASA Astrophysics Data System (ADS)

Saglamyurek, Erhan; Jin, Jeongwan; Verma, Varun B.; Shaw, Matthew D.; Marsili, Francesco; Nam, Sae Woo; Oblak, Daniel; Tittel, Wolfgang

2015-02-01

The realization of a future quantum Internet requires the processing and storage of quantum information at local nodes and interconnecting distant nodes using free-space and fibre-optic links. Quantum memories for light are key elements of such quantum networks. However, to date, neither an atomic quantum memory for non-classical states of light operating at a wavelength compatible with standard telecom fibre infrastructure, nor a fibre-based implementation of a quantum memory, has been reported. Here, we demonstrate the storage and faithful recall of the state of a 1,532 nm wavelength photon entangled with a 795 nm photon, in an ensemble of cryogenically cooled erbium ions doped into a 20-m-long silica fibre, using a photon-echo quantum memory protocol. Despite its currently limited efficiency and storage time, our broadband light-matter interface brings fibre-based quantum networks one step closer to reality.

An elementary quantum network using robust nuclear spin qubits in diamond

NASA Astrophysics Data System (ADS)

Kalb, Norbert; Reiserer, Andreas; Humphreys, Peter; Blok, Machiel; van Bemmelen, Koen; Twitchen, Daniel; Markham, Matthew; Taminiau, Tim; Hanson, Ronald

Quantum registers containing multiple robust qubits can form the nodes of future quantum networks for computation and communication. Information storage within such nodes must be resilient to any type of local operation. Here we demonstrate multiple robust memories by employing five nuclear spins adjacent to a nitrogen-vacancy defect centre in diamond. We characterize the storage of quantum superpositions and their resilience to entangling attempts with the electron spin of the defect centre. The storage fidelity is found to be limited by the probabilistic electron spin reset after failed entangling attempts. Control over multiple memories is then utilized to encode states in decoherence protected subspaces with increased robustness. Furthermore we demonstrate memory control in two optically linked network nodes and characterize the storage capabilities of both memories in terms of the process fidelity with the identity. These results pave the way towards multi-qubit quantum algorithms in a remote network setting.

Coherent Spin Control at the Quantum Level in an Ensemble-Based Optical Memory.

PubMed

Jobez, Pierre; Laplane, Cyril; Timoney, Nuala; Gisin, Nicolas; Ferrier, Alban; Goldner, Philippe; Afzelius, Mikael

2015-06-12

Long-lived quantum memories are essential components of a long-standing goal of remote distribution of entanglement in quantum networks. These can be realized by storing the quantum states of light as single-spin excitations in atomic ensembles. However, spin states are often subjected to different dephasing processes that limit the storage time, which in principle could be overcome using spin-echo techniques. Theoretical studies suggest this to be challenging due to unavoidable spontaneous emission noise in ensemble-based quantum memories. Here, we demonstrate spin-echo manipulation of a mean spin excitation of 1 in a large solid-state ensemble, generated through storage of a weak optical pulse. After a storage time of about 1 ms we optically read-out the spin excitation with a high signal-to-noise ratio. Our results pave the way for long-duration optical quantum storage using spin-echo techniques for any ensemble-based memory.

Electrochemical metallization memories—fundamentals, applications, prospects

NASA Astrophysics Data System (ADS)

Valov, Ilia; Waser, Rainer; Jameson, John R.; Kozicki, Michael N.

2011-06-01

This review focuses on electrochemical metallization memory cells (ECM), highlighting their advantages as the next generation memories. In a brief introduction, the basic switching mechanism of ECM cells is described and the historical development is sketched. In a second part, the full spectra of materials and material combinations used for memory device prototypes and for dedicated studies are presented. In a third part, the specific thermodynamics and kinetics of nanosized electrochemical cells are described. The overlapping of the space charge layers is found to be most relevant for the cell properties at rest. The major factors determining the functionality of the ECM cells are the electrode reaction and the transport kinetics. Depending on electrode and/or electrolyte material electron transfer, electro-crystallization or slow diffusion under strong electric fields can be rate determining. In the fourth part, the major device characteristics of ECM cells are explained. Emphasis is placed on switching speed, forming and SET/RESET voltage, RON to ROFF ratio, endurance and retention, and scaling potentials. In the last part, circuit design aspects of ECM arrays are discussed, including the pros and cons of active and passive arrays. In the case of passive arrays, the fundamental sneak path problem is described and as well as a possible solution by two anti-serial (complementary) interconnected resistive switches per cell. Furthermore, the prospects of ECM with regard to further scalability and the ability for multi-bit data storage are addressed.

Formation of SiGe nanocrystals embedded in Al{sub 2}O{sub 3} for the application of write-once-read-many-times memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Min-Lin; Wu, Yung-Hsien; Lin, Chia-Chun

2012-10-15

The structure of SiGe nanocrystals embedded in Al{sub 2}O{sub 3} formed by sequential deposition of Al{sub 2}O{sub 3}/Si/Ge/Al{sub 2}O{sub 3} and a subsequent annealing was confirmed by transmission electron microscopy and energy dispersive spectroscopy (EDS), and its application for write-once-read-many-times (WORM) memory devices was explored in this study. By applying a -10 V pulse for 1 s, a large amount of holes injected from Si substrate are stored in the nanocrystals and consequently, the current at +1.5 V increases by a factor of 10{sup 4} as compared to that of the initial state. Even with a smaller -5 V pulsemore » for 1 {mu}s, a sufficiently large current ratio of 36 can still be obtained, verifying the low power operation. Since holes are stored in nanocrystals which are isolated from Si substrate by Al{sub 2}O{sub 3} with good integrity and correspond to a large valence band offset with respect to Al{sub 2}O{sub 3}, desirable read endurance up to 10{sup 5} cycles and excellent retention over 100 yr are achieved. Combining these promising characteristics, WORM memory devices are appropriate for high-performance archival storage applications.« less

Safeguards Technology Factsheet - Unattended Dual Current Monitor (UDCM)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Newell, Matthew R.

2016-04-13

The UDCM is a low-current measurement device designed to record sub-nano-amp to micro-amp currents from radiation detectors. The UDCM is a two-channel device that incorporates a Commercial-Off-The-Shelf (COTS) processor enabling both serial over USB as well as Ethernet communications. The instrument includes microSD and USB flash memory for data storage as well as a programmable High Voltage (HV) power supply for detector bias. The UDCM is packaged in the same enclosure, employs the same processor and has a similar user interface as the UMSR. A serial over USB communication line to the UDCM allows the use of existing versions ofmore » MIC software, while the Ethernet port is compatible with the new IAEA RAINSTORM communication protocol.« less

Resistive switching in ZnO/ZnO:In nanocomposite

NASA Astrophysics Data System (ADS)

Khakhulin, D. A.; Vakulov, Z. E.; Smirnov, V. A.; Tominov, R. V.; Yoon, Jong-Gul; Ageev, O. A.

2017-11-01

A lot of effort nowadays is put into development of new approaches to processing and storage of information in integrated circuits due to limitations in miniaturisation. Our research is dedicated to one of actively developed concepts - oxide based resistive memory devices. A material that draws interest due to its promising technological properties is ZnO but pure ZnO lacks in performance in comparison with some other transition metal oxides. Thus our work is focused on improvement of resistive switching parameters in ZnO films by creation of complex nanocomposites. In this work we report characterisation of a nanocomposite based on PLD grown ZnO films with inclusions of In. Such solution allows us to achieve improvements of main parameters that are critical for ReRAM device: RHRS/RLRS ratio, endurance and retention.

Fabrication and characterization of lead-free BaTiO3 thin film for storage device applications

NASA Astrophysics Data System (ADS)

Sharma, Hakikat; Negi, N. S.

2018-05-01

The lead-free BaTiO3 (BT) thin film solution has been prepared by sol-gel method. The prepared solution spin coated on Pt/TiO2/SiO2/ Si substrate. The fabricated thin film was analyzed by XRD and Raman spectrometer for structural conformation. Uniformity of thin film was examined by Atomic force microscope (AFM). Thickness of the film was measured by cross sectional FESEM. Activation energies for both positive and negative biasing have been calculated from temperature dependent leakage current density as a function of electric field. For ferroelectric memory devices such as FRAM the hysteresis loop plays important role. Electric filed dependent polarization of BT thin film measured at different switching voltages. With increasing voltage maximum polarization increases.

Forced Ion Migration for Chalcogenide Phase Change Memory Device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2011-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2012-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

An Array Processing Theory of Memory, Thought, and Behavior Patterning: A Radically Reconstructive View.

ERIC Educational Resources Information Center

Allison, Dennis J.

A theory of memory is introduced, which seeks to respond to the shortcomings of existing theories based on metaphors. Memory is presented as a mechanism, a comparison process in which information held in some form of immediate storage (whether based on perception or previous cognition or both) is compared to previously stored long-term storage.…

Neural Plasticity and Memory: Is Memory Encoded in Hydrogen Bonding Patterns?

PubMed

Amtul, Zareen; Rahman, Atta-Ur

2016-02-01

Current models of memory storage recognize posttranslational modification vital for short-term and mRNA translation for long-lasting information storage. However, at the molecular level things are quite vague. A comprehensive review of the molecular basis of short and long-lasting synaptic plasticity literature leads us to propose that the hydrogen bonding pattern at the molecular level may be a permissive, vital step of memory storage. Therefore, we propose that the pattern of hydrogen bonding network of biomolecules (glycoproteins and/or DNA template, for instance) at the synapse is the critical edifying mechanism essential for short- and long-term memories. A novel aspect of this model is that nonrandom impulsive (or unplanned) synaptic activity functions as a synchronized positive-feedback rehearsal mechanism by revising the configurations of the hydrogen bonding network by tweaking the earlier tailored hydrogen bonds. This process may also maintain the elasticity of the related synapses involved in memory storage, a characteristic needed for such networks to alter intricacy and revise endlessly. The primary purpose of this review is to stimulate the efforts to elaborate the mechanism of neuronal connectivity both at molecular and chemical levels. © The Author(s) 2014.

The role of reduced working memory storage and processing resources in the associative memory deficit of older adults: simulation studies with younger adults.

PubMed

Hara, Yoko; Naveh-Benjamin, Moshe

2015-01-01

Previous research indicates that relative to younger adults, older adults show a larger decline in long-term memory (LTM) for associations than for the components that make up these associations. The purpose of the present study was to investigate whether we can impair associative memory performance in young adults by reducing their working memory (WM) resources, hence providing potential clues regarding the underlying causes of the associative memory deficit in older adults. With two experiments, we investigated whether we can reduce younger adults' long-term associative memory using secondary tasks in which either storage or processing WM loads were manipulated, while participants learned name-face pairs and then remembered the names, the faces, and the name-face associations. Results show that reducing either the storage or the processing resources of WM produced performance patterns of an associative long-term memory deficit in young adults. Furthermore, younger adults' associative memory deficit was a function of their performance on a working memory span task. These results indicate that one potential reason older adults have an associative deficit is a reduction in their WM resources but further research is needed to assess the mechanisms involved in age-related associative memory deficits.

Neural network based feed-forward high density associative memory

NASA Technical Reports Server (NTRS)

Daud, T.; Moopenn, A.; Lamb, J. L.; Ramesham, R.; Thakoor, A. P.

1987-01-01

A novel thin film approach to neural-network-based high-density associative memory is described. The information is stored locally in a memory matrix of passive, nonvolatile, binary connection elements with a potential to achieve a storage density of 10 to the 9th bits/sq cm. Microswitches based on memory switching in thin film hydrogenated amorphous silicon, and alternatively in manganese oxide, have been used as programmable read-only memory elements. Low-energy switching has been ascertained in both these materials. Fabrication and testing of memory matrix is described. High-speed associative recall approaching 10 to the 7th bits/sec and high storage capacity in such a connection matrix memory system is also described.

Upgrading the sleeping brain with targeted memory reactivation.

PubMed

Oudiette, Delphine; Paller, Ken A

2013-03-01

A fundamental feature of human memory is the propensity for beneficial changes in information storage after initial encoding. Recent research findings favor the possibility that memory consolidation during sleep is instrumental for actively maintaining the storehouse of memories that individuals carry through their lives. The information that ultimately remains available for retrieval may tend to be that which is reactivated during sleep. A novel source of support for this idea comes from demonstrations that neurocognitive processing during sleep can benefit memory storage when memories are covertly cued via auditory or olfactory stimulation. Investigations of these subtle manipulations of memory processing during sleep can help elucidate the mechanisms of memory preservation in the human brain. Copyright © 2013 Elsevier Ltd. All rights reserved.

Working Memory in Children with Cochlear Implants: Problems are in Storage, not Processing

PubMed Central

Nittrouer, Susan; Caldwell-Tarr, Amanda; Lowenstein, Joanna H

2013-01-01

Background There is growing consensus that hearing loss and consequent amplification likely interact with cognitive systems. A phenomenon often examined in regards to these potential interactions is working memory, modeled as consisting of one component responsible for storage of information and another component responsible for processing of that information. Signal degradation associated with cochlear implants should selectively inhibit storage without affecting processing. This study examined two hypotheses: (1) A single task can be used to measure storage and processing in working memory, with recall accuracy indexing storage and rate of recall indexing processing; (2) Storage is negatively impacted for children with CIs, but not processing. Method Two experiments were conducted. Experiment 1 included adults and children, 8 and 6 years of age, with NH. Procedures tested the prediction that accuracy of recall could index storage and rate of recall could index processing. Both measures were obtained during a serial-recall task using word lists designed to manipulate storage and processing demands independently: non-rhyming nouns were the standard condition; rhyming nouns were predicted to diminish storage capacity; and non-rhyming adjectives were predicted to increase processing load. Experiment 2 included 98 8-year-olds, 48 with NH and 50 with CIs, in the same serial-recall task using the non-rhyming and rhyming nouns. Results Experiment 1 showed that recall accuracy was poorest for the rhyming nouns and rate of recall was slowest for the non-rhyming adjectives, demonstrating that storage and processing can be indexed separately within a single task. In Experiment 2, children with CIs showed less accurate recall of serial order than children with NH, but rate of recall did not differ. Recall accuracy and rate of recall were not correlated in either experiment, reflecting independence of these mechanisms. Conclusions It is possible to measure the operations of storage and processing mechanisms in working memory in a single task, and only storage is impaired for children with CIs. These findings suggest that research and clinical efforts should focus on enhancing the saliency of representation for children with CIs. Direct instruction of syntax and semantics could facilitate storage in real-world working memory tasks. PMID:24090697

Working memory in children with cochlear implants: problems are in storage, not processing.

PubMed

Nittrouer, Susan; Caldwell-Tarr, Amanda; Lowenstein, Joanna H

2013-11-01

There is growing consensus that hearing loss and consequent amplification likely interact with cognitive systems. A phenomenon often examined in regards to these potential interactions is working memory, modeled as consisting of one component responsible for storage of information and another component responsible for processing of that information. Signal degradation associated with cochlear implants should selectively inhibit storage without affecting processing. This study examined two hypotheses: (1) A single task can be used to measure storage and processing in working memory, with recall accuracy indexing storage and rate of recall indexing processing; (2) Storage is negatively impacted for children with CIs, but not processing. Two experiments were conducted. Experiment 1 included adults and children, 8 and 6 years of age, with NH. Procedures tested the prediction that accuracy of recall could index storage and rate of recall could index processing. Both measures were obtained during a serial-recall task using word lists designed to manipulate storage and processing demands independently: non-rhyming nouns were the standard condition; rhyming nouns were predicted to diminish storage capacity; and non-rhyming adjectives were predicted to increase processing load. Experiment 2 included 98 8-year-olds, 48 with NH and 50 with CIs, in the same serial-recall task using the non-rhyming and rhyming nouns. Experiment 1 showed that recall accuracy was poorest for the rhyming nouns and rate of recall was slowest for the non-rhyming adjectives, demonstrating that storage and processing can be indexed separately within a single task. In Experiment 2, children with CIs showed less accurate recall of serial order than children with NH, but rate of recall did not differ. Recall accuracy and rate of recall were not correlated in either experiment, reflecting independence of these mechanisms. It is possible to measure the operations of storage and processing mechanisms in working memory in a single task, and only storage is impaired for children with CIs. These findings suggest that research and clinical efforts should focus on enhancing the saliency of representation for children with CIs. Direct instruction of syntax and semantics could facilitate storage in real-world working memory tasks. Copyright © 2013 Elsevier Ireland Ltd. All rights reserved.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

DNA MemoChip: Long-Term and High Capacity Information Storage and Select Retrieval.

PubMed

Stefano, George B; Wang, Fuzhou; Kream, Richard M

2018-02-26

Over the course of history, human beings have never stopped seeking effective methods for information storage. From rocks to paper, and through the past several decades of using computer disks, USB sticks, and on to the thin silicon "chips" and "cloud" storage of today, it would seem that we have reached an era of efficiency for managing innumerable and ever-expanding data. Astonishingly, when tracing this technological path, one realizes that our ancient methods of informational storage far outlast paper (10,000 vs. 1,000 years, respectively), let alone the computer-based memory devices that only last, on average, 5 to 25 years. During this time of fast-paced information generation, it becomes increasingly difficult for current storage methods to retain such massive amounts of data, and to maintain appropriate speeds with which to retrieve it, especially when in demand by a large number of users. Others have proposed that DNA-based information storage provides a way forward for information retention as a result of its temporal stability. It is now evident that DNA represents a potentially economical and sustainable mechanism for storing information, as demonstrated by its decoding from a 700,000 year-old horse genome. The fact that the human genome is present in a cell, containing also the varied mitochondrial genome, indicates DNA's great potential for large data storage in a 'smaller' space.

DNA MemoChip: Long-Term and High Capacity Information Storage and Select Retrieval

PubMed Central

Wang, Fuzhou; Kream, Richard M.

2018-01-01

Over the course of history, human beings have never stopped seeking effective methods for information storage. From rocks to paper, and through the past several decades of using computer disks, USB sticks, and on to the thin silicon “chips” and “cloud” storage of today, it would seem that we have reached an era of efficiency for managing innumerable and ever-expanding data. Astonishingly, when tracing this technological path, one realizes that our ancient methods of informational storage far outlast paper (10,000 vs. 1,000 years, respectively), let alone the computer-based memory devices that only last, on average, 5 to 25 years. During this time of fast-paced information generation, it becomes increasingly difficult for current storage methods to retain such massive amounts of data, and to maintain appropriate speeds with which to retrieve it, especially when in demand by a large number of users. Others have proposed that DNA-based information storage provides a way forward for information retention as a result of its temporal stability. It is now evident that DNA represents a potentially economical and sustainable mechanism for storing information, as demonstrated by its decoding from a 700,000 year-old horse genome. The fact that the human genome is present in a cell, containing also the varied mitochondrial genome, indicates DNA’s great potential for large data storage in a ‘smaller’ space. PMID:29481548

Tracking the fear engram: the lateral amygdala is an essential locus of fear memory storage.

PubMed

Schafe, Glenn E; Doyère, Valérie; LeDoux, Joseph E

2005-10-26

Although it is believed that different types of memories are localized in discreet regions of the brain, concrete experimental evidence of the existence of such engrams is often elusive. Despite being one of the best characterized memory systems of the brain, the question of where fear memories are localized in the brain remains a hotly debated issue. Here, we combine site-specific behavioral pharmacology with multisite electrophysiological recording techniques to show that the lateral nucleus of the amygdala, long thought to be critical for the acquisition of fear memories, is also an essential locus of fear memory storage.

The epigenetic basis of memory formation and storage.

PubMed

Jarome, Timothy J; Thomas, Jasmyne S; Lubin, Farah D

2014-01-01

The formation of long-term memory requires a series of cellular and molecular changes that involve transcriptional regulation of gene expression. While these changes in gene transcription were initially thought to be largely regulated by the activation of transcription factors by intracellular signaling molecules, epigenetic mechanisms have emerged as an important regulator of transcriptional processes across multiple brain regions to form a memory circuit for a learned event or experience. Due to their self-perpetuating nature and ability to bidirectionally control gene expression, these epigenetic mechanisms have the potential to not only regulate initial memory formation but also modify and update memory over time. This chapter focuses on the established, but poorly understood, role for epigenetic mechanisms such as posttranslational modifications of histone proteins and DNA methylation at the different stages of memory storage. Additionally, this chapter emphasizes how these mechanisms interact to control the ideal epigenetic environment for memory formation and modification in neurons. The reader will gain insights into the limitations in our current understanding of epigenetic regulation of memory storage, especially in terms of their cell-type specificity and the lack of understanding in the interactions of various epigenetic modifiers to one another to impact gene expression changes during memory formation.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

High-performance Raman memory with spatio-temporal reversal

NASA Astrophysics Data System (ADS)

Vernaz-Gris, Pierre; Tranter, Aaron D.; Everett, Jesse L.; Leung, Anthony C.; Paul, Karun V.; Campbell, Geoff T.; Lam, Ping Koy; Buchler, Ben C.

2018-05-01

A number of techniques exist to use an ensemble of atoms as a quantum memory for light. Many of these propose to use backward retrieval as a way to improve the storage and recall efficiency. We report on a demonstration of an off-resonant Raman memory that uses backward retrieval to achieve an efficiency of $65\\pm6\\%$ at a storage time of one pulse duration. The memory has a characteristic decay time of 60 $\\mu$s, corresponding to a delay-bandwidth product of $160$.

Working memory and flexibility in awareness and attention.

PubMed

Bunting, Michael F; Cowan, Nelson

2005-06-01

We argue that attention and awareness form the basis of one type of working-memory storage. In contrast to models of working memory in which storage and retrieval occur effortlessly, we document that an attention-demanding goal conflict within a retrieval cue impairs recall from working memory. In a conceptual span task, semantic and color-name cues prompted recall of four consecutive words from a twelve-word list. The first-four, middle-four, and final-four words belonged to different semantic categories (e.g., body parts, animals, and tools) and were shown in different colors (e.g., red, blue, and green). In Experiment 1, the color of the cue matched that of cued items 75% of the time, and the rare mismatch impaired recall. In Experiment 2, though, the color of the cue matched that of the cued items only 25% of the time, and the now-more-frequent mismatches no longer mattered. These results are difficult to explain with passive storage alone and indicate that a processing difficulty impedes recall from working memory, presumably by distracting attention away from its storage function.

Similarity between the response of memristive and memcapacitive circuits subjected to ramped voltage

NASA Astrophysics Data System (ADS)

Kanygin, Mikhail A.; Katkov, Mikhail V.; Pershin, Yuriy V.

2017-07-01

We report a similar feature in the response of resistor-memristor and capacitor-memcapacitor circuits with threshold-type memory devices driven by triangular waveform voltage. In both cases, the voltage across the memory device is stabilized during the switching of the memory device state. While in the memristive circuit this feature is observed when the applied voltage changes in one direction, the memcapacitive circuit with a ferroelectric memcapacitor demonstrates the voltage stabilization effect at both sweep directions. The discovered behavior of capacitor-memcapacitor circuit is also demonstrated experimentally. We anticipate that our observation can be used in the design of electronic circuits with emergent memory devices as well as in the identification and characterization of memory effects in threshold-type memory devices.

Visual working memory buffers information retrieved from visual long-term memory.

PubMed

Fukuda, Keisuke; Woodman, Geoffrey F

2017-05-16

Human memory is thought to consist of long-term storage and short-term storage mechanisms, the latter known as working memory. Although it has long been assumed that information retrieved from long-term memory is represented in working memory, we lack neural evidence for this and need neural measures that allow us to watch this retrieval into working memory unfold with high temporal resolution. Here, we show that human electrophysiology can be used to track information as it is brought back into working memory during retrieval from long-term memory. Specifically, we found that the retrieval of information from long-term memory was limited to just a few simple objects' worth of information at once, and elicited a pattern of neurophysiological activity similar to that observed when people encode new information into working memory. Our findings suggest that working memory is where information is buffered when being retrieved from long-term memory and reconcile current theories of memory retrieval with classic notions about the memory mechanisms involved.

Visual working memory buffers information retrieved from visual long-term memory

PubMed Central

Fukuda, Keisuke; Woodman, Geoffrey F.

2017-01-01

Human memory is thought to consist of long-term storage and short-term storage mechanisms, the latter known as working memory. Although it has long been assumed that information retrieved from long-term memory is represented in working memory, we lack neural evidence for this and need neural measures that allow us to watch this retrieval into working memory unfold with high temporal resolution. Here, we show that human electrophysiology can be used to track information as it is brought back into working memory during retrieval from long-term memory. Specifically, we found that the retrieval of information from long-term memory was limited to just a few simple objects’ worth of information at once, and elicited a pattern of neurophysiological activity similar to that observed when people encode new information into working memory. Our findings suggest that working memory is where information is buffered when being retrieved from long-term memory and reconcile current theories of memory retrieval with classic notions about the memory mechanisms involved. PMID:28461479

Blood storage device and method for oxygen removal

DOEpatents

Bitensky, Mark W.; Yoshida, Tatsuro

2000-01-01

The present invention relates to a storage device and method for the long-term storage of blood and, more particularly, to a blood storage device and method capable of removing oxygen from the stored blood and thereby prolonging the storage life of the deoxygenated blood.

Economic analysis of using above ground gas storage devices for compressed air energy storage system

NASA Astrophysics Data System (ADS)

Liu, Jinchao; Zhang, Xinjing; Xu, Yujie; Chen, Zongyan; Chen, Haisheng; Tan, Chunqing

2014-12-01

Above ground gas storage devices for compressed air energy storage (CAES) have three types: air storage tanks, gas cylinders, and gas storage pipelines. A cost model of these gas storage devices is established on the basis of whole life cycle cost (LCC) analysis. The optimum parameters of the three types are determined by calculating the theoretical metallic raw material consumption of these three devices and considering the difficulties in manufacture and the influence of gas storage device number. The LCCs of the three types are comprehensively analyzed and compared. The result reveal that the cost of the gas storage pipeline type is lower than that of the other two types. This study may serve as a reference for designing large-scale CAES systems.

Memory and Spin Injection Devices Involving Half Metals

DOE PAGES

Shaughnessy, M.; Snow, Ryan; Damewood, L.; ...

2011-01-01

We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less

Multi-port, optically addressed RAM

NASA Technical Reports Server (NTRS)

Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)

1989-01-01

A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.

High-Performance Flexible Organic Nano-Floating Gate Memory Devices Functionalized with Cobalt Ferrite Nanoparticles.

PubMed

Jung, Ji Hyung; Kim, Sunghwan; Kim, Hyeonjung; Park, Jongnam; Oh, Joon Hak

2015-10-07

Nano-floating gate memory (NFGM) devices are transistor-type memory devices that use nanostructured materials as charge trap sites. They have recently attracted a great deal of attention due to their excellent performance, capability for multilevel programming, and suitability as platforms for integrated circuits. Herein, novel NFGM devices have been fabricated using semiconducting cobalt ferrite (CoFe2O4) nanoparticles (NPs) as charge trap sites and pentacene as a p-type semiconductor. Monodisperse CoFe2O4 NPs with different diameters have been synthesized by thermal decomposition and embedded in NFGM devices. The particle size effects on the memory performance have been investigated in terms of energy levels and particle-particle interactions. CoFe2O4 NP-based memory devices exhibit a large memory window (≈73.84 V), a high read current on/off ratio (read I(on)/I(off)) of ≈2.98 × 10(3), and excellent data retention. Fast switching behaviors are observed due to the exceptional charge trapping/release capability of CoFe2O4 NPs surrounded by the oleate layer, which acts as an alternative tunneling dielectric layer and simplifies the device fabrication process. Furthermore, the NFGM devices show excellent thermal stability, and flexible memory devices fabricated on plastic substrates exhibit remarkable mechanical and electrical stability. This study demonstrates a viable means of fabricating highly flexible, high-performance organic memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nonvolatile memory characteristics of organic thin film transistors using poly(2-hydroxyethyl methacrylate)-based polymer multilayer dielectric

NASA Astrophysics Data System (ADS)

Chen, Ying-Chih; Su, Yan-Kuin; Yu, Hsin-Chieh; Huang, Chun-Yuan; Huang, Tsung-Syun

2011-10-01

A wide hysteresis width characteristic (memory window) was observed in the organic thin film transistors (OTFTs) using poly(2-hydroxyethyl methacrylate) (PHEMA)-based polymer multilayers. In this study, a strong memory effect was also found in the pentacene-based OTFTs and the electric characteristics were improved by introducing PHEMA/poly(methyl methacrylate) (PMMA)/PHEMA trilayer to replace the conventional PHEMA monolayer or PMMA/PHEMA and PHEMA/PMMA bilayer as the dielectric layers of OTFTs. The memory effect was originated from the electron trapping and slow polarization of the dielectrics. The hydroxyl (-OH) groups inside the polymer dielectric were the main charge storage sites of the electrons. This charge-storage phenomenon could lead to a wide flat-band voltage shift (memory window, △VFB = 22 V) which is essential for the OTFTs' memory-related applications. Moreover, the fabricated transistors also exhibited significant switchable channel current due to the charge-storage and slow charge relaxation.

UDCM Operating Procedure (Limited Functionality prototype)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Newell, Matthew R.

2016-06-14

The UDCM is a two channel low current measurement device designed to record sub-nano-amp to micro-amp currents from radiation detectors. The UDCM incorporates a Commercial-Off-The- Shelf (COTS) processor enabling both serial over USB as well as Ethernet communications. The instrument includes microSD and USB flash memory for data storage as well as a programmable High Voltage (HV) power supply for detector bias. The UDCM incorporates a unique TTL output feature first used in the LANL Current to Pulse Converter (CPC). Two SMA connectors on the UDCM provide TTL pulses at a frequency proportional to the input currents.

Working memory and fluid intelligence: capacity, attention control, and secondary memory retrieval.

PubMed

Unsworth, Nash; Fukuda, Keisuke; Awh, Edward; Vogel, Edward K

2014-06-01

Several theories have been put forth to explain the relation between working memory (WM) and gF. Unfortunately, no single factor has been shown to fully account for the relation between these two important constructs. In the current study we tested whether multiple factors (capacity, attention control, and secondary memory) would collectively account for the relation. A large number of participants performed multiple measures of each construct and latent variable analyses were used to examine the data. The results demonstrated that capacity, attention control, and secondary memory were uniquely related to WM storage, WM processing, and gF. Importantly, the three factors completely accounted for the relation between WM (both processing and storage) and gF. Thus, although storage and processing make independent contributions to gF, both of these contributions are accounted for by variation in capacity, attention control and secondary memory. These results are consistent with the multifaceted view of WM, suggesting that individual differences in capacity, attention control, and secondary memory jointly account for individual differences in WM and its relation with gF. Copyright © 2014 Elsevier Inc. All rights reserved.

Working Memory and Fluid Intelligence: Capacity, Attention Control, and Secondary Memory Retrieval

PubMed Central

Unsworth, Nash; Fukuda, Keisuke; Awh, Edward; Vogel, Edward K.

2015-01-01

Several theories have been put forth to explain the relation between working memory (WM) and gF. Unfortunately, no single factor has been shown to fully account for the relation between these two important constructs. In the current study we tested whether multiple factors (capacity, attention control, and secondary memory) would collectively account for the relation. A large number of participants performed multiple measures of each construct and latent variable analyses were used to examine the data. The results demonstrated that capacity, attention control, and secondary memory were uniquely related to WM storage, WM processing, and gF. Importantly, the three factors completely accounted for the relation between WM (both processing and storage) and gF. Thus, although storage and processing make independent contributions to gF, both of these contributions are accounted for by variation in capacity, attention control and secondary memory. These results are consistent with the multifaceted view of WM, suggesting that individual differences in capacity, attention control, and secondary memory jointly account for individual differences in WM and its relation with gF. PMID:24531497

Pseudo-orthogonalization of memory patterns for associative memory.

PubMed

Oku, Makito; Makino, Takaki; Aihara, Kazuyuki

2013-11-01

A new method for improving the storage capacity of associative memory models on a neural network is proposed. The storage capacity of the network increases in proportion to the network size in the case of random patterns, but, in general, the capacity suffers from correlation among memory patterns. Numerous solutions to this problem have been proposed so far, but their high computational cost limits their scalability. In this paper, we propose a novel and simple solution that is locally computable without any iteration. Our method involves XNOR masking of the original memory patterns with random patterns, and the masked patterns and masks are concatenated. The resulting decorrelated patterns allow higher storage capacity at the cost of the pattern length. Furthermore, the increase in the pattern length can be reduced through blockwise masking, which results in a small amount of capacity loss. Movie replay and image recognition are presented as examples to demonstrate the scalability of the proposed method.

Energy storage management system with distributed wireless sensors

DOEpatents

Farmer, Joseph C.; Bandhauer, Todd M.

2015-12-08

An energy storage system having a multiple different types of energy storage and conversion devices. Each device is equipped with one or more sensors and RFID tags to communicate sensor information wirelessly to a central electronic management system, which is used to control the operation of each device. Each device can have multiple RFID tags and sensor types. Several energy storage and conversion devices can be combined.

Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

NASA Astrophysics Data System (ADS)

Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

2015-09-01

Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

Proactive Interference Does Not Meaningfully Distort Visual Working Memory Capacity Estimates in the Canonical Change Detection Task

PubMed Central

Lin, Po-Han; Luck, Steven J.

2012-01-01

The change detection task has become a standard method for estimating the storage capacity of visual working memory. Most researchers assume that this task isolates the properties of an active short-term storage system that can be dissociated from long-term memory systems. However, long-term memory storage may influence performance on this task. In particular, memory traces from previous trials may create proactive interference that sometimes leads to errors, thereby reducing estimated capacity. Consequently, the capacity of visual working memory may be higher than is usually thought, and correlations between capacity and other measures of cognition may reflect individual differences in proactive interference rather than individual differences in the capacity of the short-term storage system. Indeed, previous research has shown that change detection performance can be influenced by proactive interference under some conditions. The purpose of the present study was to determine whether the canonical version of the change detection task – in which the to-be-remembered information consists of simple, briefly presented features – is influenced by proactive interference. Two experiments were conducted using methods that ordinarily produce substantial evidence of proactive interference, but no proactive interference was observed. Thus, the canonical version of the change detection task can be used to assess visual working memory capacity with no meaningful influence of proactive interference. PMID:22403556

Proactive interference does not meaningfully distort visual working memory capacity estimates in the canonical change detection task.

PubMed

Lin, Po-Han; Luck, Steven J

2012-01-01

The change detection task has become a standard method for estimating the storage capacity of visual working memory. Most researchers assume that this task isolates the properties of an active short-term storage system that can be dissociated from long-term memory systems. However, long-term memory storage may influence performance on this task. In particular, memory traces from previous trials may create proactive interference that sometimes leads to errors, thereby reducing estimated capacity. Consequently, the capacity of visual working memory may be higher than is usually thought, and correlations between capacity and other measures of cognition may reflect individual differences in proactive interference rather than individual differences in the capacity of the short-term storage system. Indeed, previous research has shown that change detection performance can be influenced by proactive interference under some conditions. The purpose of the present study was to determine whether the canonical version of the change detection task - in which the to-be-remembered information consists of simple, briefly presented features - is influenced by proactive interference. Two experiments were conducted using methods that ordinarily produce substantial evidence of proactive interference, but no proactive interference was observed. Thus, the canonical version of the change detection task can be used to assess visual working memory capacity with no meaningful influence of proactive interference.

Optical storage with electromagnetically induced transparency in cold atoms at a high optical depth

NASA Astrophysics Data System (ADS)

Zhang, Shanchao; Zhou, Shuyu; Liu, Chang; Chen, J. F.; Wen, Jianming; Loy, M. M. T.; Wong, G. K. L.; Du, Shengwang

2012-06-01

We report experimental demonstration of efficient optical storage with electromagnetically induced transparency (EIT) in a dense cold ^85Rb atomic ensemble trapped in a two-dimensional magneto-optical trap. By varying the optical depth (OD) from 0 to 140, we observe that the optimal storage efficiency for coherent optical pulses has a saturation value of 50% as OD > 50. Our result is consistent with that obtained from hot vapor cell experiments which suggest that a four-wave mixing nonlinear process degrades the EIT storage coherence and efficiency. We apply this EIT quantum memory for narrow-band single photons with controllable waveforms, and obtain an optimal storage efficiency of 49±3% for single-photon wave packets. This is the highest single-photon storage efficiency reported up to today and brings the EIT atomic quantum memory close to practical application because an efficiency of above 50% is necessary to operate the memory within non-cloning regime and beat the classical limit.

One bipolar transistor selector - One resistive random access memory device for cross bar memory array

NASA Astrophysics Data System (ADS)

Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

2017-09-01

A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

Coherent Optical Memory with High Storage Efficiency and Large Fractional Delay

NASA Astrophysics Data System (ADS)

Chen, Yi-Hsin; Lee, Meng-Jung; Wang, I.-Chung; Du, Shengwang; Chen, Yong-Fan; Chen, Ying-Cheng; Yu, Ite A.

2013-02-01

A high-storage efficiency and long-lived quantum memory for photons is an essential component in long-distance quantum communication and optical quantum computation. Here, we report a 78% storage efficiency of light pulses in a cold atomic medium based on the effect of electromagnetically induced transparency. At 50% storage efficiency, we obtain a fractional delay of 74, which is the best up-to-date record. The classical fidelity of the recalled pulse is better than 90% and nearly independent of the storage time, as confirmed by the direct measurement of phase evolution of the output light pulse with a beat-note interferometer. Such excellent phase coherence between the stored and recalled light pulses suggests that the current result may be readily applied to single photon wave packets. Our work significantly advances the technology of electromagnetically induced transparency-based optical memory and may find practical applications in long-distance quantum communication and optical quantum computation.