A microprocessor-based position control system for a telescope secondary mirror

NASA Technical Reports Server (NTRS)

Lorell, K. R.; Barrows, W. F.; Clappier, R. R.; Lee, G. K.

1983-01-01

The pointing requirements for the Shuttle IR Telescope Facility (SIRTF), which consists of an 0.85-m cryogenically cooled IR telescope, call for an image stability of 0.25 arcsec. Attention is presently given to a microprocessor-based position control system developed for the control of the SIRTF secondary mirror, employing a special control law (to minimize energy dissipation), a precision capacitive position sensor, and a specially designed power amplifier/actuator combination. The microprocessor generates the command angular position and rate waveforms in order to maintain a 90 percent dwell time/10 percent transition time ratio independently of chop frequency or amplitude. Performance and test results of a prototype system designed for use with a demonstration model of the SIRTF focal plane fine guidance sensor are presented.

Microprocessor controlled transdermal drug delivery.

PubMed

Subramony, J Anand; Sharma, Ashutosh; Phipps, J B

2006-07-06

Transdermal drug delivery via iontophoresis is reviewed with special focus on the delivery of lidocaine for local anesthesia and fentanyl for patient controlled acute therapy such as postoperative pain. The role of the microprocessor controller in achieving dosimetry, alternating/reverse polarity, pre-programmed, and sensor-based delivery is highlighted. Unique features such as the use of tactile signaling, telemetry control, and pulsatile waveforms in iontophoretic drug delivery are described briefly.

Pupillometry, a bioengineering overview

NASA Technical Reports Server (NTRS)

Myers, G.; Anchetta, J.; Hannaford, B.; Peng, P.; Sherman, K.; Stark, L.; Sun, F.; Usui, S.

1981-01-01

The pupillary control system is examined using a microprocessor based integrative pupillometer. The real time software functions of the microprocessor include: data collection, stimulus generation and area to diameter conversion. Results of an analysis of linear and nonlinear phenomena are presented.

DSS 13 microprocessor antenna controller

NASA Technical Reports Server (NTRS)

Gosline, R. M.

1988-01-01

A microprocessor-based antenna monitor and control system with multiple CPUs are described. The system was developed as part of the unattended station project for DSS 13 and was enhanced for use by the SETI project. The operational features, hardware, and software designs are described, and a discussion is provided of the major problems encountered.

A microprocessor-based system for continuous monitoring of radiation levels around the CERN PS and PSB accelerators

NASA Astrophysics Data System (ADS)

Agoritsas, V.; Beck, F.; Benincasa, G. P.; Bovigny, J. P.

1986-06-01

This paper describes a new beam loss monitor system which has been installed in the PS and PSB machines, replacing an earlier system. The new system is controlled by a microprocessor which can operate independently of the accelerator control system, though setting up and central display are usually done remotely, using the standard control system facilities.

Microfluidic Pneumatic Logic Circuits and Digital Pneumatic Microprocessors for Integrated Microfluidic Systems

PubMed Central

Rhee, Minsoung

2010-01-01

We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprecessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner. PMID:19823730

Control methodologies for large space structures

NASA Technical Reports Server (NTRS)

Mcree, G. J.; Altonji, E.

1984-01-01

The objectives of this research were to develop techniques of controlling a dc-motor driven flywheel which would apply torque to the structure to which it was mounted. The motor control system was to be implemented using a microprocessor based controller. The purpose of the torque applied by this system was to dampen oscillations of the structure to which it was mounted. Before the work was terminated due to the unavailability of equipment, a system was developed and partially tested which would provide tight control of the flywheel velocity when it received a velocity command in the form of a voltage. The procedure followed in this development was to first model the motor and flywheel system on an analog computer. Prior to the time the microprocessor development system was available, an analog control loop was replaced by the microprocessor and the system was partially tested.

A programmable controller based on CAN field bus embedded microprocessor and FPGA

NASA Astrophysics Data System (ADS)

Cai, Qizhong; Guo, Yifeng; Chen, Wenhei; Wang, Mingtao

2008-10-01

One kind of new programmable controller(PLC) is introduced in this paper. The advanced embedded microprocessor and Field-Programmable Gate Array (FPGA) device are applied in the PLC system. The PLC system structure was presented in this paper. It includes 32 bits Advanced RISC Machines (ARM) embedded microprocessor as control core, FPGA as control arithmetic coprocessor and CAN bus as data communication criteria protocol connected the host controller and its various extension modules. It is detailed given that the circuits and working principle, IiO interface circuit between ARM and FPGA and interface circuit between ARM and FPGA coprocessor. Furthermore the interface circuit diagrams between various modules are written. In addition, it is introduced that ladder chart program how to control the transfer info of control arithmetic part in FPGA coprocessor. The PLC, through nearly two months of operation to meet the design of the basic requirements.

External Verification of SCADA System Embedded Controller Firmware

DTIC Science & Technology

2012-03-01

microprocessor and read-only memory (ROM) or flash memory for storing firmware and control logic [5],[8]. A PLC typically has three software levels as shown in...implementing different firmware. Because PLCs are in effect a microprocessor device, an analysis of the current research on embedded devices is important...Electronics Engineers (IEEE) published a 15 best practices guide for firmware control on microprocessors [44]. IEEE suggests that microprocessors

The Microprocessor controls the activity of mammalian retrotransposons

PubMed Central

Heras, Sara R.; Macias, Sara; Plass, Mireya; Fernandez, Noemí; Cano, David; Eyras, Eduardo; Garcia-Perez, José L.; Cáceres, Javier F.

2013-01-01

More than half of the human genome is made of Transposable Elements. Their ongoing mobilization is a driving force in genetic diversity; however, little is known about how the host regulates their activity. Here, we show that the Microprocessor (Drosha-DGCR8), which is required for microRNA biogenesis, also recognizes and binds RNAs derived from human LINE-1 (Long INterspersed Element 1), Alu and SVA retrotransposons. Expression analyses demonstrate that cells lacking a functional Microprocessor accumulate LINE-1 mRNA and encoded proteins. Furthermore, we show that structured regions of the LINE-1 mRNA can be cleaved in vitro by Drosha. Additionally, we used a cell culture-based assay to show that the Microprocessor negatively regulates LINE-1 and Alu retrotransposition in vivo. Altogether, these data reveal a new role for the Microprocessor as a post-transcriptional repressor of mammalian retrotransposons acting as a defender of human genome integrity. PMID:23995758

The Microprocessor controls the activity of mammalian retrotransposons.

PubMed

Heras, Sara R; Macias, Sara; Plass, Mireya; Fernandez, Noemí; Cano, David; Eyras, Eduardo; Garcia-Perez, José L; Cáceres, Javier F

2013-10-01

More than half of the human genome is made of transposable elements whose ongoing mobilization is a driving force in genetic diversity; however, little is known about how the host regulates their activity. Here, we show that the Microprocessor (Drosha-DGCR8), which is required for microRNA biogenesis, also recognizes and binds RNAs derived from human long interspersed element 1 (LINE-1), Alu and SVA retrotransposons. Expression analyses demonstrate that cells lacking a functional Microprocessor accumulate LINE-1 mRNA and encoded proteins. Furthermore, we show that structured regions of the LINE-1 mRNA can be cleaved in vitro by Drosha. Additionally, we used a cell culture-based assay to show that the Microprocessor negatively regulates LINE-1 and Alu retrotransposition in vivo. Altogether, these data reveal a new role for the Microprocessor as a post-transcriptional repressor of mammalian retrotransposons and a defender of human genome integrity.

Smart motor technology

NASA Technical Reports Server (NTRS)

Packard, D.; Schmitt, D.

1984-01-01

Current spacecraft design relies upon microprocessor control; however, motors usually require extensive additional electronic circuitry to interface with these microprocessor controls. An improved control technique that allows a smart brushless motor to connect directly to a microprocessor control system is described. An actuator with smart motors receives a spacecraft command directly and responds in a closed loop control mode. In fact, two or more smart motors can be controlled for synchronous operation.

DSS 13 Microprocessor Antenna Controller

NASA Technical Reports Server (NTRS)

Gosline, R. M.

1984-01-01

A microprocessor based antenna controller system developed as part of the unattended station project for DSS 13 is described. Both the hardware and software top level designs are presented and the major problems encounted are discussed. Developments useful to related projects include a JPL standard 15 line interface using a single board computer, a general purpose parser, a fast floating point to ASCII conversion technique, and experience gained in using off board floating point processors with the 8080 CPU.

Rapidly quantifying the relative distention of a human bladder

NASA Technical Reports Server (NTRS)

Companion, John A. (Inventor); Heyman, Joseph S. (Inventor); Mineo, Beth A. (Inventor); Cavalier, Albert R. (Inventor); Blalock, Travis N. (Inventor)

1991-01-01

A device and method was developed to rapidly quantify the relative distention of the bladder of a human subject. An ultrasonic transducer is positioned on the human subject near the bladder. A microprocessor controlled pulser excites the transducer by sending an acoustic wave into the human subject. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer where it is received, amplified, and processed by the receiver. The resulting signal is digitized by an analog to digital converter, controlled by the microprocessor again, and is stored in data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy. Based on programmed scientific measurements and the human subject's past history as contained in program memory, the microprocessor sends out a signal to turn on any or all of the available alarms. The alarm system includes and audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm.

The Use of a Microprocessor-Controlled, Video Output Atomic Absorption Spectrometer as an Educational Tool in a Two-Year Technical Curriculum.

ERIC Educational Resources Information Center

Kerfoot, Henry B.

Based on instructional experiences at Charles County Community College, Maryland, this report examines the pedagogical advantage of teaching atomic absorption (AA) spectroscopy with an AA spectrophotometer that is equipped with a microprocessor and video output mechanism. The report first discusses the growing importance of AA spectroscopy in…

[An integral chip for the multiphase pulse-duration modulation used for voltage changer in biomedical microprocessor systems].

PubMed

Balashov, A M; Selishchev, S V

2004-01-01

An integral chip (IC) was designed for controlling the step-down pulse voltage converter, which is based on the multiphase pulse-duration modulation, for use in biomedical microprocessor systems. The CMOS technology was an optimal basis for the IC designing. An additional feedback circuit diminishes the output voltage dispersion at dynamically changing loads.

A real-time implementation of an advanced sensor failure detection, isolation, and accommodation algorithm

NASA Technical Reports Server (NTRS)

Delaat, J. C.; Merrill, W. C.

1983-01-01

A sensor failure detection, isolation, and accommodation algorithm was developed which incorporates analytic sensor redundancy through software. This algorithm was implemented in a high level language on a microprocessor based controls computer. Parallel processing and state-of-the-art 16-bit microprocessors are used along with efficient programming practices to achieve real-time operation.

Mark IVA microprocessor support

NASA Technical Reports Server (NTRS)

Burford, A. L.

1982-01-01

The requirements and plans for the maintenance support of microprocessor-based controllers in the Deep Space Network Mark IVA System are discussed. Additional new interfaces and 16-bit processors have introduced problems not present in the Mark III System. The need for continuous training of maintenance personnel to maintain a level of expertise consistent with the sophistication of the required tools is also emphasized.

Safety and walking ability of KAFO users with the C-Brace® Orthotronic Mobility System, a new microprocessor stance and swing control orthosis

PubMed Central

Pröbsting, Eva; Kannenberg, Andreas; Zacharias, Britta

2016-01-01

Background: There are clear indications for benefits of stance control orthoses compared to locked knee ankle foot orthoses. However, stance control orthoses still have limited function compared with a sound human leg. Objectives: The aim of this study was to evaluate the potential benefits of a microprocessor stance and swing control orthosis compared to stance control orthoses and locked knee ankle foot orthoses in activities of daily living. Study design: Survey of lower limb orthosis users before and after fitting of a microprocessor stance and swing control orthosis. Methods: Thirteen patients with various lower limb pareses completed a baseline survey for their current orthotic device (locked knee ankle foot orthosis or stance control orthosis) and a follow-up for the microprocessor stance and swing control orthosis with the Orthosis Evaluation Questionnaire, a new self-reported outcome measure devised by modifying the Prosthesis Evaluation Questionnaire for use in lower limb orthotics and the Activities of Daily Living Questionnaire. Results: The Orthosis Evaluation Questionnaire results demonstrated significant improvements by microprocessor stance and swing control orthosis use in the total score and the domains of ambulation (p = .001), paretic limb health (p = .04), sounds (p = .02), and well-being (p = .01). Activities of Daily Living Questionnaire results showed significant improvements with the microprocessor stance and swing control orthosis with regard to perceived safety and difficulty of activities of daily living. Conclusion: The microprocessor stance and swing control orthosis may facilitate an easier, more physiological, and safer execution of many activities of daily living compared to traditional leg orthosis technologies. Clinical relevance This study compared patient-reported outcomes of a microprocessor stance and swing control orthosis (C-Brace) to those with traditional knee ankle foot orthosis and stance control orthosis devices. The C-Brace offers new functions including controlled knee flexion during weight bearing and dynamic swing control, resulting in significant improvements in perceived orthotic mobility and safety. PMID:27151648

Safety and walking ability of KAFO users with the C-Brace® Orthotronic Mobility System, a new microprocessor stance and swing control orthosis.

PubMed

Pröbsting, Eva; Kannenberg, Andreas; Zacharias, Britta

2017-02-01

There are clear indications for benefits of stance control orthoses compared to locked knee ankle foot orthoses. However, stance control orthoses still have limited function compared with a sound human leg. The aim of this study was to evaluate the potential benefits of a microprocessor stance and swing control orthosis compared to stance control orthoses and locked knee ankle foot orthoses in activities of daily living. Survey of lower limb orthosis users before and after fitting of a microprocessor stance and swing control orthosis. Thirteen patients with various lower limb pareses completed a baseline survey for their current orthotic device (locked knee ankle foot orthosis or stance control orthosis) and a follow-up for the microprocessor stance and swing control orthosis with the Orthosis Evaluation Questionnaire, a new self-reported outcome measure devised by modifying the Prosthesis Evaluation Questionnaire for use in lower limb orthotics and the Activities of Daily Living Questionnaire. The Orthosis Evaluation Questionnaire results demonstrated significant improvements by microprocessor stance and swing control orthosis use in the total score and the domains of ambulation ( p = .001), paretic limb health ( p = .04), sounds ( p = .02), and well-being ( p = .01). Activities of Daily Living Questionnaire results showed significant improvements with the microprocessor stance and swing control orthosis with regard to perceived safety and difficulty of activities of daily living. The microprocessor stance and swing control orthosis may facilitate an easier, more physiological, and safer execution of many activities of daily living compared to traditional leg orthosis technologies. Clinical relevance This study compared patient-reported outcomes of a microprocessor stance and swing control orthosis (C-Brace) to those with traditional knee ankle foot orthosis and stance control orthosis devices. The C-Brace offers new functions including controlled knee flexion during weight bearing and dynamic swing control, resulting in significant improvements in perceived orthotic mobility and safety.

Programmable calculator as a data system controller

DOE Office of Scientific and Technical Information (OSTI.GOV)

Barth, A.W.; Strasburg, A.C.

Digital data techniques are in common use for analysis of analog information obtained in various tests, and systems have been developed which use a minicomputer as the central controller and data processor. Now, microprocessors allow new design approaches at considerably less cost. This report outlines an approach to system design based on the use of a programmable calculator as the data system controller. A block diagram of the calculator-controlled data system is shown. It was found that the programmable calculator provides a viable alternative to minicomputers or microprocessors for the development laboratory requiring digital data processing. 3 figures. (RWR)

A microprocessor-based multichannel subsensory stochastic resonance electrical stimulator.

PubMed

Chang, Gwo-Ching

2013-01-01

Stochastic resonance electrical stimulation is a novel intervention which provides potential benefits for improving postural control ability in the elderly, those with diabetic neuropathy, and stroke patients. In this paper, a microprocessor-based subsensory white noise electrical stimulator for the applications of stochastic resonance stimulation is developed. The proposed stimulator provides four independent programmable stimulation channels with constant-current output, possesses linear voltage-to-current relationship, and has two types of stimulation modes, pulse amplitude and width modulation.

The development of a microprocessor-controlled linearly-actuated valve assembly

NASA Technical Reports Server (NTRS)

Wall, R. H.

1984-01-01

The development of a proportional fluid control valve assembly is presented. This electromechanical system is needed for space applications to replace the current proportional flow controllers. The flow is controlled by a microprocessor system that monitors the control parameters of upstream pressure and requested volumetric flow rate. The microprocessor achieves the proper valve stem displacement by means of a digital linear actuator. A linear displacement sensor is used to measure the valve stem position. This displacement is monitored by the microprocessor system as a feedback signal to close the control loop. With an upstream pressure between 15 and 47 psig, the developed system operates between 779 standard CU cm/sec (SCCS) and 1543 SCCS.

Use of electronic microprocessor-based instrumentation by the U.S. geological survey for hydrologic data collection

USGS Publications Warehouse

Shope, William G.; ,

1991-01-01

The U.S. Geological Survey is acquiring a new generation of field computers and communications software to support hydrologic data-collection at field locations. The new computer hardware and software mark the beginning of the Survey's transition from the use of electromechanical devices and paper tapes to electronic microprocessor-based instrumentation. Software is being developed for these microprocessors to facilitate the collection, conversion, and entry of data into the Survey's National Water Information System. The new automated data-collection process features several microprocessor-controlled sensors connected to a serial digital multidrop line operated by an electronic data recorder. Data are acquired from the sensors in response to instructions programmed into the data recorder by the user through small portable lap-top or hand-held computers. The portable computers, called personal field computers, also are used to extract data from the electronic recorders for transport by courier to the office computers. The Survey's alternative to manual or courier retrieval is the use of microprocessor-based remote telemetry stations. Plans have been developed to enhance the Survey's use of the Geostationary Operational Environmental Satellite telemetry by replacing the present network of direct-readout ground stations with less expensive units. Plans also provide for computer software that will support other forms of telemetry such as telephone or land-based radio.

A microprocessor-based control system for the Vienna PDS microdensitometer

NASA Technical Reports Server (NTRS)

Jenkner, H.; Stoll, M.; Hron, J.

1984-01-01

The Motorola Exorset 30 system, based on a Motorola 6809 microprocessor which serves as control processor for the microdensitometer is presented. User communication and instrument control are implemented in this syatem; data transmission to a host computer is provided via standard interfaces. The Vienna PDS system (VIPS) software was developed in BASIC and M6809 assembler. It provides efficient user interaction via function keys and argument input in a menu oriented environment. All parameters can be stored on, and retrieved from, minifloppy disks, making it possible to set up large scanning tasks. Extensive user information includes continuously updated status and coordinate displays, as well as a real time graphic display during scanning.

Automated mixed traffic transit vehicle microprocessor controller

NASA Technical Reports Server (NTRS)

Marks, R. A.; Cassell, P.; Johnston, A. R.

1981-01-01

An improved Automated Mixed Traffic Vehicle (AMTV) speed control system employing a microprocessor and transistor chopper motor current controller is described and its performance is presented in terms of velocity versus time curves. The on board computer hardware and software systems are described as is the software development system. All of the programming used in this controller was implemented using FORTRAN. This microprocessor controller made possible a number of safety features and improved the comfort associated with starting and shopping. In addition, most of the vehicle's performance characteristics can be altered by simple program parameter changes. A failure analysis of the microprocessor controller was generated and the results are included. Flow diagrams for the speed control algorithms and complete FORTRAN code listings are also included.

Application of Microprocessor-Based Equipment in Nuclear Power Plants - Technical Basis for a Qualification Methodology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Korsah, K.

This document (1) summarizes the most significant findings of the ''Qualification of Advanced Instrumentation and Control (I&C) Systems'' program initiated by the Nuclear Regulatory Commission (NRC); (2) documents a comparative analysis of U.S. and European qualification standards; and (3) provides recommendations for enhancing regulatory guidance for environmental qualification of microprocessor-based safety-related systems. Safety-related I&C system upgrades of present-day nuclear power plants, as well as I&C systems of Advanced Light-Water Reactors (ALWRs), are expected to make increasing use of microprocessor-based technology. The Nuclear Regulatory Commission (NRC) recognized that the use of such technology may pose environmental qualification challenges different from current,more » analog-based I&C systems. Hence, it initiated the ''Qualification of Advanced Instrumentation and Control Systems'' program. The objectives of this confirmatory research project are to (1) identify any unique environmental-stress-related failure modes posed by digital technologies and their potential impact on the safety systems and (2) develop the technical basis for regulatory guidance using these findings. Previous findings from this study have been documented in several technical reports. This final report in the series documents a comparative analysis of two environmental qualification standards--Institute of Electrical and Electronics Engineers (IEEE) Std 323-1983 and International Electrotechnical Commission (IEC) 60780 (1998)--and provides recommendations for environmental qualification of microprocessor-based systems based on this analysis as well as on the findings documented in the previous reports. The two standards were chosen for this analysis because IEEE 323 is the standard used in the U.S. for the qualification of safety-related equipment in nuclear power plants, and IEC 60780 is its European counterpart. In addition, the IEC document was published in 1998, and should reflect any new qualification concerns, from the European perspective, with regard to the use of microprocessor-based safety systems in power plants.« less

A microprocessor-based table lookup approach for magnetic bearing linearization

NASA Technical Reports Server (NTRS)

Groom, N. J.; Miller, J. B.

1981-01-01

An approach for producing a linear transfer characteristic between force command and force output of a magnetic bearing actuator without flux biasing is presented. The approach is microprocessor based and uses a table lookup to generate drive signals for the magnetic bearing power driver. An experimental test setup used to demonstrate the feasibility of the approach is described, and test results are presented. The test setup contains bearing elements similar to those used in a laboratory model annular momentum control device.

Microprocessors in Schools?

ERIC Educational Resources Information Center

Cuthbert, L. G.

1981-01-01

Examines reasons for including microprocessors in school curricula. Indicates that practical work with microprocessors is not easy and discusses problems associated with using and constructing these control and processing devices of microcomputers. (SK)

Functional added value of microprocessor-controlled knee joints in daily life performance of Medicare Functional Classification Level-2 amputees.

PubMed

Theeven, Patrick; Hemmen, Bea; Rings, Frans; Meys, Guido; Brink, Peter; Smeets, Rob; Seelen, Henk

2011-10-01

To assess the effects of using a microprocessor-controlled prosthetic knee joint on the functional performance of activities of daily living in persons with an above-knee leg amputation. To assess the effects of using a microprocessor-controlled prosthetic knee joint on the functional performance of activities of daily living in persons with an above-knee leg amputation. Randomised cross-over trial. Forty-one persons with unilateral above-knee or knee disarticulation limb loss, classified as Medicare Functional Classification Level-2 (MFCL-2). Participants were measured in 3 conditions, i.e. using a mechanically controlled knee joint and two types of microprocessor-controlled prosthetic knee joints. Functional performance level was assessed using a test in which participants performed 17 simulated activities of daily living (Assessment of Daily Activity Performance in Transfemoral amputees test). Performance time was measured and self-perceived level of difficulty was scored on a visual analogue scale for each activity. High levels of within-group variability in functional performance obscured detection of any effects of using a microprocessor-controlled prosthetic knee joint. Data analysis after stratification of the participants into 3 subgroups, i.e. participants with a "low", "intermediate" and "high" functional mobility level, showed that the two higher functional subgroups performed significantly faster using microprocessor-controlled prosthetic knee joints. MFCL-2 amputees constitute a heterogeneous patient group with large variation in functional performance levels. A substantial part of this group seems to benefit from using a microprocessor-controlled prosthetic knee joint when performing activities of daily living.

Autoregulatory mechanisms controlling the Microprocessor.

PubMed

Triboulet, Robinson; Gregory, Richard I

2010-01-01

The Microprocessor, comprising the ribonuclease Drosha and its essential cofactor, the double-stranded RNA-binding protein, DGCR8, is essential for the first step of the miRNA biogenesis pathway. It specifically cleaves double-stranded RNA within stem-loop structures of primary miRNA transcripts (pri-miRNAs) to generate precursor (pre-miRNA) intermediates. Pre-miRNAs are subsequently processed by Dicer to their mature 22 nt form. Thus, Microprocessor is essential for miRNA maturation, and pri-miRNA cleavage by this complex defines one end of the mature miRNA. Moreover, it is emerging that dysregulation of the Microprocessor is associated with various human diseases. It is therefore important to understand the mechanisms by which the expression of the subunits of the Microprocessor is regulated. Recent findings have uncovered a post-transcriptional mechanism that maintains the integrity of the Microprocessor. These studies revealed that the Microprocessor is involved in the processing of the messenger RNA (mRNA) that encodes DGCR8. This regulatory feedback loop, along with the reported role played by DGCR8 in the stabilization of Drosha protein, is part ofa newly identified regulatory mechanism controlling Microprocessor activity.

Special purpose parallel computer architecture for real-time control and simulation in robotic applications

NASA Technical Reports Server (NTRS)

Fijany, Amir (Inventor); Bejczy, Antal K. (Inventor)

1993-01-01

This is a real-time robotic controller and simulator which is a MIMD-SIMD parallel architecture for interfacing with an external host computer and providing a high degree of parallelism in computations for robotic control and simulation. It includes a host processor for receiving instructions from the external host computer and for transmitting answers to the external host computer. There are a plurality of SIMD microprocessors, each SIMD processor being a SIMD parallel processor capable of exploiting fine grain parallelism and further being able to operate asynchronously to form a MIMD architecture. Each SIMD processor comprises a SIMD architecture capable of performing two matrix-vector operations in parallel while fully exploiting parallelism in each operation. There is a system bus connecting the host processor to the plurality of SIMD microprocessors and a common clock providing a continuous sequence of clock pulses. There is also a ring structure interconnecting the plurality of SIMD microprocessors and connected to the clock for providing the clock pulses to the SIMD microprocessors and for providing a path for the flow of data and instructions between the SIMD microprocessors. The host processor includes logic for controlling the RRCS by interpreting instructions sent by the external host computer, decomposing the instructions into a series of computations to be performed by the SIMD microprocessors, using the system bus to distribute associated data among the SIMD microprocessors, and initiating activity of the SIMD microprocessors to perform the computations on the data by procedure call.

Gait and balance of transfemoral amputees using passive mechanical and microprocessor-controlled prosthetic knees.

PubMed

Kaufman, K R; Levine, J A; Brey, R H; Iverson, B K; McCrady, S K; Padgett, D J; Joyner, M J

2007-10-01

Microprocessor-controlled knee joints appeared on the market a decade ago. These joints are more sophisticated and more expensive than mechanical ones. The literature is contradictory regarding changes in gait and balance when using these sophisticated devices. This study employed a crossover design to assess the comparative performance of a passive mechanical knee prosthesis compared to a microprocessor-controlled knee joint in 15 subjects with an above-knee amputation. Objective measurements of gait and balance were obtained. Subjects demonstrated significantly improved gait characteristics after receiving the microprocessor-controlled prosthetic knee joint (p<0.01). Improvements in gait were a transition from a hyperextended knee to a flexed knee during loading response which resulted in a change from an internal knee flexor moment to a knee extensor moment. The participants' balance also improved (p<0.01). All conditions of the Sensory Organization Test (SOT) demonstrated improvements in equilibrium score. The composite score also increased. Transfemoral amputees using a microprocessor-controlled knee have significant improvements in gait and balance.

Automated Liquid-Level Control of a Nutrient Reservoir for a Hydroponic System

NASA Technical Reports Server (NTRS)

Smith, Boris; Asumadu, Johnson A.; Dogan, Numan S.

1997-01-01

A microprocessor-based system for control of the liquid level of a nutrient reservoir for a plant hydroponic growing system has been developed. The system uses an ultrasonic transducer to sense the liquid level or height. A National Instruments' Multifunction Analog and Digital Input/Output PC Kit includes NI-DAQ DOS/Windows driver software for an IBM 486 personal computer. A Labview Full Development system for Windows is the graphical programming system being used. The system allows liquid level control to within 0.1 cm for all levels tried between 8 and 36 cm in the hydroponic system application. The detailed algorithms have been developed and a fully automated microprocessor based nutrient replenishment system has been described for this hydroponic system.

The microprocessor-based synthesizer controller

NASA Technical Reports Server (NTRS)

Wick, M. R.

1980-01-01

Implementation and performance of the microprocessor-based controllers and Dana Digiphase Synthesizer (DCO) installed in the Deep Space Network exciter in the 64-meter and 34-meter subnets to support uplink tuning required for the Voyager-Saturn Encounter is discussed. Test data in tests conducted during the production of the controllers verified the design objective for phase control accuracy of 10 to the - 12 power cycles in eight hours during ramping. Tests conducted require a phase error between a theoretical calculated value and the actual phase of no greater than + or - 1 cycle. Tests included (1) a ramp over a period of eight hours using a ramp rate which covers the synthesizer tuning range (40-51 MHz) and (2) a ramp sequence using the maximum rate (+ or kHz/s) over the tuning range.

Pain and efficacy rating of a microprocessor-controlled metered injection system for local anaesthesia in minor hand surgery.

PubMed

Nimigan, André S; Gan, Bing Siang

2011-01-01

Purpose. Little attention has been given to syringe design and local anaesthetic administration methods. A microprocessor-controlled anaesthetic delivery device has become available that may minimize discomfort during injection. The purpose of this study was to document the pain experience associated with the use of this system and to compare it with use of a conventional syringe. Methods. A prospective, randomized clinical trial was designed. 40 patients undergoing carpal tunnel release were block randomized according to sex into a two groups: a traditional syringe group and a microprocessor-controlled device group. The primary outcome measure was surgical pain and local anaesthetic administration pain. Secondary outcomes included volume of anaesthetic used and injection time. Results. Analysis showed that equivalent anaesthesia was achieved in the microprocessor-controlled group despite using a significantly lower volume of local anaesthetic (P = .0002). This same group, however, has significantly longer injection times (P < .0001). Pain during the injection process or during surgery was not different between the two groups. Conclusions. This RCT comparing traditional and microprocessor controlled methods of administering local anaesthetic showed similar levels of discomfort in both groups. While the microprocessor-controlled group used less volume, the total time for the administration was significantly greater.

Energy expenditure and activity of transfemoral amputees using mechanical and microprocessor-controlled prosthetic knees.

PubMed

Kaufman, Kenton R; Levine, James A; Brey, Robert H; McCrady, Shelly K; Padgett, Denny J; Joyner, Michael J

2008-07-01

To quantify the energy efficiency of locomotion and free-living physical activity energy expenditure of transfemoral amputees using a mechanical and microprocessor-controlled prosthetic knee. Repeated-measures design to evaluate comparative functional outcomes. Exercise physiology laboratory and community free-living environment. Subjects (N=15; 12 men, 3 women; age, 42+/-9 y; range, 26-57 y) with transfemoral amputation. Research participants were long-term users of a mechanical prosthesis (20+/-10 y as an amputee; range, 3-36 y). They were fitted with a microprocessor-controlled knee prosthesis and allowed to acclimate (mean time, 18+/-8 wk) before being retested. Objective measurements of energy efficiency and total daily energy expenditure were obtained. The Prosthetic Evaluation Questionnaire was used to gather subjective feedback from the participants. Subjects demonstrated significantly increased physical activity-related energy expenditure levels in the participant's free-living environment (P=.04) after wearing the microprocessor-controlled prosthetic knee joint. There was no significant difference in the energy efficiency of walking (P=.34). When using the microprocessor-controlled knee, the subjects expressed increased satisfaction in their daily lives (P=.02). People ambulating with a microprocessor-controlled knee significantly increased their physical activity during daily life, outside the laboratory setting, and expressed an increased quality of life.

Microprocessor Controlled Isometric Contractions of Cat Gastrocnemius Muscle.

DTIC Science & Technology

1981-12-01

A-A15 504 AIR FORCE INST OF TECH WRIGHT-PATTERSON AFS OH 5CHOO--ETC F/6 6/2 MICROPROCESSOR CONTROLLED ISOMETRIC CONTRACTIONS OF CAT GASTROC-ETC(U) D...CONTROLLED ISOMETRIC CONTRACTIONS OF CAT GASTROCNEMIUS MUSCLE THESIS Presented to the Faculty of the School of Engineering of the Air Force Institute of...1981 Appzoved for public release; distribution unlimited. AFIT/GE/EE/81D-4O \\ MICROPROCESSOR CONTROLLED ISOMETRIC COMUtCTIONS OF CAT GASTfOCNEMIUS i

Microprocessor-Controlled Laser Balancing System

NASA Technical Reports Server (NTRS)

Demuth, R. S.

1985-01-01

Material removed by laser action as part tested for balance. Directed by microprocessor, laser fires appropriate amount of pulses in correct locations to remove necessary amount of material. Operator and microprocessor software interact through video screen and keypad; no programing skills or unprompted system-control decisions required. System provides complete and accurate balancing in single load-and-spinup cycle.

Multichannel optical sensing device

DOEpatents

Selkowitz, S.E.

1985-08-16

A multichannel optical sensing device is disclosed, for measuring the outdoor sky luminance or illuminance or the luminance or illuminance distribution in a room, comprising a plurality of light receptors, an optical shutter matrix including a plurality of liquid crystal optical shutter elements operable by electrical control signals between light transmitting and light stopping conditions, fiber optical elements connected between the receptors and the shutter elements, a microprocessor based programmable control unit for selectively supplying control signals to the optical shutter elements in a programmable sequence, a photodetector including an optical integrating spherical chamber having an input port for receiving the light from the shutter matrix and at least one detector element in the spherical chamber for producing output signals corresponding to the light, and output units for utilizing the output signals including a storage unit having a control connection to the microprocessor based programmable control unit for storing the output signals under the sequence control of the programmable control unit.

Multichannel optical sensing device

DOEpatents

Selkowitz, Stephen E.

1990-01-01

A multichannel optical sensing device is disclosed, for measuring the outr sky luminance or illuminance or the luminance or illuminance distribution in a room, comprising a plurality of light receptors, an optical shutter matrix including a plurality of liquid crystal optical shutter elements operable by electrical control signals between light transmitting and light stopping conditions, fiber optic elements connected between the receptors and the shutter elements, a microprocessor based programmable control unit for selectively supplying control signals to the optical shutter elements in a programmable sequence, a photodetector including an optical integrating spherical chamber having an input port for receiving the light from the shutter matrix and at least one detector element in the spherical chamber for producing output signals corresponding to the light, and output units for utilizing the output signals including a storage unit having a control connection to the microprocessor based programmable control unit for storing the output signals under the sequence control of the programmable control unit.

A real time, FEM based optimal control algorithm and its implementation using parallel processing hardware (transistors) in a microprocessor environment

NASA Technical Reports Server (NTRS)

Patten, William Neff

1989-01-01

There is an evident need to discover a means of establishing reliable, implementable controls for systems that are plagued by nonlinear and, or uncertain, model dynamics. The development of a generic controller design tool for tough-to-control systems is reported. The method utilizes a moving grid, time infinite element based solution of the necessary conditions that describe an optimal controller for a system. The technique produces a discrete feedback controller. Real time laboratory experiments are now being conducted to demonstrate the viability of the method. The algorithm that results is being implemented in a microprocessor environment. Critical computational tasks are accomplished using a low cost, on-board, multiprocessor (INMOS T800 Transputers) and parallel processing. Progress to date validates the methodology presented. Applications of the technique to the control of highly flexible robotic appendages are suggested.

The Effect of a Microprocessor Prosthetic Foot on Function and Quality of Life in Transtibial Amputees Who Are Limited Community Ambulators

DTIC Science & Technology

2017-09-01

parallel, randomized, controlled clinical trial designed to determine if a microprocessor controlled prosthetic foot (MPF), with greater range of...clinical trial designed to determine if a microprocessor controlled prosthetic foot (MPF), with greater range of motion and active power, will...Department of the Army position, policy or decision unless so designated by other documentation. CONTRACTING ORGANIZATION: University of Tennessee

Development of a fault-tolerant microprocessor based computer system for space flight

NASA Technical Reports Server (NTRS)

Montgomery, V. T.

1981-01-01

A methodology for the design of a tightly coupled, highly reliable microprocessor based computer system is described. The concept of triple modular redundancy with sparing is used. The notion of synchronizing by using a single crystal oscillator is examined. The use of decoders to replace voters is also used. The decoders not only isolate the failed module but also allow error identification to be accomplished. Each module is to have its own RAM memory. The necessary circuitry to select a correct memory and the corresponding DMA controller was designed.

Autoregulatory mechanisms controlling the microprocessor.

PubMed

Triboulet, Robinson; Gregory, Richard I

2011-01-01

The Microprocessor, comprising the ribonuclease Drosha and its essential cofactor, the double-stranded RNA-binding protein, DGCR8, is essential for the first step of the miRNA biogenesis pathway. It specifically cleaves double-stranded RNA within stem-loop structures of primary miRNA transcripts (pri-miRNAs) to generate precursor (pre-miRNA) intermediates. Pre-miRNAs are subsequently processed by Dicer to their mature ∼22 nt form. Thus, Microprocessor is essential for miRNA maturation, and pri-miRNA cleavage by this complex defines one end of the mature miRNA. Moreover, it is emerging that dysregulation of the Microprocessor is associated with various human diseases. It is therefore important to understand the mechanisms by which the expression of the subunits of the Microprocessor is regulated. Recent findings have uncovered a post-transcriptional mechanism that maintains the integrity of the Microprocessor. These studies revealed that the Microprocessor is involved in the processing of the messenger RNA (mRNA) that encodes DGCR8. This regulatory feedback loop, along with the reported role played by DGCR8 in the stabilization of Drosha protein, is part of a newly identified regulatory mechanism controlling Microprocessor activity.

Effect of various features on the life cycle cost of the timing/synchronization subsystem of the DCS digital communications network

NASA Technical Reports Server (NTRS)

Kimsey, D. B.

1978-01-01

The effect on the life cycle cost of the timing subsystem was examined, when these optional features were included in various combinations. The features included mutual control, directed control, double-ended reference links, independence of clock error measurement and correction, phase reference combining, self-organization, smoothing for link and nodal dropouts, unequal reference weightings, and a master in a mutual control network. An overall design of a microprocessor-based timing subsystem was formulated. The microprocessor (8080) implements the digital filter portion of a digital phase locked loop, as well as other control functions such as organization of the network through communication with processors at neighboring nodes.

The comparison of transfemoral amputees using mechanical and microprocessor- controlled prosthetic knee under different walking speeds: A randomized cross-over trial.

PubMed

Cao, Wujing; Yu, Hongliu; Zhao, Weiliang; Meng, Qiaoling; Chen, Wenming

2018-04-20

The microprocessor-controlled prosthetic knees have been introduced to transfemoral amputees due to advances in biomedical engineering. A body of scientific literature has shown that the microprocessor-controlled prosthetic knees improve the gait and functional abilities of persons with transfemoral amputation. The aim of this study was to propose a new microprocessor-controlled prosthetic knee (MPK) and compare it with non-microprocessor-controlled prosthetic knees (NMPKs) under different walking speeds. The microprocessor-controlled prosthetic knee (i-KNEE) with hydraulic damper was developed. The comfortable self-selected walking speeds of 12 subjects with i-KNEE and NMPK were obtained. The maximum swing flexion knee angle and gait symmetry were compared in i-KNEE and NMPK condition. The comfortable self-selected walking speeds of some subjects were higher with i-KNEE while some were not. There was no significant difference in comfortable self-selected walking speed between the i-KNEE and the NMPK condition (P= 0.138). The peak prosthetic knee flexion during swing in the i-KNEE condition was between sixty and seventy degree under any walking speed. In the NMPK condition, the maximum swing flexion knee angle changed significantly. And it increased with walking speed. There is no significant difference in knee kinematic symmetry when the subjects wear the i-KNEE or NMPK. The results of this study indicated that the new microprocessor-controlled prosthetic knee was suitable for transfemoral amputees. The maximum swing flexion knee angle under different walking speeds showed different properties in the NMPK and i-KNEE condition. The i-KNEE was more adaptive to speed changes. There was little difference of comfortable self-selected walking speed between i-KNEE and NMPK condition.

Energy Expenditure and Activity of Transfemoral Amputees Using Mechanical and Microprocessor-Controlled Prosthetic Knees

PubMed Central

Kaufman, Kenton R.; Levine, James A.; Brey, Robert H.; McCrady, Shelly K.; Padgett, Denny J.; Joyner, Michael J.

2009-01-01

Objective To quantify the energy efficiency of locomotion and free-living physical activity energy expenditure of transfemoral amputees using a mechanical and microprocessor-controlled prosthetic knee. Design Repeated-measures design to evaluate comparative functional outcomes. Setting Exercise physiology laboratory and community free-living environment. Participants Subjects (N=15; 12 men, 3 women; age, 42±9y; range, 26 –57y) with transfemoral amputation. Intervention Research participants were long-term users of a mechanical prosthesis (20±10y as an amputee; range, 3–36y). They were fitted with a microprocessor-controlled knee prosthesis and allowed to acclimate (mean time, 18±8wk) before being retested. Main Outcome Measures Objective measurements of energy efficiency and total daily energy expenditure were obtained. The Prosthetic Evaluation Questionnaire was used to gather subjective feedback from the participants. Results Subjects demonstrated significantly increased physical activity–related energy expenditure levels in the participant’s free-living environment (P=.04) after wearing the microprocessor-controlled prosthetic knee joint. There was no significant difference in the energy efficiency of walking (P=.34). When using the microprocessor-controlled knee, the subjects expressed increased satisfaction in their daily lives (P=.02). Conclusions People ambulating with a microprocessor-controlled knee significantly increased their physical activity during daily life, outside the laboratory setting, and expressed an increased quality of life. PMID:18586142

Evaluation of function, performance, and preference as transfemoral amputees transition from mechanical to microprocessor control of the prosthetic knee.

PubMed

Hafner, Brian J; Willingham, Laura L; Buell, Noelle C; Allyn, Katheryn J; Smith, Douglas G

2007-02-01

To evaluate differences in function, performance, and preference between mechanical and microprocessor prosthetic knee control technologies. A-B-A-B reversal design. Home, community, and laboratory environments. Twenty-one unilateral, transfemoral amputees. Mechanical control prosthetic knee versus microprocessor control prosthetic knee (Otto Bock C-Leg). Stair rating, hill rating and time, obstacle course time, divided attention task accuracy and time, Amputee Mobility Predictor score, step activity, Prosthesis Evaluation Questionnaire score, Medical Outcomes Study 36-Item Short-Form Health Survey score, self-reported frequency of stumbles and falls, and self-reported concentration required for ambulation. Stair descent score, hill descent time, and hill sound-side step length showed significant (P<.01) improvement with the C-Leg. Users reported a significant (P<.05) decrease in frequency of stumbles and falls, frustration with falling, and difficulty in multitasking while using the microprocessor knee. Subject satisfaction with the C-Leg was significantly (P<.001) greater than the mechanical control prosthesis. The study population showed improved performance when negotiating stairs and hills, reduced frequency of stumbling and falling, and a preference for the microprocessor control C-Leg as compared with the mechanical control prosthetic knee.

Redundant Asynchronous Microprocessor System

NASA Technical Reports Server (NTRS)

Meyer, G.; Johnston, J. O.; Dunn, W. R.

1985-01-01

Fault-tolerant computer structure called RAMPS (for redundant asynchronous microprocessor system) has simplicity of static redundancy but offers intermittent-fault handling ability of complex, dynamically redundant systems. New structure useful wherever several microprocessors are employed for control - in aircraft, industrial processes, robotics, and automatic machining, for example.

OS friendly microprocessor architecture: Hardware level computer security

NASA Astrophysics Data System (ADS)

Jungwirth, Patrick; La Fratta, Patrick

2016-05-01

We present an introduction to the patented OS Friendly Microprocessor Architecture (OSFA) and hardware level computer security. Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. Conventional microprocessors have depended on the Operating System for computer security and information assurance. The goal of the OS Friendly Architecture is to provide a high performance and secure microprocessor and OS system. We are interested in cyber security, information technology (IT), and SCADA control professionals reviewing the hardware level security features. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For light-weight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the cache memory pipeline provides for background cache read and write operations while the microprocessor's execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor's execution pipeline from accessing the same cache bank at the same time. This separation allows the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. Computer security operations are implemented in hardware. By extending Unix file permissions bits to each cache memory bank and memory address, the OSFA provides hardware level computer security.

System and method for leveraging human physiological traits to control microprocessor frequency

DOEpatents

Shye, Alex; Pan, Yan; Scholbrock, Benjamin; Miller, J. Scott; Memik, Gokhan; Dinda, Peter A; Dick, Robert P

2014-03-25

A system and method for leveraging physiological traits to control microprocessor frequency are disclosed. In some embodiments, the system and method may optimize, for example, a particular processor-based architecture based on, for example, end user satisfaction. In some embodiments, the system and method may determine, for example, whether their users are satisfied to provide higher efficiency, improved reliability, reduced power consumption, increased security, and a better user experience. The system and method may use, for example, biometric input devices to provide information about a user's physiological traits to a computer system. Biometric input devices may include, for example, one or more of the following: an eye tracker, a galvanic skin response sensor, and/or a force sensor.

Development and testing of the Rho Sigma Incorporated microprocessor control subsystem

NASA Technical Reports Server (NTRS)

Hankins, J. D.

1979-01-01

Product development and performance tests of three programmable microprocessor controllers for use with solar heating and cooling systems are presented. The products were developed to be marketable for public use.

40 CFR Appendix F to Part 60 - Quality Assurance Procedures

Code of Federal Regulations, 2012 CFR

2012-07-01

... automatically adjust the data to the corrected calibration values (e.g., microprocessor control) must be... calibration values (e.g., microprocessor control), you must program your PM CEMS to record the unadjusted...

A microprocessor application to a strapdown laser gyro navigator

NASA Technical Reports Server (NTRS)

Giardina, C.; Luxford, E.

1980-01-01

The replacement of analog circuit control loops for laser gyros (path length control, cross axis temperature compensation loops, dither servo and current regulators) with digital filters residing in microcomputers is addressed. In addition to the control loops, a discussion is given on applying the microprocessor hardware to compensation for coning and skulling motion where simple algorithms are processed at high speeds to compensate component output data (digital pulses) for linear and angular vibration motions. Highlights are given on the methodology and system approaches used in replacing differential equations describing the analog system in terms of the mechanized difference equations of the microprocessor. Standard one for one frequency domain techniques are employed in replacing analog transfer functions by their transform counterparts. Direct digital design techniques are also discussed along with their associated benefits. Time and memory loading analyses are also summarized, as well as signal and microprocessor architecture. Trade offs in algorithm, mechanization, time/memory loading, accuracy, and microprocessor architecture are also given.

Microprocessor Based Temperature Control of Liquid Delivery with Flow Disturbances.

ERIC Educational Resources Information Center

Kaya, Azmi

1982-01-01

Discusses analytical design and experimental verification of a PID control value for a temperature controlled liquid delivery system, demonstrating that the analytical design techniques can be experimentally verified by using digital controls as a tool. Digital control instrumentation and implementation are also demonstrated and documented for…

Concept report: Microprocessor control of electrical power system

NASA Technical Reports Server (NTRS)

Perry, E.

1977-01-01

An electrical power system which uses a microprocessor for systems control and monitoring is described. The microprocessor controlled system permits real time modification of system parameters for optimizing a system configuration, especially in the event of an anomaly. By reducing the components count, the assembling and testing of the unit is simplified, and reliability is increased. A resuable modular power conversion system capable of satisfying a large percentage of space applications requirements is examined along with the programmable power processor. The PC global controller which handles systems control and external communication is analyzed, and a software description is given. A systems application summary is also included.

Microprocessor-Based Valved Controller

NASA Technical Reports Server (NTRS)

Norman, Arnold M., Jr.

1987-01-01

New controller simpler, more precise, and lighter than predecessors. Mass-flow controller compensates for changing supply pressure and temperature such as occurs when gas-supply tank becomes depleted. By periodically updating calculation of mass-flow rate, controller determines correct new position for valve and keeps mass-flow rate nearly constant.

Microprocessor-based cardiopulmonary monitoring system

NASA Technical Reports Server (NTRS)

1978-01-01

The system uses a dedicated microprocessor for transducer control and data acquisition and analysis. No data will be stored in this system, but the data will be transmitted to the onboard data system. The data system will require approximately 12 inches of rack space and will consume only 100 watts of power. An experiment specific control panel, through a series of lighted buttons, will guide the operator through the test series providing a smaller margin of error. The experimental validity of the system was verified, and the reproducibility of data and reliability of the system checked. In addition, ease of training, ease of operator interaction, and crew acceptance were evaluated in actual flight conditions.

Device and method for measuring multi-phase fluid flow in a conduit using an elbow flow meter

DOEpatents

Ortiz, Marcos G.; Boucher, Timothy J.

1997-01-01

A system for measuring fluid flow in a conduit. The system utilizes pressure transducers disposed generally in line upstream and downstream of the flow of fluid in a bend in the conduit. Data from the pressure transducers is transmitted to a microprocessor or computer. The pressure differential measured by the pressure transducers is then used to calculate the fluid flow rate in the conduit. Control signals may then be generated by the microprocessor or computer to control flow, total fluid dispersed, (in, for example, an irrigation system), area of dispersal or other desired effect based on the fluid flow in the conduit.

Simulated fault injection - A methodology to evaluate fault tolerant microprocessor architectures

NASA Technical Reports Server (NTRS)

Choi, Gwan S.; Iyer, Ravishankar K.; Carreno, Victor A.

1990-01-01

A simulation-based fault-injection method for validating fault-tolerant microprocessor architectures is described. The approach uses mixed-mode simulation (electrical/logic analysis), and injects transient errors in run-time to assess the resulting fault impact. As an example, a fault-tolerant architecture which models the digital aspects of a dual-channel real-time jet-engine controller is used. The level of effectiveness of the dual configuration with respect to single and multiple transients is measured. The results indicate 100 percent coverage of single transients. Approximately 12 percent of the multiple transients affect both channels; none result in controller failure since two additional levels of redundancy exist.

A microprocessor controlled pressure scanning system

NASA Technical Reports Server (NTRS)

Anderson, R. C.

1976-01-01

A microprocessor-based controller and data logger for pressure scanning systems is described. The microcomputer positions and manages data from as many as four 48-port electro-mechanical pressure scanners. The maximum scanning rate is 80 pressure measurements per second (20 ports per second on each of four scanners). The system features on-line calibration, position-directed data storage, and once-per-scan display in engineering units of data from a selected port. The system is designed to be interfaced to a facility computer through a shared memory. System hardware and software are described. Factors affecting measurement error in this type of system are also discussed.

RS-600 programmable controller: Solar heating and cooling

NASA Technical Reports Server (NTRS)

1978-01-01

Three identical microprocessor control subsystems were developed which can be used in heating, heating and cooling, and/or hot water systems for single family, multifamily, or commercial applications. The controller incorporates a low cost, highly reliable (all solid state) microprocessor which can be easily reprogrammed.

Microprocessor-based single particle calibration of scintillation counter

NASA Technical Reports Server (NTRS)

Mazumdar, G. K. D.; Pathak, K. M.

1985-01-01

A microprocessor-base set-up is fabricated and tested for the single particle calibration of the plastic scintillator. The single particle response of the scintillator is digitized by an A/D converter, and a 8085 A based microprocessor stores the pulse heights. The digitized information is printed. Facilities for CRT display and cassette storing and recalling are also made available.

Preliminary experience with a hospital blood pressure follow up clinic with nurse practitioner assessment and microprocessor based data retrieval.

PubMed Central

Rubin, P C; Curzio, J L; Kelman, A; Elliott, H L; Reid, J L

1984-01-01

Experience over two years with 376 hypertensive patients managed at a clinic where the primary observations are made by a trained nurse, clinical information is held on a microprocessor, and treatment follows a standard stepped care approach has been assessed. Blood pressure control after both one and two years was appreciably improved, with over 70% of patients having diastolic pressure below 90 mm Hg compared with 22% of patients when they first attended the new clinic. The non-attendance rate was half that of the conventional hospital outpatient clinic. A computer based record system with a nurse run hypertension clinic is acceptable to patients and offers the possibility of more effective long term control of blood pressure in large numbers of patients. PMID:6432180

Microprocessor-controlled iontophoretic drug delivery of 5-fluorouracil: pharmacodynamic and pharmacokinetic study.

PubMed

Chandrashekar, N S; Shobha Rani, R H

2007-01-01

The purpose of this study was to fabricate monolithic 5-fluorouracil (5-FU) transdermal patch with microprocessor- controlled iontophoretic delivery, to evaluate the pharmacodynamic effects on Dalton's lymphoma ascites (DLA) induced in Balb/c mice, and to study pharmacokinetics in rabbits. The transdermal patches were prepared by solvent casting method; a reprogrammable microprocessor was developed and connected to the patches. DLA cells were injected to the hind limb of Balb/c mice (10 animals/group). In the first group of mice 5-FU was administered i.v. (12 mg/kg). In the second group of mice, transdermal patches (20 mg/patch/animal) were installed and kept for 10 consecutive days, while the third (control) group was kept without any treatment. The tumor diameter was measured every 5th day for 30 days, and the animal survival time and death pattern were studied. The electric current density protocol of 0.5 mA/cm(2) for 30 min was used in the pharmacokinetic study in rabbits. There was a significant reduction in tumor volume in the animals treated with monolithic matrix 5-FU transdermal patch compared to untreated controls and i.v. therapy. Tumor volume of the control animals was 5.8 cm(3) on the 30th day, while in 5-FU with transdermal patch delivery animals it was only 0.23 cm(3) (p <0.05). DLA cells tumor-bearing mice treated with 5-FU with transdermal patch had significantly increased lifespan (ILS). Control animals survived only 21+/-1 days after the tumor inoculation, while i.v. 5-FU and 5-FU patches animals survived 24+/-2.7 days and 39.5+/-1.87 days with ILS of 25.58% and 88.09%, respectively (p <0.01). There was significant sustained release of 5-FU through microprocessor-controlled patches and half-life was significantly higher (p <0.05) compared to the i.v. route. Cytotoxic concentration of 5-FU can be achieved through the transdermal drug delivery and effective therapeutic drug concentration can be maintained up to 24 h, with less toxicity. A new generation of transdermal drug delivery systems based on microprocessor-controlled iontophoresis is in the late stages of development and promises to enhance the treatment of local and systemic medical conditions. The incorporation of microprocessor into these systems has been an important advancement to ensure safe and efficient administration of a wide variety of drugs.

Improved Training Program for Fall Prevention of Warfighters with Lower Extremity Trauma

DTIC Science & Technology

2016-10-01

productive, active civilian life. The training program utilizes a microprocessor -controlled treadmill designed to deliver task- specific training...National Military Medical Center (WRNMMC), and Mayo. The fall prevention training program utilizes a microprocessor -controlled treadmill to deliver

Model based design introduction: modeling game controllers to microprocessor architectures

NASA Astrophysics Data System (ADS)

Jungwirth, Patrick; Badawy, Abdel-Hameed

2017-04-01

We present an introduction to model based design. Model based design is a visual representation, generally a block diagram, to model and incrementally develop a complex system. Model based design is a commonly used design methodology for digital signal processing, control systems, and embedded systems. Model based design's philosophy is: to solve a problem - a step at a time. The approach can be compared to a series of steps to converge to a solution. A block diagram simulation tool allows a design to be simulated with real world measurement data. For example, if an analog control system is being upgraded to a digital control system, the analog sensor input signals can be recorded. The digital control algorithm can be simulated with the real world sensor data. The output from the simulated digital control system can then be compared to the old analog based control system. Model based design can compared to Agile software develop. The Agile software development goal is to develop working software in incremental steps. Progress is measured in completed and tested code units. Progress is measured in model based design by completed and tested blocks. We present a concept for a video game controller and then use model based design to iterate the design towards a working system. We will also describe a model based design effort to develop an OS Friendly Microprocessor Architecture based on the RISC-V.

Information distribution in distributed microprocessor based flight control systems

NASA Technical Reports Server (NTRS)

Montgomery, R. C.; Lee, P. S.

1977-01-01

This paper presents an optimal control theory that accounts for variable time intervals in the information distribution to control effectors in a distributed microprocessor based flight control system. The theory is developed using a linear process model for the aircraft dynamics and the information distribution process is modeled as a variable time increment process where, at the time that information is supplied to the control effectors, the control effectors know the time of the next information update only in a stochastic sense. An optimal control problem is formulated and solved that provides the control law that minimizes the expected value of a quadratic cost function. An example is presented where the theory is applied to the control of the longitudinal motions of the F8-DFBW aircraft. Theoretical and simulation results indicate that, for the example problem, the optimal cost obtained using a variable time increment Markov information update process where the control effectors know only the past information update intervals and the Markov transition mechanism is almost identical to that obtained using a known uniform information update interval.

Variable-thermoinsulation garments with a microprocessor temperature controller.

PubMed

Kurczewska, Agnieszka; Leánikowski, Jacek

2008-01-01

This paper presents the concept of active variable thermoinsulation clothing for users working in low temperatures. Those garments contain heating inserts regulated by a microprocessor temperature controller. This paper also presents the results of tests carried out on the newly designed garments.

A Microprocessor-Based Real-Time Simulator of a Turbofan Engine

DTIC Science & Technology

1988-01-01

NASA AVSCOM Technical Memorandum 100889 Technical Report 88-C-011 Lfl A Microprocessor-Based Real-Time Simulator of a Turbofan Engine CD I Jonathan S...Accession For NTIS GRA&I A MICROPROCESSOR-BASED REAL-TIME SIMULATOR DTIC TABUnannounced OF A TURBOFAN ENGINE Justifiaation, Jonathan S. Litt Propulsion...the F100 engine without augmentation (without afterburning). HYTESS is a simplified simulation written in FORTRAN of a generalized turbofan engine . To

Device and method for measuring multi-phase fluid flow in a conduit using an elbow flow meter

DOEpatents

Ortiz, M.G.; Boucher, T.J.

1997-06-24

A system is described for measuring fluid flow in a conduit. The system utilizes pressure transducers disposed generally in line upstream and downstream of the flow of fluid in a bend in the conduit. Data from the pressure transducers is transmitted to a microprocessor or computer. The pressure differential measured by the pressure transducers is then used to calculate the fluid flow rate in the conduit. Control signals may then be generated by the microprocessor or computer to control flow, total fluid dispersed, (in, for example, an irrigation system), area of dispersal or other desired effect based on the fluid flow in the conduit. 2 figs.

Dynamic characterization and microprocessor control of the NASA/UVA proof mass actuator

NASA Technical Reports Server (NTRS)

Zimmerman, D. C.; Inman, D. J.; Horner, G. C.

1984-01-01

The self-contained electromagnetic-reaction-type force-actuator system developed by NASA/UVA for the verification of spacecraft-structure vibration-control laws is characterized and demonstrated. The device is controlled by a dedicated microprocessor and has dynamic characteristics determined by Fourier analysis. Test data on a cantilevered beam are shown.

Development of the transtibial prosthesis controlled pneumatically and electrically by microcomputer system.

PubMed

Shimada, Youichi; Terayama, Yukio

2006-01-01

This report represents the development of the prototype transtibial prosthesis to assist a smooth and comfortable walking for an unilateral amputee. This prosthesis is composed of two air cylinders, solenoid valves, portable and small air tank for compressed air storage, a multiple sensor system and a microprocessor. Two air cylinders are located around the rods to act as antagonistic and agonistic muscles. The system causes flexion and extension of the foot plate jointed at the ankle with compressed air, injected -or discharged via a solenoid or electromagnetic valves. The valves or solenoids are controlled with a microprocessor (Microchip Technology Inc., PIC16F876), the microprocessor generates control signals to the interface circuits for valve opening and closing consistent with the foot position during the walking phase. The control patterns generated in the microprocessor are modified with feedback from the touch sensor, ankle joint angle sensor and the two dimensional acceleration sensor. The primary walking pattern for an individual amputee should be developed through the gait analysis with video.

Developing prescribing guidelines for microprocessor-controlled prosthetic knees in the South East England.

PubMed

Sedki, Imad; Fisher, Keren

2015-06-01

Microprocessor-controlled prosthetic knees have gained increasing popularity over the last decade. Research supports their provision to address specific problems or to achieve certain rehabilitation goals. However, there are yet no agreed protocols or prescribing criteria to assist clinicians in the identification and appropriate selection of suitable users. The aim is to reach professionals' agreement on specific prescribing guidelines for microprocessor-controlled prosthetic knees. The study involved multidisciplinary teams from the Inter Regional Prosthetic Audit Group, representing nine Prosthetic Rehabilitation Centres in the South East England region. We used the Delphi technique with a total of three rounds to reach professionals' agreement. The prescribing guidelines were agreed and will be reviewed and updated depending on new research evidence and technical advances. This project is highly useful for professionals in a clinic setting to aid in appropriate patient selection and to justify the cost of prescribing microprocessor-controlled prosthetic knees. © The International Society for Prosthetics and Orthotics 2014.

Gait asymmetry of transfemoral amputees using mechanical and microprocessor-controlled prosthetic knees.

PubMed

Kaufman, Kenton R; Frittoli, Serena; Frigo, Carlo A

2012-06-01

Amputees walk with an asymmetrical gait, which may lead to future musculoskeletal degenerative changes. The purpose of this study was to compare the gait asymmetry of active transfemoral amputees while using a passive mechanical knee joint or a microprocessor-controlled knee joint. Objective 3D gait measurements were obtained in 15 subjects (12 men and 3 women; age 42, range 26-57). Research participants were longtime users of a mechanical prosthesis (mean 20 years, range 3-36 years). Joint symmetry was calculated using a novel method that includes the entire waveform throughout the gait cycle. There was no significant difference in hip, knee and ankle kinematics symmetry when using the different knee prostheses. In contrast, the results demonstrated a significant improvement in lower extremity joint kinetics symmetry when using the microprocessor-controlled knee. Use of the microprocessor-controlled knee joint resulted in improved gait symmetry. These improvements may lead to a reduction in the degenerative musculoskeletal changes often experienced by amputees. Copyright © 2011 Elsevier Ltd. All rights reserved.

Post-transcriptional control of DGCR8 expression by the Microprocessor.

PubMed

Triboulet, Robinson; Chang, Hao-Ming; Lapierre, Robert J; Gregory, Richard I

2009-06-01

The Microprocessor, comprising the RNase III Drosha and the double-stranded RNA binding protein DGCR8, is essential for microRNA (miRNA) biogenesis. In the miRNA processing pathway certain hairpin structures within primary miRNA (pri-miRNA) transcripts are specifically cleaved by the Microprocessor to release approximately 60-70-nucleotide precursor miRNA (pre-miRNA) intermediates. Although both Drosha and DGCR8 are required for Microprocessor activity, the mechanisms regulating the expression of these proteins are unknown. Here we report that the Microprocessor negatively regulates DGCR8 expression. Using in vitro reconstitution and in vivo studies, we demonstrate that a hairpin, localized in the 5' untranslated region (5'UTR) of DGCR8 mRNA, is cleaved by the Microprocessor. Accordingly, knockdown of Drosha leads to an increase in DGCR8 mRNA and protein levels in cells. Furthermore, we found that the DGCR8 5'UTR confers Microprocessor-dependent repression of a luciferase reporter gene in vivo. Our results uncover a novel feedback loop that regulates DGCR8 levels.

Microprocessor Based Real-Time Monitoring of Multiple ECG Signals

PubMed Central

Nasipuri, M.; Basu, D.K.; Dattagupta, R.; Kundu, M.; Banerjee, S.

1987-01-01

A microprocessor based system capable of realtime monitoring of multiple ECG signals has been described. The system consists of a number of microprocessors connected in a hierarchical fashion and capable of working concurrently on ECG data collected from different channels. The system can monitor different arrhythmic abnormalities for at least 36 patients even for a heart rate of 500 beats/min.

Army/NASA small turboshaft engine digital controls research program

NASA Technical Reports Server (NTRS)

Sellers, J. F.; Baez, A. N.

1981-01-01

The emphasis of a program to conduct digital controls research for small turboshaft engines is on engine test evaluation of advanced control logic using a flexible microprocessor based digital control system designed specifically for research on advanced control logic. Control software is stored in programmable memory. New control algorithms may be stored in a floppy disk and loaded directly into memory. This feature facilitates comparative evaluation of different advanced control modes. The central processor in the digital control is an Intel 8086 16 bit microprocessor. Control software is programmed in assembly language. Software checkout is accomplished prior to engine test by connecting the digital control to a real time hybrid computer simulation of the engine. The engine currently installed in the facility has a hydromechanical control modified to allow electrohydraulic fuel metering and VG actuation by the digital control. Simulation results are presented which show that the modern control reduces the transient rotor speed droop caused by unanticipated load changes such as cyclic pitch or wind gust transients.

A real time microcomputer implementation of sensor failure detection for turbofan engines

NASA Technical Reports Server (NTRS)

Delaat, John C.; Merrill, Walter C.

1989-01-01

An algorithm was developed which detects, isolates, and accommodates sensor failures using analytical redundancy. The performance of this algorithm was demonstrated on a full-scale F100 turbofan engine. The algorithm was implemented in real-time on a microprocessor-based controls computer which includes parallel processing and high order language programming. Parallel processing was used to achieve the required computational power for the real-time implementation. High order language programming was used in order to reduce the programming and maintenance costs of the algorithm implementation software. The sensor failure algorithm was combined with an existing multivariable control algorithm to give a complete control implementation with sensor analytical redundancy. The real-time microprocessor implementation of the algorithm which resulted in the successful completion of the algorithm engine demonstration, is described.

Initial experience with a microprocessor controlled current based defibrillator.

PubMed Central

Dalzell, G W; Cunningham, S R; Anderson, J; Adgey, A A

1989-01-01

Intramyocardial current flow is a critical factor in successful ventricular defibrillation. The main determinants of intramyocardial current flow during transthoracic countershock are the selected energy and the transthoracic impedance of the patient. To optimise the success of the first shock and to titrate energy dosage according to each patient's transthoracic impedance, a microprocessor controlled current based defibrillator was developed. It was compared with a conventional energy based protocol of 200 J (delivered energy), 200 J, then 360 J if required in 42 consecutive episodes of ventricular fibrillation in 33 men and seven women. The mean (SD) predicted transthoracic impedance was 69.9 (14.0) omega. First shock success with the standard protocol was 80.9%, and first or second shock success was 95.2%. The microprocessor controlled current based defibrillator automatically measured transthoracic impedance and calculated the energy required to develop a selected current in each patient. A current protocol of 30 A, 30 A, then 40 A, if required, was used in 29 men and 12 women with 41 episodes of ventricular fibrillation. Transthoracic impedance (mean 65.1 (15.9) omega) was similar to that in the energy protocol group and success rates for first shock (82.9%) and first or second shocks (97.5%) were also similar. The mean delivered energy per shock with the current based defibrillator for first or second shock success was significantly less (144.8 J) with the energy protocol (200 J). The mean peak current of successful shocks was also significantly reduced (29.0 v 31.9 A). A current based defibrillator titrates energy according to transthoracic impedance; it has a success rate comparable to conventional defibrillators but it delivers significantly less energy and current per shock. Images Fig 1 PMID:2757862

Small Microprocessor for ASIC or FPGA Implementation

NASA Technical Reports Server (NTRS)

Kleyner, Igor; Katz, Richard; Blair-Smith, Hugh

2011-01-01

A small microprocessor, suitable for use in applications in which high reliability is required, was designed to be implemented in either an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The design is based on commercial microprocessor architecture, making it possible to use available software development tools and thereby to implement the microprocessor at relatively low cost. The design features enhancements, including trapping during execution of illegal instructions. The internal structure of the design yields relatively high performance, with a significant decrease, relative to other microprocessors that perform the same functions, in the number of microcycles needed to execute macroinstructions. The problem meant to be solved in designing this microprocessor was to provide a modest level of computational capability in a general-purpose processor while adding as little as possible to the power demand, size, and weight of a system into which the microprocessor would be incorporated. As designed, this microprocessor consumes very little power and occupies only a small portion of a typical modern ASIC or FPGA. The microprocessor operates at a rate of about 4 million instructions per second with clock frequency of 20 MHz.

High Stability Metal-Protein Interactions Evaluated by Microcalorimetry

DTIC Science & Technology

2016-04-29

microprocessor -controlled internal vacuum pump runs for a 90 second period, then it evaluates the vacuum pressure attained, and if that value meets spec...and the other with the software. There is a place in the wash module program where the ITC’s microprocessor - controlled internal vacuum pump runs for

Report on the formal specification and partial verification of the VIPER microprocessor

NASA Technical Reports Server (NTRS)

Brock, Bishop; Hunt, Warren A., Jr.

1991-01-01

The formal specification and partial verification of the VIPER microprocessor is reviewed. The VIPER microprocessor was designed by RSRE, Malvern, England, for safety critical computing applications (e.g., aircraft, reactor control, medical instruments, armaments). The VIPER was carefully specified and partially verified in an attempt to provide a microprocessor with completely predictable operating characteristics. The specification of VIPER is divided into several levels of abstraction, from a gate-level description up to an instruction execution model. Although the consistency between certain levels was demonstrated with mechanically-assisted mathematical proof, the formal verification of VIPER was never completed.

A COTS-Based Replacement Strategy for Aging Avionics Computers

DTIC Science & Technology

2001-12-01

Communication Control Unit. A COTS-Based Replacement Strategy for Aging Avionics Computers COTS Microprocessor Real Time Operating System New Native Code...Native Code Objec ts Native Code Thread Real - Time Operating System Legacy Function x Virtual Component Environment Context Switch Thunk Add-in Replace

49 CFR 229.27 - Annual tests.

Code of Federal Regulations, 2011 CFR

2011-10-01

... DMU locomotive or an MU locomotive, equipped with a microprocessor-based event recorder that includes...) A microprocessor-based event recorder with a self-monitoring feature equipped to verify that all...

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

NASA Technical Reports Server (NTRS)

Barry, R. C.

1980-01-01

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Microprocessor control of photovoltaic systems

NASA Technical Reports Server (NTRS)

Millner, A. R.; Kaufman, D. L.

1984-01-01

The present low power CMOS microprocessor controller for photovoltaic power systems possesses three programs, which are respectively intended for (1) conventional battery-charging systems with state-of-charge estimation and sequential shedding of subarrays and loads, (2) maximum power-controlled battery-charging systems, and (3) variable speed dc motor drives. Attention is presently given to the development of this terrestrial equipment for spacecraft use.

Instrumentation and control of harmonic oscillators via a single-board microprocessor-FPGA device.

PubMed

Picone, Rico A R; Davis, Solomon; Devine, Cameron; Garbini, Joseph L; Sidles, John A

2017-04-01

We report the development of an instrumentation and control system instantiated on a microprocessor-field programmable gate array (FPGA) device for a harmonic oscillator comprising a portion of a magnetic resonance force microscope. The specific advantages of the system are that it minimizes computation, increases maintainability, and reduces the technical barrier required to enter the experimental field of magnetic resonance force microscopy. Heterodyne digital control and measurement yields computational advantages. A single microprocessor-FPGA device improves system maintainability by using a single programming language. The system presented requires significantly less technical expertise to instantiate than the instrumentation of previous systems, yet integrity of performance is retained and demonstrated with experimental data.

Instrumentation and control of harmonic oscillators via a single-board microprocessor-FPGA device

NASA Astrophysics Data System (ADS)

Picone, Rico A. R.; Davis, Solomon; Devine, Cameron; Garbini, Joseph L.; Sidles, John A.

2017-04-01

We report the development of an instrumentation and control system instantiated on a microprocessor-field programmable gate array (FPGA) device for a harmonic oscillator comprising a portion of a magnetic resonance force microscope. The specific advantages of the system are that it minimizes computation, increases maintainability, and reduces the technical barrier required to enter the experimental field of magnetic resonance force microscopy. Heterodyne digital control and measurement yields computational advantages. A single microprocessor-FPGA device improves system maintainability by using a single programming language. The system presented requires significantly less technical expertise to instantiate than the instrumentation of previous systems, yet integrity of performance is retained and demonstrated with experimental data.

Implementation of the DAST ARW II control laws using an 8086 microprocessor and an 8087 floating-point coprocessor. [drones for aeroelasticity research

NASA Technical Reports Server (NTRS)

Kelly, G. L.; Berthold, G.; Abbott, L.

1982-01-01

A 5 MHZ single-board microprocessor system which incorporates an 8086 CPU and an 8087 Numeric Data Processor is used to implement the control laws for the NASA Drones for Aerodynamic and Structural Testing, Aeroelastic Research Wing II. The control laws program was executed in 7.02 msec, with initialization consuming 2.65 msec and the control law loop 4.38 msec. The software emulator execution times for these two tasks were 36.67 and 61.18, respectively, for a total of 97.68 msec. The space, weight and cost reductions achieved in the present, aircraft control application of this combination of a 16-bit microprocessor with an 80-bit floating point coprocessor may be obtainable in other real time control applications.

Perceived self-efficacy and specific self-reported outcomes in persons with lower-limb amputation using a non-microprocessor-controlled versus a microprocessor-controlled prosthetic knee.

PubMed

Möller, Saffran; Hagberg, Kerstin; Samulesson, Kersti; Ramstrand, Nerrolyn

2018-04-01

To measure self-efficacy in a group of individuals who have undergone a lower-limb amputation and investigate the relationship between self-efficacy and prosthetic-specific outcomes including prosthetic use, mobility, amputation-related problems and global health. A second purpose was to examine if differences exist in outcomes based upon the type of prosthetic knee unit being used. Cross-sectional study using the General Self-Efficacy (GSE) Scale and the Questionnaire for Persons with a Transfemoral Amputation (Q-TFA). Forty-two individuals participated in the study. Twenty-three used a non-microprocessor-controlled prosthetic knee joint (non-MPK) and 19 used a microprocessor-controlled prosthetic knee joint (MPK). The study sample had quite high GSE scores (32/40). GSE scores were significantly correlated to the Q-TFA prosthetic use, mobility and problem scores. High GSE scores were related to higher levels of prosthetic use, mobility, global scores and negatively related to problem score. No significant difference was observed between individuals using a non-MPK versus MPK joints. Individuals with high self-efficacy used their prosthesis to a higher degree and high self-efficacy was related to higher level of mobility, global scores and fewer problems related to the amputation in individuals who have undergone a lower-limb amputation and were using a non-MPK or MPK knee. Implications for rehabilitation Perceived self-efficacy has has been shown to be related to quality of life, prosthetic mobility and capability as well as social activities in daily life. Prosthetic rehabilitation is primary focusing on physical improvement rather than psychological interventions. More attention should be directed towards the relationship between self-efficacy and prosthetic related outcomes during prosthetic rehabilitation after a lower-limb amputation.

49 CFR 229.23 - Periodic inspection: general.

Code of Federal Regulations, 2012 CFR

2012-10-01

... locomotive. (b) For each locomotive equipped with advanced microprocessor-based on-board electronic condition... April 2, or July 3 if it's a locomotive equipped with advanced microprocessor-based on-board electronic...

49 CFR 229.23 - Periodic inspection: general.

Code of Federal Regulations, 2013 CFR

2013-10-01

... locomotive. (b) For each locomotive equipped with advanced microprocessor-based on-board electronic condition... April 2, or July 3 if it's a locomotive equipped with advanced microprocessor-based on-board electronic...

49 CFR 229.23 - Periodic inspection: general.

Code of Federal Regulations, 2014 CFR

2014-10-01

... locomotive. (b) For each locomotive equipped with advanced microprocessor-based on-board electronic condition... April 2, or July 3 if it's a locomotive equipped with advanced microprocessor-based on-board electronic...

G-cueing microcontroller (a microprocessor application in simulators)

NASA Technical Reports Server (NTRS)

Horattas, C. G.

1980-01-01

A g cueing microcontroller is described which consists of a tandem pair of microprocessors, dedicated to the task of simulating pilot sensed cues caused by gravity effects. This task includes execution of a g cueing model which drives actuators that alter the configuration of the pilot's seat. The g cueing microcontroller receives acceleration commands from the aerodynamics model in the main computer and creates the stimuli that produce physical acceleration effects of the aircraft seat on the pilots anatomy. One of the two microprocessors is a fixed instruction processor that performs all control and interface functions. The other, a specially designed bipolar bit slice microprocessor, is a microprogrammable processor dedicated to all arithmetic operations. The two processors communicate with each other by a shared memory. The g cueing microcontroller contains its own dedicated I/O conversion modules for interface with the seat actuators and controls, and a DMA controller for interfacing with the simulation computer. Any application which can be microcoded within the available memory, the available real time and the available I/O channels, could be implemented in the same controller.

Stability of nano-fluids and their use for thermal management of a microprocessor: an experimental and numerical study

NASA Astrophysics Data System (ADS)

Shoukat, Ahmad Adnan; Shaban, Muhammad; Israr, Asif; Shah, Owaisur Rahman; Khan, Muhammad Zubair; Anwar, Muhammad

2018-03-01

We investigate the heat transfer effect of different types of Nano-fluids on the pin fin heat sinks used in computer's microprocessor. Nano-particles of Aluminum oxide have been used with volumetric concentrations of 0.002% and Silver oxide with volumetric concentrations of 0.001% in the base fluid of deionized water. We have also used Aluminum oxide with ethylene glycol at volumetric concentrations of 0.002%. We report the cooling rates of Nano-fluids for pin-fin heat to cool the microprocessor and compare these with the cooling rate of pure water. We use a microprocessor heat generator in this investigation. The base temperature is obtained using surface heater of power 130 W. The main purpose of this work is to minimize the base temperature, and increase the heat transfer rate of the water block and radiator. The temperature of the heat sink is maintained at 110 °C which is nearly equal to the observed computer microprocessor temperature. We also provide the base temperature at different Reynolds's number using the above mention Nano-fluids with different volumetric concentrations.

Impact of a stance phase microprocessor-controlled knee prosthesis on level walking in lower functioning individuals with a transfemoral amputation.

PubMed

Eberly, Valerie J; Mulroy, Sara J; Gronley, JoAnne K; Perry, Jacquelin; Yule, William J; Burnfield, Judith M

2014-12-01

For individuals with transfemoral amputation, walking with a prosthesis presents challenges to stability and increases the demand on the hip of the prosthetic limb. Increasing age or comorbidities magnify these challenges. Computerized prosthetic knee joints improve stability and efficiency of gait, but are seldom prescribed for less physically capable walkers who may benefit from them. To compare level walking function while wearing a microprocessor-controlled knee (C-Leg Compact) prosthesis to a traditionally prescribed non-microprocessor-controlled knee prosthesis for Medicare Functional Classification Level K-2 walkers. Crossover. Stride characteristics, kinematics, kinetics, and electromyographic activity were recorded in 10 participants while walking with non-microprocessor-controlled knee and Compact prostheses. Walking with the Compact produced significant increase in velocity, cadence, stride length, single-limb support, and heel-rise timing compared to walking with the non-microprocessor-controlled knee prosthesis. Hip and thigh extension during late stance improved bilaterally. Ankle dorsiflexion, knee extension, and hip flexion moments of the prosthetic limb were significantly improved. Improvements in walking function and stability on the prosthetic limb were demonstrated by the K-2 level walkers when using the C-Leg Compact prosthesis. Understanding the impact of new prosthetic designs on gait mechanics is essential to improve prescription guidelines for deconditioned or older persons with transfemoral amputation. Prosthetic designs that improve stability for safety and walking function have the potential to improve community participation and quality of life. © The International Society for Prosthetics and Orthotics 2013.

The design of a microprocessor-based data logger

USGS Publications Warehouse

Leap, K.J.; Dedini, L.A.

1982-01-01

The design of a microprocessor-based data logger, which collects and digitizes analog voltage signals from a continuous-measuring instrumentation system and transmits serial data to a magnetic tape recorder, is discussed. The data logger was assembled from commercially-available components and can be user-programmed for greater flexibility. A description of the data logger hardware and software designs, general operating instructions, the microprocessor program listing, and electrical schematic diagrams are presented.

Hardware-Enabled Security Through On-Chip Reconfigurable Fabric

DTIC Science & Technology

2016-02-05

SECURITY CLASSIFICATION OF: The goal of this project was to enable hardware-based security techniques on future microprocessors in a way that they... microprocessors in a way that they can be added and updated after fabrication, similar to software, while maintaining the efficiency and the security of...Progress The goal of this project was to enable hardware-based security techniques on future microprocessors in a way that they can be added and

A Micro-Processor Based System as a Teaching Tool.

ERIC Educational Resources Information Center

Spero, Samuel W.

1979-01-01

Two instructional strategies incorporating a microprocessor-based computer system are described. These are the use of the system to drive a television monitor, and the system's use in generating problem sets. (MP)

A central microprocessor controlled electrical storage heating system

NASA Astrophysics Data System (ADS)

Horstmann, H.

1980-12-01

The use of a microprocessor to control the reloading of electrical storage heaters not only during the night, but whenever the electrical grid is cycled down, was tested. The test setup, used to control a total of about 10 MW installed storage heating in 96 dwellings, is described. It is demonstrated that additional consumers can be connected to the system without demand for more power stations.

A microprocessor-based automation test system for the experiment of the multi-stage compressor

NASA Astrophysics Data System (ADS)

Zhang, Huisheng; Lin, Chongping

1991-08-01

An automation test system that is controlled by the microprocessor and used in the multistage compressor experiment is described. Based on the analysis of the compressor experiment performances, a complete hardware system structure is set up. It is composed of a IBM PC/XT computer, a large scale sampled data system, the moving machine with three directions, the scanners, the digital instrumentation and some output devices. A program structure of real-time software system is described. The testing results show that this test system can take the measure of many parameter magnitudes in the blade row places and on a boundary layer in different states. The automatic extent and the accuracy of experiment is increased and the experimental cost is reduced.

77 FR 22384 - Petition To Modify an Exemption of a Previously Approved Antitheft Device; Porsche

Federal Register 2010, 2011, 2012, 2013, 2014

2012-04-13

... passive, microprocessor-based device which includes a starter interrupt function, transponder key and a.... Porsche stated that the antitheft system consists of two major subsystems: a microprocessor-based...

75 FR 22174 - Petition To Modify an Exemption of a Previously Approved Antitheft Device; Porsche

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-27

... passive antitheft device installed on the Porsche Panamera includes a microprocessor-based immobilizer... modified antitheft system will now consist of a microprocessor based immobilizer system which prevents...

Power Converters Maximize Outputs Of Solar Cell Strings

NASA Technical Reports Server (NTRS)

Frederick, Martin E.; Jermakian, Joel B.

1993-01-01

Microprocessor-controlled dc-to-dc power converters devised to maximize power transferred from solar photovoltaic strings to storage batteries and other electrical loads. Converters help in utilizing large solar photovoltaic arrays most effectively with respect to cost, size, and weight. Main points of invention are: single controller used to control and optimize any number of "dumb" tracker units and strings independently; power maximized out of converters; and controller in system is microprocessor.

Talking Fire Alarms Calm Kids.

ERIC Educational Resources Information Center

Executive Educator, 1984

1984-01-01

The new microprocessor-based fire alarm systems can help to control smoke movement throughout school buildings by opening vents and doors, identify the burning section, activate voice alarms, provide firefighters with telephone systems during the fire, and release fire-preventing gas. (KS)

Microprocessor controlled advanced battery management systems

NASA Technical Reports Server (NTRS)

Payne, W. T.

1978-01-01

The advanced battery management system described uses the capabilities of an on-board microprocessor to: (1) monitor the state of the battery on a cell by cell basis; (2) compute the state of charge of each cell; (3) protect each cell from reversal; (4) prevent overcharge on each individual cell; and (5) control dual rate reconditioning to zero volts per cell.

Advanced microprocessor based power protection system using artificial neural network techniques

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Z.; Kalam, A.; Zayegh, A.

This paper describes an intelligent embedded microprocessor based system for fault classification in power system protection system using advanced 32-bit microprocessor technology. The paper demonstrates the development of protective relay to provide overcurrent protection schemes for fault detection. It also describes a method for power fault classification in three-phase system based on the use of neural network technology. The proposed design is implemented and tested on a single line three phase power system in power laboratory. Both the hardware and software development are described in detail.

Outcomes associated with the use of microprocessor-controlled prosthetic knees among individuals with unilateral transfemoral limb loss: a systematic review.

PubMed

Sawers, Andrew B; Hafner, Brian J

2013-01-01

Microprocessor-controlled prosthetic knees (MPKs) have been developed as an alternative to non-microprocessor-controlled knees (NMPKs) to address challenges facing individuals with lower-limb loss. A body of scientific literature comparing MPKs and NMPKs exists but has yet to be critically appraised. Therefore, we conducted a systematic review to examine outcomes associated with the use of these interventions among individuals with transfemoral limb loss. A search of biomedical databases identified 241 publications, of which 27 met the inclusion and exclusion criteria and were reviewed for methodological quality and content. We developed 28 empirical evidence statements (EESs) in 9 outcome categories (metabolic energy expenditure, activity, cognitive demand, gait mechanics, environmental obstacle negotiation, safety, preference and satisfaction, economics, and health and quality of life) based on findings in the literature. The level of evidence supporting these EESs varied due to quantity, quality, and consistency of the results. EESs supported by a moderate level of evidence that noted significant differences between MPKs and NMPKs were derived in five of the nine outcome categories. The results from this review suggest that evidence exists to inform clinical practice and that additional research is needed to confirm existing evidence and better understand outcomes associated with the use of NMPKs and MPKs.

Simplified microprocessor design for VLSI control applications

NASA Technical Reports Server (NTRS)

Cameron, K.

1991-01-01

A design technique for microprocessors combining the simplicity of reduced instruction set computers (RISC's) with the richer instruction sets of complex instruction set computers (CISC's) is presented. They utilize the pipelined instruction decode and datapaths common to RISC's. Instruction invariant data processing sequences which transparently support complex addressing modes permit the formulation of simple control circuitry. Compact implementations are possible since neither complicated controllers nor large register sets are required.

LLL 8080 BASIC-II interpreter user's manual

DOE Office of Scientific and Technical Information (OSTI.GOV)

McGoldrick, P.R.; Dickinson, J.; Allison, T.G.

1978-04-03

Scientists are finding increased applications for microprocessors as process controllers in their experiments. However, while microprocessors are small and inexpensive, they are difficult to program in machine or assembly language. A high-level language is needed to enable scientists to develop their own microcomputer programs for their experiments on location. Recognizing this need, LLL contracted to have such a language developed. This report describes the resulting LLL BASIC interpreter, which opeates with LLL's 8080-based MCS-8 microcomputer system. All numerical operations are done using Advanced Micro Device's Am9511 arithmetic processor chip or optionally by using a software simulation of that chip. 1more » figure.« less

SEU induced errors observed in microprocessor systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Asenek, V.; Underwood, C.; Oldfield, M.

In this paper, the authors present software tools for predicting the rate and nature of observable SEU induced errors in microprocessor systems. These tools are built around a commercial microprocessor simulator and are used to analyze real satellite application systems. Results obtained from simulating the nature of SEU induced errors are shown to correlate with ground-based radiation test data.

Microprocessor Control Design for a Low-Head Crossflow Turbine.

DTIC Science & Technology

1985-03-01

Controllers For a Typical 10 KW Hydroturbine ............ 1-5 I-1 Ely’s Crossflow Turbine . ........ 11-2 11-2 Basic Turbine * * 0 * 0 11-5 11-3 Turbine...the systems. For example, a 25 kilowatt hydroturbine built and installed by Bell Hydroelectric would cost approximately $20,000 in 1978 (6:49). The...O Manual Controller S2 E- Microprocessor Controller 1 2 3 4 5 6 7 8 YEARS Fig. 1-2 Comparative Costs of Controllers For a Typical 10 KW Hydroturbine

Microprocessor control system for 200-kilowatt Mod-OA wind turbines

NASA Technical Reports Server (NTRS)

Nyland, T. W.; Birchenough, A. G.

1982-01-01

The microprocessor system and program used to control the operation of the 200-kW Mod-OA wind turbines is described. The system is programmed to begin startup and shutdown sequences automatically and to control yaw motion. Rotor speed and power output are controlled with integral and proportional control of the blade pitch angle. Included in the report are a description of the hardware and a discussion of the software programming technique. A listing of the PL/M software program is given.

Orbit determination software development for microprocessor based systems: Evaluation and recommendations

NASA Technical Reports Server (NTRS)

Shenitz, C. M.; Mcgarry, F. E.; Tasaki, K. K.

1980-01-01

A guide is presented for National Aeronautics and Space Administration management personnel who stand to benefit from the lessons learned in developing microprocessor-based flight dynamics software systems. The essential functional characteristics of microprocessors are presented. The relevant areas of system support software are examined, as are the distinguishing characteristics of flight dynamics software. Design examples are provided to illustrate the major points presented, and actual development experience obtained in this area is provided as evidence to support the conclusions reached.

Gallium-arsenide process evaluation based on a RISC microprocessor example

NASA Astrophysics Data System (ADS)

Brown, Richard B.; Upton, Michael; Chandna, Ajay; Huff, Thomas R.; Mudge, Trevor N.; Oettel, Richard E.

1993-10-01

This work evaluates the features of a gallium-arsenide E/D MESFET process in which a 32-b RISC microprocessor was implemented. The design methodology and architecture of this prototype CPU are described. The performance sensitivity of the microprocessor and other large circuit blocks to different process parameters is analyzed, and recommendations for future process features, circuit approaches, and layout styles are made. These recommendations are reflected in the design of a second microprocessor using a more advanced process that achieves much higher density and performance.

An assembler for the MOS Technology 6502 microprocessor as implemented in jolt (TM) and KIM-1 (TM)

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1976-01-01

Design of low-cost, microcomputer-based navigation receivers, and the assembler are described. The development of computer software for microprocessors is materially aided by the assembler program using mnemonic variable names. The flexibility of the environment provided by the IBM's Virtual Machine Facility and the Conversational Monitor System, make possible the convenient assembler access. The implementation of the assembler for the microprocessor chip serves a part of the present need and forms a model for support of other microprocessors.

A Feasibility Study for Advanced Technology Integration for General Aviation.

DTIC Science & Technology

1980-05-01

154 4.5.9.4 Stratified Charge Reciprocating Engine ..... .. 155 4.5.9.5 Advanced Diesel Engine . ... 158 4.5.9.6 Liquid Cooling ... ........ 159... diesel , rotary combustion engine, advanced reciprocating engine concepts. (7) Powerplant control - integrated controls, microprocessor- based controls...Research Center Topics. (1) GATE (2) Positive displacement engines (a) Advanced reciprocating engines. (b) Alternative engine systems Diesel engines

PDSparc: A Drop-in Replacement for LEON3 Written Using Synopsys Processor Designer

DTIC Science & Technology

2015-08-18

Written Using  Synopsys Processor Designer1  David Whelihan, Ph.D. and Kate Thurmer  MIT Lincoln Laboratory, Lexington, MA, USA    ABSTRACT  Microprocessors ...internet-enabled appliances has opened a significant new niche: the Application Specific Standard Product (ASSP) microprocessor . These processors... microprocessor is a small part of a working system and requires peripherals such as DRAM controllers and communication sub-systems to properly carry out its

Hardware math for the 6502 microprocessor

NASA Technical Reports Server (NTRS)

Kissel, R.; Currie, J.

1985-01-01

A floating-point arithmetic unit is described which is being used in the Ground Facility of Large Space Structures Control Verification (GF/LSSCV). The experiment uses two complete inertial measurement units and a set of three gimbal torquers in a closed loop to control the structural vibrations in a flexible test article (beam). A 6502 (8-bit) microprocessor controls four AMD 9511A floating-point arithmetic units to do all the computation in 20 milliseconds.

Horizontal Directional Drilling-Length Detection Technology While Drilling Based on Bi-Electro-Magnetic Sensing.

PubMed

Wang, Yudan; Wen, Guojun; Chen, Han

2017-04-27

The drilling length is an important parameter in the process of horizontal directional drilling (HDD) exploration and recovery, but there has been a lack of accurate, automatically obtained statistics regarding this parameter. Herein, a technique for real-time HDD length detection and a management system based on the electromagnetic detection method with a microprocessor and two magnetoresistive sensors employing the software LabVIEW are proposed. The basic principle is to detect the change in the magnetic-field strength near a current coil while the drill stem and drill-stem joint successively pass through the current coil forward or backward. The detection system consists of a hardware subsystem and a software subsystem. The hardware subsystem employs a single-chip microprocessor as the main controller. A current coil is installed in front of the clamping unit, and two magneto resistive sensors are installed on the sides of the coil symmetrically and perpendicular to the direction of movement of the drill pipe. Their responses are used to judge whether the drill-stem joint is passing through the clamping unit; then, the order of their responses is used to judge the movement direction. The software subsystem is composed of a visual software running on the host computer and a software running in the slave microprocessor. The host-computer software processes, displays, and saves the drilling-length data, whereas the slave microprocessor software operates the hardware system. A combined test demonstrated the feasibility of the entire drilling-length detection system.

Horizontal Directional Drilling-Length Detection Technology While Drilling Based on Bi-Electro-Magnetic Sensing

PubMed Central

Wang, Yudan; Wen, Guojun; Chen, Han

2017-01-01

The drilling length is an important parameter in the process of horizontal directional drilling (HDD) exploration and recovery, but there has been a lack of accurate, automatically obtained statistics regarding this parameter. Herein, a technique for real-time HDD length detection and a management system based on the electromagnetic detection method with a microprocessor and two magnetoresistive sensors employing the software LabVIEW are proposed. The basic principle is to detect the change in the magnetic-field strength near a current coil while the drill stem and drill-stem joint successively pass through the current coil forward or backward. The detection system consists of a hardware subsystem and a software subsystem. The hardware subsystem employs a single-chip microprocessor as the main controller. A current coil is installed in front of the clamping unit, and two magneto resistive sensors are installed on the sides of the coil symmetrically and perpendicular to the direction of movement of the drill pipe. Their responses are used to judge whether the drill-stem joint is passing through the clamping unit; then, the order of their responses is used to judge the movement direction. The software subsystem is composed of a visual software running on the host computer and a software running in the slave microprocessor. The host-computer software processes, displays, and saves the drilling-length data, whereas the slave microprocessor software operates the hardware system. A combined test demonstrated the feasibility of the entire drilling-length detection system. PMID:28448445

Gait termination on a declined surface in trans-femoral amputees: Impact of using microprocessor-controlled limb system.

PubMed

Abdulhasan, Zahraa M; Scally, Andy J; Buckley, John G

2018-05-30

Walking down ramps is a demanding task for transfemoral-amputees and terminating gait on ramps is even more challenging because of the requirement to maintain a stable limb so that it can do the necessary negative mechanical work on the centre-of-mass in order to arrest (dissipate) forward/downward velocity. We determined how the use of a microprocessor-controlled limb system (simultaneous control over hydraulic resistances at ankle and knee) affected the negative mechanical work done by each limb when transfemoral-amputees terminated gait during ramp descent. Eight transfemoral-amputees completed planned gait terminations (stopping on prosthesis) on a 5-degree ramp from slow and customary walking speeds, with the limb's microprocessor active or inactive. When active the limb operated in its 'ramp-descent' mode and when inactive the knee and ankle devices functioned at constant default levels. Negative limb work, determined as the integral of the negative mechanical (external) limb power during the braking phase, was compared across speeds and microprocessor conditions. Negative work done by each limb increased with speed (p < 0.001), and on the prosthetic limb it was greater when the microprocessor was active compared to inactive (p = 0.004). There was no change in work done across microprocessor conditions on the intact limb (p = 0.35). Greater involvement of the prosthetic limb when the limb system was active indicates its ramp-descent mode effectively altered the hydraulic resistances at the ankle and knee. Findings highlight participants became more assured using their prosthetic limb to arrest centre-of-mass velocity. Copyright © 2018 Elsevier Ltd. All rights reserved.

The quality of life analysis of knee prosthesis with complete microprocessor control in trans-femoral amputees.

PubMed

Saglam, Yavuz; Gulenc, Baris; Birisik, Fevzi; Ersen, Ali; Yilmaz Yalcinkaya, Ebru; Yazicioglu, Onder

2017-12-01

The aim of this study was to analyze the patient demographics, etiology of limb loss as well as reporting SF-36 scores for microprocessor prosthesis users in Turkish population. We reviewed 72 patients (61 male and 11 female; mean age: 37.7 ± 10.7) with uni-lateral, above knee amputation and a history of regular and microprocessor prosthesis use. All patients were called back for a last follow-up and they were asked to fill a self-administered general health status questionnaire (SF-36). According to the SF-36 results; physical component score (PCS) score was 46 ± 7.3 and mental components summary (MCS) score was 46.5 ± 9.1. These scores have statistical similarity with Turkish healthy controls, except SF (social functioning) sub-dimension. PCS score for women microprocessor users were significantly lower than men (43.3 vs. 48.7, p = 0.03), but MCS scores were similar in between genders (46 vs. 48.2, p = 0.13). Conventional prostheses usage time was positively correlated with physical function (PF) scores (r = 0.322, p = 0.010). Microprocessor prosthesis usage time was negatively correlated with role limitations due to emotional problem (RE) scores (r = -0,313, p = 0.009). The quality of life surveys were showed that the loss of an extremity have higher physical and psychological impact on women's physical scores. Overall, SF-36 results were similar in microprocessor using amputee's and Turkish normal controls. Level IV, therapeutic study. Copyright © 2017 Turkish Association of Orthopaedics and Traumatology. Production and hosting by Elsevier B.V. All rights reserved.

Virtual Instrument Simulator for CERES

NASA Technical Reports Server (NTRS)

Chapman, John J.

1997-01-01

A benchtop virtual instrument simulator for CERES (Clouds and the Earth's Radiant Energy System) has been built at NASA, Langley Research Center in Hampton, VA. The CERES instruments will fly on several earth orbiting platforms notably NASDA's Tropical Rainfall Measurement Mission (TRMM) and NASA's Earth Observing System (EOS) satellites. CERES measures top of the atmosphere radiative fluxes using microprocessor controlled scanning radiometers. The CERES Virtual Instrument Simulator consists of electronic circuitry identical to the flight unit's twin microprocessors and telemetry interface to the supporting spacecraft electronics and two personal computers (PC) connected to the I/O ports that control azimuth and elevation gimbals. Software consists of the unmodified TRW developed Flight Code and Ground Support Software which serves as the instrument monitor and NASA/TRW developed engineering models of the scanners. The CERES Instrument Simulator will serve as a testbed for testing of custom instrument commands intended to solve in-flight anomalies of the instruments which could arise during the CERES mission. One of the supporting computers supports the telemetry display which monitors the simulator microprocessors during the development and testing of custom instrument commands. The CERES engineering development software models have been modified to provide a virtual instrument running on a second supporting computer linked in real time to the instrument flight microprocessor control ports. The CERES Instrument Simulator will be used to verify memory uploads by the CERES Flight Operations TEAM at NASA. Plots of the virtual scanner models match the actual instrument scan plots. A high speed logic analyzer has been used to track the performance of the flight microprocessor. The concept of using an identical but non-flight qualified microprocessor and electronics ensemble linked to a virtual instrument with identical system software affords a relatively inexpensive simulation system capable of high fidelity.

A Microprocessor-Controlled Data Acquisition System for the Federal Scientific Model UA-500-1 Ubiquitous Spectrum Analyzer

DTIC Science & Technology

1976-09-01

Model AN/ UGC -59A teletype and paper-tape punch console. This unit is connected with the Intellec 8 computer and punching operations are controlled by...order to use this program, the microprocessor would have to be one of the many types on the market that make use of the INTEL 8008-1 CPD chip. The use

Microprocessor design for GaAs technology

NASA Astrophysics Data System (ADS)

Milutinovic, Veljko M.

Recent advances in the design of GaAs microprocessor chips are examined in chapters contributed by leading experts; the work is intended as reading material for a graduate engineering course or as a practical R&D reference. Topics addressed include the methodology used for the architecture, organization, and design of GaAs processors; GaAs device physics and circuit design; design concepts for microprocessor-based GaAs systems; a 32-bit GaAs microprocessor; a 32-bit processor implemented in GaAs JFET; and a direct coupled-FET-logic E/D-MESFET experimental RISC machine. Drawings, micrographs, and extensive circuit diagrams are provided.

Evaluation of the performance of microprocessor-based colorimeter

PubMed Central

Randhawa, S. S.; Gupta, R. C.; Bhandari, A. K.; Malhotra, P. S.

1992-01-01

Colorimetric estimations have an important role in quantitative studies. An inexpensive and portable microprocessor-based colorimeter developed by the authors is described in this paper. The colorimeter uses a light emitting diode as the light source; a pinphotodiode as the detector and an 8085A microprocessor. Blood urea, glucose, total protein, albumin and bilirubin from patient blood samples were analysed with the instrument and results obtained were compared with assays of the same blood using a Spectronic 21. A good correlation was found between the results from the two instruments. PMID:18924952

Evaluation of the performance of microprocessor-based colorimeter.

PubMed

Randhawa, S S; Gupta, R C; Bhandari, A K; Malhotra, P S

1992-01-01

Colorimetric estimations have an important role in quantitative studies. An inexpensive and portable microprocessor-based colorimeter developed by the authors is described in this paper. The colorimeter uses a light emitting diode as the light source; a pinphotodiode as the detector and an 8085A microprocessor. Blood urea, glucose, total protein, albumin and bilirubin from patient blood samples were analysed with the instrument and results obtained were compared with assays of the same blood using a Spectronic 21. A good correlation was found between the results from the two instruments.

Improved Electronic Control for Electrostatic Precipitators

NASA Technical Reports Server (NTRS)

Johnston, D. F.

1986-01-01

Electrostatic precipitators remove particulate matter from smoke created by burning refuse. Smoke exposed to electrostatic field, and particles become electrically charged and migrate to electrically charged collecting surfaces. New microprocessor-based electronic control maintains precipitator power at maximum particulate-collection level. Control automatically senses changes in smoke composition due to variations in fuel or combustion and adjusts precipitator voltage and current accordingly. Also, sensitive yet stable fault detection provided.

A microprocessor-based real-time simulator of a turbofan engine

NASA Technical Reports Server (NTRS)

Litt, Jonathan S.; Delaat, John C.; Merrill, Walter C.

1988-01-01

A real-time digital simulator of a Pratt and Whitney F 100 engine is discussed. This self-contained unit can operate in an open-loop stand-alone mode or as part of a closed-loop control system. It can also be used in control system design and development. It accepts five analog control inputs and its sixteen outputs are returned as analog signals.

Fiber optic, Fabry-Perot high temperature sensor

NASA Technical Reports Server (NTRS)

James, K.; Quick, B.

1984-01-01

A digital, fiber optic temperature sensor using a variable Fabry-Perot cavity as the sensor element was analyzed, designed, fabricated, and tested. The fiber transmitted cavity reflection spectra is dispersed then converted from an optical signal to electrical information by a charged coupled device (CCD). A microprocessor-based color demodulation system converts the wavelength information to temperature. This general sensor concept not only utilizes an all-optical means of parameter sensing and transmitting, but also exploits microprocessor technology for automated control, calibration, and enhanced performance. The complete temperature sensor system was evaluated in the laboratory. Results show that the Fabry-Perot temperature sensor has good resolution (0.5% of full seale), high accuracy, and potential high temperature ( 1000 C) applications.

Direct medical costs of accidental falls for adults with transfemoral amputations.

PubMed

Mundell, Benjamin; Maradit Kremers, Hilal; Visscher, Sue; Hoppe, Kurtis; Kaufman, Kenton

2017-12-01

Active individuals with transfemoral amputations are provided a microprocessor-controlled knee with the belief that the prosthesis reduces their risk of falling. However, these prostheses are expensive and the cost-effectiveness is unknown with regard to falls in the transfemoral amputation population. The direct medical costs of falls in adults with transfemoral amputations need to be determined in order to assess the incremental costs and benefits of microprocessor-controlled prosthetic knees. We describe the direct medical costs of falls in adults with a transfemoral amputation. This is a retrospective, population-based, cohort study of adults who underwent transfemoral amputations between 2000 and 2014. A Bayesian structural time series approach was used to estimate cost differences between fallers and non-fallers. The mean 6-month direct medical costs of falls for six hospitalized adults with transfemoral amputations was US$25,652 (US$10,468, US$38,872). The mean costs for the 10 adults admitted to the emergency department was US$18,091 (US$-7,820, US$57,368). Falls are expensive in adults with transfemoral amputations. The 6-month costs of falls resulting in hospitalization are similar to those reported in the elderly population who are also at an increased risk of falling. Clinical relevance Estimates of fall costs in adults with transfemoral amputations can provide policy makers with additional insight when determining whether or not to cover a prescription for microprocessor-controlled prosthetic knees.

The formal verification of generic interpreters

NASA Technical Reports Server (NTRS)

Windley, P.; Levitt, K.; Cohen, G. C.

1991-01-01

The task assignment 3 of the design and validation of digital flight control systems suitable for fly-by-wire applications is studied. Task 3 is associated with formal verification of embedded systems. In particular, results are presented that provide a methodological approach to microprocessor verification. A hierarchical decomposition strategy for specifying microprocessors is also presented. A theory of generic interpreters is presented that can be used to model microprocessor behavior. The generic interpreter theory abstracts away the details of instruction functionality, leaving a general model of what an interpreter does.

Optical detector calibrator system

NASA Technical Reports Server (NTRS)

Strobel, James P. (Inventor); Moerk, John S. (Inventor); Youngquist, Robert C. (Inventor)

1996-01-01

An optical detector calibrator system simulates a source of optical radiation to which a detector to be calibrated is responsive. A light source selected to emit radiation in a range of wavelengths corresponding to the spectral signature of the source is disposed within a housing containing a microprocessor for controlling the light source and other system elements. An adjustable iris and a multiple aperture filter wheel are provided for controlling the intensity of radiation emitted from the housing by the light source to adjust the simulated distance between the light source and the detector to be calibrated. The geared iris has an aperture whose size is adjustable by means of a first stepper motor controlled by the microprocessor. The multiple aperture filter wheel contains neutral density filters of different attenuation levels which are selectively positioned in the path of the emitted radiation by a second stepper motor that is also controlled by the microprocessor. An operator can select a number of detector tests including range, maximum and minimum sensitivity, and basic functionality. During the range test, the geared iris and filter wheel are repeatedly adjusted by the microprocessor as necessary to simulate an incrementally increasing simulated source distance. A light source calibration subsystem is incorporated in the system which insures that the intensity of the light source is maintained at a constant level over time.

Designs and performance of three new microprocessor-controlled knee joints.

PubMed

Thiele, Julius; Schöllig, Christina; Bellmann, Malte; Kraft, Marc

2018-02-09

A crossover design study with a small group of subjects was used to evaluate the performance of three microprocessor-controlled exoprosthetic knee joints (MPKs): C-Leg 4, Plié 3 and Rheo Knee 3. Given that the mechanical designs and control algorithms of the joints determine the user outcome, the influence of these inherent differences on the functional characteristics was investigated in this study. The knee joints were evaluated during level-ground walking at different velocities in a motion analysis laboratory. Additionally, technical analyses using patents, technical documentations and X-ray computed tomography (CT) for each knee joint were performed. The technical analyses showed that only C-Leg 4 and Rheo Knee 3 allow microprocessor-controlled adaptation of the joint resistances for different gait velocities. Furthermore, Plié 3 is not able to provide stance extension damping. The biomechanical results showed that only if a knee joint adapts flexion and extension resistances by the microprocessor all known advantages of MPKs can become apparent. But not all users may benefit from the examined functions: e.g. a good accommodation to fast walking speeds or comfortable stance phase flexion. Hence, a detailed comparison of user demands and performance of the designated knee joint is mandatory to ensure a maximum in user outcome.

Design of multifunction anti-terrorism robotic system based on police dog

NASA Astrophysics Data System (ADS)

You, Bo; Liu, Suju; Xu, Jun; Li, Dongjie

2007-11-01

Aimed at some typical constraints of police dogs and robots used in the areas of reconnaissance and counterterrorism currently, the multifunction anti-terrorism robotic system based on police dog has been introduced. The system is made up of two parts: portable commanding device and police dog robotic system. The portable commanding device consists of power supply module, microprocessor module, LCD display module, wireless data receiving and dispatching module and commanding module, which implements the remote control to the police dogs and takes real time monitor to the video and images. The police dog robotic system consists of microprocessor module, micro video module, wireless data transmission module, power supply module and offence weapon module, which real time collects and transmits video and image data of the counter-terrorism sites, and gives military attack based on commands. The system combines police dogs' biological intelligence with micro robot. Not only does it avoid the complexity of general anti-terrorism robots' mechanical structure and the control algorithm, but it also widens the working scope of police dog, which meets the requirements of anti-terrorism in the new era.

Walking-Beam Solar-Cell Conveyor

NASA Technical Reports Server (NTRS)

Feder, H.; Frasch, W.

1982-01-01

Microprocessor-controlled walking-beam conveyor moves cells between work stations in automated assembly line. Conveyor has arm at each work station. In unison arms pick up all solar cells and advance them one station; then beam retracks to be in position for next step. Microprocessor sets beam stroke, speed, and position.

Safety of Vital Control and Communication Systems in Guided Ground Transportation : Analysis of Railroad Signaling System Microprocessor Interlocking

DOT National Transportation Integrated Search

1993-05-01

This study has been conducted with the goal of gaining an insight into the issues of maintaining vital signal systems implemented with microprocessor chips and of making field changes to the application of such systems. To relate these abstract topic...

The performance of NASA research hydrogen masers

NASA Technical Reports Server (NTRS)

Reinhardt, V. S.; Rueger, L. J.

1980-01-01

Field operable hydrogen masers based on prior maser designs are presented. These units incorporate improvements in magnetic shielding, lower noise electronics, better thermal control, and have a microprocessor for operation, monitoring, and diagnostic functions. They are ruggedly built for transportability and ease of service anywhere in the world.

Maxi CAI with a Micro.

ERIC Educational Resources Information Center

Gerhold, George; And Others

This paper describes an effective microprocessor-based CAI system which has been repeatedly tested by a large number of students and edited accordingly. Tasks not suitable for microprocessor based systems (authoring, testing, and debugging) were handled on larger multi-terminal systems. This approach requires that the CAI language used on the…

Development of the self-learning machine for creating models of microprocessor of single-phase earth fault protection devices in networks with isolated neutral voltage above 1000 V

NASA Astrophysics Data System (ADS)

Utegulov, B. B.; Utegulov, A. B.; Meiramova, S.

2018-02-01

The paper proposes the development of a self-learning machine for creating models of microprocessor-based single-phase ground fault protection devices in networks with an isolated neutral voltage higher than 1000 V. Development of a self-learning machine for creating models of microprocessor-based single-phase earth fault protection devices in networks with an isolated neutral voltage higher than 1000 V. allows to effectively implement mathematical models of automatic change of protection settings. Single-phase earth fault protection devices.

Development of a microprocessor controller for stand-alone photovoltaic power systems

NASA Technical Reports Server (NTRS)

Millner, A. R.; Kaufman, D. L.

1984-01-01

A controller for stand-alone photovoltaic systems has been developed using a low power CMOS microprocessor. It performs battery state of charge estimation, array control, load management, instrumentation, automatic testing, and communications functions. Array control options are sequential subarray switching and maximum power control. A calculator keypad and LCD display provides manual control, fault diagnosis and digital multimeter functions. An RS-232 port provides data logging or remote control capability. A prototype 5 kW unit has been built and tested successfully. The controller is expected to be useful in village photovoltaic power systems, large solar water pumping installations, and other battery management applications.

Technology transfer of military space microprocessor developments

NASA Astrophysics Data System (ADS)

Gorden, C.; King, D.; Byington, L.; Lanza, D.

1999-01-01

Over the past 13 years the Air Force Research Laboratory (AFRL) has led the development of microprocessors and computers for USAF space and strategic missile applications. As a result of these Air Force development programs, advanced computer technology is available for use by civil and commercial space customers as well. The Generic VHSIC Spaceborne Computer (GVSC) program began in 1985 at AFRL to fulfill a deficiency in the availability of space-qualified data and control processors. GVSC developed a radiation hardened multi-chip version of the 16-bit, Mil-Std 1750A microprocessor. The follow-on to GVSC, the Advanced Spaceborne Computer Module (ASCM) program, was initiated by AFRL to establish two industrial sources for complete, radiation-hardened 16-bit and 32-bit computers and microelectronic components. Development of the Control Processor Module (CPM), the first of two ASCM contract phases, concluded in 1994 with the availability of two sources for space-qualified, 16-bit Mil-Std-1750A computers, cards, multi-chip modules, and integrated circuits. The second phase of the program, the Advanced Technology Insertion Module (ATIM), was completed in December 1997. ATIM developed two single board computers based on 32-bit reduced instruction set computer (RISC) processors. GVSC, CPM, and ATIM technologies are flying or baselined into the majority of today's DoD, NASA, and commercial satellite systems.

Interface For Fault-Tolerant Control System

NASA Technical Reports Server (NTRS)

Shaver, Charles; Williamson, Michael

1989-01-01

Interface unit and controller emulator developed for research on electronic helicopter-flight-control systems equipped with artificial intelligence. Interface unit interrupt-driven system designed to link microprocessor-based, quadruply-redundant, asynchronous, ultra-reliable, fault-tolerant control system (controller) with electronic servocontrol unit that controls set of hydraulic actuators. Receives digital feedforward messages from, and transmits digital feedback messages to, controller through differential signal lines or fiber-optic cables (thus far only differential signal lines have been used). Analog signals transmitted to and from servocontrol unit via coaxial cables.

77 FR 35107 - Petition for Waiver of Compliance

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-12

... devices. CSX requests relief from 49 CFR 236.109 as it applies to variable timers within the program logic... program logic of the operating software. However, CSX notes that some microprocessor-based equipment have.../check sum/universal control number of the existing location specific application logic to the previously...

A lightweight security scheme for wireless body area networks: design, energy evaluation and proposed microprocessor design.

PubMed

Selimis, Georgios; Huang, Li; Massé, Fabien; Tsekoura, Ioanna; Ashouei, Maryam; Catthoor, Francky; Huisken, Jos; Stuyt, Jan; Dolmans, Guido; Penders, Julien; De Groot, Harmke

2011-10-01

In order for wireless body area networks to meet widespread adoption, a number of security implications must be explored to promote and maintain fundamental medical ethical principles and social expectations. As a result, integration of security functionality to sensor nodes is required. Integrating security functionality to a wireless sensor node increases the size of the stored software program in program memory, the required time that the sensor's microprocessor needs to process the data and the wireless network traffic which is exchanged among sensors. This security overhead has dominant impact on the energy dissipation which is strongly related to the lifetime of the sensor, a critical aspect in wireless sensor network (WSN) technology. Strict definition of the security functionality, complete hardware model (microprocessor and radio), WBAN topology and the structure of the medium access control (MAC) frame are required for an accurate estimation of the energy that security introduces into the WBAN. In this work, we define a lightweight security scheme for WBAN, we estimate the additional energy consumption that the security scheme introduces to WBAN based on commercial available off-the-shelf hardware components (microprocessor and radio), the network topology and the MAC frame. Furthermore, we propose a new microcontroller design in order to reduce the energy consumption of the system. Experimental results and comparisons with other works are given.

Post-Coma Persons Emerged from a Minimally Conscious State and Showing Multiple Disabilities Learn to Manage a Radio-Listening Activity

ERIC Educational Resources Information Center

Lancioni, Giulio E.; Singh, Nirbhay N.; O'Reilly, Mark F.; Sigafoos, Jeff; Colonna, Fabio; Buonocunto, Francesca; Sacco, Valentina; Megna, Marisa; Oliva, Doretta

2012-01-01

This study assessed microswitch-based technology to enable three post-coma adults, who had emerged from a minimally conscious state but presented motor and communication disabilities, to operate a radio device. The material involved a modified radio device, a microprocessor-based electronic control unit, a personal microswitch, and an amplified…

Integrating Software Modules For Robot Control

NASA Technical Reports Server (NTRS)

Volpe, Richard A.; Khosla, Pradeep; Stewart, David B.

1993-01-01

Reconfigurable, sensor-based control system uses state variables in systematic integration of reusable control modules. Designed for open-architecture hardware including many general-purpose microprocessors, each having own local memory plus access to global shared memory. Implemented in software as extension of Chimera II real-time operating system. Provides transparent computing mechanism for intertask communication between control modules and generic process-module architecture for multiprocessor realtime computation. Used to control robot arm. Proves useful in variety of other control and robotic applications.

An Ill-Structured PBL-Based Microprocessor Course without Formal Laboratory

ERIC Educational Resources Information Center

Kim, Jungkuk

2012-01-01

This paper introduces a problem-based learning (PBL) microprocessor application course designed according to the following strategies: 1) hands-on training without having a formal laboratory, and 2) intense student-centered cooperative learning through an ill-structured problem. PBL was adopted as the core educational technique of the course to…

Microprocessor-Based Neural-Pulse-Wave Analyzer

NASA Technical Reports Server (NTRS)

Kojima, G. K.; Bracchi, F.

1983-01-01

Microprocessor-based system analyzes amplitudes and rise times of neural waveforms. Displaying histograms of measured parameters helps researchers determine how many nerves contribute to signal and specify waveform characteristics of each. Results are improved noise rejection, full or partial separation of overlapping peaks, and isolation and identification of related peaks in different histograms. 2

78 FR 53500 - Petition for Exemption From the Federal Motor Vehicle Theft Prevention Standard; Chrysler

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-29

...) transceiver and a microprocessor and it initiates the ignition process by communicating with the BCM through SKIS. The microprocessor-based SKIS hardware and software also use electronic messages to communicate...

A case study for the real-time experimental evaluation of the VIPER microprocessor

NASA Astrophysics Data System (ADS)

Carreno, Victor A.; Angellatta, Rob K.

1991-09-01

An experiment to evaluate the applicability of the Verifiable Integrated Processor for Enhanced Reliability (VIPER) microprocessor to real time control is described. The VIPER microprocessor was invented by the Royal Signals and Radar Establishment (RSRE), U.K., and is an example of the use of formal mathematical methods for developing electronic digital systems with a high degree of assurance on the system design and implementation correctness. The experiment consisted of selecting a control law, writing the control law algorithm for the VIPER processor, and providing real time, dynamic inputs into the processor and monitoring the outputs. The control law selected and coded for the VIPER processor was the yaw damper function of an automatic landing program for a 737 aircraft. The mechanisms for interfacing the VIPER Single Board Computer to the VAX host are described. Results include run time experiences, performance evaluation, and comparison of VIPER and FORTRAN yaw damper algorithm output for accuracy estimation.

A case study for the real-time experimental evaluation of the VIPER microprocessor

NASA Technical Reports Server (NTRS)

Carreno, Victor A.; Angellatta, Rob K.

1991-01-01

An experiment to evaluate the applicability of the Verifiable Integrated Processor for Enhanced Reliability (VIPER) microprocessor to real time control is described. The VIPER microprocessor was invented by the Royal Signals and Radar Establishment (RSRE), U.K., and is an example of the use of formal mathematical methods for developing electronic digital systems with a high degree of assurance on the system design and implementation correctness. The experiment consisted of selecting a control law, writing the control law algorithm for the VIPER processor, and providing real time, dynamic inputs into the processor and monitoring the outputs. The control law selected and coded for the VIPER processor was the yaw damper function of an automatic landing program for a 737 aircraft. The mechanisms for interfacing the VIPER Single Board Computer to the VAX host are described. Results include run time experiences, performance evaluation, and comparison of VIPER and FORTRAN yaw damper algorithm output for accuracy estimation.

Design of Plant Eco-physiology Monitoring System Based on Embedded Technology

NASA Astrophysics Data System (ADS)

Li, Yunbing; Wang, Cheng; Qiao, Xiaojun; Liu, Yanfei; Zhang, Xinlu

A real time system has been developed to collect plant's growth information comprehensively. Plant eco-physiological signals can be collected and analyzed effectively. The system adopted embedded technology: wireless sensors network collect the eco-physiological information. Touch screen and ARM microprocessor make the system work independently without PC. The system is versatile and all parameters can be set by the touch screen. Sensors' intelligent compensation can be realized in this system. Information can be displayed by either graphically or in table mode. The ARM microprocessor provides the interface to connect with the internet, so the system support remote monitoring and controlling. The system has advantages of friendly interface, flexible construction and extension. It's a good tool for plant's management.

Distributed asynchronous microprocessor architectures in fault tolerant integrated flight systems

NASA Technical Reports Server (NTRS)

Dunn, W. R.

1983-01-01

The paper discusses the implementation of fault tolerant digital flight control and navigation systems for rotorcraft application. It is shown that in implementing fault tolerance at the systems level using advanced LSI/VLSI technology, aircraft physical layout and flight systems requirements tend to define a system architecture of distributed, asynchronous microprocessors in which fault tolerance can be achieved locally through hardware redundancy and/or globally through application of analytical redundancy. The effects of asynchronism on the execution of dynamic flight software is discussed. It is shown that if the asynchronous microprocessors have knowledge of time, these errors can be significantly reduced through appropiate modifications of the flight software. Finally, the papear extends previous work to show that through the combined use of time referencing and stable flight algorithms, individual microprocessors can be configured to autonomously tolerate intermittent faults.

ZEUS hardware control system

NASA Astrophysics Data System (ADS)

Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

1989-12-01

The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users.

Microprocessor-Based Systems Control for the Rigidized Inflatable Get-Away-Special Experiment

DTIC Science & Technology

2004-03-01

communications and faster data throughput increase, satellites are becoming larger. Larger satellite antennas help to provide the needed gain to...increase communications in space. Compounding the performance and size trade-offs are the payload weight and size limit imposed by the launch vehicles...increased communications capacity, and reduce launch costs. This thesis develops and implements the computer control system and power system to

Microprocessor controlled movement of liquid gastric content using sequential neural electrical stimulation

PubMed Central

Mintchev, M; Sanmiguel, C; Otto, S; Bowes, K

1998-01-01

Background—Gastric electrical stimulation has been attempted for several years with little success. 
Aims—To determine whether movement of liquid gastric content could be achieved using microprocessor controlled sequential electrical stimulation. 
Methods—Eight anaesthetised dogs underwent laparotomy and implantation of four sets of bipolar stainless steel wire electrodes. Each set consisted of two to six electrodes (10×0.25 mm, 3 cm apart) implanted circumferentially. The stomach was filled with water and the process of gastric emptying was monitored. Artificial contractions were produced using microprocessor controlled phase locked bipolar four second trains of 50 Hz, 14 V (peak to peak) rectangular voltage. In four of the dogs four force transducers were implanted close to each circumferential electrode set. In one gastroparetic patient the effect of direct electrical stimulation was determined at laparotomy. 
Results—Using the above stimulating parameters circumferential gastric contractions were produced which were artificially propagated distally by phase locking the stimulating voltage. Averaged stimulated gastric emptying times were significantly shorter than spontaneus emptying times (t1/2 6.7 (3.0) versus 25.3 (12.9) minutes, p<0.01). Gastric electrical stimulation of the gastroparetic patient at operation produced circumferential contractions. 
Conclusions—Microprocessor controlled electrical stimulation produced artificial peristalsis and notably accelerated the movement of liquid gastric content. 

 Keywords: gastric electrical stimulation; gastric motility PMID:9824339

Microprocessor controlled proof-mass actuator

NASA Technical Reports Server (NTRS)

Horner, Garnett C.

1987-01-01

The objective of the microprocessor controlled proof-mass actuator is to develop the capability to mount a small programmable device on laboratory models. This capability will allow research in the active control of flexible structures. The approach in developing the actuator will be to mount all components as a single unit. All sensors, electronic and control devices will be mounted with the actuator. The goal for the force output capability of the actuator will be one pound force. The programmable force actuator developed has approximately a one pound force capability over the usable frequency range, which is above 2 Hz.

Control electronics for a multi-laser/multi-detector scanning system

NASA Technical Reports Server (NTRS)

Kennedy, W.

1980-01-01

The Mars Rover Laser Scanning system uses a precision laser pointing mechanism, a photodetector array, and the concept of triangulation to perform three dimensional scene analysis. The system is used for real time terrain sensing and vision. The Multi-Laser/Multi-Detector laser scanning system is controlled by a digital device called the ML/MD controller. A next generation laser scanning system, based on the Level 2 controller, is microprocessor based. The new controller capabilities far exceed those of the ML/MD device. The first draft circuit details and general software structure are presented.

A GaAs vector processor based on parallel RISC microprocessors

NASA Astrophysics Data System (ADS)

Misko, Tim A.; Rasset, Terry L.

A vector processor architecture based on the development of a 32-bit microprocessor using gallium arsenide (GaAs) technology has been developed. The McDonnell Douglas vector processor (MVP) will be fabricated completely from GaAs digital integrated circuits. The MVP architecture includes a vector memory of 1 megabyte, a parallel bus architecture with eight processing elements connected in parallel, and a control processor. The processing elements consist of a reduced instruction set CPU (RISC) with four floating-point coprocessor units and necessary memory interface functions. This architecture has been simulated for several benchmark programs including complex fast Fourier transform (FFT), complex inner product, trigonometric functions, and sort-merge routine. The results of this study indicate that the MVP can process a 1024-point complex FFT at a speed of 112 microsec (389 megaflops) while consuming approximately 618 W of power in a volume of approximately 0.1 ft-cubed.

Data and results of a laboratory investigation of microprocessor upset caused by simulated lightning-induced analog transients

NASA Technical Reports Server (NTRS)

Belcastro, C. M.

1984-01-01

Advanced composite aircraft designs include fault-tolerant computer-based digital control systems with thigh reliability requirements for adverse as well as optimum operating environments. Since aircraft penetrate intense electromagnetic fields during thunderstorms, onboard computer systems maya be subjected to field-induced transient voltages and currents resulting in functional error modes which are collectively referred to as digital system upset. A methodology was developed for assessing the upset susceptibility of a computer system onboard an aircraft flying through a lightning environment. Upset error modes in a general-purpose microprocessor were studied via tests which involved the random input of analog transients which model lightning-induced signals onto interface lines of an 8080-based microcomputer from which upset error data were recorded. The application of Markov modeling to upset susceptibility estimation is discussed and a stochastic model development.

FAME, a microprocessor based front-end analysis and modeling environment

NASA Technical Reports Server (NTRS)

Rosenbaum, J. D.; Kutin, E. B.

1980-01-01

Higher order software (HOS) is a methodology for the specification and verification of large scale, complex, real time systems. The HOS methodology was implemented as FAME (front end analysis and modeling environment), a microprocessor based system for interactively developing, analyzing, and displaying system models in a low cost user-friendly environment. The nature of the model is such that when completed it can be the basis for projection to a variety of forms such as structured design diagrams, Petri-nets, data flow diagrams, and PSL/PSA source code. The user's interface with the analyzer is easily recognized by any current user of a structured modeling approach; therefore extensive training is unnecessary. Furthermore, when all the system capabilities are used one can check on proper usage of data types, functions, and control structures thereby adding a new dimension to the design process that will lead to better and more easily verified software designs.

A microprocessor-based one dimensional optical data processor for spatial frequency analysis

NASA Technical Reports Server (NTRS)

Collier, R. L.; Ballard, G. S.

1982-01-01

A high degree of accuracy was obtained in measuring the spatial frequency spectrum of known samples using an optical data processor based on a microprocessor, which reliably collected intensity versus angle data. Stray light control, system alignment, and angle measurement problems were addressed and solved. The capabilities of the instrument were extended by the addition of appropriate optics to allow the use of different wavelengths of laser radiation and by increasing the travel limits of the rotating arm to + or - 160 degrees. The acquisition, storage, and plotting of data by the computer permits the researcher a free hand in data manipulation such as subtracting background scattering from a diffraction pattern. Tests conducted to verify the operation of the processor using a 25 mm diameter pinhole, a 39.37 line pairs per mm series of multiple slits, and a microscope slide coated with 1.091 mm diameter polystyrene latex spheres are described.

A Multi-Media CAI Terminal Based upon a Microprocessor with Applications for the Handicapped.

ERIC Educational Resources Information Center

Brebner, Ann; Hallworth, H. J.

The design of the CAI interface described is based on the microprocessor in order to meet three basic requirements for providing appropriate instruction to the developmentally handicapped: (1) portability, so that CAI can be taken into the customary learning environment; (2) reliability; and (3) flexibility, to permit use of new input and output…

Design of control system based on SCM music fountain

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao; Jiang, Suping

2018-06-01

The design of the design of a microprocessor controlled by simple circuit, introduced this design applied to the components, and draw the main flow chart presentation. System is the use of an external music source, the intensity of the input audio signal lights will affect the light off, the fountain spray of water level will be based on changes in the lantern light off. This design uses a single-chip system is simple, powerful, good reliability and low cost.

Concept for a power system controller for large space electrical power systems

NASA Technical Reports Server (NTRS)

Lollar, L. F.; Lanier, J. R., Jr.; Graves, J. R.

1981-01-01

The development of technology for a fail-operatonal power system controller (PSC) utilizing microprocessor technology for managing the distribution and power processor subsystems of a large multi-kW space electrical power system is discussed. The specific functions which must be performed by the PSC, the best microprocessor available to do the job, and the feasibility, cost savings, and applications of a PSC were determined. A limited function breadboard version of a PSC was developed to demonstrate the concept and potential cost savings.

Experimental Verification of Electric Drive Technologies Based on Artificial Intelligence Tools

NASA Technical Reports Server (NTRS)

Rubaai, Ahmed; Kankam, David (Technical Monitor)

2003-01-01

A laboratory implementation of a fuzzy logic-tracking controller using a low cost Motorola MC68HC11E9 microprocessor is described in this report. The objective is to design the most optimal yet practical controller that can be implemented and marketed, and which gives respectable performance, even when the system loads, inertia and parameters are varying. A distinguishing feature of this work is the by-product goal of developing a marketable, simple, functional and low cost controller. Additionally, real-time nonlinearities are not ignored, and a mathematical model is not required. A number of components have been designed, built and tested individually, and in various combinations of hardware and software segments. These components have been integrated with a brushless motor to constitute the drive system. A microprocessor-based FLC is incorporated to provide robust speed and position control. Design objectives that are difficult to express mathematically can be easily incorporated in a fuzzy logic-based controller by linguistic information (in the form of fuzzy IF-THEN rules). The theory and design are tested in the laboratory using a hardware setup. Several test cases have been conducted to confirm the effectiveness of the proposed controller. The results indicate excellent tracking performance for both speed and position trajectories. For the purpose of comparison, a bang-bang controller has been tested. The fuzzy logic controller performs significantly better than the traditional bang-bang controller. The bang-bang controller has been shown to be relatively inaccurate and lacking in robustness. Description of the implementation hardware system is also given.

Automated quantitative muscle biopsy analysis system

NASA Technical Reports Server (NTRS)

Castleman, Kenneth R. (Inventor)

1980-01-01

An automated system to aid the diagnosis of neuromuscular diseases by producing fiber size histograms utilizing histochemically stained muscle biopsy tissue. Televised images of the microscopic fibers are processed electronically by a multi-microprocessor computer, which isolates, measures, and classifies the fibers and displays the fiber size distribution. The architecture of the multi-microprocessor computer, which is iterated to any required degree of complexity, features a series of individual microprocessors P.sub.n each receiving data from a shared memory M.sub.n-1 and outputing processed data to a separate shared memory M.sub.n+1 under control of a program stored in dedicated memory M.sub.n.

A survey of the state of the art and focused research in range systems, task 2

NASA Technical Reports Server (NTRS)

Yao, K.

1986-01-01

Many communication, control, and information processing subsystems are modeled by linear systems incorporating tapped delay lines (TDL). Such optimized subsystems result in full precision multiplications in the TDL. In order to reduce complexity and cost in a microprocessor implementation, these multiplications can be replaced by single-shift instructions which are equivalent to powers of two multiplications. Since, in general, the obvious operation of rounding the infinite precision TDL coefficients to the nearest powers of two usually yield quite poor system performance, the optimum powers of two coefficient solution was considered. Detailed explanations on the use of branch-and-bound algorithms for finding the optimum powers of two solutions are given. Specific demonstration of this methodology to the design of a linear data equalizer and its implementation in assembly language on a 8080 microprocessor with a 12 bit A/D converter are reported. This simple microprocessor implementation with optimized TDL coefficients achieves a system performance comparable to the optimum linear equalization with full precision multiplications for an input data rate of 300 baud. The philosophy demonstrated in this implementation is dully applicable to many other microprocessor controlled information processing systems.

NSC 800, 8-bit CMOS microprocessor

NASA Technical Reports Server (NTRS)

Suszko, S. F.

1984-01-01

The NSC 800 is an 8-bit CMOS microprocessor manufactured by National Semiconductor Corp., Santa Clara, California. The 8-bit microprocessor chip with 40-pad pin-terminals has eight address buffers (A8-A15), eight data address -- I/O buffers (AD(sub 0)-AD(sub 7)), six interrupt controls and sixteen timing controls with a chip clock generator and an 8-bit dynamic RAM refresh circuit. The 22 internal registers have the capability of addressing 64K bytes of memory and 256 I/O devices. The chip is fabricated on N-type (100) silicon using self-aligned polysilicon gates and local oxidation process technology. The chip interconnect consists of four levels: Aluminum, Polysi 2, Polysi 1, and P(+) and N(+) diffusions. The four levels, except for contact interface, are isolated by interlevel oxide. The chip is packaged in a 40-pin dual-in-line (DIP), side brazed, hermetically sealed, ceramic package with a metal lid. The operating voltage for the device is 5 V. It is available in three operating temperature ranges: 0 to +70 C, -40 to +85 C, and -55 to +125 C. Two devices were submitted for product evaluation by F. Stott, MTS, JPL Microprocessor Specialist. The devices were pencil-marked and photographed for identification.

Can low-cost VOR and Omega receivers suffice for RNAV - A new computer-based navigation technique

NASA Technical Reports Server (NTRS)

Hollaar, L. A.

1978-01-01

It is shown that although RNAV is particularly valuable for the personal transportation segment of general aviation, it has not gained complete acceptance. This is due, in part, to its high cost and the necessary special-handling air traffic control. VOR/DME RNAV calculations are ideally suited for analog computers, and the use of microprocessor technology has been suggested for reducing RNAV costs. Three navigation systems, VOR, Omega, and DR, are compared for common navigational difficulties, such as station geometry, siting errors, ground disturbances, and terminal area coverage. The Kalman filtering technique is described with reference to the disadvantages when using a system including standard microprocessors. An integrated navigation system, using input data from various low-cost sensor systems, is presented and current simulation studies are noted.

Human supervision and microprocessor control of an optical tracking system

NASA Technical Reports Server (NTRS)

Bigley, W. J.; Vandenberg, J. D.

1981-01-01

Gunners using small calibre anti-aircraft systems have not been able to track high-speed air targets effectively. Substantial improvement in the accuracy of surface fire against attacking aircraft has been realized through the design of a director-type weapon control system. This system concept frees the gunner to exercise a supervisory/monitoring role while the computer takes over continuous target tracking. This change capitalizes on a key consideration of human factors engineering while increasing system accuracy. The advanced system design, which uses distributed microprocessor control, is discussed at the block diagram level and is contrasted with the previous implementation.

Performance, operational limits, of an Electronic Switching Spherical Array (ESSA) antenna

NASA Technical Reports Server (NTRS)

Stockton, R.

1979-01-01

The development of a microprocessor controller which provides multimode operational capability for the Electronic Switching Spherical Array (ESSA) Antenna is described. The best set of operating conditions were determined and the performance of an ESSA antenna was demonstrated in the following modes: (1) omni; (2) acquisition/track; (3) directive; and (4) multibeam. The control algorithms, software flow diagrams, and electronic circuitry were developed. The microprocessor and control electronics were built and interfaced with the antenna to carry out performance testing. The acquisition/track mode for users in the Tracking and Data Relay Satellite System is emphasized.

Data and results of a laboratory investigation of microprocessor upset caused by simulated lightning-induced analog transients

NASA Technical Reports Server (NTRS)

Belcastro, C. M.

1984-01-01

A methodology was developed a assess the upset susceptibility/reliability of a computer system onboard an aircraft flying through a lightning environment. Upset error modes in a general purpose microprocessor were studied. The upset tests involved the random input of analog transients which model lightning induced signals onto interface lines of an 8080 based microcomputer from which upset error data was recorded. The program code on the microprocessor during tests is designed to exercise all of the machine cycles and memory addressing techniques implemented in the 8080 central processing unit. A statistical analysis is presented in which possible correlations are established between the probability of upset occurrence and transient signal inputs during specific processing states and operations. A stochastic upset susceptibility model for the 8080 microprocessor is presented. The susceptibility of this microprocessor to upset, once analog transients have entered the system, is determined analytically by calculating the state probabilities of the stochastic model.

Microprocessor controlled movement of solid colonic content using sequential neural electrical stimulation

PubMed Central

Amaris, M A; Rashev, P Z; Mintchev, M P; Bowes, K L

2002-01-01

Background and aims: Invoked peristaltic contractions and movement of solid content have not been attempted in normal canine colon. The purpose of this study was to determine if movement of solid content through the colon could be produced by microprocessor controlled sequential stimulation. Methods: The study was performed on six anaesthetised dogs. At laparotomy, a 15 cm segment of descending colon was selected, the proximal end closed with a purse string suture, and the distal end opened into a collecting container. Four sets of subserosal stimulating electrodes were implanted at 3 cm intervals. The segment of bowel was filled with a mixture of dog food and 50 plastic pellets before each of 2–5 random sessions of non-stimulated or stimulated emptying. Propagated contractions were generated using microprocessor controlled bipolar trains of 50 Hz rectangular voltage having 20 V (peak to peak) amplitude, 18 second stimulus duration, and a nine second phase lag between stimulation trains in sequential electrode sets. Results: Electrical stimulation using the above mentioned parameters resulted in powerful phasic contractions that closed the lumen. By phase locking the stimulation voltage between adjacent sets of electrodes, propagated contractions could be produced in an aboral or orad direction. The number of evacuated pellets during the stimulation sessions was significantly higher than during the non-stimulated sessions (p<0.01). Conclusions: Microprocessor controlled electrical stimulation accelerated movement of colonic content suggesting the possibility of future implantable colonic stimulators. PMID:11889065

Low-level processing for real-time image analysis

NASA Technical Reports Server (NTRS)

Eskenazi, R.; Wilf, J. M.

1979-01-01

A system that detects object outlines in television images in real time is described. A high-speed pipeline processor transforms the raw image into an edge map and a microprocessor, which is integrated into the system, clusters the edges, and represents them as chain codes. Image statistics, useful for higher level tasks such as pattern recognition, are computed by the microprocessor. Peak intensity and peak gradient values are extracted within a programmable window and are used for iris and focus control. The algorithms implemented in hardware and the pipeline processor architecture are described. The strategy for partitioning functions in the pipeline was chosen to make the implementation modular. The microprocessor interface allows flexible and adaptive control of the feature extraction process. The software algorithms for clustering edge segments, creating chain codes, and computing image statistics are also discussed. A strategy for real time image analysis that uses this system is given.

Work and Programmable Automation.

ERIC Educational Resources Information Center

DeVore, Paul W.

A new industrial era based on electronics and the microprocessor has arrived, an era that is being called intelligent automation. Intelligent automation, in the form of robots, replaces workers, and the new products, using microelectronic devices, require significantly less labor to produce than the goods they replace. The microprocessor thus…

Microprocessor-based integration of microfluidic control for the implementation of automated sensor monitoring and multithreaded optimization algorithms.

PubMed

Ezra, Elishai; Maor, Idan; Bavli, Danny; Shalom, Itai; Levy, Gahl; Prill, Sebastian; Jaeger, Magnus S; Nahmias, Yaakov

2015-08-01

Microfluidic applications range from combinatorial synthesis to high throughput screening, with platforms integrating analog perfusion components, digitally controlled micro-valves and a range of sensors that demand a variety of communication protocols. Currently, discrete control units are used to regulate and monitor each component, resulting in scattered control interfaces that limit data integration and synchronization. Here, we present a microprocessor-based control unit, utilizing the MS Gadgeteer open framework that integrates all aspects of microfluidics through a high-current electronic circuit that supports and synchronizes digital and analog signals for perfusion components, pressure elements, and arbitrary sensor communication protocols using a plug-and-play interface. The control unit supports an integrated touch screen and TCP/IP interface that provides local and remote control of flow and data acquisition. To establish the ability of our control unit to integrate and synchronize complex microfluidic circuits we developed an equi-pressure combinatorial mixer. We demonstrate the generation of complex perfusion sequences, allowing the automated sampling, washing, and calibrating of an electrochemical lactate sensor continuously monitoring hepatocyte viability following exposure to the pesticide rotenone. Importantly, integration of an optical sensor allowed us to implement automated optimization protocols that require different computational challenges including: prioritized data structures in a genetic algorithm, distributed computational efforts in multiple-hill climbing searches and real-time realization of probabilistic models in simulated annealing. Our system offers a comprehensive solution for establishing optimization protocols and perfusion sequences in complex microfluidic circuits.

Microprocessor Recruitment to Elongating RNA Polymerase II Is Required for Differential Expression of MicroRNAs.

PubMed

Church, Victoria A; Pressman, Sigal; Isaji, Mamiko; Truscott, Mary; Cizmecioglu, Nihal Terzi; Buratowski, Stephen; Frolov, Maxim V; Carthew, Richard W

2017-09-26

The cellular abundance of mature microRNAs (miRNAs) is dictated by the efficiency of nuclear processing of primary miRNA transcripts (pri-miRNAs) into pre-miRNA intermediates. The Microprocessor complex of Drosha and DGCR8 carries this out, but it has been unclear what controls Microprocessor's differential processing of various pri-miRNAs. Here, we show that Drosophila DGCR8 (Pasha) directly associates with the C-terminal domain of the RNA polymerase II elongation complex when it is phosphorylated by the Cdk9 kinase (pTEFb). When association is blocked by loss of Cdk9 activity, a global change in pri-miRNA processing is detected. Processing of pri-miRNAs with a UGU sequence motif in their apical junction domain increases, while processing of pri-miRNAs lacking this motif decreases. Therefore, phosphorylation of RNA polymerase II recruits Microprocessor for co-transcriptional processing of non-UGU pri-miRNAs that would otherwise be poorly processed. In contrast, UGU-positive pri-miRNAs are robustly processed by Microprocessor independent of RNA polymerase association. Copyright © 2017 The Author(s). Published by Elsevier Inc. All rights reserved.

Implementation of the Sun Position Calculation in the PDC-1 Control Microprocessor

NASA Technical Reports Server (NTRS)

Stallkamp, J. A.

1984-01-01

The several computational approaches to providing the local azimuth and elevation angles of the Sun as a function of local time and then the utilization of the most appropriate method in the PDC-1 microprocessor are presented. The full algorithm, the FORTRAN form, is felt to be very useful in any kind or size of computer. It was used in the PDC-1 unit to generate efficient code for the microprocessor with its floating point arithmetic chip. The balance of the presentation consists of a brief discussion of the tracking requirements for PPDC-1, the planetary motion equations from the first to the final version, and the local azimuth-elevation geometry.

Experience with custom processors in space flight applications

NASA Technical Reports Server (NTRS)

Fraeman, M. E.; Hayes, J. R.; Lohr, D. A.; Ballard, B. W.; Williams, R. L.; Henshaw, R. M.

1991-01-01

The Applied Physics Laboratory (APL) has developed a magnetometer instrument for a swedish satellite named Freja with launch scheduled for August 1992 on a Chinese Long March rocket. The magnetometer controller utilized a custom microprocessor designed at APL with the Genesil silicon compiler. The processor evolved from our experience with an older bit-slice design and two prior single chip efforts. The architecture of our microprocessor greatly lowered software development costs because it was optimized to provide an interactive and extensible programming environment hosted by the target hardware. Radiation tolerance of the microprocessor was also tested and was adequate for Freja's mission -- 20 kRad(Si) total dose and very infrequent latch-up and single event upset events.

All-digital phase-locked loop with 50-cycle lock time suitable for high-performance microprocessors

NASA Astrophysics Data System (ADS)

Dunning, Jim; Garcia, Gerald; Lundberg, Jim; Nuckolls, Ed

1995-04-01

A frequency-synthesizing, all-digital phase-locked loop (ADPLL) is fully integrated with a 0.5 micron CMOS microprocessor. The ADPLL has a 50-cycle phase lock, has a gain mechanism independent of process, voltage, and temperature, and is immune to input jitter. A digitally-controlled oscillator (DCO) forms the core of the ADPLL and operates from 50 to 550 MHz, running at 4x the reference clock frequency. The DCO has 16 b of binarily weighted control and achieves LSB resolution under 500 fs.

Embedded control system for computerized franking machine

NASA Astrophysics Data System (ADS)

Shi, W. M.; Zhang, L. B.; Xu, F.; Zhan, H. W.

2007-12-01

This paper presents a novel control system for franking machine. A methodology for operating a franking machine using the functional controls consisting of connection, configuration and franking electromechanical drive is studied. A set of enabling technologies to synthesize postage management software architectures driven microprocessor-based embedded systems is proposed. The cryptographic algorithm that calculates mail items is analyzed to enhance the postal indicia accountability and security. The study indicated that the franking machine is reliability, performance and flexibility in printing mail items.

Developing stereo image based robot control system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suprijadi,; Pambudi, I. R.; Woran, M.

Application of image processing is developed in various field and purposes. In the last decade, image based system increase rapidly with the increasing of hardware and microprocessor performance. Many fields of science and technology were used this methods especially in medicine and instrumentation. New technique on stereovision to give a 3-dimension image or movie is very interesting, but not many applications in control system. Stereo image has pixel disparity information that is not existed in single image. In this research, we proposed a new method in wheel robot control system using stereovision. The result shows robot automatically moves based onmore » stereovision captures.« less

Self-Checking Pairs Of Microprocessors

NASA Technical Reports Server (NTRS)

Smith, Brian S.

1995-01-01

Method of imparting fault tolerance to computer system provides for immediate detection of faults at microprocessor level. Shadow microprocessor provides nominal duplicate outputs to verify functioning of main microprocessor. When output signal on any pin of one microprocessor differs from that on corresponding pin of other microprocessor, comparator puts out alarm signal.

Innovative architectures for dense multi-microprocessor computers

NASA Technical Reports Server (NTRS)

Larson, Robert E.

1989-01-01

The purpose is to summarize a Phase 1 SBIR project performed for the NASA/Langley Computational Structural Mechanics Group. The project was performed from February to August 1987. The main objectives of the project were to: (1) expand upon previous research into the application of chordal ring architectures to the general problem of designing multi-microcomputer architectures, (2) attempt to identify a family of chordal rings such that each chordal ring can be simply expanded to produce the next member of the family, (3) perform a preliminary, high-level design of an expandable multi-microprocessor computer based upon chordal rings, (4) analyze the potential use of chordal ring based multi-microprocessors for sparse matrix problems and other applications arising in computational structural mechanics.

Experience in the installation of a microprocessor system for controlling converter units of the Vyborg substation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gusakovskii, K. B.; Zmaznov, E. Yu.; Katantsev, S. V.

The experience in the installation of modern digital systems for controlling converter units at the Vyborg converter substation on the basis of advanced microprocessor devices is considered. It is shown that debugging of a control and protection system on mathematical and physical models does not guarantee optimum control of actual converter devices. Examples of advancing the control and protection system are described, the necessity for which has become obvious in tests of actual equipment. Comparison of oscillograms of processes before optimization of the control system and after its optimization and adjustment shows that the digital control system makes it possiblemore » to improve substantially the algorithms of control and protection in the short term and without changing the hardware component.« less

Scaling theory for information networks.

PubMed

Moses, Melanie E; Forrest, Stephanie; Davis, Alan L; Lodder, Mike A; Brown, James H

2008-12-06

Networks distribute energy, materials and information to the components of a variety of natural and human-engineered systems, including organisms, brains, the Internet and microprocessors. Distribution networks enable the integrated and coordinated functioning of these systems, and they also constrain their design. The similar hierarchical branching networks observed in organisms and microprocessors are striking, given that the structure of organisms has evolved via natural selection, while microprocessors are designed by engineers. Metabolic scaling theory (MST) shows that the rate at which networks deliver energy to an organism is proportional to its mass raised to the 3/4 power. We show that computational systems are also characterized by nonlinear network scaling and use MST principles to characterize how information networks scale, focusing on how MST predicts properties of clock distribution networks in microprocessors. The MST equations are modified to account for variation in the size and density of transistors and terminal wires in microprocessors. Based on the scaling of the clock distribution network, we predict a set of trade-offs and performance properties that scale with chip size and the number of transistors. However, there are systematic deviations between power requirements on microprocessors and predictions derived directly from MST. These deviations are addressed by augmenting the model to account for decentralized flow in some microprocessor networks (e.g. in logic networks). More generally, we hypothesize a set of constraints between the size, power and performance of networked information systems including transistors on chips, hosts on the Internet and neurons in the brain.

Application of digital control to a magnetic model suspension and balance model

NASA Technical Reports Server (NTRS)

Luh, P. B.; Covert, E. E.; Whitaker, H. P.; Haldeman, C. W.

1978-01-01

The feasibility of using a digital computer for performing the automatic control functions for a magnetic suspension and balance system (MSBS) for use with wind tunnel models was investigated. Modeling was done using both a prototype MSBS and a one dimensional magnetic balance. A microcomputer using the Intel 8080 microprocessor is described and results are given using this microprocessor to control the one dimensional balance. Hybrid simulations for one degree of freedom of the MSBS were also performed and are reported. It is concluded that use of a digital computer to control the MSBS is eminently feasible and should extend both the accuracy and utility of the system.

FEDS - An experiment with a microprocessor-based orbit determination system using TDRS data

NASA Technical Reports Server (NTRS)

Shank, D.; Pajerski, R.

1986-01-01

An experiment in microprocessor-based onboard orbit determination has been conducted at NASA's Goddard Space Flight Center. The experiment collected forward-link observation data in real time from a prototype transponder and performed orbit estimation on a typical low-earth scientific satellite. This paper discusses the hardware and organizational configurations of the experiment, the structure of the onboard software, the mathematical models, and the experiment results.

System and method for bidirectional flow and controlling fluid flow in a conduit

DOEpatents

Ortiz, Marcos German

1999-01-01

A system for measuring bidirectional flow, including backflow, of fluid in a conduit. The system utilizes a structural mechanism to create a pressure differential in the conduit. Pressure sensors are positioned upstream from the mechanism, at the mechanism, and downstream from the mechanism. Data from the pressure sensors are transmitted to a microprocessor or computer, and pressure differential detected between the pressure sensors is then used to calculate the backflow. Control signals may then be generated by the microprocessor or computer to shut off valves located in the conduit, upon the occurrence of backflow, or to control flow, total material dispersed, etc. in the conduit.

Safety and function of a prototype microprocessor-controlled knee prosthesis for low active transfemoral amputees switching from a mechanic knee prosthesis: a pilot study.

PubMed

Hasenoehrl, Timothy; Schmalz, Thomas; Windhager, Reinhard; Domayer, Stephan; Dana, Sara; Ambrozy, Clemens; Palma, Stefano; Crevenna, Richard

2018-02-01

Aim of this pilot study was to assess safety and functioning of a microprocessor-controlled knee prosthesis (MPK) after a short familiarization time and no structured physical therapy. Five elderly, low-active transfemoral amputees who were fitted with a standard non-microprocessor controlled knee prosthesis (NMPK) performed a baseline measurement consisting of a 3 D gait analysis, functional tests and questionnaires. The first follow-up consisted of the same test procedure and was performed with the MPK after 4 to 6 weeks of familiarization. After being refitted to their standard NMPK again, the subjects undertook the second follow-up which consisted of solely questionnaires 4 weeks later. Questionnaires and functional tests showed an increase in the perception of safety. Moreover, gait analysis revealed more physiologic knee and hip extension/flexion patterns when using the MPK. Our results showed that although the Genium with Cenior-Leg ruleset-MPK (GCL-MPK) might help to improve several safety-related outcomes as well as gait biomechanics the functional potential of the GCL-MPK may have been limited without specific training and a sufficient acclimation period. Implications for Rehabilitation Elderly transfemoral amputees are often limited in their activity by safety issues as well as insufficient functioning regarding the non microprocessor-controlled knee prostheses (NMPK), thing that could be eliminated with the use of suitable microprocessor-controlled prostheses (MPK). The safety and functioning of a prototype MPK (GCL-MPK) specifically designed for the needs of older and low-active transfemoral amputees was assessed in this pilot study. The GCL-MPK showed indicators of increased safety and more natural walking patterns in older and low-active transfemoral amputees in comparison to the standard NMPK already after a short acclimatisation time and no structured physical therapy. Regarding functional performance it seems as if providing older and low-active transfemoral amputees with the GCL-MPK alone without prescribing structured prosthesis training might be insufficient to achieve improvements over the standard NMPKs.

Microprocessor, Setx, Xrn2, and Rrp6 co-operate to induce premature termination of transcription by RNAPII.

PubMed

Wagschal, Alexandre; Rousset, Emilie; Basavarajaiah, Poornima; Contreras, Xavier; Harwig, Alex; Laurent-Chabalier, Sabine; Nakamura, Mirai; Chen, Xin; Zhang, Ke; Meziane, Oussama; Boyer, Frédéric; Parrinello, Hugues; Berkhout, Ben; Terzian, Christophe; Benkirane, Monsef; Kiernan, Rosemary

2012-09-14

Transcription elongation is increasingly recognized as an important mechanism of gene regulation. Here, we show that microprocessor controls gene expression in an RNAi-independent manner. Microprocessor orchestrates the recruitment of termination factors Setx and Xrn2, and the 3'-5' exoribonuclease, Rrp6, to initiate RNAPII pausing and premature termination at the HIV-1 promoter through cleavage of the stem-loop RNA, TAR. Rrp6 further processes the cleavage product, which generates a small RNA that is required to mediate potent transcriptional repression and chromatin remodeling at the HIV-1 promoter. Using chromatin immunoprecipitation coupled to high-throughput sequencing (ChIP-seq), we identified cellular gene targets whose transcription is modulated by microprocessor. Our study reveals RNAPII pausing and premature termination mediated by the co-operative activity of ribonucleases, Drosha/Dgcr8, Xrn2, and Rrp6, as a regulatory mechanism of RNAPII-dependent transcription elongation. Copyright © 2012 Elsevier Inc. All rights reserved.

Verification of the FtCayuga fault-tolerant microprocessor system. Volume 1: A case study in theorem prover-based verification

NASA Technical Reports Server (NTRS)

Srivas, Mandayam; Bickford, Mark

1991-01-01

The design and formal verification of a hardware system for a task that is an important component of a fault tolerant computer architecture for flight control systems is presented. The hardware system implements an algorithm for obtaining interactive consistancy (byzantine agreement) among four microprocessors as a special instruction on the processors. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, provided certain preconditions hold. An assumption is made that the processors execute synchronously. For verification, the authors used a computer aided design hardware design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover.

A Low Noise, Microprocessor-Controlled, Internally Digitizing Rotating-Vane Electric Field Mill for Airborne Platforms

NASA Technical Reports Server (NTRS)

Bateman, M. G.; Stewart, M. F.; Blakeslee, R. J.; Podgorny, s. J.; Christian, H. J.; Mach, D. M.; Bailey, J. C.; Daskar, D.

2006-01-01

This paper reports on a new generation of aircraft-based rotating-vane style electric field mills designed and built at NASA's Marshall Spaceflight Center. The mills have individual microprocessors that digitize the electric field signal at the mill and respond to commands from the data system computer. The mills are very sensitive (1 V/m per bit), have a wide dynamic range (115 dB), and are very low noise (+/-1 LSB). Mounted on an aircraft, these mills can measure fields from +/-1 V/m to +/-500 kV/m. Once-per-second commanding from the data collection computer to each mill allows for precise timing and synchronization. The mills can also be commanded to execute a self-calibration in flight, which is done periodically to monitor the status and health of each mill.

Designs and performance of microprocessor-controlled knee joints.

PubMed

Thiele, Julius; Westebbe, Bettina; Bellmann, Malte; Kraft, Marc

2014-02-01

In this comparative study, three transfemoral amputee subjects were fitted with four different microprocessor-controlled exoprosthetic knee joints (MPK): C-Leg, Orion, Plié2.0, and Rel-K. In a motion analysis laboratory, objective gait measures were acquired during level walking at different velocities. Subsequent technical analyses, which involved X-ray computed tomography, identified the functional mechanisms of each device and enabled corroboration of the performance in the gait laboratory by the engineering design of the MPK. Gait measures showed that the mean increase of the maximum knee flexion angle at different walking velocities was closest in value to the unaffected contralateral knee (6.2°/m/s) with C-Leg (3.5°/m/s; Rel-K 17.0°/m/s, Orion 18.3°/m/s, and Plié2.0 28.1°/m/s). Technical analyses corroborated that only with Plié2.0 the flexion resistances were not regulated by microprocessor control at different walking velocities. The muscular effort for the initiation of the swing phase, measured by the minimum hip moment, was found to be lowest with C-Leg (-82.1±14.1 Nm; Rel-K -83.59±17.8 Nm, Orion -88.0±16.3 Nm, and Plié2.0 -91.6±16.5 Nm). Reaching the extension stop at the end of swing phase was reliably executed with both Plié2.0 and C-Leg. Abrupt terminal stance phase extension observed with Plié2.0 and Rel-K could be attributed to the absence of microprocessor control of extension resistance.

Automatic Control Of Length Of Welding Arc

NASA Technical Reports Server (NTRS)

Iceland, William F.

1991-01-01

Nonlinear relationships among current, voltage, and length stored in electronic memory. Conceptual microprocessor-based control subsystem maintains constant length of welding arc in gas/tungsten arc-welding system, even when welding current varied. Uses feedback of current and voltage from welding arc. Directs motor to set position of torch according to previously measured relationships among current, voltage, and length of arc. Signal paths marked "calibration" or "welding" used during those processes only. Other signal paths used during both processes. Control subsystem added to existing manual or automatic welding system equipped with automatic voltage control.

MICROPROCESSOR-BASED DATA-ACQUISITION SYSTEM FOR A BOREHOLE RADAR.

USGS Publications Warehouse

Bradley, Jerry A.; Wright, David L.

1987-01-01

An efficient microprocessor-based system is described that permits real-time acquisition, stacking, and digital recording of data generated by a borehole radar system. Although the system digitizes, stacks, and records independently of a computer, it is interfaced to a desktop computer for program control over system parameters such as sampling interval, number of samples, number of times the data are stacked prior to recording on nine-track tape, and for graphics display of the digitized data. The data can be transferred to the desktop computer during recording, or it can be played back from a tape at a latter time. Using the desktop computer, the operator observes results while recording data and generates hard-copy graphics in the field. Thus, the radar operator can immediately evaluate the quality of data being obtained, modify system parameters, study the radar logs before leaving the field, and rerun borehole logs if necessary. The system has proven to be reliable in the field and has increased productivity both in the field and in the laboratory.

Microprocessor-controlled, wide-range streak camera

DOE Office of Scientific and Technical Information (OSTI.GOV)

Amy E. Lewis, Craig Hollabaugh

Bechtel Nevada/NSTec recently announced deployment of their fifth generation streak camera. This camera incorporates many advanced features beyond those currently available for streak cameras. The arc-resistant driver includes a trigger lockout mechanism, actively monitors input trigger levels, and incorporates a high-voltage fault interrupter for user safety and tube protection. The camera is completely modular and may deflect over a variable full-sweep time of 15 nanoseconds to 500 microseconds. The camera design is compatible with both large- and small-format commercial tubes from several vendors. The embedded microprocessor offers Ethernet connectivity, and XML [extensible markup language]-based configuration management with non-volatile parameter storagemore » using flash-based storage media. The camera’s user interface is platform-independent (Microsoft Windows, Unix, Linux, Macintosh OSX) and is accessible using an AJAX [asynchronous Javascript and XML]-equipped modem browser, such as Internet Explorer 6, Firefox, or Safari. User interface operation requires no installation of client software or browser plug-in technology. Automation software can also access the camera configuration and control using HTTP [hypertext transfer protocol]. The software architecture supports multiple-simultaneous clients, multiple cameras, and multiple module access with a standard browser. The entire user interface can be customized.« less

Microprocessor-controlled wide-range streak camera

NASA Astrophysics Data System (ADS)

Lewis, Amy E.; Hollabaugh, Craig

2006-08-01

Bechtel Nevada/NSTec recently announced deployment of their fifth generation streak camera. This camera incorporates many advanced features beyond those currently available for streak cameras. The arc-resistant driver includes a trigger lockout mechanism, actively monitors input trigger levels, and incorporates a high-voltage fault interrupter for user safety and tube protection. The camera is completely modular and may deflect over a variable full-sweep time of 15 nanoseconds to 500 microseconds. The camera design is compatible with both large- and small-format commercial tubes from several vendors. The embedded microprocessor offers Ethernet connectivity, and XML [extensible markup language]-based configuration management with non-volatile parameter storage using flash-based storage media. The camera's user interface is platform-independent (Microsoft Windows, Unix, Linux, Macintosh OSX) and is accessible using an AJAX [asynchronous Javascript and XML]-equipped modem browser, such as Internet Explorer 6, Firefox, or Safari. User interface operation requires no installation of client software or browser plug-in technology. Automation software can also access the camera configuration and control using HTTP [hypertext transfer protocol]. The software architecture supports multiple-simultaneous clients, multiple cameras, and multiple module access with a standard browser. The entire user interface can be customized.

Paver automation for road surfacing

NASA Astrophysics Data System (ADS)

Tihonov, A.; Velichkin, V.

2017-10-01

The paper discusses factors that bear on the quality of motor road pavement as access roads and highways are built and used. A block diagram is proposed to organize elements of the automatic control system to control the asphalt paver’s mechanisms; the system is based on a microprocessor onboard controller to maintain preset elevation of the finishing plate; description of its operation principle is offered. The paper names primary converters to control the finishing plate elevation. A new control method is described to control the machine’s straight-line movement with GLONASS Satellite Positioning System (SPS) during operation.

Manage Energy with Computers.

ERIC Educational Resources Information Center

American School and University, 1982

1982-01-01

Computerized energy management at Drew University (New Jersey) is accomplished by direct digital control in which microprocessor controllers control, monitor, and carry out energy management functions at the equipment level. (Author/MLF)

FPGA-based multiprocessor system for injection molding control.

PubMed

Muñoz-Barron, Benigno; Morales-Velazquez, Luis; Romero-Troncoso, Rene J; Rodriguez-Donate, Carlos; Trejo-Hernandez, Miguel; Benitez-Rangel, Juan P; Osornio-Rios, Roque A

2012-10-18

The plastic industry is a very important manufacturing sector and injection molding is a widely used forming method in that industry. The contribution of this work is the development of a strategy to retrofit control of an injection molding machine based on an embedded system microprocessors sensor network on a field programmable gate array (FPGA) device. Six types of embedded processors are included in the system: a smart-sensor processor, a micro fuzzy logic controller, a programmable logic controller, a system manager, an IO processor and a communication processor. Temperature, pressure and position are controlled by the proposed system and experimentation results show its feasibility and robustness. As validation of the present work, a particular sample was successfully injected.

Multiprocessor switch with selective pairing

DOEpatents

Gara, Alan; Gschwind, Michael K; Salapura, Valentina

2014-03-11

System, method and computer program product for a multiprocessing system to offer selective pairing of processor cores for increased processing reliability. A selective pairing facility is provided that selectively connects, i.e., pairs, multiple microprocessor or processor cores to provide one highly reliable thread (or thread group). Each paired microprocessor or processor cores that provide one highly reliable thread for high-reliability connect with a system components such as a memory "nest" (or memory hierarchy), an optional system controller, and optional interrupt controller, optional I/O or peripheral devices, etc. The memory nest is attached to a selective pairing facility via a switch or a bus

Microprocessor-controlled laser tracker for atmospheric sensing

NASA Technical Reports Server (NTRS)

Johnson, R. A.; Webster, C. R.; Menzies, R. T.

1985-01-01

An optical tracking system comprising a visible HeNe laser, an imaging detector, and a microprocessor-controlled mirror, has been designed to track a moving retroreflector located up to 500 m away from an atmospheric instrument and simultaneously direct spectrally tunable infrared laser radiation to the retroreflector for double-ended, long-path absorption measurements of atmospheric species. The tracker has been tested during the recent flight of a balloon-borne tunable diode laser absorption spectrometer which monitors the concentrations of stratospheric species within a volume defined by a 0.14-m-diameter retroreflector lowered 500 m below the instrument gondola.

Design and Development of a Multiprogramming Operating System for Sixteen Bit Microprocessors.

DTIC Science & Technology

1981-12-01

with the technical details of how services are programmed or produced, except perhaps when they fail to meet user requirements. Users are interested in...locations and loading decks. As the expense *and speed of computers increased, executive programs were created to allow several users to sequence...single user operating system as a companion to the 8080 microprocessor. CP/M (Control Program for Microcomputers) was a single user operating system that

DGCR8 HITS-CLIP reveals novel functions for the Microprocessor

PubMed Central

Macias, Sara; Plass, Mireya; Stajuda, Agata; Michlewski, Gracjan; Eyras, Eduardo; Cáceres, Javier F.

2012-01-01

The Drosha-DGCR8 complex (Microprocessor) is required for microRNA (miRNA) biogenesis. DGCR8 recognizes the RNA substrate, whereas Drosha functions as the endonuclease. High-throughput sequencing and crosslinking immunoprecipitation (HITS-CLIP) was used to identify RNA targets of DGCR8 in human cells. Unexpectedly, miRNAs were not the most abundant targets. DGCR8-bound RNAs also comprised several hundred mRNAs as well as snoRNAs and long non-coding RNAs. We found that the Microprocessor controls the abundance of several mRNAs as well as of MALAT-1. By contrast, DGCR8-mediated cleavage of snoRNAs is independent of Drosha, suggesting the involvement of DGCR8 in cellular complexes with other endonucleases. Interestingly, binding of DGCR8 to cassette exons, acts as a novel mechanism to regulate the relative abundance of alternatively spliced isoforms. Collectively, these data provide new insights in the complex role of DGCR8 in controlling the fate of several classes of RNAs. PMID:22796965

The Minerva Multi-Microprocessor.

DTIC Science & Technology

A multiprocessor system is described which is an experiment in low cost, extensible, multiprocessor architectures. Global issues such as inclusion of a central bus, design of the bus arbiter, and methods of interrupt handling are considered. The system initially includes two processor types, based on microprocessors, and these are discussed. Methods for reducing processor demand for the central bus are described.

Modeling and control study of the NASA 0.3-meter transonic cryogenic tunnel for use with sulfur hexafluoride medium

NASA Technical Reports Server (NTRS)

Balakrishna, S.; Kilgore, W. Allen

1992-01-01

The NASA Langley 0.3-m Transonic Cryogenic Tunnel is to be modified to operate with sulfur hexafluoride gas while retaining its present capability to operate with nitrogen. The modified tunnel will provide high Reynolds number flow on aerodynamic models with two different test gases. The document details a study of the SF6 tunnel performance boundaries, thermodynamic modeling of the tunnel process, nonlinear dynamical simulation of math model to yield tunnel responses, the closed loop control requirements, control laws, and mechanization of the control laws on the microprocessor based controller.

Global identification of target recognition and cleavage by the Microprocessor in human ES cells

PubMed Central

Seong, Youngmo; Lim, Do-Hwan; Kim, Augustine; Seo, Jae Hong; Lee, Young Sik; Song, Hoseok; Kwon, Young-Soo

2014-01-01

The Microprocessor plays an essential role in canonical miRNA biogenesis by facilitating cleavage of stem-loop structures in primary transcripts to yield pre-miRNAs. Although miRNA biogenesis has been extensively studied through biochemical and molecular genetic approaches, it has yet to be addressed to what extent the current miRNA biogenesis models hold true in intact cells. To address the issues of in vivo recognition and cleavage by the Microprocessor, we investigate RNAs that are associated with DGCR8 and Drosha by using immunoprecipitation coupled with next-generation sequencing. Here, we present global protein–RNA interactions with unprecedented sensitivity and specificity. Our data indicate that precursors of canonical miRNAs and miRNA-like hairpins are the major substrates of the Microprocessor. As a result of specific enrichment of nascent cleavage products, we are able to pinpoint the Microprocessor-mediated cleavage sites per se at single-nucleotide resolution. Unexpectedly, a 2-nt 3′ overhang invariably exists at the ends of cleaved bases instead of nascent pre-miRNAs. Besides canonical miRNA precursors, we find that two novel miRNA-like structures embedded in mRNAs are cleaved to yield pre-miRNA-like hairpins, uncoupled from miRNA maturation. Our data provide a framework for in vivo Microprocessor-mediated cleavage and a foundation for experimental and computational studies on miRNA biogenesis in living cells. PMID:25326327

Arranging computer architectures to create higher-performance controllers

NASA Technical Reports Server (NTRS)

Jacklin, Stephen A.

1988-01-01

Techniques for integrating microprocessors, array processors, and other intelligent devices in control systems are reviewed, with an emphasis on the (re)arrangement of components to form distributed or parallel processing systems. Consideration is given to the selection of the host microprocessor, increasing the power and/or memory capacity of the host, multitasking software for the host, array processors to reduce computation time, the allocation of real-time and non-real-time events to different computer subsystems, intelligent devices to share the computational burden for real-time events, and intelligent interfaces to increase communication speeds. The case of a helicopter vibration-suppression and stabilization controller is analyzed as an example, and significant improvements in computation and throughput rates are demonstrated.

System and method for bidirectional flow and controlling fluid flow in a conduit

DOEpatents

Ortiz, M.G.

1999-03-23

A system for measuring bidirectional flow, including backflow, of fluid in a conduit is disclosed. The system utilizes a structural mechanism to create a pressure differential in the conduit. Pressure sensors are positioned upstream from the mechanism, at the mechanism, and downstream from the mechanism. Data from the pressure sensors are transmitted to a microprocessor or computer, and pressure differential detected between the pressure sensors is then used to calculate the backflow. Control signals may then be generated by the microprocessor or computer to shut off valves located in the conduit, upon the occurrence of backflow, or to control flow, total material dispersed, etc. in the conduit. 3 figs.

Lithium Ion Battery (LIB) Charger: Spacesuit Battery Charger Design with 2-Fault Tolerance to Catastrophic Hazards

NASA Technical Reports Server (NTRS)

Darcy, Eric; Davies, Frank

2009-01-01

Charger design that is 2-fault tolerant to catastrophic has been achieved for the Spacesuit Li-ion Battery with key features. Power supply control circuit and 2 microprocessors independently control against overcharge. 3 microprocessor control against undercharge (false positive: Go for EVA) conditions. 2 independent channels provide functional redundancy. Capable of charge balancing cell banks in series. Cell manufacturing and performance uniformity is excellent with both designs. Once a few outliers are removed, LV cells are slightly more uniform than MoliJ cells. If cell balance feature of charger is ever invoked, it will be an indication of a significant degradation issue, not a nominal condition.

A car theft deterrent system research based on ARM9

NASA Astrophysics Data System (ADS)

Zhang, Kaisheng; Liu, Jinhao; Fan, Lijun

2009-07-01

The traditional automotive burglarproof systems commonly only rely on the simple remote control to security which measures are not perfect and functions are too single. With the development of society, people tend to concern on the fingerprint recognition technology, GSM /GPRS wireless transmission technology, the idea of ARM9-based design of automobile burglarproof system is dependent on both of them. The S3C2410 microprocessor embedded system is used in this system, which is illuminated the idea of the control system design through the hardware and software. The spot use indicates that the high control precision, steady performance and the humanistic rational design of automotive burglarproof system.

Prototype microprocessor controller. [for STDN antennas

NASA Technical Reports Server (NTRS)

Zarur, J.; Kraeuter, R.

1980-01-01

A microcomputer controller for STDN antennas was developed. The microcomputer technology reduces the system's physical size by the implementation in firmware of functions. The reduction in the number of components increases system reliability and similar benefit is derived when a graphic video display is substituted for several control and indicator panels. A substantial reduction in the number of cables, connectors, and mechanical switches is achieved. The microcomputer based system is programmed to perform calibration and diagnostics, to update the satellite orbital vector, and to communicate with other network systems. The design is applicable to antennas and lasers.

Versatile, low-cost, computer-controlled, sample positioning system for vacuum applications

NASA Technical Reports Server (NTRS)

Vargas-Aburto, Carlos; Liff, Dale R.

1991-01-01

A versatile, low-cost, easy to implement, microprocessor-based motorized positioning system (MPS) suitable for accurate sample manipulation in a Second Ion Mass Spectrometry (SIMS) system, and for other ultra-high vacuum (UHV) applications was designed and built at NASA LeRC. The system can be operated manually or under computer control. In the latter case, local, as well as remote operation is possible via the IEEE-488 bus. The position of the sample can be controlled in three linear orthogonal and one angular coordinates.

Microprocessors: Laboratory Simulation of Industrial Control Applications.

ERIC Educational Resources Information Center

Gedeon, David V.

1981-01-01

Describes a course to make technical managers more aware of computer technology and how data loggers, programmable controllers, and larger computer systems interact in a hierarchical configuration of manufacturing process control. (SK)

Analog-digital simulation of transient-induced logic errors and upset susceptibility of an advanced control system

NASA Technical Reports Server (NTRS)

Carreno, Victor A.; Choi, G.; Iyer, R. K.

1990-01-01

A simulation study is described which predicts the susceptibility of an advanced control system to electrical transients resulting in logic errors, latched errors, error propagation, and digital upset. The system is based on a custom-designed microprocessor and it incorporates fault-tolerant techniques. The system under test and the method to perform the transient injection experiment are described. Results for 2100 transient injections are analyzed and classified according to charge level, type of error, and location of injection.

Specifications Physiological Monitoring System

NASA Technical Reports Server (NTRS)

1985-01-01

The operation of a physiological monitoring system (PMS) is described. Specifications were established for performance, design, interface, and test requirements. The PMS is a compact, microprocessor-based system, which can be worn in a pack on the body or may be mounted on a Spacelab rack or other appropriate structure. It consists of two modules, the Data Control Unit (DCU) and the Remote Control/Display Unit (RCDU). Its purpose is to collect and distribute data from physiological experiments in the Spacelab and in the Orbiter.

Expression levels of the microRNA maturing microprocessor complex component DGCR8 and the RNA-induced silencing complex (RISC) components argonaute-1, argonaute-2, PACT, TARBP1, and TARBP2 in epithelial skin cancer.

PubMed

Sand, Michael; Skrygan, Marina; Georgas, Dimitrios; Arenz, Christoph; Gambichler, Thilo; Sand, Daniel; Altmeyer, Peter; Bechara, Falk G

2012-11-01

The microprocessor complex mediates intranuclear biogenesis of precursor microRNAs from the primary microRNA transcript. Extranuclear, mature microRNAs are incorporated into the RNA-induced silencing complex (RISC) before interaction with complementary target mRNA leads to transcriptional repression or cleavage. In this study, we investigated the expression profiles of the microprocessor complex subunit DiGeorge syndrome critical region gene 8 (DGCR8) and the RISC components argonaute-1 (AGO1), argonaute-2 (AGO2), as well as double-stranded RNA-binding proteins PACT, TARBP1, and TARBP2 in epithelial skin cancer and its premalignant stage. Patients with premalignant actinic keratoses (AK, n = 6), basal cell carcinomas (BCC, n = 15), and squamous cell carcinomas (SCC, n = 7) were included in the study. Punch biopsies were harvested from the center of the tumors (lesional), from healthy skin sites (intraindividual controls), and from healthy skin sites in a healthy control group (n = 16; interindividual control). The DGCR8, AGO1, AGO2, PACT, TARBP1, and TARBP2 mRNA expression levels were detected by quantitative real-time reverse transcriptase polymerase chain reaction. The DGCR8, AGO1, AGO2, PACT, and TARBP1 expression levels were significantly higher in the AK, BCC, and SCC groups than the healthy controls (P < 0.05). There was no significant difference in the TARBP2 expression levels between groups (P > 0.05). This study indicates that major components of the miRNA pathway, such as the microprocessor complex and RISC, are dysregulated in epithelial skin cancer. Copyright © 2011 Wiley Periodicals, Inc.

Transient fault behavior in a microprocessor: A case study

NASA Technical Reports Server (NTRS)

Duba, Patrick

1989-01-01

An experimental analysis is described which studies the susceptibility of a microprocessor based jet engine controller to upsets caused by current and voltage transients. A design automation environment which allows the run time injection of transients and the tracing from their impact device to the pin level is described. The resulting error data are categorized by the charge levels of the injected transients by location and by their potential to cause logic upsets, latched errors, and pin errors. The results show a 3 picoCouloumb threshold, below which the transients have little impact. An Arithmetic and Logic Unit transient is most likely to result in logic upsets and pin errors (i.e., impact the external environment). The transients in the countdown unit are potentially serious since they can result in latched errors, thus causing latent faults. Suggestions to protect the processor against these errors, by incorporating internal error detection and transient suppression techniques, are also made.

Proceedings: DISE Workshop on Microprocessors and Education (Fort Collins, Colorado, August 16-18, 1976).

ERIC Educational Resources Information Center

Pittsburgh Univ., PA. Dept. of Electrical Engineering.

Papers presented during four sessions of a workshop, which addressed the role of microprocessors in education, are included in this publication. The issues covered involved seven areas: (1) views of the microelectronics industry; (2) microprocessor architecture; (3) microprocessor chip design; (4) microprocessor software; (5) the impact of…

Research and design of intelligent distributed traffic signal light control system based on CAN bus

NASA Astrophysics Data System (ADS)

Chen, Yu

2007-12-01

Intelligent distributed traffic signal light control system was designed based on technologies of infrared, CAN bus, single chip microprocessor (SCM), etc. The traffic flow signal is processed with the core of SCM AT89C51. At the same time, the SCM controls the CAN bus controller SJA1000/transceiver PCA82C250 to build a CAN bus communication system to transmit data. Moreover, up PC realizes to connect and communicate with SCM through USBCAN chip PDIUSBD12. The distributed traffic signal light control system with three control styles of Vehicle flux, remote and PC is designed. This paper introduces the system composition method and parts of hardware/software design in detail.

A rocket-borne microprocessor-based experiment for investigation of energetic particles in the D and E regions

NASA Technical Reports Server (NTRS)

Braswell, F. M.

1981-01-01

An energetic experiment using the Z80 family of microcomputer components is described. Data collected from the experiment allowed fast and efficient postprocessing, yielding both energy-spectrum and pitch-angle distribution of energetic particles in the D and E regions. Advanced microprocessor system architecture and software concepts were used in the design to cope with the large amount of data being processed. This required the Z80 system to operate at over 80% of its total capacity. The microprocessor system was included in the payloads of three rockets launched during the Energy Budget Campaign at ESRANGE, Kiruna, Sweden in November 1980. Based on preliminary examination of the data, the performance of the experiment was satisfactory and good data were obtained on the energy spectrum and pitch-angle distribution of the particles.

Basic avionics module design for general aviation aircraft

NASA Technical Reports Server (NTRS)

Smyth, R. K.; Smyth, D. E.

1978-01-01

The design of an advanced digital avionics system (basic avionics module) for general aviation aircraft operated with a single pilot under IFR conditions is described. The microprocessor based system provided all avionic functions, including flight management, navigation, and lateral flight control. The mode selection was interactive with the pilot. The system used a navigation map data base to provide operation in the current and planned air traffic control environment. The system design included software design listings for some of the required modules. The distributed microcomputer uses the IEEE 488 bus for interconnecting the microcomputer and sensors.

Use of a Microprocessor to Implement an ADCCP Protocol (Federal Std-1003) Operating in the Unbalanced Normal Mode.

DTIC Science & Technology

1980-05-01

andcoptrpormigfrteublne nra ls fpoeue nacrac with Federal Standard 1003 fTelecommunications: Synchronous Bit Oriented Data Link Control Procedures...and the higher level user. The solution to the producer/consumer problem involves the use of PASS and SICHAL primitives and event variables or... semaphores . The event variables have been defined for the LS-microprocessor interface as part of I-1 the internal registers that are included in the F6856

TDP-43 regulates the microprocessor complex activity during in vitro neuronal differentiation.

PubMed

Di Carlo, Valerio; Grossi, Elena; Laneve, Pietro; Morlando, Mariangela; Dini Modigliani, Stefano; Ballarino, Monica; Bozzoni, Irene; Caffarelli, Elisa

2013-12-01

TDP-43 (TAR DNA-binding protein 43) is an RNA-binding protein implicated in RNA metabolism at several levels. Even if ubiquitously expressed, it is considered as a neuronal activity-responsive factor and a major signature for neurological pathologies, making the comprehension of its activity in the nervous system a very challenging issue. TDP-43 has also been described as an accessory component of the Drosha-DGCR8 (DiGeorge syndrome critical region gene 8) microprocessor complex, which is crucially involved in basal and tissue-specific RNA processing events. In the present study, we exploited in vitro neuronal differentiation systems to investigate the TDP-43 demand for the microprocessor function, focusing on both its canonical microRNA biosynthetic activity and its alternative role as a post-transcriptional regulator of gene expression. Our findings reveal a novel role for TDP-43 as an essential factor that controls the stability of Drosha protein during neuronal differentiation, thus globally affecting the production of microRNAs. We also demonstrate that TDP-43 is required for the Drosha-mediated regulation of Neurogenin 2, a master gene orchestrating neurogenesis, whereas post-transcriptional control of Dgcr8, another Drosha target, resulted to be TDP-43-independent. These results implicate a previously uncovered contribution of TDP-43 in regulating the abundance and the substrate specificity of the microprocessor complex and provide new insights into TDP-43 as a key player in neuronal differentiation.

Microprocessor activity controls differential miRNA biogenesis In Vivo.

PubMed

Conrad, Thomas; Marsico, Annalisa; Gehre, Maja; Orom, Ulf Andersson

2014-10-23

In miRNA biogenesis, pri-miRNA transcripts are converted into pre-miRNA hairpins. The in vivo properties of this process remain enigmatic. Here, we determine in vivo transcriptome-wide pri-miRNA processing using next-generation sequencing of chromatin-associated pri-miRNAs. We identify a distinctive Microprocessor signature in the transcriptome profile from which efficiency of the endogenous processing event can be accurately quantified. This analysis reveals differential susceptibility to Microprocessor cleavage as a key regulatory step in miRNA biogenesis. Processing is highly variable among pri-miRNAs and a better predictor of miRNA abundance than primary transcription itself. Processing is also largely stable across three cell lines, suggesting a major contribution of sequence determinants. On the basis of differential processing efficiencies, we define functionality for short sequence features adjacent to the pre-miRNA hairpin. In conclusion, we identify Microprocessor as the main hub for diversified miRNA output and suggest a role for uncoupling miRNA biogenesis from host gene expression. Copyright © 2014 The Authors. Published by Elsevier Inc. All rights reserved.

FPGA implementation of bit controller in double-tick architecture

NASA Astrophysics Data System (ADS)

Kobylecki, Michał; Kania, Dariusz

2017-11-01

This paper presents a comparison of the two original architectures of programmable bit controllers built on FPGAs. Programmable Logic Controllers (which include, among other things programmable bit controllers) built on FPGAs provide a efficient alternative to the controllers based on microprocessors which are expensive and often too slow. The presented and compared methods allow for the efficient implementation of any bit control algorithm written in Ladder Diagram language into the programmable logic system in accordance with IEC61131-3. In both cases, we have compared the effect of the applied architecture on the performance of executing the same bit control program in relation to its own size.

Advances in 7xx-nm fiber-coupled modules with application to Tm fiber laser pumping and DPAL (Conference Presentation)

NASA Astrophysics Data System (ADS)

Patterson, Steven G.; Guiney, Tina; Stapleton, Dean; Braker, Joseph; Alegria, Kim; Irwin, David A.; Ebert, Christopher

2017-02-01

DILAS has leveraged its industry-leading work in manufacturing low SWaP fiber-coupled modules extending the wavelength range to 793nm for Tm fiber laser pumping. Ideal for medical, industrial and military applications, modules spanning from single emitter-based 9W to TBar-based 200W of 793nm pump power will be discussed. The highlight is a lightweight module capable of <200W of 793nm pump power out of a package weighing < 400 grams. In addition, other modules spanning from single emitter-based 9W to TBar-based 200W of 793nm pump power will be presented. In addition, advances in DPAL modules, emitting at the technologically important wavelengths near 766nm and 780nm, will be detailed. Highlights include a fully microprocessor controlled fiber-coupled module that produces greater than 400W from a 600 micron core fiber and a line width of only 56.3pm. The micro-processor permits the automated center wavelength and line width tuning of the output over a range of output powers while retaining excellent line center and line width stability over time.

Microprocessor realizations of range rate filters

NASA Technical Reports Server (NTRS)

1979-01-01

The performance of five digital range rate filters is evaluated. A range rate filter receives an input of range data from a radar unit and produces an output of smoothed range data and its estimated derivative range rate. The filters are compared through simulation on an IBM 370. Two of the filter designs are implemented on a 6800 microprocessor-based system. Comparisons are made on the bases of noise variance reduction ratios and convergence times of the filters in response to simulated range signals.

The biological microprocessor, or how to build a computer with biological parts

PubMed Central

Moe-Behrens, Gerd HG

2013-01-01

Systemics, a revolutionary paradigm shift in scientific thinking, with applications in systems biology, and synthetic biology, have led to the idea of using silicon computers and their engineering principles as a blueprint for the engineering of a similar machine made from biological parts. Here we describe these building blocks and how they can be assembled to a general purpose computer system, a biological microprocessor. Such a system consists of biological parts building an input / output device, an arithmetic logic unit, a control unit, memory, and wires (busses) to interconnect these components. A biocomputer can be used to monitor and control a biological system. PMID:24688733

Design of intelligent vehicle control system based on single chip microcomputer

NASA Astrophysics Data System (ADS)

Zhang, Congwei

2018-06-01

The smart car microprocessor uses the KL25ZV128VLK4 in the Freescale series of single-chip microcomputers. The image sampling sensor uses the CMOS digital camera OV7725. The obtained track data is processed by the corresponding algorithm to obtain track sideline information. At the same time, the pulse width modulation control (PWM) is used to control the motor and servo movements, and based on the digital incremental PID algorithm, the motor speed control and servo steering control are realized. In the project design, IAR Embedded Workbench IDE is used as the software development platform to program and debug the micro-control module, camera image processing module, hardware power distribution module, motor drive and servo control module, and then complete the design of the intelligent car control system.

A discrete decentralized variable structure robotic controller

NASA Technical Reports Server (NTRS)

Tumeh, Zuheir S.

1989-01-01

A decentralized trajectory controller for robotic manipulators is designed and tested using a multiprocessor architecture and a PUMA 560 robot arm. The controller is made up of a nominal model-based component and a correction component based on a variable structure suction control approach. The second control component is designed using bounds on the difference between the used and actual values of the model parameters. Since the continuous manipulator system is digitally controlled along a trajectory, a discretized equivalent model of the manipulator is used to derive the controller. The motivation for decentralized control is that the derived algorithms can be executed in parallel using a distributed, relatively inexpensive, architecture where each joint is assigned a microprocessor. Nonlinear interaction and coupling between joints is treated as a disturbance torque that is estimated and compensated for.

FPGA-Based Multiprocessor System for Injection Molding Control

PubMed Central

Muñoz-Barron, Benigno; Morales-Velazquez, Luis; Romero-Troncoso, Rene J.; Rodriguez-Donate, Carlos; Trejo-Hernandez, Miguel; Benitez-Rangel, Juan P.; Osornio-Rios, Roque A.

2012-01-01

The plastic industry is a very important manufacturing sector and injection molding is a widely used forming method in that industry. The contribution of this work is the development of a strategy to retrofit control of an injection molding machine based on an embedded system microprocessors sensor network on a field programmable gate array (FPGA) device. Six types of embedded processors are included in the system: a smart-sensor processor, a micro fuzzy logic controller, a programmable logic controller, a system manager, an IO processor and a communication processor. Temperature, pressure and position are controlled by the proposed system and experimentation results show its feasibility and robustness. As validation of the present work, a particular sample was successfully injected. PMID:23202036

Design Method of Digital Optimal Control Scheme and Multiple Paralleled Bridge Type Current Amplifier for Generating Gradient Magnetic Fields in MRI Systems

NASA Astrophysics Data System (ADS)

Watanabe, Shuji; Takano, Hiroshi; Fukuda, Hiroya; Hiraki, Eiji; Nakaoka, Mutsuo

This paper deals with a digital control scheme of multiple paralleled high frequency switching current amplifier with four-quadrant chopper for generating gradient magnetic fields in MRI (Magnetic Resonance Imaging) systems. In order to track high precise current pattern in Gradient Coils (GC), the proposal current amplifier cancels the switching current ripples in GC with each other and designed optimum switching gate pulse patterns without influences of the large filter current ripple amplitude. The optimal control implementation and the linear control theory in GC current amplifiers have affinity to each other with excellent characteristics. The digital control system can be realized easily through the digital control implementation, DSPs or microprocessors. Multiple-parallel operational microprocessors realize two or higher paralleled GC current pattern tracking amplifier with optimal control design and excellent results are given for improving the image quality of MRI systems.

Field Programmable Gate Array for Implementation of Redundant Advanced Digital Feedback Control

NASA Technical Reports Server (NTRS)

King, K. D.

2003-01-01

The goal of this effort was to develop a digital motor controller using field programmable gate arrays (FPGAs). This is a more rugged approach than a conventional microprocessor digital controller. FPGAs typically have higher radiation (rad) tolerance than both the microprocessor and memory required for a conventional digital controller. Furthermore, FPGAs can typically operate at higher speeds. (While speed is usually not an issue for motor controllers, it can be for other system controllers.) Other than motor power, only a 3.3-V digital power supply was used in the controller; no analog bias supplies were used. Since most of the circuit was implemented in the FPGA, no additional parts were needed other than the power transistors to drive the motor. The benefits that FPGAs provide over conventional designs-lower power and fewer parts-allow for smaller packaging and reduced weight and cost.

Loran-C digital word generator for use with a KIM-1 microprocessor system

NASA Technical Reports Server (NTRS)

Nickum, J. D.

1977-01-01

The problem of translating the time of occurrence of received Loran-C pulses into a time, referenced to a particular period of occurrence is addressed and applied to the design of a digital word generator for a Loran-C sensor processor package. The digital information from this word generator is processed in a KIM-1 microprocessor system which is based on the MOS 6502 CPU. This final system will consist of a complete time difference sensor processor for determining position information using Loran-C charts. The system consists of the KIM-1 microprocessor module, a 4K RAM memory board, a user interface, and the Loran-C word generator.

A microprocessor-based cardiotachometer

NASA Technical Reports Server (NTRS)

Donaldson, J. A.; Crosier, W. G.

1979-01-01

The development of a highly accurate and reliable cardiotachometer for measuring the heart rate of test subjects is discussed. It measures heart rate over the range of 30 to 250 beats/minute and gives instantaneous (beat to beat) updates on the system output so that occasional noise artifacts or ectopic beats could be more easily identified except that occasional missed beats caused by switching ECG leads should not cause a change in the output. The cardiotachometer uses an improved analog filter and R-wave detector and an Intel 8080A microprocessor to handle all of the logic and arithmetic necessary. By using the microprocessor, future hardware modifications could easily be made if functional changes were needed.

Global identification of target recognition and cleavage by the Microprocessor in human ES cells.

PubMed

Seong, Youngmo; Lim, Do-Hwan; Kim, Augustine; Seo, Jae Hong; Lee, Young Sik; Song, Hoseok; Kwon, Young-Soo

2014-11-10

The Microprocessor plays an essential role in canonical miRNA biogenesis by facilitating cleavage of stem-loop structures in primary transcripts to yield pre-miRNAs. Although miRNA biogenesis has been extensively studied through biochemical and molecular genetic approaches, it has yet to be addressed to what extent the current miRNA biogenesis models hold true in intact cells. To address the issues of in vivo recognition and cleavage by the Microprocessor, we investigate RNAs that are associated with DGCR8 and Drosha by using immunoprecipitation coupled with next-generation sequencing. Here, we present global protein-RNA interactions with unprecedented sensitivity and specificity. Our data indicate that precursors of canonical miRNAs and miRNA-like hairpins are the major substrates of the Microprocessor. As a result of specific enrichment of nascent cleavage products, we are able to pinpoint the Microprocessor-mediated cleavage sites per se at single-nucleotide resolution. Unexpectedly, a 2-nt 3' overhang invariably exists at the ends of cleaved bases instead of nascent pre-miRNAs. Besides canonical miRNA precursors, we find that two novel miRNA-like structures embedded in mRNAs are cleaved to yield pre-miRNA-like hairpins, uncoupled from miRNA maturation. Our data provide a framework for in vivo Microprocessor-mediated cleavage and a foundation for experimental and computational studies on miRNA biogenesis in living cells. © The Author(s) 2014. Published by Oxford University Press on behalf of Nucleic Acids Research.

Synchronous clock stopper for microprocessor

NASA Technical Reports Server (NTRS)

Kitchin, David A. (Inventor)

1985-01-01

A synchronous clock stopper circuit for inhibiting clock pulses to a microprocessor in response to a stop request signal, and for reinstating the clock pulses in response to a start request signal thereby to conserve power consumption of the microprocessor when used in an environment of limited power. The stopping and starting of the microprocessor is synchronized, by a phase tracker, with the occurrences of a predetermined phase in the instruction cycle of the microprocessor in which the I/O data and address lines of the microprocessor are of high impedance so that a shared memory connected to the I/O lines may be accessed by other peripheral devices. The starting and stopping occur when the microprocessor initiates and completes, respectively, an instruction, as well as before and after transferring data with a memory. Also, the phase tracker transmits phase information signals over a bus to other peripheral devices which signals identify the current operational phase of the microprocessor.

A microprocessor based on a two-dimensional semiconductor.

PubMed

Wachter, Stefan; Polyushkin, Dmitry K; Bethge, Ole; Mueller, Thomas

2017-04-11

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III-V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor-molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material.

A microprocessor based on a two-dimensional semiconductor

NASA Astrophysics Data System (ADS)

Wachter, Stefan; Polyushkin, Dmitry K.; Bethge, Ole; Mueller, Thomas

2017-04-01

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III-V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor--molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material.

Analysis of clinically important factors on the performance of advanced hydraulic, microprocessor-controlled exo-prosthetic knee joints based on 899 trial fittings

PubMed Central

Hahn, Andreas; Lang, Michael; Stuckart, Claudia

2016-01-01

Abstract The objective of this work is to evaluate whether clinically important factors may predict an individual's capability to utilize the functional benefits provided by an advanced hydraulic, microprocessor-controlled exo-prosthetic knee component. This retrospective cross-sectional cohort analysis investigated the data of above knee amputees captured during routine trial fittings. Prosthetists rated the performance indicators showing the functional benefits of the advanced maneuvering capabilities of the device. Subjects were asked to rate their perception. Simple and multiple linear and logistic regression was applied. Data from 899 subjects with demographics typical for the population were evaluated. Ability to vary gait speed, perform toileting, and ascend stairs were identified as the most sensitive performance predictors. Prior C-Leg users showed benefits during advanced maneuvering. Variables showed plausible and meaningful effects, however, could not claim predictive power. Mobility grade showed the largest effect but also failed to be predictive. Clinical parameters such as etiology, age, mobility grade, and others analyzed here do not suffice to predict individual potential. Daily walking distance may pose a threshold value and be part of a predictive instrument. Decisions based solely on single parameters such as mobility grade rating or walking distance seem to be questionable. PMID:27828871

Benefits of microprocessor-controlled prosthetic knees to limited community ambulators: systematic review.

PubMed

Kannenberg, Andreas; Zacharias, Britta; Pröbsting, Eva

2014-01-01

The benefits of microprocessor-controlled prosthetic knees (MPKs) have been well established in community ambulators (Medicare Functional Classification Level [MFCL]-3) with a transfemoral amputation (TFA). A systematic review of the literature was performed to analyze whether limited community ambulators (MFCL-2) may also benefit from using an MPK in safety, performance-based function and mobility, and perceived function and satisfaction. We searched 10 scientific databases for clinical trials with MPKs and identified six publications with 57 subjects with TFA and MFCL-2 mobility grade. Using the criteria of a Cochrane Review on prosthetic components, we rated methodological quality moderate in four publications and low in two publications. MPK use may significantly reduce uncontrolled falls by up to 80% as well as significantly improve indicators of fall risk. Performance-based outcome measures suggest that persons with MFCL-2 mobility grade may be able to walk about 14% to 25% faster on level ground, be around 20% quicker on uneven surfaces, and descend a slope almost 30% faster when using an MPK. The results of this systematic review suggest that trial fittings may be used to determine whether or not individuals with TFA and MFCL-2 mobility grade benefit from MPK use. Criteria for patient selection and assessment of trial fitting success or failure are proposed.

Analysis of clinically important factors on the performance of advanced hydraulic, microprocessor-controlled exo-prosthetic knee joints based on 899 trial fittings.

PubMed

Hahn, Andreas; Lang, Michael; Stuckart, Claudia

2016-11-01

The objective of this work is to evaluate whether clinically important factors may predict an individual's capability to utilize the functional benefits provided by an advanced hydraulic, microprocessor-controlled exo-prosthetic knee component.This retrospective cross-sectional cohort analysis investigated the data of above knee amputees captured during routine trial fittings. Prosthetists rated the performance indicators showing the functional benefits of the advanced maneuvering capabilities of the device. Subjects were asked to rate their perception. Simple and multiple linear and logistic regression was applied.Data from 899 subjects with demographics typical for the population were evaluated. Ability to vary gait speed, perform toileting, and ascend stairs were identified as the most sensitive performance predictors. Prior C-Leg users showed benefits during advanced maneuvering. Variables showed plausible and meaningful effects, however, could not claim predictive power. Mobility grade showed the largest effect but also failed to be predictive.Clinical parameters such as etiology, age, mobility grade, and others analyzed here do not suffice to predict individual potential. Daily walking distance may pose a threshold value and be part of a predictive instrument. Decisions based solely on single parameters such as mobility grade rating or walking distance seem to be questionable.

Cumulative Timers for Microprocessors

NASA Technical Reports Server (NTRS)

Battle, John O.

2007-01-01

It has been proposed to equip future microprocessors with electronic cumulative timers, for essentially the same reasons for which land vehicles are equipped with odometers (total-distance-traveled meters) and aircraft are equipped with Hobbs meters (total-engine-operating time meters). Heretofore, there has been no way to determine the amount of use to which a microprocessor (or a product containing a microprocessor) has been subjected. The proposed timers would count all microprocessor clock cycles and could only be read by means of microprocessor instructions but, like odometers and Hobbs meters, could never be reset to zero without physically damaging the chip.

IEEE 1451.2 based Smart sensor system using ADuc847

NASA Astrophysics Data System (ADS)

Sreejithlal, A.; Ajith, Jose

IEEE 1451 standard defines a standard interface for connecting transducers to microprocessor based data acquisition systems, instrumentation systems, control and field networks. Smart transducer interface module (STIM) acts as a unit which provides signal conditioning, digitization and data packet generation functions to the transducers connected to it. This paper describes the implementation of a microcontroller based smart transducer interface module based on IEEE 1451.2 standard. The module, implemented using ADuc847 microcontroller has 2 transducer channels and is programmed using Embedded C language. The Sensor system consists of a Network Controlled Application Processor (NCAP) module which controls the Smart transducer interface module (STIM) over an IEEE1451.2-RS232 bus. The NCAP module is implemented as a software module in C# language. The hardware details, control principles involved and the software implementation for the STIM are described in detail.

YADCLAN: yet another digitally-controlled linear artificial neuron.

PubMed

Frenger, Paul

2003-01-01

This paper updates the author's 1999 RMBS presentation on digitally controlled linear artificial neuron design. Each neuron is based on a standard operational amplifier having excitatory and inhibitory inputs, variable gain, an amplified linear analog output and an adjustable threshold comparator for digital output. This design employs a 1-wire serial network of digitally controlled potentiometers and resistors whose resistance values are set and read back under microprocessor supervision. This system embodies several unique and useful features, including: enhanced neuronal stability, dynamic reconfigurability and network extensibility. This artificial neuronal is being employed for feature extraction and pattern recognition in an advanced robotic application.

Debris measure subsystem of the nanosatellite IRECIN

NASA Astrophysics Data System (ADS)

Ferrante, M.; di Ciolo, L.; Ortenzi, A.; Petrozzi, M.; del Re, V.

2003-09-01

The on board resources, needed to perform the mission tasks, are very limited in nano-satellites. This paper proposes an Electronic real-time system that acquires space debris measures. It uses a piezo-electric sensor. The described device is a subsystem on board of the IRECIN nanosatellite composed mainly by a r.i.s.c. microprocessor, an electronic part that interfaces to the debris sensor in order to provide a low noise electrical and suitable range to ADC 12 bit converter, and finally a memory in order to store the data. The microprocessor handles the Debris Measure System measuring the impacts number, their intensity and storing their waves form. This subsystem is able to communicate with the other IRECIN subsystems through I2C Bus and principally with the "Main Microprocessor" subsystem allowing the data download directly to the Ground Station. Moreover this subsystem lets free the "Main Microprocessor Board" from the management and charge of debris data. All electronic components are SMD technology in order to reduce weight and size. The realized Electronic board are completely developed, realized and tested at the Vitrociset S.P.A. under control of Research and Development Group. The proposed system is implemented on the IRECIN, a modular nanosatellite weighting less than 1.5 kg, constituted by sixteen external sides with surface-mounted solar cells and three internal Al plates, kept together by four steel bars. Lithium-ions batteries are added for eclipse operations. Attitude is determined by two three-axis magnetometers and the solar panels data. Control is provided by an active magnetic control system. The spacecraft will be spin-stabilized with the spin-axis normal to the orbit. debris and micrometeoroids mass and velocity.

Biomechanics of ramp descent in unilateral trans-tibial amputees: Comparison of a microprocessor controlled foot with conventional ankle-foot mechanisms.

PubMed

Struchkov, Vasily; Buckley, John G

2016-02-01

Walking down slopes and/or over uneven terrain is problematic for unilateral trans-tibial amputees. Accordingly, 'ankle' devices have been added to some dynamic-response feet. This study determined whether use of a microprocessor controlled passive-articulating hydraulic ankle-foot device improved the gait biomechanics of ramp descent in comparison to conventional ankle-foot mechanisms. Nine active unilateral trans-tibial amputees repeatedly walked down a 5° ramp, using a hydraulic ankle-foot with microprocessor active or inactive or using a comparable foot with rubber ball-joint (elastic) 'ankle' device. When inactive the hydraulic unit's resistances were those deemed to be optimum for level-ground walking, and when active, the plantar- and dorsi-flexion resistances switched to a ramp-descent mode. Residual limb kinematics, joints moments/powers and prosthetic foot power absorption/return were compared across ankle types using ANOVA. Foot-flat was attained fastest with the elastic foot and second fastest with the active hydraulic foot (P<0.001). Prosthetic shank single-support mean rotation velocity (p =0.006), and the flexion (P<0.001) and negative work done at the residual knee (P=0.08) were reduced, and negative work done by the ankle-foot increased (P<0.001) when using the active hydraulic compared to the other two ankle types. The greater negative 'ankle' work done when using the active hydraulic compared to other two ankle types, explains why there was a corresponding reduction in flexion and negative work at the residual knee. These findings suggest that use of a microprocessor controlled hydraulic foot will reduce the biomechanical compensations used to walk down slopes. Copyright © 2015 The Authors. Published by Elsevier Ltd.. All rights reserved.

Design of Water Temperature Control System Based on Single Chip Microcomputer

NASA Astrophysics Data System (ADS)

Tan, Hanhong; Yan, Qiyan

2017-12-01

In this paper, we mainly introduce a multi-function water temperature controller designed with 51 single-chip microcomputer. This controller has automatic and manual water, set the water temperature, real-time display of water and temperature and alarm function, and has a simple structure, high reliability, low cost. The current water temperature controller on the market basically use bimetal temperature control, temperature control accuracy is low, poor reliability, a single function. With the development of microelectronics technology, monolithic microprocessor function is increasing, the price is low, in all aspects of widely used. In the water temperature controller in the application of single-chip, with a simple design, high reliability, easy to expand the advantages of the function. Is based on the appeal background, so this paper focuses on the temperature controller in the intelligent control of the discussion.

Software and languages for microprocessors

NASA Astrophysics Data System (ADS)

Williams, David O.

1986-08-01

This paper forms the basis for lectures given at the 6th Summer School on Computing Techniques in Physics, organised by the Computational Physics group of the European Physics Society, and held at the Hotel Ski, Nové Město na Moravě, Czechoslovakia, on 17-26 September 1985. Various types of microprocessor applications are discussed and the main emphasis of the paper is devoted to 'embedded' systems, where the software development is not carried out on the target microprocessor. Some information is provided on the general characteristics of microprocessor hardware. Various types of microprocessor operating system are compared and contrasted. The selection of appropriate languages and software environments for use with microprocessors is discussed. Mechanisms for interworking between different languages, including reasonable error handling, are treated. The CERN developed cross-software suite for the Motorola 68000 family is described. Some remarks are made concerning program tools applicable to microprocessors. PILS, a Portable Interactive Language System, which can be interpreted or compiled for a range of microprocessors, is described in some detail, and the implementation techniques are discussed.

End-effector microprocessor

NASA Technical Reports Server (NTRS)

Doggett, William R.

1992-01-01

The topics are presented in viewgraph form and include: automated structures assembly facility current control hierarchy; automated structures assembly facility purposed control hierarchy; end-effector software state transition diagram; block diagram for ideal install composite; and conclusions.

Data transmission system with distributed microprocessors

DOEpatents

Nambu, Shigeo

1985-01-01

A data transmission system having a common request line and a special request line in addition to a transmission line. The special request line has priority over the common request line. A plurality of node stations are multi-drop connected to the transmission line. Among the node stations, a supervising station is connected to the special request line and takes precedence over other slave stations to become a master station. The master station collects data from the slave stations. The station connected to the common request line can assign a master control function to any station requesting to be assigned the master control function within a short period of time. Each station has an auto response control circuit. The master station automatically collects data by the auto response controlling circuit independently of the microprocessors of the slave stations.

Feasibility study of a microprocessor based oculometer system

NASA Technical Reports Server (NTRS)

Varanasi, M. R.

1981-01-01

The elimination of redundancy in data to maximize processing speed and minimize storage requirements were objectives in a feasibility study of a microprocessor based oculometer system that would be portable in size and flexible in use. The appropriate architectural design of the signal processor, improved optics, and the reduction of size, weight, and power to the system were investigated. A flow chart is presented showing the strategy of the design. The simulation for developing microroutines for the high speed algorithmic processor subsystem is discussed as well as the Karhunen-Loeve transform technique for data compression.

A methodology based on reduced complexity algorithm for system applications using microprocessors

NASA Technical Reports Server (NTRS)

Yan, T. Y.; Yao, K.

1988-01-01

The paper considers a methodology on the analysis and design of a minimum mean-square error criterion linear system incorporating a tapped delay line (TDL) where all the full-precision multiplications in the TDL are constrained to be powers of two. A linear equalizer based on the dispersive and additive noise channel is presented. This microprocessor implementation with optimized power of two TDL coefficients achieves a system performance comparable to the optimum linear equalization with full-precision multiplications for an input data rate of 300 baud.

Failure analysis on false call probe pins of microprocessor test equipment

NASA Astrophysics Data System (ADS)

Tang, L. W.; Ong, N. R.; Mohamad, I. S. B.; Alcain, J. B.; Retnasamy, V.

2017-09-01

A study has been conducted to investigate failure analysis on probe pins of test modules for microprocessor. The `health condition' of the probe pin is determined by the resistance value. A test module of 5V power supplied from Arduino UNO with "Four-wire Ohm measurement" method is implemented in this study to measure the resistance of the probe pins of a microprocessor. The probe pins from a scrapped computer motherboard is used as the test sample in this study. The functionality of the test module was validated with the pre-measurement experiment via VEE Pro software. Lastly, the experimental work have demonstrated that the implemented test module have the capability to identify the probe pin's `health condition' based on the measured resistance value.

European Scientific Notes. Volume 35, Number 12,

DTIC Science & Technology

1981-12-31

been redesigned to work A. Osorio, which was organized some 3 with the Intel 8085 microprocessor, it years ago and contains about half of the has the...operational set. attempt to derive a set of invariants MOISE is based on the Intel 8085A upon which virtually speaker-invariant microprocessor, and...FACILITY software interface; a Research Signal Processor (RSP) using reduced computational It has been IBM International’s complexity algorithms for

Microprocessor-based cardiotachometer

NASA Technical Reports Server (NTRS)

Crosier, W. G.; Donaldson, J. A.

1981-01-01

Instrument operates reliably even with stress-test electrocardiogram (ECG) signals subject to noise, baseline wandering, and amplitude change. It records heart rate from preamplified, single-lead ECG input signal and produces digital and analog heart-rate outputs which are fed elsewhere. Analog hardware processes ECG input signal, producing 10-ms pulse for each heartbeat. Microprocessor analyzes resulting pulse train, identifying irregular heartbeats and maintaining stable output during lead switching. Easily modified computer program provides analysis.

General, database-driven fast-feedback system for the Stanford Linear Collider

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rouse, F.; Allison, S.; Castillo, S.

A new feedback system has been developed for stabilizing the SLC beams at many locations. The feedback loops are designed to sample and correct at the 60 Hz repetition rate of the accelerator. Each loop can be distributed across several of the standard 80386 microprocessors which control the SLC hardware. A new communications system, KISNet, has been implemented to pass signals between the microprocessors at this rate. The software is written in a general fashion using the state space formalism of digital control theory. This allows a new loop to be implemented by just setting up the online database andmore » perhaps installing a communications link. 3 refs., 4 figs.« less

Microprocessor utilization in search and rescue missions

NASA Technical Reports Server (NTRS)

Schwartz, M.

1977-01-01

The feasibility of performing the same task in real time using microprocessor technology was determined. The least square algorithm was implemented on an Intel 8080 microprocessor. Results indicated that a microprocessor could easily match the IBM implementation in accuracy and be performed inside the time limitations set.

Microprocessors in U.S. Electrical Engineering Departments, 1974-1975.

ERIC Educational Resources Information Center

Sloan, M. E.

Drawn from a survey of engineering departments known to be teaching microprocessor courses, this paper shows that the adoption of microprocessors by Electrical Engineering Departments has been rapid compared with their adoption of minicomputers. The types of courses that are being taught can be categorized as: surveys of microprocessors, intensive…

76 FR 39895 - In the Matter of Certain Microprocessors, Components Thereof, and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-07

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-781] In the Matter of Certain Microprocessors... importation of certain microprocessors, components thereof, and products containing same by reason of... microprocessors, components thereof, and products containing same that infringe one or more of claims 11-16, 41...

Input/output models for general aviation piston-prop aircraft fuel economy

NASA Technical Reports Server (NTRS)

Sweet, L. M.

1982-01-01

A fuel efficient cruise performance model for general aviation piston engine airplane was tested. The following equations were made: (1) for the standard atmosphere; (2) airframe-propeller-atmosphere cruise performance; and (3) naturally aspirated engine cruise performance. Adjustments are made to the compact cruise performance model as follows: corrected quantities, corrected performance plots, algebraic equations, maximize R with or without constraints, and appears suitable for airborne microprocessor implementation. The following hardwares are recommended: ignition timing regulator, fuel-air mass ration controller, microprocessor, sensors and displays.

Assessment of transfemoral amputees using a passive microprocessor-controlled knee versus an active powered microprocessor-controlled knee for level walking.

PubMed

Creylman, Veerle; Knippels, Ingrid; Janssen, Paul; Biesbrouck, Evelyne; Lechler, Knut; Peeraer, Louis

2016-12-19

In transfemoral (TF) amputees, the forward propulsion of the prosthetic leg in swing has to be mainly carried out by hip muscles. With hip strength being the strongest predictor to ambulation ability, an active powered knee joint could have a positive influence, lowering hip loading and contributing to ambulation mobility. To assess this, gait of four TF amputees was measured for level walking, first while using a passive microprocessor-controlled prosthetic knee (P-MPK), subsequently while using an active powered microprocessor-controlled prosthetic knee (A-MPK). Furthermore, to assess long-term effects of the use of an A-MPK, a 4-weeks follow-up case study was performed. The kinetics and kinematics of the gait of four TF amputees were assessed while walking with subsequently the P-MPK and the A-MPK. For one amputee, a follow-up study was performed: he used the A-MPK for 4 weeks, his gait was measured weekly. The range of motion of the knee was higher on both the prosthetic and the sound leg in the A-MPK compared to the P-MPK. Maximum hip torque (HT) during early stance increased for the prosthetic leg and decreased for the sound leg with the A-MPK compared to the P-MPK. During late stance, the maximum HT decreased for the prosthetic leg. The difference between prosthetic and sound leg for HT disappeared when using the A-MPK. Also, an increase in stance phase duration was observed. The follow-up study showed an increase in confidence with the A-MPK over time. Results suggested that, partially due to an induced knee flexion during stance, HT can be diminished when walking with the A-MPK compared to the P-MPK. The single case follow-up study showed positive trends indicating that an adaptation time is beneficial for the A-MPK.

Microprocessor control and networking for the amps breadboard

NASA Technical Reports Server (NTRS)

Floyd, Stephen A.

1987-01-01

Future space missions will require more sophisticated power systems, implying higher costs and more extensive crew and ground support involvement. To decrease this human involvement, as well as to protect and most efficiently utilize this important resource, NASA has undertaken major efforts to promote progress in the design and development of autonomously managed power systems. Two areas being actively pursued are autonomous power system (APS) breadboards and knowledge-based expert system (KBES) applications. The former are viewed as a requirement for the timely development of the latter. Not only will they serve as final testbeds for the various KBES applications, but will play a major role in the knowledge engineering phase of their development. The current power system breadboard designs are of a distributed microprocessor nature. The distributed nature, plus the need to connect various external computer capabilities (i.e., conventional host computers and symbolic processors), places major emphasis on effective networking. The communications and networking technologies for the first power system breadboard/test facility are described.

Development of single cell protectors for sealed silver-zinc cells, phase 1

NASA Technical Reports Server (NTRS)

Imamura, M. S.; Donovan, R. L.; Lear, J. W.; Murray, B.

1976-01-01

A single cell protector (SCP) assembly capable of protecting a single silver-zinc (Ag Zn) battery cell was designed, fabricated, and tested. The SCP provides cell-level protection against overcharge and overdischarge by a bypass circuit. The bypass circuit consists of a magnetic-latching relay that is controlled by the high and low-voltage limit comparators. Although designed specifically for secondary Ag-Zn cells, the SCP is flexible enough to be adapted to other rechargeable cells. Eighteen SCPs were used in life testing of an 18-cell battery. The cells were sealed Ag-Zn system with inorganic separators. For comparison, another 18-cell battery was subjected to identical life test conditions, but with battery-level protection rather than cell-level. An alternative approach to the SCP design in the form of a microprocessor-based system was conceptually designed. The comparison of SCP and microprocessor approaches is also presented and a preferred approach for Ag-Zn battery protection is discussed.

Digital control of diode laser for atmospheric spectroscopy

NASA Technical Reports Server (NTRS)

Menzies, R. T.; Rutledge, C. W. (Inventor)

1985-01-01

A system is described for remote absorption spectroscopy of trace species using a diode laser tunable over a useful spectral region of 50 to 200 cm(-1) by control of diode laser temperature over range from 15 K to 100 K, and tunable over a smaller region of typically 0.1 to 10 cm(-1) by control of the diode laser current over a range from 0 to 2 amps. Diode laser temperature and current set points are transmitted to the instrument in digital form and stored in memory for retrieval under control of a microprocessor during measurements. The laser diode current is determined by a digital to analog converter through a field effect transistor for a high degree of ambient temperature stability, while the laser diode temperature is determined by set points entered into a digital to analog converter under control of the microprocessor. Temperature of the laser diode is sensed by a sensor diode to provide negative feedback to the temperature control circuit that responds to the temperature control digital to analog converter.

Programmable control means for providing safe and controlled medication infusion

NASA Technical Reports Server (NTRS)

Fischell, Robert E. (Inventor)

1988-01-01

An implantable programmable infusion pump (IPIP) is disclosed and generally includes: a fluid reservoir filled with selected medication; a pump for causing a precise volumetric dosage of medication to be withdrawn from the reservoir and delivered to the appropriate site within the body; and, a control means for actuating the pump in a safe and programmable manner. The control means includes a microprocessor, a permanent memory containing a series of fixed software instructions, and a memory for storing prescription schedules, dosage limits and other data. The microprocessor actuates the pump in accordance with programmable prescription parameters and dosage limits stored in the memory. A communication link allows the control means to be remotely programmed. The control means incorporates a running integral dosage limit and other safety features which prevent an inadvertent or intentional medication overdose. The control means also monitors the pump and fluid handling system and provides an alert if any improper or potentially unsafe operation is detected.

Development of digital flow control system for multi-channel variable-rate sprayers

USDA-ARS?s Scientific Manuscript database

Precision modulation of nozzle flow rates is a critical step for variable-rate spray applications in orchards and ornamental nurseries. An automatic flow rate control system activated with microprocessors and pulse width modulation (PWM) controlled solenoid valves was developed to control flow rates...

Small Private Key PKS on an Embedded Microprocessor

PubMed Central

Seo, Hwajeong; Kim, Jihyun; Choi, Jongseok; Park, Taehwan; Liu, Zhe; Kim, Howon

2014-01-01

Multivariate quadratic ( ) cryptography requires the use of long public and private keys to ensure a sufficient security level, but this is not favorable to embedded systems, which have limited system resources. Recently, various approaches to cryptography using reduced public keys have been studied. As a result of this, at CHES2011 (Cryptographic Hardware and Embedded Systems, 2011), a small public key scheme, was proposed, and its feasible implementation on an embedded microprocessor was reported at CHES2012. However, the implementation of a small private key scheme was not reported. For efficient implementation, random number generators can contribute to reduce the key size, but the cost of using a random number generator is much more complex than computing on modern microprocessors. Therefore, no feasible results have been reported on embedded microprocessors. In this paper, we propose a feasible implementation on embedded microprocessors for a small private key scheme using a pseudo-random number generator and hash function based on a block-cipher exploiting a hardware Advanced Encryption Standard (AES) accelerator. To speed up the performance, we apply various implementation methods, including parallel computation, on-the-fly computation, optimized logarithm representation, vinegar monomials and assembly programming. The proposed method reduces the private key size by about 99.9% and boosts signature generation and verification by 5.78% and 12.19% than previous results in CHES2012. PMID:24651722

Small private key MQPKS on an embedded microprocessor.

PubMed

Seo, Hwajeong; Kim, Jihyun; Choi, Jongseok; Park, Taehwan; Liu, Zhe; Kim, Howon

2014-03-19

Multivariate quadratic (MQ) cryptography requires the use of long public and private keys to ensure a sufficient security level, but this is not favorable to embedded systems, which have limited system resources. Recently, various approaches to MQ cryptography using reduced public keys have been studied. As a result of this, at CHES2011 (Cryptographic Hardware and Embedded Systems, 2011), a small public key MQ scheme, was proposed, and its feasible implementation on an embedded microprocessor was reported at CHES2012. However, the implementation of a small private key MQ scheme was not reported. For efficient implementation, random number generators can contribute to reduce the key size, but the cost of using a random number generator is much more complex than computing MQ on modern microprocessors. Therefore, no feasible results have been reported on embedded microprocessors. In this paper, we propose a feasible implementation on embedded microprocessors for a small private key MQ scheme using a pseudo-random number generator and hash function based on a block-cipher exploiting a hardware Advanced Encryption Standard (AES) accelerator. To speed up the performance, we apply various implementation methods, including parallel computation, on-the-fly computation, optimized logarithm representation, vinegar monomials and assembly programming. The proposed method reduces the private key size by about 99.9% and boosts signature generation and verification by 5.78% and 12.19% than previous results in CHES2012.

Optical attenuation mechanism upgrades, MOBLAS, and TLRS systems

NASA Technical Reports Server (NTRS)

Eichinger, Richard; Johnson, Toni; Malitson, Paul; Oldham, Thomas; Stewart, Loyal

1993-01-01

This poster presentation describes the Optical Attenuation Mechanism (OAM) Upgrades to the MOBLAS and TLRS Crustal Dynamics Satellite Laser Ranging (CDSLR) systems. The upgrades were for the purposes of preparing these systems to laser range to the TOPEX/POSEIDON spacecraft when it will be launched in the summer of 1992. The OAM permits the laser receiver to operate over the expected large signal dynamic range from TOPEX/POSEIDON and it reduces the number of pre- and post-calibrations for each satellite during multi-satellite tracking operations. It further simplifies the calibration bias corrections that had been made due to the pass-to-pass variation of the photomultiplier supply voltage and the transmit filter glass thickness. The upgrade incorporated improvements to the optical alignment capability of each CDSLR system through the addition of a CCD camera into the MOBLAS receive telescope and an alignment telescope onto the TLRS optical table. The OAM is stepper motor and microprocessor based; and the system can be controlled either manually by a control switch panel or computer controlled via an EIA RS-232C serial interface. The OAM has a neutral density (ND) range of 0.0 to 4.0 and the positioning is absolute referenced in steps of 0.1 ND. Both the fixed transmit filter and the daylight filter are solenoid actuated with digital inputs and outputs to and from the OAM microprocessor. During automated operation, the operator has the option to overide the remote control and control the OAM system via a local control switch panel.

Progress on advanced dc and ac induction drives for electric vehicles

NASA Technical Reports Server (NTRS)

Schwartz, H. J.

1982-01-01

Progress is reported in the development of complete electric vehicle propulsion systems, and the results of tests on the Road Load Simulator of two such systems representative of advanced dc and ac drive technology are presented. One is the system used in the DOE's ETV-1 integrated test vehicle which consists of a shunt wound dc traction motor under microprocessor control using a transistorized controller. The motor drives the vehicle through a fixed ratio transmission. The second system uses an ac induction motor controlled by transistorized pulse width modulated inverter which drives through a two speed automatically shifted transmission. The inverter and transmission both operate under the control of a microprocessor. The characteristics of these systems are also compared with the propulsion system technology available in vehicles being manufactured at the inception of the DOE program and with an advanced, highly integrated propulsion system upon which technology development was recently initiated.

Real-time fetal ECG system design using embedded microprocessors

NASA Astrophysics Data System (ADS)

Meyer-Baese, Uwe; Muddu, Harikrishna; Schinhaerl, Sebastian; Kumm, Martin; Zipf, Peter

2016-05-01

The emphasis of this project lies in the development and evaluation of new robust and high fidelity fetal electrocardiogram (FECG) systems to determine the fetal heart rate (FHR). Recently several powerful algorithms have been suggested to improve the FECG fidelity. Until now it is unknown if these algorithms allow a real-time processing, can be used in mobile systems (low power), and which algorithm produces the best error rate for a given system configuration. In this work we have developed high performance, low power microprocessor-based biomedical systems that allow a fair comparison of proposed, state-of-the-art FECG algorithms. We will evaluate different soft-core microprocessors and compare these solutions to other commercial off-the-shelf (COTS) hardcore solutions in terms of price, size, power, and speed.

A microprocessor based on a two-dimensional semiconductor

PubMed Central

Wachter, Stefan; Polyushkin, Dmitry K.; Bethge, Ole; Mueller, Thomas

2017-01-01

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III–V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor—molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material. PMID:28398336

Comparison between the C-leg microprocessor-controlled prosthetic knee and non-microprocessor control prosthetic knees: a preliminary study of energy expenditure, obstacle course performance, and quality of life survey.

PubMed

Seymour, Ron; Engbretson, Brenda; Kott, Karen; Ordway, Nathaniel; Brooks, Gary; Crannell, Jessica; Hickernell, Elise; Wheeler, Katie

2007-03-01

This study investigated energy expenditure and obstacle course negotiation between the C-leg and various non-microprocessor control (NMC) prosthetic knees and compared a quality of life survey (SF-36v2) of use of the C-leg to national norms. Thirteen subjects with unilateral limb loss (12 with trans-femoral and one with a knee disarticulation amputation) participated in the study. The mean age was 46 years, range 30-75. Energy expenditure using both the NMC and C-leg prostheses was measured at self-selected typical and fast walking paces on a motorized treadmill. Subjects were also asked to walk through a standardized walking obstacle course carrying a 4.5 kg (10 lb) basket and with hands free. Finally, the SF-36v2 was completed for subjects while using the C-leg. Statistically significant differences were found in oxygen consumption between prostheses at both typical and fast paces with the C-leg showing decreased values. Use of the C-leg resulted in a statistically significant decrease in the number of steps and time to complete the obstacle course. Scores on a quality of life index for subjects using the C-leg were above the mean for norms for limitation in the use of an arm or leg, equal to the mean for the general United States population for the physical component score and were above this mean for the mental component score. Based on oxygen consumption and obstacle course findings, the C-leg when compared to the NMC prostheses may provide increased functional mobility and ease of performance in the home and community environment. Questionnaire results suggest a minimal quality of life impairment when using a C-leg for this cohort of individuals with amputation.

Control Techtronics International

DOE Office of Scientific and Technical Information (OSTI.GOV)

West, J.

1995-12-31

Polish graded coal can be burned in existing stoker boilers and meet the 1998 Air Quality standard. This is accomplished with the Control Techtronics microprocessor-based combustion controller accurately and repeatedly: (a) matching the combustion air to the coal firing rate, with continuous stack sensor feedback; (b) continuously varying the boiler`s firing rate based on output water temperature or steam pressure; (c) continuously varying the exhaust fan`s speed to maintain minimum negative pressure in the boiler`s combustion chamber; and recirculating a portion of the flue gas, at varying amounts throughout the boiler`s firing rate. Systems for five boilers have been installedmore » and are operating on MPEC`s Balicka plant in Krakow. Control Techtronics International has $10 million of U.S. Export-Import Bank funds available for similar projects throughout Poland.« less

Practical application to composite materials of a portable digital ultrasound device controlled by a microprocessor

NASA Astrophysics Data System (ADS)

Castel, J. G.; Husarek, V.

1987-06-01

The usefulness of a portable microprocessor-controlled ultrasound device for the periodic assessment of aircraft parts made of composite materials is shown. The performance of the device is demonstrated with the examples of a metallic honeycomb with a carbon-fiber skin, a phenolic honeycomb with a carbon skin, and a phenolic honeycomb with a Kevlar skin. Also considered are assessments of homogeneous carbon-fiber parts, including the study of artificial defects consisting of 1-2 mm diameter holes, and the assessment of the behavior of a carbon-titanium interface with separated zones. Advantages of the device include ease of adjustment, automated evaluation of the depth of defects, and the nearly-absolute reproducibility of adjustments.

Microeconomics of advanced process window control for 50-nm gates

NASA Astrophysics Data System (ADS)

Monahan, Kevin M.; Chen, Xuemei; Falessi, Georges; Garvin, Craig; Hankinson, Matt; Lev, Amir; Levy, Ady; Slessor, Michael D.

2002-07-01

Fundamentally, advanced process control enables accelerated design-rule reduction, but simple microeconomic models that directly link the effects of advanced process control to profitability are rare or non-existent. In this work, we derive these links using a simplified model for the rate of profit generated by the semiconductor manufacturing process. We use it to explain why and how microprocessor manufacturers strive to avoid commoditization by producing only the number of dies required to satisfy the time-varying demand in each performance segment. This strategy is realized using the tactic known as speed binning, the deliberate creation of an unnatural distribution of microprocessor performance that varies according to market demand. We show that the ability of APC to achieve these economic objectives may be limited by variability in the larger manufacturing context, including measurement delays and process window variation.

Intermittent/transient faults in digital systems

NASA Technical Reports Server (NTRS)

Masson, G. M.; Glazer, R. E.

1982-01-01

Containment set techniques are applied to 8085 microprocessor controllers so as to transform a typical control system into a slightly modified version, shown to be crashproof: after the departure of the intermittent/transient fault, return to one proper control algorithm is assured, assuming no permanent faults occur.

Development of 3 and 5kW Fuel Cell Power Plants

DTIC Science & Technology

1985-12-12

automotive type air -cooled (cross-flow) copper heat exchanger (Figure 7.7) was used for water reclamation. A 48V, 0.5A brushless DC blower was used to...and the balance is combusted in ’a burner to supply heat required for the endothermic reforming process. The phosphoric acid fuel cell stack is air ...the use of inter- changeable power conditioners . A microprocessor based con- troller provides event sequencing and system. control during startup

Distributed Micro-Processor Applications to Guidance and Control Systems.

DTIC Science & Technology

1982-07-01

nanoseconds compared with 22 milliseconds for the older type of NMOS non-volatile RAM. This non-volatile RAM is estimated to hold its memory for 100 years...illustrated in figure 1.4.3.3 and compared with the traditional permalog chevron bubble structure. The contiguous element bubble structure is being developed ...M for its 8086 based Digital Advanced Avionics System (DAAS) developed for NASA Ames, but rejected it as being unsuitable. Ada is the new DoD

Two examples of intelligent systems based on smart materials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Unsworth, J.

1994-12-31

Two intelligent systems are described which are based on smart materials. The operation of the systems also rely on conventional well known technologies such as electronics, signal conditioning, signal processing, microprocessors and engineering design. However without the smart materials the development and integration into the intelligent systems would not have been possible. System 1 is a partial discharge monitor for on-line continuous checking of the condition of electrical power transformers. The ultrasonic and radio frequency detectors in this system rely on special piezoelectric composite integrated with a compact annular metal ring. Partial discharges set up ultrasonic and radio frequency signalsmore » which are received by the integrated detectors. The signals are amplified, conditioned, signal processed, the time interval between the two signals measured and the level of partial discharge activity averaged and assessed for numerous pairs and alarms triggered on remote control panels if the level is dangerous. The system has the capability of initiating automatic shutdown of the transformer once it is linked into the control computers of the electrical power authority. System 2 is called a Security Cradle and is an intelligent 3D shield designed to use the properties of electro active polymers to prevent hardware hackers from stealing valuable of sensitive information from memory devices (e.g., EPROMS) housed in computer or microprocessor installations.« less

Application of fuzzy logic to the control of wind tunnel settling chamber temperature

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; Humphreys, Gregory L.

1994-01-01

The application of Fuzzy Logic Controllers (FLC's) to the control of nonlinear processes, typically controlled by a human operator, is a topic of much study. Recent application of a microprocessor-based FLC to the control of temperature processes in several wind tunnels has proven to be very successful. The control of temperature processes in the wind tunnels requires the ability to monitor temperature feedback from several points and to accommodate varying operating conditions in the wind tunnels. The FLC has an intuitive and easily configurable structure which incorporates the flexibility required to have such an ability. The design and implementation of the FLC is presented along with process data from the wind tunnels under automatic control.

Microprocessor prosthetic knees.

PubMed

Berry, Dale

2006-02-01

This article traces the development of microprocessor prosthetic knees from early research in the 1970s to the present. Read about how microprocessor knees work, functional options, patient selection, and the future of this prosthetic.

15 CFR 744.17 - Restrictions on certain exports and reexports of general purpose microprocessors for “military...

Code of Federal Regulations, 2013 CFR

2013-01-01

... reexports of general purpose microprocessors for âmilitary end-usesâ and to âmilitary end-users.â 744.17... microprocessors for “military end-uses” and to “military end-users.” (a) General prohibition. In addition to the... reexport commodities described in ECCN 3A991.a.1 on the CCL (“microprocessor microcircuits”, “microcomputer...

15 CFR 744.17 - Restrictions on certain exports and reexports of general purpose microprocessors for “military...

Code of Federal Regulations, 2010 CFR

2010-01-01

... reexports of general purpose microprocessors for âmilitary end-usesâ and to âmilitary end-users.â 744.17... microprocessors for “military end-uses” and to “military end-users.” (a) General prohibition. In addition to the... reexport commodities described in ECCN 3A991.a.1 on the CCL (“microprocessor microcircuits”, “microcomputer...

15 CFR 744.17 - Restrictions on certain exports and reexports of general purpose microprocessors for ‘military...

Code of Federal Regulations, 2014 CFR

2014-01-01

... reexports of general purpose microprocessors for âmilitary end usesâ and to âmilitary end usersâ. 744.17... microprocessors for ‘military end uses’ and to ‘military end users’. (a) General prohibition. In addition to the... reexport commodities described in ECCN 3A991.a.1 on the CCL (“microprocessor microcircuits”, “microcomputer...

15 CFR 744.17 - Restrictions on certain exports and reexports of general purpose microprocessors for “military...

Code of Federal Regulations, 2012 CFR

2012-01-01

... reexports of general purpose microprocessors for âmilitary end-usesâ and to âmilitary end-users.â 744.17... microprocessors for “military end-uses” and to “military end-users.” (a) General prohibition. In addition to the... reexport commodities described in ECCN 3A991.a.1 on the CCL (“microprocessor microcircuits”, “microcomputer...

15 CFR 744.17 - Restrictions on certain exports and reexports of general purpose microprocessors for “military...

Code of Federal Regulations, 2011 CFR

2011-01-01

... reexports of general purpose microprocessors for âmilitary end-usesâ and to âmilitary end-users.â 744.17... microprocessors for “military end-uses” and to “military end-users.” (a) General prohibition. In addition to the... reexport commodities described in ECCN 3A991.a.1 on the CCL (“microprocessor microcircuits”, “microcomputer...

Multi-sensor Array for High Altitude Balloon Missions to the Stratosphere

NASA Astrophysics Data System (ADS)

Davis, Tim; McClurg, Bryce; Sohl, John

2008-10-01

We have designed and built a microprocessor controlled and expandable multi-sensor array for data collection on near space missions. Weber State University has started a high altitude research balloon program called HARBOR. This array has been designed to data log a base set of measurements for every flight and has room for six guest instruments. The base measurements are absolute pressure, on-board temperature, 3-axis accelerometer for attitude measurement, and 2-axis compensated magnetic compass. The system also contains a real time clock and circuitry for logging data directly to a USB memory stick. In typical operation the measurements will be cycled through in sequence and saved to the memory stick along with the clock's time stamp. The microprocessor can be reprogrammed to adapt to guest experiments with either analog or digital interfacing. This system will fly with every mission and will provide backup data collection for other instrumentation for which the primary task is measuring atmospheric pressure and temperature. The attitude data will be used to determine the orientation of the onboard camera systems to aid in identifying features in the images. This will make these images easier to use for any future GIS (geographic information system) remote sensing missions.

Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing

PubMed Central

Bravo, Ignacio; Baliñas, Javier; Gardel, Alfredo; Lázaro, José L.; Espinosa, Felipe; García, Jorge

2011-01-01

This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely. PMID:22163739

An electronic flow control system for a variable-rate tree sprayer

USDA-ARS?s Scientific Manuscript database

Precise modulation of nozzle flow rates is a critical measure to achieve variable-rate spray applications. An electronic flow rate control system accommodating with microprocessors and pulse width modulation (PWM) controlled solenoid valves was designed to manipulate the output of spray nozzles inde...

Intelligent lightening system of urban and rural road traffic based on pyroelectric infrared detector

NASA Astrophysics Data System (ADS)

Miao, Man-Xiang

2007-12-01

By using the photo-voltage characteristics of pyroelectric infrared detector to fulfill signal acquisition, the detecting signal is processed with the core of a single chip microprocessor AT89C51. AT89C51 controls the CAN bus controller SJA1000/transceiver 82C250 to structure CAN bus communication system to transmit data through serial interface MAX232 connected with PC. The intelligent lightening system of urban and rural road traffic was carried out. In this paper, its construction and part's methods of hardware and software design were introduced in detail.

A microprocessor based anti-aliasing filter for a PCM system

NASA Technical Reports Server (NTRS)

Morrow, D. C.; Sandlin, D. R.

1984-01-01

Described is the design and evaluation of a microprocessor based digital filter. The filter was made to investigate the feasibility of a digital replacement for the analog pre-sampling filters used in telemetry systems at the NASA Ames-Dryden Flight Research Facility (DFRF). The digital filter will utilize an Intel 2920 Analog Signal Processor (ASP) chip. Testing includes measurements of: (1) the filter frequency response and, (2) the filter signal resolution. The evaluation of the digital filter was made on the basis of circuit size, projected environmental stability and filter resolution. The 2920 based digital filter was found to meet or exceed the pre-sampling filter specifications for limited signal resolution applications.

Generic interpreters and microprocessor verification

NASA Technical Reports Server (NTRS)

Windley, Phillip J.

1990-01-01

The following topics are covered in viewgraph form: (1) generic interpreters; (2) Viper microprocessors; (3) microprocessor verification; (4) determining correctness; (5) hierarchical decomposition; (6) interpreter theory; (7) AVM-1; (8) phase-level specification; and future work.

Computer Technology: State of the Art.

ERIC Educational Resources Information Center

Withington, Frederic G.

1981-01-01

Describes the nature of modern general-purpose computer systems, including hardware, semiconductor electronics, microprocessors, computer architecture, input output technology, and system control programs. Seven suggested readings are cited. (FM)

JPRS Report, Science & Technology, China, High-Performance Computer Systems

DTIC Science & Technology

1992-10-28

microprocessor array The microprocessor array in the AP85 system is com- posed of 16 completely identical array element micro - processors . Each array element...microprocessors and capable of host machine reading and writing. The memory capacity of the array element micro - processors as a whole can be expanded...transmission functions to carry out data transmission from array element micro - processor to array element microprocessor, from array element

ONR Workshop on Magnetohydrodynamic Submarine Propulsion (2nd), Held in San Diego, California on November 16-17, 1989

DTIC Science & Technology

1990-07-01

electrohtic dissociation of the electrode mate- pedo applications seem to be still somewhat rial, and to provide a good gas evolution wlhich out of the...rod cathode. A unique feature of this preliminary experiment was the use of a prototype gated, intensified video camera. This camera is based on a...microprocessor controlled microchannel plate intensifier tube. The intensifier tube image is focused on a standard CCD video camera so that the object

Microprocessor tester for the treat upgrade reactor trip system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lenkszus, F.R.; Bucher, R.G.

1984-01-01

The upgrading of the Transient Reactor Test (TREAT) Facility at ANL-Idaho has been designed to provide additional experimental capabilities for the study of core disruptive accident (CDA) phenomena. In addition, a programmable Automated Reactor Control System (ARCS) will permit high-power transients up to 11,000 MW having a controlled reactor period of from 15 to 0.1 sec. These modifications to the core neutronics will improve simulation of LMFBR accident conditions. Finally, a sophisticated, multiply-redundant safety system, the Reactor Trip System (RTS), will provide safe operation for both steady state and transient production operating modes. To insure that this complex safety systemmore » is functioning properly, a Dedicated Microprocessor Tester (DMT) has been implemented to perform a thorough checkout of the RTS prior to all TREAT operations.« less

Fast computational scheme of image compression for 32-bit microprocessors

NASA Technical Reports Server (NTRS)

Kasperovich, Leonid

1994-01-01

This paper presents a new computational scheme of image compression based on the discrete cosine transform (DCT), underlying JPEG and MPEG International Standards. The algorithm for the 2-d DCT computation uses integer operations (register shifts and additions / subtractions only); its computational complexity is about 8 additions per image pixel. As a meaningful example of an on-board image compression application we consider the software implementation of the algorithm for the Mars Rover (Marsokhod, in Russian) imaging system being developed as a part of Mars-96 International Space Project. It's shown that fast software solution for 32-bit microprocessors may compete with the DCT-based image compression hardware.

Microprocessor Airborne Data Acquisition & Replay (MADAR) System,

DTIC Science & Technology

1984-03-01

Time Record 7. TAPE USAGE 28 7.1 Geseral2 7.2 Tape Time Remanfng lbdocator 28 7.3 Tape Record Capacity 30 . 8. MODULE CONSTRUCTION 30 8.1 Gemeral...general purpose quick-fit type, calibrated for use with a range of different aircraft. The concept was modified such that the microprocessor module was not...dedicated to boom usage but a versatile instrument for other applications. The microprocessor module (Fig. 1) became known as the Microprocessor

Fiber Optic Strain Measurements In Filament-Wound Graphite-Epoxy Tubes Containing Embedded Fibers

NASA Astrophysics Data System (ADS)

Rogowski, R. S.; Heyman, J. S.; Holben, M. S.; Egalon, C.; Dehart, D. W.; Doederlein, T.; Koury, J.

1989-01-01

Several planned United States Air Force (USAF) and National Aeronautics and Space Administration (NASA) space systems such as Space Based Radar (SBR), Space Based Laser (SBL), and Space Station, pose serious vibration and control issues. Their low system mass combined with their large size, precision pointing/shape control and rapid retargetting requirements, will result in an unprecedented degree of interaction between the system controller and the modes of vibration of the structure. The resulting structural vibrations and/or those caused by foreign objects impacting the space structure could seriously degrade system performance, making it virtually impossible for passive structural systems to perform their missions. Therefore an active vibration control system which will sense these natural and spurious vibrations, evaluate them and dampen them out is required. This active vibration control system must be impervious to the space environment and electromagnetic interference, have very low weight, and in essence become part of the structure itself. The concept of smart structures meets these criteria. Smart structures is defined as the embedment of sensors, actuators, and possibly microprocessors in the material which forms the structure, a concept that is particularly applicable to advanced composites. These sensors, actuators, and microprocessors will work interactively to sense, evaluate, and dampen those vibrations which pose a threat to large flexible space systems (LSS). The sensors will also be capable of sensing any degradation to the structure. The Air Force Astronautics Laboratory (AFAL) has been working in the area of dynamics and control of LSS for the past five years. Several programs involving both contractual and in-house efforts to develop sensors and actuators for controlling LSS have been initiated. Presently the AFAL is developing a large scale laboratory which will have the capacity of performing large angle retargetting manuevers and vibration analysis on LSS. Advanced composite materials have been fabricated for the last seven years, consisting mostly of rocket components such as: nozzles, payload shrouds, exit cones, and nose cones. Recently, however, AFAL has been fabricating composite components such as trusses, tubes and flat panels for space applications. Research on fiber optic sensors at NASA Langley Research Center (NASA LaRC) dates back to 1979. Recently an optical phase locked loop (OPLL) has been developed that can be used to make strain and temperature measurements. Static and dynamic strain measurements have been demonstrated using this device.' To address future space requirements, AFAL and NASA have initiated a program to design, fabricate, and experimentally test composite struts and panels with embedded sensors, actuators, and microprocessors that can be used to control vibration and motion in space structures.

Microprocessor controlled anodic stripping voltameter for trace metals analysis in tap water

DOE Office of Scientific and Technical Information (OSTI.GOV)

Clem, R.G.; Park, F.W.; Kirsten, F.A.

1981-04-01

The construction and use of a portable, microprocessor controlled anodic stripping voltameter for on-site simultaneous metal analysis of copper, lead and cadmium in tap water is discussed. The instrumental system is comprised of a programmable controller which permits keying in analytical parameters such as sparge time and plating time; a rotating cell for efficient oxygen removal and amalgam formation; and, a magnetic tape which can be used for data storage. Analysis time can be as short as 10 to 15 minutes. The stripping analysis is based on a pre-measurement step during which the metals from a water sample are concentratedmore » into a thin mercury film by deposition from an acetate solution of pH 4.5. The concentrated metals are then electrochemically dissolved from the film by application of a linearly increasing anodic potential. Typical peak-shaped curves are obtained. The heights of these curves are related to the concentration of metals in the water by calibration data. Results of tap water analysis showed 3 +- 1 ..mu..g/L lead, 22 +- 0.3 ..mu..g/L copper, and less than 0.2 ..mu..g/L cadmium for a Berkeley, California tap water, and 1 to 1000 ..mu..g/L Cu, 1 to 2 ..mu..g/L Pb for ten samples of Seattle, Washington tap water. Recommendations are given for a next generation instrument system.« less

Provably secure time distribution for the electric grid

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith IV, Amos M; Evans, Philip G; Williams, Brian P

We demonstrate a quantum time distribution (QTD) method that combines the precision of optical timing techniques with the integrity of quantum key distribution (QKD). Critical infrastructure is dependent on microprocessor- and programmable logic-based monitoring and control systems. The distribution of timing information across the electric grid is accomplished by GPS signals which are known to be vulnerable to spoofing. We demonstrate a method for synchronizing remote clocks based on the arrival time of photons in a modifed QKD system. This has the advantage that the signal can be veried by examining the quantum states of the photons similar to QKD.

The Fermilab Accelerator control system

NASA Astrophysics Data System (ADS)

Bogert, Dixon

1986-06-01

With the advent of the Tevatron, considerable upgrades have been made to the controls of all the Fermilab Accelerators. The current system is based on making as large an amount of data as possible available to many operators or end-users. Specifically there are about 100 000 separate readings, settings, and status and control registers in the various machines, all of which can be accessed by seventeen consoles, some in the Main Control Room and others distributed throughout the complex. A "Host" computer network of approximately eighteen PDP-11/34's, seven PDP-11/44's, and three VAX-11/785's supports a distributed data acquisition system including Lockheed MAC-16's left from the original Main Ring and Booster instrumentation and upwards of 1000 Z80, Z8002, and M68000 microprocessors in dozens of configurations. Interaction of the various parts of the system is via a central data base stored on the disk of one of the VAXes. The primary computer-hardware communication is via CAMAC for the new Tevatron and Antiproton Source; certain subsystems, among them vacuum, refrigeration, and quench protection, reside in the distributed microprocessors and communicate via GAS, an in-house protocol. An important hardware feature is an accurate clock system making a large number of encoded "events" in the accelerator supercycle available for both hardware modules and computers. System software features include the ability to save the current state of the machine or any subsystem and later restore it or compare it with the state at another time, a general logging facility to keep track of specific variables over long periods of time, detection of "exception conditions" and the posting of alarms, and a central filesharing capability in which files on VAX disks are available for access by any of the "Host" processors.

Effects of lower limb prosthesis on activity, participation, and quality of life: a systematic review.

PubMed

Samuelsson, Kersti A M; Töytäri, Outi; Salminen, Anna-Liisa; Brandt, Ase

2012-06-01

Effects presented on the use of assistive devices such as prosthesis are often based on laboratory findings (i.e. efficacy). To summarise and evaluate findings from studies on effectiveness of lower limb prostheses for adults in real life contexts, primarily in terms of activity, participation, and quality of life (QoL) and secondarily in terms of user satisfaction, use/non-use, and/or cost-effectiveness. Systematic review. We included controlled studies and non-controlled follow-up studies including both baseline and follow-up data. Using 14 different databases supplemented with manual searches, we searched for studies published from 1998 until June 2009. Out of an initial 818 identified publications, eight met the inclusion criteria. Four studies reported on the effectiveness of a microprocessor-controlled knee (MP-knee) compared to a non-microprocessor-controlled knee (NMP-knee). Results were inconsistent except for quality of life and use/non-use, where the authors reported an improvement with the MP-knee compared to the NMP-knee. The remaining four studies included a diversity of prosthetic intervention measures and types of endpoints. Overall, there was an inconsistency in results and study quality. This review highlights the need for high-quality research studies that reflect the effectiveness of different prosthesis interventions in terms of users' daily living and QoL. Clinical guidelines are important to every practitioner. Information on expected effectiveness from assistive devices should be well founded and contain both facts about the device quality and its contribution to users' daily lives. Thus, studies based on users' experiences from prosthetic use in everyday life activities are of great importance.

Single event effect testing of the Intel 80386 family and the 80486 microprocessor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moran, A.; LaBel, K.; Gates, M.

The authors present single event effect test results for the Intel 80386 microprocessor, the 80387 coprocessor, the 82380 peripheral device, and on the 80486 microprocessor. Both single event upset and latchup conditions were monitored.

Microprocessors and the Curriculum.

ERIC Educational Resources Information Center

Pasahow, Edward J.

1981-01-01

Presents three approaches to teaching the use of a microprocessor: (1) a "generic" device on paper; (2) a "conglomeration" device, surveying a number of real products; and (3) the "how" course which covers a small number of actual but related microprocessors. (CT)

Software resilience and the effectiveness of software mitigation in microcontrollers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather; Baker, Zachary; Fairbanks, Tom

Commercially available microprocessors could be useful to the space community for noncritical computations. There are many possible components that are smaller, lower-power, and less expensive than traditional radiation-hardened microprocessors. Many commercial microprocessors have issues with single-event effects (SEEs), such as single-event upsets (SEUs) and single-event transients (SETs), that can cause the microprocessor to calculate an incorrect result or crash. In this paper we present the Trikaya technique for masking SEUs and SETs through software mitigation techniques. Furthermore, test results show that this technique can be very effective at masking errors, making it possible to fly these microprocessors for a varietymore » of missions.« less

Software resilience and the effectiveness of software mitigation in microcontrollers

DOE PAGES

Quinn, Heather; Baker, Zachary; Fairbanks, Tom; ...

2015-12-01

Commercially available microprocessors could be useful to the space community for noncritical computations. There are many possible components that are smaller, lower-power, and less expensive than traditional radiation-hardened microprocessors. Many commercial microprocessors have issues with single-event effects (SEEs), such as single-event upsets (SEUs) and single-event transients (SETs), that can cause the microprocessor to calculate an incorrect result or crash. In this paper we present the Trikaya technique for masking SEUs and SETs through software mitigation techniques. Furthermore, test results show that this technique can be very effective at masking errors, making it possible to fly these microprocessors for a varietymore » of missions.« less

Acurex Parabolic Dish Concentrator (PDC-2)

NASA Technical Reports Server (NTRS)

Overly, P.; Bedard, R.

1982-01-01

The design approach, rationale for the selected configuration, and the development status of a cost effective point-focus solar concentrator are discussed. The low-cost concentrator reflective surface design is based on the use of a thin, backsilvered mirror glass reflector bonded to a molded structural plastic substrate. The foundation, support, and drive subassembles are described. A hybrid, two-axis, Sun tracking control system based on microprocessor technology was selected. Coarse synthetic tracking is achieved through a microcomputer-based control system to calculate Sun position for transient periods of cloud cover as well as sundown and sunrise positioning. Accurate active tracking is achieved by two-axis optical sensors. Results of the reflective panel demonstration tests investigating slope error, hail impact survivability, temperature/humidity cycling, longitudinal strength/bending stiffness, and torsional stiffness are discussed.

Development of land based radar polarimeter processor system

NASA Technical Reports Server (NTRS)

Kronke, C. W.; Blanchard, A. J.

1983-01-01

The processing subsystem of a land based radar polarimeter was designed and constructed. This subsystem is labeled the remote data acquisition and distribution system (RDADS). The radar polarimeter, an experimental remote sensor, incorporates the RDADS to control all operations of the sensor. The RDADS uses industrial standard components including an 8-bit microprocessor based single board computer, analog input/output boards, a dynamic random access memory board, and power supplis. A high-speed digital electronics board was specially designed and constructed to control range-gating for the radar. A complete system of software programs was developed to operate the RDADS. The software uses a powerful real time, multi-tasking, executive package as an operating system. The hardware and software used in the RDADS are detailed. Future system improvements are recommended.

PASCAL vs BASIC

ERIC Educational Resources Information Center

Mundie, David A.

1978-01-01

A comparison between PASCAL and BASIC as general purpose microprocessor languages rates PASCAL above BASIC in such points as program structure, data types, structuring methods, control structures, procedures and functions, and ease in learning. (CMV)

Comparative biomechanical analysis of current microprocessor-controlled prosthetic knee joints.

PubMed

Bellmann, Malte; Schmalz, Thomas; Blumentritt, Siegmar

2010-04-01

To investigate and identify functional differences of 4 microprocessor-controlled prosthetic knee joints (C-Leg, Hybrid Knee [also called Energy Knee], Rheo Knee, Adaptive 2). Tested situations were walking on level ground, on stairs and ramps; additionally, the fall prevention potentials for each design were examined. The measuring technology used included an optoelectronic camera system combined with 2 forceplates as well as a mobile spiroergometric system. The study was conducted in a gait laboratory. Subjects with unilateral transfemoral amputations (N=9; mobility grade, 3-4; age, 22-49y) were tested. Participants were fitted and tested with 4 different microprocessor-controlled knee joints. Static prosthetic alignment, time distance parameters, kinematic and kinetic data and metabolic energy consumption. Compared with the Hybrid Knee and the Adaptive 2, the C-Leg offers clear advantages in the provision of adequate swing phase flexion resistances and terminal extension damping during level walking at various speeds, especially at higher walking speeds. The Rheo Knee provides sufficient terminal extension; however, swing phase flexion resistances seem to be too low. The values for metabolic energy consumption show only slight differences during level walking. The joint resistances generated for descending stairs and ramps relieve the contralateral side to varying degrees. When walking on stairs, safety-relevant technical differences between the investigated joint types can be observed. Designs with adequate internal resistances offer stability advantages when the foot is positioned on the step. Stumble recovery tests reveal that the different knee joint designs vary in their effectiveness in preventing the patient from falling. The patient benefits provided by the investigated electronic prosthetic knee joints differ considerably. The C-Leg appears to offer the amputee greater functional and safety-related advantages than the other tested knee joints. Reduced loading of the contralateral side has been demonstrated during ramp and stair descent. Metabolic energy consumption does not vary significantly between the tested knees. Hence, this parameter seems not to be a suitable criterion for assessing microprocessor-controlled knee components. Copyright 2010 American Congress of Rehabilitation Medicine. Published by Elsevier Inc. All rights reserved.

Microprocessors in Systems Engineering at the U.S. Naval Academy.

ERIC Educational Resources Information Center

Mitchell, Eugene E., Ed.; Lowe, W. M., Ed.

1982-01-01

Describes the introduction of microprocessors into the Weapons and Systems Engineering Department at the U.S. Naval Academy, including planning decisions, implementation, procedures, uses of microprocessors in the department, and impact on the Systems Engineering major and curriculum. (SK)

Microprocessor Control For Liquid-Cooled Garment

NASA Technical Reports Server (NTRS)

Weaver, Charles S.

1990-01-01

Automatic control system maintains temperature of water-cooled garment within comfort zone while wearer's level of physical activity varies. Uncomfortable overshoots and undershoots of temperature eliminated. Designed for use in space suit, adaptable to other protective garments and to enclosed environments operating according to similar principles.

Embedded computer controlled premixing inline injection system for air-assisted variable-rate sprayers

USDA-ARS?s Scientific Manuscript database

Improvements to reduce chemical waste and environmental pollution for variable-rate sprayers used in orchards and ornamental nurseries require inline injection techniques. A microprocessor controlled premixing inline injection system implementing a ceramic piston chemical metering pump and two small...

BROADBAND DIGITAL GEOPHYSICAL TELEMETRY SYSTEM.

USGS Publications Warehouse

Seeley, Robert L.; Daniels, Jeffrey J.

1984-01-01

A system has been developed to simultaneously sample and transmit digital data from five remote geophysical data receiver stations to a control station that processes, displays, and stores the data. A microprocessor in each remote station receives commands from the control station over a single telemetry channel.

[Life support of the Mars exploration crew. Control of a zeolite system for carbon dioxide removal from space cabin air within a closed air regeneration cycle].

PubMed

Chekov, Iu F

2009-01-01

The author describes a zeolite system for carbon dioxide removal integrated into a closed air regeneration cycle aboard spacecraft. The continuous operation of a double-adsorbent regeneration system with pCO2-dependable productivity is maintained through programmable setting of adsorption (desorption) semicycle time. The optimal system regulation curve is presented within the space of statistical performance family obtained in quasi-steady operating modes with controlled parameters of the recurrent adsorption-desorption cycle. The automatically changing system productivity ensures continuous intake of concentrated CO2. Control of the adsorption-desorption process is based on calculation of the differential adsorption (desorption) heat from gradient of adsorbent and test inert substance temperatures. The adaptive algorithm of digital control is implemented through the standard spacecraft interface with the board computer system and programmable microprocessor-based controllers.

Infrared Sensor-Based Temperature Control for Domestic Induction Cooktops

PubMed Central

Lasobras, Javier; Alonso, Rafael; Carretero, Claudio; Carretero, Enrique; Imaz, Eduardo

2014-01-01

In this paper, a precise real-time temperature control system based on infrared (IR) thermometry for domestic induction cooking is presented. The temperature in the vessel constitutes the control variable of the closed-loop power control system implemented in a commercial induction cooker. A proportional-integral controller is applied to establish the output power level in order to reach the target temperature. An optical system and a signal conditioning circuit have been implemented. For the signal processing a microprocessor with 12-bit ADC and a sampling rate of 1 Ksps has been used. The analysis of the contributions to the infrared radiation permits the definition of a procedure to estimate the temperature of the vessel with a maximum temperature error of 5 °C in the range between 60 and 250 °C for a known cookware emissivity. A simple and necessary calibration procedure with a black-body sample is presented. PMID:24638125

Infrared sensor-based temperature control for domestic induction cooktops.

PubMed

Lasobras, Javier; Alonso, Rafael; Carretero, Claudio; Carretero, Enrique; Imaz, Eduardo

2014-03-14

In this paper, a precise real-time temperature control system based on infrared (IR) thermometry for domestic induction cooking is presented. The temperature in the vessel constitutes the control variable of the closed-loop power control system implemented in a commercial induction cooker. A proportional-integral controller is applied to establish the output power level in order to reach the target temperature. An optical system and a signal conditioning circuit have been implemented. For the signal processing a microprocessor with 12-bit ADC and a sampling rate of 1 Ksps has been used. The analysis of the contributions to the infrared radiation permits the definition of a procedure to estimate the temperature of the vessel with a maximum temperature error of 5 °C in the range between 60 and 250 °C for a known cookware emissivity. A simple and necessary calibration procedure with a black-body sample is presented.

Method and apparatus for determining position using global positioning satellites

NASA Technical Reports Server (NTRS)

Ward, John (Inventor); Ward, William S. (Inventor)

1998-01-01

A global positioning satellite receiver having an antenna for receiving a L1 signal from a satellite. The L1 signal is processed by a preamplifier stage including a band pass filter and a low noise amplifier and output as a radio frequency (RF) signal. A mixer receives and de-spreads the RF signal in response to a pseudo-random noise code, i.e., Gold code, generated by an internal pseudo-random noise code generator. A microprocessor enters a code tracking loop, such that during the code tracking loop, it addresses the pseudo-random code generator to cause the pseudo-random code generator to sequentially output pseudo-random codes corresponding to satellite codes used to spread the L1 signal, until correlation occurs. When an output of the mixer is indicative of the occurrence of correlation between the RF signal and the generated pseudo-random codes, the microprocessor enters an operational state which slows the receiver code sequence to stay locked with the satellite code sequence. The output of the mixer is provided to a detector which, in turn, controls certain routines of the microprocessor. The microprocessor will output pseudo range information according to an interrupt routine in response detection of correlation. The pseudo range information is to be telemetered to a ground station which determines the position of the global positioning satellite receiver.

Portable control device for networked mobile robots

DOEpatents

Feddema, John T.; Byrne, Raymond H.; Bryan, Jon R.; Harrington, John J.; Gladwell, T. Scott

2002-01-01

A handheld control device provides a way for controlling one or multiple mobile robotic vehicles by incorporating a handheld computer with a radio board. The device and software use a personal data organizer as the handheld computer with an additional microprocessor and communication device on a radio board for use in controlling one robot or multiple networked robots.

Description of a dual fail operational redundant strapdown inertial measurement unit for integrated avionics systems research

NASA Technical Reports Server (NTRS)

Bryant, W. H.; Morrell, F. R.

1981-01-01

An experimental redundant strapdown inertial measurement unit (RSDIMU) is developed as a link to satisfy safety and reliability considerations in the integrated avionics concept. The unit includes four two degree-of-freedom tuned rotor gyros, and four accelerometers in a skewed and separable semioctahedral array. These sensors are coupled to four microprocessors which compensate sensor errors. These microprocessors are interfaced with two flight computers which process failure detection, isolation, redundancy management, and general flight control/navigation algorithms. Since the RSDIMU is a developmental unit, it is imperative that the flight computers provide special visibility and facility in algorithm modification.

Stepping motor controller

DOEpatents

Bourret, S.C.; Swansen, J.E.

1982-07-02

A stepping motor is microprocessor controlled by digital circuitry which monitors the output of a shaft encoder adjustably secured to the stepping motor and generates a subsequent stepping pulse only after the preceding step has occurred and a fixed delay has expired. The fixed delay is variable on a real-time basis to provide for smooth and controlled deceleration.

Universal control and measuring system for modern classic and amorphous magnetic materials single/on-line strip testers

NASA Astrophysics Data System (ADS)

Zemánek, Ivan; Havlíček, Václav

2006-09-01

A new universal control and measuring system for classic and amorphous soft magnetic materials single/on-line strip testing has been developed at the Czech Technical University in Prague. The measuring system allows to measure magnetization characteristic and specific power losses of different tested materials (strips) at AC magnetization of arbitrary magnetic flux density waveform at wide range of frequencies 20 Hz-20 kHz. The measuring system can be used for both single strip testing in laboratories and on-line strip testing during the production process. The measuring system is controlled by two-stage master-slave control system consisting of the external PC (master) completed by three special A/D measuring plug-in boards, and local executing control unit (slave) with one-chip microprocessor 8051, connected with PC by the RS232 serial line. The "user friendly" powerful control software implemented on the PC and the effective program code for the microprocessor give possibility for full automatic measurement with high measuring power and high measuring accuracy.

Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip

NASA Technical Reports Server (NTRS)

Carson, John C. (Inventor); Indin, Ronald J. (Inventor); Shanken, Stuart N. (Inventor)

1994-01-01

A computer module is disclosed in which a stack of glued together IC memory chips is structurally integrated with a microprocessor chip. The memory provided by the stack is dedicated to the microprocessor chip. The microprocessor and its memory stack may be connected either by glue and/or by solder bumps. The solder bumps can perform three functions--electrical interconnection, mechanical connection, and heat transfer. The electrical connections in some versions are provided by wire bonding.

High-speed microprocessor characterization. Final report/project accomplishments summary, CRADA Number KCP-94-1004

DOE Office of Scientific and Technical Information (OSTI.GOV)

Brown, L.W.

The objective of the project was to characterize and document the critical operating parameters of an 0.8-micron, 350-MHz, 32-bit microprocessor prototype. The roles of FM and T and the participant company were: FM and T -- evaluation performance of the prototype 32-bit microprocessor using the IDS5000 and Tektronix S3260 Integrated Circuit Test System; Corda -- design and build the prototype microprocessor. This project was terminated with nearly all of the planned activities unaddressed.

Computer Series, 107.

ERIC Educational Resources Information Center

Birk, James P., Ed.

1989-01-01

Presented is a simple laboratory set-up for teaching microprocessor-controlled data acquisition as a part of an instrumental analysis course. Discussed are the experimental set-up, experimental procedures, and technical considerations for this technique. (CW)

Architecture and data processing alternatives for Tse computer. Volume 1: Tse logic design concepts and the development of image processing machine architectures

NASA Technical Reports Server (NTRS)

Rickard, D. A.; Bodenheimer, R. E.

1976-01-01

Digital computer components which perform two dimensional array logic operations (Tse logic) on binary data arrays are described. The properties of Golay transforms which make them useful in image processing are reviewed, and several architectures for Golay transform processors are presented with emphasis on the skeletonizing algorithm. Conventional logic control units developed for the Golay transform processors are described. One is a unique microprogrammable control unit that uses a microprocessor to control the Tse computer. The remaining control units are based on programmable logic arrays. Performance criteria are established and utilized to compare the various Golay transform machines developed. A critique of Tse logic is presented, and recommendations for additional research are included.

The design and implementation of the Technical Facilities Controller (TFC) for the Goldstone deep space communications complex

NASA Technical Reports Server (NTRS)

Killian, D. A.; Menninger, F. J.; Gorman, T.; Glenn, P.

1988-01-01

The Technical Facilities Controller is a microprocessor-based energy management system that is to be implemented in the Deep Space Network facilities. This system is used in conjunction with facilities equipment at each of the complexes in the operation and maintenance of air-conditioning equipment, power generation equipment, power distribution equipment, and other primary facilities equipment. The implementation of the Technical Facilities Controller was completed at the Goldstone Deep Space Communications Complex and is now operational. The installation completed at the Goldstone Complex is described and the utilization of the Technical Facilities Controller is evaluated. The findings will be used in the decision to implement a similar system at the overseas complexes at Canberra, Australia, and Madrid, Spain.

SEMG-controlled telephone interface for people with disabilities.

PubMed

Chen, Yu-Luen; Lai, Jin-Shin; Luh, Jer-Junn; Kuo, Te-Son

2002-01-01

This paper proposes the development of a surface electromyographic (SEMG)-controlled telephone interface for the disabled. The system is composed of three major components: (1) a SEMG receiving/signal-processing module; (2) a row-column scanning interface for the telephone dialling pad; and (3) a main controller, the Intel-8951 microprocessor. The design concept was based on the idea of using a SEMG generated by the disabled and converting it into a trigger pulse. This could allow convenient control of the dialing motion in the row-column scanning keys of a telephone dialling pad. People with disabilities are competent for certain kinds of work such as being a telephone operator. The increase of opportunities to perform a job for the disabled would help them live independently.

Instruction-Level Characterization of Scientific Computing Applications Using Hardware Performance Counters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Luo, Y.; Cameron, K.W.

1998-11-24

Workload characterization has been proven an essential tool to architecture design and performance evaluation in both scientific and commercial computing areas. Traditional workload characterization techniques include FLOPS rate, cache miss ratios, CPI (cycles per instruction or IPC, instructions per cycle) etc. With the complexity of sophisticated modern superscalar microprocessors, these traditional characterization techniques are not powerful enough to pinpoint the performance bottleneck of an application on a specific microprocessor. They are also incapable of immediately demonstrating the potential performance benefit of any architectural or functional improvement in a new processor design. To solve these problems, many people rely on simulators,more » which have substantial constraints especially on large-scale scientific computing applications. This paper presents a new technique of characterizing applications at the instruction level using hardware performance counters. It has the advantage of collecting instruction-level characteristics in a few runs virtually without overhead or slowdown. A variety of instruction counts can be utilized to calculate some average abstract workload parameters corresponding to microprocessor pipelines or functional units. Based on the microprocessor architectural constraints and these calculated abstract parameters, the architectural performance bottleneck for a specific application can be estimated. In particular, the analysis results can provide some insight to the problem that only a small percentage of processor peak performance can be achieved even for many very cache-friendly codes. Meanwhile, the bottleneck estimation can provide suggestions about viable architectural/functional improvement for certain workloads. Eventually, these abstract parameters can lead to the creation of an analytical microprocessor pipeline model and memory hierarchy model.« less

Application of Fault-Tolerant Computing For Spacecraft Using Commercial-Off-The-Shelf Microprocessors

DTIC Science & Technology

2000-06-01

real - time operating system and design of a human-computer interface (HCI) for a triple modular redundant (TMR) fault-tolerant microprocessor for use in space-based applications. Once disadvantage of using COTS hardware components is their susceptibility to the radiation effects present in the space environment. and specifically, radiation-induced single-event upsets (SEUs). In the event of an SEU, a fault-tolerant system can mitigate the effects of the upset and continue to process from the last known correct system state. The TMR basic hardware

Control Structures for VSC-based FACTS Devices under Normal and Faulted AC-systems

NASA Astrophysics Data System (ADS)

Babaei, Saman

This thesis is concerned with improving the Flexible AC Transmission Systems (FACTS) devices performance under the normal and fault AC-system conditions by proposing new control structures and also converter topologies. The combination of the increasing electricity demand and restrictions in expanding the power system infrastructures has urged the utility owners to deploy the utility-scaled power electronics in the power system. Basically, FACTS is referred to the application of the power electronics in the power systems. Voltage Source Converter (VSC) is the preferred building block of the FACTS devices and many other utility-scale power electronics applications. Despite of advances in the semiconductor technology and ultra-fast microprocessor based controllers, there are still many issues to address and room to improve[25]. An attempt is made in this thesis to address these important issues of the VSC-based FACTS devices and provide solutions to improve them.

Microprocessor Seminar, phase 2

NASA Technical Reports Server (NTRS)

Scott, W. R.

1977-01-01

Workshop sessions and papers were devoted to various aspects of microprocessor and large scale integrated circuit technology. Presentations were made on advanced LSI developments for high reliability military and NASA applications. Microprocessor testing techniques were discussed, and test data were presented. High reliability procurement specifications were also discussed.

Microprocessor controlled portable TLD system

NASA Technical Reports Server (NTRS)

Apathy, I.; Deme, S.; Feher, I.

1996-01-01

An up-to-date microprocessor controlled thermoluminescence dosemeter (TLD) system for environmental and space dose measurements has been developed. The earlier version of the portable TLD system, Pille, was successfully used on Soviet orbital stations as well as on the US Space Shuttle, and for environmental monitoring. The new portable TLD system, Pille'95, consists of a reader and TL bulb dosemeters, and each dosemeter is provided with an EEPROM chip for automatic identification. The glow curve data are digitised and analysed by the program of the reader. The measured data and the identification number appear on the LED display of the reader. Up to several thousand measured data together with the glow curves can be stored on a removable flash memory card. The whole system is supplied either from built-in rechargeable batteries or from the mains of the space station.

Comparison between microprocessor-controlled ankle/foot and conventional prosthetic feet during stair negotiation in people with unilateral transtibial amputation.

PubMed

Agrawal, Vibhor; Gailey, Robert S; Gaunaurd, Ignacio A; O'Toole, Christopher; Finnieston, Adam A

2013-01-01

Contrary to stance-phase dorsiflexion of conventional prosthetic feet, the microprocessor-controlled Proprio foot permits swing-phase dorsiflexion on stairs. The purpose of this study was to compare Symmetry in External Work (SEW) between a microprocessor-controlled foot and conventional prosthetic feet in two groups with unilateral transtibial amputation (Medicare Functional Classification Levels K-Level-2 and K-Level-3) during stair ascent and descent. Ten subjects were evaluated while wearing three conventional prosthetic feet- solid ankle cushion heel (SACH), stationary attachment flexible endoskeleton (SAFE), and Talux-and the Proprio foot using a study socket and were given a 10- to 14-day accommodation period with each foot. Ground reaction forces were collected using F-scan sensors during stair ascent and descent. The SEW between the intact and amputated limbs was calculated for each foot. During stair ascent, the Proprio foot resulted in a higher interlimb symmetry than conventional prosthetic feet, with significant differences between the Pro prio and SACH/SAFE feet. The swing-phase dorsiflexion appeared to promote greater interlimb symmetry because it facilitated forward motion of the body, resulting in a heel-to-toe center of pressure trajectory. During stair descent, all feet had low symmetry without significant differences between feet. The movement strategy used when descending stairs, which is to roll over the edge of a step, had a greater influence on symmetry than the dorsiflexion features of prosthetic feet.

uSOP: A Microprocessor-Based Service-Oriented Platform for Control and Monitoring

NASA Astrophysics Data System (ADS)

Aloisio, Alberto; Ameli, Fabrizio; Anastasio, Antonio; Branchini, Paolo; Di Capua, Francesco; Giordano, Raffaele; Izzo, Vincenzo; Tortone, Gennaro

2017-06-01

uSOP is a general purpose single-board computer designed for deep embedded applications in control and monitoring of detectors, sensors, and complex laboratory equipment. In this paper, we present and discuss the main aspects of the hardware and software designs and the expandable peripheral architecture built around serial busses. We show the tests done with state-of-the-art ΔΣ 24-b ADC acquisition modules, in order to assess the achievable noise floor in a typical application. Eventually, we report on the deployment of uSOP in the monitoring system framework of the Belle2 experiment, presently under construction at the KEK Laboratory (Tsukuba, Japan).

Programming for energy monitoring/display system in multicolor lidar system research

NASA Technical Reports Server (NTRS)

Alvarado, R. C., Jr.; Allen, R. J.

1982-01-01

The Z80 microprocessor based computer program that directs and controls the operation of the six channel energy monitoring/display system that is a part of the NASA Multipurpose Airborne Differential Absorption Lidar (DIAL) system is described. The program is written in the Z80 assembly language and is located on EPROM memories. All source and assembled listings of the main program, five subroutines, and two service routines along with flow charts and memory maps are included. A combinational block diagram shows the interfacing (including port addresses) between the six power sensors, displays, front panel controls, the main general purpose minicomputer, and this dedicated microcomputer system.

Operation of commercially-based microcomputer technology in a space radiation environment

NASA Astrophysics Data System (ADS)

Yelverton, J. N.

This paper focuses on detection and recovery techniques that should enable the reliable operation of commercially-based microprocessor technology in the harsh radiation environment of space and at high altitudes. This approach is especially significant in light of the current shift in emphasis (due to cost) from space hardened Class-S parts qualification to a more direct use of commercial parts. The method should offset some of the concern that the newer high density state-of-the-art RISC and CISC microprocessors can be used in future space applications. Also, commercial aviation, should benefit, since radiation induced transients are a new issue arising from the increased quantities of microcomputers used in aircraft avionics.

A Low Cost Matching Motion Estimation Sensor Based on the NIOS II Microprocessor

PubMed Central

González, Diego; Botella, Guillermo; Meyer-Baese, Uwe; García, Carlos; Sanz, Concepción; Prieto-Matías, Manuel; Tirado, Francisco

2012-01-01

This work presents the implementation of a matching-based motion estimation sensor on a Field Programmable Gate Array (FPGA) and NIOS II microprocessor applying a C to Hardware (C2H) acceleration paradigm. The design, which involves several matching algorithms, is mapped using Very Large Scale Integration (VLSI) technology. These algorithms, as well as the hardware implementation, are presented here together with an extensive analysis of the resources needed and the throughput obtained. The developed low-cost system is practical for real-time throughput and reduced power consumption and is useful in robotic applications, such as tracking, navigation using an unmanned vehicle, or as part of a more complex system. PMID:23201989

Control system for a vertical axis windmill

DOEpatents

Brulle, Robert V.

1983-10-18

A vertical axis windmill having a rotating structure is provided with a series of articulated vertical blades whose positions are controlled to maintain a constant RPM for the rotating structure, when wind speed is sufficient. A microprocessor controller is used to process information on wind speed, wind direction and RPM of the rotating structure to develop an electrical signal for establishing blade position. The preferred embodiment of the invention, when connected to a utility grid, is designed to generate 40 kilowatts of power when exposed to a 20 mile per hour wind. The control system for the windmill includes electrical blade actuators that modulate the blades of the rotating structure. Blade modulation controls the blade angle of attack, which in turn controls the RPM of the rotor. In the preferred embodiment, the microprocessor controller provides the operation logic and control functions. A wind speed sensor provides inputs to start or stop the windmill, and a wind direction sensor is used to keep the blade flip region at 90.degree. and 270.degree. to the wind. The control system is designed to maintain constant rotor RPM when wind speed is between 10 and 40 miles per hour.

Control system for a vertical-axis windmill

DOEpatents

Brulle, R.V.

1981-09-03

A vertical-axis windmill having a rotating structure is provided with a series of articulated vertical blades whose positions are controlled to maintain a constant RPM for the rotating structure, when wind speed is sufficient. A microprocessor controller is used to process information on wind speed, wind direction and RPM of the rotating structure to develop an electrical signal for establishing blade position. The preferred embodiment of the invention, when connected to a utility grid, is designed to generate 40 kilowatts of power when exposed to a 20 mile per hour wind. The control system for the windmill includes electrical blade actuators that modulate the blades of the rotating structure. Blade modulation controls the blade angle of attack, which in turn controls the RPM of the rotor. In the preferred embodiment, the microprocessor controller provides the operation logic and control functions. A wind speed sensor provides inputs to start or stop the windmill, and a wind direction sensor is used to keep the blade flip region at 90 and 270/sup 0/ to the wind. The control system is designed to maintain constant rotor RPM when wind speed is between 10 and 40 miles per hour.

The Stand-Alone Microprocessor System: A Valuable Tool in College Admissions and Recruitment.

ERIC Educational Resources Information Center

Garrett, Larry Neal

1983-01-01

The stand-alone microprocessor is seen as one innovative tool that can be used both in the organizational management of decline and in meeting specific organizational needs such as those of the admissions director and staff. The term "microprocessor" is defined. (MLW)

Microprocessors in the Curriculum and the Classroom.

ERIC Educational Resources Information Center

Summers, M. K.

1978-01-01

This article, directed at teachers concerned with computer science courses at sixth-form level with no prior knowledge of microprocessors, provides a basic introduction, and describes possible applications of a microprocessor development system as a teaching aid in computer sciences courses in UK secondary school. (Author/RAO)

78 FR 3449 - Certain Microprocessors, Components Thereof, and Products Containing Same; Request for Statements...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-01-16

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-781] Certain Microprocessors, Components Thereof, and Products Containing Same; Request for Statements on the Public Interest AGENCY: U.S... a limited exclusion order as to subject Intel microprocessors, but that implementation be delayed...

A functional comparison of conventional knee-ankle-foot orthoses and a microprocessor-controlled leg orthosis system based on biomechanical parameters.

PubMed

Schmalz, Thomas; Pröbsting, Eva; Auberger, Roland; Siewert, Gordon

2016-04-01

The microprocessor-controlled leg orthosis C-Brace enables patients with paretic or paralysed lower limb muscles to use dampened knee flexion under weight-bearing and speed-adapted control of the swing phase. The objective of the present study was to investigate the new technical functions of the C-Brace orthosis, based on biomechanical parameters. The study enrolled six patients. The C-Brace orthosis is compared with conventional leg orthoses (four stance control orthoses, two locked knee-ankle-foot orthoses) using biomechanical parameters of level walking, descending ramps and descending stairs. Ground reaction forces, joint moments and kinematic parameters were measured for level walking as well as ascending and descending ramps and stairs. With the C-Brace, a nearly natural stance phase knee flexion was measured during level walking (mean value 11° ± 5.6°). The maximum swing phase knee flexion angle of the C-Brace approached the normal value of 65° more closely than the stance control orthoses (66° ± 8.5° vs 74° ± 6.4°). No significant differences in the joint moments were found between the C-Brace and stance control orthosis conditions. In contrast to the conventional orthoses, all patients were able to ambulate ramps and stairs using a step-over-step technique with C-Brace (flexion angle 64.6° ± 8.2° and 70.5° ± 12.4°). The results show that the functions of the C-Brace for situation-dependent knee flexion under weight bearing have been used by patients with a high level of confidence. The functional benefits of the C-Brace in comparison with the conventional orthotic mechanisms could be demonstrated most clearly for descending ramps and stairs. The C-Brace orthosis is able to combine improved orthotic function with sustained orthotic safety. © The International Society for Prosthetics and Orthotics 2014.

Greenhouse irrigation control system design based on ZigBee and fuzzy PID technology

NASA Astrophysics Data System (ADS)

Zhou, Bing; Yang, Qiliang; Liu, Kenan; Li, Peiqing; Zhang, Jing; Wang, Qijian

In order to achieve the water demand information accurately detect of the greenhouse crop and its precision irrigation automatic control, this article has designed a set of the irrigated control system based on ZigBee and fuzzy PID technology, which composed by the soil water potential sensor, CC2530F256 wireless microprocessor, IAR Embedded Workbench software development platform. And the time of Irrigation as the output .while the amount of soil water potential and crop growth cycle as the input. The article depended on Greenhouse-grown Jatropha to verify the object, the results show that the system can irrigate timely and appropriately according to the soil water potential and water demend of the different stages of Jatropha growth , which basically meet the design requirements. Therefore, the system has broad application prospects in the amount of greenhouse crop of fine control irrigation.

Information Technologies for the 1980's: Lasers and Microprocessors.

ERIC Educational Resources Information Center

Mathews, William D.

This discussion of the development and application of lasers and microprocessors to information processing stresses laser communication in relation to capacity, reliability, and cost and the advantages of this technology to real-time information access and information storage. The increased capabilities of microprocessors are reviewed, and a…

Integrally regulated solar array demonstration using an Intel 8080 microprocessor

NASA Technical Reports Server (NTRS)

Petrik, E. J.

1977-01-01

A concept for regulating the voltage of a solar array by using a microprocessor to effect discrete voltage changes was demonstrated. Eight shorting switches were employed to regulate a simulated array at set-point voltages between 10,000 and 15,000 volts. The demonstration showed that the microprocessor easily regulated the solar array output voltage independently of whether or not the switched cell groups were binary sized in voltage. In addition, the microprocessor provided logic memory capability to perform additional tasks such as locating and insolating a faulty switch.

Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

NASA Technical Reports Server (NTRS)

Irom, Farokh; Farmanesh, Farhad; Kouba, Coy K.

2006-01-01

Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed.

Genomic analysis suggests that mRNA destabilization by the microprocessor is specialized for the auto-regulation of Dgcr8.

PubMed

Shenoy, Archana; Blelloch, Robert

2009-09-11

The Microprocessor, containing the RNA binding protein Dgcr8 and RNase III enzyme Drosha, is responsible for processing primary microRNAs to precursor microRNAs. The Microprocessor regulates its own levels by cleaving hairpins in the 5'UTR and coding region of the Dgcr8 mRNA, thereby destabilizing the mature transcript. To determine whether the Microprocessor has a broader role in directly regulating other coding mRNA levels, we integrated results from expression profiling and ultra high-throughput deep sequencing of small RNAs. Expression analysis of mRNAs in wild-type, Dgcr8 knockout, and Dicer knockout mouse embryonic stem (ES) cells uncovered mRNAs that were specifically upregulated in the Dgcr8 null background. A number of these transcripts had evolutionarily conserved predicted hairpin targets for the Microprocessor. However, analysis of deep sequencing data of 18 to 200nt small RNAs in mouse ES, HeLa, and HepG2 indicates that exonic sequence reads that map in a pattern consistent with Microprocessor activity are unique to Dgcr8. We conclude that the Microprocessor's role in directly destabilizing coding mRNAs is likely specifically targeted to Dgcr8 itself, suggesting a specialized cellular mechanism for gene auto-regulation.

Operational experience on the MP-200 series commercial wind turbine generators

NASA Technical Reports Server (NTRS)

Rose, M. B.

1982-01-01

The MP-200 wind turbine generator is described. The mechanical system, microprocessor controller, and display devices, are described. Also discussed are modifications to the prototype, operational experience, and MP-600 systems development.

Single-chip microprocessor that communicates directly using light

NASA Astrophysics Data System (ADS)

Sun, Chen; Wade, Mark T.; Lee, Yunsup; Orcutt, Jason S.; Alloatti, Luca; Georgas, Michael S.; Waterman, Andrew S.; Shainline, Jeffrey M.; Avizienis, Rimas R.; Lin, Sen; Moss, Benjamin R.; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H.; Cook, Henry M.; Ou, Albert J.; Leu, Jonathan C.; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J.; Popović, Miloš A.; Stojanović, Vladimir M.

2015-12-01

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

Single-chip microprocessor that communicates directly using light.

PubMed

Sun, Chen; Wade, Mark T; Lee, Yunsup; Orcutt, Jason S; Alloatti, Luca; Georgas, Michael S; Waterman, Andrew S; Shainline, Jeffrey M; Avizienis, Rimas R; Lin, Sen; Moss, Benjamin R; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H; Cook, Henry M; Ou, Albert J; Leu, Jonathan C; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J; Popović, Miloš A; Stojanović, Vladimir M

2015-12-24

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems--from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a 'zero-change' approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

Instrument for controlling the application of mechanical loads to biological and bicompatible test subjects

DOEpatents

Lintilhac, Phillip M.; Vesecky, Thompson B.

1995-01-01

Apparatus and methods are disclosed facilitating the application of forces and measurement of dimensions of a test subject. In one arrangement the test subject is coupled to a forcing frame and controlled forces applied thereto. Force applied to the test subject is measured and controlled. A dimensional characteristic of the test subject, such as growth, is measured by a linear variable differential transformer. The growth measurement data can be used to control the force applied. The transducer module receives force and dimensional data from the forcing frame. The transducer module is a separate, microprocessor-based unit that communicates the test data to a controller unit that controls the application of force to the test subject and receives the test data from the transducer module for force control, storage, and/or communication to the user.

Instrument for controlling the application of mechanical loads to biological and bicompatible test subjects

DOEpatents

Lintilhac, P.M.; Vesecky, T.B.

1995-09-19

An apparatus and methods are disclosed facilitating the application of forces and measurement of dimensions of a test subject. In one arrangement the test subject is coupled to a forcing frame and controlled forces applied thereto. Force applied to the test subject is measured and controlled. A dimensional characteristic of the test subject, such as growth, is measured by a linear variable differential transformer. The growth measurement data can be used to control the force applied. The transducer module receives force and dimensional data from the forcing frame. The transducer module is a separate, microprocessor-based unit that communicates the test data to a controller unit that controls the application of force to the test subject and receives the test data from the transducer module for force control, storage, and/or communication to the user. 8 figs.

Performance capabilities of a JPL dual-arm advanced teleoperation system

NASA Technical Reports Server (NTRS)

Szakaly, Z. F.; Bejczy, A. K.

1991-01-01

The system comprises: (1) two PUMA 560 robot arms, each equipped with the latest JPL developed smart hands which contain 3-D force/moment and grasp force sensors; (2) two general purpose force reflecting hand controllers; (3) a NS32016 microprocessors based distributed computing system together with JPL developed universal motor controllers; (4) graphics display of sensor data; (5) capabilities for time delay experiments; and (6) automatic data recording capabilities. Several different types of control modes are implemented on this system using different feedback control techniques. Some of the control modes and the related feedback control techniques are described, and the achievable control performance for tracking position and force trajectories are reported. The interaction between position and force trajectory tracking is illustrated. The best performance is obtained by using a novel, task space error feedback technique.

Optimal regulation in systems with stochastic time sampling

NASA Technical Reports Server (NTRS)

Montgomery, R. C.; Lee, P. S.

1980-01-01

An optimal control theory that accounts for stochastic variable time sampling in a distributed microprocessor based flight control system is presented. The theory is developed by using a linear process model for the airplane dynamics and the information distribution process is modeled as a variable time increment process where, at the time that information is supplied to the control effectors, the control effectors know the time of the next information update only in a stochastic sense. An optimal control problem is formulated and solved for the control law that minimizes the expected value of a quadratic cost function. The optimal cost obtained with a variable time increment Markov information update process where the control effectors know only the past information update intervals and the Markov transition mechanism is almost identical to that obtained with a known and uniform information update interval.

Proceedings of the 1981 Army Numerical Analysis and Computers Conference, held U. S. Army Missile Command, Redstone Arsenal, Alabama, 26-27 February 1981

DTIC Science & Technology

1981-08-01

loaded Loading done Time= 1295 msec. SQRT(3) %I + 1 SQRT(3) %I - 1 SQRT(3) %I f 1 (D13) TX = 1---------+-1** x = C-l---+-------, x = - 1, x...thnrl its competitors. As is to be expected, the table makes cJc ;lr the benefits of subincrement ing for nny approximation. For example, usiny the...Acquisition Systems ( DACS ) and a Data Analysis System (DAN), The DACs will be microprocessor-based recording devices with software-control

Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Gaeke, Brian R.; Husbands, Parry; Li, Xiaoye S.; Oliker, Leonid; Yelick, Katherine A.; Biegel, Bryan (Technical Monitor)

2002-01-01

The increasing gap between processor and memory performance has lead to new architectural models for memory-intensive applications. In this paper, we explore the performance of a set of memory-intensive benchmarks and use them to compare the performance of conventional cache-based microprocessors to a mixed logic and DRAM processor called VIRAM. The benchmarks are based on problem statements, rather than specific implementations, and in each case we explore the fundamental hardware requirements of the problem, as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. The benchmarks are characterized by their memory access patterns, their basic control structures, and the ratio of computation to memory operation.

Design of Remote GPRS-based Gas Data Monitoring System

NASA Astrophysics Data System (ADS)

Yan, Xiyue; Yang, Jianhua; Lu, Wei

2018-01-01

In order to solve the problem of remote data transmission of gas flowmeter, and realize unattended operation on the spot, an unattended remote monitoring system based on GPRS for gas data is designed in this paper. The slave computer of this system adopts embedded microprocessor to read data of gas flowmeter through rs-232 bus and transfers it to the host computer through DTU. In the host computer, the VB program dynamically binds the Winsock control to receive and parse data. By using dynamic data exchange, the Kingview configuration software realizes history trend curve, real time trend curve, alarm, print, web browsing and other functions.

Digital system upset. The effects of simulated lightning-induced transients on a general-purpose microprocessor

NASA Technical Reports Server (NTRS)

Belcastro, C. M.

1983-01-01

Flight critical computer based control systems designed for advanced aircraft must exhibit ultrareliable performance in lightning charged environments. Digital system upset can occur as a result of lightning induced electrical transients, and a methodology was developed to test specific digital systems for upset susceptibility. Initial upset data indicates that there are several distinct upset modes and that the occurrence of upset is related to the relative synchronization of the transient input with the processing sate of the digital system. A large upset test data base will aid in the formulation and verification of analytical upset reliability modeling techniques which are being developed.

Packaging of a large capacity magnetic bubble domain spacecraft recorder

NASA Technical Reports Server (NTRS)

Becker, F. J.; Stermer, R. L.

1977-01-01

A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

1989 IEEE Aerospace Applications Conference, Breckenridge, CO, Feb. 12-17, 1989, Conference Digest

NASA Astrophysics Data System (ADS)

Recent advances in electronic devices for aerospace applications are discussed in reviews and reports. Topics addressed include large-aperture mm-wave antennas, a cross-array radiometer for spacecraft applications, a technique for computing the propagation characteristics of optical fibers, an analog light-wave system for improving microwave-telemetry data communication, and a ground demonstration of an orbital-debris radar. Consideration is given to a verifiable autonomous satellite control system, Inmarsat second-generation satellites for mobile communication, automated tools for data-base design and criteria for their selection, and a desk-top simulation work station based on the DSP96002 microprocessor chip.

Commercial Parts Radiation Testing

DTIC Science & Technology

2015-01-13

New Mexico’s COSMIAC Center performed radiation testing on a series of operational amplifiers, microcontrollers and microprocessor. The...commercial microcontroller and microprocessor equipment. The team would develop a list of the most promising commercial parts that might be utilized to...parts will include microprocessors, microcontrollers and memory modules. In addition, Field Programmable Gate Arrays (FPGAs) will also be chosen

Microprocessors: An Understandable Guide for the Classroom Teacher.

ERIC Educational Resources Information Center

Okinaka, Russell T.

A microprocessor constitutes the heart and soul of a personal computer. Indeed, the quality of a personal computer is determined largely by the type of microprocessor that is included within its circuitry. Since the microcomputer revolution began in the late 1970s, these special chips have gone through a series of improvements and modifications.…

Cellular functions of the microprocessor.

PubMed

Macias, Sara; Cordiner, Ross A; Cáceres, Javier F

2013-08-01

The microprocessor is a complex comprising the RNase III enzyme Drosha and the double-stranded RNA-binding protein DGCR8 (DiGeorge syndrome critical region 8 gene) that catalyses the nuclear step of miRNA (microRNA) biogenesis. DGCR8 recognizes the RNA substrate, whereas Drosha functions as an endonuclease. Recent global analyses of microprocessor and Dicer proteins have suggested novel functions for these components independent of their role in miRNA biogenesis. A HITS-CLIP (high-throughput sequencing of RNA isolated by cross-linking immunoprecipitation) experiment designed to identify novel substrates of the microprocessor revealed that this complex binds and regulates a large variety of cellular RNAs. The microprocessor-mediated cleavage of several classes of RNAs not only regulates transcript levels, but also modulates alternative splicing events, independently of miRNA function. Importantly, DGCR8 can also associate with other nucleases, suggesting the existence of alternative DGCR8 complexes that may regulate the fate of a subset of cellular RNAs. The aim of the present review is to provide an overview of the diverse functional roles of the microprocessor.

Neural network application to comprehensive engine diagnostics

NASA Technical Reports Server (NTRS)

Marko, Kenneth A.

1994-01-01

We have previously reported on the use of neural networks for detection and identification of faults in complex microprocessor controlled powertrain systems. The data analyzed in those studies consisted of the full spectrum of signals passing between the engine and the real-time microprocessor controller. The specific task of the classification system was to classify system operation as nominal or abnormal and to identify the fault present. The primary concern in earlier work was the identification of faults, in sensors or actuators in the powertrain system as it was exercised over its full operating range. The use of data from a variety of sources, each contributing some potentially useful information to the classification task, is commonly referred to as sensor fusion and typifies the type of problems successfully addressed using neural networks. In this work we explore the application of neural networks to a different diagnostic problem, the diagnosis of faults in newly manufactured engines and the utility of neural networks for process control.

The application of digital signal processing techniques to a teleoperator radar system

NASA Technical Reports Server (NTRS)

Pujol, A.

1982-01-01

A digital signal processing system was studied for the determination of the spectral frequency distribution of echo signals from a teleoperator radar system. The system consisted of a sample and hold circuit, an analog to digital converter, a digital filter, and a Fast Fourier Transform. The system is interfaced to a 16 bit microprocessor. The microprocessor is programmed to control the complete digital signal processing. The digital filtering and Fast Fourier Transform functions are implemented by a S2815 digital filter/utility peripheral chip and a S2814A Fast Fourier Transform chip. The S2815 initially simulates a low-pass Butterworth filter with later expansion to complete filter circuit (bandpass and highpass) synthesizing.

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Development of the Plant Growth Facility for Use in the Shuttle Middeck and Test Units for Ground-Based Experiments

NASA Technical Reports Server (NTRS)

Chapman, David K.; Wells, H. William

1996-01-01

The plant growth facility (PGF), currently under development as a Space Shuttle middeck facility for the support of research on higher plants in microgravity, is presented. The PGF provides controlled fluorescent lighting and the active control of temperature, relative humidity and CO2 concentration. These parameters are designed to be centrally controlled by a dedicated microprocessor. The status of the experiment can be displayed for onboard analysis, and will be automatically archived for post-flight analysis. The facility is designed to operate for 15 days and will provide air filtration to remove ethylene and trace organics with replaceable potassium permanganate filters. Similar ground units will be available for pre-flight experimentation.

Offset Printing Plate Quality Sensor on a Low-Cost Processor

PubMed Central

Poljak, Jelena; Botella, Guillermo; García, Carlos; Poljaček, Sanja Mahović; Prieto-Matías, Manuel; Tirado, Francisco

2013-01-01

The aim of this work is to develop a microprocessor-based sensor that measures the quality of the offset printing plate through the introduction of different image analysis applications. The main features of the presented system are the low cost, the low amount of power consumption, its modularity and easy integration with other industrial modules for printing plates, and its robustness against noise environments. For the sake of clarity, a viability analysis of previous software is presented through different strategies, based on dynamic histogram and Hough transform. This paper provides performance and scalability data compared with existing costly commercial devices. Furthermore, a general overview of quality control possibilities for printing plates is presented and could be useful to a system where such controls are regularly conducted. PMID:24284766

Power-gated 32 bit microprocessor with a power controller circuit activated by deep-sleep-mode instruction achieving ultra-low power operation

NASA Astrophysics Data System (ADS)

Koike, Hiroki; Ohsawa, Takashi; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2015-04-01

A spintronic-based power-gated micro-processing unit (MPU) is proposed. It includes a power control circuit activated by the newly supported power-off instruction for the deep-sleep mode. These means enable the power-off procedure for the MPU to be executed appropriately. A test chip was designed and fabricated using 90 nm CMOS and an additional 100 nm MTJ process; it was successfully operated. The guideline of the energy reduction effects for this MPU was presented, using the estimation based on the measurement results of the test chip. The result shows that a large operation energy reduction of 1/28 can be achieved when the operation duty is 10%, under the condition of a sufficient number of idle clock cycles.

A microprocessor based high speed packet switch for satellite communications

NASA Technical Reports Server (NTRS)

Arozullah, M.; Crist, S. C.

1980-01-01

The architectures of a single processor, a three processor, and a multiple processor system are described. The hardware circuits, and software routines required for implementing the three and multiple processor designs are presented. A bit-slice microprocessor was designed and microprogrammed. Maximum throughput was calculated for all three designs. Queue theoretic models for these three designs were developed and utilized to obtain analytical expressions for the average waiting times, overall average response times and average queue sizes. From these expressions, graphs were obtained showing the effect on the system performance of a number of design parameters.

Stand-alone development system using a KIM-1 microcomputer module

NASA Technical Reports Server (NTRS)

Nickum, J. D.

1978-01-01

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Evolution of a standard microprocessor-based space computer

NASA Technical Reports Server (NTRS)

Fernandez, M.

1980-01-01

An existing in inventory computer hardware/software package (B-1 RFS/ECM) was repackaged and applied to multiple missile/space programs. Concurrent with the application efforts, low risk modifications were made to the computer from program to program to take advantage of newer, advanced technology and to meet increasingly more demanding requirements (computational and memory capabilities, longer life, and fault tolerant autonomy). It is concluded that microprocessors hold promise in a number of critical areas for future space computer applications. However, the benefits of the DoD VHSIC Program are required and the old proliferation problem must be revised.

Differences in knee flexion between the Genium and C-Leg microprocessor knees while walking on level ground and ramps.

PubMed

Lura, Derek J; Wernke, Matthew M; Carey, Stephanie L; Kahle, Jason T; Miro, Rebecca M; Highsmith, M Jason

2015-02-01

Microprocessor knees have improved the gait and functional abilities of persons with transfemoral amputation. The Genium prosthetic knee offers an advanced sensor and control system designed to decrease impairment by: allowing greater stance phase flexion, easing transitions between gait phases, and compensating for changes in terrain. The aim of this study was to determine differences between the knee flexion angle of persons using the Genium knee, the C-Leg knee, and non-amputee controls; and to evaluate the impact the prostheses on gait and level of impairment of the user. This study used a randomized experimental crossover of persons with transfemoral amputation using the Genium and C-Leg microprocessor knees (n=25), with an observational sample of non-amputee controls (n=5). Gait analysis by 3D motion tracking of subjects ambulating at different speeds on level ground and on 5° and 10° ramps was completed. Use of the Genium resulted in a significant increase in peak knee flexion for swing (5°, p<0.01, d=0.34) and stance (2°, p<0.01, d=0.19) phases relative to C-Leg use. There was a high degree of variability between subjects, and significant differences still remain between the Genium group and the control group's knee flexion angles for most speeds and slopes. The Genium knee generally increases flexion in swing and stance, potentially decreasing the level of impairment for persons with transfemoral amputation. This study demonstrates functional differences between the C-Leg and Genium knees to help prosthetists determine if the Genium will provide functional benefits to individual patients. Copyright © 2014 Elsevier Ltd. All rights reserved.

Integrated control strategy for autonomous decentralized conveyance systems based on distributed MEMS arrays

NASA Astrophysics Data System (ADS)

Zhou, Lingfei; Chapuis, Yves-Andre; Blonde, Jean-Philippe; Bervillier, Herve; Fukuta, Yamato; Fujita, Hiroyuki

2004-07-01

In this paper, the authors proposed to study a model and a control strategy of a two-dimensional conveyance system based on the principles of the Autonomous Decentralized Microsystems (ADM). The microconveyance system is based on distributed cooperative MEMS actuators which can produce a force field onto the surface of the device to grip and move a micro-object. The modeling approach proposed here is based on a simple model of a microconveyance system which is represented by a 5 x 5 matrix of cells. Each cell is consisted of a microactuator, a microsensor, and a microprocessor to provide actuation, autonomy and decentralized intelligence to the cell. Thus, each cell is able to identify a micro-object crossing on it and to decide by oneself the appropriate control strategy to convey the micro-object to its destination target. The control strategy could be established through five simple decision rules that the cell itself has to respect at each calculate cycle time. Simulation and FPGA implementation results are given in the end of the paper in order to validate model and control approach of the microconveyance system.

Rapidly quantifying the relative distention of a human bladder

NASA Technical Reports Server (NTRS)

Companion, John A. (Inventor); Heyman, Joseph S. (Inventor); Mineo, Beth A. (Inventor); Cavalier, Albert R. (Inventor); Blalock, Travis N. (Inventor)

1989-01-01

A device and method of rapidly quantifying the relative distention of the bladder in a human subject are disclosed. The ultrasonic transducer which is positioned on the subject in proximity to the bladder is excited by a pulser under the command of a microprocessor to launch an acoustic wave into the patient. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer, when it is received, amplified and processed by the receiver. The resulting signal is digitized by an analog-to-digital converter under the command of the microprocessor and is stored in the data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy; and based on programmed scientific measurements and individual, anatomical, and behavioral characterists of the specific subject as contained in the program memory, sends out a signal to turn on any or all of the audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm.

High Accuracy Investigation of Microwave Absorption in Polymer Electrical Components on Motherboard of Computers

NASA Astrophysics Data System (ADS)

Dašić, P.; Hutanu, C.; Jevremović, V.; Dobra, R.; Risteiu, M.; Ileana, I.

2017-06-01

Electronic operating at high frequencies can have problems with emission of high frequency noise. Once put inside an enclosure, the energy will add in phase at certain frequencies to cause resonances which will hinder the performance of the device. These absorbers are based upon open celled foam impregnated with a carbon coating. It is quite possible that in the near future, microprocessors would be to work on a frequency located in 5 to 10 GHz. In these circumstances it is useful to know how and how much of the electromagnetic field emitted by a microprocessor, it is absorbed by the circuit elements in the immediate vicinity of the microprocessor. The aim of this contribution is to demonstrate throughout high-level experimental analysis how the main electric parameters of polymer materials, which build the printed circuits and the one of electric capacitors and resistors, depend on the frequencies on which they work from the microwave range.

Microprocessor-based multichannel flutter monitor using dynamic strain gage signals

NASA Technical Reports Server (NTRS)

Smalley, R. R.

1976-01-01

Two microprocessor-based multichannel monitors for monitoring strain gage signals during aerodynamic instability (flutter) testing in production type turbojet engines were described. One system monitors strain gage signals in the time domain and gives an output indication whenever the signal amplitude of any gage exceeds a pre-set alarm or abort level for that particular gage. The second system monitors the strain gage signals in the frequency domain and therefore is able to use both the amplitude and frequency information. Thus, an alarm signal is given whenever the spectral content of the strain gage signal exceeds, at any point, its corresponding amplitude vs. frequency limit profiles. Each system design is described with details on design trade-offs, hardware, software, and operating experience.

Sled Control and Safety System

NASA Technical Reports Server (NTRS)

Forrest, L. J.

1982-01-01

Computerized system for controlling motion of linear-track accelerator applied to other automated equipment, such as numerically-controlled machine tools and robot manipulators on assembly lines. System controls motions of sled with sine-wave signal created digitally by microprocessor. Dynamic parameters of sled motion are monitored so sled may be stopped safely if malfunction occurs. Sled is capable of sinusoidal accelerations up to 0.5 g with 125-kg load.

Autonomous vehicle navigation utilizing fuzzy controls concepts for a next generation wheelchair.

PubMed

Hansen, J D; Barrett, S F; Wright, C H G; Wilcox, M

2008-01-01

Three different positioning techniques were investigated to create an autonomous vehicle that could accurately navigate towards a goal: Global Positioning System (GPS), compass dead reckoning, and Ackerman steering. Each technique utilized a fuzzy logic controller that maneuvered a four-wheel car towards a target. The reliability and the accuracy of the navigation methods were investigated by modeling the algorithms in software and implementing them in hardware. To implement the techniques in hardware, positioning sensors were interfaced to a remote control car and a microprocessor. The microprocessor utilized the sensor measurements to orient the car with respect to the target. Next, a fuzzy logic control algorithm adjusted the front wheel steering angle to minimize the difference between the heading and bearing. After minimizing the heading error, the car maintained a straight steering angle along its path to the final destination. The results of this research can be used to develop applications that require precise navigation. The design techniques can also be implemented on alternate platforms such as a wheelchair to assist with autonomous navigation.

Approximate Linear Regulator and Kalman Filter

DTIC Science & Technology

1980-09-01

of Equivalent Dominant Poles and Zeros Using Industrial Specifications," IEEE Trans. on Industrial Electronics and Control Instrumentation, Vol. IECI...true. In recent years, the rapid development of powerful minicomputers and microprocessors makes the industrial applications of optimal control...1976, pp. 677-687. [21] Y. Takahashi, M. Tomizuka and D. I. Auslander, Simple discrete control of industrial processes, Trans. on ASME J. of Dynamic

Utilization of Educationally Oriented Microcomputer Based Laboratories

ERIC Educational Resources Information Center

Fitzpatrick, Michael J.; Howard, James A.

1977-01-01

Describes one approach to supplying engineering and computer science educators with an economical portable digital systems laboratory centered around microprocessors. Expansion of the microcomputer based laboratory concept to include Learning Resource Aided Instruction (LRAI) systems is explored. (Author)

A microarchitecture for resource-limited superscalar microprocessors

NASA Astrophysics Data System (ADS)

Basso, Todd David

1999-11-01

Microelectronic components in space and satellite systems must be resistant to total dose radiation, single-even upset, and latchup in order to accomplish their missions. The demand for inexpensive, high-volume, radiation hardened (rad-hard) integrated circuits (ICs) is expected to increase dramatically as the communication market continues to expand. Motorola's Complementary Gallium Arsenide (CGaAsTM) technology offers superior radiation tolerance compared to traditional CMOS processes, while being more economical than dedicated rad-hard CMOS processes. The goals of this dissertation are to optimize a superscalar microarchitecture suitable for CGaAsTM microprocessors, develop circuit techniques for such applications, and evaluate the potential of CGaAsTM for the development of digital VLSI circuits. Motorola's 0.5 mum CGaAsTM process is summarized and circuit techniques applicable to digital CGaAsTM are developed. Direct coupled FET, complementary, and domino logic circuits are compared based on speed, power, area, and noise margins. These circuit techniques are employed in the design of a 600 MHz PowerPCTM arithmetic logic unit. The dissertation emphasizes CGaASTM-specific design considerations, specifically, low integration level. A baseline superscalar microarchitecture is defined and SPEC95 integer benchmark simulations are used to evaluate the applicability of advanced architectural features to microprocessors having low integration levels. The performance simulations center around the optimization of a simple superscalar core, small-scale branch prediction, instruction prefetching, and an off-chip primary data cache. The simulation results are used to develop a superscalar microarchitecture capable of outperforming a comparable sequential pipeline, while using only 500,000 transistors. The architecture, running at 200 MHz, is capable of achieving an estimated 153 MIPS, translating to a 27% performance increase over a comparable traditional pipelined microprocessor. The proposed microarchitecture is process independent and can be applied to low-cost, or transistor-limited applications. The proposed microarchitecture is implemented in the design of a 0.35 mum CMOS microprocessor, and the design of a 0.5 mum CGaAsTM micro-processor. The two technologies and designs are compared to ascertain the state of CGaAsTM for digital VLSI applications.

Generalized fast feedback system in the SLC

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hendrickson, L.; Allison, S.; Gromme, T.

A generalized fast feedback system has been developed to stabilize beams at various locations in the SLC. The system is designed to perform measurements and change actuator settings to control beam states such as position, angle and energy on a pulse to pulse basis. The software design is based on the state space formalism of digital control theory. The system is database-driven, facilitating the addition of new loops without requiring additional software. A communications system, KISNet, provides fast communications links between microprocessors for feedback loops which involve multiple micros. Feedback loops have been installed in seventeen locations throughout the SLCmore » and have proven to be invaluable in stabilizing the machine.« less

COED Transactions, Vol. IX, No. 6, June 1977. An Introductory Course in Microprocessors and Microcomputers.

ERIC Educational Resources Information Center

Marcovitz, Alan B., Ed.

This paper describes an introductory course in microprocessors and microcomputers implemented at Grossmont College. The current state-of-the-art in the microprocessor field is discussed, with special emphasis on the 8-bit MOS single-chip processors which are the most commonly used devices. Objectives and guidelines for the course are presented,…

COED Transactions, Vol. XI, No. 12, December 1979. Some Alternate Applications of Microprocessor Trainers in Support of Undergraduate Laboratories.

ERIC Educational Resources Information Center

Mitchell, Eugene E., Ed.

Ways are described for the use of a microprocessor trainer in undergraduate laboratories. Listed are microcomputer applications that have been used as demonstrations and which provide signals for other experiments which are not related to microprocessors. Information and figures are provided for methods to do the following: direct generation of…

HEMP (high-altitude electromagnetic pulse) test and analysis of selected recloser-control units

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, T.K.; Sands, S.H.; Tesche, F.M.

A simulated HEMP test was performed on power line recloser-control units in the ARES facility during the month of October 1988. Two types of recloser-control units were tested: an electronic control unit presently in wide use in electric power distribution systems and a new microprocessor based unit presently being introduced to electric utilities. It was found that the ARES fields did not cause reproducible disruptive failure of the equipment. Minor upsets, which were considered to be non-disruptive to the recloser operation, were observed. The test results were compared to the results of an analysis from a previous study and itmore » is concluded that the probability of disruptive failure of field operating recloser-control units subjected to a nominal unclassified HEMP environment is small. 3 refs., 30 figs., 1 tab.« less

An intelligent control and virtual display system for evolutionary space station workstation design

NASA Technical Reports Server (NTRS)

Feng, Xin; Niederjohn, Russell J.; Mcgreevy, Michael W.

1992-01-01

Research and development of the Advanced Display and Computer Augmented Control System (ADCACS) for the space station Body-Ported Cupola Virtual Workstation (BP/VCWS) were pursued. The potential applications were explored of body ported virtual display and intelligent control technology for the human-system interfacing applications is space station environment. The new system is designed to enable crew members to control and monitor a variety of space operations with greater flexibility and efficiency than existing fixed consoles. The technologies being studied include helmet mounted virtual displays, voice and special command input devices, and microprocessor based intelligent controllers. Several research topics, such as human factors, decision support expert systems, and wide field of view, color displays are being addressed. The study showed the significant advantages of this uniquely integrated display and control system, and its feasibility for human-system interfacing applications in the space station command and control environment.

Decentralized Adaptive Control For Robots

NASA Technical Reports Server (NTRS)

Seraji, Homayoun

1989-01-01

Precise knowledge of dynamics not required. Proposed scheme for control of multijointed robotic manipulator calls for independent control subsystem for each joint, consisting of proportional/integral/derivative feedback controller and position/velocity/acceleration feedforward controller, both with adjustable gains. Independent joint controller compensates for unpredictable effects, gravitation, and dynamic coupling between motions of joints, while forcing joints to track reference trajectories. Scheme amenable to parallel processing in distributed computing system wherein each joint controlled by relatively simple algorithm on dedicated microprocessor.

Mechanical Engineering Design Project report: Enabler control systems

NASA Technical Reports Server (NTRS)

Cullen, Christian; Delvecchio, Dave; Scarborough, Alan; Havics, Andrew A.

1992-01-01

The Controls Group was assigned the responsibility for designing the Enabler's control system. The requirement for the design was that the control system must provide a simple user interface to control the boom articulation joints, chassis articulation joints, and the wheel drive. The system required controlling hydraulic motors on the Enabler by implementing 8-bit microprocessor boards. In addition, feedback to evaluate positions and velocities must be interfaced to provide the operator with confirmation as well as control.

Advanced capability RFID system

DOEpatents

Gilbert, Ronald W.; Steele, Kerry D.; Anderson, Gordon A.

2007-09-25

A radio-frequency transponder device having an antenna circuit configured to receive radio-frequency signals and to return modulated radio-frequency signals via continuous wave backscatter, a modulation circuit coupled to the antenna circuit for generating the modulated radio-frequency signals, and a microprocessor coupled to the antenna circuit and the modulation circuit and configured to receive and extract operating power from the received radio-frequency signals and to monitor inputs on at least one input pin and to generate responsive signals to the modulation circuit for modulating the radio-frequency signals. The microprocessor can be configured to generate output signals on output pins to associated devices for controlling the operation thereof. Electrical energy can be extracted and stored in an optional electrical power storage device.

A programmable power processor for a 25-kW power module

NASA Technical Reports Server (NTRS)

Lanier, R., Jr.; Kapustka, R. E.; Bush, J. R., Jr.

1979-01-01

A discussion of the power processor for an electrical power system for a 25-kW Power Module that could support the Space Shuttle program during the 1980's and 1990's and which could be a stepping stone to future large space power systems is presented. Trades that led to the selection of a microprocessor-controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Efficiency data from a breadboard programmable power processor are presented, and component selection and design considerations are also discussed.

Diesel engine exhaust oxidizer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kammel, R.A.

1992-06-16

This patent describes a diesel engine exhaust oxidizing device. It comprises: an enclosure having an inlet for receiving diesel engine exhaust, a main flow path through the enclosure to an outlet of the enclosure, a by-ass through the enclosure, and a microprocessor control means.

Quantum Theory and the Silicon Revolution. Resources in Technology.

ERIC Educational Resources Information Center

Deal, Walter F., III

1995-01-01

This learning activity describes silicon as one of the most plentiful materials on earth, demonstrating how it supplies the building blocks for electronic devices such as transistors, integrated circuits, and microprocessors. It includes a design brief on control technology. (JOW)

Inverter-based GTA welding machines improve fabrication

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sammons, M.

2000-05-01

While known as precision process, many fabricators using the gas tungsten arc welding (GTAW) process fight several common problems that hinder quality, slow production, frustrate the operator and otherwise prevent the process from achieving its full potential. These include a limited ability to tailor the weld bead profile, poor control of the arc direction and arc wandering, poor arc starting, unstable or inconsistent arcs in the AC mode, high-frequency interference with electronics and tungsten contamination. Fortunately, new GTA welding technology--made possible by advances with inverter-based power sources and micro-processor controls--can eliminate common productivity gremlins. Further, new AC/DC inverter-based GTA powermore » sources provide advanced arc shaping capabilities. As a result, many fabricators adopting this new technology have experienced phenomenal production increases, taken on new types of projects and reduced costs. Most importantly, the operators enjoy welding more.« less

Installation package for integrated programmable electronic controller and hydronic subsystem - solar heating and cooling

NASA Technical Reports Server (NTRS)

1978-01-01

A description is given of the Installation, Operation, and Maintenance Manual and information on the power panel and programmable microprocessor, a hydronic solar pump system and a hydronic heating hot water pumping system. These systems are integrated into various configurations for usages in solar energy management, control and monitoring, lighting control, data logging and other solar related applications.

Personal Computer Based Controller For Switched Reluctance Motor Drives

NASA Astrophysics Data System (ADS)

Mang, X.; Krishnan, R.; Adkar, S.; Chandramouli, G.

1987-10-01

Th9, switched reluctance motor (SRM) has recently gained considerable attention in the variable speed drive market. Two important factors that have contributed to this are, the simplicity of construction and the possibility of developing low cost con-trollers with minimum number of switching devices in the drive circuits. This is mainly due to the state-of-art of the present digital circuits technology and the low cost of switching devices. The control of this motor drive is under research. Optimized performance of the SRM motor drive is very dependent on the integration of the controller, converter and the motor. This research on system integration involves considerable changes in the control algorithms and their implementation. A Personal computer (PC) based controller is very appropriate for this purpose. Accordingly, the present paper is concerned with the design of a PC based controller for a SRM. The PC allows for real-time microprocessor control with the possibility of on-line system parameter modifications. Software reconfiguration of this controller is easier than a hardware based controller. User friendliness is a natural consequence of such a system. Considering the low cost of PCs, this controller will offer an excellent cost-effective means of studying the control strategies for the SRM drive intop greater detail than in the past.

Flight Experiment Demonstration System (FEDS) functional description and interface document

NASA Technical Reports Server (NTRS)

Belcher, R. C.; Shank, D. E.

1984-01-01

This document presents a functional description of the Flight Experiment Demonstration System (FEDS) and of interfaces between FEDS and external hardware and software. FEDS is a modification of the Automated Orbit Determination System (AODS). FEDS has been developed to support a ground demonstration of microprocessor-based onboard orbit determination. This document provides an overview of the structure and logic of FEDS and details the various operational procedures to build and execute FEDS. It also documents a microprocessor interface between FEDS and a TDRSS user transponder and describes a software simulator of the interface used in the development and system testing of FEDS.

Fiber Laser methane sensor with the function of self-diagnose

NASA Astrophysics Data System (ADS)

Li, Yan-fang; Wei, Yu-bin; Shang, Ying; Wang, Chang; Liu, Tong-yu

2012-02-01

Using the technology of tunable diode laser absorption spectroscopy and the technology of micro-electronics, a fiber laser methane sensor based on the microprocessor C8051F410 is given. In this paper, we use the DFB Laser as the light source of the sensor. By tuning temperature and driver current of the DFB laser, we can scan the laser over the methane absorption line, Based on the Beer-Lambert law, through detect the variation of the light power before and after the absorption we realize the methane detection. It makes the real-time and online detection of methane concentration to be true, and it has the advantages just as high accuracy, immunity to other gases , long calibration cycle and so on. The sensor has the function of adaptive gain and self-diagnose. By introducing digital potentiometers, the gain of the photoelectric conversion operational amplifier can be controlled by the microprocessor according to the light power. When the gain and the conversion voltage achieve the set value, then we can consider the sensor in a fault status, and then the software will alarm us to check the status of the probe. So we improved the dependence and the stability of the measured results. At last we give some analysis on the sensor according the field application and according the present working, we have a look of our next work in the distance.

[Development of a massage device based on microcontroller in the field of alimentary tract].

PubMed

Huang, Rong; Peng, Chenglin; He, Hongmei; Zhu, Jing

2007-12-01

In this artical is first reported a survey of the progress in research of MEMS technology. Then, the basic structure, features and the principles of a massage device based on microcontroller in the field of alimentary tract are introduced. Special emphasis is laid on the utilization of MSP430F123 microprocessor for producing a kind of period pulse to control the power of massage capsule. In general, the research and development of the massage device in the field of alimentary tract have active support and deep significance to therapy in the clinical and business settings as well as in the development of biomedical engineering and MEMS.

Development report: Automatic System Test and Calibration (ASTAC) equipment

NASA Technical Reports Server (NTRS)

Thoren, R. J.

1981-01-01

A microcomputer based automatic test system was developed for the daily performance monitoring of wind energy system time domain (WEST) analyzer. The test system consists of a microprocessor based controller and hybrid interface unit which are used for inputing prescribed test signals into all WEST subsystems and for monitoring WEST responses to these signals. Performance is compared to theoretically correct performance levels calculated off line on a large general purpose digital computer. Results are displayed on a cathode ray tube or are available from a line printer. Excessive drift and/or lack of repeatability of the high speed analog sections within WEST is easily detected and the malfunctioning hardware identified using this system.

Establishment of cells to monitor Microprocessor through fusion genes of microRNA and GFP

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tsutsui, Motomu; Hasegawa, Hitoki; Adachi, Koichi

Microprocessor, the complex of Drosha and DGCR8, promotes the processing of primary microRNA to precursor microRNA, which is a crucial step for microRNA maturation. So far, no convenient assay systems have been developed for observing this step in vivo. Here we report the establishment of highly sensitive cellular systems where we can visually monitor the function of Microprocessor. During a series of screening of transfectants with fusion genes of the EGFP cDNA and primary microRNA genes, we have obtained certain cell lines where introduction of siRNA against DGCR8 or Drosha strikingly augments GFP signals. In contrast, these cells have notmore » responded to Dicer siRNA; thus they have a unique character that GFP signals should be negatively and specifically correlated to the action of Microprocessor among biogenesis of microRNA. These cell lines can be useful tools for real-time analysis of Microprocessor action in vivo and identifying its novel modulators.« less

Cell cycle-dependent regulation of Aurora kinase B mRNA by the Microprocessor complex.

PubMed

Jung, Eunsun; Seong, Youngmo; Seo, Jae Hong; Kwon, Young-Soo; Song, Hoseok

2014-03-28

Aurora kinase B regulates the segregation of chromosomes and the spindle checkpoint during mitosis. In this study, we showed that the Microprocessor complex, which is responsible for the processing of the primary transcripts during the generation of microRNAs, destabilizes the mRNA of Aurora kinase B in human cells. The Microprocessor-mediated cleavage kept Aurora kinase B at a low level and prevented premature entrance into mitosis. The cleavage was reduced during mitosis leading to the accumulation of Aurora kinase B mRNA and protein. In addition to Aurora kinase B mRNA, the processing of other primary transcripts of miRNAs were also decreased during mitosis. We found that the cleavage was dependent on an RNA helicase, DDX5, and the association of DDX5 and DDX17 with the Microprocessor was reduced during mitosis. Thus, we propose a novel mechanism by which the Microprocessor complex regulates stability of Aurora kinase B mRNA and cell cycle progression. Copyright © 2014 Elsevier Inc. All rights reserved.

Functional Anatomy of the Human Microprocessor.

PubMed

Nguyen, Tuan Anh; Jo, Myung Hyun; Choi, Yeon-Gil; Park, Joha; Kwon, S Chul; Hohng, Sungchul; Kim, V Narry; Woo, Jae-Sung

2015-06-04

MicroRNA (miRNA) maturation is initiated by Microprocessor composed of RNase III DROSHA and its cofactor DGCR8, whose fidelity is critical for generation of functional miRNAs. To understand how Microprocessor recognizes pri-miRNAs, we here reconstitute human Microprocessor with purified recombinant proteins. We find that Microprocessor is an ∼364 kDa heterotrimeric complex of one DROSHA and two DGCR8 molecules. Together with a 23-amino acid peptide from DGCR8, DROSHA constitutes a minimal functional core. DROSHA serves as a "ruler" by measuring 11 bp from the basal ssRNA-dsRNA junction. DGCR8 interacts with the stem and apical elements through its dsRNA-binding domains and RNA-binding heme domain, respectively, allowing efficient and accurate processing. DROSHA and DGCR8, respectively, recognize the basal UG and apical UGU motifs, which ensure proper orientation of the complex. These findings clarify controversies over the action mechanism of DROSHA and allow us to build a general model for pri-miRNA processing. Copyright © 2015 Elsevier Inc. All rights reserved.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

The Integrated Radiation Mapper Assistant

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carlton, R.E.; Tripp, L.R.

1995-03-01

The Integrated Radiation Mapper Assistant (IRMA) system combines state-of-the-art radiation sensors and microprocessor based analysis techniques to perform radiation surveys. Control of the survey function is from a control station located outside the radiation thus reducing time spent in radiation areas performing radiation surveys. The system consists of a directional radiation sensor, a laser range finder, two area radiation sensors, and a video camera mounted on a pan and tilt platform. THis sensor package is deployable on a remotely operated vehicle. The outputs of the system are radiation intensity maps identifying both radiation source intensities and radiation levels throughout themore » room being surveyed. After completion of the survey, the data can be removed from the control station computer for further analysis or archiving.« less

Space Bioreactor Science Workshop

NASA Technical Reports Server (NTRS)

Morrison, Dennis R. (Editor)

1987-01-01

The first space bioreactor has been designed for microprocessor control, no gaseous headspace, circulation and resupply of culture medium, and a slow mixing in very low shear regimes. Various ground based bioreactors are being used to test reactor vessel design, on-line sensors, effects of shear, nutrient supply, and waste removal from continuous culture of human cells attached to microcarriers. The small (500 ml) bioreactor is being constructed for flight experiments in the Shuttle middeck to verify systems operation under microgravity conditions and to measure the efficiencies of mass transport, gas transfer, oxygen consumption, and control of low shear stress on cells. Applications of microcarrier cultures, development of the first space bioreactor flight system, shear and mixing effects on cells, process control, and methods to monitor cell metabolism and nutrient requirements are among the topics covered.

Kinematics in the terminal swing phase of unilateral transfemoral amputees: microprocessor-controlled versus swing-phase control prosthetic knees.

PubMed

Mâaref, Khaled; Martinet, Noël; Grumillier, Constance; Ghannouchi, Slaheddine; André, Jean Marie; Paysant, Jean

2010-06-01

To analyze the spatiotemporal parameters in the terminal swing phase of the prosthetic limb in unilateral transfemoral amputees (TFAs) compared with a group of asymptomatic subjects, and to identify a latency period (LP) in the TFA between the full extension of the prosthetic knee and the initial ground contact of the ipsilateral foot. To study the correlation between the LP and the duration of the swing phase. To evaluate the influence of the type of knee, the time since amputation, and the amputation level on the latency period. Three-dimensional gait analysis with an optoelectronic device. Gait analysis laboratory of a re-education and functional rehabilitation service. TFA (n=29) and able-bodied (n=15) subjects. Not applicable. Spatiotemporal and kinematics gait parameters. The swing phase and the LP of the prosthetic limb, associated with a consequently longer single-limb stance phase in the intact limb, were significantly longer than those measured in the intact limbs of these subjects, as well as those measured on both lower limbs of the able-bodied subjects (P<.05). There is a positive correlation (P<.05; r(2)=.58 between the LP and the swing phase on the TFA's prosthetic side. The LP measured in the prosthetic limb of TFA with a swing-phase control prosthetic knee is significantly greater than in those using the microprocessor-controlled prosthetic knee (P<.05). Of negligible duration in able-bodied subjects and in the intact limb of TFA, the LP is significantly greater in the prosthetic limb. It can explain the lengthened swing phase on the prosthetic side of those subjects. The use of a microprocessor-controlled prosthetic knee allows the LP to be reduced. This LP appears to be necessary to insure the stability of the prosthetic knee. We suggest calling this time "confidence time." Copyright 2010 American Congress of Rehabilitation Medicine. Published by Elsevier Inc. All rights reserved.

Design and Demonstration of a 30 GHz 16-bit Superconductor RSFQ Microprocessor

DTIC Science & Technology

2015-03-10

for Public Release; Distribution Unlimited Final Report: Design and Demonstration of a 30 GHz 16-bit Superconductor RSFQ Microprocessor The views...P.O. Box 12211 Research Triangle Park, NC 27709-2211 Superconductor technology, RSFQ, RQL, processor design, arithmetic units, high-performance...Demonstration of a 30 GHz 16-bit Superconductor RSFQ Microprocessor Report Title The major objective of the project was to design and demonstrate operation

Fault-Sensitivity and Wear-Out Analysis of VLSI Systems.

DTIC Science & Technology

1995-06-01

DESCRIPTION MIXED-MODE HIERARCIAIFAULT DESCRIPTION FAULT SIMULATION TYPE OF FAULT TRANSIENT/STUCK-AT LOCATION/TIME * _AUTOMATIC FAULT INJECTION TRACE...4219-4224, December 1985. [15] J. Sosnowski, "Evaluation of transient hazards in microprocessor controll - ers," Digest, FTCS-16, The Sixteenth

Microcomputers in Special Education: Some New Opportunities, Some Old Problems.

ERIC Educational Resources Information Center

Hannaford, Alonzo E.

1983-01-01

Discusses ways in which microprocessors are aiding the handicapped in three major areas: (1) compensation (sensory, communication, and compensation for control); (2) management (personal and educational); and (3) instructional delivery (uses, advantages, problems, educational compatibility, instructional design, technical adequacy). (EJS)

Understanding the Internet of Things

ERIC Educational Resources Information Center

Pierce, Dennis

2017-01-01

The universe of objects containing microprocessors or embedded sensors capable of communicating and transmitting information across networks is called the Internet of Things, and it has enormous implications for community colleges. Already, many colleges are saving time and money by monitoring and controlling "smart building" features…

Isotopically enhanced triple-quantum-dot qubit

PubMed Central

Eng, Kevin; Ladd, Thaddeus D.; Smith, Aaron; Borselli, Matthew G.; Kiselev, Andrey A.; Fong, Bryan H.; Holabird, Kevin S.; Hazard, Thomas M.; Huang, Biqin; Deelman, Peter W.; Milosavljevic, Ivan; Schmitz, Adele E.; Ross, Richard S.; Gyure, Mark F.; Hunter, Andrew T.

2015-01-01

Like modern microprocessors today, future processors of quantum information may be implemented using all-electrical control of silicon-based devices. A semiconductor spin qubit may be controlled without the use of magnetic fields by using three electrons in three tunnel-coupled quantum dots. Triple dots have previously been implemented in GaAs, but this material suffers from intrinsic nuclear magnetic noise. Reduction of this noise is possible by fabricating devices using isotopically purified silicon. We demonstrate universal coherent control of a triple-quantum-dot qubit implemented in an isotopically enhanced Si/SiGe heterostructure. Composite pulses are used to implement spin-echo type sequences, and differential charge sensing enables single-shot state readout. These experiments demonstrate sufficient control with sufficiently low noise to enable the long pulse sequences required for exchange-only two-qubit logic and randomized benchmarking. PMID:26601186

Design principles of a cooperative robot controller

NASA Technical Reports Server (NTRS)

Hayward, Vincent; Hayati, Samad

1987-01-01

The paper describes the design of a controller for cooperative robots being designed at McGill University in a collaborative effort with the Jet Propulsion Laboratory. The first part of the paper discusses the background and motivation for multiple arm control. Then, a set of programming primitives, which are based on the RCCL system and which permit a programmer to specify cooperative tasks are described. The first group of primitives are motion primitives which specify asynchronous motions, master/slave motions, and cooperative motions. In the context of cooperative robots, trajectory generation issues will be discussed and the implementation described. A second set of primitives provides for the specification of spatial relationships. The relations between programming and control in the case of multiple robot are examined. Finally, the paper describes the allocation of various tasks among a set of microprocessors sharing a common bus.

A monitoring system for vegetable greenhouses based on a wireless sensor network.

PubMed

Li, Xiu-hong; Cheng, Xiao; Yan, Ke; Gong, Peng

2010-01-01

A wireless sensor network-based automatic monitoring system is designed for monitoring the life conditions of greenhouse vegetables. The complete system architecture includes a group of sensor nodes, a base station, and an internet data center. For the design of wireless sensor node, the JN5139 micro-processor is adopted as the core component and the Zigbee protocol is used for wireless communication between nodes. With an ARM7 microprocessor and embedded ZKOS operating system, a proprietary gateway node is developed to achieve data influx, screen display, system configuration and GPRS based remote data forwarding. Through a Client/Server mode the management software for remote data center achieves real-time data distribution and time-series analysis. Besides, a GSM-short-message-based interface is developed for sending real-time environmental measurements, and for alarming when a measurement is beyond some pre-defined threshold. The whole system has been tested for over one year and satisfactory results have been observed, which indicate that this system is very useful for greenhouse environment monitoring.

Regulation of Plant Microprocessor Function in Shaping microRNA Landscape.

PubMed

Dolata, Jakub; Taube, Michał; Bajczyk, Mateusz; Jarmolowski, Artur; Szweykowska-Kulinska, Zofia; Bielewicz, Dawid

2018-01-01

MicroRNAs are small molecules (∼21 nucleotides long) that are key regulators of gene expression. They originate from long stem-loop RNAs as a product of cleavage by a protein complex called Microprocessor. The core components of the plant Microprocessor are the RNase type III enzyme Dicer-Like 1 (DCL1), the zinc finger protein Serrate (SE), and the double-stranded RNA binding protein Hyponastic Leaves 1 (HYL1). Microprocessor assembly and its processing of microRNA precursors have been reported to occur in discrete nuclear bodies called Dicing bodies. The accessibility of and modifications to Microprocessor components affect microRNA levels and may have dramatic consequences in plant development. Currently, numerous lines of evidence indicate that plant Microprocessor activity is tightly regulated. The cellular localization of HYL1 is dependent on a specific KETCH1 importin, and the E3 ubiquitin ligase COP1 indirectly protects HYL1 from degradation in a light-dependent manner. Furthermore, proper localization of HYL1 in Dicing bodies is regulated by MOS2. On the other hand, the Dicing body localization of DCL1 is regulated by NOT2b, which also interacts with SE in the nucleus. Post-translational modifications are substantial factors that contribute to protein functional diversity and provide a fine-tuning system for the regulation of protein activity. The phosphorylation status of HYL1 is crucial for its activity/stability and is a result of the interplay between kinases (MPK3 and SnRK2) and phosphatases (CPL1 and PP4). Additionally, MPK3 and SnRK2 are known to phosphorylate SE. Several other proteins (e.g., TGH, CDF2, SIC, and RCF3) that interact with Microprocessor have been found to influence its RNA-binding and processing activities. In this minireview, recent findings on the various modes of Microprocessor activity regulation are discussed.

Regulation of Plant Microprocessor Function in Shaping microRNA Landscape

PubMed Central

Dolata, Jakub; Taube, Michał; Bajczyk, Mateusz; Jarmolowski, Artur; Szweykowska-Kulinska, Zofia; Bielewicz, Dawid

2018-01-01

MicroRNAs are small molecules (∼21 nucleotides long) that are key regulators of gene expression. They originate from long stem–loop RNAs as a product of cleavage by a protein complex called Microprocessor. The core components of the plant Microprocessor are the RNase type III enzyme Dicer-Like 1 (DCL1), the zinc finger protein Serrate (SE), and the double-stranded RNA binding protein Hyponastic Leaves 1 (HYL1). Microprocessor assembly and its processing of microRNA precursors have been reported to occur in discrete nuclear bodies called Dicing bodies. The accessibility of and modifications to Microprocessor components affect microRNA levels and may have dramatic consequences in plant development. Currently, numerous lines of evidence indicate that plant Microprocessor activity is tightly regulated. The cellular localization of HYL1 is dependent on a specific KETCH1 importin, and the E3 ubiquitin ligase COP1 indirectly protects HYL1 from degradation in a light-dependent manner. Furthermore, proper localization of HYL1 in Dicing bodies is regulated by MOS2. On the other hand, the Dicing body localization of DCL1 is regulated by NOT2b, which also interacts with SE in the nucleus. Post-translational modifications are substantial factors that contribute to protein functional diversity and provide a fine-tuning system for the regulation of protein activity. The phosphorylation status of HYL1 is crucial for its activity/stability and is a result of the interplay between kinases (MPK3 and SnRK2) and phosphatases (CPL1 and PP4). Additionally, MPK3 and SnRK2 are known to phosphorylate SE. Several other proteins (e.g., TGH, CDF2, SIC, and RCF3) that interact with Microprocessor have been found to influence its RNA-binding and processing activities. In this minireview, recent findings on the various modes of Microprocessor activity regulation are discussed. PMID:29922322

Efficient system interrupt concept design at the microprogramming level

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fakharzadeh, M.M.

1989-01-01

Over the past decade the demand for high speed super microcomputers has been tremendously increased. To satisfy this demand many high speed 32-bit microcomputers have been designed. However, the currently available 32-bit systems do not provide an adequate solution to many highly demanding problems such as in multitasking, and in interrupt driven applications, which both require context switching. Systems for these purposes usually incorporate sophisticated software. In order to be efficient, a high end microprocessor based system must satisfy stringent software demands. Although these microprocessors use the latest technology in the fabrication design and run at a very high speed,more » they still suffer from insufficient hardware support for such applications. All too often, this lack also is the premier cause of execution inefficiency. In this dissertation a micro-programmable control unit and operation unit is considered in an advanced design. An automaton controller is designed for high speed micro-level interrupt handling. Different stack models are designed for the single task and multitasking environment. The stacks are used for storage of various components of the processor during the interrupt calls, procedure calls, and task switching. A universal (as an example seven port) register file is designed for high speed parameter passing, and intertask communication in the multitasking environment. In addition, the register file provides a direct path between ALU and the peripheral data which is important in real-time control applications. The overall system is a highly parallel architecture, with no pipeline and internal cache memory, which allows the designer to be able to predict the processor's behavior during the critical times.« less

Clinical evaluation of the Jay Sensitivity Sensor Probe: a new microprocessor-controlled instrument to evaluate dentin hypersensitivity.

PubMed

Sowinski, Joseph A; Kakar, Ashish; Kakar, Kanupriya

2013-05-01

To compare the Jay Sensitivity Sensor Probe (Jay Probe), a new microprocessor-based, pre-calibrated instrument, with well accepted methods used to evaluate sensitivity, i.e. tactile response to the Yeaple Probe, air blast (Schiff scale), and patient responses by Visual Analog Score (VAS). Jay Probe assessments were accomplished using several approaches. With a cohort of 12 subjects, two clinical examiners compared the repeatability of the Jay and Yeaple Probes. A second evaluation of both probes was conducted during two independent parallel design clinical studies each enrolling 100 adults with dentin hypersensitivity (DH). In each study, subjects were evaluated for DH responses after twice daily oral hygiene with a negative control fluoride dentifrice or a positive control dentifrice formulated with ingredients proven to reduce sensitivity, i.e. potassium nitrate or 8.0% arginine with calcium carbonate. Tactile evaluations by the Jay and Yeaple Probes were conducted at baseline and recall visits over the 8-week duration of each study. Also evaluated at each visit were responses to air blast and to patient reported DH assessment by VAS. Low inter-examiner variability with no significant differences between replicate measurements (P > 0.05) was observed with the Jay Probe. Consistent with results from previous studies, subjects assigned dentifrices formulated with potassium nitrate or 8% arginine/calcium carbonate demonstrated improvements in Yeaple, air blast and VAS responses in comparison to those assigned the fluoride dentifrice (P < 0.05). Jay Probe responses correlated significantly with all other sensitivity measures (P < 0.05). Differences between these treatments were observed at all post-treatment evaluations using these methods.

A system for applying rapid warming or cooling stimuli to cells during patch clamp recording or ion imaging.

PubMed

Reid, G; Amuzescu, B; Zech, E; Flonta, M L

2001-10-15

We describe a system for superfusing small groups of cells at a precisely controlled and rapidly adjustable local temperature. Before being applied to the cell or cells under study, solutions are heated or cooled in a chamber of small volume ( approximately 150 microl) and large surface area, sandwiched between four small Peltier elements. The current through the Peltier elements is controlled by a microprocessor using a PID (proportional-integral-derivative) feedback algorithm. The chamber can be heated to at least 60 degrees C and cooled to 0 degrees C, changing its temperature at a maximum rate of about 7 degrees C per second; temperature ramps can be followed under feedback control at up to 4 degrees C per second. Temperature commands can be applied from the digital-to-analogue converter of any laboratory interface or generated digitally by the microprocessor. The peak-to-peak noise contributed by the system does not exceed that contributed by a patch pipette, holder and headstage, making it suitable for single channel as well as whole cell recordings.

System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

NASA Technical Reports Server (NTRS)

Hall, William A. (Inventor)

1993-01-01

A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

Aerospace Applications of Microprocessors

NASA Technical Reports Server (NTRS)

1980-01-01

An assessment of the state of microprocessor applications is presented. Current and future requirements and associated technological advances which allow effective exploitation in aerospace applications are discussed.

Formal proof of the AVM-1 microprocessor using the concept of generic interpreters

NASA Technical Reports Server (NTRS)

Windley, P.; Levitt, K.; Cohen, G. C.

1991-01-01

A microprocessor designated AVM-1 was designed to demonstrate the use of generic interpreters in verifying hierarchically decomposed microprocessor specifications. This report is intended to document the high-order language (HOL) code verifying AVM-1. The organization of the proof is discussed and some technical details concerning the execution of the proof scripts in HOL are presented. The proof scripts used to verify AVM-1 are also presented.

Full temperature single event upset characterization of two microprocessor technologies

NASA Technical Reports Server (NTRS)

Nichols, Donald K.; Coss, James R.; Smith, L. S.; Rax, Bernard; Huebner, Mark

1988-01-01

Data for the 9450 I3L bipolar microprocessor and the 80C86 CMOS/epi (vintage 1985) microprocessor are presented, showing single-event soft errors for the full MIL-SPEC temperature range of -55 to 125 C. These data show for the first time that the soft-error cross sections continue to decrease with decreasing temperature at subzero temperatures. The temperature dependence of the two parts, however, is very different.

PDSparc: A Drop-In Replacement for LEON3 Written Using Synopsys Processor Designer

DTIC Science & Technology

2015-09-24

Kate   Thurmer  MIT  Lincoln  Laboratory,  Lexington,   MA,  USA Distribution A: Public Release   ABSTRACT   Microprocessors are the...enabled appliances has opened a significant new niche: the Application Specific Standard Product (ASSP) microprocessor . These processors usually start...out as soft-cores that are parameterized at design time to realize exclusively the specific needs of the application. The microprocessor is a small

"Smart" Sensor Module

NASA Technical Reports Server (NTRS)

Mahajan, Ajay

2007-01-01

An assembly that contains a sensor, sensor-signal-conditioning circuitry, a sensor-readout analog-to-digital converter (ADC), data-storage circuitry, and a microprocessor that runs special-purpose software and communicates with one or more external computer(s) has been developed as a prototype of "smart" sensor modules for monitoring the integrity and functionality (the "health") of engineering systems. Although these modules are now being designed specifically for use on rocket-engine test stands, it is anticipated that they could also readily be designed to be incorporated into health-monitoring subsystems of such diverse engineering systems as spacecraft, aircraft, land vehicles, bridges, buildings, power plants, oilrigs, and defense installations. The figure is a simplified block diagram of the "smart" sensor module. The analog sensor readout signal is processed by the ADC, the digital output of which is fed to the microprocessor. By means of a standard RS-232 cable, the microprocessor is connected to a local personal computer (PC), from which software is downloaded into a randomaccess memory in the microprocessor. The local PC is also used to debug the software. Once the software is running, the local PC is disconnected and the module is controlled by, and all output data from the module are collected by, a remote PC via an Ethernet bus. Several smart sensor modules like this one could be connected to the same Ethernet bus and controlled by the single remote PC. The software running in the microprocessor includes driver programs for operation of the sensor, programs that implement self-assessment algorithms, programs that implement protocols for communication with the external computer( s), and programs that implement evolutionary methodologies to enable the module to improve its performance over time. The design of the module and of the health-monitoring system of which it is a part reflects the understanding that the main purpose of a health-monitoring system is to detect damage and, therefore, the health-monitoring system must be able to function effectively in the presence of damage and should be capable of distinguishing between damage to itself and damage to the system being monitored. A major benefit afforded by the self-assessment algorithms is that in the output of the module, the sensor data indicative of the health of the engineering system being monitored are coupled with a confidence factor that quantifies the degree of reliability of the data. Hence, the output includes information on the health of the sensor module itself in addition to information on the health of the engineering system being monitored.

DESIGN, DEVELOPMENT, AND FIELD DEMONSTRATION OF A REMOTELY DEPLOYABLE WATER QUALITY MONITORING SYSTEM

EPA Science Inventory

A prototype water quality monitoring system is described which offers almost continuous in situ monitoring. The two-man portable system features: (1) a microprocessor controlled central processing unit which allows preprogrammed sampling schedules and reprogramming in situ; (2) a...

Intelligent editor/printer enhancements

NASA Technical Reports Server (NTRS)

Woodfill, M. C.; Pheanis, D. C.

1983-01-01

Microprocessor support hardware, software, and cross assemblers relating to the Motorola 6800 and 6809 process systems were developed. Pinter controller and intelligent CRT development are discussed. The user's manual, design specifications for the MC6809 version of the intelligent printer controller card, and a 132-character by 64-line intelligent CRT display system using a Motorola 6809 MPU, and a one-line assembler and disassembler are provided.

State recovery and lockstep execution restart in a system with multiprocessor pairing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gara, Alan; Gschwind, Michael K; Salapura, Valentina

System, method and computer program product for a multiprocessing system to offer selective pairing of processor cores for increased processing reliability. A selective pairing facility is provided that selectively connects, i.e., pairs, multiple microprocessor or processor cores to provide one highly reliable thread (or thread group). Each paired microprocessor or processor cores that provide one highly reliable thread for high-reliability connect with a system components such as a memory "nest" (or memory hierarchy), an optional system controller, and optional interrupt controller, optional I/O or peripheral devices, etc. The memory nest is attached to a selective pairing facility via a switchmore » or a bus. Each selectively paired processor core is includes a transactional execution facility, whereing the system is configured to enable processor rollback to a previous state and reinitialize lockstep execution in order to recover from an incorrect execution when an incorrect execution has been detected by the selective pairing facility.« less

A biogenesis step upstream of Microprocessor controls miR-17~92 expression

PubMed Central

Du, Peng; Wang, Longfei; Sliz, Piotr; Gregory, Richard I.

2015-01-01

SUMMARY The precise control of miR-17~92 microRNA (miRNA) is essential for normal development and overexpression of certain miRNAs from this cluster is oncogenic. Here we find the relative expression of the six miRNAs processed from the primary (pri-miR-17~92) transcript is dynamically regulated during embryonic stem cell (ESC) differentiation. Pri-miR-17~92 is processed to a biogenesis intermediate, termed ‘progenitor-miRNA’ (pro-miRNA). Pro-miRNA is an efficient substrate for Microprocessor and is required to selectively license production of pre-miR-17, -18a, -19a, 20a, and -19b from this cluster. Two complementary cis-regulatory repression domains within pri-miR-17~92 are required for the blockade of miRNA processing through the formation of an autoinhibitory RNA conformation. The endonuclease CPSF3 (CPSF73), and the Spliceosome-associated ISY1 are responsible for pro-miRNA biogenesis and expression of all miRNAs within the cluster except miR-92. Thus, developmentally regulated pro-miRNA processing is key step controlling miRNA expression and explains the posttranscriptional control of miR-17~92 expression in development. PMID:26255770

An optimal controller for an electric ventricular-assist device: theory, implementation, and testing.

PubMed

Klute, G K; Tasch, U; Geselowitz, D B

1992-04-01

This paper addresses the development and testing of an optimal position feedback controller for the Penn State electric ventricular-assist device (EVAD). The control law is designed to minimize the expected value of the EVAD's power consumption for a targeted patient population. The closed-loop control law is implemented on an Intel 8096 microprocessor and in vitro test runs show that this controller improves the EVAD's efficiency by 15-21%, when compared with the performance of the currently used feedforward control scheme.

Development of flight testing techniques

NASA Technical Reports Server (NTRS)

Sandlin, D. R.

1984-01-01

A list of students involved in research on flight analysis and development is given along with abstracts of their work. The following is a listing of the titles of each work: Longitudinal stability and control derivatives obtained from flight data of a PA-30 aircraft; Aerodynamic drag reduction tests on a box shaped vehicle; A microprocessor based anti-aliasing filter for a PCM system; Flutter prediction of a wing with active aileron control; Comparison of theoretical and flight measured local flow aerodynamics for a low aspect ratio fin; In flight thrust determination on a real time basis; A comparison of computer generated lift and drag polars for a Wortmann airfoil to flight and wind tunnel results; and Deep stall flight testing of the NASA SGS 1-36.

Fault-Tolerant Local-Area Network

NASA Technical Reports Server (NTRS)

Morales, Sergio; Friedman, Gary L.

1988-01-01

Local-area network (LAN) for computers prevents single-point failure from interrupting communication between nodes of network. Includes two complete cables, LAN 1 and LAN 2. Microprocessor-based slave switches link cables to network-node devices as work stations, print servers, and file servers. Slave switches respond to commands from master switch, connecting nodes to two cable networks or disconnecting them so they are completely isolated. System monitor and control computer (SMC) acts as gateway, allowing nodes on either cable to communicate with each other and ensuring that LAN 1 and LAN 2 are fully used when functioning properly. Network monitors and controls itself, automatically routes traffic for efficient use of resources, and isolates and corrects its own faults, with potential dramatic reduction in time out of service.

Adaptive independent joint control of manipulators - Theory and experiment

NASA Technical Reports Server (NTRS)

Seraji, H.

1988-01-01

The author presents a simple decentralized adaptive control scheme for multijoint robot manipulators based on the independent joint control concept. The proposed control scheme for each joint consists of a PID (proportional integral and differential) feedback controller and a position-velocity-acceleration feedforward controller, both with adjustable gains. The static and dynamic couplings that exist between the joint motions are compensated by the adaptive independent joint controllers while ensuring trajectory tracking. The proposed scheme is implemented on a MicroVAX II computer for motion control of the first three joints of a PUMA 560 arm. Experimental results are presented to demonstrate that trajectory tracking is achieved despite strongly coupled, highly nonlinear joint dynamics. The results confirm that the proposed decentralized adaptive control of manipulators is feasible, in spite of strong interactions between joint motions. The control scheme presented is computationally very fast and is amenable to parallel processing implementation within a distributed computing architecture, where each joint is controlled independently by a simple algorithm on a dedicated microprocessor.

Advanced development of a programmable power processor

NASA Technical Reports Server (NTRS)

Lukens, F. E.; Lanier, J. R., Jr.; Kapustka, R. E.; Graves, J.

1980-01-01

The need for the development of a multipurpose flexible programmable power processor (PPP) has increased significantly in recent years to reduce ever rising development costs. One of the program requirements the PPP specification will cover is the 25 kW power module power conversion needs. The 25 kW power module could support the Space Shuttle program during the 1980s and 1990s and could be the stepping stone to future large space programs. Trades that led to selection of a microprocessor controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Component selection and design considerations are also discussed.

A Report of Bethune-Cookman College NASA JOVE Projects

NASA Technical Reports Server (NTRS)

Agba, Lawrence C.; David, Sunil K.; Rao, Narsing G.; Rahmani, Munir A.

1997-01-01

This document is the final report for the Joint Venture (JOVE) in Space Sciences, and describes the tasks, performed with the support of the contract. These tasks include work in: (1) interfacing microprocessor systems to high performance parallel interface chips, SCSI drive and memory, needed for the implementation of a Space Optical Data Recorder; (2) designing a digital interface architecture for a microprocessor controlled sensors monitoring unit for a NASA Jitter Attenuation and Dynamics Experiment (JADE) project; (3) developing an enhanced back-propagation training algorithm; (4) studying the effect of simulated spaceflight on Aortic Contractility; (5) developing a course in astronomy; and (6) improving internet access by running cables, and installing hubs in various places on the campus; and (7) researching the characteristics of Nd:YALO laser resonator.

49 CFR 661.7 - Waivers.

Code of Federal Regulations, 2013 CFR

2013-10-01

... requirements applies to microprocessors, computers, microcomputers, or software, or other such devices, which... a product or device which merely contains a microprocessor or microcomputer and is not used solely...

49 CFR 661.7 - Waivers.

Code of Federal Regulations, 2012 CFR

2012-10-01

... requirements applies to microprocessors, computers, microcomputers, or software, or other such devices, which... a product or device which merely contains a microprocessor or microcomputer and is not used solely...

49 CFR 661.7 - Waivers.

Code of Federal Regulations, 2011 CFR

2011-10-01

... requirements applies to microprocessors, computers, microcomputers, or software, or other such devices, which... a product or device which merely contains a microprocessor or microcomputer and is not used solely...

49 CFR 661.7 - Waivers.

Code of Federal Regulations, 2010 CFR

2010-10-01

... requirements applies to microprocessors, computers, microcomputers, or software, or other such devices, which... a product or device which merely contains a microprocessor or microcomputer and is not used solely...

49 CFR 661.7 - Waivers.

Code of Federal Regulations, 2014 CFR

2014-10-01

... requirements applies to microprocessors, computers, microcomputers, or software, or other such devices, which... a product or device which merely contains a microprocessor or microcomputer and is not used solely...

Field programmable chemistry: integrated chemical and electronic processing of informational molecules towards electronic chemical cells.

PubMed

Wagler, Patrick F; Tangen, Uwe; Maeke, Thomas; McCaskill, John S

2012-07-01

The topic addressed is that of combining self-constructing chemical systems with electronic computation to form unconventional embedded computation systems performing complex nano-scale chemical tasks autonomously. The hybrid route to complex programmable chemistry, and ultimately to artificial cells based on novel chemistry, requires a solution of the two-way massively parallel coupling problem between digital electronics and chemical systems. We present a chemical microprocessor technology and show how it can provide a generic programmable platform for complex molecular processing tasks in Field Programmable Chemistry, including steps towards the grand challenge of constructing the first electronic chemical cells. Field programmable chemistry employs a massively parallel field of electrodes, under the control of latched voltages, which are used to modulate chemical activity. We implement such a field programmable chemistry which links to chemistry in rather generic, two-phase microfluidic channel networks that are separated into weakly coupled domains. Electric fields, produced by the high-density array of electrodes embedded in the channel floors, are used to control the transport of chemicals across the hydrodynamic barriers separating domains. In the absence of electric fields, separate microfluidic domains are essentially independent with only slow diffusional interchange of chemicals. Electronic chemical cells, based on chemical microprocessors, exploit a spatially resolved sandwich structure in which the electronic and chemical systems are locally coupled through homogeneous fine-grained actuation and sensor networks and play symmetric and complementary roles. We describe how these systems are fabricated, experimentally test their basic functionality, simulate their potential (e.g. for feed forward digital electrophoretic (FFDE) separation) and outline the application to building electronic chemical cells. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.

VASP-4096: a very high performance programmable device for digital media processing applications

NASA Astrophysics Data System (ADS)

Krikelis, Argy

2001-03-01

Over the past few years, technology drivers for microprocessors have changed significantly. Media data delivery and processing--such as telecommunications, networking, video processing, speech recognition and 3D graphics--is increasing in importance and will soon dominate the processing cycles consumed in computer-based systems. This paper presents the architecture of the VASP-4096 processor. VASP-4096 provides high media performance with low energy consumption by integrating associative SIMD parallel processing with embedded microprocessor technology. The major innovations in the VASP-4096 is the integration of thousands of processing units in a single chip that are capable of support software programmable high-performance mathematical functions as well as abstract data processing. In addition to 4096 processing units, VASP-4096 integrates on a single chip a RISC controller that is an implementation of the SPARC architecture, 128 Kbytes of Data Memory, and I/O interfaces. The SIMD processing in VASP-4096 implements the ASProCore architecture, which is a proprietary implementation of SIMD processing, operates at 266 MHz with program instructions issued by the RISC controller. The device also integrates a 64-bit synchronous main memory interface operating at 133 MHz (double-data rate), and a 64- bit 66 MHz PCI interface. VASP-4096, compared with other processors architectures that support media processing, offers true performance scalability, support for deterministic and non-deterministic data processing on a single device, and software programmability that can be re- used in future chip generations.

A novel role for GSK3β as a modulator of Drosha microprocessor activity and MicroRNA biogenesis.

PubMed

Fletcher, Claire E; Godfrey, Jack D; Shibakawa, Akifumi; Bushell, Martin; Bevan, Charlotte L

2016-10-23

Regulation of microRNA (miR) biogenesis is complex and stringently controlled. Here, we identify the kinase GSK3β as an important modulator of miR biogenesis at Microprocessor level. Repression of GSK3β activity reduces Drosha activity toward pri-miRs, leading to accumulation of unprocessed pri-miRs and reduction of pre-miRs and mature miRs without altering levels or cellular localisation of miR biogenesis proteins. Conversely, GSK3β activation increases Drosha activity and mature miR accumulation. GSK3β achieves this through promoting Drosha:cofactor and Drosha:pri-miR interactions: it binds to DGCR8 and p72 in the Microprocessor, an effect dependent upon presence of RNA. Indeed, GSK3β itself can immunoprecipitate pri-miRs, suggesting possible RNA-binding capacity. Kinase assays identify the mechanism for GSK3β-enhanced Drosha activity, which requires GSK3β nuclear localisation, as phosphorylation of Drosha at S 300 and/or S 302 ; confirmed by enhanced Drosha activity and association with cofactors, and increased abundance of mature miRs in the presence of phospho-mimic Drosha. Functional implications of GSK3β-enhanced miR biogenesis are illustrated by increased levels of GSK3β-upregulated miR targets following GSK3β inhibition. These data, the first to link GSK3β with the miR cascade in humans, highlight a novel pro-biogenesis role for GSK3β in increasing miR biogenesis as a component of the Microprocessor complex with wide-ranging functional consequences. © The Author(s) 2016. Published by Oxford University Press on behalf of Nucleic Acids Research.

Multitasking operating systems for microprocessors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cramer, T.

1981-01-01

Microprocessors, because of their low cost, low power consumption, and small size, have caused an explosion in the number of innovative computer applications. Although there is a great deal of variation in microprocessor applications software, there is relatively little variation in the operating-system-level software from one application to the next. Nonetheless, operating system software, especially when multitasking is involved, can be very time consuming and expensive to develop. The major microprocessor manufacturers have acknowledged the need for operating systems in microprocessor applications and are now supplying real-time multitasking operating system software that is adaptable to a wide variety of usermore » systems. Use of this existing operating system software will decrease the number of redundant operating system development efforts, thus freeing programmers to work on more creative and productive problems. This paper discusses the basic terminology and concepts involved with multitasking operating systems. It is intended to provide a general understanding of the subject, so that the reader will be prepared to evaluate specific operating system software according to his or her needs. 2 references.« less

Robust Duplication with Comparison Methods in Microcontrollers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather Marie; Baker, Zachary Kent; Fairbanks, Thomas D.

Commercial microprocessors could be useful computational platforms in space systems, as long as the risk is bound. Many spacecraft are computationally constrained because all of the computation is done on a single radiation-hardened microprocessor. It is possible that a commercial microprocessor could be used for configuration, monitoring and background tasks that are not mission critical. Most commercial microprocessors are affected by radiation, including single-event effects (SEEs) that could be destructive to the component or corrupt the data. Part screening can help designers avoid components with destructive failure modes, and mitigation can suppress data corruption. We have been experimenting with amore » method for masking radiation-induced faults through the software executing on the microprocessor. While triple-modular redundancy (TMR) techniques are very effective at masking faults in software, the increased amount of execution time to complete the computation is not desirable. Here in this article we present a technique for combining duplication with compare (DWC) with TMR that decreases observable errors by as much as 145 times with only a 2.35 time decrease in performance.« less

Robust Duplication with Comparison Methods in Microcontrollers

DOE PAGES

Quinn, Heather Marie; Baker, Zachary Kent; Fairbanks, Thomas D.; ...

2016-01-01

Commercial microprocessors could be useful computational platforms in space systems, as long as the risk is bound. Many spacecraft are computationally constrained because all of the computation is done on a single radiation-hardened microprocessor. It is possible that a commercial microprocessor could be used for configuration, monitoring and background tasks that are not mission critical. Most commercial microprocessors are affected by radiation, including single-event effects (SEEs) that could be destructive to the component or corrupt the data. Part screening can help designers avoid components with destructive failure modes, and mitigation can suppress data corruption. We have been experimenting with amore » method for masking radiation-induced faults through the software executing on the microprocessor. While triple-modular redundancy (TMR) techniques are very effective at masking faults in software, the increased amount of execution time to complete the computation is not desirable. Here in this article we present a technique for combining duplication with compare (DWC) with TMR that decreases observable errors by as much as 145 times with only a 2.35 time decrease in performance.« less

Automatic Control and Data Acquisition System for Combustion Laboratory Applications.

DTIC Science & Technology

1982-10-01

O VPI Access~.ion FCr- 1473 2 UNCLASSIFIED Approved for public release; distribution unlimited JAutomatic Control and Data Acquisition System for...unit. The CPU/ROK board includes a 16 bit microprocessor chip which decodes and executes all in- structions, and controls all data transfers. The 12K...in the limited memory space of 32K of the HP-85 33 ACQDTA’ 1) Controls DevicesCRAIN ,2) Acquires Photodiods Output$ 3) Stores Data o Disc 1

A proposed microcomputer implementation of an Omega navigation processor

NASA Technical Reports Server (NTRS)

Abel, J. D.

1976-01-01

A microprocessor navigation systems using the Omega process is discussed. Several methods for correcting incoming sky waves are presented along with the hardware design which depends on a microcomputer. The control program is discussed, and block diagrams of the Omega processor and interface systems are presented.

Microprocessor utilization in search and rescue missions

NASA Technical Reports Server (NTRS)

Schwartz, M.; Bashkow, T.

1978-01-01

The position of an emergency transmitter may be determined by measuring the Doppler shift of the distress signal as received by an orbiting satellite. This requires the computation of an initial estimate and refinement of this estimate through an iterative, nonlinear, least squares estimation. A version of the algorithm was implemented and tested by locating a transmitter on the premises and obtaining observations from a satellite. The computer used was an IBM 360/95. The position was determined within the desired 10 km radius accuracy. The feasibility of performing the same task in real time using microprocessor technology, was determined. The least squares algorithm was implemented on an Intel 8080 microprocessor. The results indicate that a microprocessor can easily match the IBM implementation in accuracy and be performed inside the time limitations set.

Anti-Hassle Chip

NASA Technical Reports Server (NTRS)

1998-01-01

With assistance from NASA's Ames Research Center, the iTV Corporation has developed a full custom microprocessor that enables access to the Internet through a $49 device. The microprocessor is supported with a compliment of design tools for customization and adaptation as either a licensable core or as a complete microprocessor. Other uses include cell phones, DVD (digital versatile disk) players, cable modems, video conferencing equipment, digital cameras, wireless LANs (Local Area Network) and WANs (Wide Area Network). iTV continues to design new, low-cost consumer products.

Frequency Dependence of Single-event Upset in Advanced Commerical PowerPC Microprocessors

NASA Technical Reports Server (NTRS)

Irom, Frokh; Farmanesh, Farhad F.; Swift, Gary M.; Johnston, Allen H.

2004-01-01

This paper examines single-event upsets in advanced commercial SOI microprocessors in a dynamic mode, studying SEU sensitivity of General Purpose Registers (GPRs) with clock frequency. Results are presented for SOI processors with feature sizes of 0.18 microns and two different core voltages. Single-event upset from heavy ions is measured for advanced commercial microprocessors in a dynamic mode with clock frequency up to 1GHz. Frequency and core voltage dependence of single-event upsets in registers is discussed.

UWE-3, in-orbit performance and lessons learned of a modular and flexible satellite bus for future pico-satellite formations

NASA Astrophysics Data System (ADS)

Busch, S.; Bangert, P.; Dombrovski, S.; Schilling, K.

2015-12-01

Formations of small satellites offer promising perspectives due to improved temporal and spatial coverage and resolution at reasonable costs. The UWE-program addresses in-orbit demonstrations of key technologies to enable formations of cooperating distributed spacecraft at pico-satellite level. In this context, the CubeSat UWE-3 addresses experiments for evaluation of real-time attitude determination and control. UWE-3 introduces also a modular and flexible pico-satellite bus as a robust and extensible base for future missions. Technical objective was a very low power consumption of the COTS-based system, nevertheless providing a robust performance of this miniature satellite by advanced microprocessor redundancy and fault detection, identification and recovery software. This contribution addresses the UWE-3 design and mission results with emphasis on the operational experiences of the attitude determination and control system.

A Fault-tolerant RISC Microprocessor for Spacecraft Applications

NASA Technical Reports Server (NTRS)

Timoc, Constantin; Benz, Harry

1990-01-01

Viewgraphs on a fault-tolerant RISC microprocessor for spacecraft applications are presented. Topics covered include: reduced instruction set computer; fault tolerant registers; fault tolerant ALU; and double rail CMOS logic.

Interface For Dual-Channel MIL-STD-1553 Data Bus

NASA Technical Reports Server (NTRS)

Davies, Bryan L.; Heaps, Timothy L.

1992-01-01

Digital electronic subsystem made of commercially available programmable logic arrays and discrete logic devices serves as interface between microprocessor and dual-channel MIL-STD-1553 data bus. Subsystem consumes only 800 mW of power. Provides flexibility in that it is controllable via firmware. Includes only two reading-and-writing ports: one for status and control signals, other for transmission and reception of data.

Post-processing of seismic parameter data based on valid seismic event determination

DOEpatents

McEvilly, Thomas V.

1985-01-01

An automated seismic processing system and method are disclosed, including an array of CMOS microprocessors for unattended battery-powered processing of a multi-station network. According to a characterizing feature of the invention, each channel of the network is independently operable to automatically detect, measure times and amplitudes, and compute and fit Fast Fourier transforms (FFT's) for both P- and S- waves on analog seismic data after it has been sampled at a given rate. The measured parameter data from each channel are then reviewed for event validity by a central controlling microprocessor and if determined by preset criteria to constitute a valid event, the parameter data are passed to an analysis computer for calculation of hypocenter location, running b-values, source parameters, event count, P- wave polarities, moment-tensor inversion, and Vp/Vs ratios. The in-field real-time analysis of data maximizes the efficiency of microearthquake surveys allowing flexibility in experimental procedures, with a minimum of traditional labor-intensive postprocessing. A unique consequence of the system is that none of the original data (i.e., the sensor analog output signals) are necessarily saved after computation, but rather, the numerical parameters generated by the automatic analysis are the sole output of the automated seismic processor.

CP/M: A Family of 8- and 16-Bit Computer Operating Systems.

ERIC Educational Resources Information Center

Kildall, Gary

1982-01-01

Traces the development of the computer CP/M (Control Program for Microcomputers) and MP/M (Multiprogramming Monitor Microcomputers) operating system by Gary Kildall of Digital Research Company. Discusses the adaptation of these operating systems to the newly emerging 16 and 32 bit microprocessors. (Author/LC)

ENVIRONMENTAL AND ENERGY BENEFITS OF MICROPROCESSOR CONTROL OF OVEN AIRFLOWS FROM METAL PAINTING OPERATIONS

EPA Science Inventory

In most industrial operations the percentage of the lower explosive limit (LEL) of VOC emissions typically remain at below 5 to 10 percent LEL at most metal coating operations. Although, monitors are available to determine solvent concentrations, they require manual corrective ac...

Development of a real-time chemical injection system for air-assisted variable-rate sprayers

USDA-ARS?s Scientific Manuscript database

A chemical injection system is an effective method to minimize chemical waste and reduce the environmental pollution in pesticide spray applications. A microprocessor controlled injection system implementing a ceramic piston metering pump was developed to accurately dispense chemicals to be mixed wi...

Benchmark tests on the digital equipment corporation Alpha AXP 21164-based AlphaServer 8400, including a comparison of optimized vector and superscalar processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wasserman, H.J.

1996-02-01

The second generation of the Digital Equipment Corp. (DEC) DECchip Alpha AXP microprocessor is referred to as the 21164. From the viewpoint of numerically-intensive computing, the primary difference between it and its predecessor, the 21064, is that the 21164 has twice the multiply/add throughput per clock period (CP), a maximum of two floating point operations (FLOPS) per CP vs. one for 21064. The AlphaServer 8400 is a shared-memory multiprocessor server system that can accommodate up to 12 CPUs and up to 14 GB of memory. In this report we will compare single processor performance of the 8400 system with thatmore » of the International Business Machines Corp. (IBM) RISC System/6000 POWER-2 microprocessor running at 66 MHz, the Silicon Graphics, Inc. (SGI) MIPS R8000 microprocessor running at 75 MHz, and the Cray Research, Inc. CRAY J90. The performance comparison is based on a set of Fortran benchmark codes that represent a portion of the Los Alamos National Laboratory supercomputer workload. The advantage of using these codes, is that the codes also span a wide range of computational characteristics, such as vectorizability, problem size, and memory access pattern. The primary disadvantage of using them is that detailed, quantitative analysis of performance behavior of all codes on all machines is difficult. One important addition to the benchmark set appears for the first time in this report. Whereas the older version was written for a vector processor, the newer version is more optimized for microprocessor architectures. Therefore, we have for the first time, an opportunity to measure performance on a single application using implementations that expose the respective strengths of vector and superscalar architecture. All results in this report are from single processors. A subsequent article will explore shared-memory multiprocessing performance of the 8400 system.« less

Positional reference system for ultraprecision machining

DOEpatents

Arnold, Jones B.; Burleson, Robert R.; Pardue, Robert M.

1982-01-01

A stable positional reference system for use in improving the cutting tool-to-part contour position in numerical controlled-multiaxis metal turning machines is provided. The reference system employs a plurality of interferometers referenced to orthogonally disposed metering bars which are substantially isolated from machine strain induced position errors for monitoring the part and tool positions relative to the metering bars. A microprocessor-based control system is employed in conjunction with the plurality of position interferometers and part contour description data inputs to calculate error components for each axis of movement and output them to corresponding axis drives with appropriate scaling and error compensation. Real-time position control, operating in combination with the reference system, makes possible the positioning of the cutting points of a tool along a part locus with a substantially greater degree of accuracy than has been attained previously in the art by referencing and then monitoring only the tool motion relative to a reference position located on the machine base.

Positional reference system for ultraprecision machining

DOEpatents

Arnold, J.B.; Burleson, R.R.; Pardue, R.M.

1980-09-12

A stable positional reference system for use in improving the cutting tool-to-part contour position in numerical controlled-multiaxis metal turning machines is provided. The reference system employs a plurality of interferometers referenced to orthogonally disposed metering bars which are substantially isolated from machine strain induced position errors for monitoring the part and tool positions relative to the metering bars. A microprocessor-based control system is employed in conjunction with the plurality of positions interferometers and part contour description data input to calculate error components for each axis of movement and output them to corresponding axis driven with appropriate scaling and error compensation. Real-time position control, operating in combination with the reference system, makes possible the positioning of the cutting points of a tool along a part locus with a substantially greater degree of accuracy than has been attained previously in the art by referencing and then monitoring only the tool motion relative to a reference position located on the machine base.

Study on Intelligent Multi-concentrates Feeding System for Dairy Cow

NASA Astrophysics Data System (ADS)

Yan, Yinfa; Wang, Ranran; Song, Zhanhua; Yan, Shitao; Li, Fa-De

To implement precision feeding for dairy cow, an intelligent multi-concentrates feeding system was developed. The system consists of two parts, one is precision ingredients control subsystem, the other is multi-concentrates discharge subsystem. The former controls the latter with 4 stepper motors. The precision ingredients control subsystem was designed based on Samsung S3C2440 ARM9 microprocessor and WinCE5.0 embedded operating system. The feeding system identifies the dairy cow with passive transponder using RFID (Radio frequency identification) reader. According to the differences of based diet intake and individual dairy cow milk yield, the system can automatically and quantificationally discharge 4 kinds of different concentrates on the basis of the cow identification ID. The intelligent multi-concentrates feeding system for dairy cow has been designed and implemented. According to the experiment results, the concentrate feeding error is less than 5%, the cow inditification delay time is less than 0.5s and the cow inditification error rate is less than 0.01%.

A new study on the emission of EM waves from large EAS

NASA Technical Reports Server (NTRS)

Pathak, K. M.; Mazumdar, G. K. D.

1985-01-01

A method used in locating the core of individual cosmic ray showers is described. Using a microprocessor-based detecting system, the density distribution and hence, energy of each detected shower was estimated.

[General-purpose microcomputer for medical laboratory instruments].

PubMed

Vil'ner, G A; Dudareva, I E; Kurochkin, V E; Opalev, A A; Polek, A M

1984-01-01

Presented in the paper is the microcomputer based on the KP580 microprocessor set. Debugging of the hardware and the software by using the unique debugging stand developed on the basis of microcomputer "Electronica-60" is discussed.

Microprocessors as a Vehicle for Teaching Circuit Analysis.

ERIC Educational Resources Information Center

Neu, Emil C.

1982-01-01

Based on the premise that most engineering students will own their own microcomputers, discusses the teaching of circuit analysis, possible directions to be taken in hardware analysis, and impact on the mathematics related to circuit analysis. (SK)

Nuclear Science Symposium, 23rd, Scintillation and Semiconductor Counter Symposium, 15th, and Nuclear Power Systems Symposium, 8th, New Orleans, La., October 20-22, 1976, Proceedings

NASA Technical Reports Server (NTRS)

Wagner, L. J.

1977-01-01

The volume includes papers on semiconductor radiation detectors of various types, components of radiation detection and dosimetric systems, digital and microprocessor equipment in nuclear industry and science, and a wide variety of applications of nuclear radiation detectors. Semiconductor detectors of X-rays, gamma radiation, heavy ions, neutrons, and other nuclear particles, plastic scintillator arrays, drift chambers, spark wire chambers, and radiation dosimeter systems are reported on. Digital and analog conversion systems, digital data and control systems, microprocessors, and their uses in scientific research and nuclear power plants are discussed. Large-area imaging and biomedical nucleonic instrumentation, nuclear power plant safeguards, reactor instrumentation, nuclear power plant instrumentation, space instrumentation, and environmental instrumentation are dealt with. Individual items are announced in this issue.

APPLEPIPS /Apple Personal Image Processing System/ - An interactive digital image processing system for the Apple II microcomputer

NASA Technical Reports Server (NTRS)

Masuoka, E.; Rose, J.; Quattromani, M.

1981-01-01

Recent developments related to microprocessor-based personal computers have made low-cost digital image processing systems a reality. Image analysis systems built around these microcomputers provide color image displays for images as large as 256 by 240 pixels in sixteen colors. Descriptive statistics can be computed for portions of an image, and supervised image classification can be obtained. The systems support Basic, Fortran, Pascal, and assembler language. A description is provided of a system which is representative of the new microprocessor-based image processing systems currently on the market. While small systems may never be truly independent of larger mainframes, because they lack 9-track tape drives, the independent processing power of the microcomputers will help alleviate some of the turn-around time problems associated with image analysis and display on the larger multiuser systems.

Using a Cray Y-MP as an array processor for a RISC Workstation

NASA Technical Reports Server (NTRS)

Lamaster, Hugh; Rogallo, Sarah J.

1992-01-01

As microprocessors increase in power, the economics of centralized computing has changed dramatically. At the beginning of the 1980's, mainframes and super computers were often considered to be cost-effective machines for scalar computing. Today, microprocessor-based RISC (reduced-instruction-set computer) systems have displaced many uses of mainframes and supercomputers. Supercomputers are still cost competitive when processing jobs that require both large memory size and high memory bandwidth. One such application is array processing. Certain numerical operations are appropriate to use in a Remote Procedure Call (RPC)-based environment. Matrix multiplication is an example of an operation that can have a sufficient number of arithmetic operations to amortize the cost of an RPC call. An experiment which demonstrates that matrix multiplication can be executed remotely on a large system to speed the execution over that experienced on a workstation is described.