AlGaN channel field effect transistors with graded heterostructure ohmic contacts

NASA Astrophysics Data System (ADS)

Bajaj, Sanyam; Akyol, Fatih; Krishnamoorthy, Sriram; Zhang, Yuewei; Rajan, Siddharth

2016-09-01

We report on ultra-wide bandgap (UWBG) Al0.75Ga0.25N channel metal-insulator-semiconductor field-effect transistors (MISFETs) with heterostructure engineered low-resistance ohmic contacts. The low intrinsic electron affinity of AlN (0.6 eV) leads to large Schottky barriers at the metal-AlGaN interface, resulting in highly resistive ohmic contacts. In this work, we use a reverse compositional graded n++ AlGaN contact layer to achieve upward electron affinity grading, leading to a low specific contact resistance (ρsp) of 1.9 × 10-6 Ω cm2 to n-Al0.75Ga0.25N channels (bandgap ˜5.3 eV) with non-alloyed contacts. We also demonstrate UWBG Al0.75Ga0.25N channel MISFET device operation employing the compositional graded n++ ohmic contact layer and 20 nm atomic layer deposited Al2O3 as the gate-dielectric.

Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.

PubMed

Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan

2015-09-22

This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

NASA Astrophysics Data System (ADS)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

AlGaN Channel Transistors for Power Management and Distribution

NASA Technical Reports Server (NTRS)

VanHove, James M.

1996-01-01

Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Kim, Hyeongnam; Nath, Digbijoy; Rajan, Siddharth; Lu, Wu

2013-01-01

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/ p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al0.2Ga0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al0.3Ga0.7N/GaN channel/Al0.2Ga0.8N/ p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80- μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al0.3GaN0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.

Can p-channel tunnel field-effect transistors perform as good as n-channel?

DOE Office of Scientific and Technical Information (OSTI.GOV)

Verhulst, A. S., E-mail: anne.verhulst@imec.be; Pourghaderi, M. A.; Collaert, N.

2014-07-28

We show that bulk semiconductor materials do not allow perfectly complementary p- and n-channel tunnel field-effect transistors (TFETs), due to the presence of a heavy-hole band. When tunneling in p-TFETs is oriented towards the gate-dielectric, field-induced quantum confinement results in a highest-energy subband which is heavy-hole like. In direct-bandgap IIIV materials, the most promising TFET materials, phonon-assisted tunneling to this subband degrades the subthreshold swing and leads to at least 10× smaller on-current than the desired ballistic on-current. This is demonstrated with quantum-mechanical predictions for p-TFETs with tunneling orthogonal to the gate, made out of InP, In{sub 0.53}Ga{sub 0.47}As, InAs,more » and a modified version of In{sub 0.53}Ga{sub 0.47}As with an artificially increased conduction-band density-of-states. We further show that even if the phonon-assisted current would be negligible, the build-up of a heavy-hole-based inversion layer prevents efficient ballistic tunneling, especially at low supply voltages. For p-TFET, a strongly confined n-i-p or n-p-i-p configuration is therefore recommended, as well as a tensily strained line-tunneling configuration.« less

Investigation of performance enhancement in InAs/InGaAs heterojunction-enhanced N-channel tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Han, Genquan; Zhao, Bin; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Hu, Shengdong; Hao, Yue

2015-12-01

We design a heterojunction-enhanced n-channel tunneling field effect transistor (HE-TFET) with an InAs/In1-xGaxAs heterojunction located in channel region with a distance of LT-H from source/channel tunneling junction. The influence of LT-H on the performance of HE-TFETs is investigated by simulation. Compared with InAs homo-NTFET, the positive shift of onset voltage, the steeper subthreshold swing (SS), and the enhanced on-state current ION are achieved in HE-NTFETs, which is attributed to the modulation of the heterojunction on band-to-band tunneling. At a supply voltage of 0.3 V, ION of InAs/In0.9Ga0.1As HE-NTFET with a LT-H of 6 nm demonstrates an enhancement of 119.3% in comparison with the homo device. Furthermore, the impact of Ga composition on the performance of HE-NTFETs is studied. As the Ga composition increases, the average SS characteristics of HE-NTFETs are improved, while the drive current of devices is reduced due to the increasing of tunneling barrier.

Ideal Channel Field Effect Transistors

DTIC Science & Technology

2010-03-01

well as on /?-GaAs/w-GaAs homojunctions grown by molecular beam epitaxy (MBE). The diode I-Vs at reverse bias are plotted below. The measured breakdown...transistors and composite channel InAlAs/InGaAs/lnP/InAlAs high electron mobility transistors ( HEMTs ), which have taken the full advantage of the matched...result in a large number of dislocations in GaAs films epitaxially grown on wurtzite GaN. In this work, we have successfully integrated GaAs with GaN

Source-Coupled, N-Channel, JFET-Based Digital Logic Gate Structure Using Resistive Level Shifters

NASA Technical Reports Server (NTRS)

Krasowski, Michael J.

2011-01-01

A circuit topography is used to create usable, digital logic gates using N (negatively doped) channel junction field effect transistors (JFETs), load resistors, level shifting resistors, and supply rails whose values are based on the DC parametric distributions of these JFETs. This method has direct application to the current state-of-the-art in high-temperature (300 to 500 C and higher) silicon carbide (SiC) device production, and defines an adaptation to the logic gate described in U.S. Patent 7,688,117 in that, by removing the level shifter from the output of the gate structure described in the patent (and applying it to the input of the same gate), a source-coupled gate topography is created. This structure allows for the construction AND/OR (sum of products) arrays that use far fewer transistors and resistors than the same array as constructed from the gates described in the aforementioned patent. This plays a central role when large multiplexer constructs are necessary; for example, as in the construction of memory. This innovation moves the resistive level shifter from the output of the basic gate structure to the front as if the input is now configured as what would be the output of the preceding gate, wherein the output is the two level shifting resistors. The output of this innovation can now be realized as the lone follower transistor with its source node as the gate output. Additionally, one may leave intact the resistive level shifter on the new gate topography. A source-coupled to direct-coupled logic translator will be the result.

P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas

PubMed Central

Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

2016-01-01

The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of −2 V and drain bias of −15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm2/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG. PMID:27021054

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

NASA Astrophysics Data System (ADS)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Graphene-based field-effect transistor biosensors

DOEpatents

Chen; , Junhong; Mao, Shun; Lu, Ganhua

2017-06-14

The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

Design consideration of δ-doping channels for high-performance n + - GaAs / p + -InGaP/n-GaAs camel-gate field effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui; Chen, Jeng-Shyan; Chu, Yu-Jui

2005-01-01

The influence of δ-doping channels on the performance of n +-GaAs/p +-InGaP/n-GaAs camel-gate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration-thickness products of the n-GaAs layer and δ-doping layer are fixed, the higher δ-doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n +=5.5×10 12 cm -2δ-doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications.

Field-Effect Transistors Based on Networks of Highly Aligned, Chemically Synthesized N = 7 Armchair Graphene Nanoribbons.

PubMed

Passi, Vikram; Gahoi, Amit; Senkovskiy, Boris V; Haberer, Danny; Fischer, Felix R; Grüneis, Alexander; Lemme, Max C

2018-03-28

We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percolation threshold. The long channel transistors exhibit a maximum I ON / I OFF current ratio of 87.5.

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrappedmore » around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.« less

Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

NASA Astrophysics Data System (ADS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

2015-10-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

PubMed Central

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L.; Banyai, Douglas; Savaikar, Madhusudan A.; Jaszczak, John A.; Yap, Yoke Khin

2016-01-01

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending. PMID:26846587

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE PAGES

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; ...

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors.

PubMed

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L; Banyai, Douglas; Savaikar, Madhusudan A; Jaszczak, John A; Yap, Yoke Khin

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.

AlN metal-semiconductor field-effect transistors using Si-ion implantation

NASA Astrophysics Data System (ADS)

Okumura, Hironori; Suihkonen, Sami; Lemettinen, Jori; Uedono, Akira; Zhang, Yuhao; Piedra, Daniel; Palacios, Tomás

2018-04-01

We report on the electrical characterization of Si-ion implanted AlN layers and the first demonstration of metal-semiconductor field-effect transistors (MESFETs) with an ion-implanted AlN channel. The ion-implanted AlN layers with Si dose of 5 × 1014 cm-2 exhibit n-type characteristics after thermal annealing at 1230 °C. The ion-implanted AlN MESFETs provide good drain current saturation and stable pinch-off operation even at 250 °C. The off-state breakdown voltage is 2370 V for drain-to-gate spacing of 25 µm. These results show the great potential of AlN-channel transistors for high-temperature and high-power applications.

Air-stable n-channel organic thin-film transistors with high field-effect mobility based on N ,N'-bis(heptafluorobutyl)-3,4:9,10-perylene diimide

NASA Astrophysics Data System (ADS)

Oh, Joon Hak; Liu, Shuhong; Bao, Zhenan; Schmidt, Rüdiger; Würthner, Frank

2007-11-01

The thin-film transistor characteristics of n-channel organic semiconductor, N ,N'-bis(2,2,3,3,4,4,4-heptafluorobutyl)-perylene tetracarboxylic diimide, are described. The slip-stacked face-to-face molecular packing allows a very dense parallel arrangement of the molecules, leading to field-effect mobility as high as 0.72cm2V-1s-1. The mobility only slightly decreased after exposure to air and remained stable for more than 50days. Our results reveal that molecular packing effects such as close stacking of perylene diimide units and segregation effects imparted by the fluorinated side chains are crucial for the air stability.

Inversion channel diamond metal-oxide-semiconductor field-effect transistor with normally off characteristics.

PubMed

Matsumoto, Tsubasa; Kato, Hiromitsu; Oyama, Kazuhiro; Makino, Toshiharu; Ogura, Masahiko; Takeuchi, Daisuke; Inokuma, Takao; Tokuda, Norio; Yamasaki, Satoshi

2016-08-22

We fabricated inversion channel diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off characteristics. At present, Si MOSFETs and insulated gate bipolar transistors (IGBTs) with inversion channels are widely used because of their high controllability of electric power and high tolerance. Although a diamond semiconductor is considered to be a material with a strong potential for application in next-generation power devices, diamond MOSFETs with an inversion channel have not yet been reported. We precisely controlled the MOS interface for diamond by wet annealing and fabricated p-channel and planar-type MOSFETs with phosphorus-doped n-type body on diamond (111) substrate. The gate oxide of Al2O3 was deposited onto the n-type diamond body by atomic layer deposition at 300 °C. The drain current was controlled by the negative gate voltage, indicating that an inversion channel with a p-type character was formed at a high-quality n-type diamond body/Al2O3 interface. The maximum drain current density and the field-effect mobility of a diamond MOSFET with a gate electrode length of 5 μm were 1.6 mA/mm and 8.0 cm(2)/Vs, respectively, at room temperature.

Recent progress in n-channel organic thin-film transistors.

PubMed

Wen, Yugeng; Liu, Yunqi

2010-03-26

Particular attention has been focused on n-channel organic thin-film transistors (OTFTs) during the last few years, and the potentially cost-effective circuitry-based applications in flexible electronics, such as flexible radiofrequency identity tags, smart labels, and simple displays, will benefit from this fast development. This article reviews recent progress in performance and molecular design of n-channel semiconductors in the past five years, and limitations and practicable solutions for n-channel OTFTs are dealt with from the viewpoint of OTFT constitution and geometry, molecular design, and thin-film growth conditions. Strategy methodology is especially highlighted with an aim to investigate basic issues in this field.

Complementary spin transistor using a quantum well channel.

PubMed

Park, Youn Ho; Choi, Jun Woo; Kim, Hyung-Jun; Chang, Joonyeon; Han, Suk Hee; Choi, Heon-Jin; Koo, Hyun Cheol

2017-04-20

In order to utilize the spin field effect transistor in logic applications, the development of two types of complementary transistors, which play roles of the n- and p-type conventional charge transistors, is an essential prerequisite. In this research, we demonstrate complementary spin transistors consisting of two types of devices, namely parallel and antiparallel spin transistors using InAs based quantum well channels and exchange-biased ferromagnetic electrodes. In these spin transistors, the magnetization directions of the source and drain electrodes are parallel or antiparallel, respectively, depending on the exchange bias field direction. Using this scheme, we also realize a complementary logic operation purely with spin transistors controlled by the gate voltage, without any additional n- or p-channel transistor.

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

2005-01-01

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons.

PubMed

Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela; Shi, Wu; Lee, Kyunghoon; Wu, Shuang; Yong Choi, Byung; Braganza, Rohit; Lear, Jordan; Kau, Nicholas; Choi, Wonwoo; Chen, Chen; Pedramrazi, Zahra; Dumslaff, Tim; Narita, Akimitsu; Feng, Xinliang; Müllen, Klaus; Fischer, Felix; Zettl, Alex; Ruffieux, Pascal; Yablonovitch, Eli; Crommie, Michael; Fasel, Roman; Bokor, Jeffrey

2017-09-21

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch  ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on  > 1 μA at V d  = -1 V) and high I on /I off  ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.Graphene nanoribbons show promise for high-performance field-effect transistors, however they often suffer from short lengths and wide band gaps. Here, the authors use a bottom-up synthesis approach to fabricate 9- and 13-atom wide ribbons, enabling short-channel transistors with 10 5 on-off current ratio.

Effect of graded InGaN drain region and 'In' fraction in InGaN channel on performances of InGaN tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Duan, Xiaoling; Zhang, Jincheng; Wang, Shulong; Quan, Rudai; Hao, Yue

2017-12-01

An InGaN-based graded drain region tunnel field-effect transistor (GD-TFET) is proposed to suppress the ambipolar behavior. The simulation results with the trade-off between on-state current (Ion) and ambipolar current (Iambipolar) show decreased Iambipolar (1.9 × 10-14 A/μm) in comparison with that of conventional TFETs (2.0 × 10-8 A/μm). Furthermore, GD-TFET with high 'In' fraction InxGa1-xN source-side channel (SC- GD-TFET) is explored and exhibits 5.3 times Ion improvement and 60% average subthreshold swing (SSavg) reduction in comparison with GD-TFET by adjusting 'In' fraction in the InxGa1-xN source-side channel. The improvement is attributed to the confinement of BTBT in the source-side channel by the heterojunction. And then, the optimum value for source-side channel length (Lsc) is researched by DC performances results, which shows it falls into the range between Lsc = 10 nm and 20 nm.

Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene

NASA Astrophysics Data System (ADS)

Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal

2018-06-01

Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.

Influence of gate width on gate-channel carrier mobility in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Yang, Ming; Ji, Qizheng; Gao, Zhiliang; Zhang, Shufeng; Lin, Zhaojun; Yuan, Yafei; Song, Bo; Mei, Gaofeng; Lu, Ziwei; He, Jihao

2017-11-01

For the fabricated AlGaN/GaN heterostructure field-effect transistors (HFETs) with different gate widths, the gate-channel carrier mobility is experimentally obtained from the measured current-voltage and capacitance-voltage curves. Under each gate voltage, the mobility gets lower with gate width increasing. Analysis shows that the phenomenon results from the polarization Coulomb field (PCF) scattering, which originates from the irregularly distributed polarization charges at the AlGaN/GaN interface. The device with a larger gate width is with a larger PCF scattering potential and a stronger PCF scattering intensity. As a function of gate width, PCF scattering potential shows a same trend with the mobility variation. And the theoretically calculated mobility values fits well with the experimentally obtained values. Varying gate widths will be a new perspective for the improvement of device characteristics by modulating the gate-channel carrier mobility.

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

NASA Astrophysics Data System (ADS)

Hu, Ai-Bin; Xu, Qiu-Xia

2010-05-01

Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.

Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons

DOE Office of Scientific and Technical Information (OSTI.GOV)

Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and highmore » I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.« less

Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons

DOE PAGES

Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela; ...

2017-09-21

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and highmore » I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.« less

Programmable Schottky Junctions Based on Ferroelectric Gated MoS2 Transistors

NASA Astrophysics Data System (ADS)

Xiao, Zhiyong; Song, Jingfeng; Drcharme, Stephen; Hong, Xia

We report a programmable Schottky junction based on MoS2 field effect transistors with a SiO2 back gate and a ferroelectric copolymer poly(vinylidene-fluoride-trifluorethylene) (PVDF) top gate. We fabricated mechanically exfoliated single layer MoS2 flakes into two point devices via e-beam lithography, and deposited on the top of the devices ~20 nm PVDF thin films. The polarization of the PVDF layer is controlled locally by conducting atomic force microscopy. The devices exhibit linear ID-VD characteristics when the ferroelectric gate is uniformly polarized in one direction. We then polarized the gate into two domains with opposite polarization directions, and observed that the ID-VD characteristics of the MoS2 channel can be modulated between linear and rectified behaviors depending on the back gate voltage. The nonlinear ID-VD relation emerges when half of the channel is in the semiconductor phase while the other half is in the metallic phase, and it can be well described by the thermionic emission model with a Schottky barrier of ~0.5 eV. The Schottky junction can be erased by re-write the entire channel in the uniform polarization state. Our study facilitates the development of programmable, multifunctional nanoelectronics based on layered 2D TMDs..

Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors

PubMed

Kagan; Mitzi; Dimitrakopoulos

1999-10-29

Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

PubMed

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

High-mobility field-effect transistor based on crystalline ZnSnO3 thin films

NASA Astrophysics Data System (ADS)

Minato, Hiroya; Fujiwara, Kohei; Tsukazaki, Atsushi

2018-05-01

We propose crystalline ZnSnO3 as a new channel material for field-effect transistors. By molecular-beam epitaxy on LiNbO3(0001) substrates, we synthesized films of ZnSnO3, which crystallizes in the LiNbO3-type polar structure. Field-effect transistors on ZnSnO3 exhibit n-type operation with field-effect mobility of as high as 45 cm2V-1s-1 at room temperature. Systematic examination of the transistor operation for channels with different Zn/Sn compositional ratios revealed that the observed high-mobility reflects the nature of stoichiometric ZnSnO3 phase. Moreover, we found an indication of coupling of transistor characteristics with intrinsic spontaneous polarization in ZnSnO3, potentially leading to a distinct type of polarization-induced conduction.

Electrically controlled wire-channel GaN/AlGaN transistor for terahertz plasma applications

NASA Astrophysics Data System (ADS)

Cywiński, G.; Yahniuk, I.; Kruszewski, P.; Grabowski, M.; Nowakowski-Szkudlarek, K.; Prystawko, P.; Sai, P.; Knap, W.; Simin, G. S.; Rumyantsev, S. L.

2018-03-01

We report on a design of fin-shaped channel GaN/AlGaN field-effect transistors developed for studying resonant terahertz plasma oscillations. Unlike common two dimensional FinFET transistor design, the gates were deposited only to the sides of the two dimensional electron gas channel, i.e., metal layers were not deposited on the top of the AlGaN. This side gate configuration allowed us to electrically control the conductivity of the channel by changing its width while keeping the carrier density and mobility virtually unchanged. Computer simulations and analytical model describe well the general shape of the characteristics. The side gate control of the channel width of these transistors allowed us to eliminate the so-called oblique plasma wave modes and paves the way towards future terahertz detectors and emitters using high quality factor plasma wave resonances.

InN/InGaN complementary heterojunction-enhanced tunneling field-effect transistor with enhanced subthreshold swing and tunneling current

NASA Astrophysics Data System (ADS)

Peng, Yue; Han, Genquan; Wang, Hongjuan; Zhang, Chunfu; Liu, Yan; Wang, Yibo; Zhao, Shenglei; Zhang, Jincheng; Hao, Yue

2016-05-01

InN/In0.75Ga0.25N complementary heterojunction-enhanced tunneling field-effect transistors (HE-TFETs) were characterized using the numerical simulation. InN/In0.75Ga0.25N HE-TFET has an InN/In0.75Ga0.25N heterojunction located in the channel region with a distance of LT-H from the source/channel tunneling junction. We demonstrate that, for both n- and p-channel devices, HE-TFETs have a delay of onset voltage VONSET, a steeper subthreshold swing (SS), and an enhanced on-state current ION in comparison with the homo-TFETs. InN/In0.75Ga0.25N n- and p-channel HE-TFETs with a gate length LG of 25 nm and a LT-H of 5 nm achieve a 7 and 9 times ION improvement in comparison with the homo devices, respectively, at a supply voltage of 0.3 V. The performance enhancement in HE-TFETs is attributed to the modulating effect of heterojunction on band-to-band tunneling (BTBT). Because InN/In0.75Ga0.25N heterointerface shows the similar band offsets at conduction and valence bands, the InN/In0.75Ga0.25N heterojunction exhibits the improved effect on BTBT for both n- and p-channel devices. This makes InN/In0.75Ga0.25N heterojunction a promising structure for high performance complementary TFETs.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Electron mobility in InGaN channel heterostructure field effect transistor structures with different barriers

NASA Astrophysics Data System (ADS)

Xie, J.; Leach, J. H.; Ni, X.; Wu, M.; Shimada, R.; Özgür, Ü.; Morkoç, H.

2007-12-01

InGaN possesses higher electron mobility and velocity than GaN, and therefore is expected to lead to relatively better performances for heterostructure field effect transistors (HFETs). However, the reported mobilities for AlGaN /InGaN HFETs are lower than GaN channel HFETs. To address this issue, we studied the effect of different barriers on the Hall mobility for InGaN channel HFETs grown by metal organic chemical vapor deposition. Unlike the conventional AlGaN barrier, the AlInN barrier can be grown at the same temperature as the InGaN channel layer, alleviating some of the technological roadblocks. Specifically, this avoids possible degradation of the thin InGaN channel during AlGaN growth at high temperatures; and paves the way for better interfaces. An undoped In0.18Al0.82N/AlN/In0.04Ga0.96N HFET structure exhibited a μH=820cm2/Vs, with a ns=2.12×1013cm-2 at room temperature. Moreover, with an In-doped AlGaN barrier, namely, Al0.24In0.01Ga0.75N, grown at 900°C, the μH increased to 1230cm2/Vs with a ns of 1.09×1013cm-2 for a similar InGaN channel. Furthermore, when the barrier was replaced by Al0.25Ga0.75N grown at 1030°C, μH dropped to 870cm2/Vs with ns of 1.26×1013cm-2 at room temperature. Our results suggest that to fully realize the potential of the InGaN channel HFETs, AlInN or AlInGaN should be used as the barrier instead of the conventional AlGaN barrier.

Investigation of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors for logic application

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2014-01-01

DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.

Carrier mobility in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Benwadih, Mohamed; Gwoziecki, Romain; Coppard, Romain; Minari, Takeo; Liu, Chuan; Tsukagoshi, Kazuhito; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-11-01

A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density dependences of mobility in organic transistors.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations

NASA Astrophysics Data System (ADS)

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-01

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations.

PubMed

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-15

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Electrolyte-gated transistors based on conducting polymer nanowire junction arrays.

PubMed

Alam, Maksudul M; Wang, Jun; Guo, Yaoyao; Lee, Stephanie P; Tseng, Hsian-Rong

2005-07-07

In this study, we describe the electrolyte gating and doping effects of transistors based on conducting polymer nanowire electrode junction arrays in buffered aqueous media. Conducting polymer nanowires including polyaniline, polypyrrole, and poly(ethylenedioxythiophene) were investigated. In the presence of a positive gate bias, the device exhibits a large on/off current ratio of 978 for polyaniline nanowire-based transistors; these values vary according to the acidity of the gate medium. We attribute these efficient electrolyte gating and doping effects to the electrochemically fabricated nanostructures of conducting polymer nanowires. This study demonstrates that two-terminal devices can be easily converted into three-terminal transistors by simply immersing the device into an electrolyte solution along with a gate electrode. Here, the field-induced modulation can be applied for signal amplification to enhance the device performance.

Performance improvement in novel germanium-tin/germanium heterojunction-enhanced p-channel tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Wang, Hongjuan; Liu, Yan; Liu, Mingshan; Zhang, Qingfang; Zhang, Chunfu; Ma, Xiaohua; Zhang, Jincheng; Hao, Yue; Han, Genquan

2015-07-01

We design a novel GeSn-based heterojunction-enhanced p-channel tunneling field-effect transistor (HE-PTFET) with a Ge0.92Sn0.08/Ge heterojunction located in channel region, at a distance of LT-H from the Ge0.92Sn0.08 source-channel tunneling junction (TJ). HE-PTFETs demonstrate the negative shift of onset voltage VONSET, the steeper subthreshold swing S, and the improved on-state current ION compared to Ge0.92Sn0.08 homo-PTFET. At low VGS, the suppression of BTBT due to the widening of the tunneling barrier caused by the heterojunction leads to a negative shift of VONSET in HE-PTFETs. At high VGS, ION enhancement in HE-PTFETs is achieved over the homo device, which is attributed to the confinement of BTBT in Ge0.92Sn0.08 source-channel TJ region by the heterojunction, where the short tunneling paths lead to a high tunneling probability. Due to the steeper average S, HE-PTFET with a 6 nm LT-H achieves a 4 times higher ION compared to homo device at a VDD of -0.3 V.

Hydrothermally Processed Photosensitive Field-Effect Transistor Based on ZnO Nanorod Networks

NASA Astrophysics Data System (ADS)

Kumar, Ashish; Bhargava, Kshitij; Dixit, Tejendra; Palani, I. A.; Singh, Vipul

2016-11-01

Formation of a stable, reproducible zinc oxide (ZnO) nanorod-network-based photosensitive field-effect transistor using a hydrothermal process at low temperature has been demonstrated. K2Cr2O7 additive was used to improve adhesion and facilitate growth of the ZnO nanorod network over the SiO2/Si substrate. Transistor characteristics obtained in the dark resemble those of the n-channel-mode field-effect transistor (FET). The devices showed I on/ I off ratio above 8 × 102 under dark condition, field-effect mobility of 4.49 cm2 V-1 s-1, and threshold voltage of -12 V. Further, under ultraviolet (UV) illumination, the FET exhibited sensitivity of 2.7 × 102 in off-state (-10 V) versus 1.4 in on-state (+9.7 V) of operation. FETs based on such nanorod networks showed good photoresponse, which is attributed to the large surface area of the nanorod network. The growth temperature for ZnO nanorod networks was kept at 110°C, enabling a low-temperature, cost-effective, simple approach for high-performance ZnO-based FETs for large-scale production. The role of network interfaces in the FET performance is also discussed.

Theoretical investigation of GaAsBi/GaAsN tunneling field-effect transistors with type-II staggered tunneling junction

NASA Astrophysics Data System (ADS)

Wang, Yibo; Liu, Yan; Han, Genquan; Wang, Hongjuan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

2017-06-01

We investigate GaAsBi/GaAsN system for the design of type-II staggered hetero tunneling field-effect transistor (hetero-TFET). Strain-symmetrized GaAsBi/GaAsN with effective lattice match to GaAs exhibits a type-II band lineup, and the effective bandgap EG,eff at interface is significantly reduced with the incorporation of Bi and N elements. The band-to-band tunneling (BTBT) rate and drive current of GaAsBi/GaAsN hetero-TFETs are boosted due to the utilizing of the type-II staggered tunneling junction with the reduced EG,eff. Numerical simulation shows that the drive current and subthreshold swing (SS) characteristics of GaAsBi/GaAsN hetero-TFETs are remarkably improved by increasing Bi and N compositions. The dilute content GaAs0.85Bi0.15/GaAs0.92N0.08 staggered hetero-nTFET achieves 7.8 and 550 times higher ION compared to InAs and In0.53Ga0.47As homo-TFETs, respectively, at the supply voltage of 0.3 V. GaAsBi/GaAsN heterostructure is a potential candidate for high performance TFET.

Low electron mobility of field-effect transistor determined by modulated magnetoresistance

NASA Astrophysics Data System (ADS)

Tauk, R.; Łusakowski, J.; Knap, W.; Tiberj, A.; Bougrioua, Z.; Azize, M.; Lorenzini, P.; Sakowicz, M.; Karpierz, K.; Fenouillet-Beranger, C.; Cassé, M.; Gallon, C.; Boeuf, F.; Skotnicki, T.

2007-11-01

Room temperature magnetotransport experiments were carried out on field-effect transistors in magnetic fields up to 10 T. It is shown that measurements of the transistor magnetoresistance and its first derivative with respect to the gate voltage allow the derivation of the electron mobility in the gated part of the transistor channel, while the access/contact resistances and the transistor gate length need not be known. We demonstrate the potential of this method using GaN and Si field-effect transistors and discuss its importance for mobility measurements in transistors with nanometer gate length.

Simulation study of short-channel effects of tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Fukuda, Koichi; Asai, Hidehiro; Hattori, Junichi; Mori, Takahiro; Morita, Yukinori; Mizubayashi, Wataru; Masahara, Meishoku; Migita, Shinji; Ota, Hiroyuki; Endo, Kazuhiro; Matsukawa, Takashi

2018-04-01

Short-channel effects of tunnel field-effect transistors (FETs) are investigated in detail using simulations of a nonlocal band-to-band tunneling model. Discussion is limited to silicon. Several simulation scenarios were considered to address different effects, such as source overlap and drain offset effects. Adopting the drain offset to suppress the drain leakage current suppressed the short channel effects. The physical mechanism underlying the short-channel behavior of the tunnel FETs (TFETs) was very different from that of metal-oxide-semiconductor FETs (MOSFETs). The minimal gate lengths that do not lose on-state current by one order are shown to be 3 nm for single-gate structures and 2 nm for double gate structures, as determined from the drain offset structure.

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Almad

2009-01-01

high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

2015-04-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

Integrated digital inverters based on two-dimensional anisotropic ReS₂ field-effect transistors

DOE PAGES

Liu, Erfu; Fu, Yajun; Wang, Yaojia; ...

2015-05-07

Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS₂) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS₂ field-effect transistors, which exhibit competitive performance with large current on/off ratios (~10⁷) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconductingmore » materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS₂ anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications.« less

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

NASA Technical Reports Server (NTRS)

Krasowski, Michael J.

2008-01-01

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

Design, fabrication, and performance analysis of GaN vertical electron transistors with a buried p/n junction

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yeluri, Ramya, E-mail: ramyay@ece.ucsb.edu; Lu, Jing; Keller, Stacia

2015-05-04

The Current Aperture Vertical Electron Transistor (CAVET) combines the high conductivity of the two dimensional electron gas channel at the AlGaN/GaN heterojunction with better field distribution offered by a vertical design. In this work, CAVETs with buried, conductive p-GaN layers as the current blocking layer are reported. The p-GaN layer was regrown by metalorganic chemical vapor deposition and the subsequent channel regrowth was done by ammonia molecular beam epitaxy to maintain the p-GaN conductivity. Transistors with high ON current (10.9 kA/cm{sup 2}) and low ON-resistance (0.4 mΩ cm{sup 2}) are demonstrated. Non-planar selective area regrowth is identified as the limiting factormore » to transistor breakdown, using planar and non-planar n/p/n structures. Planar n/p/n structures recorded an estimated electric field of 3.1 MV/cm, while non-planar structures showed a much lower breakdown voltage. Lowering the p-GaN regrowth temperature improved breakdown in the non-planar n/p/n structure. Combining high breakdown voltage with high current will enable GaN vertical transistors with high power densities.« less

Quantum simulation of an ultrathin body field-effect transistor with channel imperfections

NASA Astrophysics Data System (ADS)

Vyurkov, V.; Semenikhin, I.; Filippov, S.; Orlikovsky, A.

2012-04-01

An efficient program for the all-quantum simulation of nanometer field-effect transistors is elaborated. The model is based on the Landauer-Buttiker approach. Our calculation of transmission coefficients employs a transfer-matrix technique involving the arbitrary precision (multiprecision) arithmetic to cope with evanescent modes. Modified in such way, the transfer-matrix technique turns out to be much faster in practical simulations than that of scattering-matrix. Results of the simulation demonstrate the impact of realistic channel imperfections (random charged centers and wall roughness) on transistor characteristics. The Landauer-Buttiker approach is developed to incorporate calculation of the noise at an arbitrary temperature. We also validate the ballistic Landauer-Buttiker approach for the usual situation when heavily doped contacts are indispensably included into the simulation region.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Enhanced sheet carrier densities in polarization controlled AlInN/AlN/GaN/InGaN field-effect transistor on Si (111)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hennig, J., E-mail: jonas.hennig@ovgu.de; Dadgar, A.; Witte, H.

2015-07-15

We report on GaN based field-effect transistor (FET) structures exhibiting sheet carrier densities of n = 2.9 10{sup 13} cm{sup −2} for high-power transistor applications. By grading the indium-content of InGaN layers grown prior to a conventional GaN/AlN/AlInN FET structure control of the channel width at the GaN/AlN interface is obtained. The composition of the InGaN layer was graded from nominally x{sub In} = 30 % to pure GaN just below the AlN/AlInN interface. Simulations reveal the impact of the additional InGaN layer on the potential well width which controls the sheet carrier density within the channel region of the devices.more » Benchmarking the In{sub x}Ga{sub 1−x}N/GaN/AlN/Al{sub 0.87}In{sub 0.13}N based FETs against GaN/AlN/AlInN FET reference structures we found increased maximum current densities of I{sub SD} = 1300 mA/mm (560 mA/mm). In addition, the InGaN layer helps to achieve broader transconductance profiles as well as reduced leakage currents.« less

Comparison between Field Effect Transistors and Bipolar Junction Transistors as Transducers in Electrochemical Sensors

NASA Astrophysics Data System (ADS)

Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish

2017-01-01

Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor.

Use of a bilayer lattice-matched AlInGaN barrier for improving the channel carrier confinement of enhancement-mode AlInGaN/GaN hetero-structure field-effect transistors

NASA Astrophysics Data System (ADS)

Rahbardar Mojaver, Hassan; Gosselin, Jean-Lou; Valizadeh, Pouya

2017-06-01

A quaternary lattice-matched layer structure based on employing a bilayer barrier for improving the carrier confinement in the channel of enhancement-mode metal-face c-plane wurtzite AlInGaN/GaN hetero-structure field effect transistors (HFETs) is for the first time proposed. Using the commercial self-consistent Poisson-Schrödinger solver Nextnano, electronic properties of the proposed hetero-structure, including the sheet charge density and carrier confinement on the GaN side of the hetero-interface, are evaluated. Based on these evaluations, it is shown that while the proposed layer structure substantially improves the carrier confinement in the GaN channel layer, it also upholds the merits of employing a lattice-matched barrier towards achieving an enhancement-mode operation (i.e., in the absence of the piezoelectric effect). According to these simulations, in terms of maintaining the required positive threshold-voltage for the enhancement-mode operation, it is also shown that the proposed layer structure substantially outperforms the quaternary AlInGaN/GaN HFETs employing a thin AlN spacer layer.

AlGaN/GaN field effect transistors for power electronics—Effect of finite GaN layer thickness on thermal characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hodges, C., E-mail: chris.hodges@bristol.ac.uk; Anaya Calvo, J.; Kuball, M.

2013-11-11

AlGaN/GaN heterostructure field effect transistors with a 150 nm thick GaN channel within stacked Al{sub x}Ga{sub 1−x}N layers were investigated using Raman thermography. By fitting a thermal simulation to the measured temperatures, the thermal conductivity of the GaN channel was determined to be 60 W m{sup −1} K{sup −1}, over 50% less than typical GaN epilayers, causing an increased peak channel temperature. This agrees with a nanoscale model. A low thermal conductivity AlGaN buffer means the GaN spreads heat; its properties are important for device thermal characteristics. When designing power devices with thin GaN layers, as well as electrical considerations, the reducedmore » channel thermal conductivity must be considered.« less

Selective area deposited n-Al0.5Ga0.5N channel field effect transistors with high solar-blind ultraviolet photo-responsivity

NASA Astrophysics Data System (ADS)

Muhtadi, S.; Hwang, S.; Coleman, A.; Asif, F.; Lunev, A.; Chandrashekhar, M. V. S.; Khan, A.

2017-04-01

We report on AlGaN field effect transistors over AlN/sapphire templates with selective area grown n-Al0.5Ga0.5N channel layers for which a field-effect mobility of 55 cm2/V-sec was measured. Using a pulsed plasma enhanced chemical vapor deposition deposited 100 A thick SiO2 layer as the gate-insulator, the gate-leakage currents were reduced by three orders of magnitude. These devices with or without gate insulators are excellent solar-blind ultraviolet detectors, and they can be operated either in the photoconductive or the photo-voltaic modes. In the photo-conductive mode, gain arising from hole-trapping in the depletion region leads to steady-state photoresponsivity as high as 1.2 × 106A/W at 254 nm, which drops sharply below 290 nm. A hole-trapping limited detector response time of 34 ms, fast enough for real-time flame-detection and imaging applications, was estimated.

Investigation of silicide-induced-dopant-activation for steep tunnel junction in tunnel field effect transistor (TFET)

NASA Astrophysics Data System (ADS)

Kim, Sihyun; Kwon, Dae Woong; Park, Euyhwan; Lee, Junil; Lee, Roongbin; Lee, Jong-Ho; Park, Byung-Gook

2018-02-01

Numerous researches for making steep tunnel junction within tunnel field-effect transistor (TFET) have been conducted. One of the ways to make an abrupt junction is source/drain silicidation, which uses the phenomenon often called silicide-induced-dopant-segregation. It is revealed that the silicide process not only helps dopants to pile up adjacent to the metal-silicon alloy, also induces the dopant activation, thereby making it possible to avoid additional high temperature process. In this report, the availability of dopant activation induced by metal silicide process was thoroughly investigated by diode measurement and device simulation. Metal-silicon (MS) diodes having p+ and n+ silicon formed on the p- substrate exhibit the characteristics of ohmic and pn diodes respectively, for both the samples with and without high temperature annealing. The device simulation for TFETs with dopant-segregated source was also conducted, which verified enhanced DC performance.

Integrated digital inverters based on two-dimensional anisotropic ReS2 field-effect transistors

PubMed Central

Liu, Erfu; Fu, Yajun; Wang, Yaojia; Feng, Yanqing; Liu, Huimei; Wan, Xiangang; Zhou, Wei; Wang, Baigeng; Shao, Lubin; Ho, Ching-Hwa; Huang, Ying-Sheng; Cao, Zhengyi; Wang, Laiguo; Li, Aidong; Zeng, Junwen; Song, Fengqi; Wang, Xinran; Shi, Yi; Yuan, Hongtao; Hwang, Harold Y.; Cui, Yi; Miao, Feng; Xing, Dingyu

2015-01-01

Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS2) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS2 field-effect transistors, which exhibit competitive performance with large current on/off ratios (∼107) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconducting materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS2 anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications. PMID:25947630

Comparison of effect of 5 MeV proton and Co-60 gamma irradiation on silicon NPN rf power transistors and N-channel depletion MOSFETs

NASA Astrophysics Data System (ADS)

Gnana Prakash, A. P.; Pradeep, T. M.; Hegde, Vinayakprasanna N.; Pushpa, N.; Bajpai, P. K.; Patel, S. P.; Trivedi, Tarkeshwar; Bhushan, K. G.

2017-12-01

NPN transistors and N-channel depletion metal oxide semiconductor field effect transistors (MOSFETs) were irradiated with 5 MeV protons and 60Co gamma radiation in the dose ranging from 1 Mrad(Si) to 100 Mrad(Si). The different electrical characteristics of the NPN transistor such as Gummel characteristics, excess base current (ΔIB), dc current gain (hFE), transconductance (gm), displacement damage factor (K) and output characteristics were studied as a function of total dose. The different electrical characteristics of N-channel MOSFETs such as threshold voltage (Vth), density of interface trapped charges (ΔNit), density of oxide trapped charges (ΔNot), transconductance (gm), mobility (µ) and drain saturation current (IDSat) were studied systematically before and after irradiation in the same dose ranges. A considerable increase in the base current (IB) and decrease in the hFE, gm and collector saturation current (ICSat) were observed after irradiation in the case of the NPN transistor. In the N-channel MOSFETs, the ΔNit and ΔNot were found to increase and Vth, gm, µ and IDSat were found to decrease with increase in the radiation dose. The 5 MeV proton irradiation results of both the NPN transistor and N-channel MOSFETs were compared with 60Co gamma-irradiated devices in the same dose ranges. It was observed that the degradation in 5 MeV proton-irradiated devices is more when compared with the 60Co gamma-irradiated devices at higher total doses.

Computational study of graphene-based vertical field effect transistor

NASA Astrophysics Data System (ADS)

Chen, Wenchao; Rinzler, Andrew; Guo, Jing

2013-03-01

Poisson and drift-diffusion equations are solved in a three-dimensional device structure to simulate graphene-based vertical field effect transistors (GVFETs). Operation mechanisms of the GVFET with and without punched holes in the graphene source contact are presented and compared. The graphene-channel Schottky barrier can be modulated by gate electric field due to graphene's low density of states. For the graphene contact with punched holes, the contact barrier thinning and lowering around punched hole edge allow orders of magnitude higher tunneling current compared to the region away from the punched hole edge, which is responsible for significant performance improvement as already verified by experiments. Small hole size is preferred due to less electrostatic screening from channel inversion layer, which gives large electric field around the punched hole edge, thus, leading to a thinner and lower barrier. Bilayer and trilayer graphenes as the source contact degrade the performance improvement because stronger electrostatic screening leads to smaller contact barrier lowering and thinning. High punched hole area percentage improves current performance by allowing more gate electric field to modulate the graphene-channel barrier. Low effective mass channel material gives better on-off current ratio.

High performance n-channel thin-film transistors with an amorphous phase C60 film on plastic substrate

NASA Astrophysics Data System (ADS)

Na, Jong H.; Kitamura, M.; Arakawa, Y.

2007-11-01

We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.

Theoretical calculation of performance enhancement in lattice-matched SiGeSn/GeSn p-channel tunneling field-effect transistor with type-II staggered tunneling junction

NASA Astrophysics Data System (ADS)

Wang, Hongjuan; Han, Genquan; Wang, Yibo; Peng, Yue; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hu, Shengdong; Hao, Yue

2016-04-01

In this work, a lattice-matched SiGeSn/GeSn heterostructure p-channel tunneling field-effect transistor (hetero-PTFET) with a type-II staggered tunneling junction (TJ) is investigated theoretically. Lattice matching and type-II band alignment at the Γ-point is obtained at the SiGeSn/GeSn interface by tuning Sn and Si compositions. A steeper subthreshold swing (SS) and a higher on state current (I ON) are demonstrated in SiGeSn/GeSn hetero-PTFET than in GeSn homo-PTFET. Si0.31Ge0.49Sn0.20/Ge0.88Sn0.12 hetero-PTFET achieves a 2.3-fold higher I ON than Ge0.88Sn0.12 homo-PTFET at V DD of 0.3 V. Hetero-PTFET achieves a more abrupt hole profile and a higher carrier density near TJ than the homo-PTFET, which contributes to the significantly enhanced band-to-band tunneling (BTBT) rate and tunneling current in hetero-PTFET.

Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.

2006-01-01

Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

Ballistic Spin Field Effect Transistor Based on Silicon Nanowires

NASA Astrophysics Data System (ADS)

Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried

2011-03-01

We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.

Structured-gate organic field-effect transistors

NASA Astrophysics Data System (ADS)

Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

2012-06-01

We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

Germanium Based Field-Effect Transistors: Challenges and Opportunities

PubMed Central

Goley, Patrick S.; Hudait, Mantu K.

2014-01-01

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed. PMID:28788569

Catalytic activity of enzymes immobilized on AlGaN /GaN solution gate field-effect transistors

NASA Astrophysics Data System (ADS)

Baur, B.; Howgate, J.; von Ribbeck, H.-G.; Gawlina, Y.; Bandalo, V.; Steinhoff, G.; Stutzmann, M.; Eickhoff, M.

2006-10-01

Enzyme-modified field-effect transistors (EnFETs) were prepared by immobilization of penicillinase on AlGaN /GaN solution gate field-effect transistors. The influence of the immobilization process on enzyme functionality was analyzed by comparing covalent immobilization and physisorption. Covalent immobilization by Schiff base formation on GaN surfaces modified with an aminopropyltriethoxysilane monolayer exhibits high reproducibility with respect to the enzyme/substrate affinity. Reductive amination of the Schiff base bonds to secondary amines significantly increases the stability of the enzyme layer. Electronic characterization of the EnFET response to penicillin G indicates that covalent immobilization leads to the formation of an enzyme (sub)monolayer.

Comparison between Field Effect Transistors and Bipolar Junction Transistors as Transducers in Electrochemical Sensors

PubMed Central

Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish

2017-01-01

Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor. PMID:28134275

Top-gate organic depletion and inversion transistors with doped channel and injection contact

NASA Astrophysics Data System (ADS)

Liu, Xuhai; Kasemann, Daniel; Leo, Karl

2015-03-01

Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

P-type field effect transistor based on Na-doped BaSnO3

NASA Astrophysics Data System (ADS)

Jang, Yeaju; Hong, Sungyun; Park, Jisung; Char, Kookrin

We fabricated field effect transistors (FET) based on the p-type Na-doped BaSnO3 (BNSO) channel layer. The properties of epitaxial BNSO channel layer were controlled by the doping rate. In order to modulate the p-type FET, we used amorphous HfOx and epitaxial BaHfO3 (BHO) gate oxides, both of which have high dielectric constants. HfOx was deposited by atomic-layer-deposition and BHO was epitaxially grown by pulsed laser deposition. The pulsed laser deposited SrRuO3 (SRO) was used as the source and the drain contacts. Indium-tin oxide and La-doped BaSnO3 were used as the gate electrodes on top of the HfOx and the BHO gate oxides, respectively. We will analyze and present the performances of the BNSO field effect transistor such as the IDS-VDS, the IDS-VGS, the Ion/Ioff ratio, and the field effect mobility. Samsung Science and Technology Foundation.

A 700 V narrow channel nJFET with low pinch-off voltage and suppressed drain-induced barrier lowering effect

NASA Astrophysics Data System (ADS)

Mao, Kun; Qiao, Ming; Zhang, WenTong; Zhang, Bo; Li, Zhaoji

2014-11-01

This paper proposes a 700 V narrow channel region triple-RESURF (reduced surface field) n-type junction field-effect transistor (NCT-nJFET). Compared to traditional structures, low pinch-off voltage (VP) with unobvious drain-induced barrier lowering (DIBL) effect and large saturated current (IDsat) are achieved. This is because p-type buried layer (Pbury) and PWELL are introduced to shape narrow n-type channel in JFET channel region. DIBL sensitivity (SDIBL) is firstly introduced in this paper to analyze the DIBL effect of high-voltage long-channel JFET. Ultra-high breakdown voltage is obtained by triple RESURF technology. Experimental results show that proposed NCT-nJFET achieves 24-V VP, 3.5% SDIBL, 2.3-mA IDsat, 800-V OFF-state breakdown voltage (OFF-BV) and 650-V ON-state breakdown voltage when VGS equals 0 V (ON-BV).

In-situ SiN{sub x}/InN structures for InN field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A.; Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete

Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performancemore » was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.« less

N Channel JFET Based Digital Logic Gate Structure

NASA Technical Reports Server (NTRS)

Krasowski, Michael J (Inventor)

2013-01-01

An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.

Performance analysis of junction-less double Gate n-p-n impact ionization MOS transistor (JLDG n-IMOS)

NASA Astrophysics Data System (ADS)

Chauhan, Manvendra Singh; Chauhan, R. K.

2018-04-01

This paper demonstrates a Junction-less Double Gate n-p-n Impact ionization MOS transistor (JLDG n-IMOS) on a very light doped p-type silicon body. Device structure proposed in the paper is based on charge plasma concept. There is no metallurgical junctions in the proposed device and does not need any impurity doping to create the drain and source regions. Due to doping-less nature, the fabrication process is simple for JLDG n-IMOS. The double gate engineering in proposed device leads to reduction in avalanche breakdown via impact ionization, generating large number of carriers in drain-body junction, resulting high ION current, small IOFF current and great improvement in ION/IOFF ratio. The simulation and examination of the proposed device have been performed on ATLAS device simulatorsoftware.

Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

PubMed

Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

2014-10-20

In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.

Vertical GaN Devices for Power Electronics in Extreme Environments

DTIC Science & Technology

2016-03-31

electronics applications. In this paper vertical p-n diodes and transistors fabricated on pseudo bulk low defect density (104 to 106 cm-2) GaN substrates are...holes in p-GaN has deleterious effect on p-n junction behavior (Fig. 2), p-GaN contacts, and channel control in junction field-effect transistors at...and transistors ) utilizing p-n junctions are suitable for most practical applications including automotive (210K < T < 423K) but may have limitations

High-power flexible AlGaN/GaN heterostructure field-effect transistors with suppression of negative differential conductance

NASA Astrophysics Data System (ADS)

Oh, Seung Kyu; Cho, Moon Uk; Dallas, James; Jang, Taehoon; Lee, Dong Gyu; Pouladi, Sara; Chen, Jie; Wang, Weijie; Shervin, Shahab; Kim, Hyunsoo; Shin, Seungha; Choi, Sukwon; Kwak, Joon Seop; Ryou, Jae-Hyun

2017-09-01

We investigate thermo-electronic behaviors of flexible AlGaN/GaN heterostructure field-effect transistors (HFETs) for high-power operation of the devices using Raman thermometry, infrared imaging, and current-voltage characteristics. A large negative differential conductance observed in HFETs on polymeric flexible substrates is confirmed to originate from the decreasing mobility of the two-dimensional electron gas channel caused by the self-heating effect. We develop high-power transistors by suppressing the negative differential conductance in the flexible HFETs using chemical lift-off and modified Ti/Au/In metal bonding processes with copper (Cu) tapes for high thermal conductivity and low thermal interfacial resistance in the flexible hybrid structures. Among different flexible HFETs, the ID of the HFETs on Cu with Ni/Au/In structures decreases only by 11.3% with increasing drain bias from the peak current to the current at VDS = 20 V, which is close to that of the HFETs on Si (9.6%), solving the problem of previous flexible AlGaN/GaN transistors.

Universal core model for multiple-gate field-effect transistors with short channel and quantum mechanical effects

NASA Astrophysics Data System (ADS)

Shin, Yong Hyeon; Bae, Min Soo; Park, Chuntaek; Park, Joung Won; Park, Hyunwoo; Lee, Yong Ju; Yun, Ilgu

2018-06-01

A universal core model for multiple-gate (MG) field-effect transistors (FETs) with short channel effects (SCEs) and quantum mechanical effects (QMEs) is proposed. By using a Young’s approximation based solution for one-dimensional Poisson’s equations the total inversion charge density (Q inv ) in the channel is modeled for double-gate (DG) and surrounding-gate SG (SG) FETs, following which a universal charge model is derived based on the similarity of the solutions, including for quadruple-gate (QG) FETs. For triple-gate (TG) FETs, the average of DG and QG FETs are used. A SCEs model is also proposed considering the potential difference between the channel’s surface and center. Finally, a QMEs model for MG FETs is developed using the quantum correction compact model. The proposed universal core model is validated on commercially available three-dimensional ATLAS numerical simulations.

Modeling of high composition AlGaN channel high electron mobility transistors with large threshold voltage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bajaj, Sanyam, E-mail: bajaj.10@osu.edu; Hung, Ting-Hsiang; Akyol, Fatih

2014-12-29

We report on the potential of high electron mobility transistors (HEMTs) consisting of high composition AlGaN channel and barrier layers for power switching applications. Detailed two-dimensional (2D) simulations show that threshold voltages in excess of 3 V can be achieved through the use of AlGaN channel layers. We also calculate the 2D electron gas mobility in AlGaN channel HEMTs and evaluate their power figures of merit as a function of device operating temperature and Al mole fraction in the channel. Our models show that power switching transistors with AlGaN channels would have comparable on-resistance to GaN-channel based transistors for the samemore » operation voltage. The modeling in this paper shows the potential of high composition AlGaN as a channel material for future high threshold enhancement mode transistors.« less

Charge-Transfer-Induced p-Type Channel in MoS2 Flake Field Effect Transistors.

PubMed

Min, Sung-Wook; Yoon, Minho; Yang, Sung Jin; Ko, Kyeong Rok; Im, Seongil

2018-01-31

The two-dimensional transition-metal dichalcogenide semiconductor MoS 2 has received extensive attention for decades because of its outstanding electrical and mechanical properties for next-generation devices. One weakness of MoS 2 , however, is that it shows only n-type conduction, revealing its limitations for homogeneous PN diodes and complementary inverters. Here, we introduce a charge-transfer method to modify the conduction property of MoS 2 from n- to p-type. We initially deposited an n-type InGaZnO (IGZO) film on top of the MoS 2 flake so that electron charges might be transferred from MoS 2 to IGZO during air ambient annealing. As a result, electron charges were depleted in MoS 2 . Such charge depletion lowered the MoS 2 Fermi level, which makes hole conduction favorable in MoS 2 when optimum source/drain electrodes with a high work function are selected. Our IGZO-supported MoS 2 flake field effect transistors (FETs) clearly display channel-type conversion from n- to p-channel in this way. Under short- and long-annealing conditions, n- and p-channel MoS 2 FETs are achieved, respectively, and a low-voltage complementary inverter is demonstrated using both channels in a single MoS 2 flake.

Enhanced transconductance in a double-gate graphene field-effect transistor

NASA Astrophysics Data System (ADS)

Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

2018-03-01

Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

Calculation of the electron wave function in a graded-channel double-heterojunction modulation-doped field-effect transistor

NASA Technical Reports Server (NTRS)

Mui, D. S. L.; Patil, M. B.; Morkoc, H.

1989-01-01

Three double-heterojunction modulation-doped field-effect transistor structures with different channel composition are investigated theoretically. All of these transistors have an In(x)Ga(1-x)As channel sandwiched between two doped Al(0.3)Ga(0.7)As barriers with undoped spacer layers. In one of the structures, x varies from 0 from either heterojunction to 0.15 at the center of the channel quadratically; in the other two, constant values of x of 0 and 0.15 are used. The Poisson and Schroedinger equations are solved self-consistently for the electron wave function in all three cases. The results showed that the two-dimensional electron gas (2DEG) concentration in the channel of the quadratically graded structure is higher than the x = 0 one and slightly lower than the x = 0.15 one, and the mean distance of the 2DEG is closer to the center of the channel for this transistor than the other two. These two effects have important implications on the electron mobility in the channel.

Ion bipolar junction transistors

PubMed Central

Tybrandt, Klas; Larsson, Karin C.; Richter-Dahlfors, Agneta; Berggren, Magnus

2010-01-01

Dynamic control of chemical microenvironments is essential for continued development in numerous fields of life sciences. Such control could be achieved with active chemical circuits for delivery of ions and biomolecules. As the basis for such circuitry, we report a solid-state ion bipolar junction transistor (IBJT) based on conducting polymers and thin films of anion- and cation-selective membranes. The IBJT is the ionic analogue to the conventional semiconductor BJT and is manufactured using standard microfabrication techniques. Transistor characteristics along with a model describing the principle of operation, in which an anionic base current amplifies a cationic collector current, are presented. By employing the IBJT as a bioelectronic circuit element for delivery of the neurotransmitter acetylcholine, its efficacy in modulating neuronal cell signaling is demonstrated. PMID:20479274

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

2014-05-21

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Study on copper phthalocyanine and perylene-based ambipolar organic light-emitting field-effect transistors produced using neutral beam deposition method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Dae-Kyu; Oh, Jeong-Do; Shin, Eun-Sol

2014-04-28

The neutral cluster beam deposition (NCBD) method has been applied to the production and characterization of ambipolar, heterojunction-based organic light-emitting field-effect transistors (OLEFETs) with a top-contact, multi-digitated, long-channel geometry. Organic thin films of n-type N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide and p-type copper phthalocyanine were successively deposited on the hydroxyl-free polymethyl-methacrylate (PMMA)-coated SiO{sub 2} dielectrics using the NCBD method. Characterization of the morphological and structural properties of the organic active layers was performed using atomic force microscopy and X-ray diffraction. Various device parameters such as hole- and electron-carrier mobilities, threshold voltages, and electroluminescence (EL) were derived from the fits of the observed current-voltage andmore » current-voltage-light emission characteristics of OLEFETs. The OLEFETs demonstrated good field-effect characteristics, well-balanced ambipolarity, and substantial EL under ambient conditions. The device performance, which is strongly correlated with the surface morphology and the structural properties of the organic active layers, is discussed along with the operating conduction mechanism.« less

Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

PubMed Central

Feng, Ping; Shao, Feng; Shi, Yi; Wan, Qing

2014-01-01

One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs) are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed. PMID:25232915

Hopping and trapping mechanisms in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Konezny, S. J.; Bussac, M. N.; Zuppiroli, L.

2010-01-01

A charge carrier in the channel of an organic field-effect transistor (OFET) is coupled to the electric polarization of the gate in the form of a surface Fröhlich polaron [N. Kirova and M. N. Bussac, Phys. Rev. B 68, 235312 (2003)]. We study the effects of the dynamical field of polarization on both small-polaron hopping and trap-limited transport mechanisms. We present numerical calculations of polarization energies, band-narrowing effects due to polarization, hopping barriers, and interface trap depths in pentacene and rubrene transistors as functions of the dielectric constant of the gate insulator and demonstrate that a trap-and-release mechanism more appropriately describes transport in high-mobility OFETs. For mobilities on the order 0.1cm2/Vs and below, all states are highly localized and hopping becomes the predominant mechanism.

Influence of polymer dielectrics on C60-based field-effect transistors

NASA Astrophysics Data System (ADS)

Zhou, Jianlin; Zhang, Fujia; Lan, Lifeng; Wen, Shangsheng; Peng, Junbiao

2007-12-01

Fullerene C60 organic field-effect transistors (OFETs) have been fabricated based on two different polymer dielectric materials, poly(methylmethacrylate) (PMMA) and cross-linkable poly(4-vinylphenol). The large grain size of C60 film and small number of traps at the interface of PMMA /C60 were obtained with high electron mobility of 0.66cm2/Vs in the PMMA transistor. The result suggests that the C60 semiconductor cooperating with polymer dielectric is a promising application in the fabrication of n-type organic transistors because of low threshold voltage and high electron mobility.

Temperature-dependent degradation mechanisms of threshold voltage in La2O3-gated n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Ming-Tsong; Hsu, De-Cheng; Juan, Pi-Chun; Wang, Y. L.; Lee, Joseph Ya-min

2010-09-01

Metal-oxide-semiconductor capacitors and n-channel metal-oxide-semiconductor field-effect transistors with La2O3 gate dielectric were fabricated. The positive bias temperature instability was studied. The degradation of threshold voltage (ΔVT) showed an exponential dependence on the stress time in the temperature range from 25 to 75 °C. The degradation of subthreshold slope (ΔS) and gate leakage (IG) with stress voltage was also measured. The degradation of VT is attributed to the oxide trap charges Qot. The extracted activation energy of 0.2 eV is related to a degradation dominated by the release of atomic hydrogen in La2O3 thin films.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

NASA Astrophysics Data System (ADS)

Es-Sakhi, Azzedin D.

concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Capacitorless one-transistor dynamic random-access memory based on asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor with n-doped boosting layer and drain-underlap structure

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-04-01

In this work, we present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on an asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor (TFET) for DRAM applications. The n-doped boosting layer and gate2 drain-underlap structure is employed in the device to obtain an excellent 1T-DRAM performance. The n-doped layer inserted between the source and channel regions improves the sensing margin because of a high rate of increase in the band-to-band tunneling (BTBT) probability. Furthermore, because the gate2 drain-underlap structure reduces the recombination rate that occurs between the gate2 and drain regions, a device with a gate2 drain-underlap length (L G2_D-underlap) of 10 nm exhibited a longer retention performance. As a result, by applying the n-doped layer and gate2 drain-underlap structure, the proposed device exhibited not only a high sensing margin of 1.11 µA/µm but also a long retention time of greater than 100 ms at a temperature of 358 K (85 °C).

Graphene oxide-zinc oxide nanocomposite as channel layer for field effect transistors: effect of ZnO loading on field effect transport.

PubMed

Jilani, S Mahaboob; Banerji, Pallab

2014-10-08

The effects of ZnO on graphene oxide (GO)-ZnO nanocomposites are investigated to tune the conductivity in GO under field effect regime. Zinc oxides with different concentrations from 5 wt % to 25 wt % are used in a GO matrix to increase the conductivity in the composite. Six sets of field effect transistors with pristine GO and GO-ZnO as the channel layer at varying ZnO concentrations were fabricated. From the transfer characteristics, it is observed that GO exhibited an insulating behavior and the transistors with low ZnO (5 wt %) concentration initially showed p-type conductivity that changes to n-type with increases in ZnO loading. This n-type dominance in conductivity is a consequence of the transfer of electrons from ZnO to the GO matrix. From X-ray photoelectron spectroscopic measurements, it is observed that the progressive reduction in the C-OH oxygen group took place with increases in ZnO loading. Thus, from insulating GO to p- and then n-type, conductivity in GO could be achieved with reduction in the C-OH oxygen group by photocatalytic reduction of GO with varying degrees of ZnO. The restoration of sp(2) electron network in the GO matrix with the anchoring of ZnO nanostructures was observed from Raman spectra. From UV-visible spectra, the band gap in pristine GO was found to be 3.98 eV and reduced to 2.8 eV with increase in ZnO attachment.

Electrical Transport and Channel Length Modulation in Semiconducting Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2013-11-25

a ballistic one-dimensional conductor is / = £>(£) ■ VgiE)[fR(E) - fdEME , (1) where Vg(E) is the group velocity, D(E) is the density of states... AEROSPACE REPORT NO. ATR-2013-01138 Electrical Transport and Channel Length Modulation in Semiconducting Carbon Nanotube Field-Effect Transistors...SCIENCES LABORATORIES The Aerospace Corporation functions as an "architect-engineer" for national security programs, specializing in advanced military

Effect of channel-width and chirality on graphene field-effect transistor based real-time biomolecule sensing

NASA Astrophysics Data System (ADS)

Lyu, Letian; Jaswal, Perveshwer; Xu, Guangyu

2018-03-01

Graphene field-effect transistors (GFET) hold promise in biomolecule sensing due to the outstanding properties of graphene materials. Charges in biomolecules are transduced into a change in the GFET current, which allows real-time monitoring of the biomolecule concentrations. Here we theoretically evaluate the performance of GFET based real-time biomolecule sensing, aiming to better understand the width-scaling limit in GFET based biosensors. In particular, we study the effect of the channel-width and the chirality on FET sensitivity by taking the percentage change of the FET current per unit charge density as the sensing signal. Firstly, GFETs made of graphene nanoribbons (GNR) and graphene sheets (GS) show comparable sensing signals to each other when gated at 1011 - 1012 cm-2 carrier densities. Sensing signals in GNRs are enhanced when gated near the sub-band thresholds, and increase their values in wider GNRs due to the change in device conductance and quantum capacitance. Secondly, the GNR chirality is found to fine tune the sensing signals. Armchair GNRs with smaller energy bandgaps appear to have an enhanced sensing signal close to 1011 cm-2 carrier densities. These results may help understand the scaling limit in GFET based biosensors along the width direction, and shed light on forming all-electrical bio-arrays.

Channel scaling and field-effect mobility extraction in amorphous InZnO thin film transistors

NASA Astrophysics Data System (ADS)

Lee, Sunghwan; Song, Yang; Park, Hongsik; Zaslavsky, A.; Paine, D. C.

2017-09-01

Amorphous oxide semiconductors (AOSs) based on indium oxides are of great interest for next generation ultra-high definition displays that require much smaller pixel driving elements. We describe the scaling behavior in amorphous InZnO thin film transistors (TFTs) with a significant decrease in the extracted field-effect mobility μFE with channel length L (from 39.3 to 9.9 cm2/V·s as L is reduced from 50 to 5 μm). Transmission line model measurements reveal that channel scaling leads to a significant μFE underestimation due to contact resistance (RC) at the metallization/channel interface. Therefore, we suggest a method of extracting correct μFE when the TFT performance is significantly affected by RC. The corrected μFE values are higher (45.4 cm2/V·s) and nearly independent of L. The results show the critical effect of contact resistance on μFE measurements and suggest strategies to determine accurate μFE when a TFT channel is scaled.

In2O3 nanowire based field effect transistor for biological sensors.

NASA Astrophysics Data System (ADS)

Zeng, Zhongming; Wang, Kai; Zhou, Weilie

2008-03-01

Semiconductor nanowires (NWs) are attracting considerable attention due to their nanoscale dimensions and enormous surface-to-volume ratios. Many applications have been demonstrated in toxic gas, protein, small molecule and viruses sensing because of their superior sensing performances. Indium oxide (In2O3) NWs have been successfully applied for toxic gas and small organic molecule sensing. In our experiment, In2O3 NWs based field effect transistors (FET) are fabricated for virus (Ricin) detections. Single-crystalline In2O3 NWs with diameters around 100 nm were synthesized by the thermal evaporation. The nanodevice based on In2O3 NWs bridges the source/drain electrodes with a channel length of ˜5 μm. Basic transport properties of devices were measured before biological detection. The I-V curves with the gate voltage Vg=0 shows good ohmic contact and the resistance is about 10 Mφ. The back-gate effect on the conductivity showed that In2O3 NW is working as n-type channel with obvious back-gate effect, which is much stronger than the reported results. The nanodevices used as virus detection will be also discussed.

Large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

Fluctuations in the electrical resistance at the interface of atomically thin materials and metals, or the contact noise, can adversely affect the device performance but remains largely unexplored. We have investigated contact noise in graphene field effect transistors of varying device geometry and contact configuration, with channel carrier mobility ranging from 5,000 to 80,000 cm2V-1s-1. A phenomenological model developed for contact noise due to current crowding for two dimensional conductors, shows a dominant contact contribution to the measured resistance noise in all graphene field effect transistors when measured in the two-probe or invasive four probe configurations, and surprisingly, also in nearly noninvasive four probe (Hall bar) configuration in the high mobility devices. We identify the fluctuating electrostatic environment of the metal-channel interface as the major source of contact noise, which could be generic to two dimensional material-based electronic devices. The work was financially supported by the Department of Science and Technology, India and Tokyo Electron Limited.

Coulomb blockade based field-effect transistors exploiting stripe-shaped channel geometries of self-assembled metal nanoparticles.

PubMed

Lehmann, Hauke; Willing, Svenja; Möller, Sandra; Volkmann, Mirjam; Klinke, Christian

2016-08-14

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging energy. Thus, a Coulomb-energy gap emerges during transport experiments that can be shifted by electric fields, allowing for charge transport whenever energy levels of neighboring particles match. Hence, the state of the device changes sequentially between conducting and non-conducting instead of just one transition from conducting to pinch-off as in semiconductors. To exploit this behavior for field-effect transistors, it is necessary to use uniform nanoparticles in ordered arrays separated by well-defined tunnel barriers. In this work, CoPt nanoparticles with a narrow size distribution are synthesized by colloidal chemistry. These particles are deposited via the scalable Langmuir-Blodgett technique as ordered, homogeneous monolayers onto Si/SiO2 substrates with pre-patterned gold electrodes. The resulting nanoparticle arrays are limited to stripes of adjustable lengths and widths. In such a defined channel with a limited number of conduction paths the current can be controlled precisely by a gate voltage. Clearly pronounced Coulomb oscillations are observed up to temperatures of 150 K. Using such systems as field-effect transistors yields unprecedented oscillating current modulations with on/off-ratios of around 70%.

Multiple-channel detection of cellular activities by ion-sensitive transistors

NASA Astrophysics Data System (ADS)

Machida, Satoru; Shimada, Hideto; Motoyama, Yumi

2018-04-01

An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.

Fabrication and characterization of the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Qing-Wen, Song; Xiao-Yan, Tang; Yan-Jing, He; Guan-Nan, Tang; Yue-Hu, Wang; Yi-Meng, Zhang; Hui, Guo; Ren-Xu, Jia; Hong-Liang, Lv; Yi-Men, Zhang; Yu-Ming, Zhang

2016-03-01

In this paper, the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFFETs) have been fabricated and characterized. A sandwich- (nitridation-oxidation-nitridation) type process was used to grow the gate dielectric film to obtain high channel mobility. The interface properties of 4H-SiC/SiO2 were examined by the measurement of HF I-V, G-V, and C-V over a range of frequencies. The ideal C-V curve with little hysteresis and the frequency dispersion were observed. As a result, the interface state density near the conduction band edge of 4H-SiC was reduced to 2 × 1011 eV-1·cm-2, the breakdown field of the grown oxides was about 9.8 MV/cm, the median peak field-effect mobility is about 32.5 cm2·V-1·s-1, and the maximum peak field-effect mobility of 38 cm2·V-1·s-1 was achieved in fabricated lateral 4H-SiC MOSFFETs. Projcet supported by the National Natural Science Foundation of China (Grant Nos. 61404098, 61176070, and 61274079), the Doctoral Fund of Ministry of Education of China (Grant Nos. 20110203110010 and 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), and the Key Specific Projects of Ministry of Education of China (Grant No. 625010101).

Transistor-like behavior of single metalloprotein junctions.

PubMed

Artés, Juan M; Díez-Pérez, Ismael; Gorostiza, Pau

2012-06-13

Single protein junctions consisting of azurin bridged between a gold substrate and the probe of an electrochemical tunneling microscope (ECSTM) have been obtained by two independent methods that allowed statistical analysis over a large number of measured junctions. Conductance measurements yield (7.3 ± 1.5) × 10(-6)G(0) in agreement with reported estimates using other techniques. Redox gating of the protein with an on/off ratio of 20 was demonstrated and constitutes a proof-of-principle of a single redox protein field-effect transistor.

Traps and Interface Fixed Charge Effects on a Solution-Processed n-Type Polymeric-Based Organic Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Hafsi, B.; Boubaker, A.; Guerin, D.; Lenfant, S.; Kalboussi, A.; Lmimouni, K.

2017-02-01

Organic field-effect transistors based on poly{[ N, N0- bis(2-octyldodecyl)- naphthalene-1,4,5,8- bis(dicarboximide)-2,6-diyl]-alt-5,50-(2,20-bithiophene)}, [P(NDI2OD-T2)n], were fabricated and characterized. The effect of octadecyltrichlorosilane (OTS) a self-assembled monolayer (SAM) grafted on to a SiO2 gate dielectric was investigated. A significant improvement of the charge mobility ( μ), up to 0.22 cm2/V s, was reached thanks to the OTS treatment. Modifying some technological parameters relating to fabrication, such as solvents, was also studied. We have analyzed the electrical properties of these thin-film transistors by using a two-dimensional drift-diffusion simulator, Integrated System Engineering-Technology Computer Aided Design (ISE-TCAD®). We studied the fixed surface charges at the organic semiconductor/oxide interface and the bulk traps effect. The dependence of the threshold voltage on the density and energy level of the trap states has also been considered. We finally found a good agreement between the output and transfer characteristics for experimental and simulated data.

Investigation of InP/In0.65Ga0.35As metamorphic p-channel doped-channel field-effect transistor

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2016-07-01

In this article, the device mechanism and characteristics of InP/InGaAs metamorphic p-channel field-effect transistor (FET), which has a high indium mole fraction of InGaAs channel, grown on the GaAs substrate is demonstrated. The device was fabricated on the top of the InxGa1-xP graded metamorphic buffer layer, and the In0.65Ga0.35As pseudomorphic channel was employed to elevate the transistor performance. For the p-type FET, due to the considerably large valence band discontinuity at InP/In0.65Ga0.35As heterojunction and a relatively thin as well as heavily doped pseudomorphic In0.65Ga0.35As channel between two undoped InP layers, a maximum extrinsic transconductance of 27.3 mS/mm and a maximum saturation current density of -54.3 mA/mm are obtained. Consequently, the studied metamorphic FET is suitable for the development in signal amplification, integrated circuits, and low supply-voltage complementary logic inverters.

Terahertz signal detection in a short gate length field-effect transistor with a two-dimensional electron gas

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vostokov, N. V., E-mail: vostokov@ipm.sci-nnov.ru; Shashkin, V. I.

2015-11-28

We consider the problem of non-resonant detection of terahertz signals in a short gate length field-effect transistor having a two-dimensional electron channel with zero external bias between the source and the drain. The channel resistance, gate-channel capacitance, and quadratic nonlinearity parameter of the transistor during detection as a function of the gate bias voltage are studied. Characteristics of detection of the transistor connected in an antenna with real impedance are analyzed. The consideration is based on both a simple one-dimensional model of the transistor and allowance for the two-dimensional distribution of the electric field in the transistor structure. The resultsmore » given by the different models are discussed.« less

Field-effect P-N junction

DOEpatents

Regan, William; Zettl, Alexander

2015-05-05

This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

Field Effect Transistor Behavior in Electrospun Polyaniline/Polyethylene Oxide Demonstrated

NASA Technical Reports Server (NTRS)

Mueller, Carl H.; Theofylaktos, Onoufrios; Robinson, Daryl C.; Miranda, Felix A.

2004-01-01

Novel transistors and logic devices based on nanotechnology concepts are under intense development. The potential for ultra-low-power circuitry makes nanotechnology attractive for applications such as digital electronics and sensors. For NASA applications, nanotechnology offers tremendous opportunities for increased onboard data processing, and thus autonomous decisionmaking ability, and novel sensors that detect and respond to environmental stimuli with little oversight requirements. Polyaniline/polyethylene oxide (PANi/PEO) nanofibers are of interest because they have electrical conductivities that can be changed from insulating to metallic by varying the doping levels and conformations of the polymer chain. At the NASA Glenn Research Center, we have observed field effect transistor (FET) behavior in electrospun PANi/PEO nanofibers doped with camphorsulfonic acid. The nanofibers were deposited onto Au electrodes, which had been prepatterned onto oxidized silicon substrates. The preceding scanning electron image shows the device used in the transistor measurements. Saturation channel currents are observed at surprisingly low source/drain voltages (see the following graph). The hole mobility in the depletion regime is 1.4x10(exp -4)sq cm/V sec, whereas the one-dimensional charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx.10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating one-dimensional polymer FET's.

Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors

NASA Astrophysics Data System (ADS)

Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.

2018-04-01

Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.

SiC Optically Modulated Field-Effect Transistor

NASA Technical Reports Server (NTRS)

Tabib-Azar, Massood

2009-01-01

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

Enhancing Photoresponsivity of Self-Aligned MoS2 Field-Effect Transistors by Piezo-Phototronic Effect from GaN Nanowires.

PubMed

Liu, Xingqiang; Yang, Xiaonian; Gao, Guoyun; Yang, Zhenyu; Liu, Haitao; Li, Qiang; Lou, Zheng; Shen, Guozhen; Liao, Lei; Pan, Caofeng; Lin Wang, Zhong

2016-08-23

We report high-performance self-aligned MoS2 field-effect transistors (FETs) with enhanced photoresponsivity by the piezo-phototronic effect. The FETs are fabricated based on monolayer MoS2 with a piezoelectric GaN nanowire (NW) as the local gate, and a self-aligned process is employed to define the source/drain electrodes. The fabrication method allows the preservation of the intrinsic property of MoS2 and suppresses the scattering center density in the MoS2/GaN interface, which results in high electrical and photoelectric performances. MoS2 FETs with channel lengths of ∼200 nm have been fabricated with a small subthreshold slope of 64 mV/dec. The photoresponsivity is 443.3 A·W(-1), with a fast response and recovery time of ∼5 ms under 550 nm light illumination. When strain is introduced into the GaN NW, the photoresponsivity is further enhanced to 734.5 A·W(-1) and maintains consistent response and recovery time, which is comparable with that of the mechanical exfoliation of MoS2 transistors. The approach presented here opens an avenue to high-performance top-gated piezo-enhanced MoS2 photodetectors.

Reconfigurable Complementary Monolayer MoTe2 Field-Effect Transistors for Integrated Circuits.

PubMed

Larentis, Stefano; Fallahazad, Babak; Movva, Hema C P; Kim, Kyounghwan; Rai, Amritesh; Taniguchi, Takashi; Watanabe, Kenji; Banerjee, Sanjay K; Tutuc, Emanuel

2017-05-23

Transition metal dichalcogenides are of interest for next generation switches, but the lack of low resistance electron and hole contacts in the same material has hindered the development of complementary field-effect transistors and circuits. We demonstrate an air-stable, reconfigurable, complementary monolayer MoTe 2 field-effect transistor encapsulated in hexagonal boron nitride, using electrostatically doped contacts. The introduction of a multigate design with prepatterned bottom contacts allows us to independently achieve low contact resistance and threshold voltage tuning, while also decoupling the Schottky contacts and channel gating. We illustrate a complementary inverter and a p-i-n diode as potential applications.

The analysis of ion-selective field-effect transistor operation in chemical sensors

NASA Astrophysics Data System (ADS)

Hotra, Zenon; Holyaka, Roman; Hladun, Michael; Humenuk, Iryna

2003-09-01

In this paper we present the research results of influence of substrate potential in ion-selective field-effect transistors (ISFET) on output signal of chemical sensors, e.g. PH-meters. It is shown that the instability of substrate-source p-n junction bias in well-known chemical sensors, which use grounded reference electrode - ISFET gate, affect on sensor characteristics in negative way. The analytical description and research results of 'substrate effect' on ISFET characteristics are considered.

GaN nanowire arrays with nonpolar sidewalls for vertically integrated field-effect transistors

NASA Astrophysics Data System (ADS)

Yu, Feng; Yao, Shengbo; Römer, Friedhard; Witzigmann, Bernd; Schimpke, Tilman; Strassburg, Martin; Bakin, Andrey; Schumacher, Hans Werner; Peiner, Erwin; Suryo Wasisto, Hutomo; Waag, Andreas

2017-03-01

Vertically aligned gallium nitride (GaN) nanowire (NW) arrays have attracted a lot of attention because of their potential for novel devices in the fields of optoelectronics and nanoelectronics. In this work, GaN NW arrays have been designed and fabricated by combining suitable nanomachining processes including dry and wet etching. After inductively coupled plasma dry reactive ion etching, the GaN NWs are subsequently treated in wet chemical etching using AZ400K developer (i.e., with an activation energy of 0.69 ± 0.02 eV and a Cr mask) to form hexagonal and smooth a-plane sidewalls. Etching experiments using potassium hydroxide (KOH) water solution reveal that the sidewall orientation preference depends on etchant concentration. A model concerning surface bonding configuration on crystallography facets has been proposed to understand the anisotropic wet etching mechanism. Finally, NW array-based vertical field-effect transistors with wrap-gated structure have been fabricated. A device composed of 99 NWs exhibits enhancement mode operation with a threshold voltage of 1.5 V, a superior electrostatic control, and a high current output of >10 mA, which prevail potential applications in next-generation power switches and high-temperature digital circuits.

Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials

NASA Astrophysics Data System (ADS)

Ilatikhameneh, Hesameddin; Tan, Yaohua; Novakovic, Bozidar; Klimeck, Gerhard; Rahman, Rajib; Appenzeller, Joerg

2015-12-01

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2D material based TFETs can have tight gate control and high electric fields at the tunnel junction, and can in principle generate high ON-currents along with a sub-threshold swing smaller than 60 mV/dec. Our simulations reveal that high performance TMD TFETs, not only require good gate control, but also rely on the choice of the right channel material with optimum band gap, effective mass and source/drain doping level. Unlike previous works, a full band atomistic tight binding method is used self-consistently with 3D Poisson equation to simulate ballistic quantum transport in these devices. The effect of the choice of TMD material on the performance of the device and its transfer characteristics are discussed. Moreover, the criteria for high ON-currents are explained with a simple analytic model, showing the related fundamental factors. Finally, the subthreshold swing and energy-delay of these TFETs are compared with conventional CMOS devices.

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K

NASA Technical Reports Server (NTRS)

Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.

1992-01-01

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K are presented. It is shown that the CHFET exhibits normal transistor operation down to 6 K. Some of the details of the transistor operation, such as the gate-voltage dependence of the channel potential, are analyzed. The gate current is examined and is shown to be due to several mechanisms acting in parallel. These include field-emission and thermionic-field-emission, conduction through a temperature-activated resistance, and thermionic emission. The input referred noise for n-channel CHFETs is presented and discussed. The noise has the spectral dependence of 1/f noise, but does not exhibit the usual area dependence.

Dependence of interface charge trapping on channel engineering in pentacene field effect transistors.

PubMed

Lee, Sunwoo; Park, Junghyuck; Park, In-Sung; Ahn, Jinho

2014-07-01

We investigate the dependence of charge carrier mobility by trap states at various interface regions through channel engineering. Prior to evaluation of interface trap density, the electrical performance in pentaene field effect transistors (FET) with high-k gate oxide are also investigated depending on four channel engineering. As a channel engineering, gas treatment, coatings of thin polymer layer, and chemical surface modification using small molecules were carried out. After channel engineering, the performance of device as well as interface trap density calculated by conductance method are remarkably improved. It is found that the reduced interface trap density is closely related to decreasing the sub-threshold swing and improving the mobility. Particularly, we also found that performance of device such as mobility, subthreshold swing, and interface trap density after gas same is comparable to those of OTS.

Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax

PubMed Central

Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He

2016-01-01

In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009

Field effect transistors based on phosphorene nanoribbon with selective edge-adsorption: A first-principles study

NASA Astrophysics Data System (ADS)

Hu, Mengli; Yang, Zhixiong; Zhou, Wenzhe; Li, Aolin; Pan, Jiangling; Ouyang, Fangping

2018-04-01

By using density functional theory (DFT) and nonequilibrium Green's function (NEGF), field effect transistor (FET) based on zigzag shaped phosphorene nanoribbons (ZPNR) are investigated. The FETs are constructed with bare-edged ZPNRs as electrodes and H, Cl or OH adsorbed ZPNRs as channel. It is found FETs with the three kinds of channel show similar transport properties. The FET is p-type with a maximum current on/off ratio of 104 and a minimum off-current of 1 nA. The working mode of FETs is dependent on the parity of channel length. It can be either enhancement mode or depletion mode and the off-state current shows an even-odd oscillation. The current oscillations are interpreted with density of states (DOS) analysis and methods of evolution operator and tight-binding Hamiltonian. Operating mechanism of the designed FETs is also presented with projected local density of states and band diagrams.

Organic field effect transistor with ultra high amplification

NASA Astrophysics Data System (ADS)

Torricelli, Fabrizio

2016-09-01

High-gain transistors are essential for the large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show organic transistors fabricated on plastic foils enabling unipolar amplifiers with ultra-gain. The proposed approach is general and opens up new opportunities for ultra-large signal amplification in organic circuits and sensors.

Two-dimensional non-volatile programmable p-n junctions

NASA Astrophysics Data System (ADS)

Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing

2017-09-01

Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

Two-dimensional non-volatile programmable p-n junctions.

PubMed

Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M; Zhang, Zengxing

2017-09-01

Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe 2 /hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 10 4 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

Vacuum field-effect transistor with a deep submicron channel fabricated by electro-forming

NASA Astrophysics Data System (ADS)

Wang, Xiao; Shen, Zhihua; Wu, Shengli; Zhang, Jintao

2017-06-01

Vacuum field-effect transistors (VFETs) with channel lengths down to 500 nm (i.e., the deep submicron scale) were fabricated with the mature technology of the surface conduction electron emitter fabrication process in our former experiments. The vacuum channel of this new VFET was generated by using the electro-forming process. During electro-forming, the joule heat cracks the conductive film and then generates the submicron scale gap that serves as the vacuum channel. The gap separates the conductive film into two plane-to-plane electrodes, which serve as a source (cathode) electrode and a drain (anode) electrode of the VFET, respectively. Experimental results reveal that the fabricated device demonstrates a clear triode behavior of the gate modulation. Fowler-Nordheim theory was used to analyze the electron emission mechanism and operating principle of the device.

Effects of channel thickness on oxide thin film transistor with double-stacked channel layer

NASA Astrophysics Data System (ADS)

Lee, Kimoon; Kim, Yong-Hoon; Yoon, Sung-Min; Kim, Jiwan; Oh, Min Suk

2017-11-01

To improve the field effect mobility and control the threshold voltage ( V th ) of oxide thin film transistors (TFTs), we fabricated the oxide TFTs with double-stacked channel layers which consist of thick Zn-Sn-O (ZTO) and very thin In-Zn-O (IZO) layers. We investigated the effects of the thickness of thin conductive layer and the conductivity of thick layer on oxide TFTs with doublestacked channel layer. When we changed the thickness of thin conductive IZO channel layer, the resistivity values were changed. This resistivity of thin channel layer affected on the saturation field effect mobility and the off current of TFTs. In case of the thick ZTO channel layer which was deposited by sputtering in Ar: O2 = 10: 1, the device showed better performances than that which was deposited in Ar: O2 = 1: 1. Our TFTs showed high mobility ( μ FE ) of 40.7 cm2/Vs and V th of 4.3 V. We assumed that high mobility and the controlled V th were caused by thin conductive IZO layer and thick stable ZTO layer. Therefore, this double-stacked channel structure can be very promising way to improve the electrical characteristics of various oxide thin film transistors.

Nature of size effects in compact models of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torkhov, N. A., E-mail: trkf@mail.ru; Scientific-Research Institute of Semiconductor Devices, Tomsk 634050; Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050

Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of themore » equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.« less

An innovative large scale integration of silicon nanowire-based field effect transistors

NASA Astrophysics Data System (ADS)

Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

2018-05-01

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

Thermal Analysis of AlGaN/GaN High-Electron-Mobility Transistor and Its RF Power Efficiency Optimization with Source-Bridged Field-Plate Structure.

PubMed

Kwak, Hyeon-Tak; Chang, Seung-Bo; Jung, Hyun-Gu; Kim, Hyun-Seok

2018-09-01

In this study, we consider the relationship between the temperature in a two-dimensional electron gas (2-DEG) channel layer and the RF characteristics of an AlGaN/GaN high-electron-mobility transistor by changing the geometrical structure of the field-plate. The final goal is to achieve a high power efficiency by decreasing the channel layer temperature. First, simulations were performed to compare and contrast the experimental data of a conventional T-gate head structure. Then, a source-bridged field-plate (SBFP) structure was used to obtain the lower junction temperature in the 2-DEG channel layer. The peak electric field intensity was reduced, and a decrease in channel temperature resulted in an increase in electron mobility. Furthermore, the gate-to-source capacitance was increased by the SBFP structure. However, under the large current flow condition, the SBFP structure had a lower maximum temperature than the basic T-gate head structure, which improved the device electron mobility. Eventually, an optimum position of the SBFP was used, which led to higher frequency responses and improved the breakdown voltages. Hence, the optimized SBFP structure can be a promising candidate for high-power RF devices.

Gate frequency sweep: An effective method to evaluate the dynamic performance of AlGaN/GaN power heterojunction field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Santi, C. de; Meneghini, M., E-mail: matteo.meneghini@dei.unipd.it; Meneghesso, G.

2014-08-18

With this paper we propose a test method for evaluating the dynamic performance of GaN-based transistors, namely, gate-frequency sweep measurements: the effectiveness of the method is verified by characterizing the dynamic performance of Gate Injection Transistors. We demonstrate that this method can provide an effective description of the impact of traps on the transient performance of Heterojunction Field Effect Transistors, and information on the properties (activation energy and cross section) of the related defects. Moreover, we discuss the relation between the results obtained by gate-frequency sweep measurements and those collected by conventional drain current transients and double pulse characterization.

Performance enhancement in uniaxially tensile stressed GeSn n-channel fin tunneling field-effect transistor: Impact of stress direction

NASA Astrophysics Data System (ADS)

Wang, Hongjuan; Han, Genquan; Jiang, Xiangwei; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

2017-04-01

In this work, the boosting effect on the performance of GeSn n-channel fin tunneling FET (nFinTFET) enabled by uniaxial tensile stress is investigated theoretically. As the fin rotates within the (001) plane, the uniaxial tensile stress is always along its direction. The electrical characteristics of tensile-stressed GeSn nFinTFETs with point and line tunneling modes are computed utilizing the technology computer aided design (TCAD) simulator in which the dynamic nonlocal band-to-band tunneling (BTBT) algorithm is employed. In comparison with the relaxed devices, tensile-stressed GeSn nFinTFETs achieve a substantial enhancement in band-to-band tunneling generation rate (G BTBT) and on-state current I ON owing to the reduced bandgap E G induced by the tensile stress. Performance improvement of GeSn nFinTFETs induced by tensile stress demonstrates a strong dependence on channel direction and tunneling modes. Under the same magnitude of stress, line-nFinTFETs obtain a more pronounced I ON enhancement over the transistors with point tunneling mode.

Local sensor based on nanowire field effect transistor from inhomogeneously doped silicon on insulator

NASA Astrophysics Data System (ADS)

Presnov, Denis E.; Bozhev, Ivan V.; Miakonkikh, Andrew V.; Simakin, Sergey G.; Trifonov, Artem S.; Krupenin, Vladimir A.

2018-02-01

We present the original method for fabricating a sensitive field/charge sensor based on field effect transistor (FET) with a nanowire channel that uses CMOS-compatible processes only. A FET with a kink-like silicon nanowire channel was fabricated from the inhomogeneously doped silicon on insulator wafer very close (˜100 nm) to the extremely sharp corner of a silicon chip forming local probe. The single e-beam lithographic process with a shadow deposition technique, followed by separate two reactive ion etching processes, was used to define the narrow semiconductor nanowire channel. The sensors charge sensitivity was evaluated to be in the range of 0.1-0.2 e /√{Hz } from the analysis of their transport and noise characteristics. The proposed method provides a good opportunity for the relatively simple manufacture of a local field sensor for measuring the electrical field distribution, potential profiles, and charge dynamics for a wide range of mesoscopic objects. Diagnostic systems and devices based on such sensors can be used in various fields of physics, chemistry, material science, biology, electronics, medicine, etc.

Ultralow-power complementary metal-oxide-semiconductor inverters constructed on Schottky barrier modified nanowire metal-oxide-semiconductor field-effect-transistors.

PubMed

Ma, R M; Peng, R M; Wen, X N; Dai, L; Liu, C; Sun, T; Xu, W J; Qin, G G

2010-10-01

We show that the threshold voltages of both n- and p-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) can be lowered to close to zero by adding extra Schottky contacts on top of nanowires (NWs). Novel complementary metal-oxide-semiconductor (CMOS) inverters are constructed on these Schottky barrier modified n- and p-channel NW MOSFETs. Based on the high performances of the modified n- and p-channel MOSFETs, especially the low threshold voltages, the as-fabricated CMOS inverters have low operating voltage, high voltage gain, and ultra-low static power dissipation.

GaN nanowire arrays with nonpolar sidewalls for vertically integrated field-effect transistors.

PubMed

Yu, Feng; Yao, Shengbo; Römer, Friedhard; Witzigmann, Bernd; Schimpke, Tilman; Strassburg, Martin; Bakin, Andrey; Schumacher, Hans Werner; Peiner, Erwin; Wasisto, Hutomo Suryo; Waag, Andreas

2017-03-03

Vertically aligned gallium nitride (GaN) nanowire (NW) arrays have attracted a lot of attention because of their potential for novel devices in the fields of optoelectronics and nanoelectronics. In this work, GaN NW arrays have been designed and fabricated by combining suitable nanomachining processes including dry and wet etching. After inductively coupled plasma dry reactive ion etching, the GaN NWs are subsequently treated in wet chemical etching using AZ400K developer (i.e., with an activation energy of 0.69 ± 0.02 eV and a Cr mask) to form hexagonal and smooth a-plane sidewalls. Etching experiments using potassium hydroxide (KOH) water solution reveal that the sidewall orientation preference depends on etchant concentration. A model concerning surface bonding configuration on crystallography facets has been proposed to understand the anisotropic wet etching mechanism. Finally, NW array-based vertical field-effect transistors with wrap-gated structure have been fabricated. A device composed of 99 NWs exhibits enhancement mode operation with a threshold voltage of 1.5 V, a superior electrostatic control, and a high current output of >10 mA, which prevail potential applications in next-generation power switches and high-temperature digital circuits.

Enhanced mobility in vertically scaled N-polar high-electron-mobility transistors using GaN/InGaN composite channels

NASA Astrophysics Data System (ADS)

Li, Haoran; Wienecke, Steven; Romanczyk, Brian; Ahmadi, Elaheh; Guidry, Matthew; Zheng, Xun; Keller, Stacia; Mishra, Umesh K.

2018-02-01

A GaN/InGaN composite channel design for vertically scaled N-polar high-electron-mobility transistor (HEMT) structures is proposed and demonstrated by metal-organic chemical vapor deposition. In a conventional N-polar HEMT structure, as the channel thickness (tch) decreases, the sheet charge density (ns) decreases, the electric field in the channel increases, and the centroid of the two-dimensional electron gas (2DEG) moves towards the back-barrier/channel interface, resulting in stronger scattering and lower electron mobility (μ). In this study, a thin InGaN layer was introduced in-between the channel and the AlGaN cap to increase the 2DEG density and reduce the electric field in the channel and therefore increase the electron mobility. The dependence of μ on the InGaN thickness (tInGaN) and the indium composition (xIn) was investigated for different channel thicknesses. With optimized tInGaN and xIn, significant improvements in electron mobility were observed. For a 6 nm channel HEMT structure, the electron mobility increased from 606 to 1141 cm2/(V.s) when the 6 nm thick pure GaN channel was replaced by the 4 nm GaN/2 nm In0.1Ga0.9N composite channel.

Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

DOEpatents

Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

2001-01-01

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Model for large magnetoresistance effect in p–n junctions

NASA Astrophysics Data System (ADS)

Cao, Yang; Yang, Dezheng; Si, Mingsu; Shi, Huigang; Xue, Desheng

2018-06-01

We present a simple model based on the classic Shockley model to explain the magnetotransport in nonmagnetic p–n junctions. Under a magnetic field, the evaluation of the carrier to compensate Lorentz force establishes the necessary space-charge region distribution. The calculated current–voltage (I–V) characteristics under various magnetic fields demonstrate that the conventional nonmagnetic p–n junction can exhibit an extremely large magnetoresistance effect, which is even larger than that in magnetic materials. Because the large magnetoresistance effect that we discussed is based on the conventional p–n junction device, our model provides new insight into the development of semiconductor magnetoelectronics.

Current crowding mediated large contact noise in graphene field-effect transistors

PubMed Central

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-01-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene–metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V−1 s−1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal–channel interface, which could be generic to two-dimensional material-based electronic devices. PMID:27929087

Current crowding mediated large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-12-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V-1 s-1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.

Graphene-graphite oxide field-effect transistors.

PubMed

Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

2012-03-14

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

A study of effects of electrode contacts on performance of organic-based light-emitting field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Dae-Kyu; Choi, Jong-Ho

2018-02-01

Herein is presented a comparative performance analysis of heterojunction organic-based light-emitting field-effect transistors (OLEFETs) with symmetric (Au only) and asymmetric (Au and LiF/Al) electrode contacts. The devices had a top source-drain contact with long-channel geometry and were produced by sequentially depositing p-type pentacene and n-type N,N‧-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13) using a neutral cluster beam deposition apparatus. The spectroscopic, structural and morphological properties of the organic thin films were examined using photoluminescence (PL) spectroscopy, X-ray diffraction (XRD) method, laser scanning confocal and atomic force microscopy (LSCM, AFM). Based upon the growth of high-quality, well-packed crystalline thin films, the devices demonstrated ambipolar field-effect characteristics, stress-free operational stability, and light emission under ambient conditions. Various device parameters were derived from the fits of the observed characteristics. The hole mobilities were nearly equal irrespective of the electrode contacts, whereas the electron mobilities of the transistors with LiF/Al drain electrodes were higher due to the low injection barrier. For the OLEFETs with symmetric electrodes, electroluminescence (EL) occurred only in the vicinity of the hole-injecting electrode, whereas for the OLEFETs with asymmetric electrodes, the emission occurred in the vicinity of both hole- and electron-injecting electrodes. By tuning the carrier injection and transport through high- and low-work function metals, the hole-electron recombination sites could be controlled. The operating conduction and light emission mechanism are discussed with the aid of EL images obtained using a charge-coupled device (CCD) camera.

Non-localized trapping effects in AlGaN/GaN heterojunction field-effect transistors subjected to on-state bias stress

NASA Astrophysics Data System (ADS)

Hu, Cheng-Yu; Hashizume, Tamotsu

2012-04-01

For AlGaN/GaN heterojunction field-effect transistors, on-state-bias-stress (on-stress)-induced trapping effects were observed across the entire drain access region, not only at the gate edge. However, during the application of on-stress, the highest electric field was only localized at the drain side of the gate edge. Using the location of the highest electric field as a reference, the trapping effects at the gate edge and at the more distant access region were referred to as localized and non-localized trapping effect, respectively. Using two-dimensional-electron-gas sensing-bar (2DEG-sensing-bar) and dual-gate structures, the non-localized trapping effects were investigated and the trap density was measured to be ˜1.3 × 1012 cm-2. The effect of passivation was also discussed. It was found that both surface leakage currents and hot electrons are responsible for the non-localized trapping effects with hot electrons having the dominant effect. Since hot electrons are generated from the 2DEG channel, it is highly likely that the involved traps are mainly in the GaN buffer layer. Using monochromatic irradiation (1.24-2.81 eV), the trap levels responsible for the non-localized trapping effects were found to be located at 0.6-1.6 eV from the valence band of GaN. Both trap-assisted impact ionization and direct channel electron injection are proposed as the possible mechanisms of the hot-electron-related non-localized trapping effect. Finally, using the 2DEG-sensing-bar structure, we directly confirmed that blocking gate injected electrons is an important mechanism of Al2O3 passivation.

Cryogenic measurements of aerojet GaAs n-JFETs

NASA Technical Reports Server (NTRS)

Goebel, John H.; Weber, Theodore T.

1993-01-01

The spectral noise characteristics of Aerojet gallium arsenide (GaAs) junction field effect transistors (JFET's) have been investigated down to liquid-helium temperatures. Noise characterization was performed with the field effect transistor (FET) in the floating-gate mode, in the grounded-gate mode to determine the lowest noise readings possible, and with an extrinsic silicon photodetector at various detector bias voltages to determine optimum operating conditions. The measurements indicate that the Aerojet GaAs JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to silicon (Si) metal oxide semiconductor field effect transistor (MOSFET's) operating at liquid helium temperatures, and is equal to the best Si n channel junction field effect transistor (n-JFET's) operating at 300 K.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

Charge movement in a GaN-based hetero-structure field effect transistor structure with carbon doped buffer under applied substrate bias

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pooth, Alexander, E-mail: a.pooth@bristol.ac.uk; IQE; Uren, Michael J.

2015-12-07

Charge trapping and transport in the carbon doped GaN buffer of a GaN-based hetero-structure field effect transistor (HFET) has been investigated under both positive and negative substrate bias. Clear evidence of redistribution of charges in the carbon doped region by thermally generated holes is seen, with electron injection and capture observed during positive bias. Excellent agreement is found with simulations. It is shown that these effects are intrinsic to the carbon doped GaN and need to be controlled to provide reliable and efficient GaN-based power HFETs.

Organic field-effect transistors: a combined study on short-channel effects and the influence of substrate pre-treatment on ambient stability

NASA Astrophysics Data System (ADS)

Klug, A.; Meingast, A.; Wurzinger, G.; Blümel, A.; Schmoltner, K.; Scherf, U.; List, E. J. W.

2011-10-01

For high-performance low-cost applications based on organic field-effect transistors (OFETs) and corresponding sensors essential properties of the applied semiconducting materials include solution-processability, high field-effect mobility, compatibility with adjacent layers and stability with respect to ambient conditions. In this combined study regioregular poly(3-hexylthiophene)- and pentacene-based bottom-gate bottom-contact OFETs with various channel lengths are thoroughly investigated with respect to short-channel effects and the implications of dielectric surface modification with hexamethyldisilazane (HMDS) on device performance. In addition, the influences of oxygen, moisture and HMDStreatment on the ambient stability of the devices are evaluated in detail. While OFETs without surface modification exhibited the expected degradation behavior upon air exposure mainly due to oxygen/moisture-induced doping or charge-carrier trapping, the stability of the investigated semiconductors was found to be distinctly increased when the substrate surface was hydrophobized. The presented results thoroughly summarize important issues which have to be considered when selecting semiconducting materials for high-performance OFETs and OFET-based sensors.

Fabrication and analysis of polymer field-effect transistors

NASA Astrophysics Data System (ADS)

Scheinert, S.; Paasch, G.

2004-05-01

Parameters of organic field-effect transistors (OFET) achieved in recent years are promising enough for R & D activities towards a commercial low-cost polymer electronics. In spite of the fast progress, preparations dominated by trial and error are concentrated essentially on higher mobility polymers and shorter channel patterning, and the analysis of measured data is based on oversimplified models. Here ways to professionalize the research on polymer field-effect transistors are discussed exploiting experience accumulated in microelectronics. First of all, designing the devices before fabricating and subsequently analyzing them requires appropriate modelling. Almost independently from the nature of the transport process, the device physics is basically described by the drift-diffusion model, combined with non-degenerate carrier statistics. Therefore, with a modified interpretation of the so-called effective density of states, existing simulation tools can be applied, except for special cases which are discussed. Analytical estimates are helpful already in designing devices, and applied to experimental data they yield input parameters for the numerical simulations. Preparations of OFET's and capacitors with poly(3-ocylthiophene) (P3OT), poly(3-dodecylthiophene) P3HT, Arylamino-poly-(phenylene-vinylene) (PPV), poly(2-methoxy, 5 ethyl (2 hexyloxy) paraphenylenevinylene) MEH-PPV, and pentacene from a soluble precursor are described, with silicon dioxide (SiO2) or poly(4-vinylphenol) (P4VP) as gate insulator, and with rather different channel length. We demonstrate the advantage of combining all steps from design/fabrication to analysis of the experimental data with analytical estimates and numerical simulation. Of special importance is the connection between mobility, transistor channel length, cut-off frequency and operation voltage, which was the starting point for the development of a low-cost fabrication of high-performance submicrometer OFET's by an underetching

Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

NASA Astrophysics Data System (ADS)

Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.

2018-05-01

We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

Impact of metal gates on remote phonon scattering in titanium nitride/hafnium dioxide n-channel metal-oxide-semiconductor field effect transistors-low temperature electron mobility study

NASA Astrophysics Data System (ADS)

Maitra, Kingsuk; Frank, Martin M.; Narayanan, Vijay; Misra, Veena; Cartier, Eduard A.

2007-12-01

We report low temperature (40-300 K) electron mobility measurements on aggressively scaled [equivalent oxide thickness (EOT)=1 nm] n-channel metal-oxide-semiconductor field effect transistors (nMOSFETs) with HfO2 gate dielectrics and metal gate electrodes (TiN). A comparison is made with conventional nMOSFETs containing HfO2 with polycrystalline Si (poly-Si) gate electrodes. No substantial change in the temperature acceleration factor is observed when poly-Si is replaced with a metal gate, showing that soft optical phonons are not significantly screened by metal gates. A qualitative argument based on an analogy between remote phonon scattering and high-resolution electron energy-loss spectroscopy (HREELS) is provided to explain the underlying physics of the observed phenomenon. It is also shown that soft optical phonon scattering is strongly damped by thin SiO2 interface layers, such that room temperature electron mobility values at EOT=1 nm become competitive with values measured in nMOSFETs with SiON gate dielectrics used in current high performance processors.

Variability and reliability analysis in self-assembled multichannel carbon nanotube field-effect transistors

NASA Astrophysics Data System (ADS)

Hu, Zhaoying; Tulevski, George S.; Hannon, James B.; Afzali, Ali; Liehr, Michael; Park, Hongsik

2015-06-01

Carbon nanotubes (CNTs) have been widely studied as a channel material of scaled transistors for high-speed and low-power logic applications. In order to have sufficient drive current, it is widely assumed that CNT-based logic devices will have multiple CNTs in each channel. Understanding the effects of the number of CNTs on device performance can aid in the design of CNT field-effect transistors (CNTFETs). We have fabricated multi-CNT-channel CNTFETs with an 80-nm channel length using precise self-assembly methods. We describe compact statistical models and Monte Carlo simulations to analyze failure probability and the variability of the on-state current and threshold voltage. The results show that multichannel CNTFETs are more resilient to process variation and random environmental fluctuations than single-CNT devices.

Lead iodide perovskite light-emitting field-effect transistor

PubMed Central

Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

2015-01-01

Despite the widespread use of solution-processable hybrid organic–inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature. PMID:26108967

An underlap field-effect transistor for electrical detection of influenza

NASA Astrophysics Data System (ADS)

Lee, Kwang-Won; Choi, Sung-Jin; Ahn, Jae-Hyuk; Moon, Dong-Il; Park, Tae Jung; Lee, Sang Yup; Choi, Yang-Kyu

2010-01-01

An underlap channel-embedded field-effect transistor (FET) is proposed for label-free biomolecule detection. Specifically, silica binding protein fused with avian influenza (AI) surface antigen and avian influenza antibody (anti-AI) were designed as a receptor molecule and a target material, respectively. The drain current was significantly decreased after the binding of negatively charged anti-AI on the underlap channel. A set of control experiments supports that only the biomolecules on the underlap channel effectively modulate the drain current. With the merits of a simple fabrication process, complementary metal-oxide-semiconductor compatibility, and enhanced sensitivity, the underlap FET could be a promising candidate for a chip-based biosensor.

Nitrogen plasma-treated multilayer graphene-based field effect transistor fabrication and electronic characteristics

NASA Astrophysics Data System (ADS)

Su, Wei-Jhih; Chang, Hsuan-Chen; Honda, Shin-ichi; Lin, Pao-Hung; Huang, Ying-Sheng; Lee, Kuei-Yi

2017-08-01

Chemical doping with hetero-atoms is an effective method used to change the characteristics of materials. Nitrogen doping technology plays a critical role in regulating the electronic properties of graphene. Nitrogen plasma treatment was used in this work to dope nitrogen atoms to modulate multilayer graphene electrical properties. The measured I-V multilayer graphene-base field-effect transistor characteristics (GFETs) showed a V-shaped transfer curve with the hole and electron region separated from the measured current-voltage (I-V) minimum. GFETs fabricated with multilayer graphene from chemical vapor deposition (CVD) exhibited p-type behavior because of oxygen adsorption. After using different nitrogen plasma treatment times, the minimum in I-V characteristic shifted into the negative gate voltage region with increased nitrogen concentration and the GFET channel became an n-type semiconductor. GFETs could be easily fabricated using this method with potential for various applications. The GFET transfer characteristics could be tuned precisely by adjusting the nitrogen plasma treatment time.

A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen

2004-01-01

The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.

A unified analytical drain current model for Double-Gate Junctionless Field-Effect Transistors including short channel effects

NASA Astrophysics Data System (ADS)

Raksharam; Dutta, Aloke K.

2017-04-01

In this paper, a unified analytical model for the drain current of a symmetric Double-Gate Junctionless Field-Effect Transistor (DG-JLFET) is presented. The operation of the device has been classified into four modes: subthreshold, semi-depleted, accumulation, and hybrid; with the main focus of this work being on the accumulation mode, which has not been dealt with in detail so far in the literature. A physics-based model, using a simplified one-dimensional approach, has been developed for this mode, and it has been successfully integrated with the model for the hybrid mode. It also includes the effect of carrier mobility degradation due to the transverse electric field, which was hitherto missing in the earlier models reported in the literature. The piece-wise models have been unified using suitable interpolation functions. In addition, the model includes two most important short-channel effects pertaining to DG-JLFETs, namely the Drain Induced Barrier Lowering (DIBL) and the Subthreshold Swing (SS) degradation. The model is completely analytical, and is thus computationally highly efficient. The results of our model have shown an excellent match with those obtained from TCAD simulations for both long- and short-channel devices, as well as with the experimental data reported in the literature.

Performance evaluation of electro-optic effect based graphene transistors

NASA Astrophysics Data System (ADS)

Gupta, Gaurav; Abdul Jalil, Mansoor Bin; Yu, Bin; Liang, Gengchiau

2012-09-01

Despite the advantages afforded by the unique electronic properties of graphene, the absence of a bandgap has limited its applicability in logic devices. This has led to a study on electro-optic behavior in graphene for novel device operations, beyond the conventional field effect, to meet the requirements of ultra-low power and high-speed logic transistors. Recently, two potential designs have been proposed to leverage on this effect and open a virtual bandgap for ballistic transport in the graphene channel. The first one implements a barrier in the centre of the channel, whereas the second incorporates a tilted gate junction. In this paper, we computationally evaluate the relative device performance of these two designs, in terms of subthreshold slope (SS) and ION/IOFF ratio under different temperature and voltage bias, for a defect-free graphene channel. Our calculations employ pure optical modeling for low field electron transport under the constraints of device anatomy. The calculated results show that the two designs are functionally similar and are able to provide SS smaller than 60 mV per decade. Both designs show similar device performance but marginally top one another under different operating constraints. Our results could serve as a guide to circuit designers in selecting an appropriate design as per their system specifications and requirements.

High-performance air-stable n-channel organic thin film transistors based on halogenated perylene bisimide semiconductors.

PubMed

Schmidt, Rüdiger; Oh, Joon Hak; Sun, Ya-Sen; Deppisch, Manuela; Krause, Ana-Maria; Radacki, Krzysztof; Braunschweig, Holger; Könemann, Martin; Erk, Peter; Bao, Zhenan; Würthner, Frank

2009-05-06

The syntheses and comprehensive characterization of 14 organic semiconductors based on perylene bisimide (PBI) dyes that are equipped with up to four halogen substituents in the bay area of the perylene core and five different highly fluorinated imide substituents are described. The influence of the substituents on the LUMO level and the solid state packing of PBIs was examined by cyclic voltammetry and single crystal structure analyses of seven PBI derivatives, respectively. Top-contact/bottom-gate organic thin film transistor (OTFT) devices were constructed by vacuum deposition of these PBIs on SiO(2) gate dielectrics that had been pretreated with n-octadecyl triethoxysilane in vapor phase (OTS-V) or solution phase (OTS-S). The electrical characterization of all devices was accomplished in a nitrogen atmosphere as well as in air, and the structural features of thin films were explored by grazing incidence X-ray diffraction (GIXD) and atomic force microscopy (AFM). Several of those PBIs that bear only hydrogen or up to two fluorine substitutents at the concomitantly flat PBI core afforded excellent n-channel transistors, in particular, on OTS-S substrate and even in air (mu > 0.5 cm(2) V(-1) s(-1); I(on)/I(off) > 10(6)). The best OTFTs were obtained for 2,2,3,3,4,4,4-heptafluorobutyl-substituted PBI 1a ("PTCDI-C4F7") on OTS-S with n-channel field effect mobilities consistently >1 cm(2) V(-1) s(-1) and on-to-off current rations of 10(6) in a nitrogen atmosphere and in air. For distorted core-tetrahalogenated (fluorine, chlorine, or bromine) PBIs, less advantageous solid state packing properties were found and high performance OTFTs were obtained from only one tetrachlorinated derivative (2d on OTS-S). The excellent on-to-off current modulation combined with high mobility in air makes these PBIs suitable for a wide range of practical applications.

Vertical field effect tunneling transistor based on graphene-ultrathin Si nanomembrane heterostructures

NASA Astrophysics Data System (ADS)

Das, Tanmoy; Jang, Houk; Bok Lee, Jae; Chu, Hyunwoo; Kim, Seong Dae; Ahn, Jong-Hyun

2015-12-01

Graphene-based heterostructured vertical transistors have attracted a great deal of research interest. Herein we propose a Si-based technology platform for creating graphene/ultrathin semiconductor/metal (GSM) junctions, which can be applied to large-scale and low-power electronics compatible with a variety of substrates. We fabricated graphene/Si nanomembrane (NM)/metal vertical heterostructures by using a dry transfer technique to transfer Si NMs onto chemical vapor deposition-grown graphene layers. The resulting van der Waals interfaces between graphene and p-Si NMs exhibited nearly ideal Schottky barrier behavior. Due to the low density of states of graphene, the graphene/Si NM Schottky barrier height can be modulated by modulating the band profile in the channel region, yielding well-defined current modulation. We obtained a maximum current on/off ratio (Ion/Ioff) of up to ˜103, with a current density of 102 A cm-2. We also observed significant dependence of Schottky barrier height Δφb on the thickness of the Si NMs. We confirmed that the transport in these devices is dominated by the effects of the graphene/Si NM Schottky barrier.

Polarization induced doped transistor

DOEpatents

Xing, Huili; Jena, Debdeep; Nomoto, Kazuki; Song, Bo; Zhu, Mingda; Hu, Zongyang

2016-06-07

A nitride-based field effect transistor (FET) comprises a compositionally graded and polarization induced doped p-layer underlying at least one gate contact and a compositionally graded and doped n-channel underlying a source contact. The n-channel is converted from the p-layer to the n-channel by ion implantation, a buffer underlies the doped p-layer and the n-channel, and a drain underlies the buffer.

Electrical characteristics of Graphene based Field Effect Transistor (GFET) biosensor for ADH detection

NASA Astrophysics Data System (ADS)

Selvarajan, Reena Sri; Hamzah, Azrul Azlan; Majlis, Burhanuddin Yeop

2017-08-01

First pristine graphene was successfully produced by mechanical exfoliation and electrically characterized in 2004 by Andre Geim and Konstantin Novoselov at University of Manchester. Since its discovery in 2004, graphene also known as `super' material that has enticed many researchers and engineers to explore its potential in ultrasensitive detection of analytes in biosensing applications. Among myriad reported sensors, biosensors based on field effect transistors (FETs) have attracted much attention. Thus, implementing graphene as conducting channel material hastens the opportunities for production of ultrasensitive biosensors for future device applications. Herein, we have reported electrical characteristics of graphene based field effect transistor (GFET) for ADH detection. GFET was modelled and simulated using Lumerical DEVICE charge transport solver (DEVICE CT). Electrical characteristics comprising of transfer and output characteristics curves are reported in this study. The device shows ambipolar curve and achieved a minimum conductivity of 0.23912 e5A at Dirac point. However, the curve shifts to the left and introduces significant changes in the minimum conductivity as drain voltage is increased. Output characteristics of GFET exhibits linear Id - Vd dependence characteristics for gate voltage ranging from 0 to 1.5 V. In addition, behavior of electrical transport through GFET was analyzed for various simulation temperatures. It clearly proves that the electrical transport in GFET is dependent on the simulation temperature as it may vary the maximum resistance in channel of the device. Therefore, this unique electrical characteristics of GFET makes it as a promising candidate for ultrasensitive detection of small biomolecules such as ADH in biosensing applications.

Modeling of charge transport in ion bipolar junction transistors.

PubMed

Volkov, Anton V; Tybrandt, Klas; Berggren, Magnus; Zozoulenko, Igor V

2014-06-17

Spatiotemporal control of the complex chemical microenvironment is of great importance to many fields within life science. One way to facilitate such control is to construct delivery circuits, comprising arrays of dispensing outlets, for ions and charged biomolecules based on ionic transistors. This allows for addressability of ionic signals, which opens up for spatiotemporally controlled delivery in a highly complex manner. One class of ionic transistors, the ion bipolar junction transistors (IBJTs), is especially attractive for these applications because these transistors are functional at physiological conditions and have been employed to modulate the delivery of neurotransmitters to regulate signaling in neuronal cells. Further, the first integrated complementary ionic circuits were recently developed on the basis of these ionic transistors. However, a detailed understanding of the device physics of these transistors is still lacking and hampers further development of components and circuits. Here, we report on the modeling of IBJTs using Poisson's and Nernst-Planck equations and the finite element method. A two-dimensional model of the device is employed that successfully reproduces the main characteristics of the measurement data. On the basis of the detailed concentration and potential profiles provided by the model, the different modes of operation of the transistor are analyzed as well as the transitions between the different modes. The model correctly predicts the measured threshold voltage, which is explained in terms of membrane potentials. All in all, the results provide the basis for a detailed understanding of IBJT operation. This new knowledge is employed to discuss potential improvements of ion bipolar junction transistors in terms of miniaturization and device parameters.

Strategies for Improving the Performance of Sensors Based on Organic Field-Effect Transistors.

PubMed

Wu, Xiaohan; Mao, Shun; Chen, Junhong; Huang, Jia

2018-04-01

Organic semiconductors (OSCs) have been extensively studied as sensing channel materials in field-effect transistors due to their unique charge transport properties. Stimulation caused by its environmental conditions can readily change the charge-carrier density and mobility of OSCs. Organic field-effect transistors (OFETs) can act as both signal transducers and signal amplifiers, which greatly simplifies the device structure. Over the past decades, various sensors based on OFETs have been developed, including physical sensors, chemical sensors, biosensors, and integrated sensor arrays with advanced functionalities. However, the performance of OFET-based sensors still needs to be improved to meet the requirements from various practical applications, such as high sensitivity, high selectivity, and rapid response speed. Tailoring molecular structures and micro/nanofilm structures of OSCs is a vital strategy for achieving better sensing performance. Modification of the dielectric layer and the semiconductor/dielectric interface is another approach for improving the sensor performance. Moreover, advanced sensory functionalities have been achieved by developing integrated device arrays. Here, a brief review of strategies used for improving the performance of OFET sensors is presented, which is expected to inspire and provide guidance for the design of future OFET sensors for various specific and practical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A III-V nanowire channel on silicon for high-performance vertical transistors.

PubMed

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

Investigation of defect-induced abnormal body current in fin field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin

2015-08-24

This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal.

Current saturation and voltage gain in bilayer graphene field effect transistors.

PubMed

Szafranek, B N; Fiori, G; Schall, D; Neumaier, D; Kurz, H

2012-03-14

The emergence of graphene with its unique electrical properties has triggered hopes in the electronic devices community regarding its exploitation as a channel material in field effect transistors. Graphene is especially promising for devices working at frequencies in the 100 GHz range. So far, graphene field effect transistors (GFETs) have shown cutoff frequencies up to 300 GHz, while exhibiting poor voltage gains, another important figure of merit for analog high frequency applications. In the present work, we show that the voltage gain of GFETs can be improved significantly by using bilayer graphene, where a band gap is introduced through a vertical electric displacement field. At a displacement field of -1.7 V/nm the bilayer GFETs exhibit an intrinsic voltage gain up to 35, a factor of 6 higher than the voltage gain in corresponding monolayer GFETs. The transconductance, which limits the cutoff frequency of a transistor, is not degraded by the displacement field and is similar in both monolayer and bilayer GFETs. Using numerical simulations based on an atomistic p(z) tight-binding Hamiltonian we demonstrate that this approach can be extended to sub-100 nm gate lengths. © 2012 American Chemical Society

Double gate graphene nanoribbon field effect transistor with single halo pocket in channel region

NASA Astrophysics Data System (ADS)

Naderi, Ali

2016-01-01

A new structure for graphene nanoribbon field-effect transistors (GNRFETs) is proposed and investigated using quantum simulation with a nonequilibrium Green's function (NEGF) method. Tunneling leakage current and ambipolar conduction are known effects for MOSFET-like GNRFETs. To minimize these issues a novel structure with a simple change of the GNRFETs by using single halo pocket in the intrinsic channel region, "Single Halo GNRFET (SH-GNRFET)", is proposed. An appropriate halo pocket at source side of channel is used to modify potential distribution of the gate region and weaken band to band tunneling (BTBT). In devices with materials like Si in channel region, doping type of halo and source/drain regions are different. But, here, due to the smaller bandgap of graphene, the mentioned doping types should be the same to reduce BTBT. Simulations have shown that in comparison with conventional GNRFET (C-GNRFET), an SH-GNRFET with appropriately halo doping results in a larger ON current (Ion), smaller OFF current (Ioff), a larger ON-OFF current ratio (Ion/Ioff), superior ambipolar characteristics, a reduced power-delay product and lower delay time.

Highly Crumpled All-Carbon Transistors for Brain Activity Recording.

PubMed

Yang, Long; Zhao, Yan; Xu, Wenjing; Shi, Enzheng; Wei, Wenjing; Li, Xinming; Cao, Anyuan; Cao, Yanping; Fang, Ying

2017-01-11

Neural probes based on graphene field-effect transistors have been demonstrated. Yet, the minimum detectable signal of graphene transistor-based probes is inversely proportional to the square root of the active graphene area. This fundamentally limits the scaling of graphene transistor-based neural probes for improved spatial resolution in brain activity recording. Here, we address this challenge using highly crumpled all-carbon transistors formed by compressing down to 16% of its initial area. All-carbon transistors, chemically synthesized by seamless integration of graphene channels and hybrid graphene/carbon nanotube electrodes, maintained structural integrity and stable electronic properties under large mechanical deformation, whereas stress-induced cracking and junction failure occurred in conventional graphene/metal transistors. Flexible, highly crumpled all-carbon transistors were further verified for in vivo recording of brain activity in rats. These results highlight the importance of advanced material and device design concepts to make improvements in neuroelectronics.

Performance evaluation of electro-optic effect based graphene transistors.

PubMed

Gupta, Gaurav; Jalil, Mansoor Bin Abdul; Yu, Bin; Liang, Gengchiau

2012-10-21

Despite the advantages afforded by the unique electronic properties of graphene, the absence of a bandgap has limited its applicability in logic devices. This has led to a study on electro-optic behavior in graphene for novel device operations, beyond the conventional field effect, to meet the requirements of ultra-low power and high-speed logic transistors. Recently, two potential designs have been proposed to leverage on this effect and open a virtual bandgap for ballistic transport in the graphene channel. The first one implements a barrier in the centre of the channel, whereas the second incorporates a tilted gate junction. In this paper, we computationally evaluate the relative device performance of these two designs, in terms of subthreshold slope (SS) and I(ON)/I(OFF) ratio under different temperature and voltage bias, for a defect-free graphene channel. Our calculations employ pure optical modeling for low field electron transport under the constraints of device anatomy. The calculated results show that the two designs are functionally similar and are able to provide SS smaller than 60 mV per decade. Both designs show similar device performance but marginally top one another under different operating constraints. Our results could serve as a guide to circuit designers in selecting an appropriate design as per their system specifications and requirements.

Electron density window for best frequency performance, lowest phase noise and slowest degradation of GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Matulionis, Arvydas

2013-07-01

The problems in the realm of nitride heterostructure field-effect transistors (HFETs) are discussed in terms of a novel fluctuation-dissipation-based approach impelled by a recent demonstration of strong correlation of hot-electron fluctuations with frequency performance and degradation of the devices. The correlation has its genesis in the dissipation of the LO-mode heat accumulated by the non-equilibrium longitudinal optical phonons (hot phonons) confined in the channel that hosts the high-density hot-electron gas subjected to a high electric field. The LO-mode heat causes additional scattering of hot electrons and facilitates defect formation in a different manner than the conventional heat contained mainly in the acoustic phonon mode. We treat the heat dissipation problem in terms of the hot-phonon lifetime responsible for the conversion of the non-migrant hot phonons into migrant acoustic modes and other vibrations. The lifetime is measured over a wide range of electron density and supplied electric power. The optimal conditions for the dissipation of the LO-mode heat are associated with the plasmon-assisted disintegration of hot phonons. Signatures of plasmons are experimentally resolved in fluctuations, dissipation, hot-electron transport, transistor frequency performance, transistor phase noise and transistor reliability. In particular, a slower degradation and a faster operation of GaN-based HFETs take place inside the electron density window where the resonant plasmon-assisted ultrafast dissipation of the LO-mode heat comes into play. A novel heterostructure design for the possible improvement of HFET performance is proposed, implemented and tested.

Ambipolar transport of silver nanoparticles decorated graphene oxide field effect transistors

NASA Astrophysics Data System (ADS)

Sarkar, Kalyan Jyoti; Sarkar, K.; Pal, B.; Kumar, Aparabal; Das, Anish; Banerji, P.

2018-05-01

In this article, we report ambipolar field effect transistor (FET) by using graphene oxide (GO) as a gate dielectric material for silver nanoparticles (AgNPs) decorated GO channel layer. GO was synthesized by Hummers' method. The AgNPs were prepared via photochemical reduction of silver nitrate solution by using monoethanolamine as a reducing agent. Morphological properties of channel layer were characterized by Field Effect Scanning Electron Microscopy (FESEM). Fourier Transform Infrared Spectroscopy (FTIR) was carried out to characterize GO thin film. For device fabrication gold (Au) was deposited as source-drain contact and aluminum (Al) was taken as bottom contact. Electrical measurements were performed by back gate configuration. Ambipolar transport behavior was explained from transfer characteristics. A maximum electron mobiliy of 6.65 cm2/Vs and a hole mobility of 2.46 cm2/Vs were extracted from the transfer characteristics. These results suggest that GO is a potential candidate as a gate dielectric material for thin film transistor applications and also provides new insights in GO based research.

Tunable SnSe2 /WSe2 Heterostructure Tunneling Field Effect Transistor.

PubMed

Yan, Xiao; Liu, Chunsen; Li, Chao; Bao, Wenzhong; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2017-09-01

The burgeoning 2D semiconductors can maintain excellent device electrostatics with an ultranarrow channel length and can realize tunneling by electrostatic gating to avoid deprivation of band-edge sharpness resulting from chemical doping, which make them perfect candidates for tunneling field effect transistors. Here this study presents SnSe 2 /WSe 2 van der Waals heterostructures with SnSe 2 as the p-layer and WSe 2 as the n-layer. The energy band alignment changes from a staggered gap band offset (type-II) to a broken gap (type-III) when changing the negative back-gate voltage to positive, resulting in the device operating as a rectifier diode (rectification ratio ~10 4 ) or an n-type tunneling field effect transistor, respectively. A steep average subthreshold swing of 80 mV dec -1 for exceeding two decades of drain current with a minimum of 37 mV dec -1 at room temperature is observed, and an evident trend toward negative differential resistance is also accomplished for the tunneling field effect transistor due to the high gate efficiency of 0.36 for single gate devices. The I ON /I OFF ratio of the transfer characteristics is >10 6 , accompanying a high ON current >10 -5 A. This work presents original phenomena of multilayer 2D van der Waals heterostructures which can be applied to low-power consumption devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ambipolar pentacene field-effect transistor with double-layer organic insulator

NASA Astrophysics Data System (ADS)

Kwak, Jeong-Hun; Baek, Heume-Il; Lee, Changhee

2006-08-01

Ambipolar conduction in organic field-effect transistor is very important feature to achieve organic CMOS circuitry. We fabricated an ambipolar pentacene field-effect transistors consisted of gold source-drain electrodes and double-layered PMMA (Polymethylmethacrylate) / PVA (Polyvinyl Alcohol) organic insulator on the ITO(Indium-tin-oxide)-patterned glass substrate. These top-contact geometry field-effect transistors were fabricated in the vacuum of 10 -6 Torr and minimally exposed to atmosphere before its measurement and characterized in the vacuum condition. Our device showed reasonable p-type characteristics of field-effect hole mobility of 0.2-0.9 cm2/Vs and the current ON/OFF ratio of about 10 6 compared to prior reports with similar configurations. For the n-type characteristics, field-effect electron mobility of 0.004-0.008 cm2/Vs and the current ON/OFF ratio of about 10 3 were measured, which is relatively high performance for the n-type conduction of pentacene field-effect transistors. We attributed these ambipolar properties mainly to the hydroxyl-free PMMA insulator interface with the pentacene active layer. In addition, an increased insulator capacitance due to double-layer insulator structure with high-k PVA layer also helped us to observe relatively good n-type characteristics.

Analyte chemisorption and sensing on n- and p-channel copper phthalocyanine thin-film transistors.

PubMed

Yang, Richard D; Park, Jeongwon; Colesniuc, Corneliu N; Schuller, Ivan K; Royer, James E; Trogler, William C; Kummel, Andrew C

2009-04-28

Chemical sensing properties of phthalocyanine thin-film transistors have been investigated using nearly identical n- and p-channel devices. P-type copper phthalocyanine (CuPc) has been modified with fluorine groups to convert the charge carriers from holes to electrons. The sensor responses to the tight binding analyte dimethyl methylphosphonate (DMMP) and weak binding analyte methanol (MeOH) were compared in air and N(2). The results suggest that the sensor response involves counterdoping of pre-adsorbed oxygen (O(2)). A linear dependence of chemical response to DMMP concentration was observed in both n- and p- type devices. For DMMP, there is a factor of 2.5 difference in the chemical sensitivity between n- and p-channel CuPc thin-film transistors, even though it has similar binding strength to n- and p-type CuPc molecules as indicated by the desorption times. The effect is attributed to the difference in the analyte perturbation of electron and hole trap energies in n- and p-type materials.

Tunability of p- and n-channel TiOx thin film transistors.

PubMed

Peng, Wu-Chang; Chen, Yao-Ching; He, Ju-Liang; Ou, Sin-Liang; Horng, Ray-Hua; Wuu, Dong-Sing

2018-06-18

To acquire device-quality TiO x films usually needs high-temperature growth or additional post-thermal treatment. However, both processes make it very difficult to form the p-type TiO x even under oxygen-poor growth condition. With the aid of high energy generated by high power impulse magnetron sputtering (HIPIMS), a highly stable p-type TiO x film with good quality can be achieved. In this research, by varying the oxygen flow rate, p-type γ-TiO and n-type TiO 2 films were both prepared by HIPIMS. Furthermore, p- and n-type thin film transistors employing γ-TiO and TiO 2 as channel layers possess the field-effect carrier mobilities of 0.2 and 0.7 cm 2 /Vs, while their on/off current ratios are 1.7 × 10 4 and 2.5 × 10 5 , respectively. The first presented p-type γ-TiO TFT is a major breakthrough for fabricating the TiO x -based p-n combinational devices. Additionally, our work also confirms HIPIMS offers the possibility of growing both p- and n-type conductive oxides, significantly expanding the practical usage of this technique.

Ultrathin strain-gated field effect transistor based on In-doped ZnO nanobelts

NASA Astrophysics Data System (ADS)

Zhang, Zheng; Du, Junli; Li, Bing; Zhang, Shuhao; Hong, Mengyu; Zhang, Xiaomei; Liao, Qingliang; Zhang, Yue

2017-08-01

In this work, we fabricated a strain-gated piezoelectric transistor based on single In-doped ZnO nanobelt with ±(0001) top/bottom polar surfaces. In the vertical structured transistor, the Pt tip of the AFM and Au film are used as source and drain electrode. The electrical transport performance of the transistor is gated by compressive strains. The working mechanism is attributed to the Schottky barrier height changed under the coupling effect of piezoresistive and piezoelectric. Uniquely, the transistor turns off under the compressive stress of 806 nN. The strain-gated transistor is likely to have important applications in high resolution mapping device and MEMS devices.

Proton Damage Effects on Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2014-06-19

PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Evan R. Kemp, Ctr...United States. AFIT-ENP-T-14-J-39 PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Presented to...PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS Evan R. Kemp, BS Ctr, USAF Approved: // Signed

Utilizing Schottky barriers to suppress short-channel effects in organic transistors

NASA Astrophysics Data System (ADS)

Fernández, Anton F.; Zojer, Karin

2017-10-01

Transistors with short channel lengths exhibit profound deviations from the ideally expected behavior. One of the undesired short-channel effects is an enlarged OFF current that is associated with a premature turn on of the transistor. We present an efficient approach to suppress the OFF current, defined as the current at zero gate source bias, in short-channel organic transistors. We employ two-dimensional device simulations based on the drift-diffusion model to demonstrate that intentionally incorporating a Schottky barrier for injection enhances the ON-OFF ratio in both staggered and coplanar transistor architectures. The Schottky barrier is identified to directly counteract the origin of enlarged OFF currents: Short channels promote a drain-induced barrier lowering. The latter permits unhindered injection of charges even at reverse gate-source bias. An additional Schottky barrier hampers injection for such points of operations. We explain how it is possible to find the Schottky barrier of the smallest height necessary to exactly compensate for the premature turn on. This approach offers a substantial enhancement of the ON-OFF ratio. We show that this roots in the fact that such optimal barrier heights offer an excellent compromise between an OFF current diminished by orders of magnitude and an only slightly reduced ON current.

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

1984-04-19

In a field-effect transistor comprising a semiconductor having therein a source, a drain, a channel and a gate in operational relationship, there is provided an improvement wherein said semiconductor is a superlattice comprising alternating quantum well and barrier layers, the quantum well layers comprising a first direct gap semiconductor material which in bulk form has a certain bandgap and a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, the barrier layers comprising a second semiconductor material having a bandgap wider than that of said first semiconductor material, wherein the layer thicknesses of said quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice having a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, and wherein the thicknesses of said quantum well layers are selected to provide a superlattice curve of electron velocity versus applied electric field whereby, at applied electric fields higher than that at which the maximum electron velocity occurs in said first material when in bulk form, the electron velocities are higher in said superlattice than they are in said first semiconductor material in bulk form.

Study on high breakdown voltage GaN-based vertical field effect transistor with interfacial charge engineering for power applications

NASA Astrophysics Data System (ADS)

Du, Jiangfeng; Liu, Dong; Liu, Yong; Bai, Zhiyuan; Jiang, Zhiguang; Liu, Yang; Yu, Qi

2017-11-01

A high voltage GaN-based vertical field effect transistor with interfacial charge engineering (GaN ICE-VFET) is proposed and its breakdown mechanism is presented. This vertical FET features oxide trenches which show a fixed negative charge at the oxide/GaN interface. In the off-state, firstly, the trench oxide layer acts as a field plate; secondly, the n-GaN buffer layer is inverted along the oxide/GaN interface and thus a vertical hole layer is formed, which acts as a virtual p-pillar and laterally depletes the n-buffer pillar. Both of them modulate electric field distribution in the device and significantly increase the breakdown voltage (BV). Compared with a conventional GaN vertical FET, the BV of GaN ICE-VFET is increased from 1148 V to 4153 V with the same buffer thickness of 20 μm. Furthermore, the proposed device achieves a great improvement in the tradeoff between BV and on-resistance; and its figure of merit even exceeds the GaN one-dimensional limit.

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

1987-06-08

A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space. The layer thicknesses of the quantum well layers are selected to provide a superlattice L/sub 2D/-valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley. 2 figs.

Graphene Field Effect Transistor for Radiation Detection

NASA Technical Reports Server (NTRS)

Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

2016-01-01

The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

p - n Junction Dynamics Induced in a Graphene Channel by Ferroelectric-Domain Motion in the Substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kurchak, Anatolii I.; Eliseev, Eugene A.; Kalinin, Sergei V.

The p - n junction dynamics induced in a graphene channel by stripe-domain nucleation, motion, and reversal in a ferroelectric substrate is explored using a self-consistent approach based on Landau-Ginzburg-Devonshire phenomenology combined with classical electrostatics. Relatively low gate voltages are required to induce the hysteresis of ferroelectric polarization and graphene charge in response to the periodic gate voltage. Pronounced nonlinear hysteresis of graphene conductance with a wide memory window corresponds to high amplitudes of gate voltage. Also, we reveal the extrinsic size effect in the dependence of the graphene-channel conductivity on its length. We predict that the top-gate–dielectric-layer–graphene-channel–ferroelectric-substrate nanostructure consideredmore » here can be a promising candidate for the fabrication of the next generation of modulators and rectifiers based on the graphene p - n junctions.« less

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Quantitative analysis of immobilized penicillinase using enzyme-modified AlGaN/GaN field-effect transistors.

PubMed

Müntze, Gesche Mareike; Baur, Barbara; Schäfer, Wladimir; Sasse, Alexander; Howgate, John; Röth, Kai; Eickhoff, Martin

2015-02-15

Penicillinase-modified AlGaN/GaN field-effect transistors (PenFETs) are utilized to systematically investigate the covalently immobilized enzyme penicillinase under different experimental conditions. We demonstrate quantitative evaluation of covalently immobilized penicillinase layers on pH-sensitive field-effect transistors (FETs) using an analytical kinetic PenFET model. This kinetic model is explicitly suited for devices with thin enzyme layers that are not diffusion-limited, as it is the case for the PenFETs discussed here. By means of the kinetic model it was possible to extract the Michaelis constant of covalently immobilized penicillinase as well as relative transport coefficients of the different species associated with the enzymatic reaction which, exempli gratia, give information about the permeability of the enzymatic layer. Based on this analysis we quantify the reproducibility and the stability of the analyzed PenFETs over the course of 33 days as well as the influence of pH and buffer concentration on the properties of the enzymatic layer. Thereby the stability measurements reveal a Michalis constant KM of (67 ± 13)μM while the chronological development of the relative transport coefficients suggests a detachment of physisorbed penicillinase during the first two weeks since production. Our results show that AlGaN/GaN PenFETs prepared by covalent immobilization of a penicillinase enzyme layer present a powerful tool for quantitative analysis of enzyme functionality. Copyright © 2014 Elsevier B.V. All rights reserved.

Comparison between the effects of positive noncatastrophic HMB ESD stress in n-channel and p-channel power MOSFET's

NASA Astrophysics Data System (ADS)

Zupac, Dragan; Kosier, Steven L.; Schrimpf, Ronald D.; Galloway, Kenneth F.; Baum, Keith W.

1991-10-01

The effect of noncatastrophic positive human body model (HBM) electrostatic discharge (ESD) stress on n-channel power MOSFETs is radically different from that on p-channel MOSFETs. In n-channel transistors, the stress causes negative shifts of the current-voltage characteristics indicative of positive charge trapping in the gate oxide. In p-channel transistors, the stress increases the drain-to-source leakage current, probably due to localized avalanche electron injection from the p-doped drain.

Flexible ambipolar organic field-effect transistors with reverse-offset-printed silver electrodes for a complementary inverter.

PubMed

Park, Junsu; Kim, Minseok; Yeom, Seung-Won; Ha, Hyeon Jun; Song, Hyenggun; Min Jhon, Young; Kim, Yun-Hi; Ju, Byeong-Kwon

2016-06-03

We report ambipolar organic field-effect transistors and complementary inverter circuits with reverse-offset-printed (ROP) Ag electrodes fabricated on a flexible substrate. A diketopyrrolopyrrole-based co-polymer (PDPP-TAT) was used as the semiconductor and poly(methyl methacrylate) was used as the gate insulator. Considerable improvement is observed in the n-channel electrical characteristics by inserting a cesium carbonate (Cs2CO3) as the electron-injection/hole-blocking layer at the interface between the semiconductors and the electrodes. The saturation mobility values are 0.35 cm(2) V(-1) s(-1) for the p-channel and 0.027 cm(2) V(-1) s(-1) for the n-channel. A complementary inverter is demonstrated based on the ROP process, and it is selectively controlled by the insertion of Cs2CO3 onto the n-channel region via thermal evaporation. Moreover, the devices show stable operation during the mechanical bending test using tensile strains ranging from 0.05% to 0.5%. The results confirm that these devices have great potential for use in flexible and inexpensive integrated circuits over a large area.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Wang, Chun-Chi

2018-04-01

To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

High on/off ratios in bilayer graphene field effect transistors realized by surface dopants.

PubMed

Szafranek, B N; Schall, D; Otto, M; Neumaier, D; Kurz, H

2011-07-13

The unique property of bilayer graphene to show a band gap tunable by external electrical fields enables a variety of different device concepts with novel functionalities for electronic, optoelectronic, and sensor applications. So far the operation of bilayer graphene-based field effect transistors requires two individual gates to vary the channel's conductance and to create a band gap. In this paper, we report on a method to increase the on/off ratio in single gated bilayer graphene field effect transistors by adsorbate doping. The adsorbate dopants on the upper side of the graphene establish a displacement field perpendicular to the graphene surface breaking the inversion symmetry of the two graphene layers. Low-temperature measurements indicate that the increased on/off ratio is caused by the opening of a mobility gap.

Current and emerging challenges of field effect transistor based bio-sensing

NASA Astrophysics Data System (ADS)

Matsumoto, Akira; Miyahara, Yuji

2013-10-01

Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed ``Bio-FETs'', provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.

Current and emerging challenges of field effect transistor based bio-sensing.

PubMed

Matsumoto, Akira; Miyahara, Yuji

2013-11-21

Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed "Bio-FETs", provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.

The nature and role of trap states in a dendrimer-based organic field-effect transistor explosive sensor

NASA Astrophysics Data System (ADS)

Tang, Guoqiang; Chen, Simon S. Y.; Lee, Kwan H.; Pivrikas, Almantas; Aljada, Muhsen; Burn, Paul L.; Meredith, Paul; Shaw, Paul E.

2013-06-01

We report the fabrication and charge transport characterization of carbazole dendrimer-based organic field-effect transistors (OFETs) for the sensing of explosive vapors. After exposure to para-nitrotoluene (pNT) vapor, the OFET channel carrier mobility decreases due to trapping induced by the absorbed pNT. The influence of trap states on transport in devices before and after exposure to pNT vapor has been determined using temperature-dependent measurements of the field-effect mobility. These data clearly show that the absorption of pNT vapor into the dendrimer active layer results in the formation of additional trap states. Such states inhibit charge transport by decreasing the density of conducting states.

Junction-based field emission structure for field emission display

DOEpatents

Dinh, Long N.; Balooch, Mehdi; McLean, II, William; Schildbach, Marcus A.

2002-01-01

A junction-based field emission display, wherein the junctions are formed by depositing a semiconducting or dielectric, low work function, negative electron affinity (NEA) silicon-based compound film (SBCF) onto a metal or n-type semiconductor substrate. The SBCF can be doped to become a p-type semiconductor. A small forward bias voltage is applied across the junction so that electron transport is from the substrate into the SBCF region. Upon entering into this NEA region, many electrons are released into the vacuum level above the SBCF surface and accelerated toward a positively biased phosphor screen anode, hence lighting up the phosphor screen for display. To turn off, simply switch off the applied potential across the SBCF/substrate. May be used for field emission flat panel displays.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

Organic-inorganic proximity effect in the magneto-conductance of vertical organic field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Khachatryan, B.; Devir-Wolfman, A. H.; Ehrenfreund, E., E-mail: eitane@technion.ac.il

Vertical organic field effect transistors having a patterned source electrode and an a-SiO{sub 2} insulation layer show high performance as a switching element with high transfer characteristics. By measuring the low field magneto-conductance under ambient conditions at room temperature, we show here that the proximity of the inorganic a-SiO{sub 2} insulation to the organic conducting channel affects considerably the magnetic response. We propose that in n-type devices, electrons in the organic conducting channel and spin bearing charged defects in the inorganic a-SiO{sub 2} insulation layer (e.g., O{sub 2} = Si{sup +·}) form oppositely charged spin pairs whose singlet-triplet spin configurations are mixedmore » through the relatively strong hyperfine field of {sup 29}Si. By increasing the contact area between the insulation layer and the conducting channel, the ∼2% magneto-conductance response may be considerably enhanced.« less

Novel gallium nitride based microwave noise and power heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Chumbes, Eduardo Martin

With the pioneering efforts of Isamu Akasaki of Meiji University and Shuji Nakamura of Nichia Chemical Industries in the late 1980's and early 1990's, the first long-lived candela-class blue and ultraviolet light emitting devices have finally come to fruition. Their success in conquering this Holy Grail in opto-electronics is due to their development of a new technology based remarkably on a class of semiconductor materials that has been practically ignored and overlooked by almost everyone for the past twenty years---the nitrides of Al, Ga and In and their alloys. The breakthroughs made from this new technology in the last decade of the 20th century has revolutionized and revitalized worldwide research and development efforts to the point where it is feasible for other important technologies such as high-density information storage, high-resolution full-color displays and efficient white light lamps and UV sensors to come much closer to realization. Equally important is the potential that this new technology can bring toward the development of efficient ultra-high power and high-temperature electronics that will revolutionize the aerospace and high-speed communication industries. Specifically, the large bandgap and strong polar properties of the group III-nitrides has at present allowed for the realization of simple doped and remarkably undoped AlGaN/GaN transistor structures on sapphire and SiC substrates with two-dimensional electron gas sheet densities significantly greater than that of conventional transistor structures based on GaAs and InP. This dissertation will look specifically at extending undoped AlGaN/GaN heterostructure field-effect transistors or HFETs towards more advanced system applications involving the integration of these devices onto a more advanced Si technology and looking at the feasibility of this integration. It will also address important issues similar devices on semi-insulating SiC substrates have in robust microwave low noise and

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

NASA Astrophysics Data System (ADS)

Deen, David A.; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J.

2016-08-01

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics ft/fmax of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with ft/fmax of 48/60 GHz.

Recent progress in photoactive organic field-effect transistors.

PubMed

Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

2014-04-01

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

Imaging snake orbits at graphene n -p junctions

NASA Astrophysics Data System (ADS)

Kolasiński, K.; Mreńca-Kolasińska, A.; Szafran, B.

2017-01-01

We consider conductance mapping of the snake orbits confined along the n -p junction defined in graphene by the electrostatic doping in the quantum Hall regime. We explain the periodicity of conductance oscillations at the magnetic field and the Fermi energy scales by the properties of the n -p junction as a conducting channel. We evaluate the conductance maps for a floating gate scanning the surface of the device. In the quantum Hall conditions the currents flow near the edges of the sample and along the n -p junction. The conductance mapping resolves only the n -p junction and not the edges. The conductance oscillations along the junction are found in the maps with periodicity related to the cyclotron orbits of the scattering current. Stronger probe potentials provide support to localized resonances at one of the sides of the junction with current loops that interfere with the n -p junction currents. The interference results in a series of narrow lines parallel to the junction with positions that strongly depend on the magnetic field through the Aharonov-Bohm effect. The consequences of a limited transparency of finite-width n -p junctions are also discussed.

Phase-locked loop based on nanoelectromechanical resonant-body field effect transistor

NASA Astrophysics Data System (ADS)

Bartsch, S. T.; Rusu, A.; Ionescu, A. M.

2012-10-01

We demonstrate the room-temperature operation of a silicon nanoelectromechanical resonant-body field effect transistor (RB-FET) embedded into phase-locked loop (PLL). The very-high frequency resonator uses on-chip electrostatic actuation and transistor-based displacement detection. The heterodyne frequency down-conversion based on resistive FET mixing provides a loop feedback signal with high signal-to-noise ratio. We identify key parameters for PLL operation, and analyze the performance of the RB-FET at the system level. Used as resonant mass detector, the experimental frequency stability in the ppm-range translates into sub atto-gram (10-18 g) sensitivity in high vacuum. The feedback and control system are generic and may be extended to other mechanical resonators with transistor properties, such as graphene membranes and carbon nanotubes.

Transport properties and device-design of Z-shaped MoS2 nanoribbon planar junctions

NASA Astrophysics Data System (ADS)

Zhang, Hua; Zhou, Wenzhe; Liu, Qi; Yang, Zhixiong; Pan, Jiangling; Ouyang, Fangping; Xu, Hui

2017-09-01

Based on MoS2 nanoribbons, metal-semiconductor-metal planar junction devices were constructed. The electronic and transport properties of the devices were studied by using density function theory (DFT) and nonequilibrium Green's functions (NEGF). It is found that a band gap about 0.4 eV occurs in the planar junction. The electron and hole transmissions of the devices are mainly contributed by the Mo atomic orbitals. The electron transport channel is located at the edge of armchair MoS2 nanoribbon, while the hole transport channel is delocalized in the channel region. The I-V curve of the two-probe device shows typical transport behavior of Schottky barrier, and the threshold voltage is of about 0.2 V. The field effect transistors (FET) based on the planar junction turn out to be good bipolar transistors, the maximum current on/off ratio can reach up to 1 × 104, and the subthreshold swing is 243 mV/dec. It is found that the off-state current is dependent on the length and width of the channel, while the on-state current is almost unaffected. The switching performance of the FET is improved with increasing the length of the channel, and shows oscillation behavior with the change of the channel width.

Scanning gate study of organic thin-film field-effect transistor

NASA Astrophysics Data System (ADS)

Aoki, N.; Sudou, K.; Matsusaki, K.; Okamoto, K.; Ochiai, Y.

2008-03-01

Scanning gate microscopy (SGM) has been applied for a study of organic thin-film field effect transistor (OFET). In contrast to one-dimensional nano-material such a carbon nanonube or nano-structure such a quantum point contact, visualization a transport characteristic of OFET channel is basically rather difficult since the channel width is much larger than the size of the SGM tip. Nevertheless, Schottky barriers are successfully visualized at the boundary between the metal electrodes and the OFET channel at ambient atmosphere.

JFET/SOS (Junction Field-Effect Transistor/Silicon-on-Sapphire) Devices: Gamma-Radiation-Induced Effects.

DTIC Science & Technology

1988-03-01

Results, ATR-86A(8501)-1, The Aerospace Corporation: El Segundo, Calif. (20 May 1987). 3. D. Neaman , W. Shedd, and B. Buchanan, "Permanently Ionizing...Radiation Effects in Dielectrically Bounded Field-Effect Transistors," IEEE Trans.. Nucl. Sci. NS-20 [6], 158-165 (Decembe. 1973). 4. D. Neaman , W. Shedd...1974). 5. D. Neaman , W. Shedd, and B. Buchanan, "Silicon-Sapphire Interface Charge Trapping -- Effects of Sapphire Type and Epi Growth Conditions

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

Gate Tunable Transport in Graphene/MoS₂/(Cr/Au) Vertical Field-Effect Transistors.

PubMed

Nazir, Ghazanfar; Khan, Muhammad Farooq; Aftab, Sikandar; Afzal, Amir Muhammad; Dastgeer, Ghulam; Rehman, Malik Abdul; Seo, Yongho; Eom, Jonghwa

2017-12-28

Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS₂/(Cr/Au) vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr), the electrical transport in our Gr/MoS₂/(Cr/Au) vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS₂ can be modified by back-gate voltage and the current bias. Vertical resistance (R vert ) of a Gr/MoS₂/(Cr/Au) transistor is compared with planar resistance (R planar ) of a conventional lateral MoS₂ field-effect transistor. We have also studied electrical properties for various thicknesses of MoS₂ channels in both vertical and lateral transistors. As the thickness of MoS₂ increases, R vert increases, but R planar decreases. The increase of R vert in the thicker MoS₂ film is attributed to the interlayer resistance in the vertical direction. However, R planar shows a lower value for a thicker MoS₂ film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.

Planar edge Schottky barrier-tunneling transistors using epitaxial graphene/SiC junctions.

PubMed

Kunc, Jan; Hu, Yike; Palmer, James; Guo, Zelei; Hankinson, John; Gamal, Salah H; Berger, Claire; de Heer, Walt A

2014-09-10

A purely planar graphene/SiC field effect transistor is presented here. The horizontal current flow over one-dimensional tunneling barrier between planar graphene contact and coplanar two-dimensional SiC channel exhibits superior on/off ratio compared to conventional transistors employing vertical electron transport. Multilayer epitaxial graphene (MEG) grown on SiC(0001̅) was adopted as the transistor source and drain. The channel is formed by the accumulation layer at the interface of semi-insulating SiC and a surface silicate that forms after high vacuum high temperature annealing. Electronic bands between the graphene edge and SiC accumulation layer form a thin Schottky barrier, which is dominated by tunneling at low temperatures. A thermionic emission prevails over tunneling at high temperatures. We show that neglecting tunneling effectively causes the temperature dependence of the Schottky barrier height. The channel can support current densities up to 35 A/m.

Effects of geometric configuration on droplet generation in Y-junctions and anti-Y-junctions microchannels

NASA Astrophysics Data System (ADS)

Liu, Zhao-Miao; Liu, Li-Kun; Shen, Feng

2015-10-01

Droplets generation in Y-junctions and anti-Y-junctions microchannels are experimentally studied using a high speed digital microscopic system and numerical simulation. Geometric configuration of a microchannel, such as Y-angle (90°, 135°, -90° and -135°), channel depth and other factors have been taken into consideration. It is found that droplets generated in anti-Y-junctions have a smaller size and a shorter generation cycle compared with those in Y-junctions under the same experimental conditions. Through observing the internal velocity field, the vortex appearing in continuous phase in anti-Y-junctions is one of the key factors for the difference of droplet size and generation cycle. It is found that droplet size is bigger and generation cycle is longer when the absolute angle value of the intersection between the continuous and the dispersed phases (i.e., the angle between the main channel and the continuous phase or the dispersed phase channel) increases. The droplet's size is influenced by the Y-angle, which varies with the channel depth in Y-junctions. The Y-angle has a positive effect on the droplet generation cycle, but a smaller height-width ratio will enhance the impact of a continuous and dispersed phase's intersection angle on the droplet generation cycle in Y-junctions microchannels.

Control of short-channel effects in InAlN/GaN high-electron mobility transistors using graded AlGaN buffer

NASA Astrophysics Data System (ADS)

Han, Tiecheng; Zhao, Hongdong; Peng, Xiaocan; Li, Yuhai

2018-04-01

A graded AlGaN buffer is designed to realize the p-type buffer by inducing polarization-doping holes. Based on the two-dimensional device simulator, the effect of the graded AlGaN buffer on the direct-current (DC) and radio-frequency (RF) performance of short-gate InAlN/GaN high-electron mobility transistors (HEMTs) are investigated, theoretically. Compared to standard HEMT, an enhancement of electron confinement and a good control of short-channel effect (SCEs) are demonstrated in the graded AlGaN buffer HEMT. Accordingly, the pinched-off behavior and the ability of gate modulation are significantly improved. And, no serious SCEs are observed in the graded AlGaN buffer HEMT with an aspect ratio (LG/tch) of about 6.7, much lower than that of the standard HEMT (LG/tch = 13). In addition, for a 70-nm gate length, a peak current gain cutoff frequency (fT) of 171 GHz and power gain cutoff frequency (fmax) of 191 GHz are obtained in the grade buffer HEMT, which are higher than those of the standard one with the same gate length.

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed Central

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc. PMID:26039589

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc.

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John; Coss, James

1988-01-01

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

Highly sensitive protein detection using a plasmonic field effect transistor (Conference Presentation)

NASA Astrophysics Data System (ADS)

Shokri-Kojori, Hossein; Ji, Yiwen; Han, Xu; Paik, Younghun; Braunschweig, Adam; Kim, Sung Jin

2016-03-01

Localized surface Plasmon Resonance (LSPR) is a nanoscale phenomenon which presents strong resonance associated with noble metal nanostructures. This plasmon resonance based technology enables highly sensitive detection for chemical and biological applications. Recently, we have developed a plasmon field effect transistor (FET) that enables direct plasmonic-to-electric signal conversion with signal amplification. The plasmon FET consists of back-gated field effect transistor incorporated with gold nanoparticles on top of the FET channel. The gold nanostructures are physically separated from transistor electrodes and can be functionalized for a specific biological application. In this presentation, we report a successful demonstration of a model system to detect Con A proteins using Carbohydrate linkers as a capture molecule. The plasmon FET detected a very low concentration of Con A (0.006 mg/L) while it offers a wide dynamic range of 0.006-50 mg/L. In this demonstration, we used two-color light sources instead of a bulky spectrometer to achieve high sensitivity and wide dynamic range. The details of two-color based differential measurement method will be discussed. This novel protein-based sensor has several advantages such as extremely small size for point-of-care system, multiplexing capability, no need of complex optical geometry.

Antiferromagnetic Spin Wave Field-Effect Transistor

DOE PAGES

Cheng, Ran; Daniels, Matthew W.; Zhu, Jian-Gang; ...

2016-04-06

In a collinear antiferromagnet with easy-axis anisotropy, symmetry dictates that the spin wave modes must be doubly degenerate. Theses two modes, distinguished by their opposite polarization and available only in antiferromagnets, give rise to a novel degree of freedom to encode and process information. We show that the spin wave polarization can be manipulated by an electric field induced Dzyaloshinskii-Moriya interaction and magnetic anisotropy. We propose a prototype spin wave field effect transistor which realizes a gate-tunable magnonic analog of the Faraday effect, and demonstrate its application in THz signal modulation. In conclusion, our findings open up the exciting possibilitymore » of digital data processing utilizing antiferromagnetic spin waves and enable the direct projection of optical computing concepts onto the mesoscopic scale.« less

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is

Influence of the gate position on source-to-drain resistance in AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Yan; Lin, Zhaojun; Cui, Peng; Zhao, Jingtao; Fu, Chen; Yang, Ming; Lv, Yuanjie

2017-08-01

Using a suitable dual-gate structure, the source-to-drain resistance (RSD) of AlGaN/AlN/GaN heterostructure field-effect transistor (HFET) with varying gate position has been studied at room temperature. The theoretical and experimental results have revealed a dependence of RSD on the gate position. The variation of RSD with the gate position is found to stem from the polarization Coulomb field (PCF) scattering. This finding is of great benefit to the optimization of the performance of AlGaN/AlN/GaN HFET. Especially, when the AlGaN/AlN/GaN HFET works as a microwave device, it is beneficial to achieve the impedance matching by designing the appropriate gate position based on PCF scattering.

Strain and deformations engineered germanene bilayer double gate-field effect transistor by first principles

NASA Astrophysics Data System (ADS)

Meher Abhinav, E.; Chandrasekaran, Gopalakrishnan; Kasmir Raja, S. V.

2017-10-01

Germanene, silicene, stanene, phosphorene and graphene are some of single atomic materials with novel properties. In this paper, we explored bilayer germanene-based Double Gate-Field Effect Transistor (DG-FET) with various strains and deformations using Density Functional Theory (DFT) and Green's approach by first-principle calculations. The DG-FET of 1.6 nm width, 6 nm channel length (Lch) and HfO2 as gate dielectric has been modeled. For intrinsic deformation of germanene bilayer, we have enforced minute mechanical deformation of wrap and twist (5°) and ripple (0.5 Å) on germanene bilayer channel material. By using NEGF formalism, I-V Characteristics of various strains and deformation tailored DG-FET was calculated. Our results show that rough edge and single vacancy (5-9) in bilayer germanene diminishes the current around 47% and 58% respectively as compared with pristine bilayer germanene. In case of strain tailored bilayer DG-FET, multiple NDR regions were observed which can be utilized in building stable multiple logic states in digital circuits and high frequency oscillators using negative resistive techniques.

Anisotropic stress in narrow sGe fin field-effect transistor channels measured using nano-focused Raman spectroscopy

NASA Astrophysics Data System (ADS)

Nuytten, T.; Bogdanowicz, J.; Witters, L.; Eneman, G.; Hantschel, T.; Schulze, A.; Favia, P.; Bender, H.; De Wolf, I.; Vandervorst, W.

2018-05-01

The continued importance of strain engineering in semiconductor technology demands fast and reliable stress metrology that is non-destructive and process line-compatible. Raman spectroscopy meets these requirements but the diffraction limit prevents its application in current and future technology nodes. We show that nano-focused Raman scattering overcomes these limitations and can be combined with oil-immersion to obtain quantitative anisotropic stress measurements. We demonstrate accurate stress characterization in strained Ge fin field-effect transistor channels without sample preparation or advanced microscopy. The detailed analysis of the enhanced Raman response from a periodic array of 20 nm-wide Ge fins provides direct access to the stress levels inside the nanoscale channel, and the results are validated using nano-beam diffraction measurements.

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deen, David A., E-mail: david.deen@alumni.nd.edu; Storm, David F.; Scott Katzer, D.

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain currentmore » after bias stressed in subthreshold. These structures additionally achieved small signal metrics f{sub t}/f{sub max} of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with f{sub t}/f{sub max} of 48/60 GHz.« less

Enhanced Performance of Field-Effect Transistors Based on Black Phosphorus Channels Reduced by Galvanic Corrosion of Al Overlayers.

PubMed

Lee, Sangik; Yoon, Chansoo; Lee, Ji Hye; Kim, Yeon Soo; Lee, Mi Jung; Kim, Wondong; Baik, Jaeyoon; Jia, Quanxi; Park, Bae Ho

2018-06-06

Two-dimensional (2D)-layered semiconducting materials with considerable band gaps are emerging as a new class of materials applicable to next-generation devices. Particularly, black phosphorus (BP) is considered to be very promising for next-generation 2D electrical and optical devices because of its high carrier mobility of 200-1000 cm 2 V -1 s -1 and large on/off ratio of 10 4 to 10 5 in field-effect transistors (FETs). However, its environmental instability in air requires fabrication processes in a glovebox filled with nitrogen or argon gas followed by encapsulation, passivation, and chemical functionalization of BP. Here, we report a new method for reduction of BP-channel devices fabricated without the use of a glovebox by galvanic corrosion of an Al overlayer. The reduction of BP induced by an anodic oxidation of Al overlayer is demonstrated through surface characterization of BP using atomic force microscopy, Raman spectroscopy, and X-ray photoemission spectroscopy along with electrical measurement of a BP-channel FET. After the deposition of an Al overlayer, the FET device shows a significantly enhanced performance, including restoration of ambipolar transport, high carrier mobility of 220 cm 2 V -1 s -1 , low subthreshold swing of 0.73 V/decade, and low interface trap density of 7.8 × 10 11 cm -2 eV -1 . These improvements are attributed to both the reduction of the BP channel and the formation of an Al 2 O 3 interfacial layer resulting in a high- k screening effect. Moreover, ambipolar behavior of our BP-channel FET device combined with charge-trap behavior can be utilized for implementing reconfigurable memory and neuromorphic computing applications. Our study offers a simple device fabrication process for BP-channel FETs with high performance using galvanic oxidation of Al overlayers.

Effects of Energy Relaxation via Quantum Coupling Among Three-Dimensional Motion on the Tunneling Current of Graphene Field-Effect Transistors.

PubMed

Mao, Ling-Feng; Ning, Huansheng; Li, Xijun

2015-12-01

We report theoretical study of the effects of energy relaxation on the tunneling current through the oxide layer of a two-dimensional graphene field-effect transistor. In the channel, when three-dimensional electron thermal motion is considered in the Schrödinger equation, the gate leakage current at a given oxide field largely increases with the channel electric field, electron mobility, and energy relaxation time of electrons. Such an increase can be especially significant when the channel electric field is larger than 1 kV/cm. Numerical calculations show that the relative increment of the tunneling current through the gate oxide will decrease with increasing the thickness of oxide layer when the oxide is a few nanometers thick. This highlights that energy relaxation effect needs to be considered in modeling graphene transistors.

Study of InGaAs-based modulation doped field effect transistor structures using variable-angle spectroscopic ellipsometry

NASA Technical Reports Server (NTRS)

Alterovitz, S. A.; Sieg, R. M.; Yao, H. D.; Snyder, P. G.; Woollam, J. A.; Pamulapati, J.; Bhattacharya, P. K.; Sekula-Moise, P. A.

1991-01-01

Variable-angle spectroscopic ellipsometry was used to estimate the thicknesses of all layers within the optical penetration depth of InGaAs-based modulation doped field effect transistor structures. Strained and unstrained InGaAs channels were made by molecular beam epitaxy (MBE) on InP substrates and by metal-organic chemical vapor deposition on GaAs substrates. In most cases, ellipsometrically determined thicknesses were within 10% of the growth-calibration results. The MBE-made InGaAs strained layers showed large strain effects, indicating a probable shift in the critical points of their dielectric function toward the InP lattice-matched concentration.

Optical pulse generation in a transistor laser via intra-cavity photon-assisted tunneling and excess base carrier redistribution

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, M.; Iverson, E. W.; Wang, C. Y.

2015-11-02

For a direct-gap semiconductor (e.g., a p-n junction), photon-assisted tunneling is known to exhibit a high nonlinear absorption. In a transistor laser, as discussed here, the coherent photons generated at the quantum well interact with the collector junction field and “assist” electron tunneling from base to collector, thus resulting in the nonlinear modulation of the laser and the realization of optical pulse generation. 1 and 2 GHz optical pulses are demonstrated in the transistor laser using collector voltage control.

A steep-slope transistor based on abrupt electronic phase transition

NASA Astrophysics Data System (ADS)

Shukla, Nikhil; Thathachary, Arun V.; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G.; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman

2015-08-01

Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep (`sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.

A steep-slope transistor based on abrupt electronic phase transition.

PubMed

Shukla, Nikhil; Thathachary, Arun V; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman

2015-08-07

Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep ('sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Fluorination of Metal Phthalocyanines: Single-Crystal Growth, Efficient N-Channel Organic Field-Effect Transistors, and Structure-Property Relationships

PubMed Central

Jiang, Hui; Ye, Jun; Hu, Peng; Wei, Fengxia; Du, Kezhao; Wang, Ning; Ba, Te; Feng, Shuanglong; Kloc, Christian

2014-01-01

The fluorination of p-type metal phthalocyanines produces n-type semiconductors, allowing the design of organic electronic circuits that contain inexpensive heterojunctions made from chemically and thermally stable p- and n-type organic semiconductors. For the evaluation of close to intrinsic transport properties, high-quality centimeter-sized single crystals of F16CuPc, F16CoPc and F16ZnPc have been grown. New crystal structures of F16CuPc, F16CoPc and F16ZnPc have been determined. Organic single-crystal field-effect transistors have been fabricated to study the effects of the central metal atom on their charge transport properties. The F16ZnPc has the highest electron mobility (~1.1 cm2 V−1 s−1). Theoretical calculations indicate that the crystal structure and electronic structure of the central metal atom determine the transport properties of fluorinated metal phthalocyanines. PMID:25524460

Performance analysis of InGaAs/GaAsP heterojunction double gate tunnel field effect transistor

NASA Astrophysics Data System (ADS)

Ahish, S.; Sharma, Dheeraj; Vasantha, M. H.; Kumar, Y. B. N.

2017-03-01

In this paper, analog/RF performance of InGaAs/GaAsP heterojunction double gate tunnel field effect transistor (HJTFET) has been explored. A highly doped n+ layer is placed at the Source-Channel junction in order to improve the horizontal electric field component and thus, improve the realiability of the device. The analog performance of the device is analysed by extracting current-voltage characteristics, transcondutance (gm), gate-to-drain capacitance (Cgd) and gate-to-source capacitance (Cgs). Further, RF performance of the device is evaluated by obtaining cut-off frequency (fT) and Gain Bandwidth (GBW) product. ION /IOFF ratio equal to ≈ 109, subthreshold slope of 27 mV/dec, maximum fT of 2.1 THz and maximum GBW of 484 GHz were achieved. Also, the impact of temperature variation on the linearity performance of the device has been investigated. Furthermore, the circuit level performance of the device is performed by implementing a Common Source (CS) amplifier; maximum gain of 31.11 dB and 3-dB cut-off frequency equal to 91.2 GHz were achieved for load resistance (RL) = 17.5 KΩ.

Electronic Model of a Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry (Technical Monitor)

2001-01-01

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. T'he input and o Output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. No attempt was made to model the high frequency characteristics of the FFET. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.

A p-i-n junction diode based on locally doped carbon nanotube network

PubMed Central

Liu, Xiaodong; Chen, Changxin; Wei, Liangming; Hu, Nantao; Song, Chuanjuan; Liao, Chenghao; He, Rong; Dong, Xusheng; Wang, Ying; Liu, Qinran; Zhang, Yafei

2016-01-01

A p-i-n junction diode constructed by the locally doped network of single-walled carbon nanotubes (SWNTs) was investigated. In this diode, the two opposite ends of the SWNT-network channel were selectively doped by triethyloxonium hexachloroantimonate (OA) and polyethylenimine (PEI) to obtain the air-stable p- and n-type SWNTs respectively while the central area of the SWNT-network remained intrinsic state, resulting in the formation of a p-i-n junction with a strong built-in electronic field in the SWNTs. The results showed that the forward current and the rectification ratio of the diode increased as the doping degree increased. The forward current of the device could also be increased by decreasing the channel length. A high-performance p-i-n junction diode with a high rectification ratio (~104), large forward current (~12.2 μA) and low reverse saturated current (~1.8 nA) was achieved with the OA and PEI doping time of 5 h and 18 h for a channel length of ~6 μm. PMID:26996610

A p-i-n junction diode based on locally doped carbon nanotube network.

PubMed

Liu, Xiaodong; Chen, Changxin; Wei, Liangming; Hu, Nantao; Song, Chuanjuan; Liao, Chenghao; He, Rong; Dong, Xusheng; Wang, Ying; Liu, Qinran; Zhang, Yafei

2016-03-21

A p-i-n junction diode constructed by the locally doped network of single-walled carbon nanotubes (SWNTs) was investigated. In this diode, the two opposite ends of the SWNT-network channel were selectively doped by triethyloxonium hexachloroantimonate (OA) and polyethylenimine (PEI) to obtain the air-stable p- and n-type SWNTs respectively while the central area of the SWNT-network remained intrinsic state, resulting in the formation of a p-i-n junction with a strong built-in electronic field in the SWNTs. The results showed that the forward current and the rectification ratio of the diode increased as the doping degree increased. The forward current of the device could also be increased by decreasing the channel length. A high-performance p-i-n junction diode with a high rectification ratio (~10(4)), large forward current (~12.2 μA) and low reverse saturated current (~1.8 nA) was achieved with the OA and PEI doping time of 5 h and 18 h for a channel length of ~6 μm.

A p-i-n junction diode based on locally doped carbon nanotube network

NASA Astrophysics Data System (ADS)

Liu, Xiaodong; Chen, Changxin; Wei, Liangming; Hu, Nantao; Song, Chuanjuan; Liao, Chenghao; He, Rong; Dong, Xusheng; Wang, Ying; Liu, Qinran; Zhang, Yafei

2016-03-01

A p-i-n junction diode constructed by the locally doped network of single-walled carbon nanotubes (SWNTs) was investigated. In this diode, the two opposite ends of the SWNT-network channel were selectively doped by triethyloxonium hexachloroantimonate (OA) and polyethylenimine (PEI) to obtain the air-stable p- and n-type SWNTs respectively while the central area of the SWNT-network remained intrinsic state, resulting in the formation of a p-i-n junction with a strong built-in electronic field in the SWNTs. The results showed that the forward current and the rectification ratio of the diode increased as the doping degree increased. The forward current of the device could also be increased by decreasing the channel length. A high-performance p-i-n junction diode with a high rectification ratio (~104), large forward current (~12.2 μA) and low reverse saturated current (~1.8 nA) was achieved with the OA and PEI doping time of 5 h and 18 h for a channel length of ~6 μm.

Enhanced stability of thin film transistors with double-stacked amorphous IWO/IWO:N channel layer

NASA Astrophysics Data System (ADS)

Lin, Dong; Pi, Shubin; Yang, Jianwen; Tiwari, Nidhi; Ren, Jinhua; Zhang, Qun; Liu, Po-Tsun; Shieh, Han-Ping

2018-06-01

In this work, bottom-gate top-contact thin film transistors with double-stacked amorphous IWO/IWO:N channel layer were fabricated. Herein, amorphous IWO and N-doped IWO were deposited as front and back channel layers, respectively, by radio-frequency magnetron sputtering. The electrical characteristics of the bi-layer-channel thin film transistors (TFTs) were examined and compared with those of single-layer-channel (i.e., amorphous IWO or IWO:N) TFTs. It was demonstrated to exhibit a high mobility of 27.2 cm2 V‑1 s‑1 and an on/off current ratio of 107. Compared to the single peers, bi-layer a-IWO/IWO:N TFTs showed smaller hysteresis and higher stability under negative bias stress and negative bias temperature stress. The enhanced performance could be attributed to its unique double-stacked channel configuration, which successfully combined the merits of the TFTs with IWO and IWO:N channels. The underlying IWO thin film provided percolation paths for electron transport, meanwhile, the top IWO:N layer reduced the bulk trap densities. In addition, the IWO channel/gate insulator interface had reduced defects, and IWO:N back channel surface was insensitive to the ambient atmosphere. Overall, the proposed bi-layer a-IWO/IWO:N TFTs show potential for practical applications due to its possibly long-term serviceability.

Study of novel junctionless Ge n-Tunneling Field-Effect Transistors with lightly doped drain (LDD) region

NASA Astrophysics Data System (ADS)

Liu, Xiangyu; Hu, Huiyong; Wang, Bin; Wang, Meng; Han, Genquan; Cui, Shimin; Zhang, Heming

2017-02-01

In this paper, a novel junctionless Ge n-Tunneling Field-Effect Transistors (TFET) structure is proposed. The simulation results show that Ion = 5.5 × 10-5A/μm is achieved. The junctionless device structure enhances Ion effectively and increases the region where significant BTBT occurs, comparing with the normal Ge-nTEFT. The impact of the lightly doped drain (LDD) region is investigated. A comparison of Ion and Ioff of the junctionless Ge n-TFET with different channel doping concentration ND and LDD doping concentration NLDD is studied. Ioff is reduced 1 order of magnitude with the optimized ND and NLDD are 1 × 1018cm-3 and 1 × 1017 cm-3, respectively. To reduce the gate induced drain leakage (GIDL) current, the impact of the sloped gate oxide structure is also studied. By employing the sloped gate oxide structure, the below 60 mV/decade subthreshold swing S = 46.2 mV/decade is achieved at Ion = 4.05 × 10-5A/μm and Ion/Ioff = 5.7 × 106.

Charge injection engineering of ambipolar field-effect transistors for high-performance organic complementary circuits.

PubMed

Baeg, Kang-Jun; Kim, Juhwan; Khim, Dongyoon; Caironi, Mario; Kim, Dong-Yu; You, In-Kyu; Quinn, Jordan R; Facchetti, Antonio; Noh, Yong-Young

2011-08-01

Ambipolar π-conjugated polymers may provide inexpensive large-area manufacturing of complementary integrated circuits (CICs) without requiring micro-patterning of the individual p- and n-channel semiconductors. However, current-generation ambipolar semiconductor-based CICs suffer from higher static power consumption, low operation frequencies, and degraded noise margins compared to complementary logics based on unipolar p- and n-channel organic field-effect transistors (OFETs). Here, we demonstrate a simple methodology to control charge injection and transport in ambipolar OFETs via engineering of the electrical contacts. Solution-processed caesium (Cs) salts, as electron-injection and hole-blocking layers at the interface between semiconductors and charge injection electrodes, significantly decrease the gold (Au) work function (∼4.1 eV) compared to that of a pristine Au electrode (∼4.7 eV). By controlling the electrode surface chemistry, excellent p-channel (hole mobility ∼0.1-0.6 cm(2)/(Vs)) and n-channel (electron mobility ∼0.1-0.3 cm(2)/(Vs)) OFET characteristics with the same semiconductor are demonstrated. Most importantly, in these OFETs the counterpart charge carrier currents are highly suppressed for depletion mode operation (I(off) < 70 nA when I(on) > 0.1-0.2 mA). Thus, high-performance, truly complementary inverters (high gain >50 and high noise margin >75% of ideal value) and ring oscillators (oscillation frequency ∼12 kHz) based on a solution-processed ambipolar polymer are demonstrated.

Electrical characteristics of organic perylene single-crystal-based field-effect transistors

NASA Astrophysics Data System (ADS)

Lee, Jin-Woo; Kang, Han-Saem; Kim, Min-Ki; Kim, Kihyun; Cho, Mi-Yeon; Kwon, Young-Wan; Joo, Jinsoo; Kim, Jae-Il; Hong, Chang-Seop

2007-12-01

We report on the fabrication of organic field-effect transistors (OFETs) using perylene single crystal as the active material and their electrical characteristics. Perylene single crystals were directly grown from perylene powder in a furnace using a relatively short growth time of 1-3 h. The crystalline structure of the perylene single crystals was characterized by means of a single-crystal x-ray diffractometer. In order to place the perylene single crystal onto the Au electrodes of the field-effect transistor, a polymethlymethacrylate thin layer was spin-coated on top of the crystal surface. The OFETs fabricated using the perylene single crystal showed a typical p-type operating mode. The field-effect mobility of the perylene crystal based OFETs was measured to be ˜9.62×10-4 cm2/V s at room temperature. The anisotropy of the mobility implying the existence of different mobilities when applying currents in different directions was observed for the OFETs, and the existence of traps in the perylene crystal was found through the measurements of the temperature-dependent mobility at various operating drain voltages.

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

PubMed

Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

2015-10-01

In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

Improved Performance of h-BN Encapsulated Double Gate Graphene Nanomesh Field Effect Transistor for Short Channel Length

NASA Astrophysics Data System (ADS)

Tiwari, Durgesh Laxman; Sivasankaran, K.

This paper presents improved performance of Double Gate Graphene Nanomesh Field Effect Transistor (DG-GNMFET) with h-BN as substrate and gate oxide material. The DC characteristics of 0.95μm and 5nm channel length devices are studied for SiO2 and h-BN substrate and oxide material. For analyzing the ballistic behavior of electron for 5nm channel length, von Neumann boundary condition is considered near source and drain contact region. The simulated results show improved saturation current for h-BN encapsulated structure with two times higher on current value (0.375 for SiO2 and 0.621 for h-BN) as compared to SiO2 encapsulated structure. The obtained result shows h-BN to be a better substrate and oxide material for graphene electronics with improved device characteristics.

Ge-on-insulator tunneling FET with abrupt source junction formed by utilizing snowplow effect of NiGe

NASA Astrophysics Data System (ADS)

Matsumura, Ryo; Katoh, Takumi; Takaguchi, Ryotaro; Takenaka, Mitsuru; Takagi, Shinichi

2018-04-01

Tunneling field-effect transistors (TFETs) attract much attention for use in realizing next-generation low-power processors. In particular, Ge-on-insulator (GOI) TFETs are expected to realize low power operation with a high on-current/off-current (I on/I off) ratio, owing to their narrow bandgap. Here, to improve the performance of GOI-TFETs, a source junction with a high doping concentration and an abrupt impurity profile is essential. In this study, a snowplow effect of NiGe combined with low-energy BF2 + implantation has been investigated to realize an abrupt p+/n Ge junction for GOI n-channel TFETs. By optimizing the Ni thickness to form NiGe (thickness: 4 nm), an abrupt junction with a B profile abruptness of ˜5 nm/dec has been realized with a high doping concentration of around 1021 cm-3. The operation of GOI n-TFETs with this source junction having the abrupt B profile has been demonstrated, and the improvement of TFET properties such as the I on/I off ratio from 311 to 743 and the subthreshold slope from 368 to 239 mV/dec has been observed. This junction formation technology is attractive for enhancing the TFET performance.

Thin-film transistors with a graphene oxide nanocomposite channel.

PubMed

Jilani, S Mahaboob; Gamot, Tanesh D; Banerji, P

2012-12-04

Graphene oxide (GO) and graphene oxide-zinc oxide nanocomposites (GO-ZnO) were used as channel materials on SiO(2)/Si to fabricate thin-film transistors (TFT) with an aluminum source and drain. Pure GO-based TFT showed poor field-effect characteristics. However, GO-ZnO-nanocomposite-based TFT showed better field-effect performance because of the anchoring of ZnO nanostructures in the GO matrix, which causes a partial reduction in GO as is found from X-ray photoelectron spectroscopic data. The field-effect mobility of charge carriers at a drain voltage of 1 V was found to be 1.94 cm(2)/(V s). The transport of charge carriers in GO-ZnO was explained by a fluctuation-induced tunneling mechanism.

Detection beyond Debye's length with an electrolyte-gated organic field-effect transistor.

PubMed

Palazzo, Gerardo; De Tullio, Donato; Magliulo, Maria; Mallardi, Antonia; Intranuovo, Francesca; Mulla, Mohammad Yusuf; Favia, Pietro; Vikholm-Lundin, Inger; Torsi, Luisa

2015-02-04

Electrolyte-gated organic field-effect transistors are successfully used as biosensors to detect binding events occurring at distances from the transistor electronic channel that are much larger than the Debye length in highly concentrated solutions. The sensing mechanism is mainly capacitive and is due to the formation of Donnan's equilibria within the protein layer, leading to an extra capacitance (CDON) in series to the gating system. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polarization-mediated Debye-screening of surface potential fluctuations in dual-channel AlN/GaN high electron mobility transistors

NASA Astrophysics Data System (ADS)

Deen, David A.; Miller, Ross A.; Osinsky, Andrei V.; Downey, Brian P.; Storm, David F.; Meyer, David J.; Scott Katzer, D.; Nepal, Neeraj

2016-12-01

A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed, simulated, and demonstrated that suppresses gate lag due to surface-originated trapped charge. Dual two-dimensional electron gas (2DEG) channels are utilized such that the top 2DEG serves as an equipotential that screens potential fluctuations resulting from surface trapped charge. The bottom channel serves as the transistor's modulated channel. Two device modeling approaches have been performed as a means to guide the device design and to elucidate the relationship between the design and performance metrics. The modeling efforts include a self-consistent Poisson-Schrodinger solution for electrostatic simulation as well as hydrodynamic three-dimensional device modeling for three-dimensional electrostatics, steady-state, and transient simulations. Experimental results validated the HEMT design whereby homo-epitaxial growth on free-standing GaN substrates and fabrication of the same-wafer dual-channel and recessed-gate AlN/GaN HEMTs have been demonstrated. Notable pulsed-gate performance has been achieved by the fabricated HEMTs through a gate lag ratio of 0.86 with minimal drain current collapse while maintaining high levels of dc and rf performance.

A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

PubMed

Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

2015-01-01

For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

A computational study of a novel graphene nanoribbon field effect transistor

NASA Astrophysics Data System (ADS)

Ghoreishi, Seyed Saleh; Yousefi, Reza

2017-04-01

In this paper, using gate structure engineering and modification of channel dopant profile, we propose a new double gate graphene nanoribbon field effect transistor (DG-GNRFET) mainly to suppress the band-to-band tunneling (BTBT) of carriers. In the new device, the intrinsic part of the channel is replaced by an intrinsic-lightly doped-intrinsic (I -N--I) configuration in a way that only the intrinsic parts are covered by the gate contact. Transport characteristics of the device are investigated theoretically using the nonequilibrium Green’s function (NEGF) formalism. Numerical simulations show that off-current, ambipolar behavior, on/off-current ratio and the switching characteristics such as intrinsic delay and power-delay product are improved. In addition, the new device demonstrates better sub-threshold swing and less drain-induced barrier lowering (DIBL).

Characterization and Fabrication of High k dielectric-High Mobility Channel Transistors

NASA Astrophysics Data System (ADS)

Sun, Xiao

As the conventional scaling of Si-based MOSFETs would bring negligible or even negative merits for IC's beyond the 7-nm CMOS technology node, many perceive the use of high-mobility channels to be one of the most likely principle changes, in order to achieve higher performance and lower power. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, InGaAs, GaSb, GaN...) to replace Si CMOS technology. In this thesis, the distinct properties of the traps in the high-k dielectric/high-mobility substrate system is discussed, as well as the challenges to characterize and passivate them. By modifying certain conventional gate admittance methods, both the fast and slow traps in Ge MOS gate stacks is investigated. In addition, a novel ac-transconductance method originated at Yale is introduced and demonstrated with several advanced transistors provided by collaborating groups, such as ultra-thin-body & box SO1 MOSFETs (CEA-LETI), InGaAs MOSFETs (IMEC, UT Austin, Purdue), and GaN MOS-HEMT (MIT). By use of the aforementioned characterization techniques, several effective passivation techniques on high mobility substrates (Ge, InGaAs, GaSb, GeSn, etc.) are evaluated, including a novel Ba sub-monolayer passivation of Ge surface. The key factors that need to be considered in passivating high mobility substrates are revealed. The techniques that we have established for characterizing traps in advanced field-effect transistors, as well as the knowledge gained about these traps by the use of these techniques, have been applied to the study of ionizing radiation effects in high-mobility-channel transistors, because it is very important to understand such effects as these devices are likely to be exposed to radiation-harsh environments, such as in outer space, nuclear plants, and during X-ray or UHV lithography. In this thesis, the total ionizing dose (TD) radiation effects of InGaAs-based MOSFETs and GaN-based MOS-HEMT are

Mobility overestimation due to gated contacts in organic field-effect transistors

PubMed Central

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Fabrication of metal nanopatterns for organic field effect transistor electrodes by cracking and transfer printing

NASA Astrophysics Data System (ADS)

Wang, Xiaonan; Fu, Tingting; Wang, Zhe

2018-04-01

In this paper, we demonstrate a novel method for fabricating metal nanopatterns using cracking to address the limitations of traditional techniques. Parallel crack arrays were created in a polydimethylsiloxane (PDMS) mold using a combination of surface modification and control of strain fields. The elastic PDMS containing the crack arrays was subsequently used as a stamp to prepare nanoscale metal patterns on a substrate by transfer printing. To illustrate the functionality of this technique, we employed the metal patterns as the source and drain contacts of an organic field effect transistor. Using this approach, we fabricated transistors with channel lengths ranging from 70-600 nm. The performance of these devices when the channel length was reduced was studied. The drive current density increases as expected, indicating the creation of operational transistors with recognizable properties.

Channel length dependence of field-effect mobility of c-axis-aligned crystalline In-Ga-Zn-O field-effect transistors

NASA Astrophysics Data System (ADS)

Matsuda, Shinpei; Kikuchi, Erumu; Yamane, Yasumasa; Okazaki, Yutaka; Yamazaki, Shunpei

2015-04-01

Field-effect transistors (FETs) with c-axis-aligned crystalline In-Ga-Zn-O (CAAC-IGZO) active layers have extremely low off-state leakage current. Exploiting this feature, we investigated the application of CAAC-IGZO FETs to LSI memories. A high on-state current is required for the high-speed operation of these LSI memories. The field-effect mobility μFE of a CAAC-IGZO FET is relatively low compared with the electron mobility of single-crystal Si (sc-Si). In this study, we measured and calculated the channel length L dependence of μFE for CAAC-IGZO and sc-Si FETs. For CAAC-IGZO FETs, μFE remains almost constant, particularly when L is longer than 0.3 µm, whereas that of sc-Si FETs decreases markedly as L shortens. Thus, the μFE difference between both FET types is reduced by miniaturization. This difference in μFE behavior is attributed to the different susceptibilities of electrons to phonon scattering. On the basis of this result and the extremely low off-state leakage current of CAAC-IGZO FETs, we expect high-speed LSI memories with low power consumption.

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording

PubMed Central

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-01-01

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development. PMID:28350370

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording.

PubMed

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-03-28

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

PubMed Central

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

Functional Na+ Channels in Cell Adhesion probed by Transistor Recording

PubMed Central

Schmidtner, Markus; Fromherz, Peter

2006-01-01

Cell membranes in a tissue are in close contact to each other, embedded in the extracellular matrix. Standard electrophysiological methods are not able to characterize ion channels under these conditions. Here we consider the area of cell adhesion on a solid substrate as a model system. We used HEK 293 cells cultured on fibronectin and studied the activation of NaV1.4 sodium channels in the adherent membrane with field-effect transistors in a silicon substrate. Under voltage clamp, we compared the transistor response with the whole-cell current. We observed that the extracellular voltage in the cell-chip contact was proportional to the total membrane current. The relation was calibrated by alternating-current stimulation. We found that Na+ channels are present in the area of cell adhesion on fibronectin with a functionality and a density that is indistinguishable from the free membrane. The experiment provides a basis for studying selective accumulation and depletion of ion channels in cell adhesion and also for a development of cell-based biosensoric devices and neuroelectronic systems. PMID:16227504

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, deceased, Roger J.; Dawson, Ralph; Fritz, Ian J.; Osbourn, Gordon C.; Zipperian, Thomas E.

1989-01-01

A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space which includes a lowest energy .GAMMA.-valley and a next lowest energy L-valley, each k-vector corresponding to one of the orthogonal directions defined by the planes of said layers and the directions perpendicular thereto. The layer thicknesses of the quantum well layers are selected to provide a superlattice L.sub.2D -valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley.

Investigation of Corner Effect and Identification of Tunneling Regimes in L-Shaped Tunnel Field-Effect-Transistor.

PubMed

Najam, Faraz; Yu, Yun Seop

2018-09-01

Corner-effect existing in L-shaped tunnel field-effect-transistor (LTFET) was investigated using numerical simulations and band diagram analysis. It was found that the corner-effect is caused by the convergence of electric field in the sharp source corner present in an LTFET, thereby increasing the electric field in the sharp source corner region. It was found that in the corner-effect region tunneling starts early, as a function of applied bias, as compared to the rest of the channel not affected by corner-effect. Further, different tunneling regimes as a function of applied bias were identified in the LTFET including source to channel and channel to channel tunneling regimes. Presence of different tunneling regimes in LTFET was analytically justified with a set of equations developed to model source to channel, and channel to channel tunneling currents. Drain-current-gate-voltage (Ids-Vgs) characteristics obtained from the equations is in reasonable qualitative agreement with numerical simulation.

Enzyme-polyelectrolyte multilayer assemblies on reduced graphene oxide field-effect transistors for biosensing applications.

PubMed

Piccinini, Esteban; Bliem, Christina; Reiner-Rozman, Ciril; Battaglini, Fernando; Azzaroni, Omar; Knoll, Wolfgang

2017-06-15

We present the construction of layer-by-layer (LbL) assemblies of polyethylenimine and urease onto reduced-graphene-oxide based field-effect transistors (rGO FETs) for the detection of urea. This versatile biosensor platform simultaneously exploits the pH dependency of liquid-gated graphene-based transistors and the change in the local pH produced by the catalyzed hydrolysis of urea. The use of an interdigitated microchannel resulted in transistors displaying low noise, high pH sensitivity (20.3µA/pH) and transconductance values up to 800 µS. The modification of rGO FETs with a weak polyelectrolyte improved the pH response because of its transducing properties by electrostatic gating effects. In the presence of urea, the urease-modified rGO FETs showed a shift in the Dirac point due to the change in the local pH close to the graphene surface. Markedly, these devices operated at very low voltages (less than 500mV) and were able to monitor urea in the range of 1-1000µm, with a limit of detection (LOD) down to 1µm, fast response and good long-term stability. The urea-response of the transistors was enhanced by increasing the number of bilayers due to the increment of the enzyme surface coverage onto the channel. Moreover, quantification of the heavy metal Cu 2+ (with a LOD down to 10nM) was performed in aqueous solution by taking advantage of the urease specific inhibition. Copyright © 2016 The Authors. Published by Elsevier B.V. All rights reserved.

An analytical model for bio-electronic organic field-effect transistor sensors

NASA Astrophysics Data System (ADS)

Macchia, Eleonora; Giordano, Francesco; Magliulo, Maria; Palazzo, Gerardo; Torsi, Luisa

2013-09-01

A model for the electrical characteristics of Functional-Bio-Interlayer Organic Field-Effect Transistors (FBI-OFETs) electronic sensors is here proposed. Specifically, the output current-voltage characteristics of a streptavidin (SA) embedding FBI-OFET are modeled by means of the analytical equations of an enhancement mode p-channel OFET modified according to an ad hoc designed equivalent circuit that is also independently simulated with pspice. An excellent agreement between the model and the experimental current-voltage output characteristics has been found upon exposure to 5 nM of biotin. A good agreement is also found with the SA OFET parameters graphically extracted from the device transfer I-V curves.

Electrospun Polyaniline/Polyethylene Oxide Nanofiber Field Effect Transistor

NASA Technical Reports Server (NTRS)

Pinto, N. J.; Johnson, A. T.; MacDiarmid, A. G.; Mueller, C. H.; Theofylaktos, N.; Robinson, D. C.; Miranda, F. A.

2003-01-01

We report on the observation of field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline(PANi)/polyethylene oxide(PE0) nanofibers. Saturation channel currents are observed at surprisingly low source/drain voltages. The hole mobility in the depletion regime is 1.4 x 10(exp -4) sq cm/V s while the 1-D charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating 1-D polymer FET's.

Improved performance of InSe field-effect transistors by channel encapsulation

NASA Astrophysics Data System (ADS)

Liang, Guangda; Wang, Yiming; Han, Lin; Yang, Zai-Xing; Xin, Qian; Kudrynskyi, Zakhar R.; Kovalyuk, Zakhar D.; Patanè, Amalia; Song, Aimin

2018-06-01

Due to the high electron mobility and photo-responsivity, InSe is considered as an excellent candidate for next generation electronics and optoelectronics. In particular, in contrast to many high-mobility two-dimensional (2D) materials, such as phosphorene, InSe is more resilient to oxidation in air. Nevertheless, its implementation in future applications requires encapsulation techniques to prevent the adsorption of gas molecules on its surface. In this work, we use a common lithography resist, poly(methyl methacrylate) (PMMA) to encapsulate InSe-based field-effect transistors (FETs). The encapsulation of InSe by PMMA improves the electrical stability of the FETs under a gate bias stress, and increases both the drain current and electron mobility. These findings indicate the effectiveness of the PMMA encapsulation method, which could be applied to other 2D materials.

Performance evaluation of parallel electric field tunnel field-effect transistor by a distributed-element circuit model

NASA Astrophysics Data System (ADS)

Morita, Yukinori; Mori, Takahiro; Migita, Shinji; Mizubayashi, Wataru; Tanabe, Akihito; Fukuda, Koichi; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shin-ichi; Liu, Yongxun; Masahara, Meishoku; Ota, Hiroyuki

2014-12-01

The performance of parallel electric field tunnel field-effect transistors (TFETs), in which band-to-band tunneling (BTBT) was initiated in-line to the gate electric field was evaluated. The TFET was fabricated by inserting an epitaxially-grown parallel-plate tunnel capacitor between heavily doped source wells and gate insulators. Analysis using a distributed-element circuit model indicated there should be a limit of the drain current caused by the self-voltage-drop effect in the ultrathin channel layer.

Studies of silicon p-n junction solar cells

NASA Technical Reports Server (NTRS)

Neugroschel, A.; Lindholm, F. A.

1979-01-01

To provide theoretical support for investigating different ways to obtain high open-circuit voltages in p-n junction silicon solar cells, an analytical treatment of heavily doped transparent-emitter devices is presented that includes the effects of bandgap narrowing, Fermi-Dirac statistics, a doping concentration gradient, and a finite surface recombination velocity at the emitter surface. Topics covered include: (1) experimental determination of bandgap narrowing in the emitter of silicon p-n junction devices; (2) heavily doped transparent regions in junction solar cells, diodes, and transistors; (3) high-low-emitter solar cell; (4) determination of lifetimes and recombination currents in p-n junction solar cells; (5) MOS and oxide-charged-induced BSF solar cells; and (6) design of high efficiency solar cells for space and terrestrial applications.

The fundamental downscaling limit of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mamaluy, Denis, E-mail: mamaluy@sandia.gov; Gao, Xujiao

2015-05-11

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

The fundamental downscaling limit of field effect transistors

DOE PAGES

Mamaluy, Denis; Gao, Xujiao

2015-05-12

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

Relation between film thickness and surface doping of MoS2 based field effect transistors

NASA Astrophysics Data System (ADS)

Lockhart de la Rosa, César J.; Arutchelvan, Goutham; Leonhardt, Alessandra; Huyghebaert, Cedric; Radu, Iuliana; Heyns, Marc; De Gendt, Stefan

2018-05-01

Ultra-thin MoS2 film doping through surface functionalization with physically adsorbed species is of great interest due to its ability to dope the film without reduction in the carrier mobility. However, there is a need for understanding how the thickness of the MoS2 film is related to the induced surface doping for improved electrical performance. In this work, we report on the relation of MoS2 film thickness with the doping effect induced by the n-dopant adsorbate poly(vinyl-alcohol). Field effect transistors built using MoS2 films of different thicknesses were electrically characterized, and it was observed that the ION/OFF ratio after doping in thin films is more than four orders of magnitudes greater when compared with thick films. Additionally, a semi-classical model tuned with the experimental devices was used to understand the spatial distribution of charge in the channel and explain the observed behavior. From the simulation results, it was revealed that the two-dimensional carrier density induced by the adsorbate is distributed rather uniformly along the complete channel for thin films (<5.2 nm) contrary to what happens for thicker films.

Understanding channel and contact effects on transport in 1-dimensional nanotransistors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Swartzentruber, Brian S.; Delker, Collin James; Yoo, Jinkyoung

Nanowire transistors are generally formed by metal contacts to a uniformly doped nanowire. The transistor can be modeled as a series combination of resistances from both the channel and the contacts. In this study, a simple model is proposed consisting of a resistive channel in series with two Schottky metal-semiconductor contacts modeled using the WKB approximation. This model captures several phenomena commonly observed in nanowire transistor measurements, including the mobility as a function of gate potential, mobility reduction with respect to bulk mobility, and non-linearities in output characteristics. For example, the maximum measured mobility as a function of gate voltagemore » in a nanowire transistor can be predicted based on the semiconductor bulk mobility in addition to barrier height and other properties of the contact. The model is then extended to nanowires with axial p-n junctions having an inde- pendent gate over each wire segment by splitting the channel resistance into a series component for each doping segment. Finally, the contact-channel model is applied to low-frequency noise analysis in nanowire devices, where the noise can be generated in both the channel and the contacts. Because contacts play a major, yet often neglected, role in nanowire transistor operation, they must be accounted for in order to extract meaningful parameters from I-V and noise measurements.« less

Relaxed germanium-tin P-channel tunneling field-effect transistors fabricated on Si: impacts of Sn composition and uniaxial tensile strain

NASA Astrophysics Data System (ADS)

Han, Genquan; Wang, Yibo; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Zhang, Jincheng; Cheng, Buwen; Hao, Yue

2015-05-01

In this work, relaxed GeSn p-channel tunneling field-effect transistors (pTFETs) with various Sn compositions are fabricated on Si. Enhancement of on-state current ION with the increase of Sn composition is observed in transistors, due to the reduction of direct bandgap EG. Ge0.93Sn0.07 and Ge0.95Sn0.05 pTFETs achieve 110% and 75% enhancement in ION, respectively, compared to Ge0.97Sn0.03 devices, at VGS - VTH = VDS = - 1.0 V. For the first time, ION enhancement in GeSn pTFET utilizing uniaxial tensile strain is reported. By applying 0.14% uniaxial tensile strain along [110] channel direction, Ge0.95Sn0.05 pTFETs achieve 12% ION improvement, over unstrained control devices at VGS - VTH = VDS = - 1.0 V. Theoretical study demonstrates that uniaxial tensile strain leads to the reduction of direct EG and affects the reduced tunneling mass, which bring the GBTBT rising, benefiting the tunneling current enhancement in GeSn TFETs.

Fabrication of assembled ZnO/TiO2 heterojunction thin film transistors using solution processing technique

NASA Astrophysics Data System (ADS)

Liau, Leo Chau-Kuang; Lin, Yun-Guo

2015-01-01

Ceramic-based metal-oxide-semiconductor (MOS) field-effect thin film transistors (TFTs), which were assembled by ZnO and TiO2 heterojunction films coated using solution processing technique, were fabricated and characterized. The fabrication of the device began with the preparation of ZnO and TiO2 films by spin coating. The ZnO and TiO2 films that were stacked together and annealed at 450 °C were characterized as a p-n junction diode. Two types of the devices, p-channel and n-channel TFTs, were produced using different assemblies of ZnO and TiO2 films. Results show that the p-channel TFTs (p-TFTs) and n-channel TFTs (n-TFTs) using the assemblies of ZnO and TiO2 films were demonstrated by source-drain current vs. drain voltage (IDS-VDS) measurements. Several electronic properties of the p- and n- TFTs, such as threshold voltage (Vth), on-off ratio, channel mobility, and subthreshold swing (SS), were determined by current-voltage (I-V) data analysis. The ZnO/TiO2-based TFTs can be produced using solution processing technique and an assembly approach.

Design Optimization of Ge/GaAs-Based Heterojunction Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (A-TFET).

PubMed

Seo, Jae Hwa; Yoon, Young Jun; Kang, In Man

2018-09-01

The Ge/GaAs-based heterojunction gate-all-around (GAA) arch-shaped tunneling field-effect transistor (A-TFET) have been designed and optimized using technology computer-aided design (TCAD) simulations. In our previous work, the silicon-based A-TFET was designed and demonstrated. However, to progress the electrical characteristics of A-TFET, the III-V compound heterojunction structures which has enhanced electrical properties must be adopted. Thus, the germanium with gallium arsenide (Ge/GaAs) is considered as key materials of A-TFET. The proposed device has a Ge-based p-doped source, GaAs-based i-doped channel and GaAs-based n-doped drain. Due to the critical issues of device performances, the doping concentration of source and channel region (Dsource, Dchannel), height of source region (Hsource) and epitaxially grown thickness of channel (tepi) was selected as design optimization variables of Ge/GaAs-based GAA A-TFET. The DC characteristics such as on-state current (ion), off-state current (ioff), subthreshold-swing (S) were of extracted and analyzed. Finally, the proposed device has a gate length (LG) of 90 nm, Dsource 5 × 1019 cm-3, Dchannel of 1018 cm-3, tepi of 4 nm, Hsource of 90 nm, R of 10 nm and demonstrate an ion of 2 mA/μm, S of 12.9 mV/dec.

Field-effect transistors (2nd revised and enlarged edition)

NASA Astrophysics Data System (ADS)

Bocharov, L. N.

The design, principle of operation, and principal technical characteristics of field-effect transistors produced in the USSR are described. Problems related to the use of field-effect transistors in various radioelectronic devices are examined, and tables of parameters and mean statistical characteristics are presented for the main types of field-effect transistors. Methods for calculating various circuit components are discussed and illustrated by numerical examples.

Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

NASA Astrophysics Data System (ADS)

She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

2013-09-01

Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

Graphene Exfoliation at a Ferroelectric Domain Wall Induced by the Piezoelectric Effect: Impact on the Conductance of the Graphene Channel

NASA Astrophysics Data System (ADS)

Morozovska, Anna N.; Kurchak, Anatolii I.; Strikha, Maksym V.

2017-11-01

p -n junctions in graphene on ferroelectric substrates have been actively studied, but the impact of the piezoelectric effect in ferroelectric substrate with ferroelectric domain walls (FDWs) on graphene characteristics was not considered. Because of the piezoeffect, ferroelectric domain stripes with opposite spontaneous polarizations elongate or contract depending on the polarity of voltage applied to the substrate. We show that the alternating piezoelectric displacement of the ferroelectric domain surfaces can lead to the alternate stretching and separation of graphene areas at the steps between elongated and contracted domains. Graphene separation at FDWs induced by the piezoeffect can cause unusual effects. In particular, the conductance of the graphene channel in a field-effect transistor increases significantly because electrons in the stretched section scatter on acoustic phonons. At the same time, the graphene conductance is determined by ferroelectric spontaneous polarization and varies greatly in the presence of FDWs. The revealed piezomechanism of graphene conductance control is promising for next generations of graphene-based field-effect transistors, modulators, electrical transducers, and piezoresistive elements. Also, our results propose the method of suspended graphene fabrication based on the piezoeffect in a ferroelectric substrate that does not require any additional technological procedures.

Plasma-assisted ohmic contact for AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Zhang, Jiaqi; Wang, Lei; Wang, Qingpeng; Jiang, Ying; Li, Liuan; Zhu, Huichao; Ao, Jin-Ping

2016-03-01

An Al-based ohmic process assisted by an inductively coupled plasma (ICP) recess treatment is proposed for AlGaN/GaN heterostructure field-effect transistors (HFETs) to realize ohmic contact, which is only needed to anneal at 500 °C. The recess treatment was done with SiCl4 plasma with 100 W ICP power for 20 s and annealing at 575 °C for 1 min. Under these conditions, contact resistance of 0.52 Ωmm was confirmed. To suppress the ball-up phenomenon and improve the surface morphology, an Al/TiN structure was also fabricated with the same conditions. The contact resistance was further improved to 0.30 Ωmm. By using this plasma-assisted ohmic process, a gate-first HFET was fabricated. The device showed high drain current density and high transconductance. The leakage current of the TiN-gate device decreased to 10-9 A, which was 5 orders of magnitude lower than that of the device annealed at 800 °C. The results showed that the low-temperature ohmic contact process assisted by ICP treatment is promising for the fabrication of gate-first and self-aligned gate HFETs.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dib, E., E-mail: elias.dib@for.unipi.it; Carrillo-Nuñez, H.; Cavassilas, N.

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

Position-dependent performance of copper phthalocyanine based field-effect transistors by gold nanoparticles modification.

PubMed

Luo, Xiao; Li, Yao; Lv, Wenli; Zhao, Feiyu; Sun, Lei; Peng, Yingquan; Wen, Zhanwei; Zhong, Junkang; Zhang, Jianping

2015-01-21

A facile fabrication and characteristics of copper phthalocyanine (CuPc)-based organic field-effect transistor (OFET) using the gold nanoparticles (Au NPs) modification is reported, thereby achieving highly improved performance. The effect of Au NPs located at three different positions, that is, at the SiO2/CuPc interface (device B), embedding in the middle of CuPc layer (device C), and on the top of CuPc layer (device D), is investigated, and the results show that device D has the best performance. Compared with the device without Au NPs (reference device A), device D displays an improvement of field-effect mobility (μ(sat)) from 1.65 × 10(-3) to 5.51 × 10(-3) cm(2) V(-1) s(-1), and threshold voltage decreases from -23.24 to -16.12 V. Therefore, a strategy for the performance improvement of the CuPc-based OFET with large field-effect mobility and saturation drain current is developed, on the basis of the concept of nanoscale Au modification. The model of an additional electron transport channel formation by FET operation at the Au NPs/CuPc interface is therefore proposed to explain the observed performance improvement. Optimum CuPc thickness is confirmed to be about 50 nm in the present study. The device-to-device uniformity and time stability are discussed for future application.

Nanowire size dependence on sensitivity of silicon nanowire field-effect transistor-based pH sensor

NASA Astrophysics Data System (ADS)

Lee, Ryoongbin; Kwon, Dae Woong; Kim, Sihyun; Kim, Sangwan; Mo, Hyun-Sun; Kim, Dae Hwan; Park, Byung-Gook

2017-12-01

In this study, we investigated the effects of nanowire size on the current sensitivity of silicon nanowire (SiNW) ion-sensitive field-effect transistors (ISFETs). The changes in on-current (I on) and resistance according to pH were measured in fabricated SiNW ISFETs of various lengths and widths. As a result, it was revealed that the sensitivity expressed as relative I on change improves as the width decreases. Through technology computer-aided design (TCAD) simulation analysis, the width dependence on the relative I on change can be explained by the observation that the target molecules located at the edge region along the channel width have a stronger effect on the sensitivity as the SiNW width is reduced. Additionally, the length dependence on the sensitivity can be understood in terms of the resistance ratio of the fixed parasitic resistance, including source/drain resistance, to the varying channel resistance as a function of channel length.

Theoretical evaluation of two dimensional electron gas characteristics of quaternary AlxInyGa1-x-yN/GaN hetero-junctions

NASA Astrophysics Data System (ADS)

Rahbardar Mojaver, Hassan; Manouchehri, Farzin; Valizadeh, Pouya

2016-04-01

The two dimensional electron gas (2DEG) characteristics of gated metal-face wurtzite AlInGaN/GaN hetero-junctions including positions of subband energy levels, fermi energy level, and the 2DEG concentration as functions of physical and compositional properties of the hetero-junction (i.e., barrier thickness and metal mole-fractions) are theoretically evaluated using the variational method. The calculated values of the 2DEG concentration are in good agreement with the sparsely available experimental data reported in the literature. According to our simulation results, a considerable shift in the positive direction of threshold voltage of AlInGaN/GaN hetero-junction field-effect transistors can be achieved by engineering both the spontaneous and the piezoelectric polarizations using a quaternary AlInGaN barrier-layer of appropriate mole-fractions.

Van der Waals epitaxial growth and optoelectronics of large-scale WSe2/SnS2 vertical bilayer p-n junctions.

PubMed

Yang, Tiefeng; Zheng, Biyuan; Wang, Zhen; Xu, Tao; Pan, Chen; Zou, Juan; Zhang, Xuehong; Qi, Zhaoyang; Liu, Hongjun; Feng, Yexin; Hu, Weida; Miao, Feng; Sun, Litao; Duan, Xiangfeng; Pan, Anlian

2017-12-04

High-quality two-dimensional atomic layered p-n heterostructures are essential for high-performance integrated optoelectronics. The studies to date have been largely limited to exfoliated and restacked flakes, and the controlled growth of such heterostructures remains a significant challenge. Here we report the direct van der Waals epitaxial growth of large-scale WSe 2 /SnS 2 vertical bilayer p-n junctions on SiO 2 /Si substrates, with the lateral sizes reaching up to millimeter scale. Multi-electrode field-effect transistors have been integrated on a single heterostructure bilayer. Electrical transport measurements indicate that the field-effect transistors of the junction show an ultra-low off-state leakage current of 10 -14 A and a highest on-off ratio of up to 10 7 . Optoelectronic characterizations show prominent photoresponse, with a fast response time of 500 μs, faster than all the directly grown vertical 2D heterostructures. The direct growth of high-quality van der Waals junctions marks an important step toward high-performance integrated optoelectronic devices and systems.

Chemical-free n-type and p-type multilayer-graphene transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dissanayake, D. M. N. M., E-mail: nandithad@voxtel-inc.com; Eisaman, M. D.; Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, New York 11794

A single-step doping method to fabricate n- and p-type multilayer graphene (MG) top-gate field effect transistors (GFETs) is demonstrated. The transistors are fabricated on soda-lime glass substrates, with the n-type doping of MG caused by the sodium in the substrate without the addition of external chemicals. Placing a hydrogen silsesquioxane (HSQ) barrier layer between the MG and the substrate blocks the n-doping, resulting in p-type doping of the MG above regions patterned with HSQ. The HSQ is deposited in a single fabrication step using electron beam lithography, allowing the patterning of arbitrary sub-micron spatial patterns of n- and p-type doping.more » When a MG channel is deposited partially on the barrier and partially on the glass substrate, a p-type and n-type doping profile is created, which is used for fabricating complementary transistors pairs. Unlike chemically doped GFETs in which the external dopants are typically introduced from the top, these substrate doped GFETs allow for a top gate which gives a stronger electrostatic coupling to the channel, reducing the operating gate bias. Overall, this method enables scalable fabrication of n- and p-type complementary top-gated GFETs with high spatial resolution for graphene microelectronic applications.« less

Ultrashort channel silicon nanowire transistors with nickel silicide source/drain contacts.

PubMed

Tang, Wei; Dayeh, Shadi A; Picraux, S Tom; Huang, Jian Yu; Tu, King-Ning

2012-08-08

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Effects of surface passivation dielectrics on carrier transport in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Oh, Sejoon; Jang, Han-Soo; Choi, Chel-Jong; Cho, Jaehee

2018-04-01

Dielectric layers prepared by different deposition methods were used for the surface passivation of AlGaN/GaN heterostructure field-effect transistors (HFETs) and the corresponding electrical characteristics were examined. Increases in the sheet charge density and the maximum drain current by approximately 45% and 28%, respectively, were observed after the deposition of a 100 nm-thick SiO2 layer by plasma-enhanced chemical vapor deposition (PECVD) on the top of the AlGaN/GaN HFETs. However, SiO2 deposited by a radio frequency (rf) sputter system had the opposite effect. As the strain applied to AlGaN was influenced by the deposition methods used for the dielectric layers, the carrier transport in the two-dimensional electron gas formed at the interface between AlGaN and GaN was affected accordingly.

Piezoelectric coupling in a field-effect transistor with a nanohybrid channel of ZnO nanorods grown vertically on graphene.

PubMed

Quang Dang, Vinh; Kim, Do-Il; Thai Duy, Le; Kim, Bo-Yeong; Hwang, Byeong-Ung; Jang, Mi; Shin, Kyung-Sik; Kim, Sang-Woo; Lee, Nae-Eung

2014-12-21

Piezoelectric coupling phenomena in a graphene field-effect transistor (GFET) with a nano-hybrid channel of chemical-vapor-deposited Gr (CVD Gr) and vertically aligned ZnO nanorods (NRs) under mechanical pressurization were investigated. Transfer characteristics of the hybrid channel GFET clearly indicated that the piezoelectric effect of ZnO NRs under static or dynamic pressure modulated the channel conductivity (σ) and caused a positive shift of 0.25% per kPa in the Dirac point. However, the GFET without ZnO NRs showed no change in either σ or the Dirac point. Analysis of the Dirac point shifts indicated transfer of electrons from the CVD Gr to ZnO NRs due to modulation of their interfacial barrier height under pressure. High responsiveness of the hybrid channel device with fast response and recovery times was evident in the time-dependent behavior at a small gate bias. In addition, the hybrid channel FET could be gated by mechanical pressurization only. Therefore, a piezoelectric-coupled hybrid channel GFET can be used as a pressure-sensing device with low power consumption and a fast response time. Hybridization of piezoelectric 1D nanomaterials with a 2D semiconducting channel in FETs enables a new design for future nanodevices.

The Effect of Aptamer Concetration towards Reduced Graphene Oxide-Field Effect Transistor Surface Channel for Biosensor Application

NASA Astrophysics Data System (ADS)

Syafiq Zainol Abidin, Azrul; Rahim, Ruslinda Abdul; Huan, Chow Yong; Maidin, Nur Nasyifa Mohd; Atiqah Ahmad, Nurul; Hashwan, Saeed S. Ba; Faudzi, Fatin Nabilah Mohd; Hong, Voon Chun

2018-03-01

Aptamer are artificially produce bioreceptor that has been developed to bind with various target biomolecules such as ion, cells, protein and small molecules. In this research, an aptamer concentration of 0.5 nM, 1 nM, 5 nM, 10 nM, and 50 nM were immobilized on reduced graphene oxide (rGO) integrated with field effect transistor (FET) respectively to study the effect of aptamer concentration toward rGO surface for stable biosensing platform. The 0.5 nM concentration of aptamer shows the highest current result of 84.3 µA at 1 V applied through the source and drain. After immobilized with aminated aptamer, the conductivity shows significant reduction due to the formation of amide bond on rGO surface between aminated aptamer and carboxyl group on rGO. The electrical performance of FET integrated with rGO shows stable electrical performance suitable to be used in the biosensing application.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis.

PubMed

Zhang, Yanjun; Clausmeyer, Jan; Babakinejad, Babak; Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V; Korchev, Yuri

2016-03-22

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis

PubMed Central

Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R. Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V.; Korchev, Yuri

2016-01-01

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements. PMID:26816294

Field effect transistors improve buffer amplifier

NASA Technical Reports Server (NTRS)

1967-01-01

Unity gain buffer amplifier with a Field Effect Transistor /FET/ differential input stage responds much faster than bipolar transistors when operated at low current levels. The circuit uses a dual FET in a unity gain buffer amplifier having extremely high input impedance, low bias current requirements, and wide bandwidth.

Influence of Surface Passivation on AlN Barrier Stress and Scattering Mechanism in Ultra-thin AlN/GaN Heterostructure Field-Effect Transistors.

PubMed

Lv, Y J; Song, X B; Wang, Y G; Fang, Y L; Feng, Z H

2016-12-01

Ultra-thin AlN/GaN heterostructure field-effect transistors (HFETs) with, and without, SiN passivation were fabricated by the same growth and device processes. Based on the measured DC characteristics, including the capacitance-voltage (C-V) and output current-voltage (I-V) curves, the variation of electron mobility with gate bias was found to be quite different for devices with, and without, SiN passivation. Although the AlN barrier layer is ultra thin (c. 3 nm), it was proved that SiN passivation induces no additional tensile stress and has no significant influence on the piezoelectric polarization of the AlN layer using Hall and Raman measurements. The SiN passivation was found to affect the surface properties, thereby increasing the electron density of the two-dimensional electron gas (2DEG) under the access region. The higher electron density in the access region after SiN passivation enhanced the electrostatic screening for the non-uniform distributed polarization charges, meaning that the polarization Coulomb field scattering has a weaker effect on the electron drift mobility in AlN/GaN-based devices.

p -n Junction Rectifying Characteristics of Purely n -Type GaN-Based Structures

NASA Astrophysics Data System (ADS)

Zuo, P.; Jiang, Y.; Ma, Z. G.; Wang, L.; Zhao, B.; Li, Y. F.; Yue, G.; Wu, H. Y.; Yan, H. J.; Jia, H. Q.; Wang, W. X.; Zhou, J. M.; Sun, Q.; Liu, W. M.; Ji, An-Chun; Chen, H.

2017-08-01

The GaN-based p -n junction rectifications are important in the development of high-power electronics. Here, we demonstrate that p -n junction rectifying characteristics can be realized with pure n -type structures by inserting an (In,Ga)N quantum well into the GaN /(Al ,Ga )N /GaN double heterostructures. Unlike the usual barriers, the insertion of an (In,Ga)N quantum well, which has an opposite polarization field to that of the (Al,Ga)N barrier, tailors significantly the energy bands of the system. The lifted energy level of the GaN spacer and the formation of the (In ,Ga )N /GaN interface barrier can improve the reverse threshold voltage and reduce the forward threshold voltage simultaneously, forming the p -n junction rectifying characteristics.

GdN nanoisland-based GaN tunnel junctions.

PubMed

Krishnamoorthy, Sriram; Kent, Thomas F; Yang, Jing; Park, Pil Sung; Myers, Roberto C; Rajan, Siddharth

2013-06-12

Tunnel junctions could have a great impact on gallium nitride and aluminum nitride-based devices such as light-emitting diodes and lasers by overcoming critical challenges related to hole injection and p-contacts. This paper demonstrates the use of GdN nanoislands to enhance interband tunneling and hole injection into GaN p-n junctions by several orders of magnitude, resulting in low tunnel junction specific resistivity (1.3 × 10(-3) Ω-cm(2)) compared to the previous results in wide band gap semiconductors. Tunnel injection of holes was confirmed by low-temperature operation of GaN p-n junction with a tunneling contact layer, and strong electroluminescence down to 20 K. The low tunnel junction resistance combined with low optical absorption loss in GdN is very promising for incorporation in GaN-based light emitters.

Surface potential based modeling of charge, current, and capacitances in DGTFET including mobile channel charge and ambipolar behaviour

NASA Astrophysics Data System (ADS)

Jain, Prateek; Yadav, Chandan; Agarwal, Amit; Chauhan, Yogesh Singh

2017-08-01

We present a surface potential based analytical model for double gate tunnel field effect transistor (DGTFET) for the current, terminal charges, and terminal capacitances. The model accounts for the effect of the mobile charge in the channel and captures the device physics in depletion as well as in the strong inversion regime. The narrowing of the tunnel barrier in the presence of mobile charges in the channel is incorporated via modeling of the inverse decay length, which is constant under channel depletion condition and bias dependent under inversion condition. To capture the ambipolar current behavior in the model, tunneling at the drain junction is also included. The proposed model is validated against TCAD simulation data and it shows close match with the simulation data.

Undoped polythiophene field-effect transistors with mobility of 1 cm2 V-1 s-1

NASA Astrophysics Data System (ADS)

Hamadani, B. H.; Gundlach, D. J.; McCulloch, I.; Heeney, M.

2007-12-01

We report on charge transport in organic field-effect transistors based on poly(2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene) as the active polymer layer with saturation field-effect mobilities as large as 1cm2V-1s-1. This is achieved by employing Pt instead of the commonly used Au as the contacting electrode and allows for a significant reduction in the metal/polymer contact resistance. The mobility increases as a function of decreasing channel length, consistent with a Poole-Frenkel model of charge transport, and reaches record mobilities of 1cm2V-1s-1 or more at channel lengths on the order of few microns in an undoped solution-processed polymer cast on an oxide gate dielectric.

HgNO3 sensitivity of AlGaN/GaN field effect transistors functionalized with phytochelating peptides

NASA Astrophysics Data System (ADS)

Rohrbaugh, Nathaniel; Hernandez-Balderrama, Luis; Kaess, Felix; Kirste, Ronny; Collazo, Ramon; Ivanisevic, Albena

2016-06-01

This study examined the conductance sensitivity of AlGaN/GaN field effect transistors in response to varying Hg/HNO3 solutions. FET surfaces were covalently functionalized with phytochelatin-5 peptides in order to detect Hg in solution. Results showed a resilience of peptide-AlGaN/GaN bonds in the presence of strong HNO3 aliquots, with significant degradation in FET ID signal. However, devices showed strong and varied response to Hg concentrations of 1, 10, 100, and 1000 ppm. The gathered statistically significant results indicate that peptide terminated AlGaN/GaN devices are capable of differentiating between Hg solutions and demonstrate device sensitivity.

The role of polarization coulomb field scattering in the electron mobility of AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Yan; Lin, Zhaojun; Zhao, Jingtao; Yang, Ming; Shi, Wenjing; Lv, Yuanjie; Feng, Zhihong

2016-04-01

The electron mobility for the prepared AlGaN/AlN/GaN heterostructure field-effect transistor (HFET) with the ratio of the gate length to the drain-to-source distance being less than 1/2 has been studied by comparing the measured electron mobility with the theoretical value. The measured electron mobility is derived from the measured capacitance-voltage (C-V) and current-voltage (I-V) characteristics, and the theoretical mobility is determined by using Matthiessen's law, involving six kinds of important scattering mechanisms. For the prepared device at room temperature, longitudinal optical phonon scattering (LO scattering) was found to have a remarkable effect on the value of the electron mobility, and polarization Coulomb field scattering (PCF scattering ) was found to be important to the changing trend of the electron mobility versus the two-dimensional electron gas (2DEG) density.

Trap density of states in n-channel organic transistors: variable temperature characteristics and band transport

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Joung-min, E-mail: cho.j.ad@m.titech.ac.jp; Akiyama, Yuto; Kakinuma, Tomoyuki

2013-10-15

We have investigated trap density of states (trap DOS) in n-channel organic field-effect transistors based on N,N ’-bis(cyclohexyl)naphthalene diimide (Cy-NDI) and dimethyldicyanoquinonediimine (DMDCNQI). A new method is proposed to extract trap DOS from the Arrhenius plot of the temperature-dependent transconductance. Double exponential trap DOS are observed, in which Cy-NDI has considerable deep states, by contrast, DMDCNQI has substantial tail states. In addition, numerical simulation of the transistor characteristics has been conducted by assuming an exponential trap distribution and the interface approximation. Temperature dependence of transfer characteristics are well reproduced only using several parameters, and the trap DOS obtained from the simulatedmore » characteristics are in good agreement with the assumed trap DOS, indicating that our analysis is self-consistent. Although the experimentally obtained Meyer-Neldel temperature is related to the trap distribution width, the simulation satisfies the Meyer-Neldel rule only very phenomenologically. The simulation also reveals that the subthreshold swing is not always a good indicator of the total trap amount, because it also largely depends on the trap distribution width. Finally, band transport is explored from the simulation having a small number of traps. A crossing point of the transfer curves and negative activation energy above a certain gate voltage are observed in the simulated characteristics, where the critical V{sub G} above which band transport is realized is determined by the sum of the trapped and free charge states below the conduction band edge.« less

Electrochemical doping for lowering contact barriers in organic field effect transistors

PubMed Central

Schaur, Stefan; Stadler, Philipp; Meana-Esteban, Beatriz; Neugebauer, Helmut; Serdar Sariciftci, N.

2012-01-01

By electrochemically p-doping pentacene in the vicinity of the source-drain electrodes in organic field effect transistors the injection barrier for holes is decreased. The focus of this work is put on the influence of the p-doping process on the transistor performance. Cyclic voltammetry performed on a pentacene based transistor exhibits a reversible p-doping response. This doped state is evoked at the transistor injection electrodes. An improvement is observed when comparing transistor characteristics before and after the doping process apparent by an improved transistor on-current. This effect is reflected in the analysis of the contact resistances of the devices. PMID:23483101

Ambient condition bias stress stability of vanadium (IV) oxide phthalocyanine based p-channel organic field-effect transistors

NASA Astrophysics Data System (ADS)

Obaidulla, Sk Md; Singh, Subhash; Mohapatra, Y. N.; Giri, P. K.

2018-01-01

High bias-stress stability and low threshold voltage (V th) shift under ambient conditions are highly desirable for practical applications of organic field-effect transistors (OFETs). We demonstrate here a 20-fold enhancement in the bias-stress stability for hexamethyledisilazane (HMDS) treated vanadium (IV) oxide phthalocyanine (VOPc) based OFETs as compared to the bare VOPc case under ambient conditions. VOPc based OFETs were fabricated on bare (non treated) SiO2 and a HMDS monolayer passivated SiO2 layer, with an operating voltage of 40 V. The devices with top contact gold (Au) electrodes exhibit excellent p-channel behavior with a moderate hole mobility for the HMDS-treated device. It is demonstrated that the time dependent ON-current decay and V th shift can be effectively controlled by using self-assembled monolayers of HMDS on the VOPc layer. For the HMDS-treated case, the bias stress stability study shows the stretched exponential decay of drain current by only ~15% during the long-term operation with constant bias voltage under ambient conditions, while it shows a large decay of  >70% for the nontreated devices operated for 1000 s. The corresponding characteric decay time constant (τ) is 104 s for the HMDS treated case, while that of the the non-treated SiO2 case is only ~480 s under ambient conditions. The inferior performance of the device with bare SiO2 is traced to the charge trapping at the voids in the inter-grain region of the films, while it is almost negligible for the HMDS-treated case, as confirmed from the AFM and XRD analyses. It is believed that HMDS treatment provides an excellent interface with a low density of traps and passivates the dangling bonds, which improve the charge transport characteristics. Also, the surface morphology of the VOPc film clearly influences the device performance. Thus, the HMDS treatment provides a very attractive approach for attaining long-term air stability and a low V th shift for the VOPc based OFET

Analysis of electric field distribution in GaAs metal-semiconductor field effect transistor with a field-modulating plate

NASA Astrophysics Data System (ADS)

Hori, Yasuko; Kuzuhara, Masaaki; Ando, Yuji; Mizuta, Masashi

2000-04-01

Electric field distribution in the channel of a field effect transistor (FET) with a field-modulating plate (FP) has been theoretically investigated using a two-dimensional ensemble Monte Carlo simulation. This analysis revealed that the introduction of FP is effective in canceling the influence of surface traps under forward bias conditions and in reducing the electric field intensity at the drain side of the gate edge under pinch-off bias conditions. This study also found that a partial overlap of the high-field region under the gate and that at the FP electrode is important for reducing the electric field intensity. The optimized metal-semiconductor FET with FP (FPFET) (LGF˜0.2 μm) exhibited a much lower peak electric field intensity than a conventional metal-semiconductor FET. Based on these numerically calculated results, we have proposed a design procedure to optimize the power FPFET structure with extremely high breakdown voltages while maintaining reasonable gain performance.

Investigation of piezoresistive effect in p-channel metal–oxide–semiconductor field-effect transistors fabricated on circular silicon-on-insulator diaphragms using cost-effective minimal-fab process

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Tanaka, Hiroyuki; Umeyama, Norio; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2018-06-01

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the 〈110〉 or 〈100〉 channel direction have been successfully fabricated on circular silicon-on-insulator (SOI) diaphragms using a cost-effective minimal-fab process, and their electrical characteristics have been systematically investigated before and after the SOI diaphragm formation. It was found that almost the same subthreshold slope (S-slope) and threshold voltage (V t) are observed in the fabricated PMOSFETs before and after the SOI diaphragm formation, and they are independent of the channel direction. On the other hand, significant variations in drain current were observed in the fabricated PMOSFETs with the 〈110〉 channel direction after the SOI diaphragm formation owing to the residual mechanical stress-induced piezoresistive effect. It was also confirmed that electrical characteristics of the fabricated PMOSFETs with the 〈100〉 channel direction are almost the same before and after the SOI diaphragm formation, i.e., not sensitive to the mechanical stress. Moreover, the drain current variations at different directions of mechanical stress and current flow were systematically investigated and discussed.

Gate voltage dependent 1/f noise variance model based on physical noise generation mechanisms in n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Arai, Yukiko; Aoki, Hitoshi; Abe, Fumitaka; Todoroki, Shunichiro; Khatami, Ramin; Kazumi, Masaki; Totsuka, Takuya; Wang, Taifeng; Kobayashi, Haruo

2015-04-01

1/f noise is one of the most important characteristics for designing analog/RF circuits including operational amplifiers and oscillators. We have analyzed and developed a novel 1/f noise model in the strong inversion, saturation, and sub-threshold regions based on SPICE2 type model used in any public metal-oxide-semiconductor field-effect transistor (MOSFET) models developed by the University of California, Berkeley. Our model contains two noise generation mechanisms that are mobility and interface trap number fluctuations. Noise variability dependent on gate voltage is also newly implemented in our model. The proposed model has been implemented in BSIM4 model of a SPICE3 compatible circuit simulator. Parameters of the proposed model are extracted with 1/f noise measurements for simulation verifications. The simulation results show excellent agreements between measurement and simulations.

Dual metal gate tunneling field effect transistors based on MOSFETs: A 2-D analytical approach

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2018-01-01

A novel 2-D analytical drain current model of novel Dual Metal Gate Tunnel Field Effect Transistors Based on MOSFETs (DMG-TFET) is presented in this paper. The proposed Tunneling FET is extracted from a MOSFET structure by employing an additional electrode in the source region with an appropriate work function to induce holes in the N+ source region and hence makes it as a P+ source region. The electric field is derived which is utilized to extract the expression of the drain current by analytically integrating the band to band tunneling generation rate in the tunneling region based on the potential profile by solving the Poisson's equation. Through this model, the effects of the thin film thickness and gate voltage on the potential, the electric field, and the effects of the thin film thickness on the tunneling current can be studied. To validate our present model we use SILVACO ATLAS device simulator and the analytical results have been compared with it and found a good agreement.

Novel Field-Effect Schottky Barrier Transistors Based on Graphene-MoS2 Heterojunctions

PubMed Central

Tian, He; Tan, Zhen; Wu, Can; Wang, Xiaomu; Mohammad, Mohammad Ali; Xie, Dan; Yang, Yi; Wang, Jing; Li, Lain-Jong; Xu, Jun; Ren, Tian-Ling

2014-01-01

Recently, two-dimensional materials such as molybdenum disulphide (MoS2) have been demonstrated to realize field effect transistors (FET) with a large current on-off ratio. However, the carrier mobility in backgate MoS2 FET is rather low (typically 0.5–20 cm2/V·s). Here, we report a novel field-effect Schottky barrier transistors (FESBT) based on graphene-MoS2 heterojunction (GMH), where the characteristics of high mobility from graphene and high on-off ratio from MoS2 are properly balanced in the novel transistors. Large modulation on the device current (on/off ratio of 105) is achieved by adjusting the backgate (through 300 nm SiO2) voltage to modulate the graphene-MoS2 Schottky barrier. Moreover, the field effective mobility of the FESBT is up to 58.7 cm2/V·s. Our theoretical analysis shows that if the thickness of oxide is further reduced, a subthreshold swing (SS) of 40 mV/decade can be maintained within three orders of drain current at room temperature. This provides an opportunity to overcome the limitation of 60 mV/decade for conventional CMOS devices. The FESBT implemented with a high on-off ratio, a relatively high mobility and a low subthreshold promises low-voltage and low-power applications for future electronics. PMID:25109609

Ferroelectric Field Effect Transistor Model Using Partitioned Ferroelectric Layer and Partial Polarization

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat D.

2004-01-01

A model of an n-channel ferroelectric field effect transistor has been developed based on both theoretical and empirical data. The model is based on an existing model that incorporates partitioning of the ferroelectric layer to calculate the polarization within the ferroelectric material. The model incorporates several new aspects that are useful to the user. It takes into account the effect of a non-saturating gate voltage only partially polarizing the ferroelectric material based on the existing remnant polarization. The model also incorporates the decay of the remnant polarization based on the time history of the FFET. A gate pulse of a specific voltage; will not put the ferroelectric material into a single amount of polarization for that voltage, but instead vary with previous state of the material and the time since the last change to the gate voltage. The model also utilizes data from FFETs made from different types of ferroelectric materials to allow the user just to input the material being used and not recreate the entire model. The model also allows the user to input the quality of the ferroelectric material being used. The ferroelectric material quality can go from a theoretical perfect material with little loss and no decay to a less than perfect material with remnant losses and decay. This model is designed to be used by people who need to predict the external characteristics of a FFET before the time and expense of design and fabrication. It also allows the parametric evaluation of quality of the ferroelectric film on the overall performance of the transistor.

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Tang, Fengzai; Lee, Kean B.; Guiney, Ivor; Frentrup, Martin; Barnard, Jonathan S.; Divitini, Giorgio; Zaidi, Zaffar H.; Martin, Tomas L.; Bagot, Paul A.; Moody, Michael P.; Humphreys, Colin J.; Houston, Peter A.; Oliver, Rachel A.; Wallis, David J.

2018-01-01

We investigate the impact of a fluorine plasma treatment used to obtain enhancement-mode operation on the structure and chemistry at the nanometer and atomic scales of an InAlN/GaN field effect transistor. The fluorine plasma treatment is successful in that enhancement mode operation is achieved with a +2.8 V threshold voltage. However, the InAlN barrier layers are observed to have been damaged by the fluorine treatment with their thickness being reduced by up to 50%. The treatment also led to oxygen incorporation within the InAlN barrier layers. Furthermore, even in the as-grown structure, Ga was unintentionally incorporated during the growth of the InAlN barrier. The impact of both the reduced barrier thickness and the incorporated Ga within the barrier on the transistor properties has been evaluated theoretically and compared to the experimentally determined two-dimensional electron gas density and threshold voltage of the transistor. For devices without fluorine treatment, the two-dimensional electron gas density is better predicted if the quaternary nature of the barrier is taken into account. For the fluorine treated device, not only the changes to the barrier layer thickness and composition, but also the fluorine doping needs to be considered to predict device performance. These studies reveal the factors influencing the performance of these specific transistor structures and highlight the strengths of the applied nanoscale characterisation techniques in revealing information relevant to device performance.

Contact Resistance and Channel Conductance of Graphene Field-Effect Transistors under Low-Energy Electron Irradiation

PubMed Central

Giubileo, Filippo; Di Bartolomeo, Antonio; Martucciello, Nadia; Romeo, Francesco; Iemmo, Laura; Romano, Paola; Passacantando, Maurizio

2016-01-01

We studied the effects of low-energy electron beam irradiation up to 10 keV on graphene-based field effect transistors. We fabricated metallic bilayer electrodes to contact mono- and bi-layer graphene flakes on SiO2, obtaining specific contact resistivity ρc≈19 kΩ·µm2 and carrier mobility as high as 4000 cm2·V−1·s−1. By using a highly doped p-Si/SiO2 substrate as the back gate, we analyzed the transport properties of the device and the dependence on the pressure and on the electron bombardment. We demonstrate herein that low energy irradiation is detrimental to the transistor current capability, resulting in an increase in contact resistance and a reduction in carrier mobility, even at electron doses as low as 30 e−/nm2. We also show that irradiated devices recover their pristine state after few repeated electrical measurements. PMID:28335335

Organic-inorganic field effect transistor with SnI-based perovskite channel layer using vapor phase deposition technique

NASA Astrophysics Data System (ADS)

Matsushima, Toshinori; Yasuda, Takeshi; Fujita, Katsuhiko; Tsutsui, Tetsuo

2003-11-01

High field-effect hole mobility of (formula available in paper)and threshold voltage is -3.2 V) in organic-inorganic layered perovskite film (formula available in paper)prepared by a vapor phase deposition technique have been demonstrated through the octadecyltrichlorosilane treatment of substrate. Previously, the (formula available in paper)films prepared on the octadecyltrichlorosilane-covered substrates using a vapor evaporation showed not only intense exciton absorption and photoluminescence in the optical spectroscopy but also excellent crystallinity and large grain structure in X-ray and atomic force microscopic studies. Especially, the (formula available in paper)structure in the region below few nm closed to the surface of octadecyltrichlorosilane monolayer was drastically improved in comparison with that on the non-covered substrate. Though our initial (formula available in paper)films via a same sequence of preparation of (formula available in paper)and octadecyltrichlorosilane monolayer did not show the field-effect properties because of a lack of spectral, structural, and morphological features. The unformation of favorable (formula available in paper)structure in the very thin region, that is very important for the field-effect transistors to transport electrons or holes, closed to the surface of non-covered (formula available in paper)dielectric layer was also one of the problems for no observation of them. By adding further optimization and development, such as deposition rate of perovskite, substrate heating during deposition, and tuning device architecture, with hydrophobic treatment, the vacuum-deposited (formula available in paper)have achieved above-described high performance in organic-inorganic hybrid transistors.

Direct observation of single-charge-detection capability of nanowire field-effect transistors.

PubMed

Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E

2010-10-01

A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.

The physical analysis on electrical junction of junctionless FET

NASA Astrophysics Data System (ADS)

Chen, Lun-Chun; Yeh, Mu-Shih; Lin, Yu-Ru; Lin, Ko-Wei; Wu, Min-Hsin; Thirunavukkarasu, Vasanthan; Wu, Yung-Chun

2017-02-01

We propose the concept of the electrical junction in a junctionless (JL) field-effect-transistor (FET) to illustrate the transfer characteristics of the JL FET. In this work, nanowire (NW) junctionless poly-Si thin-film transistors are used to demonstrate this conception of the electrical junction. Though the dopant and the dosage of the source, of the drain, and of the channel are exactly the same in the JL FET, the transfer characteristics of the JL FET is similar to these of the conventional inversion-mode FET rather than these of a resistor, which is because of the electrical junction at the boundary of the gate and the drain in the JL FET. The electrical junction helps us to understand the JL FET, and also to explain the superior transfer characteristic of the JL FET with the gated raised S/D (Gout structure) which reveals low drain-induced-barrier-lowering (DIBL) and low breakdown voltage of ion impact ionization.

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE PAGES

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng; ...

2017-07-06

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

Fabrication and electrical properties of MoS2 nanodisc-based back-gated field effect transistors.

PubMed

Gu, Weixia; Shen, Jiaoyan; Ma, Xiying

2014-02-28

Two-dimensional (2D) molybdenum disulfide (MoS2) is an attractive alternative semiconductor material for next-generation low-power nanoelectronic applications, due to its special structure and large bandgap. Here, we report the fabrication of large-area MoS2 nanodiscs and their incorporation into back-gated field effect transistors (FETs) whose electrical properties we characterize. The MoS2 nanodiscs, fabricated via chemical vapor deposition (CVD), are homogeneous and continuous, and their thickness of around 5 nm is equal to a few layers of MoS2. In addition, we find that the MoS2 nanodisc-based back-gated field effect transistors with nickel electrodes achieve very high performance. The transistors exhibit an on/off current ratio of up to 1.9 × 105, and a maximum transconductance of up to 27 μS (5.4 μS/μm). Moreover, their mobility is as high as 368 cm2/Vs. Furthermore, the transistors have good output characteristics and can be easily modulated by the back gate. The electrical properties of the MoS2 nanodisc transistors are better than or comparable to those values extracted from single and multilayer MoS2 FETs.

Lateral energy band profile modulation in tunnel field effect transistors based on gate structure engineering

NASA Astrophysics Data System (ADS)

Cui, Ning; Liang, Renrong; Wang, Jing; Xu, Jun

2012-06-01

Choosing novel materials and structures is important for enhancing the on-state current in tunnel field-effect transistors (TFETs). In this paper, we reveal that the on-state performance of TFETs is mainly determined by the energy band profile of the channel. According to this interpretation, we present a new concept of energy band profile modulation (BPM) achieved with gate structure engineering. It is believed that this approach can be used to suppress the ambipolar effect. Based on this method, a Si TFET device with a symmetrical tri-material-gate (TMG) structure is proposed. Two-dimensional numerical simulations demonstrated that the special band profile in this device can boost on-state performance, and it also suppresses the off-state current induced by the ambipolar effect. These unique advantages are maintained over a wide range of gate lengths and supply voltages. The BPM concept can serve as a guideline for improving the performance of nanoscale TFET devices.

Hexadecameric structure of an invertebrate gap junction channel.

PubMed

Oshima, Atsunori; Matsuzawa, Tomohiro; Murata, Kazuyoshi; Tani, Kazutoshi; Fujiyoshi, Yoshinori

2016-03-27

Innexins are invertebrate-specific gap junction proteins with four transmembrane helices. These proteins oligomerize to constitute intercellular channels that allow for the passage of small signaling molecules associated with neural and muscular electrical activity. In contrast to the large number of structural and functional studies of connexin gap junction channels, few structural studies of recombinant innexin channels are reported. Here we show the three-dimensional structure of two-dimensionally crystallized Caenorhabditis elegans innexin-6 (INX-6) gap junction channels. The N-terminal deleted INX-6 proteins are crystallized in lipid bilayers. The three-dimensional reconstruction determined by cryo-electron crystallography reveals that a single INX-6 gap junction channel comprises 16 subunits, a hexadecamer, in contrast to chordate connexin channels, which comprise 12 subunits. The channel pore diameters at the cytoplasmic entrance and extracellular gap region are larger than those of connexin26. Two bulb densities are observed in each hemichannel, one in the pore and the other at the cytoplasmic side of the hemichannel in the channel pore pathway. These findings imply a structural diversity of gap junction channels among multicellular organisms. Copyright © 2016 The Authors. Published by Elsevier Ltd.. All rights reserved.

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith, Roger; Ferrier, Terry; Krasowski, Michael J.;

Phosphorus Doping Effect in a Zinc Oxide Channel Layer to Improve the Performance of Oxide Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Han, Dong-Suk; Moon, Yeon-Keon; Lee, Sih; Kim, Kyung-Taek; Moon, Dae-Yong; Lee, Sang-Ho; Kim, Woong-Sun; Park, Jong-Wan

2012-09-01

In this study, we fabricated phosphorus-doped zinc oxide-based thin-film transistors (TFTs) using direct current (DC) magnetron sputtering at a relatively low temperature of 100°C. To improve the TFT device performance, including field-effect mobility and bias stress stability, phosphorus dopants were employed to suppress the generation of intrinsic defects in the ZnO-based semiconductor. The positive and negative bias stress stabilities were dramatically improved by introducing the phosphorus dopants, which could prevent turn-on voltage ( V ON) shift in the TFTs caused by charge trapping within the active channel layer. The study showed that phosphorus doping in ZnO was an effective method to control the electrical properties of the active channel layers and improve the bias stress stability of oxide-based TFTs.

Unencapsulated Air-stable Organic Field Effect Transistor by All Solution Processes for Low Power Vapor Sensing

NASA Astrophysics Data System (ADS)

Feng, Linrun; Tang, Wei; Zhao, Jiaqing; Yang, Ruozhang; Hu, Wei; Li, Qiaofeng; Wang, Ruolin; Guo, Xiaojun

2016-02-01

With its excellent mechanical flexibility, low-cost and low-temperature processing, the solution processed organic field-effect transistor (OFET) is a promising platform technology for developing ubiquitous sensor applications in digital health, environment monitoring and Internet of Things. However, a contradiction between achieving low voltage operation and having stable performance severely hinder the technology to become commercially viable. This work shows that, by reducing the sub-gap density of states (DOS) at the channel for low operation voltage and using a proper low-k non-polar polymer dielectric layer, such an issue can be addressed. Stable electrical properties after either being placed for weeks or continuously prolonged bias stressing for hours in ambient air are achieved for all solution processed unencapsulated OFETs with the channel being exposed to the ambient air for analyte detection. The fabricated device presents a steep subthreshold swing less than 100 mV/decade, and an ON/OFF ratio of 106 at a voltage swing of 3 V. The low voltage and stable operation allows the sensor made of the OFET to be incorporated into a battery-powered electronic system for continuously reliable sensing of ammonia vapor in ambient air with very small power consumption of about 50 nW.

Unencapsulated Air-stable Organic Field Effect Transistor by All Solution Processes for Low Power Vapor Sensing

PubMed Central

Feng, Linrun; Tang, Wei; Zhao, Jiaqing; Yang, Ruozhang; Hu, Wei; Li, Qiaofeng; Wang, Ruolin; Guo, Xiaojun

2016-01-01

With its excellent mechanical flexibility, low-cost and low-temperature processing, the solution processed organic field-effect transistor (OFET) is a promising platform technology for developing ubiquitous sensor applications in digital health, environment monitoring and Internet of Things. However, a contradiction between achieving low voltage operation and having stable performance severely hinder the technology to become commercially viable. This work shows that, by reducing the sub-gap density of states (DOS) at the channel for low operation voltage and using a proper low-k non-polar polymer dielectric layer, such an issue can be addressed. Stable electrical properties after either being placed for weeks or continuously prolonged bias stressing for hours in ambient air are achieved for all solution processed unencapsulated OFETs with the channel being exposed to the ambient air for analyte detection. The fabricated device presents a steep subthreshold swing less than 100 mV/decade, and an ON/OFF ratio of 106 at a voltage swing of 3 V. The low voltage and stable operation allows the sensor made of the OFET to be incorporated into a battery-powered electronic system for continuously reliable sensing of ammonia vapor in ambient air with very small power consumption of about 50 nW. PMID:26861412

Deformable Organic Nanowire Field-Effect Transistors.

PubMed

Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan

2018-02-01

Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dumitru, L. M.; Manoli, K.; Magliulo, M.

2015-01-01

A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.